From e4fbb68f4594388367e4e4595abf9330d9875704 Mon Sep 17 00:00:00 2001 From: Abhijeet Dharmapurikar Date: Mon, 1 Feb 2010 12:30:28 -0800 Subject: msm: 8x60: setup correct handlers for private interrupts Private Peripheral interrupts could be edge triggered or level triggered depending on the platform. Initialize handlers for these in board file. Signed-off-by: Abhijeet Dharmapurikar Signed-off-by: Daniel Walker --- arch/arm/mach-msm/board-msm8x60.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-msm') diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c index e7feb99b5cf..70087cad673 100644 --- a/arch/arm/mach-msm/board-msm8x60.c +++ b/arch/arm/mach-msm/board-msm8x60.c @@ -44,7 +44,7 @@ static void __init msm8x60_init_irq(void) { unsigned int i; - gic_dist_init(0, MSM_QGIC_DIST_BASE, 1); + gic_dist_init(0, MSM_QGIC_DIST_BASE, GIC_PPI_START); gic_cpu_base_addr = (void *)MSM_QGIC_CPU_BASE; gic_cpu_init(0, MSM_QGIC_CPU_BASE); -- cgit v1.2.3-70-g09d2