From 548d849574847b788fe846fe21a41386063be161 Mon Sep 17 00:00:00 2001
From: Russell King <rmk@dyn-67.arm.linux.org.uk>
Date: Tue, 4 Nov 2008 14:02:46 +0000
Subject: [ARM] omap: introduce clock operations structure
Collect up all the common enable/disable clock operation functions
into a separate operations structure.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
arch/arm/mach-omap1/clock.c | 30 +++++++++++++++++++++++++++---
1 file changed, 27 insertions(+), 3 deletions(-)
(limited to 'arch/arm/mach-omap1/clock.c')
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 5fba2073171..25ef04da6b0 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -26,8 +26,17 @@
#include <mach/clock.h>
#include <mach/sram.h>
+static const struct clkops clkops_generic;
+static const struct clkops clkops_uart;
+static const struct clkops clkops_dspck;
+
#include "clock.h"
+static int omap1_clk_enable_generic(struct clk * clk);
+static int omap1_clk_enable(struct clk *clk);
+static void omap1_clk_disable_generic(struct clk * clk);
+static void omap1_clk_disable(struct clk *clk);
+
__u32 arm_idlect1_mask;
/*-------------------------------------------------------------------------
@@ -78,6 +87,11 @@ static void omap1_clk_disable_dsp_domain(struct clk *clk)
}
}
+static const struct clkops clkops_dspck = {
+ .enable = &omap1_clk_enable_dsp_domain,
+ .disable = &omap1_clk_disable_dsp_domain,
+};
+
static int omap1_clk_enable_uart_functional(struct clk *clk)
{
int ret;
@@ -105,6 +119,11 @@ static void omap1_clk_disable_uart_functional(struct clk *clk)
omap1_clk_disable_generic(clk);
}
+static const struct clkops clkops_uart = {
+ .enable = &omap1_clk_enable_uart_functional,
+ .disable = &omap1_clk_disable_uart_functional,
+};
+
static void omap1_clk_allow_idle(struct clk *clk)
{
struct arm_idlect1_clk * iclk = (struct arm_idlect1_clk *)clk;
@@ -468,7 +487,7 @@ static int omap1_clk_enable(struct clk *clk)
omap1_clk_deny_idle(clk->parent);
}
- ret = clk->enable(clk);
+ ret = clk->ops->enable(clk);
if (unlikely(ret != 0) && clk->parent) {
omap1_clk_disable(clk->parent);
@@ -482,7 +501,7 @@ static int omap1_clk_enable(struct clk *clk)
static void omap1_clk_disable(struct clk *clk)
{
if (clk->usecount > 0 && !(--clk->usecount)) {
- clk->disable(clk);
+ clk->ops->disable(clk);
if (likely(clk->parent)) {
omap1_clk_disable(clk->parent);
if (clk->flags & CLOCK_NO_IDLE_PARENT)
@@ -561,6 +580,11 @@ static void omap1_clk_disable_generic(struct clk *clk)
}
}
+static const struct clkops clkops_generic = {
+ .enable = &omap1_clk_enable_generic,
+ .disable = &omap1_clk_disable_generic,
+};
+
static long omap1_clk_round_rate(struct clk *clk, unsigned long rate)
{
int dsor_exp;
@@ -659,7 +683,7 @@ static void __init omap1_clk_disable_unused(struct clk *clk)
}
printk(KERN_INFO "Disabling unused clock \"%s\"... ", clk->name);
- clk->disable(clk);
+ clk->ops->disable(clk);
printk(" done\n");
}
--
cgit v1.2.3-70-g09d2
From 897dcded6fb6565f4d1c22a55d21f135403db132 Mon Sep 17 00:00:00 2001
From: Russell King <rmk@dyn-67.arm.linux.org.uk>
Date: Tue, 4 Nov 2008 16:35:03 +0000
Subject: [ARM] omap: provide a NULL clock operations structure
... and use it for clocks which are ALWAYS_ENABLED. These clocks
use a non-NULL enable_reg pointer for other purposes (such as
selecting clock rates.)
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
arch/arm/mach-omap1/clock.c | 3 --
arch/arm/mach-omap1/clock.h | 78 ++++++++++++++----------------
arch/arm/mach-omap2/clock.c | 4 +-
arch/arm/mach-omap2/clock24xx.h | 31 ++++++++----
arch/arm/mach-omap2/clock34xx.h | 85 ++++++++++++++++++++-------------
arch/arm/plat-omap/clock.c | 23 ++++++++-
arch/arm/plat-omap/include/mach/clock.h | 4 +-
7 files changed, 135 insertions(+), 93 deletions(-)
(limited to 'arch/arm/mach-omap1/clock.c')
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 25ef04da6b0..ff408105ffb 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -515,9 +515,6 @@ static int omap1_clk_enable_generic(struct clk *clk)
__u16 regval16;
__u32 regval32;
- if (clk->flags & ALWAYS_ENABLED)
- return 0;
-
if (unlikely(clk->enable_reg == NULL)) {
printk(KERN_ERR "clock.c: Enable for %s without enable code\n",
clk->name);
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h
index 5b93a2a897a..8673832d829 100644
--- a/arch/arm/mach-omap1/clock.h
+++ b/arch/arm/mach-omap1/clock.h
@@ -144,18 +144,18 @@ static struct mpu_rate rate_table[] = {
static struct clk ck_ref = {
.name = "ck_ref",
- .ops = &clkops_generic,
+ .ops = &clkops_null,
.rate = 12000000,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
- CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
+ CLOCK_IN_OMAP310,
};
static struct clk ck_dpll1 = {
.name = "ck_dpll1",
- .ops = &clkops_generic,
+ .ops = &clkops_null,
.parent = &ck_ref,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
- CLOCK_IN_OMAP310 | RATE_PROPAGATES | ALWAYS_ENABLED,
+ CLOCK_IN_OMAP310 | RATE_PROPAGATES,
};
static struct arm_idlect1_clk ck_dpll1out = {
@@ -186,11 +186,10 @@ static struct clk sossi_ck = {
static struct clk arm_ck = {
.name = "arm_ck",
- .ops = &clkops_generic,
+ .ops = &clkops_null,
.parent = &ck_dpll1,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
- CLOCK_IN_OMAP310 | RATE_CKCTL | RATE_PROPAGATES |
- ALWAYS_ENABLED,
+ CLOCK_IN_OMAP310 | RATE_CKCTL | RATE_PROPAGATES,
.rate_offset = CKCTL_ARMDIV_OFFSET,
.recalc = &omap1_ckctl_recalc,
};
@@ -265,9 +264,9 @@ static struct arm_idlect1_clk armwdt_ck = {
static struct clk arminth_ck16xx = {
.name = "arminth_ck",
- .ops = &clkops_generic,
+ .ops = &clkops_null,
.parent = &arm_ck,
- .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
+ .flags = CLOCK_IN_OMAP16XX,
.recalc = &followparent_recalc,
/* Note: On 16xx the frequency can be divided by 2 by programming
* ARM_CKCTL:ARM_INTHCK_SEL(14) to 1
@@ -290,10 +289,10 @@ static struct clk dsp_ck = {
static struct clk dspmmu_ck = {
.name = "dspmmu_ck",
- .ops = &clkops_generic,
+ .ops = &clkops_null,
.parent = &ck_dpll1,
.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
- RATE_CKCTL | ALWAYS_ENABLED,
+ RATE_CKCTL,
.rate_offset = CKCTL_DSPMMUDIV_OFFSET,
.recalc = &omap1_ckctl_recalc,
};
@@ -337,12 +336,12 @@ static struct clk dsptim_ck = {
static struct arm_idlect1_clk tc_ck = {
.clk = {
.name = "tc_ck",
- .ops = &clkops_generic,
+ .ops = &clkops_null,
.parent = &ck_dpll1,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
CLOCK_IN_OMAP730 | CLOCK_IN_OMAP310 |
RATE_CKCTL | RATE_PROPAGATES |
- ALWAYS_ENABLED | CLOCK_IDLE_CONTROL,
+ CLOCK_IDLE_CONTROL,
.rate_offset = CKCTL_TCDIV_OFFSET,
.recalc = &omap1_ckctl_recalc,
},
@@ -351,10 +350,9 @@ static struct arm_idlect1_clk tc_ck = {
static struct clk arminth_ck1510 = {
.name = "arminth_ck",
- .ops = &clkops_generic,
+ .ops = &clkops_null,
.parent = &tc_ck.clk,
- .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
- ALWAYS_ENABLED,
+ .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
.recalc = &followparent_recalc,
/* Note: On 1510 the frequency follows TC_CK
*
@@ -365,10 +363,9 @@ static struct clk arminth_ck1510 = {
static struct clk tipb_ck = {
/* No-idle controlled by "tc_ck" */
.name = "tipb_ck",
- .ops = &clkops_generic,
+ .ops = &clkops_null,
.parent = &tc_ck.clk,
- .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
- ALWAYS_ENABLED,
+ .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
.recalc = &followparent_recalc,
};
@@ -406,18 +403,18 @@ static struct clk tc2_ck = {
static struct clk dma_ck = {
/* No-idle controlled by "tc_ck" */
.name = "dma_ck",
- .ops = &clkops_generic,
+ .ops = &clkops_null,
.parent = &tc_ck.clk,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
- CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
+ CLOCK_IN_OMAP310,
.recalc = &followparent_recalc,
};
static struct clk dma_lcdfree_ck = {
.name = "dma_lcdfree_ck",
- .ops = &clkops_generic,
+ .ops = &clkops_null,
.parent = &tc_ck.clk,
- .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
+ .flags = CLOCK_IN_OMAP16XX,
.recalc = &followparent_recalc,
};
@@ -451,17 +448,17 @@ static struct arm_idlect1_clk lb_ck = {
static struct clk rhea1_ck = {
.name = "rhea1_ck",
- .ops = &clkops_generic,
+ .ops = &clkops_null,
.parent = &tc_ck.clk,
- .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
+ .flags = CLOCK_IN_OMAP16XX,
.recalc = &followparent_recalc,
};
static struct clk rhea2_ck = {
.name = "rhea2_ck",
- .ops = &clkops_generic,
+ .ops = &clkops_null,
.parent = &tc_ck.clk,
- .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
+ .flags = CLOCK_IN_OMAP16XX,
.recalc = &followparent_recalc,
};
@@ -493,13 +490,12 @@ static struct arm_idlect1_clk lcd_ck_1510 = {
static struct clk uart1_1510 = {
.name = "uart1_ck",
- .ops = &clkops_generic,
+ .ops = &clkops_null,
/* Direct from ULPD, no real parent */
.parent = &armper_ck.clk,
.rate = 12000000,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
- ENABLE_REG_32BIT | ALWAYS_ENABLED |
- CLOCK_NO_IDLE_PARENT,
+ ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
.enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
.enable_bit = 29, /* Chooses between 12MHz and 48MHz */
.set_rate = &omap1_set_uart_rate,
@@ -523,13 +519,13 @@ static struct uart_clk uart1_16xx = {
static struct clk uart2_ck = {
.name = "uart2_ck",
- .ops = &clkops_generic,
+ .ops = &clkops_null,
/* Direct from ULPD, no real parent */
.parent = &armper_ck.clk,
.rate = 12000000,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
CLOCK_IN_OMAP310 | ENABLE_REG_32BIT |
- ALWAYS_ENABLED | CLOCK_NO_IDLE_PARENT,
+ CLOCK_NO_IDLE_PARENT,
.enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
.enable_bit = 30, /* Chooses between 12MHz and 48MHz */
.set_rate = &omap1_set_uart_rate,
@@ -538,13 +534,12 @@ static struct clk uart2_ck = {
static struct clk uart3_1510 = {
.name = "uart3_ck",
- .ops = &clkops_generic,
+ .ops = &clkops_null,
/* Direct from ULPD, no real parent */
.parent = &armper_ck.clk,
.rate = 12000000,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
- ENABLE_REG_32BIT | ALWAYS_ENABLED |
- CLOCK_NO_IDLE_PARENT,
+ ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
.enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
.enable_bit = 31, /* Chooses between 12MHz and 48MHz */
.set_rate = &omap1_set_uart_rate,
@@ -680,9 +675,9 @@ static struct clk mmc2_ck = {
static struct clk virtual_ck_mpu = {
.name = "mpu",
- .ops = &clkops_generic,
+ .ops = &clkops_null,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
- CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
+ CLOCK_IN_OMAP310,
.parent = &arm_ck, /* Is smarter alias for */
.recalc = &followparent_recalc,
.set_rate = &omap1_select_table_rate,
@@ -694,9 +689,9 @@ remains active during MPU idle whenever this is enabled */
static struct clk i2c_fck = {
.name = "i2c_fck",
.id = 1,
- .ops = &clkops_generic,
+ .ops = &clkops_null,
.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
- CLOCK_NO_IDLE_PARENT | ALWAYS_ENABLED,
+ CLOCK_NO_IDLE_PARENT,
.parent = &armxor_ck.clk,
.recalc = &followparent_recalc,
};
@@ -704,9 +699,8 @@ static struct clk i2c_fck = {
static struct clk i2c_ick = {
.name = "i2c_ick",
.id = 1,
- .ops = &clkops_generic,
- .flags = CLOCK_IN_OMAP16XX | CLOCK_NO_IDLE_PARENT |
- ALWAYS_ENABLED,
+ .ops = &clkops_null,
+ .flags = CLOCK_IN_OMAP16XX | CLOCK_NO_IDLE_PARENT,
.parent = &armper_ck.clk,
.recalc = &followparent_recalc,
};
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index d3213f565d5..fa99c0b71d3 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -271,7 +271,7 @@ int _omap2_clk_enable(struct clk *clk)
{
u32 regval32;
- if (clk->flags & (ALWAYS_ENABLED | PARENT_CONTROLS_CLOCK))
+ if (clk->flags & PARENT_CONTROLS_CLOCK)
return 0;
if (clk->ops && clk->ops->enable)
@@ -301,7 +301,7 @@ void _omap2_clk_disable(struct clk *clk)
{
u32 regval32;
- if (clk->flags & (ALWAYS_ENABLED | PARENT_CONTROLS_CLOCK))
+ if (clk->flags & PARENT_CONTROLS_CLOCK)
return;
if (clk->ops && clk->ops->disable) {
diff --git a/arch/arm/mach-omap2/clock24xx.h b/arch/arm/mach-omap2/clock24xx.h
index 2aa0b5e6560..d4869377307 100644
--- a/arch/arm/mach-omap2/clock24xx.h
+++ b/arch/arm/mach-omap2/clock24xx.h
@@ -619,9 +619,10 @@ static struct prcm_config rate_table[] = {
/* Base external input clocks */
static struct clk func_32k_ck = {
.name = "func_32k_ck",
+ .ops = &clkops_null,
.rate = 32000,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
- RATE_FIXED | ALWAYS_ENABLED | RATE_PROPAGATES,
+ RATE_FIXED | RATE_PROPAGATES,
.clkdm_name = "wkup_clkdm",
.recalc = &propagate_rate,
};
@@ -639,18 +640,20 @@ static struct clk osc_ck = { /* (*12, *13, 19.2, *26, 38.4)MHz */
/* Without modem likely 12MHz, with modem likely 13MHz */
static struct clk sys_ck = { /* (*12, *13, 19.2, 26, 38.4)MHz */
.name = "sys_ck", /* ~ ref_clk also */
+ .ops = &clkops_null,
.parent = &osc_ck,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
- ALWAYS_ENABLED | RATE_PROPAGATES,
+ RATE_PROPAGATES,
.clkdm_name = "wkup_clkdm",
.recalc = &omap2_sys_clk_recalc,
};
static struct clk alt_ck = { /* Typical 54M or 48M, may not exist */
.name = "alt_ck",
+ .ops = &clkops_null,
.rate = 54000000,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
- RATE_FIXED | ALWAYS_ENABLED | RATE_PROPAGATES,
+ RATE_FIXED | RATE_PROPAGATES,
.clkdm_name = "wkup_clkdm",
.recalc = &propagate_rate,
};
@@ -679,10 +682,11 @@ static struct dpll_data dpll_dd = {
*/
static struct clk dpll_ck = {
.name = "dpll_ck",
+ .ops = &clkops_null,
.parent = &sys_ck, /* Can be func_32k also */
.dpll_data = &dpll_dd,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
- RATE_PROPAGATES | ALWAYS_ENABLED,
+ RATE_PROPAGATES,
.clkdm_name = "wkup_clkdm",
.recalc = &omap2_dpllcore_recalc,
.set_rate = &omap2_reprogram_dpllcore,
@@ -751,9 +755,10 @@ static struct clk func_54m_ck = {
static struct clk core_ck = {
.name = "core_ck",
+ .ops = &clkops_null,
.parent = &dpll_ck, /* can also be 32k */
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
- ALWAYS_ENABLED | RATE_PROPAGATES,
+ RATE_PROPAGATES,
.clkdm_name = "wkup_clkdm",
.recalc = &followparent_recalc,
};
@@ -837,6 +842,7 @@ static struct clk func_12m_ck = {
/* Secure timer, only available in secure mode */
static struct clk wdt1_osc_ck = {
.name = "ck_wdt1_osc",
+ .ops = &clkops_null, /* RMK: missing? */
.parent = &osc_ck,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
.recalc = &followparent_recalc,
@@ -996,9 +1002,10 @@ static const struct clksel mpu_clksel[] = {
static struct clk mpu_ck = { /* Control cpu */
.name = "mpu_ck",
+ .ops = &clkops_null,
.parent = &core_ck,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
- ALWAYS_ENABLED | DELAYED_APP |
+ DELAYED_APP |
CONFIG_PARTICIPANT | RATE_PROPAGATES,
.clkdm_name = "mpu_clkdm",
.init = &omap2_init_clksel_parent,
@@ -1168,9 +1175,10 @@ static const struct clksel core_l3_clksel[] = {
static struct clk core_l3_ck = { /* Used for ick and fck, interconnect */
.name = "core_l3_ck",
+ .ops = &clkops_null,
.parent = &core_ck,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
- ALWAYS_ENABLED | DELAYED_APP |
+ DELAYED_APP |
CONFIG_PARTICIPANT | RATE_PROPAGATES,
.clkdm_name = "core_l3_clkdm",
.clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1),
@@ -1231,9 +1239,10 @@ static const struct clksel l4_clksel[] = {
static struct clk l4_ck = { /* used both as an ick and fck */
.name = "l4_ck",
+ .ops = &clkops_null,
.parent = &core_l3_ck,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
- ALWAYS_ENABLED | DELAYED_APP | RATE_PROPAGATES,
+ DELAYED_APP | RATE_PROPAGATES,
.clkdm_name = "core_l4_clkdm",
.clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1),
.clksel_mask = OMAP24XX_CLKSEL_L4_MASK,
@@ -2359,6 +2368,7 @@ static struct clk i2chs1_fck = {
static struct clk gpmc_fck = {
.name = "gpmc_fck",
+ .ops = &clkops_null, /* RMK: missing? */
.parent = &core_l3_ck,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
ENABLE_ON_INIT,
@@ -2368,6 +2378,7 @@ static struct clk gpmc_fck = {
static struct clk sdma_fck = {
.name = "sdma_fck",
+ .ops = &clkops_null, /* RMK: missing? */
.parent = &core_l3_ck,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
.clkdm_name = "core_l3_clkdm",
@@ -2376,6 +2387,7 @@ static struct clk sdma_fck = {
static struct clk sdma_ick = {
.name = "sdma_ick",
+ .ops = &clkops_null, /* RMK: missing? */
.parent = &l4_ck,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
.clkdm_name = "core_l3_clkdm",
@@ -2621,8 +2633,9 @@ static struct clk mmchsdb2_fck = {
*/
static struct clk virt_prcm_set = {
.name = "virt_prcm_set",
+ .ops = &clkops_null,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
- ALWAYS_ENABLED | DELAYED_APP,
+ DELAYED_APP,
.parent = &mpu_ck, /* Indexed by mpu speed, no parent */
.recalc = &omap2_table_mpu_recalc, /* sets are keyed on mpu rate */
.set_rate = &omap2_select_table_rate,
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index 8b188fb9bea..b56fd289762 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -55,66 +55,66 @@ static u32 omap3_dpll_autoidle_read(struct clk *clk);
/* According to timer32k.c, this is a 32768Hz clock, not a 32000Hz clock. */
static struct clk omap_32k_fck = {
.name = "omap_32k_fck",
+ .ops = &clkops_null,
.rate = 32768,
- .flags = CLOCK_IN_OMAP343X | RATE_FIXED | RATE_PROPAGATES |
- ALWAYS_ENABLED,
+ .flags = CLOCK_IN_OMAP343X | RATE_FIXED | RATE_PROPAGATES,
.recalc = &propagate_rate,
};
static struct clk secure_32k_fck = {
.name = "secure_32k_fck",
+ .ops = &clkops_null,
.rate = 32768,
- .flags = CLOCK_IN_OMAP343X | RATE_FIXED | RATE_PROPAGATES |
- ALWAYS_ENABLED,
+ .flags = CLOCK_IN_OMAP343X | RATE_FIXED | RATE_PROPAGATES,
.recalc = &propagate_rate,
};
/* Virtual source clocks for osc_sys_ck */
static struct clk virt_12m_ck = {
.name = "virt_12m_ck",
+ .ops = &clkops_null,
.rate = 12000000,
- .flags = CLOCK_IN_OMAP343X | RATE_FIXED | RATE_PROPAGATES |
- ALWAYS_ENABLED,
+ .flags = CLOCK_IN_OMAP343X | RATE_FIXED | RATE_PROPAGATES,
.recalc = &propagate_rate,
};
static struct clk virt_13m_ck = {
.name = "virt_13m_ck",
+ .ops = &clkops_null,
.rate = 13000000,
- .flags = CLOCK_IN_OMAP343X | RATE_FIXED | RATE_PROPAGATES |
- ALWAYS_ENABLED,
+ .flags = CLOCK_IN_OMAP343X | RATE_FIXED | RATE_PROPAGATES,
.recalc = &propagate_rate,
};
static struct clk virt_16_8m_ck = {
.name = "virt_16_8m_ck",
+ .ops = &clkops_null,
.rate = 16800000,
- .flags = CLOCK_IN_OMAP3430ES2 | RATE_FIXED | RATE_PROPAGATES |
- ALWAYS_ENABLED,
+ .flags = CLOCK_IN_OMAP3430ES2 | RATE_FIXED | RATE_PROPAGATES,
.recalc = &propagate_rate,
};
static struct clk virt_19_2m_ck = {
.name = "virt_19_2m_ck",
+ .ops = &clkops_null,
.rate = 19200000,
- .flags = CLOCK_IN_OMAP343X | RATE_FIXED | RATE_PROPAGATES |
- ALWAYS_ENABLED,
+ .flags = CLOCK_IN_OMAP343X | RATE_FIXED | RATE_PROPAGATES,
.recalc = &propagate_rate,
};
static struct clk virt_26m_ck = {
.name = "virt_26m_ck",
+ .ops = &clkops_null,
.rate = 26000000,
- .flags = CLOCK_IN_OMAP343X | RATE_FIXED | RATE_PROPAGATES |
- ALWAYS_ENABLED,
+ .flags = CLOCK_IN_OMAP343X | RATE_FIXED | RATE_PROPAGATES,
.recalc = &propagate_rate,
};
static struct clk virt_38_4m_ck = {
.name = "virt_38_4m_ck",
+ .ops = &clkops_null,
.rate = 38400000,
- .flags = CLOCK_IN_OMAP343X | RATE_FIXED | RATE_PROPAGATES |
- ALWAYS_ENABLED,
+ .flags = CLOCK_IN_OMAP343X | RATE_FIXED | RATE_PROPAGATES,
.recalc = &propagate_rate,
};
@@ -162,13 +162,13 @@ static const struct clksel osc_sys_clksel[] = {
/* 12, 13, 16.8, 19.2, 26, or 38.4 MHz */
static struct clk osc_sys_ck = {
.name = "osc_sys_ck",
+ .ops = &clkops_null,
.init = &omap2_init_clksel_parent,
.clksel_reg = OMAP3430_PRM_CLKSEL,
.clksel_mask = OMAP3430_SYS_CLKIN_SEL_MASK,
.clksel = osc_sys_clksel,
/* REVISIT: deal with autoextclkmode? */
- .flags = CLOCK_IN_OMAP343X | RATE_FIXED | RATE_PROPAGATES |
- ALWAYS_ENABLED,
+ .flags = CLOCK_IN_OMAP343X | RATE_FIXED | RATE_PROPAGATES,
.recalc = &omap2_clksel_recalc,
};
@@ -187,25 +187,28 @@ static const struct clksel sys_clksel[] = {
/* Feeds DPLLs - divided first by PRM_CLKSRC_CTRL.SYSCLKDIV? */
static struct clk sys_ck = {
.name = "sys_ck",
+ .ops = &clkops_null,
.parent = &osc_sys_ck,
.init = &omap2_init_clksel_parent,
.clksel_reg = OMAP3430_PRM_CLKSRC_CTRL,
.clksel_mask = OMAP_SYSCLKDIV_MASK,
.clksel = sys_clksel,
- .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED,
+ .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES,
.recalc = &omap2_clksel_recalc,
};
static struct clk sys_altclk = {
.name = "sys_altclk",
- .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED,
+ .ops = &clkops_null,
+ .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES,
.recalc = &propagate_rate,
};
/* Optional external clock input for some McBSPs */
static struct clk mcbsp_clks = {
.name = "mcbsp_clks",
- .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED,
+ .ops = &clkops_null,
+ .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES,
.recalc = &propagate_rate,
};
@@ -278,9 +281,10 @@ static struct dpll_data dpll1_dd = {
static struct clk dpll1_ck = {
.name = "dpll1_ck",
+ .ops = &clkops_null,
.parent = &sys_ck,
.dpll_data = &dpll1_dd,
- .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED,
+ .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES,
.round_rate = &omap2_dpll_round_rate,
.recalc = &omap3_dpll_recalc,
};
@@ -398,9 +402,10 @@ static struct dpll_data dpll3_dd = {
static struct clk dpll3_ck = {
.name = "dpll3_ck",
+ .ops = &clkops_null,
.parent = &sys_ck,
.dpll_data = &dpll3_dd,
- .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED,
+ .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES,
.round_rate = &omap2_dpll_round_rate,
.recalc = &omap3_dpll_recalc,
};
@@ -2266,9 +2271,10 @@ static struct clk gpt1_fck = {
static struct clk wkup_32k_fck = {
.name = "wkup_32k_fck",
+ .ops = &clkops_null,
.init = &omap2_init_clk_clkdm,
.parent = &omap_32k_fck,
- .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED,
+ .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES,
.clkdm_name = "wkup_clkdm",
.recalc = &followparent_recalc,
};
@@ -2295,8 +2301,9 @@ static struct clk wdt2_fck = {
static struct clk wkup_l4_ick = {
.name = "wkup_l4_ick",
+ .ops = &clkops_null,
.parent = &sys_ck,
- .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED,
+ .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES,
.clkdm_name = "wkup_clkdm",
.recalc = &followparent_recalc,
};
@@ -2514,9 +2521,10 @@ static struct clk gpt9_fck = {
static struct clk per_32k_alwon_fck = {
.name = "per_32k_alwon_fck",
+ .ops = &clkops_null,
.parent = &omap_32k_fck,
.clkdm_name = "per_clkdm",
- .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED,
+ .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES,
.recalc = &followparent_recalc,
};
@@ -2859,11 +2867,12 @@ static const struct clksel emu_src_clksel[] = {
*/
static struct clk emu_src_ck = {
.name = "emu_src_ck",
+ .ops = &clkops_null,
.init = &omap2_init_clksel_parent,
.clksel_reg = OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1),
.clksel_mask = OMAP3430_MUX_CTRL_MASK,
.clksel = emu_src_clksel,
- .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED,
+ .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES,
.clkdm_name = "emu_clkdm",
.recalc = &omap2_clksel_recalc,
};
@@ -2883,11 +2892,12 @@ static const struct clksel pclk_emu_clksel[] = {
static struct clk pclk_fck = {
.name = "pclk_fck",
+ .ops = &clkops_null,
.init = &omap2_init_clksel_parent,
.clksel_reg = OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1),
.clksel_mask = OMAP3430_CLKSEL_PCLK_MASK,
.clksel = pclk_emu_clksel,
- .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED,
+ .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES,
.clkdm_name = "emu_clkdm",
.recalc = &omap2_clksel_recalc,
};
@@ -2906,11 +2916,12 @@ static const struct clksel pclkx2_emu_clksel[] = {
static struct clk pclkx2_fck = {
.name = "pclkx2_fck",
+ .ops = &clkops_null,
.init = &omap2_init_clksel_parent,
.clksel_reg = OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1),
.clksel_mask = OMAP3430_CLKSEL_PCLKX2_MASK,
.clksel = pclkx2_emu_clksel,
- .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED,
+ .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES,
.clkdm_name = "emu_clkdm",
.recalc = &omap2_clksel_recalc,
};
@@ -2922,22 +2933,24 @@ static const struct clksel atclk_emu_clksel[] = {
static struct clk atclk_fck = {
.name = "atclk_fck",
+ .ops = &clkops_null,
.init = &omap2_init_clksel_parent,
.clksel_reg = OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1),
.clksel_mask = OMAP3430_CLKSEL_ATCLK_MASK,
.clksel = atclk_emu_clksel,
- .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED,
+ .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES,
.clkdm_name = "emu_clkdm",
.recalc = &omap2_clksel_recalc,
};
static struct clk traceclk_src_fck = {
.name = "traceclk_src_fck",
+ .ops = &clkops_null,
.init = &omap2_init_clksel_parent,
.clksel_reg = OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1),
.clksel_mask = OMAP3430_TRACE_MUX_CTRL_MASK,
.clksel = emu_src_clksel,
- .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED,
+ .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES,
.clkdm_name = "emu_clkdm",
.recalc = &omap2_clksel_recalc,
};
@@ -2956,11 +2969,12 @@ static const struct clksel traceclk_clksel[] = {
static struct clk traceclk_fck = {
.name = "traceclk_fck",
+ .ops = &clkops_null,
.init = &omap2_init_clksel_parent,
.clksel_reg = OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1),
.clksel_mask = OMAP3430_CLKSEL_TRACECLK_MASK,
.clksel = traceclk_clksel,
- .flags = CLOCK_IN_OMAP343X | ALWAYS_ENABLED,
+ .flags = CLOCK_IN_OMAP343X,
.clkdm_name = "emu_clkdm",
.recalc = &omap2_clksel_recalc,
};
@@ -2989,6 +3003,7 @@ static struct clk sr2_fck = {
static struct clk sr_l4_ick = {
.name = "sr_l4_ick",
+ .ops = &clkops_null, /* RMK: missing? */
.parent = &l4_ick,
.flags = CLOCK_IN_OMAP343X,
.clkdm_name = "core_l4_clkdm",
@@ -3000,15 +3015,17 @@ static struct clk sr_l4_ick = {
/* XXX This clock no longer exists in 3430 TRM rev F */
static struct clk gpt12_fck = {
.name = "gpt12_fck",
+ .ops = &clkops_null,
.parent = &secure_32k_fck,
- .flags = CLOCK_IN_OMAP343X | ALWAYS_ENABLED,
+ .flags = CLOCK_IN_OMAP343X,
.recalc = &followparent_recalc,
};
static struct clk wdt1_fck = {
.name = "wdt1_fck",
+ .ops = &clkops_null,
.parent = &secure_32k_fck,
- .flags = CLOCK_IN_OMAP343X | ALWAYS_ENABLED,
+ .flags = CLOCK_IN_OMAP343X,
.recalc = &followparent_recalc,
};
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index be6aab9c683..529c4a9f012 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -358,6 +358,23 @@ void clk_enable_init_clocks(void)
}
EXPORT_SYMBOL(clk_enable_init_clocks);
+/*
+ * Low level helpers
+ */
+static int clkll_enable_null(struct clk *clk)
+{
+ return 0;
+}
+
+static void clkll_disable_null(struct clk *clk)
+{
+}
+
+const struct clkops clkops_null = {
+ .enable = clkll_enable_null,
+ .disable = clkll_disable_null,
+};
+
#ifdef CONFIG_CPU_FREQ
void clk_init_cpufreq_table(struct cpufreq_frequency_table **table)
{
@@ -383,8 +400,10 @@ static int __init clk_disable_unused(void)
unsigned long flags;
list_for_each_entry(ck, &clocks, node) {
- if (ck->usecount > 0 || (ck->flags & ALWAYS_ENABLED) ||
- ck->enable_reg == 0)
+ if (ck->ops == &clkops_null)
+ continue;
+
+ if (ck->usecount > 0 || ck->enable_reg == 0)
continue;
spin_lock_irqsave(&clockfw_lock, flags);
diff --git a/arch/arm/plat-omap/include/mach/clock.h b/arch/arm/plat-omap/include/mach/clock.h
index 4fe5084e8cc..c1e484463ed 100644
--- a/arch/arm/plat-omap/include/mach/clock.h
+++ b/arch/arm/plat-omap/include/mach/clock.h
@@ -125,11 +125,13 @@ extern void clk_deny_idle(struct clk *clk);
extern int clk_get_usecount(struct clk *clk);
extern void clk_enable_init_clocks(void);
+extern const struct clkops clkops_null;
+
/* Clock flags */
#define RATE_CKCTL (1 << 0) /* Main fixed ratio clocks */
#define RATE_FIXED (1 << 1) /* Fixed clock rate */
#define RATE_PROPAGATES (1 << 2) /* Program children too */
-#define ALWAYS_ENABLED (1 << 4) /* Clock cannot be disabled */
+/* bits 3-4 are free */
#define ENABLE_REG_32BIT (1 << 5) /* Use 32-bit access */
#define VIRTUAL_IO_ADDRESS (1 << 6) /* Clock in virtual address */
#define CLOCK_IDLE_CONTROL (1 << 7)
--
cgit v1.2.3-70-g09d2
From c6af45085211db8720d6b94b3985ce7198d764e3 Mon Sep 17 00:00:00 2001
From: Russell King <rmk@dyn-67.arm.linux.org.uk>
Date: Thu, 13 Nov 2008 13:01:32 +0000
Subject: [ARM] omap: move clock propagation into core omap clock code
Move the clock propagation calls for set_parent and set_rate into
the core omap clock code, rather than having these calls scattered
throughout the OMAP1 and OMAP2 implementations.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
arch/arm/mach-omap1/clock.c | 3 ---
arch/arm/mach-omap2/clock.c | 6 ------
arch/arm/plat-omap/clock.c | 6 +++++-
3 files changed, 5 insertions(+), 10 deletions(-)
(limited to 'arch/arm/mach-omap1/clock.c')
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index ff408105ffb..ee1b9f20544 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -628,9 +628,6 @@ static int omap1_clk_set_rate(struct clk *clk, unsigned long rate)
ret = 0;
}
- if (unlikely(ret == 0 && (clk->flags & RATE_PROPAGATES)))
- propagate_rate(clk);
-
return ret;
}
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 76afb7b4482..7a1d56af9e4 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -684,9 +684,6 @@ int omap2_clk_set_rate(struct clk *clk, unsigned long rate)
if (clk->set_rate != NULL)
ret = clk->set_rate(clk, rate);
- if (unlikely(ret == 0 && (clk->flags & RATE_PROPAGATES)))
- propagate_rate(clk);
-
return ret;
}
@@ -774,9 +771,6 @@ int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent)
pr_debug("clock: set parent of %s to %s (new rate %ld)\n",
clk->name, clk->parent->name, clk->rate);
- if (unlikely(clk->flags & RATE_PROPAGATES))
- propagate_rate(clk);
-
return 0;
}
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index ae77e10719f..b7137c560db 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -182,6 +182,8 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
spin_lock_irqsave(&clockfw_lock, flags);
if (arch_clock->clk_set_rate)
ret = arch_clock->clk_set_rate(clk, rate);
+ if (ret == 0 && (clk->flags & RATE_PROPAGATES))
+ propagate_rate(clk);
spin_unlock_irqrestore(&clockfw_lock, flags);
return ret;
@@ -198,7 +200,9 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
spin_lock_irqsave(&clockfw_lock, flags);
if (arch_clock->clk_set_parent)
- ret = arch_clock->clk_set_parent(clk, parent);
+ ret = arch_clock->clk_set_parent(clk, parent);
+ if (ret == 0 && (clk->flags & RATE_PROPAGATES))
+ propagate_rate(clk);
spin_unlock_irqrestore(&clockfw_lock, flags);
return ret;
--
cgit v1.2.3-70-g09d2
From a9e882096317a088087b608d272da7029a6cc8c8 Mon Sep 17 00:00:00 2001
From: Russell King <rmk@dyn-67.arm.linux.org.uk>
Date: Thu, 13 Nov 2008 13:07:00 +0000
Subject: [ARM] omap: remove unnecessary calls to propagate_rate()
We've always called propagate_rate() in the parent function to
the .set_rate methods, so there's no point having the .set_rate
methods also call this heavy-weight function - it's mere
duplication of what's happening elsewhere.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
arch/arm/mach-omap1/clock.c | 9 +--------
1 file changed, 1 insertion(+), 8 deletions(-)
(limited to 'arch/arm/mach-omap1/clock.c')
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index ee1b9f20544..80a58e9dbba 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -308,7 +308,6 @@ static int omap1_select_table_rate(struct clk * clk, unsigned long rate)
omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val);
ck_dpll1.rate = ptr->pll_rate;
- propagate_rate(&ck_dpll1);
return 0;
}
@@ -333,9 +332,6 @@ static int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate)
ret = 0;
}
- if (unlikely(ret == 0 && (clk->flags & RATE_PROPAGATES)))
- propagate_rate(clk);
-
return ret;
}
@@ -442,8 +438,6 @@ static int omap1_set_sossi_rate(struct clk *clk, unsigned long rate)
omap_writel(l, MOD_CONF_CTRL_1);
clk->rate = p_rate / (div + 1);
- if (unlikely(clk->flags & RATE_PROPAGATES))
- propagate_rate(clk);
return 0;
}
@@ -787,7 +781,6 @@ int __init omap1_clk_init(void)
}
}
}
- propagate_rate(&ck_dpll1);
#else
/* Find the highest supported frequency and enable it */
if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) {
@@ -796,9 +789,9 @@ int __init omap1_clk_init(void)
omap_writew(0x2290, DPLL_CTL);
omap_writew(cpu_is_omap730() ? 0x3005 : 0x1005, ARM_CKCTL);
ck_dpll1.rate = 60000000;
- propagate_rate(&ck_dpll1);
}
#endif
+ propagate_rate(&ck_dpll1);
/* Cache rates for clocks connected to ck_ref (not dpll1) */
propagate_rate(&ck_ref);
printk(KERN_INFO "Clocking rate (xtal/DPLL1/MPU): "
--
cgit v1.2.3-70-g09d2
From 9a5fedac187f30116013a8420149d4ca11a44f0d Mon Sep 17 00:00:00 2001
From: Russell King <rmk@dyn-67.arm.linux.org.uk>
Date: Thu, 13 Nov 2008 13:44:15 +0000
Subject: [ARM] omap: move propagate_rate() calls into generic omap clock code
propagate_rate() is recursive, so it makes sense to minimise the
amount of stack which is used for each recursion. So, rather than
recursing back into it from the ->recalc functions if RATE_PROPAGATES
is set, do that test at the higher level.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
arch/arm/mach-omap1/clock.c | 6 ------
arch/arm/mach-omap2/clock.c | 6 ------
arch/arm/mach-omap2/clock24xx.c | 6 ++----
arch/arm/mach-omap2/clock24xx.h | 4 ----
arch/arm/mach-omap2/clock34xx.c | 5 -----
arch/arm/mach-omap2/clock34xx.h | 10 ----------
arch/arm/plat-omap/clock.c | 14 +++++++++-----
7 files changed, 11 insertions(+), 40 deletions(-)
(limited to 'arch/arm/mach-omap1/clock.c')
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 80a58e9dbba..be500014dcb 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -244,9 +244,6 @@ static void omap1_ckctl_recalc(struct clk * clk)
if (unlikely(clk->rate == clk->parent->rate / dsor))
return; /* No change, quick exit */
clk->rate = clk->parent->rate / dsor;
-
- if (unlikely(clk->flags & RATE_PROPAGATES))
- propagate_rate(clk);
}
static void omap1_ckctl_recalc_dsp_domain(struct clk * clk)
@@ -267,9 +264,6 @@ static void omap1_ckctl_recalc_dsp_domain(struct clk * clk)
if (unlikely(clk->rate == clk->parent->rate / dsor))
return; /* No change, quick exit */
clk->rate = clk->parent->rate / dsor;
-
- if (unlikely(clk->flags & RATE_PROPAGATES))
- propagate_rate(clk);
}
/* MPU virtual clock functions */
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 7a1d56af9e4..53fda9977d5 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -167,9 +167,6 @@ void omap2_fixed_divisor_recalc(struct clk *clk)
WARN_ON(!clk->fixed_div);
clk->rate = clk->parent->rate / clk->fixed_div;
-
- if (clk->flags & RATE_PROPAGATES)
- propagate_rate(clk);
}
/**
@@ -392,9 +389,6 @@ void omap2_clksel_recalc(struct clk *clk)
clk->rate = clk->parent->rate / div;
pr_debug("clock: new clock rate is %ld (div %d)\n", clk->rate, div);
-
- if (unlikely(clk->flags & RATE_PROPAGATES))
- propagate_rate(clk);
}
/**
diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c
index 866a618c4d8..3a0a1b8aa0b 100644
--- a/arch/arm/mach-omap2/clock24xx.c
+++ b/arch/arm/mach-omap2/clock24xx.c
@@ -199,8 +199,6 @@ long omap2_dpllcore_round_rate(unsigned long target_rate)
static void omap2_dpllcore_recalc(struct clk *clk)
{
clk->rate = omap2_get_dpll_rate_24xx(clk);
-
- propagate_rate(clk);
}
static int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate)
@@ -442,13 +440,11 @@ static u32 omap2_get_sysclkdiv(void)
static void omap2_osc_clk_recalc(struct clk *clk)
{
clk->rate = omap2_get_apll_clkin() * omap2_get_sysclkdiv();
- propagate_rate(clk);
}
static void omap2_sys_clk_recalc(struct clk *clk)
{
clk->rate = clk->parent->rate / omap2_get_sysclkdiv();
- propagate_rate(clk);
}
/*
@@ -502,7 +498,9 @@ int __init omap2_clk_init(void)
clk_init(&omap2_clk_functions);
omap2_osc_clk_recalc(&osc_ck);
+ propagate_rate(&osc_ck);
omap2_sys_clk_recalc(&sys_ck);
+ propagate_rate(&sys_ck);
for (clkp = onchip_24xx_clks;
clkp < onchip_24xx_clks + ARRAY_SIZE(onchip_24xx_clks);
diff --git a/arch/arm/mach-omap2/clock24xx.h b/arch/arm/mach-omap2/clock24xx.h
index 486fd80143e..e07dcba4b3e 100644
--- a/arch/arm/mach-omap2/clock24xx.h
+++ b/arch/arm/mach-omap2/clock24xx.h
@@ -624,7 +624,6 @@ static struct clk func_32k_ck = {
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
RATE_FIXED | RATE_PROPAGATES,
.clkdm_name = "wkup_clkdm",
- .recalc = &propagate_rate,
};
/* Typical 12/13MHz in standalone mode, will be 26Mhz in chassis mode */
@@ -655,7 +654,6 @@ static struct clk alt_ck = { /* Typical 54M or 48M, may not exist */
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
RATE_FIXED | RATE_PROPAGATES,
.clkdm_name = "wkup_clkdm",
- .recalc = &propagate_rate,
};
/*
@@ -702,7 +700,6 @@ static struct clk apll96_ck = {
.clkdm_name = "wkup_clkdm",
.enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
.enable_bit = OMAP24XX_EN_96M_PLL_SHIFT,
- .recalc = &propagate_rate,
};
static struct clk apll54_ck = {
@@ -715,7 +712,6 @@ static struct clk apll54_ck = {
.clkdm_name = "wkup_clkdm",
.enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
.enable_bit = OMAP24XX_EN_54M_PLL_SHIFT,
- .recalc = &propagate_rate,
};
/*
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 2f2d43db2dd..52698fb4fd0 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -57,8 +57,6 @@ static const struct clkops clkops_noncore_dpll_ops;
static void omap3_dpll_recalc(struct clk *clk)
{
clk->rate = omap2_get_dpll_rate(clk);
-
- propagate_rate(clk);
}
/* _omap3_dpll_write_clken - write clken_bits arg to a DPLL's enable bits */
@@ -388,9 +386,6 @@ static void omap3_clkoutx2_recalc(struct clk *clk)
clk->rate = clk->parent->rate;
else
clk->rate = clk->parent->rate * 2;
-
- if (clk->flags & RATE_PROPAGATES)
- propagate_rate(clk);
}
/* Common clock code */
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index 335ef88ada5..dcacec84f8c 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -58,7 +58,6 @@ static struct clk omap_32k_fck = {
.ops = &clkops_null,
.rate = 32768,
.flags = CLOCK_IN_OMAP343X | RATE_FIXED | RATE_PROPAGATES,
- .recalc = &propagate_rate,
};
static struct clk secure_32k_fck = {
@@ -66,7 +65,6 @@ static struct clk secure_32k_fck = {
.ops = &clkops_null,
.rate = 32768,
.flags = CLOCK_IN_OMAP343X | RATE_FIXED | RATE_PROPAGATES,
- .recalc = &propagate_rate,
};
/* Virtual source clocks for osc_sys_ck */
@@ -75,7 +73,6 @@ static struct clk virt_12m_ck = {
.ops = &clkops_null,
.rate = 12000000,
.flags = CLOCK_IN_OMAP343X | RATE_FIXED | RATE_PROPAGATES,
- .recalc = &propagate_rate,
};
static struct clk virt_13m_ck = {
@@ -83,7 +80,6 @@ static struct clk virt_13m_ck = {
.ops = &clkops_null,
.rate = 13000000,
.flags = CLOCK_IN_OMAP343X | RATE_FIXED | RATE_PROPAGATES,
- .recalc = &propagate_rate,
};
static struct clk virt_16_8m_ck = {
@@ -91,7 +87,6 @@ static struct clk virt_16_8m_ck = {
.ops = &clkops_null,
.rate = 16800000,
.flags = CLOCK_IN_OMAP3430ES2 | RATE_FIXED | RATE_PROPAGATES,
- .recalc = &propagate_rate,
};
static struct clk virt_19_2m_ck = {
@@ -99,7 +94,6 @@ static struct clk virt_19_2m_ck = {
.ops = &clkops_null,
.rate = 19200000,
.flags = CLOCK_IN_OMAP343X | RATE_FIXED | RATE_PROPAGATES,
- .recalc = &propagate_rate,
};
static struct clk virt_26m_ck = {
@@ -107,7 +101,6 @@ static struct clk virt_26m_ck = {
.ops = &clkops_null,
.rate = 26000000,
.flags = CLOCK_IN_OMAP343X | RATE_FIXED | RATE_PROPAGATES,
- .recalc = &propagate_rate,
};
static struct clk virt_38_4m_ck = {
@@ -115,7 +108,6 @@ static struct clk virt_38_4m_ck = {
.ops = &clkops_null,
.rate = 38400000,
.flags = CLOCK_IN_OMAP343X | RATE_FIXED | RATE_PROPAGATES,
- .recalc = &propagate_rate,
};
static const struct clksel_rate osc_sys_12m_rates[] = {
@@ -201,7 +193,6 @@ static struct clk sys_altclk = {
.name = "sys_altclk",
.ops = &clkops_null,
.flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES,
- .recalc = &propagate_rate,
};
/* Optional external clock input for some McBSPs */
@@ -209,7 +200,6 @@ static struct clk mcbsp_clks = {
.name = "mcbsp_clks",
.ops = &clkops_null,
.flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES,
- .recalc = &propagate_rate,
};
/* PRM EXTERNAL CLOCK OUTPUT */
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index b7137c560db..df58f5d9a5a 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -246,8 +246,6 @@ void followparent_recalc(struct clk *clk)
return;
clk->rate = clk->parent->rate;
- if (unlikely(clk->flags & RATE_PROPAGATES))
- propagate_rate(clk);
}
/* Propagate rate to children */
@@ -261,8 +259,10 @@ void propagate_rate(struct clk * tclk)
list_for_each_entry(clkp, &clocks, node) {
if (likely(clkp->parent != tclk))
continue;
- if (likely((u32)clkp->recalc))
+ if (clkp->recalc)
clkp->recalc(clkp);
+ if (clkp->flags & RATE_PROPAGATES)
+ propagate_rate(clkp);
}
}
@@ -278,8 +278,12 @@ void recalculate_root_clocks(void)
struct clk *clkp;
list_for_each_entry(clkp, &clocks, node) {
- if (unlikely(!clkp->parent) && likely((u32)clkp->recalc))
- clkp->recalc(clkp);
+ if (!clkp->parent) {
+ if (clkp->recalc)
+ clkp->recalc(clkp);
+ if (clkp->flags & RATE_PROPAGATES)
+ propagate_rate(clkp);
+ }
}
}
--
cgit v1.2.3-70-g09d2
From d5e6072b753041b56236b014ccfd72a0d3177e08 Mon Sep 17 00:00:00 2001
From: Russell King <rmk@dyn-67.arm.linux.org.uk>
Date: Sun, 8 Feb 2009 16:07:46 +0000
Subject: [ARM] omap: handle RATE_CKCTL via .set_rate/.round_rate methods
It makes no sense to have the CKCTL rate selection implemented as a flag
and a special exception in the top level set_rate/round_rate methods.
Provide CKCTL set_rate/round_rate methods, and use these for where ever
RATE_CKCTL is used and they're not already overridden. This allows us
to remove the RATE_CKCTL flag.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
arch/arm/mach-omap1/clock.c | 96 ++++++++++++++++-----------------
arch/arm/mach-omap1/clock.h | 38 ++++++++-----
arch/arm/plat-omap/include/mach/clock.h | 2 +-
3 files changed, 72 insertions(+), 64 deletions(-)
(limited to 'arch/arm/mach-omap1/clock.c')
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index be500014dcb..6b17da120e5 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -216,9 +216,6 @@ static int calc_dsor_exp(struct clk *clk, unsigned long rate)
struct clk * parent;
unsigned dsor_exp;
- if (unlikely(!(clk->flags & RATE_CKCTL)))
- return -EINVAL;
-
parent = clk->parent;
if (unlikely(parent == NULL))
return -EIO;
@@ -307,26 +304,52 @@ static int omap1_select_table_rate(struct clk * clk, unsigned long rate)
static int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate)
{
- int ret = -EINVAL;
- int dsor_exp;
- __u16 regval;
-
- if (clk->flags & RATE_CKCTL) {
- dsor_exp = calc_dsor_exp(clk, rate);
- if (dsor_exp > 3)
- dsor_exp = -EINVAL;
- if (dsor_exp < 0)
- return dsor_exp;
-
- regval = __raw_readw(DSP_CKCTL);
- regval &= ~(3 << clk->rate_offset);
- regval |= dsor_exp << clk->rate_offset;
- __raw_writew(regval, DSP_CKCTL);
- clk->rate = clk->parent->rate / (1 << dsor_exp);
- ret = 0;
- }
+ int dsor_exp;
+ u16 regval;
- return ret;
+ dsor_exp = calc_dsor_exp(clk, rate);
+ if (dsor_exp > 3)
+ dsor_exp = -EINVAL;
+ if (dsor_exp < 0)
+ return dsor_exp;
+
+ regval = __raw_readw(DSP_CKCTL);
+ regval &= ~(3 << clk->rate_offset);
+ regval |= dsor_exp << clk->rate_offset;
+ __raw_writew(regval, DSP_CKCTL);
+ clk->rate = clk->parent->rate / (1 << dsor_exp);
+
+ return 0;
+}
+
+static long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate)
+{
+ int dsor_exp = calc_dsor_exp(clk, rate);
+ if (dsor_exp < 0)
+ return dsor_exp;
+ if (dsor_exp > 3)
+ dsor_exp = 3;
+ return clk->parent->rate / (1 << dsor_exp);
+}
+
+static int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate)
+{
+ int dsor_exp;
+ u16 regval;
+
+ dsor_exp = calc_dsor_exp(clk, rate);
+ if (dsor_exp > 3)
+ dsor_exp = -EINVAL;
+ if (dsor_exp < 0)
+ return dsor_exp;
+
+ regval = omap_readw(ARM_CKCTL);
+ regval &= ~(3 << clk->rate_offset);
+ regval |= dsor_exp << clk->rate_offset;
+ regval = verify_ckctl_value(regval);
+ omap_writew(regval, ARM_CKCTL);
+ clk->rate = clk->parent->rate / (1 << dsor_exp);
+ return 0;
}
static long omap1_round_to_table_rate(struct clk * clk, unsigned long rate)
@@ -572,20 +595,9 @@ static const struct clkops clkops_generic = {
static long omap1_clk_round_rate(struct clk *clk, unsigned long rate)
{
- int dsor_exp;
-
if (clk->flags & RATE_FIXED)
return clk->rate;
- if (clk->flags & RATE_CKCTL) {
- dsor_exp = calc_dsor_exp(clk, rate);
- if (dsor_exp < 0)
- return dsor_exp;
- if (dsor_exp > 3)
- dsor_exp = 3;
- return clk->parent->rate / (1 << dsor_exp);
- }
-
if (clk->round_rate != NULL)
return clk->round_rate(clk, rate);
@@ -595,27 +607,9 @@ static long omap1_clk_round_rate(struct clk *clk, unsigned long rate)
static int omap1_clk_set_rate(struct clk *clk, unsigned long rate)
{
int ret = -EINVAL;
- int dsor_exp;
- __u16 regval;
if (clk->set_rate)
ret = clk->set_rate(clk, rate);
- else if (clk->flags & RATE_CKCTL) {
- dsor_exp = calc_dsor_exp(clk, rate);
- if (dsor_exp > 3)
- dsor_exp = -EINVAL;
- if (dsor_exp < 0)
- return dsor_exp;
-
- regval = omap_readw(ARM_CKCTL);
- regval &= ~(3 << clk->rate_offset);
- regval |= dsor_exp << clk->rate_offset;
- regval = verify_ckctl_value(regval);
- omap_writew(regval, ARM_CKCTL);
- clk->rate = clk->parent->rate / (1 << dsor_exp);
- ret = 0;
- }
-
return ret;
}
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h
index 8673832d829..aa7b3d604ee 100644
--- a/arch/arm/mach-omap1/clock.h
+++ b/arch/arm/mach-omap1/clock.h
@@ -27,6 +27,9 @@ static void omap1_init_ext_clk(struct clk * clk);
static int omap1_select_table_rate(struct clk * clk, unsigned long rate);
static long omap1_round_to_table_rate(struct clk * clk, unsigned long rate);
+static int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate);
+static long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate);
+
struct mpu_rate {
unsigned long rate;
unsigned long xtal;
@@ -189,9 +192,11 @@ static struct clk arm_ck = {
.ops = &clkops_null,
.parent = &ck_dpll1,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
- CLOCK_IN_OMAP310 | RATE_CKCTL | RATE_PROPAGATES,
+ CLOCK_IN_OMAP310 | RATE_PROPAGATES,
.rate_offset = CKCTL_ARMDIV_OFFSET,
.recalc = &omap1_ckctl_recalc,
+ .round_rate = omap1_clk_round_rate_ckctl_arm,
+ .set_rate = omap1_clk_set_rate_ckctl_arm,
};
static struct arm_idlect1_clk armper_ck = {
@@ -200,12 +205,13 @@ static struct arm_idlect1_clk armper_ck = {
.ops = &clkops_generic,
.parent = &ck_dpll1,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
- CLOCK_IN_OMAP310 | RATE_CKCTL |
- CLOCK_IDLE_CONTROL,
+ CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL,
.enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_PERCK,
.rate_offset = CKCTL_PERDIV_OFFSET,
.recalc = &omap1_ckctl_recalc,
+ .round_rate = omap1_clk_round_rate_ckctl_arm,
+ .set_rate = omap1_clk_set_rate_ckctl_arm,
},
.idlect_shift = 2,
};
@@ -279,22 +285,24 @@ static struct clk dsp_ck = {
.name = "dsp_ck",
.ops = &clkops_generic,
.parent = &ck_dpll1,
- .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
- RATE_CKCTL,
+ .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
.enable_reg = (void __iomem *)ARM_CKCTL,
.enable_bit = EN_DSPCK,
.rate_offset = CKCTL_DSPDIV_OFFSET,
.recalc = &omap1_ckctl_recalc,
+ .round_rate = omap1_clk_round_rate_ckctl_arm,
+ .set_rate = omap1_clk_set_rate_ckctl_arm,
};
static struct clk dspmmu_ck = {
.name = "dspmmu_ck",
.ops = &clkops_null,
.parent = &ck_dpll1,
- .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
- RATE_CKCTL,
+ .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
.rate_offset = CKCTL_DSPMMUDIV_OFFSET,
.recalc = &omap1_ckctl_recalc,
+ .round_rate = omap1_clk_round_rate_ckctl_arm,
+ .set_rate = omap1_clk_set_rate_ckctl_arm,
};
static struct clk dspper_ck = {
@@ -302,11 +310,12 @@ static struct clk dspper_ck = {
.ops = &clkops_dspck,
.parent = &ck_dpll1,
.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
- RATE_CKCTL | VIRTUAL_IO_ADDRESS,
+ VIRTUAL_IO_ADDRESS,
.enable_reg = DSP_IDLECT2,
.enable_bit = EN_PERCK,
.rate_offset = CKCTL_PERDIV_OFFSET,
.recalc = &omap1_ckctl_recalc_dsp_domain,
+ .round_rate = omap1_clk_round_rate_ckctl_arm,
.set_rate = &omap1_clk_set_rate_dsp_domain,
};
@@ -340,10 +349,11 @@ static struct arm_idlect1_clk tc_ck = {
.parent = &ck_dpll1,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
CLOCK_IN_OMAP730 | CLOCK_IN_OMAP310 |
- RATE_CKCTL | RATE_PROPAGATES |
- CLOCK_IDLE_CONTROL,
+ RATE_PROPAGATES | CLOCK_IDLE_CONTROL,
.rate_offset = CKCTL_TCDIV_OFFSET,
.recalc = &omap1_ckctl_recalc,
+ .round_rate = omap1_clk_round_rate_ckctl_arm,
+ .set_rate = omap1_clk_set_rate_ckctl_arm,
},
.idlect_shift = 6,
};
@@ -466,11 +476,13 @@ static struct clk lcd_ck_16xx = {
.name = "lcd_ck",
.ops = &clkops_generic,
.parent = &ck_dpll1,
- .flags = CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP730 | RATE_CKCTL,
+ .flags = CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP730,
.enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_LCDCK,
.rate_offset = CKCTL_LCDDIV_OFFSET,
.recalc = &omap1_ckctl_recalc,
+ .round_rate = omap1_clk_round_rate_ckctl_arm,
+ .set_rate = omap1_clk_set_rate_ckctl_arm,
};
static struct arm_idlect1_clk lcd_ck_1510 = {
@@ -479,11 +491,13 @@ static struct arm_idlect1_clk lcd_ck_1510 = {
.ops = &clkops_generic,
.parent = &ck_dpll1,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
- RATE_CKCTL | CLOCK_IDLE_CONTROL,
+ CLOCK_IDLE_CONTROL,
.enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_LCDCK,
.rate_offset = CKCTL_LCDDIV_OFFSET,
.recalc = &omap1_ckctl_recalc,
+ .round_rate = omap1_clk_round_rate_ckctl_arm,
+ .set_rate = omap1_clk_set_rate_ckctl_arm,
},
.idlect_shift = 3,
};
diff --git a/arch/arm/plat-omap/include/mach/clock.h b/arch/arm/plat-omap/include/mach/clock.h
index 06dd38a8a0c..5a7411e71f2 100644
--- a/arch/arm/plat-omap/include/mach/clock.h
+++ b/arch/arm/plat-omap/include/mach/clock.h
@@ -124,7 +124,7 @@ extern void clk_enable_init_clocks(void);
extern const struct clkops clkops_null;
/* Clock flags */
-#define RATE_CKCTL (1 << 0) /* Main fixed ratio clocks */
+/* bit 0 is free */
#define RATE_FIXED (1 << 1) /* Fixed clock rate */
#define RATE_PROPAGATES (1 << 2) /* Program children too */
/* bits 3-4 are free */
--
cgit v1.2.3-70-g09d2
From d7e8f1f9d655af2c7ea90738bf567aa6990159b3 Mon Sep 17 00:00:00 2001
From: Russell King <rmk@dyn-67.arm.linux.org.uk>
Date: Sun, 18 Jan 2009 23:03:15 +0000
Subject: [ARM] omap: convert OMAP1 to use clkdev
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
arch/arm/mach-omap1/clock.c | 117 +++++++++++++++++-----
arch/arm/mach-omap1/clock.h | 164 ++++++-------------------------
arch/arm/plat-omap/Kconfig | 1 +
arch/arm/plat-omap/clock.c | 4 +
arch/arm/plat-omap/include/mach/clkdev.h | 13 +++
arch/arm/plat-omap/include/mach/clock.h | 6 +-
6 files changed, 145 insertions(+), 160 deletions(-)
create mode 100644 arch/arm/plat-omap/include/mach/clkdev.h
(limited to 'arch/arm/mach-omap1/clock.c')
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 6b17da120e5..829b9b845b8 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -20,6 +20,7 @@
#include <linux/io.h>
#include <asm/mach-types.h>
+#include <asm/clkdev.h>
#include <mach/cpu.h>
#include <mach/usb.h>
@@ -32,6 +33,83 @@ static const struct clkops clkops_dspck;
#include "clock.h"
+struct omap_clk {
+ u32 cpu;
+ struct clk_lookup lk;
+};
+
+#define CLK(dev, con, ck, cp) \
+ { \
+ .cpu = cp, \
+ .lk = { \
+ .dev_id = dev, \
+ .con_id = con, \
+ .clk = ck, \
+ }, \
+ }
+
+#define CK_310 (1 << 0)
+#define CK_730 (1 << 1)
+#define CK_1510 (1 << 2)
+#define CK_16XX (1 << 3)
+
+static struct omap_clk omap_clks[] = {
+ /* non-ULPD clocks */
+ CLK(NULL, "ck_ref", &ck_ref, CK_16XX | CK_1510 | CK_310),
+ CLK(NULL, "ck_dpll1", &ck_dpll1, CK_16XX | CK_1510 | CK_310),
+ /* CK_GEN1 clocks */
+ CLK(NULL, "ck_dpll1out", &ck_dpll1out.clk, CK_16XX),
+ CLK(NULL, "ck_sossi", &sossi_ck, CK_16XX),
+ CLK(NULL, "arm_ck", &arm_ck, CK_16XX | CK_1510 | CK_310),
+ CLK(NULL, "armper_ck", &armper_ck.clk, CK_16XX | CK_1510 | CK_310),
+ CLK(NULL, "arm_gpio_ck", &arm_gpio_ck, CK_1510 | CK_310),
+ CLK(NULL, "armxor_ck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310),
+ CLK(NULL, "armtim_ck", &armtim_ck.clk, CK_16XX | CK_1510 | CK_310),
+ CLK(NULL, "armwdt_ck", &armwdt_ck.clk, CK_16XX | CK_1510 | CK_310),
+ CLK(NULL, "arminth_ck", &arminth_ck1510, CK_1510 | CK_310),
+ CLK(NULL, "arminth_ck", &arminth_ck16xx, CK_16XX),
+ /* CK_GEN2 clocks */
+ CLK(NULL, "dsp_ck", &dsp_ck, CK_16XX | CK_1510 | CK_310),
+ CLK(NULL, "dspmmu_ck", &dspmmu_ck, CK_16XX | CK_1510 | CK_310),
+ CLK(NULL, "dspper_ck", &dspper_ck, CK_16XX | CK_1510 | CK_310),
+ CLK(NULL, "dspxor_ck", &dspxor_ck, CK_16XX | CK_1510 | CK_310),
+ CLK(NULL, "dsptim_ck", &dsptim_ck, CK_16XX | CK_1510 | CK_310),
+ /* CK_GEN3 clocks */
+ CLK(NULL, "tc_ck", &tc_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_730),
+ CLK(NULL, "tipb_ck", &tipb_ck, CK_1510 | CK_310),
+ CLK(NULL, "l3_ocpi_ck", &l3_ocpi_ck, CK_16XX),
+ CLK(NULL, "tc1_ck", &tc1_ck, CK_16XX),
+ CLK(NULL, "tc2_ck", &tc2_ck, CK_16XX),
+ CLK(NULL, "dma_ck", &dma_ck, CK_16XX | CK_1510 | CK_310),
+ CLK(NULL, "dma_lcdfree_ck", &dma_lcdfree_ck, CK_16XX),
+ CLK(NULL, "api_ck", &api_ck.clk, CK_16XX | CK_1510 | CK_310),
+ CLK(NULL, "lb_ck", &lb_ck.clk, CK_1510 | CK_310),
+ CLK(NULL, "rhea1_ck", &rhea1_ck, CK_16XX),
+ CLK(NULL, "rhea2_ck", &rhea2_ck, CK_16XX),
+ CLK(NULL, "lcd_ck", &lcd_ck_16xx, CK_16XX | CK_730),
+ CLK(NULL, "lcd_ck", &lcd_ck_1510.clk, CK_1510 | CK_310),
+ /* ULPD clocks */
+ CLK(NULL, "uart1_ck", &uart1_1510, CK_1510 | CK_310),
+ CLK(NULL, "uart1_ck", &uart1_16xx.clk, CK_16XX),
+ CLK(NULL, "uart2_ck", &uart2_ck, CK_16XX | CK_1510 | CK_310),
+ CLK(NULL, "uart3_ck", &uart3_1510, CK_1510 | CK_310),
+ CLK(NULL, "uart3_ck", &uart3_16xx.clk, CK_16XX),
+ CLK(NULL, "usb_clko", &usb_clko, CK_16XX | CK_1510 | CK_310),
+ CLK(NULL, "usb_hhc_ck", &usb_hhc_ck1510, CK_1510 | CK_310),
+ CLK(NULL, "usb_hhc_ck", &usb_hhc_ck16xx, CK_16XX),
+ CLK(NULL, "usb_dc_ck", &usb_dc_ck, CK_16XX),
+ CLK(NULL, "mclk", &mclk_1510, CK_1510 | CK_310),
+ CLK(NULL, "mclk", &mclk_16xx, CK_16XX),
+ CLK(NULL, "bclk", &bclk_1510, CK_1510 | CK_310),
+ CLK(NULL, "bclk", &bclk_16xx, CK_16XX),
+ CLK("mmci-omap.0", "mmc_ck", &mmc1_ck, CK_16XX | CK_1510 | CK_310),
+ CLK("mmci-omap.1", "mmc_ck", &mmc2_ck, CK_16XX),
+ /* Virtual clocks */
+ CLK(NULL, "mpu", &virtual_ck_mpu, CK_16XX | CK_1510 | CK_310),
+ CLK("i2c_omap.1", "i2c_fck", &i2c_fck, CK_16XX | CK_1510 | CK_310),
+ CLK("i2c_omap.1", "i2c_ick", &i2c_ick, CK_16XX),
+};
+
static int omap1_clk_enable_generic(struct clk * clk);
static int omap1_clk_enable(struct clk *clk);
static void omap1_clk_disable_generic(struct clk * clk);
@@ -677,10 +755,10 @@ static struct clk_functions omap1_clk_functions = {
int __init omap1_clk_init(void)
{
- struct clk ** clkp;
+ struct omap_clk *c;
const struct omap_clock_config *info;
int crystal_type = 0; /* Default 12 MHz */
- u32 reg;
+ u32 reg, cpu_mask;
#ifdef CONFIG_DEBUG_LL
/* Resets some clocks that may be left on from bootloader,
@@ -700,27 +778,21 @@ int __init omap1_clk_init(void)
/* By default all idlect1 clocks are allowed to idle */
arm_idlect1_mask = ~0;
- for (clkp = onchip_clks; clkp < onchip_clks+ARRAY_SIZE(onchip_clks); clkp++) {
- if (((*clkp)->flags &CLOCK_IN_OMAP1510) && cpu_is_omap1510()) {
- clk_register(*clkp);
- continue;
- }
-
- if (((*clkp)->flags &CLOCK_IN_OMAP16XX) && cpu_is_omap16xx()) {
- clk_register(*clkp);
- continue;
- }
-
- if (((*clkp)->flags &CLOCK_IN_OMAP730) && cpu_is_omap730()) {
- clk_register(*clkp);
- continue;
- }
-
- if (((*clkp)->flags &CLOCK_IN_OMAP310) && cpu_is_omap310()) {
- clk_register(*clkp);
- continue;
+ cpu_mask = 0;
+ if (cpu_is_omap16xx())
+ cpu_mask |= CK_16XX;
+ if (cpu_is_omap1510())
+ cpu_mask |= CK_1510;
+ if (cpu_is_omap730())
+ cpu_mask |= CK_730;
+ if (cpu_is_omap310())
+ cpu_mask |= CK_310;
+
+ for (c = omap_clks; c < omap_clks + ARRAY_SIZE(omap_clks); c++)
+ if (c->cpu & cpu_mask) {
+ clkdev_add(&c->lk);
+ clk_register(c->lk.clk);
}
- }
info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config);
if (info != NULL) {
@@ -831,4 +903,3 @@ int __init omap1_clk_init(void)
return 0;
}
-
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h
index aa7b3d604ee..ed343af5f12 100644
--- a/arch/arm/mach-omap1/clock.h
+++ b/arch/arm/mach-omap1/clock.h
@@ -149,16 +149,13 @@ static struct clk ck_ref = {
.name = "ck_ref",
.ops = &clkops_null,
.rate = 12000000,
- .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
- CLOCK_IN_OMAP310,
};
static struct clk ck_dpll1 = {
.name = "ck_dpll1",
.ops = &clkops_null,
.parent = &ck_ref,
- .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
- CLOCK_IN_OMAP310 | RATE_PROPAGATES,
+ .flags = RATE_PROPAGATES,
};
static struct arm_idlect1_clk ck_dpll1out = {
@@ -166,7 +163,7 @@ static struct arm_idlect1_clk ck_dpll1out = {
.name = "ck_dpll1out",
.ops = &clkops_generic,
.parent = &ck_dpll1,
- .flags = CLOCK_IN_OMAP16XX | CLOCK_IDLE_CONTROL |
+ .flags = CLOCK_IDLE_CONTROL |
ENABLE_REG_32BIT | RATE_PROPAGATES,
.enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_CKOUT_ARM,
@@ -179,8 +176,7 @@ static struct clk sossi_ck = {
.name = "ck_sossi",
.ops = &clkops_generic,
.parent = &ck_dpll1out.clk,
- .flags = CLOCK_IN_OMAP16XX | CLOCK_NO_IDLE_PARENT |
- ENABLE_REG_32BIT,
+ .flags = CLOCK_NO_IDLE_PARENT | ENABLE_REG_32BIT,
.enable_reg = (void __iomem *)MOD_CONF_CTRL_1,
.enable_bit = 16,
.recalc = &omap1_sossi_recalc,
@@ -191,8 +187,7 @@ static struct clk arm_ck = {
.name = "arm_ck",
.ops = &clkops_null,
.parent = &ck_dpll1,
- .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
- CLOCK_IN_OMAP310 | RATE_PROPAGATES,
+ .flags = RATE_PROPAGATES,
.rate_offset = CKCTL_ARMDIV_OFFSET,
.recalc = &omap1_ckctl_recalc,
.round_rate = omap1_clk_round_rate_ckctl_arm,
@@ -204,8 +199,7 @@ static struct arm_idlect1_clk armper_ck = {
.name = "armper_ck",
.ops = &clkops_generic,
.parent = &ck_dpll1,
- .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
- CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL,
+ .flags = CLOCK_IDLE_CONTROL,
.enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_PERCK,
.rate_offset = CKCTL_PERDIV_OFFSET,
@@ -220,7 +214,6 @@ static struct clk arm_gpio_ck = {
.name = "arm_gpio_ck",
.ops = &clkops_generic,
.parent = &ck_dpll1,
- .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
.enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_GPIOCK,
.recalc = &followparent_recalc,
@@ -231,8 +224,7 @@ static struct arm_idlect1_clk armxor_ck = {
.name = "armxor_ck",
.ops = &clkops_generic,
.parent = &ck_ref,
- .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
- CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL,
+ .flags = CLOCK_IDLE_CONTROL,
.enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_XORPCK,
.recalc = &followparent_recalc,
@@ -245,8 +237,7 @@ static struct arm_idlect1_clk armtim_ck = {
.name = "armtim_ck",
.ops = &clkops_generic,
.parent = &ck_ref,
- .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
- CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL,
+ .flags = CLOCK_IDLE_CONTROL,
.enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_TIMCK,
.recalc = &followparent_recalc,
@@ -259,8 +250,7 @@ static struct arm_idlect1_clk armwdt_ck = {
.name = "armwdt_ck",
.ops = &clkops_generic,
.parent = &ck_ref,
- .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
- CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL,
+ .flags = CLOCK_IDLE_CONTROL,
.enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_WDTCK,
.recalc = &omap1_watchdog_recalc,
@@ -272,7 +262,6 @@ static struct clk arminth_ck16xx = {
.name = "arminth_ck",
.ops = &clkops_null,
.parent = &arm_ck,
- .flags = CLOCK_IN_OMAP16XX,
.recalc = &followparent_recalc,
/* Note: On 16xx the frequency can be divided by 2 by programming
* ARM_CKCTL:ARM_INTHCK_SEL(14) to 1
@@ -285,7 +274,6 @@ static struct clk dsp_ck = {
.name = "dsp_ck",
.ops = &clkops_generic,
.parent = &ck_dpll1,
- .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
.enable_reg = (void __iomem *)ARM_CKCTL,
.enable_bit = EN_DSPCK,
.rate_offset = CKCTL_DSPDIV_OFFSET,
@@ -298,7 +286,6 @@ static struct clk dspmmu_ck = {
.name = "dspmmu_ck",
.ops = &clkops_null,
.parent = &ck_dpll1,
- .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
.rate_offset = CKCTL_DSPMMUDIV_OFFSET,
.recalc = &omap1_ckctl_recalc,
.round_rate = omap1_clk_round_rate_ckctl_arm,
@@ -309,8 +296,7 @@ static struct clk dspper_ck = {
.name = "dspper_ck",
.ops = &clkops_dspck,
.parent = &ck_dpll1,
- .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
- VIRTUAL_IO_ADDRESS,
+ .flags = VIRTUAL_IO_ADDRESS,
.enable_reg = DSP_IDLECT2,
.enable_bit = EN_PERCK,
.rate_offset = CKCTL_PERDIV_OFFSET,
@@ -323,8 +309,7 @@ static struct clk dspxor_ck = {
.name = "dspxor_ck",
.ops = &clkops_dspck,
.parent = &ck_ref,
- .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
- VIRTUAL_IO_ADDRESS,
+ .flags = VIRTUAL_IO_ADDRESS,
.enable_reg = DSP_IDLECT2,
.enable_bit = EN_XORPCK,
.recalc = &followparent_recalc,
@@ -334,8 +319,7 @@ static struct clk dsptim_ck = {
.name = "dsptim_ck",
.ops = &clkops_dspck,
.parent = &ck_ref,
- .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
- VIRTUAL_IO_ADDRESS,
+ .flags = VIRTUAL_IO_ADDRESS,
.enable_reg = DSP_IDLECT2,
.enable_bit = EN_DSPTIMCK,
.recalc = &followparent_recalc,
@@ -347,9 +331,7 @@ static struct arm_idlect1_clk tc_ck = {
.name = "tc_ck",
.ops = &clkops_null,
.parent = &ck_dpll1,
- .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
- CLOCK_IN_OMAP730 | CLOCK_IN_OMAP310 |
- RATE_PROPAGATES | CLOCK_IDLE_CONTROL,
+ .flags = RATE_PROPAGATES | CLOCK_IDLE_CONTROL,
.rate_offset = CKCTL_TCDIV_OFFSET,
.recalc = &omap1_ckctl_recalc,
.round_rate = omap1_clk_round_rate_ckctl_arm,
@@ -362,7 +344,6 @@ static struct clk arminth_ck1510 = {
.name = "arminth_ck",
.ops = &clkops_null,
.parent = &tc_ck.clk,
- .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
.recalc = &followparent_recalc,
/* Note: On 1510 the frequency follows TC_CK
*
@@ -375,7 +356,6 @@ static struct clk tipb_ck = {
.name = "tipb_ck",
.ops = &clkops_null,
.parent = &tc_ck.clk,
- .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
.recalc = &followparent_recalc,
};
@@ -384,7 +364,6 @@ static struct clk l3_ocpi_ck = {
.name = "l3_ocpi_ck",
.ops = &clkops_generic,
.parent = &tc_ck.clk,
- .flags = CLOCK_IN_OMAP16XX,
.enable_reg = (void __iomem *)ARM_IDLECT3,
.enable_bit = EN_OCPI_CK,
.recalc = &followparent_recalc,
@@ -394,7 +373,6 @@ static struct clk tc1_ck = {
.name = "tc1_ck",
.ops = &clkops_generic,
.parent = &tc_ck.clk,
- .flags = CLOCK_IN_OMAP16XX,
.enable_reg = (void __iomem *)ARM_IDLECT3,
.enable_bit = EN_TC1_CK,
.recalc = &followparent_recalc,
@@ -404,7 +382,6 @@ static struct clk tc2_ck = {
.name = "tc2_ck",
.ops = &clkops_generic,
.parent = &tc_ck.clk,
- .flags = CLOCK_IN_OMAP16XX,
.enable_reg = (void __iomem *)ARM_IDLECT3,
.enable_bit = EN_TC2_CK,
.recalc = &followparent_recalc,
@@ -415,8 +392,6 @@ static struct clk dma_ck = {
.name = "dma_ck",
.ops = &clkops_null,
.parent = &tc_ck.clk,
- .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
- CLOCK_IN_OMAP310,
.recalc = &followparent_recalc,
};
@@ -424,7 +399,6 @@ static struct clk dma_lcdfree_ck = {
.name = "dma_lcdfree_ck",
.ops = &clkops_null,
.parent = &tc_ck.clk,
- .flags = CLOCK_IN_OMAP16XX,
.recalc = &followparent_recalc,
};
@@ -433,8 +407,7 @@ static struct arm_idlect1_clk api_ck = {
.name = "api_ck",
.ops = &clkops_generic,
.parent = &tc_ck.clk,
- .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
- CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL,
+ .flags = CLOCK_IDLE_CONTROL,
.enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_APICK,
.recalc = &followparent_recalc,
@@ -447,8 +420,7 @@ static struct arm_idlect1_clk lb_ck = {
.name = "lb_ck",
.ops = &clkops_generic,
.parent = &tc_ck.clk,
- .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
- CLOCK_IDLE_CONTROL,
+ .flags = CLOCK_IDLE_CONTROL,
.enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_LBCK,
.recalc = &followparent_recalc,
@@ -460,7 +432,6 @@ static struct clk rhea1_ck = {
.name = "rhea1_ck",
.ops = &clkops_null,
.parent = &tc_ck.clk,
- .flags = CLOCK_IN_OMAP16XX,
.recalc = &followparent_recalc,
};
@@ -468,7 +439,6 @@ static struct clk rhea2_ck = {
.name = "rhea2_ck",
.ops = &clkops_null,
.parent = &tc_ck.clk,
- .flags = CLOCK_IN_OMAP16XX,
.recalc = &followparent_recalc,
};
@@ -476,7 +446,6 @@ static struct clk lcd_ck_16xx = {
.name = "lcd_ck",
.ops = &clkops_generic,
.parent = &ck_dpll1,
- .flags = CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP730,
.enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_LCDCK,
.rate_offset = CKCTL_LCDDIV_OFFSET,
@@ -490,8 +459,7 @@ static struct arm_idlect1_clk lcd_ck_1510 = {
.name = "lcd_ck",
.ops = &clkops_generic,
.parent = &ck_dpll1,
- .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
- CLOCK_IDLE_CONTROL,
+ .flags = CLOCK_IDLE_CONTROL,
.enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_LCDCK,
.rate_offset = CKCTL_LCDDIV_OFFSET,
@@ -508,8 +476,7 @@ static struct clk uart1_1510 = {
/* Direct from ULPD, no real parent */
.parent = &armper_ck.clk,
.rate = 12000000,
- .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
- ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
+ .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
.enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
.enable_bit = 29, /* Chooses between 12MHz and 48MHz */
.set_rate = &omap1_set_uart_rate,
@@ -523,8 +490,8 @@ static struct uart_clk uart1_16xx = {
/* Direct from ULPD, no real parent */
.parent = &armper_ck.clk,
.rate = 48000000,
- .flags = CLOCK_IN_OMAP16XX | RATE_FIXED |
- ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
+ .flags = RATE_FIXED | ENABLE_REG_32BIT |
+ CLOCK_NO_IDLE_PARENT,
.enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
.enable_bit = 29,
},
@@ -537,9 +504,7 @@ static struct clk uart2_ck = {
/* Direct from ULPD, no real parent */
.parent = &armper_ck.clk,
.rate = 12000000,
- .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
- CLOCK_IN_OMAP310 | ENABLE_REG_32BIT |
- CLOCK_NO_IDLE_PARENT,
+ .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
.enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
.enable_bit = 30, /* Chooses between 12MHz and 48MHz */
.set_rate = &omap1_set_uart_rate,
@@ -552,8 +517,7 @@ static struct clk uart3_1510 = {
/* Direct from ULPD, no real parent */
.parent = &armper_ck.clk,
.rate = 12000000,
- .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
- ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
+ .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
.enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
.enable_bit = 31, /* Chooses between 12MHz and 48MHz */
.set_rate = &omap1_set_uart_rate,
@@ -567,8 +531,8 @@ static struct uart_clk uart3_16xx = {
/* Direct from ULPD, no real parent */
.parent = &armper_ck.clk,
.rate = 48000000,
- .flags = CLOCK_IN_OMAP16XX | RATE_FIXED |
- ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
+ .flags = RATE_FIXED | ENABLE_REG_32BIT |
+ CLOCK_NO_IDLE_PARENT,
.enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
.enable_bit = 31,
},
@@ -580,8 +544,7 @@ static struct clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */
.ops = &clkops_generic,
/* Direct from ULPD, no parent */
.rate = 6000000,
- .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
- CLOCK_IN_OMAP310 | RATE_FIXED | ENABLE_REG_32BIT,
+ .flags = RATE_FIXED | ENABLE_REG_32BIT,
.enable_reg = (void __iomem *)ULPD_CLOCK_CTRL,
.enable_bit = USB_MCLK_EN_BIT,
};
@@ -591,8 +554,7 @@ static struct clk usb_hhc_ck1510 = {
.ops = &clkops_generic,
/* Direct from ULPD, no parent */
.rate = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */
- .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
- RATE_FIXED | ENABLE_REG_32BIT,
+ .flags = RATE_FIXED | ENABLE_REG_32BIT,
.enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
.enable_bit = USB_HOST_HHC_UHOST_EN,
};
@@ -603,8 +565,7 @@ static struct clk usb_hhc_ck16xx = {
/* Direct from ULPD, no parent */
.rate = 48000000,
/* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */
- .flags = CLOCK_IN_OMAP16XX |
- RATE_FIXED | ENABLE_REG_32BIT,
+ .flags = RATE_FIXED | ENABLE_REG_32BIT,
.enable_reg = (void __iomem *)OTG_BASE + 0x08 /* OTG_SYSCON_2 */,
.enable_bit = 8 /* UHOST_EN */,
};
@@ -614,7 +575,7 @@ static struct clk usb_dc_ck = {
.ops = &clkops_generic,
/* Direct from ULPD, no parent */
.rate = 48000000,
- .flags = CLOCK_IN_OMAP16XX | RATE_FIXED,
+ .flags = RATE_FIXED,
.enable_reg = (void __iomem *)SOFT_REQ_REG,
.enable_bit = 4,
};
@@ -624,7 +585,7 @@ static struct clk mclk_1510 = {
.ops = &clkops_generic,
/* Direct from ULPD, no parent. May be enabled by ext hardware. */
.rate = 12000000,
- .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | RATE_FIXED,
+ .flags = RATE_FIXED,
.enable_reg = (void __iomem *)SOFT_REQ_REG,
.enable_bit = 6,
};
@@ -633,7 +594,6 @@ static struct clk mclk_16xx = {
.name = "mclk",
.ops = &clkops_generic,
/* Direct from ULPD, no parent. May be enabled by ext hardware. */
- .flags = CLOCK_IN_OMAP16XX,
.enable_reg = (void __iomem *)COM_CLK_DIV_CTRL_SEL,
.enable_bit = COM_ULPD_PLL_CLK_REQ,
.set_rate = &omap1_set_ext_clk_rate,
@@ -646,14 +606,13 @@ static struct clk bclk_1510 = {
.ops = &clkops_generic,
/* Direct from ULPD, no parent. May be enabled by ext hardware. */
.rate = 12000000,
- .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | RATE_FIXED,
+ .flags = RATE_FIXED,
};
static struct clk bclk_16xx = {
.name = "bclk",
.ops = &clkops_generic,
/* Direct from ULPD, no parent. May be enabled by ext hardware. */
- .flags = CLOCK_IN_OMAP16XX,
.enable_reg = (void __iomem *)SWD_CLK_DIV_CTRL_SEL,
.enable_bit = SWD_ULPD_PLL_CLK_REQ,
.set_rate = &omap1_set_ext_clk_rate,
@@ -667,9 +626,7 @@ static struct clk mmc1_ck = {
/* Functional clock is direct from ULPD, interface clock is ARMPER */
.parent = &armper_ck.clk,
.rate = 48000000,
- .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
- CLOCK_IN_OMAP310 | RATE_FIXED | ENABLE_REG_32BIT |
- CLOCK_NO_IDLE_PARENT,
+ .flags = RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
.enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
.enable_bit = 23,
};
@@ -681,8 +638,7 @@ static struct clk mmc2_ck = {
/* Functional clock is direct from ULPD, interface clock is ARMPER */
.parent = &armper_ck.clk,
.rate = 48000000,
- .flags = CLOCK_IN_OMAP16XX |
- RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
+ .flags = RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
.enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
.enable_bit = 20,
};
@@ -690,8 +646,6 @@ static struct clk mmc2_ck = {
static struct clk virtual_ck_mpu = {
.name = "mpu",
.ops = &clkops_null,
- .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
- CLOCK_IN_OMAP310,
.parent = &arm_ck, /* Is smarter alias for */
.recalc = &followparent_recalc,
.set_rate = &omap1_select_table_rate,
@@ -704,8 +658,7 @@ static struct clk i2c_fck = {
.name = "i2c_fck",
.id = 1,
.ops = &clkops_null,
- .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
- CLOCK_NO_IDLE_PARENT,
+ .flags = CLOCK_NO_IDLE_PARENT,
.parent = &armxor_ck.clk,
.recalc = &followparent_recalc,
};
@@ -714,62 +667,9 @@ static struct clk i2c_ick = {
.name = "i2c_ick",
.id = 1,
.ops = &clkops_null,
- .flags = CLOCK_IN_OMAP16XX | CLOCK_NO_IDLE_PARENT,
+ .flags = CLOCK_NO_IDLE_PARENT,
.parent = &armper_ck.clk,
.recalc = &followparent_recalc,
};
-static struct clk * onchip_clks[] = {
- /* non-ULPD clocks */
- &ck_ref,
- &ck_dpll1,
- /* CK_GEN1 clocks */
- &ck_dpll1out.clk,
- &sossi_ck,
- &arm_ck,
- &armper_ck.clk,
- &arm_gpio_ck,
- &armxor_ck.clk,
- &armtim_ck.clk,
- &armwdt_ck.clk,
- &arminth_ck1510, &arminth_ck16xx,
- /* CK_GEN2 clocks */
- &dsp_ck,
- &dspmmu_ck,
- &dspper_ck,
- &dspxor_ck,
- &dsptim_ck,
- /* CK_GEN3 clocks */
- &tc_ck.clk,
- &tipb_ck,
- &l3_ocpi_ck,
- &tc1_ck,
- &tc2_ck,
- &dma_ck,
- &dma_lcdfree_ck,
- &api_ck.clk,
- &lb_ck.clk,
- &rhea1_ck,
- &rhea2_ck,
- &lcd_ck_16xx,
- &lcd_ck_1510.clk,
- /* ULPD clocks */
- &uart1_1510,
- &uart1_16xx.clk,
- &uart2_ck,
- &uart3_1510,
- &uart3_16xx.clk,
- &usb_clko,
- &usb_hhc_ck1510, &usb_hhc_ck16xx,
- &usb_dc_ck,
- &mclk_1510, &mclk_16xx,
- &bclk_1510, &bclk_16xx,
- &mmc1_ck,
- &mmc2_ck,
- /* Virtual clocks */
- &virtual_ck_mpu,
- &i2c_fck,
- &i2c_ick,
-};
-
#endif
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index 46d3b0b9ce6..fc7b6831f3e 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -11,6 +11,7 @@ choice
config ARCH_OMAP1
bool "TI OMAP1"
+ select COMMON_CLKDEV
config ARCH_OMAP2
bool "TI OMAP2"
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index 6b3ef2a0b04..6b88f7878a5 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -36,6 +36,7 @@ static struct clk_functions *arch_clock;
* Standard clock functions defined in include/linux/clk.h
*-------------------------------------------------------------------------*/
+#ifndef CONFIG_COMMON_CLKDEV
/*
* Returns a clock. Note that we first try to use device id on the bus
* and clock name. If this fails, we try to use clock name only.
@@ -72,6 +73,7 @@ found:
return clk;
}
EXPORT_SYMBOL(clk_get);
+#endif
int clk_enable(struct clk *clk)
{
@@ -145,10 +147,12 @@ unsigned long clk_get_rate(struct clk *clk)
}
EXPORT_SYMBOL(clk_get_rate);
+#ifndef CONFIG_COMMON_CLKDEV
void clk_put(struct clk *clk)
{
}
EXPORT_SYMBOL(clk_put);
+#endif
/*-------------------------------------------------------------------------
* Optional clock functions defined in include/linux/clk.h
diff --git a/arch/arm/plat-omap/include/mach/clkdev.h b/arch/arm/plat-omap/include/mach/clkdev.h
new file mode 100644
index 00000000000..730c49d1ebd
--- /dev/null
+++ b/arch/arm/plat-omap/include/mach/clkdev.h
@@ -0,0 +1,13 @@
+#ifndef __MACH_CLKDEV_H
+#define __MACH_CLKDEV_H
+
+static inline int __clk_get(struct clk *clk)
+{
+ return 1;
+}
+
+static inline void __clk_put(struct clk *clk)
+{
+}
+
+#endif
diff --git a/arch/arm/plat-omap/include/mach/clock.h b/arch/arm/plat-omap/include/mach/clock.h
index 5a7411e71f2..2af4bc24cfe 100644
--- a/arch/arm/plat-omap/include/mach/clock.h
+++ b/arch/arm/plat-omap/include/mach/clock.h
@@ -136,11 +136,7 @@ extern const struct clkops clkops_null;
#define CONFIG_PARTICIPANT (1 << 10) /* Fundamental clock */
#define ENABLE_ON_INIT (1 << 11) /* Enable upon framework init */
#define INVERT_ENABLE (1 << 12) /* 0 enables, 1 disables */
-/* bits 13-20 are currently free */
-#define CLOCK_IN_OMAP310 (1 << 21)
-#define CLOCK_IN_OMAP730 (1 << 22)
-#define CLOCK_IN_OMAP1510 (1 << 23)
-#define CLOCK_IN_OMAP16XX (1 << 24)
+/* bits 13-24 are currently free */
#define CLOCK_IN_OMAP242X (1 << 25)
#define CLOCK_IN_OMAP243X (1 << 26)
#define CLOCK_IN_OMAP343X (1 << 27) /* clocks common to all 343X */
--
cgit v1.2.3-70-g09d2
From f1c2543738d18e4398e3d6e27abff6676667975a Mon Sep 17 00:00:00 2001
From: Russell King <rmk@dyn-67.arm.linux.org.uk>
Date: Fri, 23 Jan 2009 22:34:09 +0000
Subject: [ARM] omap: provide a dummy clock node
By providing a dummy clock node, we can eliminate the SoC conditional
clock handing in the OMAP drivers, moving this knowledge out of the
driver and into the machine clock support code.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
arch/arm/mach-omap1/clock.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
(limited to 'arch/arm/mach-omap1/clock.c')
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 829b9b845b8..88c716331ee 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -33,6 +33,26 @@ static const struct clkops clkops_dspck;
#include "clock.h"
+static int clk_omap1_dummy_enable(struct clk *clk)
+{
+ return 0;
+}
+
+static void clk_omap1_dummy_disable(struct clk *clk)
+{
+}
+
+static const struct clkops clkops_dummy = {
+ .enable = clk_omap1_dummy_enable,
+ .disable = clk_omap1_dummy_disable,
+};
+
+static struct clk dummy_ck = {
+ .name = "dummy",
+ .ops = &clkops_dummy,
+ .flags = RATE_FIXED,
+};
+
struct omap_clk {
u32 cpu;
struct clk_lookup lk;
--
cgit v1.2.3-70-g09d2
From 39a80c7f379e1c1d3e63b204b8353b7381d0a3d5 Mon Sep 17 00:00:00 2001
From: Russell King <rmk@dyn-67.arm.linux.org.uk>
Date: Mon, 19 Jan 2009 20:44:33 +0000
Subject: [ARM] omap: watchdog: convert clocks to match by devid and conid
This eliminates the need for separate OMAP24xx and OMAP34xx clock
requesting code sections.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
arch/arm/mach-omap1/clock.c | 2 +-
arch/arm/mach-omap2/clock24xx.c | 4 +-
arch/arm/mach-omap2/clock34xx.c | 4 +-
drivers/watchdog/omap_wdt.c | 93 +++++++++++------------------------------
4 files changed, 30 insertions(+), 73 deletions(-)
(limited to 'arch/arm/mach-omap1/clock.c')
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 88c716331ee..8ae7827bb8b 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -85,7 +85,7 @@ static struct omap_clk omap_clks[] = {
CLK(NULL, "arm_gpio_ck", &arm_gpio_ck, CK_1510 | CK_310),
CLK(NULL, "armxor_ck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310),
CLK(NULL, "armtim_ck", &armtim_ck.clk, CK_16XX | CK_1510 | CK_310),
- CLK(NULL, "armwdt_ck", &armwdt_ck.clk, CK_16XX | CK_1510 | CK_310),
+ CLK("omap_wdt", "fck", &armwdt_ck.clk, CK_16XX | CK_1510 | CK_310),
CLK(NULL, "arminth_ck", &arminth_ck1510, CK_1510 | CK_310),
CLK(NULL, "arminth_ck", &arminth_ck16xx, CK_16XX),
/* CK_GEN2 clocks */
diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c
index 36093ea878a..6a6278e5bbc 100644
--- a/arch/arm/mach-omap2/clock24xx.c
+++ b/arch/arm/mach-omap2/clock24xx.c
@@ -163,8 +163,8 @@ static struct omap_clk omap24xx_clks[] = {
CLK(NULL, "uart3_fck", &uart3_fck, CK_243X | CK_242X),
CLK(NULL, "gpios_ick", &gpios_ick, CK_243X | CK_242X),
CLK(NULL, "gpios_fck", &gpios_fck, CK_243X | CK_242X),
- CLK(NULL, "mpu_wdt_ick", &mpu_wdt_ick, CK_243X | CK_242X),
- CLK(NULL, "mpu_wdt_fck", &mpu_wdt_fck, CK_243X | CK_242X),
+ CLK("omap_wdt", "ick", &mpu_wdt_ick, CK_243X | CK_242X),
+ CLK("omap_wdt", "fck", &mpu_wdt_fck, CK_243X | CK_242X),
CLK(NULL, "sync_32k_ick", &sync_32k_ick, CK_243X | CK_242X),
CLK(NULL, "wdt1_ick", &wdt1_ick, CK_243X | CK_242X),
CLK(NULL, "omapctrl_ick", &omapctrl_ick, CK_243X | CK_242X),
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 2c22750016c..b3334b355cb 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -214,10 +214,10 @@ static struct omap_clk omap34xx_clks[] = {
CLK(NULL, "gpt1_fck", &gpt1_fck, CK_343X),
CLK(NULL, "wkup_32k_fck", &wkup_32k_fck, CK_343X),
CLK(NULL, "gpio1_dbck", &gpio1_dbck, CK_343X),
- CLK(NULL, "wdt2_fck", &wdt2_fck, CK_343X),
+ CLK("omap_wdt", "fck", &wdt2_fck, CK_343X),
CLK(NULL, "wkup_l4_ick", &wkup_l4_ick, CK_343X),
CLK(NULL, "usim_ick", &usim_ick, CK_3430ES2),
- CLK(NULL, "wdt2_ick", &wdt2_ick, CK_343X),
+ CLK("omap_wdt", "ick", &wdt2_ick, CK_343X),
CLK(NULL, "wdt1_ick", &wdt1_ick, CK_343X),
CLK(NULL, "gpio1_ick", &gpio1_ick, CK_343X),
CLK(NULL, "omap_32ksync_ick", &omap_32ksync_ick, CK_343X),
diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c
index 2f2ce7429f5..1a4c699762e 100644
--- a/drivers/watchdog/omap_wdt.c
+++ b/drivers/watchdog/omap_wdt.c
@@ -60,9 +60,8 @@ struct omap_wdt_dev {
void __iomem *base; /* physical */
struct device *dev;
int omap_wdt_users;
- struct clk *armwdt_ck;
- struct clk *mpu_wdt_ick;
- struct clk *mpu_wdt_fck;
+ struct clk *ick;
+ struct clk *fck;
struct resource *mem;
struct miscdevice omap_wdt_miscdev;
};
@@ -146,13 +145,9 @@ static int omap_wdt_open(struct inode *inode, struct file *file)
if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users)))
return -EBUSY;
- if (cpu_is_omap16xx())
- clk_enable(wdev->armwdt_ck); /* Enable the clock */
-
- if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
- clk_enable(wdev->mpu_wdt_ick); /* Enable the interface clock */
- clk_enable(wdev->mpu_wdt_fck); /* Enable the functional clock */
- }
+ if (wdev->ick)
+ clk_enable(wdev->ick); /* Enable the interface clock */
+ clk_enable(wdev->fck); /* Enable the functional clock */
/* initialize prescaler */
while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
@@ -181,13 +176,9 @@ static int omap_wdt_release(struct inode *inode, struct file *file)
omap_wdt_disable(wdev);
- if (cpu_is_omap16xx())
- clk_disable(wdev->armwdt_ck); /* Disable the clock */
-
- if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
- clk_disable(wdev->mpu_wdt_ick); /* Disable the clock */
- clk_disable(wdev->mpu_wdt_fck); /* Disable the clock */
- }
+ if (wdev->ick)
+ clk_disable(wdev->ick);
+ clk_disable(wdev->fck);
#else
printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n");
#endif
@@ -303,44 +294,21 @@ static int __init omap_wdt_probe(struct platform_device *pdev)
wdev->omap_wdt_users = 0;
wdev->mem = mem;
- if (cpu_is_omap16xx()) {
- wdev->armwdt_ck = clk_get(&pdev->dev, "armwdt_ck");
- if (IS_ERR(wdev->armwdt_ck)) {
- ret = PTR_ERR(wdev->armwdt_ck);
- wdev->armwdt_ck = NULL;
+ if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
+ wdev->ick = clk_get(&pdev->dev, "ick");
+ if (IS_ERR(wdev->ick)) {
+ ret = PTR_ERR(wdev->ick);
+ wdev->ick = NULL;
goto err_clk;
}
}
-
- if (cpu_is_omap24xx()) {
- wdev->mpu_wdt_ick = clk_get(&pdev->dev, "mpu_wdt_ick");
- if (IS_ERR(wdev->mpu_wdt_ick)) {
- ret = PTR_ERR(wdev->mpu_wdt_ick);
- wdev->mpu_wdt_ick = NULL;
- goto err_clk;
- }
- wdev->mpu_wdt_fck = clk_get(&pdev->dev, "mpu_wdt_fck");
- if (IS_ERR(wdev->mpu_wdt_fck)) {
- ret = PTR_ERR(wdev->mpu_wdt_fck);
- wdev->mpu_wdt_fck = NULL;
- goto err_clk;
- }
+ wdev->fck = clk_get(&pdev->dev, "fck");
+ if (IS_ERR(wdev->fck)) {
+ ret = PTR_ERR(wdev->fck);
+ wdev->fck = NULL;
+ goto err_clk;
}
- if (cpu_is_omap34xx()) {
- wdev->mpu_wdt_ick = clk_get(&pdev->dev, "wdt2_ick");
- if (IS_ERR(wdev->mpu_wdt_ick)) {
- ret = PTR_ERR(wdev->mpu_wdt_ick);
- wdev->mpu_wdt_ick = NULL;
- goto err_clk;
- }
- wdev->mpu_wdt_fck = clk_get(&pdev->dev, "wdt2_fck");
- if (IS_ERR(wdev->mpu_wdt_fck)) {
- ret = PTR_ERR(wdev->mpu_wdt_fck);
- wdev->mpu_wdt_fck = NULL;
- goto err_clk;
- }
- }
wdev->base = ioremap(res->start, res->end - res->start + 1);
if (!wdev->base) {
ret = -ENOMEM;
@@ -380,12 +348,10 @@ err_ioremap:
wdev->base = NULL;
err_clk:
- if (wdev->armwdt_ck)
- clk_put(wdev->armwdt_ck);
- if (wdev->mpu_wdt_ick)
- clk_put(wdev->mpu_wdt_ick);
- if (wdev->mpu_wdt_fck)
- clk_put(wdev->mpu_wdt_fck);
+ if (wdev->ick)
+ clk_put(wdev->ick);
+ if (wdev->fck)
+ clk_put(wdev->fck);
kfree(wdev);
err_kzalloc:
@@ -417,20 +383,11 @@ static int omap_wdt_remove(struct platform_device *pdev)
release_mem_region(res->start, res->end - res->start + 1);
platform_set_drvdata(pdev, NULL);
- if (wdev->armwdt_ck) {
- clk_put(wdev->armwdt_ck);
- wdev->armwdt_ck = NULL;
+ if (wdev->ick) {
+ clk_put(wdev->ick);
}
- if (wdev->mpu_wdt_ick) {
- clk_put(wdev->mpu_wdt_ick);
- wdev->mpu_wdt_ick = NULL;
- }
-
- if (wdev->mpu_wdt_fck) {
- clk_put(wdev->mpu_wdt_fck);
- wdev->mpu_wdt_fck = NULL;
- }
+ clk_put(wdev->fck);
iounmap(wdev->base);
kfree(wdev);
--
cgit v1.2.3-70-g09d2
From 4c5e1946b5f89c33e3bc8ed73fa7ba8f31e37cc5 Mon Sep 17 00:00:00 2001
From: Russell King <rmk@dyn-67.arm.linux.org.uk>
Date: Fri, 23 Jan 2009 12:48:37 +0000
Subject: [ARM] omap: watchdog: provide a dummy ick for OMAP1
Eliminate the OMAP1 vs OMAP2 clock knowledge in the watchdog driver.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
arch/arm/mach-omap1/clock.c | 2 ++
drivers/watchdog/omap_wdt.c | 23 ++++++++---------------
2 files changed, 10 insertions(+), 15 deletions(-)
(limited to 'arch/arm/mach-omap1/clock.c')
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 8ae7827bb8b..758abaadaf3 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -86,6 +86,8 @@ static struct omap_clk omap_clks[] = {
CLK(NULL, "armxor_ck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310),
CLK(NULL, "armtim_ck", &armtim_ck.clk, CK_16XX | CK_1510 | CK_310),
CLK("omap_wdt", "fck", &armwdt_ck.clk, CK_16XX | CK_1510 | CK_310),
+ CLK("omap_wdt", "ick", &armper_ck.clk, CK_16XX),
+ CLK("omap_wdt", "ick", &dummy_ck, CK_1510 | CK_310),
CLK(NULL, "arminth_ck", &arminth_ck1510, CK_1510 | CK_310),
CLK(NULL, "arminth_ck", &arminth_ck16xx, CK_16XX),
/* CK_GEN2 clocks */
diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c
index 1a4c699762e..aa5ad6e33f0 100644
--- a/drivers/watchdog/omap_wdt.c
+++ b/drivers/watchdog/omap_wdt.c
@@ -145,8 +145,7 @@ static int omap_wdt_open(struct inode *inode, struct file *file)
if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users)))
return -EBUSY;
- if (wdev->ick)
- clk_enable(wdev->ick); /* Enable the interface clock */
+ clk_enable(wdev->ick); /* Enable the interface clock */
clk_enable(wdev->fck); /* Enable the functional clock */
/* initialize prescaler */
@@ -176,8 +175,7 @@ static int omap_wdt_release(struct inode *inode, struct file *file)
omap_wdt_disable(wdev);
- if (wdev->ick)
- clk_disable(wdev->ick);
+ clk_disable(wdev->ick);
clk_disable(wdev->fck);
#else
printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n");
@@ -294,13 +292,11 @@ static int __init omap_wdt_probe(struct platform_device *pdev)
wdev->omap_wdt_users = 0;
wdev->mem = mem;
- if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
- wdev->ick = clk_get(&pdev->dev, "ick");
- if (IS_ERR(wdev->ick)) {
- ret = PTR_ERR(wdev->ick);
- wdev->ick = NULL;
- goto err_clk;
- }
+ wdev->ick = clk_get(&pdev->dev, "ick");
+ if (IS_ERR(wdev->ick)) {
+ ret = PTR_ERR(wdev->ick);
+ wdev->ick = NULL;
+ goto err_clk;
}
wdev->fck = clk_get(&pdev->dev, "fck");
if (IS_ERR(wdev->fck)) {
@@ -383,10 +379,7 @@ static int omap_wdt_remove(struct platform_device *pdev)
release_mem_region(res->start, res->end - res->start + 1);
platform_set_drvdata(pdev, NULL);
- if (wdev->ick) {
- clk_put(wdev->ick);
- }
-
+ clk_put(wdev->ick);
clk_put(wdev->fck);
iounmap(wdev->base);
--
cgit v1.2.3-70-g09d2
From 5c9e02b1abcb227f47529ad72cc4a3234cddae49 Mon Sep 17 00:00:00 2001
From: Russell King <rmk@dyn-67.arm.linux.org.uk>
Date: Mon, 19 Jan 2009 20:53:30 +0000
Subject: [ARM] omap: MMC: convert clocks to match by devid and conid
Convert OMAP MMC driver to match clocks using the device ID and a
connection ID rather than a clock name. This allows us to eliminate
the OMAP1/OMAP2 differences for the function clock.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
arch/arm/mach-omap1/clock.c | 4 ++--
arch/arm/mach-omap2/clock24xx.c | 4 ++--
drivers/mmc/host/omap.c | 7 ++-----
3 files changed, 6 insertions(+), 9 deletions(-)
(limited to 'arch/arm/mach-omap1/clock.c')
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 758abaadaf3..3015e852965 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -124,8 +124,8 @@ static struct omap_clk omap_clks[] = {
CLK(NULL, "mclk", &mclk_16xx, CK_16XX),
CLK(NULL, "bclk", &bclk_1510, CK_1510 | CK_310),
CLK(NULL, "bclk", &bclk_16xx, CK_16XX),
- CLK("mmci-omap.0", "mmc_ck", &mmc1_ck, CK_16XX | CK_1510 | CK_310),
- CLK("mmci-omap.1", "mmc_ck", &mmc2_ck, CK_16XX),
+ CLK("mmci-omap.0", "fck", &mmc1_ck, CK_16XX | CK_1510 | CK_310),
+ CLK("mmci-omap.1", "fck", &mmc2_ck, CK_16XX),
/* Virtual clocks */
CLK(NULL, "mpu", &virtual_ck_mpu, CK_16XX | CK_1510 | CK_310),
CLK("i2c_omap.1", "i2c_fck", &i2c_fck, CK_16XX | CK_1510 | CK_310),
diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c
index 6a6278e5bbc..aca4ca42bf4 100644
--- a/arch/arm/mach-omap2/clock24xx.c
+++ b/arch/arm/mach-omap2/clock24xx.c
@@ -178,8 +178,8 @@ static struct omap_clk omap24xx_clks[] = {
CLK(NULL, "wdt3_fck", &wdt3_fck, CK_242X),
CLK(NULL, "mspro_ick", &mspro_ick, CK_243X | CK_242X),
CLK(NULL, "mspro_fck", &mspro_fck, CK_243X | CK_242X),
- CLK(NULL, "mmc_ick", &mmc_ick, CK_242X),
- CLK(NULL, "mmc_fck", &mmc_fck, CK_242X),
+ CLK("mmci-omap.0", "ick", &mmc_ick, CK_242X),
+ CLK("mmci-omap.0", "fck", &mmc_fck, CK_242X),
CLK(NULL, "fac_ick", &fac_ick, CK_243X | CK_242X),
CLK(NULL, "fac_fck", &fac_fck, CK_243X | CK_242X),
CLK(NULL, "eac_ick", &eac_ick, CK_242X),
diff --git a/drivers/mmc/host/omap.c b/drivers/mmc/host/omap.c
index 67d7b7fef08..15eb8834376 100644
--- a/drivers/mmc/host/omap.c
+++ b/drivers/mmc/host/omap.c
@@ -1461,16 +1461,13 @@ static int __init mmc_omap_probe(struct platform_device *pdev)
goto err_ioremap;
if (cpu_is_omap24xx()) {
- host->iclk = clk_get(&pdev->dev, "mmc_ick");
+ host->iclk = clk_get(&pdev->dev, "ick");
if (IS_ERR(host->iclk))
goto err_free_mmc_host;
clk_enable(host->iclk);
}
- if (!cpu_is_omap24xx())
- host->fclk = clk_get(&pdev->dev, "mmc_ck");
- else
- host->fclk = clk_get(&pdev->dev, "mmc_fck");
+ host->fclk = clk_get(&pdev->dev, "fck");
if (IS_ERR(host->fclk)) {
ret = PTR_ERR(host->fclk);
--
cgit v1.2.3-70-g09d2
From d4a36645a1a76e5294c1b00682fb849fc53ccd80 Mon Sep 17 00:00:00 2001
From: Russell King <rmk@dyn-67.arm.linux.org.uk>
Date: Fri, 23 Jan 2009 19:03:37 +0000
Subject: [ARM] omap: MMC: provide a dummy ick for OMAP1
Eliminate the OMAP1 vs OMAP2 clock knowledge in the MMC driver.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
arch/arm/mach-omap1/clock.c | 2 ++
drivers/mmc/host/omap.c | 19 ++++++++-----------
2 files changed, 10 insertions(+), 11 deletions(-)
(limited to 'arch/arm/mach-omap1/clock.c')
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 3015e852965..61ace02e7dd 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -125,7 +125,9 @@ static struct omap_clk omap_clks[] = {
CLK(NULL, "bclk", &bclk_1510, CK_1510 | CK_310),
CLK(NULL, "bclk", &bclk_16xx, CK_16XX),
CLK("mmci-omap.0", "fck", &mmc1_ck, CK_16XX | CK_1510 | CK_310),
+ CLK("mmci-omap.0", "ick", &armper_ck.clk, CK_16XX | CK_1510 | CK_310),
CLK("mmci-omap.1", "fck", &mmc2_ck, CK_16XX),
+ CLK("mmci-omap.1", "ick", &armper_ck.clk, CK_16XX),
/* Virtual clocks */
CLK(NULL, "mpu", &virtual_ck_mpu, CK_16XX | CK_1510 | CK_310),
CLK("i2c_omap.1", "i2c_fck", &i2c_fck, CK_16XX | CK_1510 | CK_310),
diff --git a/drivers/mmc/host/omap.c b/drivers/mmc/host/omap.c
index 15eb8834376..5570849188c 100644
--- a/drivers/mmc/host/omap.c
+++ b/drivers/mmc/host/omap.c
@@ -1460,15 +1460,12 @@ static int __init mmc_omap_probe(struct platform_device *pdev)
if (!host->virt_base)
goto err_ioremap;
- if (cpu_is_omap24xx()) {
- host->iclk = clk_get(&pdev->dev, "ick");
- if (IS_ERR(host->iclk))
- goto err_free_mmc_host;
- clk_enable(host->iclk);
- }
+ host->iclk = clk_get(&pdev->dev, "ick");
+ if (IS_ERR(host->iclk))
+ goto err_free_mmc_host;
+ clk_enable(host->iclk);
host->fclk = clk_get(&pdev->dev, "fck");
-
if (IS_ERR(host->fclk)) {
ret = PTR_ERR(host->fclk);
goto err_free_iclk;
@@ -1533,10 +1530,10 @@ static int mmc_omap_remove(struct platform_device *pdev)
if (host->pdata->cleanup)
host->pdata->cleanup(&pdev->dev);
- if (host->iclk && !IS_ERR(host->iclk))
- clk_put(host->iclk);
- if (host->fclk && !IS_ERR(host->fclk))
- clk_put(host->fclk);
+ mmc_omap_fclk_enable(host, 0);
+ clk_put(host->fclk);
+ clk_disable(host->iclk);
+ clk_put(host->iclk);
iounmap(host->virt_base);
release_mem_region(pdev->resource[0].start,
--
cgit v1.2.3-70-g09d2
From b820ce4e6736ddad7ccda528e10aaf37ad3f13f9 Mon Sep 17 00:00:00 2001
From: Russell King <rmk@dyn-67.arm.linux.org.uk>
Date: Fri, 23 Jan 2009 10:26:46 +0000
Subject: [ARM] omap: mcbsp: convert to use fck/ick clocks directly
Rather than introducing a special 'mcbsp_clk' with code behind it in
mach-omap*/mcbsp.c to handle the SoC specifics, arrange for the mcbsp
driver to be like any other driver. mcbsp requests its fck and ick
clocks directly, and the SoC specific code deals with selecting the
correct clock.
There is one oddity to deal with - OMAP1 fiddles with the DSP clocks
and DSP reset, so we move this to the two callback functions.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
arch/arm/mach-omap1/clock.c | 9 ++++
arch/arm/mach-omap1/mcbsp.c | 52 +++++++++++--------
arch/arm/mach-omap2/clock24xx.c | 20 ++++----
arch/arm/mach-omap2/clock34xx.c | 20 ++++----
arch/arm/mach-omap2/mcbsp.c | 26 ----------
arch/arm/plat-omap/include/mach/mcbsp.h | 6 +--
arch/arm/plat-omap/mcbsp.c | 90 ++++++++++++++-------------------
7 files changed, 100 insertions(+), 123 deletions(-)
(limited to 'arch/arm/mach-omap1/clock.c')
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 61ace02e7dd..b62da4c9563 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -132,6 +132,15 @@ static struct omap_clk omap_clks[] = {
CLK(NULL, "mpu", &virtual_ck_mpu, CK_16XX | CK_1510 | CK_310),
CLK("i2c_omap.1", "i2c_fck", &i2c_fck, CK_16XX | CK_1510 | CK_310),
CLK("i2c_omap.1", "i2c_ick", &i2c_ick, CK_16XX),
+ CLK("omap-mcbsp.1", "ick", &dspper_ck, CK_16XX),
+ CLK("omap-mcbsp.1", "ick", &dummy_ck, CK_1510 | CK_310),
+ CLK("omap-mcbsp.2", "ick", &armper_ck.clk, CK_16XX),
+ CLK("omap-mcbsp.2", "ick", &dummy_ck, CK_1510 | CK_310),
+ CLK("omap-mcbsp.3", "ick", &dspper_ck, CK_16XX),
+ CLK("omap-mcbsp.3", "ick", &dummy_ck, CK_1510 | CK_310),
+ CLK("omap-mcbsp.1", "fck", &dspxor_ck, CK_16XX | CK_1510 | CK_310),
+ CLK("omap-mcbsp.2", "fck", &armper_ck.clk, CK_16XX | CK_1510 | CK_310),
+ CLK("omap-mcbsp.3", "fck", &dspxor_ck, CK_16XX | CK_1510 | CK_310),
};
static int omap1_clk_enable_generic(struct clk * clk);
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
index 575ba31295c..d040c3f1027 100644
--- a/arch/arm/mach-omap1/mcbsp.c
+++ b/arch/arm/mach-omap1/mcbsp.c
@@ -28,9 +28,9 @@
#define DPS_RSTCT2_PER_EN (1 << 0)
#define DSP_RSTCT2_WD_PER_EN (1 << 1)
-#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)
-const char *clk_names[] = { "dsp_ck", "api_ck", "dspxor_ck" };
-#endif
+static int dsp_use;
+static struct clk *api_clk;
+static struct clk *dsp_clk;
static void omap1_mcbsp_request(unsigned int id)
{
@@ -39,20 +39,40 @@ static void omap1_mcbsp_request(unsigned int id)
* are DSP public peripherals.
*/
if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) {
- omap_dsp_request_mem();
- /*
- * DSP external peripheral reset
- * FIXME: This should be moved to dsp code
- */
- __raw_writew(__raw_readw(DSP_RSTCT2) | DPS_RSTCT2_PER_EN |
- DSP_RSTCT2_WD_PER_EN, DSP_RSTCT2);
+ if (dsp_use++ == 0) {
+ api_clk = clk_get(NULL, "api_clk");
+ dsp_clk = clk_get(NULL, "dsp_clk");
+ if (!IS_ERR(api_clk) && !IS_ERR(dsp_clk)) {
+ clk_enable(api_clk);
+ clk_enable(dsp_clk);
+
+ omap_dsp_request_mem();
+ /*
+ * DSP external peripheral reset
+ * FIXME: This should be moved to dsp code
+ */
+ __raw_writew(__raw_readw(DSP_RSTCT2) | DPS_RSTCT2_PER_EN |
+ DSP_RSTCT2_WD_PER_EN, DSP_RSTCT2);
+ }
+ }
}
}
static void omap1_mcbsp_free(unsigned int id)
{
- if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3)
- omap_dsp_release_mem();
+ if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) {
+ if (--dsp_use == 0) {
+ omap_dsp_release_mem();
+ if (!IS_ERR(api_clk)) {
+ clk_disable(api_clk);
+ clk_put(api_clk);
+ }
+ if (!IS_ERR(dsp_clk)) {
+ clk_disable(dsp_clk);
+ clk_put(dsp_clk);
+ }
+ }
+ }
}
static struct omap_mcbsp_ops omap1_mcbsp_ops = {
@@ -94,8 +114,6 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
.rx_irq = INT_McBSP1RX,
.tx_irq = INT_McBSP1TX,
.ops = &omap1_mcbsp_ops,
- .clk_names = clk_names,
- .num_clks = 3,
},
{
.phys_base = OMAP1510_MCBSP2_BASE,
@@ -112,8 +130,6 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
.rx_irq = INT_McBSP3RX,
.tx_irq = INT_McBSP3TX,
.ops = &omap1_mcbsp_ops,
- .clk_names = clk_names,
- .num_clks = 3,
},
};
#define OMAP15XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap15xx_mcbsp_pdata)
@@ -131,8 +147,6 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
.rx_irq = INT_McBSP1RX,
.tx_irq = INT_McBSP1TX,
.ops = &omap1_mcbsp_ops,
- .clk_names = clk_names,
- .num_clks = 3,
},
{
.phys_base = OMAP1610_MCBSP2_BASE,
@@ -149,8 +163,6 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
.rx_irq = INT_McBSP3RX,
.tx_irq = INT_McBSP3TX,
.ops = &omap1_mcbsp_ops,
- .clk_names = clk_names,
- .num_clks = 3,
},
};
#define OMAP16XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap16xx_mcbsp_pdata)
diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c
index ac038035c1c..ea21d55a207 100644
--- a/arch/arm/mach-omap2/clock24xx.c
+++ b/arch/arm/mach-omap2/clock24xx.c
@@ -139,16 +139,16 @@ static struct omap_clk omap24xx_clks[] = {
CLK(NULL, "gpt11_fck", &gpt11_fck, CK_243X | CK_242X),
CLK(NULL, "gpt12_ick", &gpt12_ick, CK_243X | CK_242X),
CLK(NULL, "gpt12_fck", &gpt12_fck, CK_243X | CK_242X),
- CLK("omap-mcbsp.1", "mcbsp_ick", &mcbsp1_ick, CK_243X | CK_242X),
- CLK("omap-mcbsp.1", "mcbsp_fck", &mcbsp1_fck, CK_243X | CK_242X),
- CLK("omap-mcbsp.2", "mcbsp_ick", &mcbsp2_ick, CK_243X | CK_242X),
- CLK("omap-mcbsp.2", "mcbsp_fck", &mcbsp2_fck, CK_243X | CK_242X),
- CLK("omap-mcbsp.3", "mcbsp_ick", &mcbsp3_ick, CK_243X),
- CLK("omap-mcbsp.3", "mcbsp_fck", &mcbsp3_fck, CK_243X),
- CLK("omap-mcbsp.4", "mcbsp_ick", &mcbsp4_ick, CK_243X),
- CLK("omap-mcbsp.4", "mcbsp_fck", &mcbsp4_fck, CK_243X),
- CLK("omap-mcbsp.5", "mcbsp_ick", &mcbsp5_ick, CK_243X),
- CLK("omap-mcbsp.5", "mcbsp_fck", &mcbsp5_fck, CK_243X),
+ CLK("omap-mcbsp.1", "ick", &mcbsp1_ick, CK_243X | CK_242X),
+ CLK("omap-mcbsp.1", "fck", &mcbsp1_fck, CK_243X | CK_242X),
+ CLK("omap-mcbsp.2", "ick", &mcbsp2_ick, CK_243X | CK_242X),
+ CLK("omap-mcbsp.2", "fck", &mcbsp2_fck, CK_243X | CK_242X),
+ CLK("omap-mcbsp.3", "ick", &mcbsp3_ick, CK_243X),
+ CLK("omap-mcbsp.3", "fck", &mcbsp3_fck, CK_243X),
+ CLK("omap-mcbsp.4", "ick", &mcbsp4_ick, CK_243X),
+ CLK("omap-mcbsp.4", "fck", &mcbsp4_fck, CK_243X),
+ CLK("omap-mcbsp.5", "ick", &mcbsp5_ick, CK_243X),
+ CLK("omap-mcbsp.5", "fck", &mcbsp5_fck, CK_243X),
CLK("omap2_mcspi.1", "ick", &mcspi1_ick, CK_243X | CK_242X),
CLK("omap2_mcspi.1", "fck", &mcspi1_fck, CK_243X | CK_242X),
CLK("omap2_mcspi.2", "ick", &mcspi2_ick, CK_243X | CK_242X),
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index d0bfae5a2f4..a70aa2eaf05 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -144,8 +144,8 @@ static struct omap_clk omap34xx_clks[] = {
CLK("i2c_omap.3", "i2c_fck", &i2c3_fck, CK_343X),
CLK("i2c_omap.2", "i2c_fck", &i2c2_fck, CK_343X),
CLK("i2c_omap.1", "i2c_fck", &i2c1_fck, CK_343X),
- CLK("omap-mcbsp.5", "mcbsp_fck", &mcbsp5_fck, CK_343X),
- CLK("omap-mcbsp.1", "mcbsp_fck", &mcbsp1_fck, CK_343X),
+ CLK("omap-mcbsp.5", "fck", &mcbsp5_fck, CK_343X),
+ CLK("omap-mcbsp.1", "fck", &mcbsp1_fck, CK_343X),
CLK(NULL, "core_48m_fck", &core_48m_fck, CK_343X),
CLK("omap2_mcspi.4", "fck", &mcspi4_fck, CK_343X),
CLK("omap2_mcspi.3", "fck", &mcspi3_fck, CK_343X),
@@ -186,8 +186,8 @@ static struct omap_clk omap34xx_clks[] = {
CLK(NULL, "uart1_ick", &uart1_ick, CK_343X),
CLK(NULL, "gpt11_ick", &gpt11_ick, CK_343X),
CLK(NULL, "gpt10_ick", &gpt10_ick, CK_343X),
- CLK("omap-mcbsp.5", "mcbsp_ick", &mcbsp5_ick, CK_343X),
- CLK("omap-mcbsp.1", "mcbsp_ick", &mcbsp1_ick, CK_343X),
+ CLK("omap-mcbsp.5", "ick", &mcbsp5_ick, CK_343X),
+ CLK("omap-mcbsp.1", "ick", &mcbsp1_ick, CK_343X),
CLK(NULL, "fac_ick", &fac_ick, CK_3430ES1),
CLK(NULL, "mailboxes_ick", &mailboxes_ick, CK_343X),
CLK(NULL, "omapctrl_ick", &omapctrl_ick, CK_343X),
@@ -257,12 +257,12 @@ static struct omap_clk omap34xx_clks[] = {
CLK(NULL, "gpt4_ick", &gpt4_ick, CK_343X),
CLK(NULL, "gpt3_ick", &gpt3_ick, CK_343X),
CLK(NULL, "gpt2_ick", &gpt2_ick, CK_343X),
- CLK("omap-mcbsp.2", "mcbsp_ick", &mcbsp2_ick, CK_343X),
- CLK("omap-mcbsp.3", "mcbsp_ick", &mcbsp3_ick, CK_343X),
- CLK("omap-mcbsp.4", "mcbsp_ick", &mcbsp4_ick, CK_343X),
- CLK("omap-mcbsp.2", "mcbsp_fck", &mcbsp2_fck, CK_343X),
- CLK("omap-mcbsp.3", "mcbsp_fck", &mcbsp3_fck, CK_343X),
- CLK("omap-mcbsp.4", "mcbsp_fck", &mcbsp4_fck, CK_343X),
+ CLK("omap-mcbsp.2", "ick", &mcbsp2_ick, CK_343X),
+ CLK("omap-mcbsp.3", "ick", &mcbsp3_ick, CK_343X),
+ CLK("omap-mcbsp.4", "ick", &mcbsp4_ick, CK_343X),
+ CLK("omap-mcbsp.2", "fck", &mcbsp2_fck, CK_343X),
+ CLK("omap-mcbsp.3", "fck", &mcbsp3_fck, CK_343X),
+ CLK("omap-mcbsp.4", "fck", &mcbsp4_fck, CK_343X),
CLK(NULL, "emu_src_ck", &emu_src_ck, CK_343X),
CLK(NULL, "pclk_fck", &pclk_fck, CK_343X),
CLK(NULL, "pclkx2_fck", &pclkx2_fck, CK_343X),
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index a9e631fc113..a5c0f0435cd 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -24,8 +24,6 @@
#include <mach/cpu.h>
#include <mach/mcbsp.h>
-const char *clk_names[] = { "mcbsp_ick", "mcbsp_fck" };
-
static void omap2_mcbsp2_mux_setup(void)
{
omap_cfg_reg(Y15_24XX_MCBSP2_CLKX);
@@ -57,8 +55,6 @@ static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP1_IRQ_RX,
.tx_irq = INT_24XX_MCBSP1_IRQ_TX,
.ops = &omap2_mcbsp_ops,
- .clk_names = clk_names,
- .num_clks = 2,
},
{
.phys_base = OMAP24XX_MCBSP2_BASE,
@@ -67,8 +63,6 @@ static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP2_IRQ_RX,
.tx_irq = INT_24XX_MCBSP2_IRQ_TX,
.ops = &omap2_mcbsp_ops,
- .clk_names = clk_names,
- .num_clks = 2,
},
};
#define OMAP2420_MCBSP_PDATA_SZ ARRAY_SIZE(omap2420_mcbsp_pdata)
@@ -86,8 +80,6 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP1_IRQ_RX,
.tx_irq = INT_24XX_MCBSP1_IRQ_TX,
.ops = &omap2_mcbsp_ops,
- .clk_names = clk_names,
- .num_clks = 2,
},
{
.phys_base = OMAP24XX_MCBSP2_BASE,
@@ -96,8 +88,6 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP2_IRQ_RX,
.tx_irq = INT_24XX_MCBSP2_IRQ_TX,
.ops = &omap2_mcbsp_ops,
- .clk_names = clk_names,
- .num_clks = 2,
},
{
.phys_base = OMAP2430_MCBSP3_BASE,
@@ -106,8 +96,6 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP3_IRQ_RX,
.tx_irq = INT_24XX_MCBSP3_IRQ_TX,
.ops = &omap2_mcbsp_ops,
- .clk_names = clk_names,
- .num_clks = 2,
},
{
.phys_base = OMAP2430_MCBSP4_BASE,
@@ -116,8 +104,6 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP4_IRQ_RX,
.tx_irq = INT_24XX_MCBSP4_IRQ_TX,
.ops = &omap2_mcbsp_ops,
- .clk_names = clk_names,
- .num_clks = 2,
},
{
.phys_base = OMAP2430_MCBSP5_BASE,
@@ -126,8 +112,6 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP5_IRQ_RX,
.tx_irq = INT_24XX_MCBSP5_IRQ_TX,
.ops = &omap2_mcbsp_ops,
- .clk_names = clk_names,
- .num_clks = 2,
},
};
#define OMAP2430_MCBSP_PDATA_SZ ARRAY_SIZE(omap2430_mcbsp_pdata)
@@ -145,8 +129,6 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP1_IRQ_RX,
.tx_irq = INT_24XX_MCBSP1_IRQ_TX,
.ops = &omap2_mcbsp_ops,
- .clk_names = clk_names,
- .num_clks = 2,
},
{
.phys_base = OMAP34XX_MCBSP2_BASE,
@@ -155,8 +137,6 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP2_IRQ_RX,
.tx_irq = INT_24XX_MCBSP2_IRQ_TX,
.ops = &omap2_mcbsp_ops,
- .clk_names = clk_names,
- .num_clks = 2,
},
{
.phys_base = OMAP34XX_MCBSP3_BASE,
@@ -165,8 +145,6 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP3_IRQ_RX,
.tx_irq = INT_24XX_MCBSP3_IRQ_TX,
.ops = &omap2_mcbsp_ops,
- .clk_names = clk_names,
- .num_clks = 2,
},
{
.phys_base = OMAP34XX_MCBSP4_BASE,
@@ -175,8 +153,6 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP4_IRQ_RX,
.tx_irq = INT_24XX_MCBSP4_IRQ_TX,
.ops = &omap2_mcbsp_ops,
- .clk_names = clk_names,
- .num_clks = 2,
},
{
.phys_base = OMAP34XX_MCBSP5_BASE,
@@ -185,8 +161,6 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP5_IRQ_RX,
.tx_irq = INT_24XX_MCBSP5_IRQ_TX,
.ops = &omap2_mcbsp_ops,
- .clk_names = clk_names,
- .num_clks = 2,
},
};
#define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata)
diff --git a/arch/arm/plat-omap/include/mach/mcbsp.h b/arch/arm/plat-omap/include/mach/mcbsp.h
index 113c2466c86..bb154ea7676 100644
--- a/arch/arm/plat-omap/include/mach/mcbsp.h
+++ b/arch/arm/plat-omap/include/mach/mcbsp.h
@@ -344,8 +344,6 @@ struct omap_mcbsp_platform_data {
u8 dma_rx_sync, dma_tx_sync;
u16 rx_irq, tx_irq;
struct omap_mcbsp_ops *ops;
- char const **clk_names;
- int num_clks;
};
struct omap_mcbsp {
@@ -377,8 +375,8 @@ struct omap_mcbsp {
/* Protect the field .free, while checking if the mcbsp is in use */
spinlock_t lock;
struct omap_mcbsp_platform_data *pdata;
- struct clk **clks;
- int num_clks;
+ struct clk *iclk;
+ struct clk *fclk;
};
extern struct omap_mcbsp **mcbsp_ptr;
extern int omap_mcbsp_count;
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index e5842e30e53..28b0a824b8c 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -214,7 +214,6 @@ EXPORT_SYMBOL(omap_mcbsp_set_io_type);
int omap_mcbsp_request(unsigned int id)
{
struct omap_mcbsp *mcbsp;
- int i;
int err;
if (!omap_mcbsp_check_valid_id(id)) {
@@ -223,23 +222,23 @@ int omap_mcbsp_request(unsigned int id)
}
mcbsp = id_to_mcbsp_ptr(id);
- if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request)
- mcbsp->pdata->ops->request(id);
-
- for (i = 0; i < mcbsp->num_clks; i++)
- clk_enable(mcbsp->clks[i]);
-
spin_lock(&mcbsp->lock);
if (!mcbsp->free) {
dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
mcbsp->id);
spin_unlock(&mcbsp->lock);
- return -1;
+ return -EBUSY;
}
mcbsp->free = 0;
spin_unlock(&mcbsp->lock);
+ if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request)
+ mcbsp->pdata->ops->request(id);
+
+ clk_enable(mcbsp->iclk);
+ clk_enable(mcbsp->fclk);
+
/*
* Make sure that transmitter, receiver and sample-rate generator are
* not running before activating IRQs.
@@ -278,7 +277,6 @@ EXPORT_SYMBOL(omap_mcbsp_request);
void omap_mcbsp_free(unsigned int id)
{
struct omap_mcbsp *mcbsp;
- int i;
if (!omap_mcbsp_check_valid_id(id)) {
printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
@@ -289,8 +287,14 @@ void omap_mcbsp_free(unsigned int id)
if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
mcbsp->pdata->ops->free(id);
- for (i = mcbsp->num_clks - 1; i >= 0; i--)
- clk_disable(mcbsp->clks[i]);
+ clk_disable(mcbsp->fclk);
+ clk_disable(mcbsp->iclk);
+
+ if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
+ /* Free IRQs */
+ free_irq(mcbsp->rx_irq, (void *)mcbsp);
+ free_irq(mcbsp->tx_irq, (void *)mcbsp);
+ }
spin_lock(&mcbsp->lock);
if (mcbsp->free) {
@@ -302,12 +306,6 @@ void omap_mcbsp_free(unsigned int id)
mcbsp->free = 1;
spin_unlock(&mcbsp->lock);
-
- if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
- /* Free IRQs */
- free_irq(mcbsp->rx_irq, (void *)mcbsp);
- free_irq(mcbsp->tx_irq, (void *)mcbsp);
- }
}
EXPORT_SYMBOL(omap_mcbsp_free);
@@ -876,7 +874,6 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data;
struct omap_mcbsp *mcbsp;
int id = pdev->id - 1;
- int i;
int ret = 0;
if (!pdata) {
@@ -899,7 +896,6 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
ret = -ENOMEM;
goto exit;
}
- mcbsp_ptr[id] = mcbsp;
spin_lock_init(&mcbsp->lock);
mcbsp->id = id + 1;
@@ -921,39 +917,32 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
mcbsp->dma_rx_sync = pdata->dma_rx_sync;
mcbsp->dma_tx_sync = pdata->dma_tx_sync;
- if (pdata->num_clks) {
- mcbsp->num_clks = pdata->num_clks;
- mcbsp->clks = kzalloc(mcbsp->num_clks * sizeof(struct clk *),
- GFP_KERNEL);
- if (!mcbsp->clks) {
- ret = -ENOMEM;
- goto exit;
- }
- for (i = 0; i < mcbsp->num_clks; i++) {
- mcbsp->clks[i] = clk_get(&pdev->dev, pdata->clk_names[i]);
- if (IS_ERR(mcbsp->clks[i])) {
- dev_err(&pdev->dev,
- "Invalid %s configuration for McBSP%d.\n",
- pdata->clk_names[i], mcbsp->id);
- ret = PTR_ERR(mcbsp->clks[i]);
- goto err_clk;
- }
- }
+ mcbsp->iclk = clk_get(&pdev->dev, "ick");
+ if (IS_ERR(mcbsp->iclk)) {
+ ret = PTR_ERR(mcbsp->iclk);
+ dev_err(&pdev->dev, "unable to get ick: %d\n", ret);
+ goto err_iclk;
+ }
+ mcbsp->fclk = clk_get(&pdev->dev, "fck");
+ if (IS_ERR(mcbsp->fclk)) {
+ ret = PTR_ERR(mcbsp->fclk);
+ dev_err(&pdev->dev, "unable to get fck: %d\n", ret);
+ goto err_fclk;
}
mcbsp->pdata = pdata;
mcbsp->dev = &pdev->dev;
+ mcbsp_ptr[id] = mcbsp;
platform_set_drvdata(pdev, mcbsp);
return 0;
-err_clk:
- while (i--)
- clk_put(mcbsp->clks[i]);
- kfree(mcbsp->clks);
+err_fclk:
+ clk_put(mcbsp->iclk);
+err_iclk:
iounmap(mcbsp->io_base);
err_ioremap:
- mcbsp->free = 0;
+ kfree(mcbsp);
exit:
return ret;
}
@@ -961,7 +950,6 @@ exit:
static int __devexit omap_mcbsp_remove(struct platform_device *pdev)
{
struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev);
- int i;
platform_set_drvdata(pdev, NULL);
if (mcbsp) {
@@ -970,18 +958,15 @@ static int __devexit omap_mcbsp_remove(struct platform_device *pdev)
mcbsp->pdata->ops->free)
mcbsp->pdata->ops->free(mcbsp->id);
- for (i = mcbsp->num_clks - 1; i >= 0; i--) {
- clk_disable(mcbsp->clks[i]);
- clk_put(mcbsp->clks[i]);
- }
+ clk_disable(mcbsp->fclk);
+ clk_disable(mcbsp->iclk);
+ clk_put(mcbsp->fclk);
+ clk_put(mcbsp->iclk);
iounmap(mcbsp->io_base);
- if (mcbsp->num_clks) {
- kfree(mcbsp->clks);
- mcbsp->clks = NULL;
- mcbsp->num_clks = 0;
- }
+ mcbsp->fclk = NULL;
+ mcbsp->iclk = NULL;
mcbsp->free = 0;
mcbsp->dev = NULL;
}
@@ -1002,4 +987,3 @@ int __init omap_mcbsp_init(void)
/* Register the McBSP driver */
return platform_driver_register(&omap_mcbsp_driver);
}
-
--
cgit v1.2.3-70-g09d2
From 1d14de087dd1cab0436fb7c9d5e38d852f33df69 Mon Sep 17 00:00:00 2001
From: Russell King <rmk@dyn-67.arm.linux.org.uk>
Date: Mon, 19 Jan 2009 21:02:29 +0000
Subject: [ARM] omap: i2c: use short connection ids
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
arch/arm/mach-omap1/clock.c | 4 ++--
arch/arm/mach-omap2/clock24xx.c | 12 ++++++------
arch/arm/mach-omap2/clock34xx.c | 12 ++++++------
drivers/i2c/busses/i2c-omap.c | 4 ++--
4 files changed, 16 insertions(+), 16 deletions(-)
(limited to 'arch/arm/mach-omap1/clock.c')
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index b62da4c9563..382e09a1cec 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -130,8 +130,8 @@ static struct omap_clk omap_clks[] = {
CLK("mmci-omap.1", "ick", &armper_ck.clk, CK_16XX),
/* Virtual clocks */
CLK(NULL, "mpu", &virtual_ck_mpu, CK_16XX | CK_1510 | CK_310),
- CLK("i2c_omap.1", "i2c_fck", &i2c_fck, CK_16XX | CK_1510 | CK_310),
- CLK("i2c_omap.1", "i2c_ick", &i2c_ick, CK_16XX),
+ CLK("i2c_omap.1", "fck", &i2c_fck, CK_16XX | CK_1510 | CK_310),
+ CLK("i2c_omap.1", "ick", &i2c_ick, CK_16XX),
CLK("omap-mcbsp.1", "ick", &dspper_ck, CK_16XX),
CLK("omap-mcbsp.1", "ick", &dummy_ck, CK_1510 | CK_310),
CLK("omap-mcbsp.2", "ick", &armper_ck.clk, CK_16XX),
diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c
index ea21d55a207..81c7b705114 100644
--- a/arch/arm/mach-omap2/clock24xx.c
+++ b/arch/arm/mach-omap2/clock24xx.c
@@ -186,12 +186,12 @@ static struct omap_clk omap24xx_clks[] = {
CLK(NULL, "eac_fck", &eac_fck, CK_242X),
CLK(NULL, "hdq_ick", &hdq_ick, CK_243X | CK_242X),
CLK(NULL, "hdq_fck", &hdq_fck, CK_243X | CK_242X),
- CLK("i2c_omap.1", "i2c_ick", &i2c1_ick, CK_243X | CK_242X),
- CLK("i2c_omap.1", "i2c_fck", &i2c1_fck, CK_242X),
- CLK("i2c_omap.1", "i2c_fck", &i2chs1_fck, CK_243X),
- CLK("i2c_omap.2", "i2c_ick", &i2c2_ick, CK_243X | CK_242X),
- CLK("i2c_omap.2", "i2c_fck", &i2c2_fck, CK_242X),
- CLK("i2c_omap.2", "i2c_fck", &i2chs2_fck, CK_243X),
+ CLK("i2c_omap.1", "ick", &i2c1_ick, CK_243X | CK_242X),
+ CLK("i2c_omap.1", "fck", &i2c1_fck, CK_242X),
+ CLK("i2c_omap.1", "fck", &i2chs1_fck, CK_243X),
+ CLK("i2c_omap.2", "ick", &i2c2_ick, CK_243X | CK_242X),
+ CLK("i2c_omap.2", "fck", &i2c2_fck, CK_242X),
+ CLK("i2c_omap.2", "fck", &i2chs2_fck, CK_243X),
CLK(NULL, "gpmc_fck", &gpmc_fck, CK_243X | CK_242X),
CLK(NULL, "sdma_fck", &sdma_fck, CK_243X | CK_242X),
CLK(NULL, "sdma_ick", &sdma_ick, CK_243X | CK_242X),
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index a70aa2eaf05..859ad1d4062 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -141,9 +141,9 @@ static struct omap_clk omap34xx_clks[] = {
CLK("mmci-omap-hs.1", "mmchs_fck", &mmchs2_fck, CK_343X),
CLK(NULL, "mspro_fck", &mspro_fck, CK_343X),
CLK("mmci-omap-hs.0", "mmchs_fck", &mmchs1_fck, CK_343X),
- CLK("i2c_omap.3", "i2c_fck", &i2c3_fck, CK_343X),
- CLK("i2c_omap.2", "i2c_fck", &i2c2_fck, CK_343X),
- CLK("i2c_omap.1", "i2c_fck", &i2c1_fck, CK_343X),
+ CLK("i2c_omap.3", "fck", &i2c3_fck, CK_343X),
+ CLK("i2c_omap.2", "fck", &i2c2_fck, CK_343X),
+ CLK("i2c_omap.1", "fck", &i2c1_fck, CK_343X),
CLK("omap-mcbsp.5", "fck", &mcbsp5_fck, CK_343X),
CLK("omap-mcbsp.1", "fck", &mcbsp1_fck, CK_343X),
CLK(NULL, "core_48m_fck", &core_48m_fck, CK_343X),
@@ -179,9 +179,9 @@ static struct omap_clk omap34xx_clks[] = {
CLK("omap2_mcspi.3", "ick", &mcspi3_ick, CK_343X),
CLK("omap2_mcspi.2", "ick", &mcspi2_ick, CK_343X),
CLK("omap2_mcspi.1", "ick", &mcspi1_ick, CK_343X),
- CLK("i2c_omap.3", "i2c_ick", &i2c3_ick, CK_343X),
- CLK("i2c_omap.2", "i2c_ick", &i2c2_ick, CK_343X),
- CLK("i2c_omap.1", "i2c_ick", &i2c1_ick, CK_343X),
+ CLK("i2c_omap.3", "ick", &i2c3_ick, CK_343X),
+ CLK("i2c_omap.2", "ick", &i2c2_ick, CK_343X),
+ CLK("i2c_omap.1", "ick", &i2c1_ick, CK_343X),
CLK(NULL, "uart2_ick", &uart2_ick, CK_343X),
CLK(NULL, "uart1_ick", &uart1_ick, CK_343X),
CLK(NULL, "gpt11_ick", &gpt11_ick, CK_343X),
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index be8ee2cac8b..19f86e1eefa 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -194,14 +194,14 @@ static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg)
static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev)
{
if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
- dev->iclk = clk_get(dev->dev, "i2c_ick");
+ dev->iclk = clk_get(dev->dev, "ick");
if (IS_ERR(dev->iclk)) {
dev->iclk = NULL;
return -ENODEV;
}
}
- dev->fclk = clk_get(dev->dev, "i2c_fck");
+ dev->fclk = clk_get(dev->dev, "fck");
if (IS_ERR(dev->fclk)) {
if (dev->iclk != NULL) {
clk_put(dev->iclk);
--
cgit v1.2.3-70-g09d2
From 5fe23380405d3a65ce6f46d270c4d3a31027430b Mon Sep 17 00:00:00 2001
From: Russell King <rmk@dyn-67.arm.linux.org.uk>
Date: Fri, 23 Jan 2009 22:57:12 +0000
Subject: [ARM] omap: i2c: remove conditional ick clocks
By providing a dummy ick for OMAP1510 and OMAP310, we avoid having
SoC conditional clock information in i2c-omap.c. Also, fix the
error handling by making sure we propagate the error returned via
clk_get().
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
arch/arm/mach-omap1/clock.c | 1 +
drivers/i2c/busses/i2c-omap.c | 28 +++++++++++++---------------
2 files changed, 14 insertions(+), 15 deletions(-)
(limited to 'arch/arm/mach-omap1/clock.c')
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 382e09a1cec..d2c61390346 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -132,6 +132,7 @@ static struct omap_clk omap_clks[] = {
CLK(NULL, "mpu", &virtual_ck_mpu, CK_16XX | CK_1510 | CK_310),
CLK("i2c_omap.1", "fck", &i2c_fck, CK_16XX | CK_1510 | CK_310),
CLK("i2c_omap.1", "ick", &i2c_ick, CK_16XX),
+ CLK("i2c_omap.1", "ick", &dummy_ck, CK_1510 | CK_310),
CLK("omap-mcbsp.1", "ick", &dspper_ck, CK_16XX),
CLK("omap-mcbsp.1", "ick", &dummy_ck, CK_1510 | CK_310),
CLK("omap-mcbsp.2", "ick", &armper_ck.clk, CK_16XX),
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 96814fb6715..ece0125a1ee 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -193,22 +193,24 @@ static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg)
static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev)
{
- if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
- dev->iclk = clk_get(dev->dev, "ick");
- if (IS_ERR(dev->iclk)) {
- dev->iclk = NULL;
- return -ENODEV;
- }
+ int ret;
+
+ dev->iclk = clk_get(dev->dev, "ick");
+ if (IS_ERR(dev->iclk)) {
+ ret = PTR_ERR(dev->iclk);
+ dev->iclk = NULL;
+ return ret;
}
dev->fclk = clk_get(dev->dev, "fck");
if (IS_ERR(dev->fclk)) {
+ ret = PTR_ERR(dev->fclk);
if (dev->iclk != NULL) {
clk_put(dev->iclk);
dev->iclk = NULL;
}
dev->fclk = NULL;
- return -ENODEV;
+ return ret;
}
return 0;
@@ -218,18 +220,15 @@ static void omap_i2c_put_clocks(struct omap_i2c_dev *dev)
{
clk_put(dev->fclk);
dev->fclk = NULL;
- if (dev->iclk != NULL) {
- clk_put(dev->iclk);
- dev->iclk = NULL;
- }
+ clk_put(dev->iclk);
+ dev->iclk = NULL;
}
static void omap_i2c_unidle(struct omap_i2c_dev *dev)
{
WARN_ON(!dev->idle);
- if (dev->iclk != NULL)
- clk_enable(dev->iclk);
+ clk_enable(dev->iclk);
clk_enable(dev->fclk);
dev->idle = 0;
if (dev->iestate)
@@ -254,8 +253,7 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev)
}
dev->idle = 1;
clk_disable(dev->fclk);
- if (dev->iclk != NULL)
- clk_disable(dev->iclk);
+ clk_disable(dev->iclk);
}
static int omap_i2c_init(struct omap_i2c_dev *dev)
--
cgit v1.2.3-70-g09d2
From b1ad379632327c0722c5c92275c326971da3b948 Mon Sep 17 00:00:00 2001
From: Russell King <rmk@dyn-67.arm.linux.org.uk>
Date: Thu, 22 Jan 2009 19:41:20 +0000
Subject: [ARM] omap: spi: arrange for omap_uwire to use connection ID
... which now means no driver requests the "armxor_ck" clock directly.
Also, fix the error handling for clk_get(), ensuring that we propagate
the error returned from clk_get().
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
arch/arm/mach-omap1/clock.c | 1 +
drivers/spi/omap_uwire.c | 9 +++++----
2 files changed, 6 insertions(+), 4 deletions(-)
(limited to 'arch/arm/mach-omap1/clock.c')
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index d2c61390346..7c455431790 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -133,6 +133,7 @@ static struct omap_clk omap_clks[] = {
CLK("i2c_omap.1", "fck", &i2c_fck, CK_16XX | CK_1510 | CK_310),
CLK("i2c_omap.1", "ick", &i2c_ick, CK_16XX),
CLK("i2c_omap.1", "ick", &dummy_ck, CK_1510 | CK_310),
+ CLK("omap_uwire", "fck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310),
CLK("omap-mcbsp.1", "ick", &dspper_ck, CK_16XX),
CLK("omap-mcbsp.1", "ick", &dummy_ck, CK_1510 | CK_310),
CLK("omap-mcbsp.2", "ick", &armper_ck.clk, CK_16XX),
diff --git a/drivers/spi/omap_uwire.c b/drivers/spi/omap_uwire.c
index bab6ff061e9..394b616eafe 100644
--- a/drivers/spi/omap_uwire.c
+++ b/drivers/spi/omap_uwire.c
@@ -506,11 +506,12 @@ static int __init uwire_probe(struct platform_device *pdev)
dev_set_drvdata(&pdev->dev, uwire);
- uwire->ck = clk_get(&pdev->dev, "armxor_ck");
- if (!uwire->ck || IS_ERR(uwire->ck)) {
- dev_dbg(&pdev->dev, "no mpu_xor_clk ?\n");
+ uwire->ck = clk_get(&pdev->dev, "fck");
+ if (IS_ERR(uwire->ck)) {
+ status = PTR_ERR(uwire->ck);
+ dev_dbg(&pdev->dev, "no functional clock?\n");
spi_master_put(master);
- return -ENODEV;
+ return status;
}
clk_enable(uwire->ck);
--
cgit v1.2.3-70-g09d2
From fed415e48f07799b278cd4353385fee1464d4aca Mon Sep 17 00:00:00 2001
From: Tony Lindgren <tony@atomide.com>
Date: Wed, 28 Jan 2009 12:18:48 -0700
Subject: [ARM] omap: Fix omap1 clock issues
This fixes booting, and is a step toward fixing things properly:
- Make enable_reg u32 instead of u16
[rmk: virtual addresses are void __iomem *, not u32]
- Get rid of VIRTUAL_IO_ADDRESS for clocks
- Use __raw_read/write instead of omap_read/write for clock registers
This patch adds a bunch of compile warnings until omap1 clock
also uses offsets.
linux-omap source commit is 9d1dff8638c9e96a401e1885f9948662e9ff9636.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
arch/arm/mach-omap1/clock.c | 77 ++++++++++-----------------------
arch/arm/mach-omap1/clock.h | 63 +++++++++++++--------------
arch/arm/plat-omap/include/mach/clock.h | 1 -
3 files changed, 53 insertions(+), 88 deletions(-)
(limited to 'arch/arm/mach-omap1/clock.c')
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 7c455431790..1e477af666e 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -163,7 +163,7 @@ static void omap1_watchdog_recalc(struct clk * clk)
static void omap1_uart_recalc(struct clk * clk)
{
- unsigned int val = omap_readl(clk->enable_reg);
+ unsigned int val = __raw_readl(clk->enable_reg);
if (val & clk->enable_bit)
clk->rate = 48000000;
else
@@ -517,14 +517,14 @@ static int omap1_set_uart_rate(struct clk * clk, unsigned long rate)
{
unsigned int val;
- val = omap_readl(clk->enable_reg);
+ val = __raw_readl(clk->enable_reg);
if (rate == 12000000)
val &= ~(1 << clk->enable_bit);
else if (rate == 48000000)
val |= (1 << clk->enable_bit);
else
return -EINVAL;
- omap_writel(val, clk->enable_reg);
+ __raw_writel(val, clk->enable_reg);
clk->rate = rate;
return 0;
@@ -543,8 +543,8 @@ static int omap1_set_ext_clk_rate(struct clk * clk, unsigned long rate)
else
ratio_bits = (dsor - 2) << 2;
- ratio_bits |= omap_readw(clk->enable_reg) & ~0xfd;
- omap_writew(ratio_bits, clk->enable_reg);
+ ratio_bits |= __raw_readw(clk->enable_reg) & ~0xfd;
+ __raw_writew(ratio_bits, clk->enable_reg);
return 0;
}
@@ -583,8 +583,8 @@ static void omap1_init_ext_clk(struct clk * clk)
__u16 ratio_bits;
/* Determine current rate and ensure clock is based on 96MHz APLL */
- ratio_bits = omap_readw(clk->enable_reg) & ~1;
- omap_writew(ratio_bits, clk->enable_reg);
+ ratio_bits = __raw_readw(clk->enable_reg) & ~1;
+ __raw_writew(ratio_bits, clk->enable_reg);
ratio_bits = (ratio_bits & 0xfc) >> 2;
if (ratio_bits > 6)
@@ -646,25 +646,13 @@ static int omap1_clk_enable_generic(struct clk *clk)
}
if (clk->flags & ENABLE_REG_32BIT) {
- if (clk->flags & VIRTUAL_IO_ADDRESS) {
- regval32 = __raw_readl(clk->enable_reg);
- regval32 |= (1 << clk->enable_bit);
- __raw_writel(regval32, clk->enable_reg);
- } else {
- regval32 = omap_readl(clk->enable_reg);
- regval32 |= (1 << clk->enable_bit);
- omap_writel(regval32, clk->enable_reg);
- }
+ regval32 = __raw_readl(clk->enable_reg);
+ regval32 |= (1 << clk->enable_bit);
+ __raw_writel(regval32, clk->enable_reg);
} else {
- if (clk->flags & VIRTUAL_IO_ADDRESS) {
- regval16 = __raw_readw(clk->enable_reg);
- regval16 |= (1 << clk->enable_bit);
- __raw_writew(regval16, clk->enable_reg);
- } else {
- regval16 = omap_readw(clk->enable_reg);
- regval16 |= (1 << clk->enable_bit);
- omap_writew(regval16, clk->enable_reg);
- }
+ regval16 = __raw_readw(clk->enable_reg);
+ regval16 |= (1 << clk->enable_bit);
+ __raw_writew(regval16, clk->enable_reg);
}
return 0;
@@ -679,25 +667,13 @@ static void omap1_clk_disable_generic(struct clk *clk)
return;
if (clk->flags & ENABLE_REG_32BIT) {
- if (clk->flags & VIRTUAL_IO_ADDRESS) {
- regval32 = __raw_readl(clk->enable_reg);
- regval32 &= ~(1 << clk->enable_bit);
- __raw_writel(regval32, clk->enable_reg);
- } else {
- regval32 = omap_readl(clk->enable_reg);
- regval32 &= ~(1 << clk->enable_bit);
- omap_writel(regval32, clk->enable_reg);
- }
+ regval32 = __raw_readl(clk->enable_reg);
+ regval32 &= ~(1 << clk->enable_bit);
+ __raw_writel(regval32, clk->enable_reg);
} else {
- if (clk->flags & VIRTUAL_IO_ADDRESS) {
- regval16 = __raw_readw(clk->enable_reg);
- regval16 &= ~(1 << clk->enable_bit);
- __raw_writew(regval16, clk->enable_reg);
- } else {
- regval16 = omap_readw(clk->enable_reg);
- regval16 &= ~(1 << clk->enable_bit);
- omap_writew(regval16, clk->enable_reg);
- }
+ regval16 = __raw_readw(clk->enable_reg);
+ regval16 &= ~(1 << clk->enable_bit);
+ __raw_writew(regval16, clk->enable_reg);
}
}
@@ -745,17 +721,10 @@ static void __init omap1_clk_disable_unused(struct clk *clk)
}
/* Is the clock already disabled? */
- if (clk->flags & ENABLE_REG_32BIT) {
- if (clk->flags & VIRTUAL_IO_ADDRESS)
- regval32 = __raw_readl(clk->enable_reg);
- else
- regval32 = omap_readl(clk->enable_reg);
- } else {
- if (clk->flags & VIRTUAL_IO_ADDRESS)
- regval32 = __raw_readw(clk->enable_reg);
- else
- regval32 = omap_readw(clk->enable_reg);
- }
+ if (clk->flags & ENABLE_REG_32BIT)
+ regval32 = __raw_readl(clk->enable_reg);
+ else
+ regval32 = __raw_readw(clk->enable_reg);
if ((regval32 & (1 << clk->enable_bit)) == 0)
return;
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h
index ed343af5f12..1b4dd056d9b 100644
--- a/arch/arm/mach-omap1/clock.h
+++ b/arch/arm/mach-omap1/clock.h
@@ -165,7 +165,7 @@ static struct arm_idlect1_clk ck_dpll1out = {
.parent = &ck_dpll1,
.flags = CLOCK_IDLE_CONTROL |
ENABLE_REG_32BIT | RATE_PROPAGATES,
- .enable_reg = (void __iomem *)ARM_IDLECT2,
+ .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
.enable_bit = EN_CKOUT_ARM,
.recalc = &followparent_recalc,
},
@@ -177,7 +177,7 @@ static struct clk sossi_ck = {
.ops = &clkops_generic,
.parent = &ck_dpll1out.clk,
.flags = CLOCK_NO_IDLE_PARENT | ENABLE_REG_32BIT,
- .enable_reg = (void __iomem *)MOD_CONF_CTRL_1,
+ .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1),
.enable_bit = 16,
.recalc = &omap1_sossi_recalc,
.set_rate = &omap1_set_sossi_rate,
@@ -200,7 +200,7 @@ static struct arm_idlect1_clk armper_ck = {
.ops = &clkops_generic,
.parent = &ck_dpll1,
.flags = CLOCK_IDLE_CONTROL,
- .enable_reg = (void __iomem *)ARM_IDLECT2,
+ .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
.enable_bit = EN_PERCK,
.rate_offset = CKCTL_PERDIV_OFFSET,
.recalc = &omap1_ckctl_recalc,
@@ -214,7 +214,7 @@ static struct clk arm_gpio_ck = {
.name = "arm_gpio_ck",
.ops = &clkops_generic,
.parent = &ck_dpll1,
- .enable_reg = (void __iomem *)ARM_IDLECT2,
+ .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
.enable_bit = EN_GPIOCK,
.recalc = &followparent_recalc,
};
@@ -225,7 +225,7 @@ static struct arm_idlect1_clk armxor_ck = {
.ops = &clkops_generic,
.parent = &ck_ref,
.flags = CLOCK_IDLE_CONTROL,
- .enable_reg = (void __iomem *)ARM_IDLECT2,
+ .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
.enable_bit = EN_XORPCK,
.recalc = &followparent_recalc,
},
@@ -238,7 +238,7 @@ static struct arm_idlect1_clk armtim_ck = {
.ops = &clkops_generic,
.parent = &ck_ref,
.flags = CLOCK_IDLE_CONTROL,
- .enable_reg = (void __iomem *)ARM_IDLECT2,
+ .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
.enable_bit = EN_TIMCK,
.recalc = &followparent_recalc,
},
@@ -251,7 +251,7 @@ static struct arm_idlect1_clk armwdt_ck = {
.ops = &clkops_generic,
.parent = &ck_ref,
.flags = CLOCK_IDLE_CONTROL,
- .enable_reg = (void __iomem *)ARM_IDLECT2,
+ .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
.enable_bit = EN_WDTCK,
.recalc = &omap1_watchdog_recalc,
},
@@ -274,7 +274,7 @@ static struct clk dsp_ck = {
.name = "dsp_ck",
.ops = &clkops_generic,
.parent = &ck_dpll1,
- .enable_reg = (void __iomem *)ARM_CKCTL,
+ .enable_reg = OMAP1_IO_ADDRESS(ARM_CKCTL),
.enable_bit = EN_DSPCK,
.rate_offset = CKCTL_DSPDIV_OFFSET,
.recalc = &omap1_ckctl_recalc,
@@ -296,7 +296,6 @@ static struct clk dspper_ck = {
.name = "dspper_ck",
.ops = &clkops_dspck,
.parent = &ck_dpll1,
- .flags = VIRTUAL_IO_ADDRESS,
.enable_reg = DSP_IDLECT2,
.enable_bit = EN_PERCK,
.rate_offset = CKCTL_PERDIV_OFFSET,
@@ -309,7 +308,6 @@ static struct clk dspxor_ck = {
.name = "dspxor_ck",
.ops = &clkops_dspck,
.parent = &ck_ref,
- .flags = VIRTUAL_IO_ADDRESS,
.enable_reg = DSP_IDLECT2,
.enable_bit = EN_XORPCK,
.recalc = &followparent_recalc,
@@ -319,7 +317,6 @@ static struct clk dsptim_ck = {
.name = "dsptim_ck",
.ops = &clkops_dspck,
.parent = &ck_ref,
- .flags = VIRTUAL_IO_ADDRESS,
.enable_reg = DSP_IDLECT2,
.enable_bit = EN_DSPTIMCK,
.recalc = &followparent_recalc,
@@ -364,7 +361,7 @@ static struct clk l3_ocpi_ck = {
.name = "l3_ocpi_ck",
.ops = &clkops_generic,
.parent = &tc_ck.clk,
- .enable_reg = (void __iomem *)ARM_IDLECT3,
+ .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3),
.enable_bit = EN_OCPI_CK,
.recalc = &followparent_recalc,
};
@@ -373,7 +370,7 @@ static struct clk tc1_ck = {
.name = "tc1_ck",
.ops = &clkops_generic,
.parent = &tc_ck.clk,
- .enable_reg = (void __iomem *)ARM_IDLECT3,
+ .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3),
.enable_bit = EN_TC1_CK,
.recalc = &followparent_recalc,
};
@@ -382,7 +379,7 @@ static struct clk tc2_ck = {
.name = "tc2_ck",
.ops = &clkops_generic,
.parent = &tc_ck.clk,
- .enable_reg = (void __iomem *)ARM_IDLECT3,
+ .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3),
.enable_bit = EN_TC2_CK,
.recalc = &followparent_recalc,
};
@@ -408,7 +405,7 @@ static struct arm_idlect1_clk api_ck = {
.ops = &clkops_generic,
.parent = &tc_ck.clk,
.flags = CLOCK_IDLE_CONTROL,
- .enable_reg = (void __iomem *)ARM_IDLECT2,
+ .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
.enable_bit = EN_APICK,
.recalc = &followparent_recalc,
},
@@ -421,7 +418,7 @@ static struct arm_idlect1_clk lb_ck = {
.ops = &clkops_generic,
.parent = &tc_ck.clk,
.flags = CLOCK_IDLE_CONTROL,
- .enable_reg = (void __iomem *)ARM_IDLECT2,
+ .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
.enable_bit = EN_LBCK,
.recalc = &followparent_recalc,
},
@@ -446,7 +443,7 @@ static struct clk lcd_ck_16xx = {
.name = "lcd_ck",
.ops = &clkops_generic,
.parent = &ck_dpll1,
- .enable_reg = (void __iomem *)ARM_IDLECT2,
+ .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
.enable_bit = EN_LCDCK,
.rate_offset = CKCTL_LCDDIV_OFFSET,
.recalc = &omap1_ckctl_recalc,
@@ -460,7 +457,7 @@ static struct arm_idlect1_clk lcd_ck_1510 = {
.ops = &clkops_generic,
.parent = &ck_dpll1,
.flags = CLOCK_IDLE_CONTROL,
- .enable_reg = (void __iomem *)ARM_IDLECT2,
+ .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
.enable_bit = EN_LCDCK,
.rate_offset = CKCTL_LCDDIV_OFFSET,
.recalc = &omap1_ckctl_recalc,
@@ -477,7 +474,7 @@ static struct clk uart1_1510 = {
.parent = &armper_ck.clk,
.rate = 12000000,
.flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
- .enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
+ .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
.enable_bit = 29, /* Chooses between 12MHz and 48MHz */
.set_rate = &omap1_set_uart_rate,
.recalc = &omap1_uart_recalc,
@@ -492,7 +489,7 @@ static struct uart_clk uart1_16xx = {
.rate = 48000000,
.flags = RATE_FIXED | ENABLE_REG_32BIT |
CLOCK_NO_IDLE_PARENT,
- .enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
+ .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
.enable_bit = 29,
},
.sysc_addr = 0xfffb0054,
@@ -505,7 +502,7 @@ static struct clk uart2_ck = {
.parent = &armper_ck.clk,
.rate = 12000000,
.flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
- .enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
+ .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
.enable_bit = 30, /* Chooses between 12MHz and 48MHz */
.set_rate = &omap1_set_uart_rate,
.recalc = &omap1_uart_recalc,
@@ -518,7 +515,7 @@ static struct clk uart3_1510 = {
.parent = &armper_ck.clk,
.rate = 12000000,
.flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
- .enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
+ .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
.enable_bit = 31, /* Chooses between 12MHz and 48MHz */
.set_rate = &omap1_set_uart_rate,
.recalc = &omap1_uart_recalc,
@@ -533,7 +530,7 @@ static struct uart_clk uart3_16xx = {
.rate = 48000000,
.flags = RATE_FIXED | ENABLE_REG_32BIT |
CLOCK_NO_IDLE_PARENT,
- .enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
+ .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
.enable_bit = 31,
},
.sysc_addr = 0xfffb9854,
@@ -545,7 +542,7 @@ static struct clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */
/* Direct from ULPD, no parent */
.rate = 6000000,
.flags = RATE_FIXED | ENABLE_REG_32BIT,
- .enable_reg = (void __iomem *)ULPD_CLOCK_CTRL,
+ .enable_reg = OMAP1_IO_ADDRESS(ULPD_CLOCK_CTRL),
.enable_bit = USB_MCLK_EN_BIT,
};
@@ -555,7 +552,7 @@ static struct clk usb_hhc_ck1510 = {
/* Direct from ULPD, no parent */
.rate = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */
.flags = RATE_FIXED | ENABLE_REG_32BIT,
- .enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
+ .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
.enable_bit = USB_HOST_HHC_UHOST_EN,
};
@@ -566,7 +563,7 @@ static struct clk usb_hhc_ck16xx = {
.rate = 48000000,
/* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */
.flags = RATE_FIXED | ENABLE_REG_32BIT,
- .enable_reg = (void __iomem *)OTG_BASE + 0x08 /* OTG_SYSCON_2 */,
+ .enable_reg = OMAP1_IO_ADDRESS(OTG_BASE + 0x08), /* OTG_SYSCON_2 */
.enable_bit = 8 /* UHOST_EN */,
};
@@ -576,7 +573,7 @@ static struct clk usb_dc_ck = {
/* Direct from ULPD, no parent */
.rate = 48000000,
.flags = RATE_FIXED,
- .enable_reg = (void __iomem *)SOFT_REQ_REG,
+ .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
.enable_bit = 4,
};
@@ -586,15 +583,15 @@ static struct clk mclk_1510 = {
/* Direct from ULPD, no parent. May be enabled by ext hardware. */
.rate = 12000000,
.flags = RATE_FIXED,
- .enable_reg = (void __iomem *)SOFT_REQ_REG,
- .enable_bit = 6,
+ .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
+ .enable_bit = 6,
};
static struct clk mclk_16xx = {
.name = "mclk",
.ops = &clkops_generic,
/* Direct from ULPD, no parent. May be enabled by ext hardware. */
- .enable_reg = (void __iomem *)COM_CLK_DIV_CTRL_SEL,
+ .enable_reg = OMAP1_IO_ADDRESS(COM_CLK_DIV_CTRL_SEL),
.enable_bit = COM_ULPD_PLL_CLK_REQ,
.set_rate = &omap1_set_ext_clk_rate,
.round_rate = &omap1_round_ext_clk_rate,
@@ -613,7 +610,7 @@ static struct clk bclk_16xx = {
.name = "bclk",
.ops = &clkops_generic,
/* Direct from ULPD, no parent. May be enabled by ext hardware. */
- .enable_reg = (void __iomem *)SWD_CLK_DIV_CTRL_SEL,
+ .enable_reg = OMAP1_IO_ADDRESS(SWD_CLK_DIV_CTRL_SEL),
.enable_bit = SWD_ULPD_PLL_CLK_REQ,
.set_rate = &omap1_set_ext_clk_rate,
.round_rate = &omap1_round_ext_clk_rate,
@@ -627,7 +624,7 @@ static struct clk mmc1_ck = {
.parent = &armper_ck.clk,
.rate = 48000000,
.flags = RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
- .enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
+ .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
.enable_bit = 23,
};
@@ -639,7 +636,7 @@ static struct clk mmc2_ck = {
.parent = &armper_ck.clk,
.rate = 48000000,
.flags = RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
- .enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
+ .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
.enable_bit = 20,
};
diff --git a/arch/arm/plat-omap/include/mach/clock.h b/arch/arm/plat-omap/include/mach/clock.h
index cd69111cd33..8705902de1d 100644
--- a/arch/arm/plat-omap/include/mach/clock.h
+++ b/arch/arm/plat-omap/include/mach/clock.h
@@ -134,7 +134,6 @@ extern const struct clkops clkops_null;
#define RATE_PROPAGATES (1 << 2) /* Program children too */
/* bits 3-4 are free */
#define ENABLE_REG_32BIT (1 << 5) /* Use 32-bit access */
-#define VIRTUAL_IO_ADDRESS (1 << 6) /* Clock in virtual address */
#define CLOCK_IDLE_CONTROL (1 << 7)
#define CLOCK_NO_IDLE_PARENT (1 << 8)
#define DELAYED_APP (1 << 9) /* Delay application of clock */
--
cgit v1.2.3-70-g09d2
From 3f0a820c4c0b4670fb5f164baa5582e23c2ef118 Mon Sep 17 00:00:00 2001
From: Russell King <rmk@dyn-67.arm.linux.org.uk>
Date: Sat, 31 Jan 2009 10:05:51 +0000
Subject: [ARM] omap: create a proper tree of clocks
Traditionally, we've tracked the parent/child relationships between
clk structures by setting the child's parent member to point at the
upstream clock. As a result, when decending the tree, we have had
to scan all clocks to find the children.
Avoid this wasteful scanning by keeping a list of the clock's children.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
arch/arm/mach-omap1/clock.c | 3 ++
arch/arm/mach-omap1/clock.h | 7 +--
arch/arm/mach-omap2/clock.c | 4 +-
arch/arm/mach-omap2/clock24xx.c | 3 ++
arch/arm/mach-omap2/clock24xx.h | 28 ++++------
arch/arm/mach-omap2/clock34xx.c | 3 ++
arch/arm/mach-omap2/clock34xx.h | 96 ++++++---------------------------
arch/arm/plat-omap/clock.c | 51 +++++++++++-------
arch/arm/plat-omap/include/mach/clock.h | 7 ++-
9 files changed, 74 insertions(+), 128 deletions(-)
(limited to 'arch/arm/mach-omap1/clock.c')
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 1e477af666e..ccf989f4aa7 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -782,6 +782,9 @@ int __init omap1_clk_init(void)
/* By default all idlect1 clocks are allowed to idle */
arm_idlect1_mask = ~0;
+ for (c = omap_clks; c < omap_clks + ARRAY_SIZE(omap_clks); c++)
+ clk_init_one(c->lk.clk);
+
cpu_mask = 0;
if (cpu_is_omap16xx())
cpu_mask |= CK_16XX;
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h
index 1b4dd056d9b..28bc74e93e8 100644
--- a/arch/arm/mach-omap1/clock.h
+++ b/arch/arm/mach-omap1/clock.h
@@ -155,7 +155,6 @@ static struct clk ck_dpll1 = {
.name = "ck_dpll1",
.ops = &clkops_null,
.parent = &ck_ref,
- .flags = RATE_PROPAGATES,
};
static struct arm_idlect1_clk ck_dpll1out = {
@@ -163,8 +162,7 @@ static struct arm_idlect1_clk ck_dpll1out = {
.name = "ck_dpll1out",
.ops = &clkops_generic,
.parent = &ck_dpll1,
- .flags = CLOCK_IDLE_CONTROL |
- ENABLE_REG_32BIT | RATE_PROPAGATES,
+ .flags = CLOCK_IDLE_CONTROL | ENABLE_REG_32BIT,
.enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
.enable_bit = EN_CKOUT_ARM,
.recalc = &followparent_recalc,
@@ -187,7 +185,6 @@ static struct clk arm_ck = {
.name = "arm_ck",
.ops = &clkops_null,
.parent = &ck_dpll1,
- .flags = RATE_PROPAGATES,
.rate_offset = CKCTL_ARMDIV_OFFSET,
.recalc = &omap1_ckctl_recalc,
.round_rate = omap1_clk_round_rate_ckctl_arm,
@@ -328,7 +325,7 @@ static struct arm_idlect1_clk tc_ck = {
.name = "tc_ck",
.ops = &clkops_null,
.parent = &ck_dpll1,
- .flags = RATE_PROPAGATES | CLOCK_IDLE_CONTROL,
+ .flags = CLOCK_IDLE_CONTROL,
.rate_offset = CKCTL_TCDIV_OFFSET,
.recalc = &omap1_ckctl_recalc,
.round_rate = omap1_clk_round_rate_ckctl_arm,
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 478ca660fff..38a7898d0ce 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -175,7 +175,7 @@ void omap2_init_clksel_parent(struct clk *clk)
clk->name, clks->parent->name,
((clk->parent) ?
clk->parent->name : "NULL"));
- clk->parent = clks->parent;
+ clk_reparent(clk, clks->parent);
};
found = 1;
}
@@ -780,7 +780,7 @@ int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent)
if (clk->usecount > 0)
_omap2_clk_enable(clk);
- clk->parent = new_parent;
+ clk_reparent(clk, new_parent);
/* CLKSEL clocks follow their parents' rates, divided by a divisor */
clk->rate = new_parent->rate;
diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c
index 4564ae32ae0..1a885976c25 100644
--- a/arch/arm/mach-omap2/clock24xx.c
+++ b/arch/arm/mach-omap2/clock24xx.c
@@ -718,6 +718,9 @@ int __init omap2_clk_init(void)
omap2_sys_clk_recalc(&sys_ck);
propagate_rate(&sys_ck);
+ for (c = omap24xx_clks; c < omap24xx_clks + ARRAY_SIZE(omap24xx_clks); c++)
+ clk_init_one(c->lk.clk);
+
cpu_mask = 0;
if (cpu_is_omap2420())
cpu_mask |= CK_242X;
diff --git a/arch/arm/mach-omap2/clock24xx.h b/arch/arm/mach-omap2/clock24xx.h
index 7731ab6acd1..759489822ee 100644
--- a/arch/arm/mach-omap2/clock24xx.h
+++ b/arch/arm/mach-omap2/clock24xx.h
@@ -621,7 +621,7 @@ static struct clk func_32k_ck = {
.name = "func_32k_ck",
.ops = &clkops_null,
.rate = 32000,
- .flags = RATE_FIXED | RATE_PROPAGATES,
+ .flags = RATE_FIXED,
.clkdm_name = "wkup_clkdm",
};
@@ -629,7 +629,6 @@ static struct clk func_32k_ck = {
static struct clk osc_ck = { /* (*12, *13, 19.2, *26, 38.4)MHz */
.name = "osc_ck",
.ops = &clkops_oscck,
- .flags = RATE_PROPAGATES,
.clkdm_name = "wkup_clkdm",
.recalc = &omap2_osc_clk_recalc,
};
@@ -639,7 +638,6 @@ static struct clk sys_ck = { /* (*12, *13, 19.2, 26, 38.4)MHz */
.name = "sys_ck", /* ~ ref_clk also */
.ops = &clkops_null,
.parent = &osc_ck,
- .flags = RATE_PROPAGATES,
.clkdm_name = "wkup_clkdm",
.recalc = &omap2_sys_clk_recalc,
};
@@ -648,7 +646,7 @@ static struct clk alt_ck = { /* Typical 54M or 48M, may not exist */
.name = "alt_ck",
.ops = &clkops_null,
.rate = 54000000,
- .flags = RATE_FIXED | RATE_PROPAGATES,
+ .flags = RATE_FIXED,
.clkdm_name = "wkup_clkdm",
};
@@ -680,7 +678,6 @@ static struct clk dpll_ck = {
.ops = &clkops_null,
.parent = &sys_ck, /* Can be func_32k also */
.dpll_data = &dpll_dd,
- .flags = RATE_PROPAGATES,
.clkdm_name = "wkup_clkdm",
.recalc = &omap2_dpllcore_recalc,
.set_rate = &omap2_reprogram_dpllcore,
@@ -691,7 +688,7 @@ static struct clk apll96_ck = {
.ops = &clkops_fixed,
.parent = &sys_ck,
.rate = 96000000,
- .flags = RATE_FIXED | RATE_PROPAGATES | ENABLE_ON_INIT,
+ .flags = RATE_FIXED | ENABLE_ON_INIT,
.clkdm_name = "wkup_clkdm",
.enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
.enable_bit = OMAP24XX_EN_96M_PLL_SHIFT,
@@ -702,7 +699,7 @@ static struct clk apll54_ck = {
.ops = &clkops_fixed,
.parent = &sys_ck,
.rate = 54000000,
- .flags = RATE_FIXED | RATE_PROPAGATES | ENABLE_ON_INIT,
+ .flags = RATE_FIXED | ENABLE_ON_INIT,
.clkdm_name = "wkup_clkdm",
.enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
.enable_bit = OMAP24XX_EN_54M_PLL_SHIFT,
@@ -734,7 +731,6 @@ static struct clk func_54m_ck = {
.name = "func_54m_ck",
.ops = &clkops_null,
.parent = &apll54_ck, /* can also be alt_clk */
- .flags = RATE_PROPAGATES,
.clkdm_name = "wkup_clkdm",
.init = &omap2_init_clksel_parent,
.clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
@@ -747,7 +743,6 @@ static struct clk core_ck = {
.name = "core_ck",
.ops = &clkops_null,
.parent = &dpll_ck, /* can also be 32k */
- .flags = RATE_PROPAGATES,
.clkdm_name = "wkup_clkdm",
.recalc = &followparent_recalc,
};
@@ -774,7 +769,6 @@ static struct clk func_96m_ck = {
.name = "func_96m_ck",
.ops = &clkops_null,
.parent = &apll96_ck,
- .flags = RATE_PROPAGATES,
.clkdm_name = "wkup_clkdm",
.init = &omap2_init_clksel_parent,
.clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
@@ -807,7 +801,6 @@ static struct clk func_48m_ck = {
.name = "func_48m_ck",
.ops = &clkops_null,
.parent = &apll96_ck, /* 96M or Alt */
- .flags = RATE_PROPAGATES,
.clkdm_name = "wkup_clkdm",
.init = &omap2_init_clksel_parent,
.clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
@@ -823,7 +816,6 @@ static struct clk func_12m_ck = {
.ops = &clkops_null,
.parent = &func_48m_ck,
.fixed_div = 4,
- .flags = RATE_PROPAGATES,
.clkdm_name = "wkup_clkdm",
.recalc = &omap2_fixed_divisor_recalc,
};
@@ -876,7 +868,6 @@ static struct clk sys_clkout_src = {
.name = "sys_clkout_src",
.ops = &clkops_omap2_dflt,
.parent = &func_54m_ck,
- .flags = RATE_PROPAGATES,
.clkdm_name = "wkup_clkdm",
.enable_reg = OMAP24XX_PRCM_CLKOUT_CTRL,
.enable_bit = OMAP24XX_CLKOUT_EN_SHIFT,
@@ -921,7 +912,6 @@ static struct clk sys_clkout2_src = {
.name = "sys_clkout2_src",
.ops = &clkops_omap2_dflt,
.parent = &func_54m_ck,
- .flags = RATE_PROPAGATES,
.clkdm_name = "wkup_clkdm",
.enable_reg = OMAP24XX_PRCM_CLKOUT_CTRL,
.enable_bit = OMAP2420_CLKOUT2_EN_SHIFT,
@@ -992,7 +982,7 @@ static struct clk mpu_ck = { /* Control cpu */
.name = "mpu_ck",
.ops = &clkops_null,
.parent = &core_ck,
- .flags = DELAYED_APP | CONFIG_PARTICIPANT | RATE_PROPAGATES,
+ .flags = DELAYED_APP | CONFIG_PARTICIPANT,
.clkdm_name = "mpu_clkdm",
.init = &omap2_init_clksel_parent,
.clksel_reg = OMAP_CM_REGADDR(MPU_MOD, CM_CLKSEL),
@@ -1034,7 +1024,7 @@ static struct clk dsp_fck = {
.name = "dsp_fck",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_ck,
- .flags = DELAYED_APP | CONFIG_PARTICIPANT | RATE_PROPAGATES,
+ .flags = DELAYED_APP | CONFIG_PARTICIPANT,
.clkdm_name = "dsp_clkdm",
.enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN),
.enable_bit = OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT,
@@ -1102,7 +1092,7 @@ static struct clk iva1_ifck = {
.name = "iva1_ifck",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_ck,
- .flags = CONFIG_PARTICIPANT | RATE_PROPAGATES | DELAYED_APP,
+ .flags = CONFIG_PARTICIPANT | DELAYED_APP,
.clkdm_name = "iva1_clkdm",
.enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN),
.enable_bit = OMAP2420_EN_IVA_COP_SHIFT,
@@ -1165,7 +1155,7 @@ static struct clk core_l3_ck = { /* Used for ick and fck, interconnect */
.name = "core_l3_ck",
.ops = &clkops_null,
.parent = &core_ck,
- .flags = DELAYED_APP | CONFIG_PARTICIPANT | RATE_PROPAGATES,
+ .flags = DELAYED_APP | CONFIG_PARTICIPANT,
.clkdm_name = "core_l3_clkdm",
.clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1),
.clksel_mask = OMAP24XX_CLKSEL_L3_MASK,
@@ -1227,7 +1217,7 @@ static struct clk l4_ck = { /* used both as an ick and fck */
.name = "l4_ck",
.ops = &clkops_null,
.parent = &core_l3_ck,
- .flags = DELAYED_APP | RATE_PROPAGATES,
+ .flags = DELAYED_APP,
.clkdm_name = "core_l4_clkdm",
.clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1),
.clksel_mask = OMAP24XX_CLKSEL_L4_MASK,
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 75eb2546bb0..a853b1e149e 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -903,6 +903,9 @@ int __init omap2_clk_init(void)
clk_init(&omap2_clk_functions);
+ for (c = omap34xx_clks; c < omap34xx_clks + ARRAY_SIZE(omap34xx_clks); c++)
+ clk_init_one(c->lk.clk);
+
for (c = omap34xx_clks; c < omap34xx_clks + ARRAY_SIZE(omap34xx_clks); c++)
if (c->cpu & cpu_clkflg) {
clkdev_add(&c->lk);
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index 681acf0427c..2138a58f634 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -60,14 +60,14 @@ static struct clk omap_32k_fck = {
.name = "omap_32k_fck",
.ops = &clkops_null,
.rate = 32768,
- .flags = RATE_FIXED | RATE_PROPAGATES,
+ .flags = RATE_FIXED,
};
static struct clk secure_32k_fck = {
.name = "secure_32k_fck",
.ops = &clkops_null,
.rate = 32768,
- .flags = RATE_FIXED | RATE_PROPAGATES,
+ .flags = RATE_FIXED,
};
/* Virtual source clocks for osc_sys_ck */
@@ -75,42 +75,42 @@ static struct clk virt_12m_ck = {
.name = "virt_12m_ck",
.ops = &clkops_null,
.rate = 12000000,
- .flags = RATE_FIXED | RATE_PROPAGATES,
+ .flags = RATE_FIXED,
};
static struct clk virt_13m_ck = {
.name = "virt_13m_ck",
.ops = &clkops_null,
.rate = 13000000,
- .flags = RATE_FIXED | RATE_PROPAGATES,
+ .flags = RATE_FIXED,
};
static struct clk virt_16_8m_ck = {
.name = "virt_16_8m_ck",
.ops = &clkops_null,
.rate = 16800000,
- .flags = RATE_FIXED | RATE_PROPAGATES,
+ .flags = RATE_FIXED,
};
static struct clk virt_19_2m_ck = {
.name = "virt_19_2m_ck",
.ops = &clkops_null,
.rate = 19200000,
- .flags = RATE_FIXED | RATE_PROPAGATES,
+ .flags = RATE_FIXED,
};
static struct clk virt_26m_ck = {
.name = "virt_26m_ck",
.ops = &clkops_null,
.rate = 26000000,
- .flags = RATE_FIXED | RATE_PROPAGATES,
+ .flags = RATE_FIXED,
};
static struct clk virt_38_4m_ck = {
.name = "virt_38_4m_ck",
.ops = &clkops_null,
.rate = 38400000,
- .flags = RATE_FIXED | RATE_PROPAGATES,
+ .flags = RATE_FIXED,
};
static const struct clksel_rate osc_sys_12m_rates[] = {
@@ -163,7 +163,7 @@ static struct clk osc_sys_ck = {
.clksel_mask = OMAP3430_SYS_CLKIN_SEL_MASK,
.clksel = osc_sys_clksel,
/* REVISIT: deal with autoextclkmode? */
- .flags = RATE_FIXED | RATE_PROPAGATES,
+ .flags = RATE_FIXED,
.recalc = &omap2_clksel_recalc,
};
@@ -188,21 +188,18 @@ static struct clk sys_ck = {
.clksel_reg = OMAP3430_PRM_CLKSRC_CTRL,
.clksel_mask = OMAP_SYSCLKDIV_MASK,
.clksel = sys_clksel,
- .flags = RATE_PROPAGATES,
.recalc = &omap2_clksel_recalc,
};
static struct clk sys_altclk = {
.name = "sys_altclk",
.ops = &clkops_null,
- .flags = RATE_PROPAGATES,
};
/* Optional external clock input for some McBSPs */
static struct clk mcbsp_clks = {
.name = "mcbsp_clks",
.ops = &clkops_null,
- .flags = RATE_PROPAGATES,
};
/* PRM EXTERNAL CLOCK OUTPUT */
@@ -279,7 +276,6 @@ static struct clk dpll1_ck = {
.ops = &clkops_null,
.parent = &sys_ck,
.dpll_data = &dpll1_dd,
- .flags = RATE_PROPAGATES,
.round_rate = &omap2_dpll_round_rate,
.set_rate = &omap3_noncore_dpll_set_rate,
.clkdm_name = "dpll1_clkdm",
@@ -294,7 +290,6 @@ static struct clk dpll1_x2_ck = {
.name = "dpll1_x2_ck",
.ops = &clkops_null,
.parent = &dpll1_ck,
- .flags = RATE_PROPAGATES,
.clkdm_name = "dpll1_clkdm",
.recalc = &omap3_clkoutx2_recalc,
};
@@ -317,7 +312,6 @@ static struct clk dpll1_x2m2_ck = {
.clksel_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_CLKSEL2_PLL),
.clksel_mask = OMAP3430_MPU_DPLL_CLKOUT_DIV_MASK,
.clksel = div16_dpll1_x2m2_clksel,
- .flags = RATE_PROPAGATES,
.clkdm_name = "dpll1_clkdm",
.recalc = &omap2_clksel_recalc,
};
@@ -353,7 +347,6 @@ static struct clk dpll2_ck = {
.ops = &clkops_noncore_dpll_ops,
.parent = &sys_ck,
.dpll_data = &dpll2_dd,
- .flags = RATE_PROPAGATES,
.round_rate = &omap2_dpll_round_rate,
.set_rate = &omap3_noncore_dpll_set_rate,
.clkdm_name = "dpll2_clkdm",
@@ -378,7 +371,6 @@ static struct clk dpll2_m2_ck = {
OMAP3430_CM_CLKSEL2_PLL),
.clksel_mask = OMAP3430_IVA2_DPLL_CLKOUT_DIV_MASK,
.clksel = div16_dpll2_m2x2_clksel,
- .flags = RATE_PROPAGATES,
.clkdm_name = "dpll2_clkdm",
.recalc = &omap2_clksel_recalc,
};
@@ -413,7 +405,6 @@ static struct clk dpll3_ck = {
.ops = &clkops_null,
.parent = &sys_ck,
.dpll_data = &dpll3_dd,
- .flags = RATE_PROPAGATES,
.round_rate = &omap2_dpll_round_rate,
.clkdm_name = "dpll3_clkdm",
.recalc = &omap3_dpll_recalc,
@@ -427,7 +418,6 @@ static struct clk dpll3_x2_ck = {
.name = "dpll3_x2_ck",
.ops = &clkops_null,
.parent = &dpll3_ck,
- .flags = RATE_PROPAGATES,
.clkdm_name = "dpll3_clkdm",
.recalc = &omap3_clkoutx2_recalc,
};
@@ -481,7 +471,6 @@ static struct clk dpll3_m2_ck = {
.clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
.clksel_mask = OMAP3430_CORE_DPLL_CLKOUT_DIV_MASK,
.clksel = div31_dpll3m2_clksel,
- .flags = RATE_PROPAGATES,
.clkdm_name = "dpll3_clkdm",
.round_rate = &omap2_clksel_round_rate,
.set_rate = &omap3_core_dpll_m2_set_rate,
@@ -501,7 +490,6 @@ static struct clk core_ck = {
.clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST),
.clksel_mask = OMAP3430_ST_CORE_CLK_MASK,
.clksel = core_ck_clksel,
- .flags = RATE_PROPAGATES,
.recalc = &omap2_clksel_recalc,
};
@@ -518,7 +506,6 @@ static struct clk dpll3_m2x2_ck = {
.clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST),
.clksel_mask = OMAP3430_ST_CORE_CLK_MASK,
.clksel = dpll3_m2x2_ck_clksel,
- .flags = RATE_PROPAGATES,
.clkdm_name = "dpll3_clkdm",
.recalc = &omap2_clksel_recalc,
};
@@ -538,7 +525,6 @@ static struct clk dpll3_m3_ck = {
.clksel_reg = OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1),
.clksel_mask = OMAP3430_DIV_DPLL3_MASK,
.clksel = div16_dpll3_clksel,
- .flags = RATE_PROPAGATES,
.clkdm_name = "dpll3_clkdm",
.recalc = &omap2_clksel_recalc,
};
@@ -550,7 +536,7 @@ static struct clk dpll3_m3x2_ck = {
.parent = &dpll3_m3_ck,
.enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
.enable_bit = OMAP3430_PWRDN_EMU_CORE_SHIFT,
- .flags = RATE_PROPAGATES | INVERT_ENABLE,
+ .flags = INVERT_ENABLE,
.clkdm_name = "dpll3_clkdm",
.recalc = &omap3_clkoutx2_recalc,
};
@@ -569,7 +555,6 @@ static struct clk emu_core_alwon_ck = {
.clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST),
.clksel_mask = OMAP3430_ST_CORE_CLK_MASK,
.clksel = emu_core_alwon_ck_clksel,
- .flags = RATE_PROPAGATES,
.clkdm_name = "dpll3_clkdm",
.recalc = &omap2_clksel_recalc,
};
@@ -603,7 +588,6 @@ static struct clk dpll4_ck = {
.ops = &clkops_noncore_dpll_ops,
.parent = &sys_ck,
.dpll_data = &dpll4_dd,
- .flags = RATE_PROPAGATES,
.round_rate = &omap2_dpll_round_rate,
.set_rate = &omap3_dpll4_set_rate,
.clkdm_name = "dpll4_clkdm",
@@ -619,7 +603,6 @@ static struct clk dpll4_x2_ck = {
.name = "dpll4_x2_ck",
.ops = &clkops_null,
.parent = &dpll4_ck,
- .flags = RATE_PROPAGATES,
.clkdm_name = "dpll4_clkdm",
.recalc = &omap3_clkoutx2_recalc,
};
@@ -638,7 +621,6 @@ static struct clk dpll4_m2_ck = {
.clksel_reg = OMAP_CM_REGADDR(PLL_MOD, OMAP3430_CM_CLKSEL3),
.clksel_mask = OMAP3430_DIV_96M_MASK,
.clksel = div16_dpll4_clksel,
- .flags = RATE_PROPAGATES,
.clkdm_name = "dpll4_clkdm",
.recalc = &omap2_clksel_recalc,
};
@@ -650,7 +632,7 @@ static struct clk dpll4_m2x2_ck = {
.parent = &dpll4_m2_ck,
.enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
.enable_bit = OMAP3430_PWRDN_96M_SHIFT,
- .flags = RATE_PROPAGATES | INVERT_ENABLE,
+ .flags = INVERT_ENABLE,
.clkdm_name = "dpll4_clkdm",
.recalc = &omap3_clkoutx2_recalc,
};
@@ -675,7 +657,6 @@ static struct clk omap_96m_alwon_fck = {
.clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST),
.clksel_mask = OMAP3430_ST_PERIPH_CLK_MASK,
.clksel = omap_96m_alwon_fck_clksel,
- .flags = RATE_PROPAGATES,
.recalc = &omap2_clksel_recalc,
};
@@ -683,7 +664,6 @@ static struct clk cm_96m_fck = {
.name = "cm_96m_fck",
.ops = &clkops_null,
.parent = &omap_96m_alwon_fck,
- .flags = RATE_PROPAGATES,
.recalc = &followparent_recalc,
};
@@ -711,7 +691,6 @@ static struct clk omap_96m_fck = {
.clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
.clksel_mask = OMAP3430_SOURCE_96M_MASK,
.clksel = omap_96m_fck_clksel,
- .flags = RATE_PROPAGATES,
.recalc = &omap2_clksel_recalc,
};
@@ -724,7 +703,6 @@ static struct clk dpll4_m3_ck = {
.clksel_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_CLKSEL),
.clksel_mask = OMAP3430_CLKSEL_TV_MASK,
.clksel = div16_dpll4_clksel,
- .flags = RATE_PROPAGATES,
.clkdm_name = "dpll4_clkdm",
.recalc = &omap2_clksel_recalc,
};
@@ -737,7 +715,7 @@ static struct clk dpll4_m3x2_ck = {
.init = &omap2_init_clksel_parent,
.enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
.enable_bit = OMAP3430_PWRDN_TV_SHIFT,
- .flags = RATE_PROPAGATES | INVERT_ENABLE,
+ .flags = INVERT_ENABLE,
.clkdm_name = "dpll4_clkdm",
.recalc = &omap3_clkoutx2_recalc,
};
@@ -756,7 +734,6 @@ static struct clk virt_omap_54m_fck = {
.clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST),
.clksel_mask = OMAP3430_ST_PERIPH_CLK_MASK,
.clksel = virt_omap_54m_fck_clksel,
- .flags = RATE_PROPAGATES,
.recalc = &omap2_clksel_recalc,
};
@@ -783,7 +760,6 @@ static struct clk omap_54m_fck = {
.clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
.clksel_mask = OMAP3430_SOURCE_54M_MASK,
.clksel = omap_54m_clksel,
- .flags = RATE_PROPAGATES,
.recalc = &omap2_clksel_recalc,
};
@@ -810,7 +786,6 @@ static struct clk omap_48m_fck = {
.clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
.clksel_mask = OMAP3430_SOURCE_48M_MASK,
.clksel = omap_48m_clksel,
- .flags = RATE_PROPAGATES,
.recalc = &omap2_clksel_recalc,
};
@@ -819,7 +794,6 @@ static struct clk omap_12m_fck = {
.ops = &clkops_null,
.parent = &omap_48m_fck,
.fixed_div = 4,
- .flags = RATE_PROPAGATES,
.recalc = &omap2_fixed_divisor_recalc,
};
@@ -832,7 +806,6 @@ static struct clk dpll4_m4_ck = {
.clksel_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_CLKSEL),
.clksel_mask = OMAP3430_CLKSEL_DSS1_MASK,
.clksel = div16_dpll4_clksel,
- .flags = RATE_PROPAGATES,
.clkdm_name = "dpll4_clkdm",
.recalc = &omap2_clksel_recalc,
.set_rate = &omap2_clksel_set_rate,
@@ -846,7 +819,7 @@ static struct clk dpll4_m4x2_ck = {
.parent = &dpll4_m4_ck,
.enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
.enable_bit = OMAP3430_PWRDN_CAM_SHIFT,
- .flags = RATE_PROPAGATES | INVERT_ENABLE,
+ .flags = INVERT_ENABLE,
.clkdm_name = "dpll4_clkdm",
.recalc = &omap3_clkoutx2_recalc,
};
@@ -860,7 +833,6 @@ static struct clk dpll4_m5_ck = {
.clksel_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_CLKSEL),
.clksel_mask = OMAP3430_CLKSEL_CAM_MASK,
.clksel = div16_dpll4_clksel,
- .flags = RATE_PROPAGATES,
.clkdm_name = "dpll4_clkdm",
.recalc = &omap2_clksel_recalc,
};
@@ -872,7 +844,7 @@ static struct clk dpll4_m5x2_ck = {
.parent = &dpll4_m5_ck,
.enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
.enable_bit = OMAP3430_PWRDN_CAM_SHIFT,
- .flags = RATE_PROPAGATES | INVERT_ENABLE,
+ .flags = INVERT_ENABLE,
.clkdm_name = "dpll4_clkdm",
.recalc = &omap3_clkoutx2_recalc,
};
@@ -886,7 +858,6 @@ static struct clk dpll4_m6_ck = {
.clksel_reg = OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1),
.clksel_mask = OMAP3430_DIV_DPLL4_MASK,
.clksel = div16_dpll4_clksel,
- .flags = RATE_PROPAGATES,
.clkdm_name = "dpll4_clkdm",
.recalc = &omap2_clksel_recalc,
};
@@ -899,7 +870,7 @@ static struct clk dpll4_m6x2_ck = {
.init = &omap2_init_clksel_parent,
.enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
.enable_bit = OMAP3430_PWRDN_EMU_PERIPH_SHIFT,
- .flags = RATE_PROPAGATES | INVERT_ENABLE,
+ .flags = INVERT_ENABLE,
.clkdm_name = "dpll4_clkdm",
.recalc = &omap3_clkoutx2_recalc,
};
@@ -908,7 +879,6 @@ static struct clk emu_per_alwon_ck = {
.name = "emu_per_alwon_ck",
.ops = &clkops_null,
.parent = &dpll4_m6x2_ck,
- .flags = RATE_PROPAGATES,
.clkdm_name = "dpll4_clkdm",
.recalc = &followparent_recalc,
};
@@ -943,7 +913,6 @@ static struct clk dpll5_ck = {
.ops = &clkops_noncore_dpll_ops,
.parent = &sys_ck,
.dpll_data = &dpll5_dd,
- .flags = RATE_PROPAGATES,
.round_rate = &omap2_dpll_round_rate,
.set_rate = &omap3_noncore_dpll_set_rate,
.clkdm_name = "dpll5_clkdm",
@@ -963,7 +932,6 @@ static struct clk dpll5_m2_ck = {
.clksel_reg = OMAP_CM_REGADDR(PLL_MOD, OMAP3430ES2_CM_CLKSEL5),
.clksel_mask = OMAP3430ES2_DIV_120M_MASK,
.clksel = div16_dpll5_clksel,
- .flags = RATE_PROPAGATES,
.clkdm_name = "dpll5_clkdm",
.recalc = &omap2_clksel_recalc,
};
@@ -982,7 +950,6 @@ static struct clk omap_120m_fck = {
.clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST2),
.clksel_mask = OMAP3430ES2_ST_PERIPH2_CLK_MASK,
.clksel = omap_120m_fck_clksel,
- .flags = RATE_PROPAGATES,
.recalc = &omap2_clksel_recalc,
};
@@ -1025,7 +992,6 @@ static struct clk clkout2_src_ck = {
.clksel_reg = OMAP3430_CM_CLKOUT_CTRL,
.clksel_mask = OMAP3430_CLKOUT2SOURCE_MASK,
.clksel = clkout2_src_clksel,
- .flags = RATE_PROPAGATES,
.clkdm_name = "core_clkdm",
.recalc = &omap2_clksel_recalc,
};
@@ -1060,7 +1026,6 @@ static struct clk corex2_fck = {
.name = "corex2_fck",
.ops = &clkops_null,
.parent = &dpll3_m2x2_ck,
- .flags = RATE_PROPAGATES,
.recalc = &followparent_recalc,
};
@@ -1090,7 +1055,6 @@ static struct clk dpll1_fck = {
.clksel_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_CLKSEL1_PLL),
.clksel_mask = OMAP3430_MPU_CLK_SRC_MASK,
.clksel = div4_core_clksel,
- .flags = RATE_PROPAGATES,
.recalc = &omap2_clksel_recalc,
};
@@ -1114,7 +1078,6 @@ static struct clk mpu_ck = {
.clksel_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_IDLEST_PLL),
.clksel_mask = OMAP3430_ST_MPU_CLK_MASK,
.clksel = mpu_clksel,
- .flags = RATE_PROPAGATES,
.clkdm_name = "mpu_clkdm",
.recalc = &omap2_clksel_recalc,
};
@@ -1139,7 +1102,6 @@ static struct clk arm_fck = {
.clksel_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_IDLEST_PLL),
.clksel_mask = OMAP3430_ST_MPU_CLK_MASK,
.clksel = arm_fck_clksel,
- .flags = RATE_PROPAGATES,
.recalc = &omap2_clksel_recalc,
};
@@ -1153,7 +1115,6 @@ static struct clk emu_mpu_alwon_ck = {
.name = "emu_mpu_alwon_ck",
.ops = &clkops_null,
.parent = &mpu_ck,
- .flags = RATE_PROPAGATES,
.recalc = &followparent_recalc,
};
@@ -1165,7 +1126,6 @@ static struct clk dpll2_fck = {
.clksel_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_CLKSEL1_PLL),
.clksel_mask = OMAP3430_IVA2_CLK_SRC_MASK,
.clksel = div4_core_clksel,
- .flags = RATE_PROPAGATES,
.recalc = &omap2_clksel_recalc,
};
@@ -1193,7 +1153,6 @@ static struct clk iva2_ck = {
OMAP3430_CM_IDLEST_PLL),
.clksel_mask = OMAP3430_ST_IVA2_CLK_MASK,
.clksel = iva2_clksel,
- .flags = RATE_PROPAGATES,
.clkdm_name = "iva2_clkdm",
.recalc = &omap2_clksel_recalc,
};
@@ -1213,7 +1172,6 @@ static struct clk l3_ick = {
.clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL),
.clksel_mask = OMAP3430_CLKSEL_L3_MASK,
.clksel = div2_core_clksel,
- .flags = RATE_PROPAGATES,
.clkdm_name = "core_l3_clkdm",
.recalc = &omap2_clksel_recalc,
};
@@ -1231,7 +1189,6 @@ static struct clk l4_ick = {
.clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL),
.clksel_mask = OMAP3430_CLKSEL_L4_MASK,
.clksel = div2_l3_clksel,
- .flags = RATE_PROPAGATES,
.clkdm_name = "core_l4_clkdm",
.recalc = &omap2_clksel_recalc,
@@ -1281,7 +1238,6 @@ static struct clk gfx_l3_fck = {
.clksel_reg = OMAP_CM_REGADDR(GFX_MOD, CM_CLKSEL),
.clksel_mask = OMAP_CLKSEL_GFX_MASK,
.clksel = gfx_l3_clksel,
- .flags = RATE_PROPAGATES,
.clkdm_name = "gfx_3430es1_clkdm",
.recalc = &omap2_clksel_recalc,
};
@@ -1440,7 +1396,6 @@ static struct clk core_96m_fck = {
.name = "core_96m_fck",
.ops = &clkops_null,
.parent = &omap_96m_fck,
- .flags = RATE_PROPAGATES,
.clkdm_name = "core_l4_clkdm",
.recalc = &followparent_recalc,
};
@@ -1574,7 +1529,6 @@ static struct clk core_48m_fck = {
.name = "core_48m_fck",
.ops = &clkops_null,
.parent = &omap_48m_fck,
- .flags = RATE_PROPAGATES,
.clkdm_name = "core_l4_clkdm",
.recalc = &followparent_recalc,
};
@@ -1652,7 +1606,6 @@ static struct clk core_12m_fck = {
.name = "core_12m_fck",
.ops = &clkops_null,
.parent = &omap_12m_fck,
- .flags = RATE_PROPAGATES,
.clkdm_name = "core_l4_clkdm",
.recalc = &followparent_recalc,
};
@@ -1692,7 +1645,6 @@ static struct clk ssi_ssr_fck = {
.clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL),
.clksel_mask = OMAP3430_CLKSEL_SSI_MASK,
.clksel = ssi_ssr_clksel,
- .flags = RATE_PROPAGATES,
.clkdm_name = "core_l4_clkdm",
.recalc = &omap2_clksel_recalc,
};
@@ -1718,7 +1670,6 @@ static struct clk core_l3_ick = {
.ops = &clkops_null,
.parent = &l3_ick,
.init = &omap2_init_clk_clkdm,
- .flags = RATE_PROPAGATES,
.clkdm_name = "core_l3_clkdm",
.recalc = &followparent_recalc,
};
@@ -1759,7 +1710,6 @@ static struct clk security_l3_ick = {
.name = "security_l3_ick",
.ops = &clkops_null,
.parent = &l3_ick,
- .flags = RATE_PROPAGATES,
.recalc = &followparent_recalc,
};
@@ -1779,7 +1729,6 @@ static struct clk core_l4_ick = {
.ops = &clkops_null,
.parent = &l4_ick,
.init = &omap2_init_clk_clkdm,
- .flags = RATE_PROPAGATES,
.clkdm_name = "core_l4_clkdm",
.recalc = &followparent_recalc,
};
@@ -2062,7 +2011,6 @@ static struct clk ssi_l4_ick = {
.name = "ssi_l4_ick",
.ops = &clkops_null,
.parent = &l4_ick,
- .flags = RATE_PROPAGATES,
.clkdm_name = "core_l4_clkdm",
.recalc = &followparent_recalc,
};
@@ -2106,7 +2054,6 @@ static struct clk security_l4_ick2 = {
.name = "security_l4_ick2",
.ops = &clkops_null,
.parent = &l4_ick,
- .flags = RATE_PROPAGATES,
.recalc = &followparent_recalc,
};
@@ -2350,7 +2297,6 @@ static struct clk wkup_32k_fck = {
.ops = &clkops_null,
.init = &omap2_init_clk_clkdm,
.parent = &omap_32k_fck,
- .flags = RATE_PROPAGATES,
.clkdm_name = "wkup_clkdm",
.recalc = &followparent_recalc,
};
@@ -2379,7 +2325,6 @@ static struct clk wkup_l4_ick = {
.name = "wkup_l4_ick",
.ops = &clkops_null,
.parent = &sys_ck,
- .flags = RATE_PROPAGATES,
.clkdm_name = "wkup_clkdm",
.recalc = &followparent_recalc,
};
@@ -2466,7 +2411,6 @@ static struct clk per_96m_fck = {
.ops = &clkops_null,
.parent = &omap_96m_alwon_fck,
.init = &omap2_init_clk_clkdm,
- .flags = RATE_PROPAGATES,
.clkdm_name = "per_clkdm",
.recalc = &followparent_recalc,
};
@@ -2476,7 +2420,6 @@ static struct clk per_48m_fck = {
.ops = &clkops_null,
.parent = &omap_48m_fck,
.init = &omap2_init_clk_clkdm,
- .flags = RATE_PROPAGATES,
.clkdm_name = "per_clkdm",
.recalc = &followparent_recalc,
};
@@ -2600,7 +2543,6 @@ static struct clk per_32k_alwon_fck = {
.ops = &clkops_null,
.parent = &omap_32k_fck,
.clkdm_name = "per_clkdm",
- .flags = RATE_PROPAGATES,
.recalc = &followparent_recalc,
};
@@ -2668,7 +2610,6 @@ static struct clk per_l4_ick = {
.name = "per_l4_ick",
.ops = &clkops_null,
.parent = &l4_ick,
- .flags = RATE_PROPAGATES,
.clkdm_name = "per_clkdm",
.recalc = &followparent_recalc,
};
@@ -2948,7 +2889,6 @@ static struct clk emu_src_ck = {
.clksel_reg = OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1),
.clksel_mask = OMAP3430_MUX_CTRL_MASK,
.clksel = emu_src_clksel,
- .flags = RATE_PROPAGATES,
.clkdm_name = "emu_clkdm",
.recalc = &omap2_clksel_recalc,
};
@@ -2973,7 +2913,6 @@ static struct clk pclk_fck = {
.clksel_reg = OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1),
.clksel_mask = OMAP3430_CLKSEL_PCLK_MASK,
.clksel = pclk_emu_clksel,
- .flags = RATE_PROPAGATES,
.clkdm_name = "emu_clkdm",
.recalc = &omap2_clksel_recalc,
};
@@ -2997,7 +2936,6 @@ static struct clk pclkx2_fck = {
.clksel_reg = OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1),
.clksel_mask = OMAP3430_CLKSEL_PCLKX2_MASK,
.clksel = pclkx2_emu_clksel,
- .flags = RATE_PROPAGATES,
.clkdm_name = "emu_clkdm",
.recalc = &omap2_clksel_recalc,
};
@@ -3014,7 +2952,6 @@ static struct clk atclk_fck = {
.clksel_reg = OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1),
.clksel_mask = OMAP3430_CLKSEL_ATCLK_MASK,
.clksel = atclk_emu_clksel,
- .flags = RATE_PROPAGATES,
.clkdm_name = "emu_clkdm",
.recalc = &omap2_clksel_recalc,
};
@@ -3026,7 +2963,6 @@ static struct clk traceclk_src_fck = {
.clksel_reg = OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1),
.clksel_mask = OMAP3430_TRACE_MUX_CTRL_MASK,
.clksel = emu_src_clksel,
- .flags = RATE_PROPAGATES,
.clkdm_name = "emu_clkdm",
.recalc = &omap2_clksel_recalc,
};
@@ -3063,7 +2999,6 @@ static struct clk sr1_fck = {
.parent = &sys_ck,
.enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_SR1_SHIFT,
- .flags = RATE_PROPAGATES,
.recalc = &followparent_recalc,
};
@@ -3074,7 +3009,6 @@ static struct clk sr2_fck = {
.parent = &sys_ck,
.enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_SR2_SHIFT,
- .flags = RATE_PROPAGATES,
.recalc = &followparent_recalc,
};
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index 54da27af0bd..6a1737a7447 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -143,8 +143,7 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
if (ret == 0) {
if (clk->recalc)
clk->recalc(clk);
- if (clk->flags & RATE_PROPAGATES)
- propagate_rate(clk);
+ propagate_rate(clk);
}
spin_unlock_irqrestore(&clockfw_lock, flags);
@@ -166,8 +165,7 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
if (ret == 0) {
if (clk->recalc)
clk->recalc(clk);
- if (clk->flags & RATE_PROPAGATES)
- propagate_rate(clk);
+ propagate_rate(clk);
}
spin_unlock_irqrestore(&clockfw_lock, flags);
@@ -214,24 +212,31 @@ void followparent_recalc(struct clk *clk)
clk->rate = clk->parent->rate;
}
+void clk_reparent(struct clk *child, struct clk *parent)
+{
+ list_del_init(&child->sibling);
+ if (parent)
+ list_add(&child->sibling, &parent->children);
+ child->parent = parent;
+
+ /* now do the debugfs renaming to reattach the child
+ to the proper parent */
+}
+
/* Propagate rate to children */
void propagate_rate(struct clk * tclk)
{
struct clk *clkp;
- if (tclk == NULL || IS_ERR(tclk))
- return;
-
- list_for_each_entry(clkp, &clocks, node) {
- if (likely(clkp->parent != tclk))
- continue;
+ list_for_each_entry(clkp, &tclk->children, sibling) {
if (clkp->recalc)
clkp->recalc(clkp);
- if (clkp->flags & RATE_PROPAGATES)
- propagate_rate(clkp);
+ propagate_rate(clkp);
}
}
+static LIST_HEAD(root_clks);
+
/**
* recalculate_root_clocks - recalculate and propagate all root clocks
*
@@ -243,16 +248,18 @@ void recalculate_root_clocks(void)
{
struct clk *clkp;
- list_for_each_entry(clkp, &clocks, node) {
- if (!clkp->parent) {
- if (clkp->recalc)
- clkp->recalc(clkp);
- if (clkp->flags & RATE_PROPAGATES)
- propagate_rate(clkp);
- }
+ list_for_each_entry(clkp, &root_clks, sibling) {
+ if (clkp->recalc)
+ clkp->recalc(clkp);
+ propagate_rate(clkp);
}
}
+void clk_init_one(struct clk *clk)
+{
+ INIT_LIST_HEAD(&clk->children);
+}
+
int clk_register(struct clk *clk)
{
if (clk == NULL || IS_ERR(clk))
@@ -265,6 +272,11 @@ int clk_register(struct clk *clk)
return 0;
mutex_lock(&clocks_mutex);
+ if (clk->parent)
+ list_add(&clk->sibling, &clk->parent->children);
+ else
+ list_add(&clk->sibling, &root_clks);
+
list_add(&clk->node, &clocks);
if (clk->init)
clk->init(clk);
@@ -280,6 +292,7 @@ void clk_unregister(struct clk *clk)
return;
mutex_lock(&clocks_mutex);
+ list_del(&clk->sibling);
list_del(&clk->node);
mutex_unlock(&clocks_mutex);
}
diff --git a/arch/arm/plat-omap/include/mach/clock.h b/arch/arm/plat-omap/include/mach/clock.h
index 8705902de1d..af6ae4fa46d 100644
--- a/arch/arm/plat-omap/include/mach/clock.h
+++ b/arch/arm/plat-omap/include/mach/clock.h
@@ -70,6 +70,8 @@ struct clk {
const char *name;
int id;
struct clk *parent;
+ struct list_head children;
+ struct list_head sibling; /* node for children */
unsigned long rate;
__u32 flags;
void __iomem *enable_reg;
@@ -115,7 +117,9 @@ struct clk_functions {
extern unsigned int mpurate;
extern int clk_init(struct clk_functions *custom_clocks);
+extern void clk_init_one(struct clk *clk);
extern int clk_register(struct clk *clk);
+extern void clk_reparent(struct clk *child, struct clk *parent);
extern void clk_unregister(struct clk *clk);
extern void propagate_rate(struct clk *clk);
extern void recalculate_root_clocks(void);
@@ -131,8 +135,7 @@ extern const struct clkops clkops_null;
/* Clock flags */
/* bit 0 is free */
#define RATE_FIXED (1 << 1) /* Fixed clock rate */
-#define RATE_PROPAGATES (1 << 2) /* Program children too */
-/* bits 3-4 are free */
+/* bits 2-4 are free */
#define ENABLE_REG_32BIT (1 << 5) /* Use 32-bit access */
#define CLOCK_IDLE_CONTROL (1 << 7)
#define CLOCK_NO_IDLE_PARENT (1 << 8)
--
cgit v1.2.3-70-g09d2
From 8b9dbc16d4f5786c6c930ab028722e3ed7e4285b Mon Sep 17 00:00:00 2001
From: Russell King <rmk@dyn-67.arm.linux.org.uk>
Date: Thu, 12 Feb 2009 10:12:59 +0000
Subject: [ARM] omap: arrange for clock recalc methods to return the rate
linux-omap source commit 33d000c99ee393fe2042f93e8422f94976d276ce
introduces a way to "dry run" clock changes before they're committed.
However, this involves putting logic to handle this into each and
every recalc function, and unfortunately due to the caching, led to
some bugs.
Solve both of issues by making the recalc methods always return the
clock rate for the clock, which the caller decides what to do with.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
arch/arm/mach-omap1/clock.c | 32 ++++++++++++--------------------
arch/arm/mach-omap1/clock.h | 10 +++++-----
arch/arm/mach-omap2/clock.c | 17 +++++++++--------
arch/arm/mach-omap2/clock.h | 4 ++--
arch/arm/mach-omap2/clock24xx.c | 20 ++++++++++----------
arch/arm/mach-omap2/clock24xx.h | 10 +++++-----
arch/arm/mach-omap2/clock34xx.c | 12 +++++++-----
arch/arm/mach-omap2/clock34xx.h | 4 ++--
arch/arm/plat-omap/clock.c | 15 ++++++---------
arch/arm/plat-omap/include/mach/clock.h | 4 ++--
10 files changed, 60 insertions(+), 68 deletions(-)
(limited to 'arch/arm/mach-omap1/clock.c')
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index ccf989f4aa7..dafe4f71d15 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -156,27 +156,25 @@ __u32 arm_idlect1_mask;
* Omap1 specific clock functions
*-------------------------------------------------------------------------*/
-static void omap1_watchdog_recalc(struct clk * clk)
+static unsigned long omap1_watchdog_recalc(struct clk *clk)
{
- clk->rate = clk->parent->rate / 14;
+ return clk->parent->rate / 14;
}
-static void omap1_uart_recalc(struct clk * clk)
+static unsigned long omap1_uart_recalc(struct clk *clk)
{
unsigned int val = __raw_readl(clk->enable_reg);
- if (val & clk->enable_bit)
- clk->rate = 48000000;
- else
- clk->rate = 12000000;
+ return val & clk->enable_bit ? 48000000 : 12000000;
}
-static void omap1_sossi_recalc(struct clk *clk)
+static unsigned long omap1_sossi_recalc(struct clk *clk)
{
u32 div = omap_readl(MOD_CONF_CTRL_1);
div = (div >> 17) & 0x7;
div++;
- clk->rate = clk->parent->rate / div;
+
+ return clk->parent->rate / div;
}
static int omap1_clk_enable_dsp_domain(struct clk *clk)
@@ -344,19 +342,15 @@ static int calc_dsor_exp(struct clk *clk, unsigned long rate)
return dsor_exp;
}
-static void omap1_ckctl_recalc(struct clk * clk)
+static unsigned long omap1_ckctl_recalc(struct clk *clk)
{
- int dsor;
-
/* Calculate divisor encoded as 2-bit exponent */
- dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset));
+ int dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset));
- if (unlikely(clk->rate == clk->parent->rate / dsor))
- return; /* No change, quick exit */
- clk->rate = clk->parent->rate / dsor;
+ return clk->parent->rate / dsor;
}
-static void omap1_ckctl_recalc_dsp_domain(struct clk * clk)
+static unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk)
{
int dsor;
@@ -371,9 +365,7 @@ static void omap1_ckctl_recalc_dsp_domain(struct clk * clk)
dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset));
omap1_clk_disable(&api_ck.clk);
- if (unlikely(clk->rate == clk->parent->rate / dsor))
- return; /* No change, quick exit */
- clk->rate = clk->parent->rate / dsor;
+ return clk->parent->rate / dsor;
}
/* MPU virtual clock functions */
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h
index 28bc74e93e8..17f87427125 100644
--- a/arch/arm/mach-omap1/clock.h
+++ b/arch/arm/mach-omap1/clock.h
@@ -13,14 +13,14 @@
#ifndef __ARCH_ARM_MACH_OMAP1_CLOCK_H
#define __ARCH_ARM_MACH_OMAP1_CLOCK_H
-static void omap1_ckctl_recalc(struct clk * clk);
-static void omap1_watchdog_recalc(struct clk * clk);
+static unsigned long omap1_ckctl_recalc(struct clk *clk);
+static unsigned long omap1_watchdog_recalc(struct clk *clk);
static int omap1_set_sossi_rate(struct clk *clk, unsigned long rate);
-static void omap1_sossi_recalc(struct clk *clk);
-static void omap1_ckctl_recalc_dsp_domain(struct clk * clk);
+static unsigned long omap1_sossi_recalc(struct clk *clk);
+static unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk);
static int omap1_clk_set_rate_dsp_domain(struct clk * clk, unsigned long rate);
static int omap1_set_uart_rate(struct clk * clk, unsigned long rate);
-static void omap1_uart_recalc(struct clk * clk);
+static unsigned long omap1_uart_recalc(struct clk *clk);
static int omap1_set_ext_clk_rate(struct clk * clk, unsigned long rate);
static long omap1_round_ext_clk_rate(struct clk * clk, unsigned long rate);
static void omap1_init_ext_clk(struct clk * clk);
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 1b40d757500..5020cb1f2e7 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -239,11 +239,11 @@ u32 omap2_get_dpll_rate(struct clk *clk)
* Used for clocks that have the same value as the parent clock,
* divided by some factor
*/
-void omap2_fixed_divisor_recalc(struct clk *clk)
+unsigned long omap2_fixed_divisor_recalc(struct clk *clk)
{
WARN_ON(!clk->fixed_div);
- clk->rate = clk->parent->rate / clk->fixed_div;
+ return clk->parent->rate / clk->fixed_div;
}
/**
@@ -449,21 +449,22 @@ err:
* Used for clocks that are part of CLKSEL_xyz governed clocks.
* REVISIT: Maybe change to use clk->enable() functions like on omap1?
*/
-void omap2_clksel_recalc(struct clk *clk)
+unsigned long omap2_clksel_recalc(struct clk *clk)
{
+ unsigned long rate;
u32 div = 0;
pr_debug("clock: recalc'ing clksel clk %s\n", clk->name);
div = omap2_clksel_get_divisor(clk);
if (div == 0)
- return;
+ return clk->rate;
- if (clk->rate == (clk->parent->rate / div))
- return;
- clk->rate = clk->parent->rate / div;
+ rate = clk->parent->rate / div;
+
+ pr_debug("clock: new clock rate is %ld (div %d)\n", rate, div);
- pr_debug("clock: new clock rate is %ld (div %d)\n", clk->rate, div);
+ return rate;
}
/**
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 90077f0df78..ca6bf226859 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -36,7 +36,7 @@ void omap2_clk_disable_unused(struct clk *clk);
#define omap2_clk_disable_unused NULL
#endif
-void omap2_clksel_recalc(struct clk *clk);
+unsigned long omap2_clksel_recalc(struct clk *clk);
void omap2_init_clk_clkdm(struct clk *clk);
void omap2_init_clksel_parent(struct clk *clk);
u32 omap2_clksel_get_divisor(struct clk *clk);
@@ -44,7 +44,7 @@ u32 omap2_clksel_round_rate_div(struct clk *clk, unsigned long target_rate,
u32 *new_div);
u32 omap2_clksel_to_divisor(struct clk *clk, u32 field_val);
u32 omap2_divisor_to_clksel(struct clk *clk, u32 div);
-void omap2_fixed_divisor_recalc(struct clk *clk);
+unsigned long omap2_fixed_divisor_recalc(struct clk *clk);
long omap2_clksel_round_rate(struct clk *clk, unsigned long target_rate);
int omap2_clksel_set_rate(struct clk *clk, unsigned long rate);
u32 omap2_get_dpll_rate(struct clk *clk);
diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c
index 069f3e1827a..f2b74e9b7d8 100644
--- a/arch/arm/mach-omap2/clock24xx.c
+++ b/arch/arm/mach-omap2/clock24xx.c
@@ -369,9 +369,9 @@ static long omap2_dpllcore_round_rate(unsigned long target_rate)
}
-static void omap2_dpllcore_recalc(struct clk *clk)
+static unsigned long omap2_dpllcore_recalc(struct clk *clk)
{
- clk->rate = omap2_get_dpll_rate_24xx(clk);
+ return omap2_get_dpll_rate_24xx(clk);
}
static int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate)
@@ -448,9 +448,9 @@ static int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate)
*
* Set virt_prcm_set's rate to the mpu_speed field of the current PRCM set.
*/
-static void omap2_table_mpu_recalc(struct clk *clk)
+static unsigned long omap2_table_mpu_recalc(struct clk *clk)
{
- clk->rate = curr_prcm_set->mpu_speed;
+ return curr_prcm_set->mpu_speed;
}
/*
@@ -647,14 +647,14 @@ static u32 omap2_get_sysclkdiv(void)
return div;
}
-static void omap2_osc_clk_recalc(struct clk *clk)
+static unsigned long omap2_osc_clk_recalc(struct clk *clk)
{
- clk->rate = omap2_get_apll_clkin() * omap2_get_sysclkdiv();
+ return omap2_get_apll_clkin() * omap2_get_sysclkdiv();
}
-static void omap2_sys_clk_recalc(struct clk *clk)
+static unsigned long omap2_sys_clk_recalc(struct clk *clk)
{
- clk->rate = clk->parent->rate / omap2_get_sysclkdiv();
+ return clk->parent->rate / omap2_get_sysclkdiv();
}
/*
@@ -707,9 +707,9 @@ int __init omap2_clk_init(void)
clk_init(&omap2_clk_functions);
- omap2_osc_clk_recalc(&osc_ck);
+ osc_ck.rate = omap2_osc_clk_recalc(&osc_ck);
propagate_rate(&osc_ck);
- omap2_sys_clk_recalc(&sys_ck);
+ sys_ck.rate = omap2_sys_clk_recalc(&sys_ck);
propagate_rate(&sys_ck);
for (c = omap24xx_clks; c < omap24xx_clks + ARRAY_SIZE(omap24xx_clks); c++)
diff --git a/arch/arm/mach-omap2/clock24xx.h b/arch/arm/mach-omap2/clock24xx.h
index 759489822ee..11da6215392 100644
--- a/arch/arm/mach-omap2/clock24xx.h
+++ b/arch/arm/mach-omap2/clock24xx.h
@@ -24,13 +24,13 @@
#include "cm-regbits-24xx.h"
#include "sdrc.h"
-static void omap2_table_mpu_recalc(struct clk *clk);
+static unsigned long omap2_table_mpu_recalc(struct clk *clk);
static int omap2_select_table_rate(struct clk *clk, unsigned long rate);
static long omap2_round_to_table_rate(struct clk *clk, unsigned long rate);
-static void omap2_sys_clk_recalc(struct clk *clk);
-static void omap2_osc_clk_recalc(struct clk *clk);
-static void omap2_sys_clk_recalc(struct clk *clk);
-static void omap2_dpllcore_recalc(struct clk *clk);
+static unsigned long omap2_sys_clk_recalc(struct clk *clk);
+static unsigned long omap2_osc_clk_recalc(struct clk *clk);
+static unsigned long omap2_sys_clk_recalc(struct clk *clk);
+static unsigned long omap2_dpllcore_recalc(struct clk *clk);
static int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate);
/* Key dividers which make up a PRCM set. Ratio's for a PRCM are mandated.
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 3b6e27bc9fe..fb0f53b9681 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -289,9 +289,9 @@ static struct omap_clk omap34xx_clks[] = {
*
* Recalculate and propagate the DPLL rate.
*/
-static void omap3_dpll_recalc(struct clk *clk)
+static unsigned long omap3_dpll_recalc(struct clk *clk)
{
- clk->rate = omap2_get_dpll_rate(clk);
+ return omap2_get_dpll_rate(clk);
}
/* _omap3_dpll_write_clken - write clken_bits arg to a DPLL's enable bits */
@@ -787,9 +787,10 @@ static void omap3_dpll_deny_idle(struct clk *clk)
* Using parent clock DPLL data, look up DPLL state. If locked, set our
* rate to the dpll_clk * 2; otherwise, just use dpll_clk.
*/
-static void omap3_clkoutx2_recalc(struct clk *clk)
+static unsigned long omap3_clkoutx2_recalc(struct clk *clk)
{
const struct dpll_data *dd;
+ unsigned long rate;
u32 v;
struct clk *pclk;
@@ -808,9 +809,10 @@ static void omap3_clkoutx2_recalc(struct clk *clk)
v = __raw_readl(dd->control_reg) & dd->enable_mask;
v >>= __ffs(dd->enable_mask);
if (v != DPLL_LOCKED)
- clk->rate = clk->parent->rate;
+ rate = clk->parent->rate;
else
- clk->rate = clk->parent->rate * 2;
+ rate = clk->parent->rate * 2;
+ return rate;
}
/* Common clock code */
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index 2138a58f634..764c7cd9fd8 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -27,8 +27,8 @@
#include "prm.h"
#include "prm-regbits-34xx.h"
-static void omap3_dpll_recalc(struct clk *clk);
-static void omap3_clkoutx2_recalc(struct clk *clk);
+static unsigned long omap3_dpll_recalc(struct clk *clk);
+static unsigned long omap3_clkoutx2_recalc(struct clk *clk);
static void omap3_dpll_allow_idle(struct clk *clk);
static void omap3_dpll_deny_idle(struct clk *clk);
static u32 omap3_dpll_autoidle_read(struct clk *clk);
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index 9833d73511a..08baa18497b 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -126,7 +126,7 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
ret = arch_clock->clk_set_rate(clk, rate);
if (ret == 0) {
if (clk->recalc)
- clk->recalc(clk);
+ clk->rate = clk->recalc(clk);
propagate_rate(clk);
}
spin_unlock_irqrestore(&clockfw_lock, flags);
@@ -148,7 +148,7 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
ret = arch_clock->clk_set_parent(clk, parent);
if (ret == 0) {
if (clk->recalc)
- clk->recalc(clk);
+ clk->rate = clk->recalc(clk);
propagate_rate(clk);
}
spin_unlock_irqrestore(&clockfw_lock, flags);
@@ -188,12 +188,9 @@ static int __init omap_clk_setup(char *str)
__setup("mpurate=", omap_clk_setup);
/* Used for clocks that always have same value as the parent clock */
-void followparent_recalc(struct clk *clk)
+unsigned long followparent_recalc(struct clk *clk)
{
- if (clk == NULL || IS_ERR(clk))
- return;
-
- clk->rate = clk->parent->rate;
+ return clk->parent->rate;
}
void clk_reparent(struct clk *child, struct clk *parent)
@@ -214,7 +211,7 @@ void propagate_rate(struct clk * tclk)
list_for_each_entry(clkp, &tclk->children, sibling) {
if (clkp->recalc)
- clkp->recalc(clkp);
+ clkp->rate = clkp->recalc(clkp);
propagate_rate(clkp);
}
}
@@ -234,7 +231,7 @@ void recalculate_root_clocks(void)
list_for_each_entry(clkp, &root_clks, sibling) {
if (clkp->recalc)
- clkp->recalc(clkp);
+ clkp->rate = clkp->recalc(clkp);
propagate_rate(clkp);
}
}
diff --git a/arch/arm/plat-omap/include/mach/clock.h b/arch/arm/plat-omap/include/mach/clock.h
index 0ba28462a49..7b6f6bcbff9 100644
--- a/arch/arm/plat-omap/include/mach/clock.h
+++ b/arch/arm/plat-omap/include/mach/clock.h
@@ -75,7 +75,7 @@ struct clk {
unsigned long rate;
__u32 flags;
void __iomem *enable_reg;
- void (*recalc)(struct clk *);
+ unsigned long (*recalc)(struct clk *);
int (*set_rate)(struct clk *, unsigned long);
long (*round_rate)(struct clk *, unsigned long);
void (*init)(struct clk *);
@@ -123,7 +123,7 @@ extern void clk_reparent(struct clk *child, struct clk *parent);
extern void clk_unregister(struct clk *clk);
extern void propagate_rate(struct clk *clk);
extern void recalculate_root_clocks(void);
-extern void followparent_recalc(struct clk *clk);
+extern unsigned long followparent_recalc(struct clk *clk);
extern void clk_enable_init_clocks(void);
#ifdef CONFIG_CPU_FREQ
extern void clk_init_cpufreq_table(struct cpufreq_frequency_table **table);
--
cgit v1.2.3-70-g09d2