From 650f7a72b8cc235ffe4a0e3eff37954349026721 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 1 Dec 2011 17:47:06 -0800 Subject: ARM: OMAP1: Fix reprogramming of DPLL1 for systems that boot at rates below 60MHz Commit e9b7086b80c4d9e354f4edc9e280ae85a60df408 (ARM: OMAP: Fix reprogramming of dpll1 rate) fixed a regression for systems that did not rely on bootloader set rates. However, it also introduced a new problem where the rates selected in .config would not take affect as omap1_select_table_rate currently refuses to reprogram DPLL1 if it's already initialized. This was not a problem earlier, as the reprogramming was done earlier with ck_dpll1_p->rate uninitialized. Fix this by forcing the reprogramming on systems booting at rates below 60MHz. Note that the long term fix is to make the rates SoC specific later on. Thanks for Janusz Krzysztofik for figuring this one out. Reported-by: Janusz Krzysztofik Acked-by: Janusz Krzysztofik Signed-off-by: Tony Lindgren --- arch/arm/mach-omap1/clock_data.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/mach-omap1') diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c index 1297bb58869..3f305610efa 100644 --- a/arch/arm/mach-omap1/clock_data.c +++ b/arch/arm/mach-omap1/clock_data.c @@ -930,6 +930,9 @@ void __init omap1_clk_late_init(void) if (ck_dpll1.rate >= OMAP1_DPLL1_SANE_VALUE) return; + /* System booting at unusable rate, force reprogramming of DPLL1 */ + ck_dpll1_p->rate = 0; + /* Find the highest supported frequency and enable it */ if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) { pr_err("System frequencies not set, using default. Check your config.\n"); -- cgit v1.2.3-70-g09d2 From c2cb211116192690605eaa70d39deb04241003e2 Mon Sep 17 00:00:00 2001 From: Janusz Krzysztofik Date: Thu, 1 Dec 2011 21:13:01 +0100 Subject: ARM: OMAP1: Fix ckctl value used for dpll1 defualt rate Use the exact value found in omap1_rate_table, otherwise I have been experiencing issues with correct timekeeping on my Amstrad Delta. Signed-off-by: Janusz Krzysztofik [tony@atomide.com: removed comment referencing a development branch] Signed-off-by: Tony Lindgren --- arch/arm/mach-omap1/clock_data.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-omap1') diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c index 3f305610efa..86b2dec1178 100644 --- a/arch/arm/mach-omap1/clock_data.c +++ b/arch/arm/mach-omap1/clock_data.c @@ -937,7 +937,7 @@ void __init omap1_clk_late_init(void) if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) { pr_err("System frequencies not set, using default. Check your config.\n"); omap_writew(0x2290, DPLL_CTL); - omap_writew(cpu_is_omap7xx() ? 0x3005 : 0x1005, ARM_CKCTL); + omap_writew(cpu_is_omap7xx() ? 0x2005 : 0x0005, ARM_CKCTL); ck_dpll1.rate = OMAP1_DPLL1_SANE_VALUE; } propagate_rate(&ck_dpll1); -- cgit v1.2.3-70-g09d2 From 6560ee07dc946e94f7cc2cd8e3b5a5f5ee7340c1 Mon Sep 17 00:00:00 2001 From: Janusz Krzysztofik Date: Thu, 1 Dec 2011 21:13:02 +0100 Subject: ARM: OMAP1: recalculate loops per jiffy after dpll1 reprogram Otherwise timing is inaccurate, resulting in devices which depend on it, like omap-keypad, broken. Tested on Amstrad Delta. Signed-off-by: Janusz Krzysztofik [tony@atomide.com: removed comment referencing a development branch] Signed-off-by: Tony Lindgren --- arch/arm/mach-omap1/clock_data.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-omap1') diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c index 86b2dec1178..9ff90a744a2 100644 --- a/arch/arm/mach-omap1/clock_data.c +++ b/arch/arm/mach-omap1/clock_data.c @@ -16,6 +16,8 @@ #include #include +#include +#include #include #include /* for machine_is_* */ @@ -927,7 +929,9 @@ int __init omap1_clk_init(void) void __init omap1_clk_late_init(void) { - if (ck_dpll1.rate >= OMAP1_DPLL1_SANE_VALUE) + unsigned long rate = ck_dpll1.rate; + + if (rate >= OMAP1_DPLL1_SANE_VALUE) return; /* System booting at unusable rate, force reprogramming of DPLL1 */ @@ -942,4 +946,5 @@ void __init omap1_clk_late_init(void) } propagate_rate(&ck_dpll1); omap1_show_rates(); + loops_per_jiffy = cpufreq_scale(loops_per_jiffy, rate, ck_dpll1.rate); } -- cgit v1.2.3-70-g09d2