From 724019b0137acf2ea43e5ca854798851f5ebf51f Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Fri, 1 Jul 2011 22:54:00 +0200 Subject: OMAP2+: hwmod: Fix smart-standby + wakeup support The commit 86009eb326afde34ffdc5648cd344aa86b8d58d4 was adding the wakeup support for new OMAP4 IPs. This support is incomplete for busmaster IPs that need as well to use smart-standby with wakeup. This new standbymode is suported on HSI and USB_HOST_FS for the moment. Add the new MSTANDBY_SMART_WKUP flag to mark the IPs that support this capability. Enable this new mode when applicable in _enable_wakeup, _disable_wakeup, _enable_sysc and _idle_sysc. The omap_hwmod_44xx_data.c will have to be updated to add this new flag. Signed-off-by: Benoit Cousson Signed-off-by: Djamil Elaidi Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod.c | 34 ++++++++++++++++++++++++++++------ 1 file changed, 28 insertions(+), 6 deletions(-) (limited to 'arch/arm/mach-omap2/omap_hwmod.c') diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 293fa6cd50e..384d3c3ec36 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -391,7 +391,8 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) if (!oh->class->sysc || !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || - (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP))) + (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || + (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP))) return -EINVAL; if (!oh->class->sysc->sysc_fields) { @@ -405,6 +406,8 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); + if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) + _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); /* XXX test pwrdm_get_wken for this hwmod's subsystem */ @@ -426,7 +429,8 @@ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) if (!oh->class->sysc || !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || - (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP))) + (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || + (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP))) return -EINVAL; if (!oh->class->sysc->sysc_fields) { @@ -440,6 +444,8 @@ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v); + if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) + _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); /* XXX test pwrdm_get_wken for this hwmod's subsystem */ @@ -781,8 +787,16 @@ static void _enable_sysc(struct omap_hwmod *oh) } if (sf & SYSC_HAS_MIDLEMODE) { - idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ? - HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART; + if (oh->flags & HWMOD_SWSUP_MSTANDBY) { + idlemode = HWMOD_IDLEMODE_NO; + } else { + if (sf & SYSC_HAS_ENAWAKEUP) + _enable_wakeup(oh, &v); + if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) + idlemode = HWMOD_IDLEMODE_SMART_WKUP; + else + idlemode = HWMOD_IDLEMODE_SMART; + } _set_master_standbymode(oh, idlemode, &v); } @@ -840,8 +854,16 @@ static void _idle_sysc(struct omap_hwmod *oh) } if (sf & SYSC_HAS_MIDLEMODE) { - idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ? - HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART; + if (oh->flags & HWMOD_SWSUP_MSTANDBY) { + idlemode = HWMOD_IDLEMODE_FORCE; + } else { + if (sf & SYSC_HAS_ENAWAKEUP) + _enable_wakeup(oh, &v); + if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) + idlemode = HWMOD_IDLEMODE_SMART_WKUP; + else + idlemode = HWMOD_IDLEMODE_SMART; + } _set_master_standbymode(oh, idlemode, &v); } -- cgit v1.2.3-70-g09d2 From 6481c73c22613660a5b791d2b4d0faf60508d731 Mon Sep 17 00:00:00 2001 From: Miguel Vadillo Date: Fri, 1 Jul 2011 22:54:02 +0200 Subject: OMAP2+: hwmod: Enable module in shutdown to access sysconfig When calling the shutdown, the module may be already in idle. Accessing the sysconfig register will then lead to a crash. In that case, re-enable the module in order to allow the access to the sysconfig register. Signed-off-by: Miguel Vadillo Signed-off-by: Benoit Cousson Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2/omap_hwmod.c') diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 384d3c3ec36..cbc2a8a4ce3 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1396,8 +1396,11 @@ static int _shutdown(struct omap_hwmod *oh) } } - if (oh->class->sysc) + if (oh->class->sysc) { + if (oh->_state == _HWMOD_STATE_IDLE) + _enable(oh); _shutdown_sysc(oh); + } /* * If an IP contains only one HW reset line, then assert it -- cgit v1.2.3-70-g09d2 From 1fe741139be5acfe3758b53cdbf0b5e3d26db3fe Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Fri, 1 Jul 2011 22:54:03 +0200 Subject: OMAP2+: hwmod: Do not write the enawakeup bit if SYSC_HAS_ENAWAKEUP is not set The Type 2 type of IPs will not have any enawakeup bit in their sysconfig. Writing to that bit will instead trigger a softreset. Check the flag to write this bit only if the module supports it. Reported-by: Miguel Vadillo Signed-off-by: Benoit Cousson Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod.c | 14 ++++---------- 1 file changed, 4 insertions(+), 10 deletions(-) (limited to 'arch/arm/mach-omap2/omap_hwmod.c') diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index cbc2a8a4ce3..3800084a1e7 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -387,8 +387,6 @@ static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle, */ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) { - u32 wakeup_mask; - if (!oh->class->sysc || !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || @@ -400,9 +398,8 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) return -EINVAL; } - wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift); - - *v |= wakeup_mask; + if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) + *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift; if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); @@ -425,8 +422,6 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) */ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) { - u32 wakeup_mask; - if (!oh->class->sysc || !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || @@ -438,9 +433,8 @@ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) return -EINVAL; } - wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift); - - *v &= ~wakeup_mask; + if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) + *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift); if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v); -- cgit v1.2.3-70-g09d2 From d24bcaa3fa711f7dd9c4aacf3c58083cf666418f Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Fri, 1 Jul 2011 22:54:04 +0200 Subject: OMAP2+: hwmod: Remove _populate_mpu_rt_base warning It is perfectly valid for some hwmod to not have any register target address for sysconfig. This is especially true for interconnect hwmods. Remove the warning. Signed-off-by: Benoit Cousson Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod.c | 3 --- 1 file changed, 3 deletions(-) (limited to 'arch/arm/mach-omap2/omap_hwmod.c') diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 3800084a1e7..f4014179d60 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1704,9 +1704,6 @@ static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data) return 0; oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index); - if (!oh->_mpu_rt_va) - pr_warning("omap_hwmod: %s found no _mpu_rt_va for %s\n", - __func__, oh->name); return 0; } -- cgit v1.2.3-70-g09d2 From 31f62866c578b3d47ef7810b336e9e193b90167f Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Fri, 1 Jul 2011 22:54:05 +0200 Subject: OMAP2+: hwmod: Fix the HW reset management The HW reset must be de-assert after the clocks are enabled but before waiting for the target to be ready. Otherwise the reset might not work properly since the clock is not running to proceed the reset. De-assert the reset after _enable_clocks and before _wait_target_ready. Re-assert it only when the clocks are disabled. Signed-off-by: Benoit Cousson Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) (limited to 'arch/arm/mach-omap2/omap_hwmod.c') diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index f4014179d60..df91bb1dc97 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1250,15 +1250,6 @@ static int _enable(struct omap_hwmod *oh) pr_debug("omap_hwmod: %s: enabling\n", oh->name); - /* - * If an IP contains only one HW reset line, then de-assert it in order - * to allow to enable the clocks. Otherwise the PRCM will return - * Intransition status, and the init will failed. - */ - if ((oh->_state == _HWMOD_STATE_INITIALIZED || - oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1) - _deassert_hardreset(oh, oh->rst_lines[0].name); - /* Mux pins for device runtime if populated */ if (oh->mux && (!oh->mux->enabled || ((oh->_state == _HWMOD_STATE_IDLE) && @@ -1268,6 +1259,15 @@ static int _enable(struct omap_hwmod *oh) _add_initiator_dep(oh, mpu_oh); _enable_clocks(oh); + /* + * If an IP contains only one HW reset line, then de-assert it in order + * to allow the module state transition. Otherwise the PRCM will return + * Intransition status, and the init will failed. + */ + if ((oh->_state == _HWMOD_STATE_INITIALIZED || + oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1) + _deassert_hardreset(oh, oh->rst_lines[0].name); + r = _wait_target_ready(oh); if (!r) { oh->_state = _HWMOD_STATE_ENABLED; @@ -1396,13 +1396,6 @@ static int _shutdown(struct omap_hwmod *oh) _shutdown_sysc(oh); } - /* - * If an IP contains only one HW reset line, then assert it - * before disabling the clocks and shutting down the IP. - */ - if (oh->rst_lines_cnt == 1) - _assert_hardreset(oh, oh->rst_lines[0].name); - /* clocks and deps are already disabled in idle */ if (oh->_state == _HWMOD_STATE_ENABLED) { _del_initiator_dep(oh, mpu_oh); @@ -1411,6 +1404,13 @@ static int _shutdown(struct omap_hwmod *oh) } /* XXX Should this code also force-disable the optional clocks? */ + /* + * If an IP contains only one HW reset line, then assert it + * after disabling the clocks and before shutting down the IP. + */ + if (oh->rst_lines_cnt == 1) + _assert_hardreset(oh, oh->rst_lines[0].name); + /* Mux pins to safe mode or use populated off mode values */ if (oh->mux) omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED); -- cgit v1.2.3-70-g09d2 From 6652271a2556c086c04658dce16de2947e849ffd Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Fri, 1 Jul 2011 22:54:06 +0200 Subject: OMAP: hwmod: Add warnings if enable failed Change the debug into warning to check what IPs are failing. Signed-off-by: Benoit Cousson Cc: Rajendra Nayak Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/mach-omap2/omap_hwmod.c') diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index df91bb1dc97..64e98304621 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -944,6 +944,8 @@ static int _init_clocks(struct omap_hwmod *oh, void *data) if (!ret) oh->_state = _HWMOD_STATE_CLKS_INITED; + else + pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name); return ret; } -- cgit v1.2.3-70-g09d2 From 34617e2a4d331fdd8172077d8c70a0421fc136e6 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Fri, 1 Jul 2011 22:54:07 +0200 Subject: OMAP: hwmod: Move pr_debug to improve the readability Move the pr_debug at the top of the function to trace the entry even if the first test is failing. That help understanding that we entered the function but failed in it. Move the _enable last part out of the test to reduce indentation and improve readability. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod.c | 32 +++++++++++++++++--------------- 1 file changed, 17 insertions(+), 15 deletions(-) (limited to 'arch/arm/mach-omap2/omap_hwmod.c') diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 64e98304621..e530bcbdebf 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1242,6 +1242,8 @@ static int _enable(struct omap_hwmod *oh) { int r; + pr_debug("omap_hwmod: %s: enabling\n", oh->name); + if (oh->_state != _HWMOD_STATE_INITIALIZED && oh->_state != _HWMOD_STATE_IDLE && oh->_state != _HWMOD_STATE_DISABLED) { @@ -1250,8 +1252,6 @@ static int _enable(struct omap_hwmod *oh) return -EINVAL; } - pr_debug("omap_hwmod: %s: enabling\n", oh->name); - /* Mux pins for device runtime if populated */ if (oh->mux && (!oh->mux->enabled || ((oh->_state == _HWMOD_STATE_IDLE) && @@ -1271,19 +1271,21 @@ static int _enable(struct omap_hwmod *oh) _deassert_hardreset(oh, oh->rst_lines[0].name); r = _wait_target_ready(oh); - if (!r) { - oh->_state = _HWMOD_STATE_ENABLED; - - /* Access the sysconfig only if the target is ready */ - if (oh->class->sysc) { - if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED)) - _update_sysc_cache(oh); - _enable_sysc(oh); - } - } else { - _disable_clocks(oh); + if (r) { pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n", oh->name, r); + _disable_clocks(oh); + + return r; + } + + oh->_state = _HWMOD_STATE_ENABLED; + + /* Access the sysconfig only if the target is ready */ + if (oh->class->sysc) { + if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED)) + _update_sysc_cache(oh); + _enable_sysc(oh); } return r; @@ -1299,14 +1301,14 @@ static int _enable(struct omap_hwmod *oh) */ static int _idle(struct omap_hwmod *oh) { + pr_debug("omap_hwmod: %s: idling\n", oh->name); + if (oh->_state != _HWMOD_STATE_ENABLED) { WARN(1, "omap_hwmod: %s: idle state can only be entered from " "enabled state\n", oh->name); return -EINVAL; } - pr_debug("omap_hwmod: %s: idling\n", oh->name); - if (oh->class->sysc) _idle_sysc(oh); _del_initiator_dep(oh, mpu_oh); -- cgit v1.2.3-70-g09d2 From 78183f3fdf76f422431a81852468be01b36db325 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Sat, 9 Jul 2011 19:14:05 -0600 Subject: omap_hwmod: use a null structure record to terminate omap_hwmod_addr_space arrays Previously, struct omap_hwmod_addr_space arrays were unterminated; and users of these arrays used the ARRAY_SIZE() macro to determine the length of the array. However, ARRAY_SIZE() only works when the array is in the same scope as the macro user. So far this hasn't been a problem. However, to reduce duplicated data, a subsequent patch will move common data to a separate, shared file. When this is done, ARRAY_SIZE() will no longer be usable. This patch removes ARRAY_SIZE() usage for struct omap_hwmod_addr_space arrays and uses a null structure member as the array terminator instead. Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod.c | 45 +++++-- arch/arm/mach-omap2/omap_hwmod_2420_data.c | 66 +++++------ arch/arm/mach-omap2/omap_hwmod_2430_data.c | 83 +++++++------ arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 108 ++++++++--------- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 170 +++++++++++++-------------- arch/arm/plat-omap/include/plat/omap_hwmod.h | 2 - 6 files changed, 249 insertions(+), 225 deletions(-) (limited to 'arch/arm/mach-omap2/omap_hwmod.c') diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 293fa6cd50e..77094d75367 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -2,6 +2,7 @@ * omap_hwmod implementation for OMAP2/3/4 * * Copyright (C) 2009-2011 Nokia Corporation + * Copyright (C) 2011 Texas Instruments, Inc. * * Paul Walmsley, Benoît Cousson, Kevin Hilman * @@ -677,6 +678,29 @@ static void _disable_optional_clocks(struct omap_hwmod *oh) } } +/** + * _count_ocp_if_addr_spaces - count the number of address space entries for @oh + * @oh: struct omap_hwmod *oh + * + * Count and return the number of address space ranges associated with + * the hwmod @oh. Used to allocate struct resource data. Returns 0 + * if @oh is NULL. + */ +static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os) +{ + struct omap_hwmod_addr_space *mem; + int i = 0; + + if (!os || !os->addr) + return 0; + + do { + mem = &os->addr[i++]; + } while (mem->pa_start != mem->pa_end); + + return i; +} + /** * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use * @oh: struct omap_hwmod * @@ -722,8 +746,7 @@ static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index) { struct omap_hwmod_ocp_if *os; struct omap_hwmod_addr_space *mem; - int i; - int found = 0; + int i = 0, found = 0; void __iomem *va_start; if (!oh || oh->slaves_cnt == 0) @@ -731,12 +754,14 @@ static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index) os = oh->slaves[index]; - for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) { - if (mem->flags & ADDR_TYPE_RT) { + if (!os->addr) + return NULL; + + do { + mem = &os->addr[i++]; + if (mem->flags & ADDR_TYPE_RT) found = 1; - break; - } - } + } while (!found && mem->pa_start != mem->pa_end); if (found) { va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start); @@ -1942,7 +1967,7 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh) ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt; for (i = 0; i < oh->slaves_cnt; i++) - ret += oh->slaves[i]->addr_cnt; + ret += _count_ocp_if_addr_spaces(oh->slaves[i]); return ret; } @@ -1982,10 +2007,12 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) for (i = 0; i < oh->slaves_cnt; i++) { struct omap_hwmod_ocp_if *os; + int addr_cnt; os = oh->slaves[i]; + addr_cnt = _count_ocp_if_addr_spaces(os); - for (j = 0; j < os->addr_cnt; j++) { + for (j = 0; j < addr_cnt; j++) { (res + r)->name = (os->addr + j)->name; (res + r)->start = (os->addr + j)->pa_start; (res + r)->end = (os->addr + j)->pa_end; diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index c4d0ae87d62..1a7ce3ec0c0 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -1,7 +1,7 @@ /* * omap_hwmod_2420_data.c - hardware modules present on the OMAP2420 chips * - * Copyright (C) 2009-2010 Nokia Corporation + * Copyright (C) 2009-2011 Nokia Corporation * Paul Walmsley * * This program is free software; you can redistribute it and/or modify @@ -120,6 +120,7 @@ static struct omap_hwmod_addr_space omap2420_mcspi1_addr_space[] = { .pa_end = 0x480980ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi1 = { @@ -127,7 +128,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi1 = { .slave = &omap2420_mcspi1_hwmod, .clk = "mcspi1_ick", .addr = omap2420_mcspi1_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_mcspi1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -138,6 +138,7 @@ static struct omap_hwmod_addr_space omap2420_mcspi2_addr_space[] = { .pa_end = 0x4809a0ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi2 = { @@ -145,7 +146,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi2 = { .slave = &omap2420_mcspi2_hwmod, .clk = "mcspi2_ick", .addr = omap2420_mcspi2_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_mcspi2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -163,6 +163,7 @@ static struct omap_hwmod_addr_space omap2420_uart1_addr_space[] = { .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { @@ -170,7 +171,6 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { .slave = &omap2420_uart1_hwmod, .clk = "uart1_ick", .addr = omap2420_uart1_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_uart1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -181,6 +181,7 @@ static struct omap_hwmod_addr_space omap2420_uart2_addr_space[] = { .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { @@ -188,7 +189,6 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { .slave = &omap2420_uart2_hwmod, .clk = "uart2_ick", .addr = omap2420_uart2_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_uart2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -199,6 +199,7 @@ static struct omap_hwmod_addr_space omap2420_uart3_addr_space[] = { .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { @@ -206,7 +207,6 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { .slave = &omap2420_uart3_hwmod, .clk = "uart3_ick", .addr = omap2420_uart3_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_uart3_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -220,6 +220,7 @@ static struct omap_hwmod_addr_space omap2420_i2c1_addr_space[] = { .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = { @@ -227,7 +228,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = { .slave = &omap2420_i2c1_hwmod, .clk = "i2c1_ick", .addr = omap2420_i2c1_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_i2c1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -238,6 +238,7 @@ static struct omap_hwmod_addr_space omap2420_i2c2_addr_space[] = { .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = { @@ -245,7 +246,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = { .slave = &omap2420_i2c2_hwmod, .clk = "i2c2_ick", .addr = omap2420_i2c2_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_i2c2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -370,6 +370,7 @@ static struct omap_hwmod_addr_space omap2420_timer1_addrs[] = { .pa_end = 0x48028000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_wkup -> timer1 */ @@ -378,7 +379,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__timer1 = { .slave = &omap2420_timer1_hwmod, .clk = "gpt1_ick", .addr = omap2420_timer1_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -420,6 +420,7 @@ static struct omap_hwmod_addr_space omap2420_timer2_addrs[] = { .pa_end = 0x4802a000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer2 */ @@ -428,7 +429,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer2 = { .slave = &omap2420_timer2_hwmod, .clk = "gpt2_ick", .addr = omap2420_timer2_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -470,6 +470,7 @@ static struct omap_hwmod_addr_space omap2420_timer3_addrs[] = { .pa_end = 0x48078000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer3 */ @@ -478,7 +479,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer3 = { .slave = &omap2420_timer3_hwmod, .clk = "gpt3_ick", .addr = omap2420_timer3_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -520,6 +520,7 @@ static struct omap_hwmod_addr_space omap2420_timer4_addrs[] = { .pa_end = 0x4807a000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer4 */ @@ -528,7 +529,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer4 = { .slave = &omap2420_timer4_hwmod, .clk = "gpt4_ick", .addr = omap2420_timer4_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -570,6 +570,7 @@ static struct omap_hwmod_addr_space omap2420_timer5_addrs[] = { .pa_end = 0x4807c000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer5 */ @@ -578,7 +579,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer5 = { .slave = &omap2420_timer5_hwmod, .clk = "gpt5_ick", .addr = omap2420_timer5_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer5_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -621,6 +621,7 @@ static struct omap_hwmod_addr_space omap2420_timer6_addrs[] = { .pa_end = 0x4807e000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer6 */ @@ -629,7 +630,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer6 = { .slave = &omap2420_timer6_hwmod, .clk = "gpt6_ick", .addr = omap2420_timer6_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer6_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -671,6 +671,7 @@ static struct omap_hwmod_addr_space omap2420_timer7_addrs[] = { .pa_end = 0x48080000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer7 */ @@ -679,7 +680,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer7 = { .slave = &omap2420_timer7_hwmod, .clk = "gpt7_ick", .addr = omap2420_timer7_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer7_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -721,6 +721,7 @@ static struct omap_hwmod_addr_space omap2420_timer8_addrs[] = { .pa_end = 0x48082000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer8 */ @@ -729,7 +730,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer8 = { .slave = &omap2420_timer8_hwmod, .clk = "gpt8_ick", .addr = omap2420_timer8_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer8_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -771,6 +771,7 @@ static struct omap_hwmod_addr_space omap2420_timer9_addrs[] = { .pa_end = 0x48084000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer9 */ @@ -779,7 +780,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer9 = { .slave = &omap2420_timer9_hwmod, .clk = "gpt9_ick", .addr = omap2420_timer9_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer9_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -821,6 +821,7 @@ static struct omap_hwmod_addr_space omap2420_timer10_addrs[] = { .pa_end = 0x48086000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer10 */ @@ -829,7 +830,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer10 = { .slave = &omap2420_timer10_hwmod, .clk = "gpt10_ick", .addr = omap2420_timer10_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer10_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -871,6 +871,7 @@ static struct omap_hwmod_addr_space omap2420_timer11_addrs[] = { .pa_end = 0x48088000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer11 */ @@ -879,7 +880,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer11 = { .slave = &omap2420_timer11_hwmod, .clk = "gpt11_ick", .addr = omap2420_timer11_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer11_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -921,6 +921,7 @@ static struct omap_hwmod_addr_space omap2420_timer12_addrs[] = { .pa_end = 0x4808a000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer12 */ @@ -929,7 +930,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer12 = { .slave = &omap2420_timer12_hwmod, .clk = "gpt12_ick", .addr = omap2420_timer12_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer12_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -966,6 +966,7 @@ static struct omap_hwmod_addr_space omap2420_wd_timer2_addrs[] = { .pa_end = 0x4802207f, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = { @@ -973,7 +974,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = { .slave = &omap2420_wd_timer2_hwmod, .clk = "mpu_wdt_ick", .addr = omap2420_wd_timer2_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_wd_timer2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1184,6 +1184,7 @@ static struct omap_hwmod_addr_space omap2420_dss_addrs[] = { .pa_end = 0x480503FF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss */ @@ -1192,7 +1193,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss = { .slave = &omap2420_dss_core_hwmod, .clk = "dss_ick", .addr = omap2420_dss_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_dss_addrs), .fw = { .omap2 = { .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION, @@ -1268,6 +1268,7 @@ static struct omap_hwmod_addr_space omap2420_dss_dispc_addrs[] = { .pa_end = 0x480507FF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss_dispc */ @@ -1276,7 +1277,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = { .slave = &omap2420_dss_dispc_hwmod, .clk = "dss_ick", .addr = omap2420_dss_dispc_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_dss_dispc_addrs), .fw = { .omap2 = { .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_DISPC_REGION, @@ -1338,6 +1338,7 @@ static struct omap_hwmod_addr_space omap2420_dss_rfbi_addrs[] = { .pa_end = 0x48050BFF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss_rfbi */ @@ -1346,7 +1347,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_rfbi = { .slave = &omap2420_dss_rfbi_hwmod, .clk = "dss_ick", .addr = omap2420_dss_rfbi_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_dss_rfbi_addrs), .fw = { .omap2 = { .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION, @@ -1394,6 +1394,7 @@ static struct omap_hwmod_addr_space omap2420_dss_venc_addrs[] = { .pa_end = 0x48050FFF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss_venc */ @@ -1402,7 +1403,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = { .slave = &omap2420_dss_venc_hwmod, .clk = "dss_54m_fck", .addr = omap2420_dss_venc_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_dss_venc_addrs), .fw = { .omap2 = { .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_VENC_REGION, @@ -1536,6 +1536,7 @@ static struct omap_hwmod_addr_space omap2420_gpio1_addr_space[] = { .pa_end = 0x480181ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio1 = { @@ -1543,7 +1544,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio1 = { .slave = &omap2420_gpio1_hwmod, .clk = "gpios_ick", .addr = omap2420_gpio1_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_gpio1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1554,6 +1554,7 @@ static struct omap_hwmod_addr_space omap2420_gpio2_addr_space[] = { .pa_end = 0x4801a1ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio2 = { @@ -1561,7 +1562,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio2 = { .slave = &omap2420_gpio2_hwmod, .clk = "gpios_ick", .addr = omap2420_gpio2_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_gpio2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1572,6 +1572,7 @@ static struct omap_hwmod_addr_space omap2420_gpio3_addr_space[] = { .pa_end = 0x4801c1ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio3 = { @@ -1579,7 +1580,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio3 = { .slave = &omap2420_gpio3_hwmod, .clk = "gpios_ick", .addr = omap2420_gpio3_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_gpio3_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1590,6 +1590,7 @@ static struct omap_hwmod_addr_space omap2420_gpio4_addr_space[] = { .pa_end = 0x4801e1ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio4 = { @@ -1597,7 +1598,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio4 = { .slave = &omap2420_gpio4_hwmod, .clk = "gpios_ick", .addr = omap2420_gpio4_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_gpio4_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1789,6 +1789,7 @@ static struct omap_hwmod_addr_space omap2420_dma_system_addrs[] = { .pa_end = 0x48056fff, .flags = ADDR_TYPE_RT }, + { } }; /* dma_system -> L3 */ @@ -1810,7 +1811,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = { .slave = &omap2420_dma_system_hwmod, .clk = "sdma_ick", .addr = omap2420_dma_system_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_dma_system_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1868,6 +1868,7 @@ static struct omap_hwmod_addr_space omap2420_mailbox_addrs[] = { .pa_end = 0x480941ff, .flags = ADDR_TYPE_RT, }, + { } }; /* l4_core -> mailbox */ @@ -1875,7 +1876,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mailbox = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_mailbox_hwmod, .addr = omap2420_mailbox_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_mailbox_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2044,6 +2044,7 @@ static struct omap_hwmod_addr_space omap2420_mcbsp1_addrs[] = { .pa_end = 0x480740ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> mcbsp1 */ @@ -2052,7 +2053,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1 = { .slave = &omap2420_mcbsp1_hwmod, .clk = "mcbsp1_ick", .addr = omap2420_mcbsp1_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_mcbsp1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2101,6 +2101,7 @@ static struct omap_hwmod_addr_space omap2420_mcbsp2_addrs[] = { .pa_end = 0x480760ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> mcbsp2 */ @@ -2109,7 +2110,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = { .slave = &omap2420_mcbsp2_hwmod, .clk = "mcbsp2_ick", .addr = omap2420_mcbsp2_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_mcbsp2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 9682dd519f8..da287947cc1 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -1,7 +1,7 @@ /* * omap_hwmod_2430_data.c - hardware modules present on the OMAP2430 chips * - * Copyright (C) 2009-2010 Nokia Corporation + * Copyright (C) 2009-2011 Nokia Corporation * Paul Walmsley * * This program is free software; you can redistribute it and/or modify @@ -141,6 +141,7 @@ static struct omap_hwmod_addr_space omap2430_i2c1_addr_space[] = { .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = { @@ -148,7 +149,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = { .slave = &omap2430_i2c1_hwmod, .clk = "i2c1_ick", .addr = omap2430_i2c1_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_i2c1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -159,6 +159,7 @@ static struct omap_hwmod_addr_space omap2430_i2c2_addr_space[] = { .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = { @@ -166,7 +167,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = { .slave = &omap2430_i2c2_hwmod, .clk = "i2c2_ick", .addr = omap2430_i2c2_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_i2c2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -184,6 +184,7 @@ static struct omap_hwmod_addr_space omap2430_uart1_addr_space[] = { .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { @@ -191,7 +192,6 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { .slave = &omap2430_uart1_hwmod, .clk = "uart1_ick", .addr = omap2430_uart1_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_uart1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -202,6 +202,7 @@ static struct omap_hwmod_addr_space omap2430_uart2_addr_space[] = { .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { @@ -209,7 +210,6 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { .slave = &omap2430_uart2_hwmod, .clk = "uart2_ick", .addr = omap2430_uart2_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_uart2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -220,6 +220,7 @@ static struct omap_hwmod_addr_space omap2430_uart3_addr_space[] = { .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { @@ -227,7 +228,6 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { .slave = &omap2430_uart3_hwmod, .clk = "uart3_ick", .addr = omap2430_uart3_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_uart3_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -248,7 +248,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__usbhsotg = { .slave = &omap2430_usbhsotg_hwmod, .clk = "usb_l4_ick", .addr = omap2430_usbhsotg_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_usbhsotg_addrs), .user = OCP_USER_MPU, }; @@ -267,6 +266,7 @@ static struct omap_hwmod_addr_space omap2430_mmc1_addr_space[] = { .pa_end = 0x4809c1ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = { @@ -274,7 +274,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = { .slave = &omap2430_mmc1_hwmod, .clk = "mmchs1_ick", .addr = omap2430_mmc1_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_mmc1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -285,14 +284,14 @@ static struct omap_hwmod_addr_space omap2430_mmc2_addr_space[] = { .pa_end = 0x480b41ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_core__mmc2 = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_mmc2_hwmod, - .addr = omap2430_mmc2_addr_space, .clk = "mmchs2_ick", - .addr_cnt = ARRAY_SIZE(omap2430_mmc2_addr_space), + .addr = omap2430_mmc2_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -339,6 +338,7 @@ static struct omap_hwmod_addr_space omap2430_mcspi1_addr_space[] = { .pa_end = 0x480980ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi1 = { @@ -346,7 +346,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi1 = { .slave = &omap2430_mcspi1_hwmod, .clk = "mcspi1_ick", .addr = omap2430_mcspi1_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_mcspi1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -357,6 +356,7 @@ static struct omap_hwmod_addr_space omap2430_mcspi2_addr_space[] = { .pa_end = 0x4809a0ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi2 = { @@ -364,7 +364,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi2 = { .slave = &omap2430_mcspi2_hwmod, .clk = "mcspi2_ick", .addr = omap2430_mcspi2_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_mcspi2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -375,6 +374,7 @@ static struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[] = { .pa_end = 0x480b80ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = { @@ -382,7 +382,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = { .slave = &omap2430_mcspi3_hwmod, .clk = "mcspi3_ick", .addr = omap2430_mcspi3_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_mcspi3_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -471,6 +470,7 @@ static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = { .pa_end = 0x49018000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_wkup -> timer1 */ @@ -479,7 +479,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__timer1 = { .slave = &omap2430_timer1_hwmod, .clk = "gpt1_ick", .addr = omap2430_timer1_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -521,6 +520,7 @@ static struct omap_hwmod_addr_space omap2430_timer2_addrs[] = { .pa_end = 0x4802a000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer2 */ @@ -529,7 +529,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer2 = { .slave = &omap2430_timer2_hwmod, .clk = "gpt2_ick", .addr = omap2430_timer2_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -571,6 +570,7 @@ static struct omap_hwmod_addr_space omap2430_timer3_addrs[] = { .pa_end = 0x48078000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer3 */ @@ -579,7 +579,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer3 = { .slave = &omap2430_timer3_hwmod, .clk = "gpt3_ick", .addr = omap2430_timer3_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -621,6 +620,7 @@ static struct omap_hwmod_addr_space omap2430_timer4_addrs[] = { .pa_end = 0x4807a000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer4 */ @@ -629,7 +629,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer4 = { .slave = &omap2430_timer4_hwmod, .clk = "gpt4_ick", .addr = omap2430_timer4_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -671,6 +670,7 @@ static struct omap_hwmod_addr_space omap2430_timer5_addrs[] = { .pa_end = 0x4807c000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer5 */ @@ -679,7 +679,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer5 = { .slave = &omap2430_timer5_hwmod, .clk = "gpt5_ick", .addr = omap2430_timer5_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer5_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -721,6 +720,7 @@ static struct omap_hwmod_addr_space omap2430_timer6_addrs[] = { .pa_end = 0x4807e000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer6 */ @@ -729,7 +729,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer6 = { .slave = &omap2430_timer6_hwmod, .clk = "gpt6_ick", .addr = omap2430_timer6_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer6_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -771,6 +770,7 @@ static struct omap_hwmod_addr_space omap2430_timer7_addrs[] = { .pa_end = 0x48080000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer7 */ @@ -779,7 +779,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer7 = { .slave = &omap2430_timer7_hwmod, .clk = "gpt7_ick", .addr = omap2430_timer7_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer7_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -821,6 +820,7 @@ static struct omap_hwmod_addr_space omap2430_timer8_addrs[] = { .pa_end = 0x48082000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer8 */ @@ -829,7 +829,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer8 = { .slave = &omap2430_timer8_hwmod, .clk = "gpt8_ick", .addr = omap2430_timer8_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer8_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -871,6 +870,7 @@ static struct omap_hwmod_addr_space omap2430_timer9_addrs[] = { .pa_end = 0x48084000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer9 */ @@ -879,7 +879,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer9 = { .slave = &omap2430_timer9_hwmod, .clk = "gpt9_ick", .addr = omap2430_timer9_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer9_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -921,6 +920,7 @@ static struct omap_hwmod_addr_space omap2430_timer10_addrs[] = { .pa_end = 0x48086000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer10 */ @@ -929,7 +929,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer10 = { .slave = &omap2430_timer10_hwmod, .clk = "gpt10_ick", .addr = omap2430_timer10_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer10_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -971,6 +970,7 @@ static struct omap_hwmod_addr_space omap2430_timer11_addrs[] = { .pa_end = 0x48088000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer11 */ @@ -979,7 +979,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer11 = { .slave = &omap2430_timer11_hwmod, .clk = "gpt11_ick", .addr = omap2430_timer11_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer11_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1021,6 +1020,7 @@ static struct omap_hwmod_addr_space omap2430_timer12_addrs[] = { .pa_end = 0x4808a000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer12 */ @@ -1029,7 +1029,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer12 = { .slave = &omap2430_timer12_hwmod, .clk = "gpt12_ick", .addr = omap2430_timer12_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_timer12_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1066,6 +1065,7 @@ static struct omap_hwmod_addr_space omap2430_wd_timer2_addrs[] = { .pa_end = 0x4901607f, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = { @@ -1073,7 +1073,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = { .slave = &omap2430_wd_timer2_hwmod, .clk = "mpu_wdt_ick", .addr = omap2430_wd_timer2_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_wd_timer2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1284,6 +1283,7 @@ static struct omap_hwmod_addr_space omap2430_dss_addrs[] = { .pa_end = 0x480503FF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss */ @@ -1292,7 +1292,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss = { .slave = &omap2430_dss_core_hwmod, .clk = "dss_ick", .addr = omap2430_dss_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_dss_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1362,6 +1361,7 @@ static struct omap_hwmod_addr_space omap2430_dss_dispc_addrs[] = { .pa_end = 0x480507FF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss_dispc */ @@ -1370,7 +1370,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = { .slave = &omap2430_dss_dispc_hwmod, .clk = "dss_ick", .addr = omap2430_dss_dispc_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_dss_dispc_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1426,6 +1425,7 @@ static struct omap_hwmod_addr_space omap2430_dss_rfbi_addrs[] = { .pa_end = 0x48050BFF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss_rfbi */ @@ -1434,7 +1434,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_rfbi = { .slave = &omap2430_dss_rfbi_hwmod, .clk = "dss_ick", .addr = omap2430_dss_rfbi_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_dss_rfbi_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1476,6 +1475,7 @@ static struct omap_hwmod_addr_space omap2430_dss_venc_addrs[] = { .pa_end = 0x48050FFF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss_venc */ @@ -1484,7 +1484,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = { .slave = &omap2430_dss_venc_hwmod, .clk = "dss_54m_fck", .addr = omap2430_dss_venc_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_dss_venc_addrs), .flags = OCPIF_SWSUP_IDLE, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1621,6 +1620,7 @@ static struct omap_hwmod_addr_space omap2430_gpio1_addr_space[] = { .pa_end = 0x4900C1ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio1 = { @@ -1628,7 +1628,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio1 = { .slave = &omap2430_gpio1_hwmod, .clk = "gpios_ick", .addr = omap2430_gpio1_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_gpio1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1639,6 +1638,7 @@ static struct omap_hwmod_addr_space omap2430_gpio2_addr_space[] = { .pa_end = 0x4900E1ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio2 = { @@ -1646,7 +1646,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio2 = { .slave = &omap2430_gpio2_hwmod, .clk = "gpios_ick", .addr = omap2430_gpio2_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_gpio2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1657,6 +1656,7 @@ static struct omap_hwmod_addr_space omap2430_gpio3_addr_space[] = { .pa_end = 0x490101ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio3 = { @@ -1664,7 +1664,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio3 = { .slave = &omap2430_gpio3_hwmod, .clk = "gpios_ick", .addr = omap2430_gpio3_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_gpio3_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1675,6 +1674,7 @@ static struct omap_hwmod_addr_space omap2430_gpio4_addr_space[] = { .pa_end = 0x490121ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio4 = { @@ -1682,7 +1682,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio4 = { .slave = &omap2430_gpio4_hwmod, .clk = "gpios_ick", .addr = omap2430_gpio4_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_gpio4_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1693,6 +1692,7 @@ static struct omap_hwmod_addr_space omap2430_gpio5_addr_space[] = { .pa_end = 0x480B61ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2430_l4_core__gpio5 = { @@ -1700,7 +1700,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__gpio5 = { .slave = &omap2430_gpio5_hwmod, .clk = "gpio5_ick", .addr = omap2430_gpio5_addr_space, - .addr_cnt = ARRAY_SIZE(omap2430_gpio5_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1923,6 +1922,7 @@ static struct omap_hwmod_addr_space omap2430_dma_system_addrs[] = { .pa_end = 0x48056fff, .flags = ADDR_TYPE_RT }, + { } }; /* dma_system -> L3 */ @@ -1944,7 +1944,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = { .slave = &omap2430_dma_system_hwmod, .clk = "sdma_ick", .addr = omap2430_dma_system_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_dma_system_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2001,6 +2000,7 @@ static struct omap_hwmod_addr_space omap2430_mailbox_addrs[] = { .pa_end = 0x480941ff, .flags = ADDR_TYPE_RT, }, + { } }; /* l4_core -> mailbox */ @@ -2008,7 +2008,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mailbox = { .master = &omap2430_l4_core_hwmod, .slave = &omap2430_mailbox_hwmod, .addr = omap2430_mailbox_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_mailbox_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2287,6 +2286,7 @@ static struct omap_hwmod_addr_space omap2430_mcbsp1_addrs[] = { .pa_end = 0x480740ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> mcbsp1 */ @@ -2295,7 +2295,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1 = { .slave = &omap2430_mcbsp1_hwmod, .clk = "mcbsp1_ick", .addr = omap2430_mcbsp1_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_mcbsp1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2345,6 +2344,7 @@ static struct omap_hwmod_addr_space omap2430_mcbsp2_addrs[] = { .pa_end = 0x480760ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> mcbsp2 */ @@ -2353,7 +2353,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2 = { .slave = &omap2430_mcbsp2_hwmod, .clk = "mcbsp2_ick", .addr = omap2430_mcbsp2_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_mcbsp2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2403,6 +2402,7 @@ static struct omap_hwmod_addr_space omap2430_mcbsp3_addrs[] = { .pa_end = 0x4808C0ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> mcbsp3 */ @@ -2411,7 +2411,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp3 = { .slave = &omap2430_mcbsp3_hwmod, .clk = "mcbsp3_ick", .addr = omap2430_mcbsp3_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_mcbsp3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2461,6 +2460,7 @@ static struct omap_hwmod_addr_space omap2430_mcbsp4_addrs[] = { .pa_end = 0x4808E0ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> mcbsp4 */ @@ -2469,7 +2469,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp4 = { .slave = &omap2430_mcbsp4_hwmod, .clk = "mcbsp4_ick", .addr = omap2430_mcbsp4_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_mcbsp4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2519,6 +2518,7 @@ static struct omap_hwmod_addr_space omap2430_mcbsp5_addrs[] = { .pa_end = 0x480960ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> mcbsp5 */ @@ -2527,7 +2527,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp5 = { .slave = &omap2430_mcbsp5_hwmod, .clk = "mcbsp5_ick", .addr = omap2430_mcbsp5_addrs, - .addr_cnt = ARRAY_SIZE(omap2430_mcbsp5_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 909a84de668..64107795f1a 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -1,7 +1,7 @@ /* * omap_hwmod_3xxx_data.c - hardware modules present on the OMAP3xxx chips * - * Copyright (C) 2009-2010 Nokia Corporation + * Copyright (C) 2009-2011 Nokia Corporation * Paul Walmsley * * This program is free software; you can redistribute it and/or modify @@ -111,6 +111,7 @@ static struct omap_hwmod_addr_space omap3xxx_l3_main_addrs[] = { .pa_end = 0x6800ffff, .flags = ADDR_TYPE_RT, }, + { } }; /* MPU -> L3 interface */ @@ -118,7 +119,6 @@ static struct omap_hwmod_ocp_if omap3xxx_mpu__l3_main = { .master = &omap3xxx_mpu_hwmod, .slave = &omap3xxx_l3_main_hwmod, .addr = omap3xxx_l3_main_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_l3_main_addrs), .user = OCP_USER_MPU, }; @@ -196,6 +196,7 @@ static struct omap_hwmod_addr_space omap3xxx_mmc1_addr_space[] = { .pa_end = 0x4809c1ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc1 = { @@ -203,7 +204,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc1 = { .slave = &omap3xxx_mmc1_hwmod, .clk = "mmchs1_ick", .addr = omap3xxx_mmc1_addr_space, - .addr_cnt = ARRAY_SIZE(omap3xxx_mmc1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, .flags = OMAP_FIREWALL_L4 }; @@ -215,6 +215,7 @@ static struct omap_hwmod_addr_space omap3xxx_mmc2_addr_space[] = { .pa_end = 0x480b41ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc2 = { @@ -222,7 +223,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc2 = { .slave = &omap3xxx_mmc2_hwmod, .clk = "mmchs2_ick", .addr = omap3xxx_mmc2_addr_space, - .addr_cnt = ARRAY_SIZE(omap3xxx_mmc2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, .flags = OMAP_FIREWALL_L4 }; @@ -234,6 +234,7 @@ static struct omap_hwmod_addr_space omap3xxx_mmc3_addr_space[] = { .pa_end = 0x480ad1ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc3 = { @@ -241,7 +242,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc3 = { .slave = &omap3xxx_mmc3_hwmod, .clk = "mmchs3_ick", .addr = omap3xxx_mmc3_addr_space, - .addr_cnt = ARRAY_SIZE(omap3xxx_mmc3_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, .flags = OMAP_FIREWALL_L4 }; @@ -253,6 +253,7 @@ static struct omap_hwmod_addr_space omap3xxx_uart1_addr_space[] = { .pa_end = OMAP3_UART1_BASE + SZ_8K - 1, .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3_l4_core__uart1 = { @@ -260,7 +261,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__uart1 = { .slave = &omap3xxx_uart1_hwmod, .clk = "uart1_ick", .addr = omap3xxx_uart1_addr_space, - .addr_cnt = ARRAY_SIZE(omap3xxx_uart1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -271,6 +271,7 @@ static struct omap_hwmod_addr_space omap3xxx_uart2_addr_space[] = { .pa_end = OMAP3_UART2_BASE + SZ_1K - 1, .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3_l4_core__uart2 = { @@ -278,7 +279,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__uart2 = { .slave = &omap3xxx_uart2_hwmod, .clk = "uart2_ick", .addr = omap3xxx_uart2_addr_space, - .addr_cnt = ARRAY_SIZE(omap3xxx_uart2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -289,6 +289,7 @@ static struct omap_hwmod_addr_space omap3xxx_uart3_addr_space[] = { .pa_end = OMAP3_UART3_BASE + SZ_1K - 1, .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3_l4_per__uart3 = { @@ -296,7 +297,6 @@ static struct omap_hwmod_ocp_if omap3_l4_per__uart3 = { .slave = &omap3xxx_uart3_hwmod, .clk = "uart3_ick", .addr = omap3xxx_uart3_addr_space, - .addr_cnt = ARRAY_SIZE(omap3xxx_uart3_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -307,6 +307,7 @@ static struct omap_hwmod_addr_space omap3xxx_uart4_addr_space[] = { .pa_end = OMAP3_UART4_BASE + SZ_1K - 1, .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3_l4_per__uart4 = { @@ -314,7 +315,6 @@ static struct omap_hwmod_ocp_if omap3_l4_per__uart4 = { .slave = &omap3xxx_uart4_hwmod, .clk = "uart4_ick", .addr = omap3xxx_uart4_addr_space, - .addr_cnt = ARRAY_SIZE(omap3xxx_uart4_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -328,6 +328,7 @@ static struct omap_hwmod_addr_space omap3xxx_i2c1_addr_space[] = { .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = { @@ -335,7 +336,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = { .slave = &omap3xxx_i2c1_hwmod, .clk = "i2c1_ick", .addr = omap3xxx_i2c1_addr_space, - .addr_cnt = ARRAY_SIZE(omap3xxx_i2c1_addr_space), .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_I2C1_REGION, @@ -353,6 +353,7 @@ static struct omap_hwmod_addr_space omap3xxx_i2c2_addr_space[] = { .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3_l4_core__i2c2 = { @@ -360,7 +361,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c2 = { .slave = &omap3xxx_i2c2_hwmod, .clk = "i2c2_ick", .addr = omap3xxx_i2c2_addr_space, - .addr_cnt = ARRAY_SIZE(omap3xxx_i2c2_addr_space), .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_I2C2_REGION, @@ -378,6 +378,7 @@ static struct omap_hwmod_addr_space omap3xxx_i2c3_addr_space[] = { .pa_end = 0x48060000 + OMAP2_I2C_AS_LEN - 1, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3_l4_core__i2c3 = { @@ -385,7 +386,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c3 = { .slave = &omap3xxx_i2c3_hwmod, .clk = "i2c3_ick", .addr = omap3xxx_i2c3_addr_space, - .addr_cnt = ARRAY_SIZE(omap3xxx_i2c3_addr_space), .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_I2C3_REGION, @@ -403,6 +403,7 @@ static struct omap_hwmod_addr_space omap3_sr1_addr_space[] = { .pa_end = OMAP34XX_SR1_BASE + SZ_1K - 1, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3_l4_core__sr1 = { @@ -410,7 +411,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__sr1 = { .slave = &omap34xx_sr1_hwmod, .clk = "sr_l4_ick", .addr = omap3_sr1_addr_space, - .addr_cnt = ARRAY_SIZE(omap3_sr1_addr_space), .user = OCP_USER_MPU, }; @@ -421,6 +421,7 @@ static struct omap_hwmod_addr_space omap3_sr2_addr_space[] = { .pa_end = OMAP34XX_SR2_BASE + SZ_1K - 1, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap3_l4_core__sr2 = { @@ -428,7 +429,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__sr2 = { .slave = &omap34xx_sr2_hwmod, .clk = "sr_l4_ick", .addr = omap3_sr2_addr_space, - .addr_cnt = ARRAY_SIZE(omap3_sr2_addr_space), .user = OCP_USER_MPU, }; @@ -442,6 +442,7 @@ static struct omap_hwmod_addr_space omap3xxx_usbhsotg_addrs[] = { .pa_end = OMAP34XX_HSUSB_OTG_BASE + SZ_4K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> usbhsotg */ @@ -450,7 +451,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__usbhsotg = { .slave = &omap3xxx_usbhsotg_hwmod, .clk = "l4_ick", .addr = omap3xxx_usbhsotg_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_usbhsotg_addrs), .user = OCP_USER_MPU, }; @@ -468,6 +468,7 @@ static struct omap_hwmod_addr_space am35xx_usbhsotg_addrs[] = { .pa_end = AM35XX_IPSS_USBOTGSS_BASE + SZ_4K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> usbhsotg */ @@ -476,7 +477,6 @@ static struct omap_hwmod_ocp_if am35xx_l4_core__usbhsotg = { .slave = &am35xx_usbhsotg_hwmod, .clk = "l4_ick", .addr = am35xx_usbhsotg_addrs, - .addr_cnt = ARRAY_SIZE(am35xx_usbhsotg_addrs), .user = OCP_USER_MPU, }; @@ -621,6 +621,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer1_addrs[] = { .pa_end = 0x48318000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_wkup -> timer1 */ @@ -629,7 +630,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__timer1 = { .slave = &omap3xxx_timer1_hwmod, .clk = "gpt1_ick", .addr = omap3xxx_timer1_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -671,6 +671,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer2_addrs[] = { .pa_end = 0x49032000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer2 */ @@ -679,7 +680,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer2 = { .slave = &omap3xxx_timer2_hwmod, .clk = "gpt2_ick", .addr = omap3xxx_timer2_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -721,6 +721,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer3_addrs[] = { .pa_end = 0x49034000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer3 */ @@ -729,7 +730,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer3 = { .slave = &omap3xxx_timer3_hwmod, .clk = "gpt3_ick", .addr = omap3xxx_timer3_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -771,6 +771,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer4_addrs[] = { .pa_end = 0x49036000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer4 */ @@ -779,7 +780,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer4 = { .slave = &omap3xxx_timer4_hwmod, .clk = "gpt4_ick", .addr = omap3xxx_timer4_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -821,6 +821,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer5_addrs[] = { .pa_end = 0x49038000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer5 */ @@ -829,7 +830,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer5 = { .slave = &omap3xxx_timer5_hwmod, .clk = "gpt5_ick", .addr = omap3xxx_timer5_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer5_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -871,6 +871,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer6_addrs[] = { .pa_end = 0x4903A000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer6 */ @@ -879,7 +880,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer6 = { .slave = &omap3xxx_timer6_hwmod, .clk = "gpt6_ick", .addr = omap3xxx_timer6_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer6_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -921,6 +921,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer7_addrs[] = { .pa_end = 0x4903C000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer7 */ @@ -929,7 +930,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer7 = { .slave = &omap3xxx_timer7_hwmod, .clk = "gpt7_ick", .addr = omap3xxx_timer7_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer7_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -971,6 +971,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer8_addrs[] = { .pa_end = 0x4903E000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer8 */ @@ -979,7 +980,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer8 = { .slave = &omap3xxx_timer8_hwmod, .clk = "gpt8_ick", .addr = omap3xxx_timer8_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer8_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1021,6 +1021,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer9_addrs[] = { .pa_end = 0x49040000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer9 */ @@ -1029,7 +1030,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer9 = { .slave = &omap3xxx_timer9_hwmod, .clk = "gpt9_ick", .addr = omap3xxx_timer9_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer9_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1071,6 +1071,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer10_addrs[] = { .pa_end = 0x48086000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer10 */ @@ -1079,7 +1080,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer10 = { .slave = &omap3xxx_timer10_hwmod, .clk = "gpt10_ick", .addr = omap3xxx_timer10_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer10_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1121,6 +1121,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer11_addrs[] = { .pa_end = 0x48088000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer11 */ @@ -1129,7 +1130,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer11 = { .slave = &omap3xxx_timer11_hwmod, .clk = "gpt11_ick", .addr = omap3xxx_timer11_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer11_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1171,6 +1171,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer12_addrs[] = { .pa_end = 0x48304000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> timer12 */ @@ -1179,7 +1180,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer12 = { .slave = &omap3xxx_timer12_hwmod, .clk = "gpt12_ick", .addr = omap3xxx_timer12_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_timer12_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1216,6 +1216,7 @@ static struct omap_hwmod_addr_space omap3xxx_wd_timer2_addrs[] = { .pa_end = 0x4831407f, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__wd_timer2 = { @@ -1223,7 +1224,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__wd_timer2 = { .slave = &omap3xxx_wd_timer2_hwmod, .clk = "wdt2_ick", .addr = omap3xxx_wd_timer2_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_wd_timer2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1497,6 +1497,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_addrs[] = { .pa_end = 0x480503FF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss */ @@ -1505,7 +1506,6 @@ static struct omap_hwmod_ocp_if omap3430es1_l4_core__dss = { .slave = &omap3430es1_dss_core_hwmod, .clk = "dss_ick", .addr = omap3xxx_dss_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_dss_addrs), .fw = { .omap2 = { .l4_fw_region = OMAP3ES1_L4_CORE_FW_DSS_CORE_REGION, @@ -1521,7 +1521,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss = { .slave = &omap3xxx_dss_core_hwmod, .clk = "dss_ick", .addr = omap3xxx_dss_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_dss_addrs), .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_DSS_CORE_REGION, @@ -1632,6 +1631,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_dispc_addrs[] = { .pa_end = 0x480507FF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss_dispc */ @@ -1640,7 +1640,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = { .slave = &omap3xxx_dss_dispc_hwmod, .clk = "dss_ick", .addr = omap3xxx_dss_dispc_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_dss_dispc_addrs), .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_DSS_DISPC_REGION, @@ -1697,6 +1696,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_dsi1_addrs[] = { .pa_end = 0x4804FFFF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss_dsi1 */ @@ -1704,7 +1704,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dsi1 = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_dss_dsi1_hwmod, .addr = omap3xxx_dss_dsi1_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_dss_dsi1_addrs), .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_DSS_DSI_REGION, @@ -1767,6 +1766,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_rfbi_addrs[] = { .pa_end = 0x48050BFF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss_rfbi */ @@ -1775,7 +1775,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_rfbi = { .slave = &omap3xxx_dss_rfbi_hwmod, .clk = "dss_ick", .addr = omap3xxx_dss_rfbi_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_dss_rfbi_addrs), .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_DSS_RFBI_REGION, @@ -1826,6 +1825,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_venc_addrs[] = { .pa_end = 0x48050FFF, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> dss_venc */ @@ -1834,7 +1834,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = { .slave = &omap3xxx_dss_venc_hwmod, .clk = "dss_tv_fck", .addr = omap3xxx_dss_venc_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_dss_venc_addrs), .fw = { .omap2 = { .l4_fw_region = OMAP3_L4_CORE_FW_DSS_VENC_REGION, @@ -2003,13 +2002,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio1_addrs[] = { .pa_end = 0x483101ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__gpio1 = { .master = &omap3xxx_l4_wkup_hwmod, .slave = &omap3xxx_gpio1_hwmod, .addr = omap3xxx_gpio1_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_gpio1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2020,13 +2019,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio2_addrs[] = { .pa_end = 0x490501ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio2 = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_gpio2_hwmod, .addr = omap3xxx_gpio2_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_gpio2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2037,13 +2036,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio3_addrs[] = { .pa_end = 0x490521ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio3 = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_gpio3_hwmod, .addr = omap3xxx_gpio3_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_gpio3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2054,13 +2053,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio4_addrs[] = { .pa_end = 0x490541ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio4 = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_gpio4_hwmod, .addr = omap3xxx_gpio4_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_gpio4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2071,13 +2070,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio5_addrs[] = { .pa_end = 0x490561ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio5 = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_gpio5_hwmod, .addr = omap3xxx_gpio5_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_gpio5_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2088,13 +2087,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio6_addrs[] = { .pa_end = 0x490581ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio6 = { .master = &omap3xxx_l4_per_hwmod, .slave = &omap3xxx_gpio6_hwmod, .addr = omap3xxx_gpio6_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_gpio6_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2395,6 +2394,7 @@ static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = { .pa_end = 0x48056fff, .flags = ADDR_TYPE_RT }, + { } }; /* dma_system master ports */ @@ -2408,7 +2408,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dma_system = { .slave = &omap3xxx_dma_system_hwmod, .clk = "core_l4_ick", .addr = omap3xxx_dma_system_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_dma_system_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2480,6 +2479,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp1_addrs[] = { .pa_end = 0x480740ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> mcbsp1 */ @@ -2488,7 +2488,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mcbsp1 = { .slave = &omap3xxx_mcbsp1_hwmod, .clk = "mcbsp1_ick", .addr = omap3xxx_mcbsp1_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2538,6 +2537,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp2_addrs[] = { .pa_end = 0x490220ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mcbsp2 */ @@ -2546,7 +2546,7 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp2 = { .slave = &omap3xxx_mcbsp2_hwmod, .clk = "mcbsp2_ick", .addr = omap3xxx_mcbsp2_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_addrs), + .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2601,6 +2601,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp3_addrs[] = { .pa_end = 0x490240ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mcbsp3 */ @@ -2609,7 +2610,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp3 = { .slave = &omap3xxx_mcbsp3_hwmod, .clk = "mcbsp3_ick", .addr = omap3xxx_mcbsp3_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2664,6 +2664,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp4_addrs[] = { .pa_end = 0x490260ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mcbsp4 */ @@ -2672,7 +2673,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp4 = { .slave = &omap3xxx_mcbsp4_hwmod, .clk = "mcbsp4_ick", .addr = omap3xxx_mcbsp4_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2722,6 +2722,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp5_addrs[] = { .pa_end = 0x480960ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_core -> mcbsp5 */ @@ -2730,7 +2731,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mcbsp5 = { .slave = &omap3xxx_mcbsp5_hwmod, .clk = "mcbsp5_ick", .addr = omap3xxx_mcbsp5_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2785,6 +2785,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp2_sidetone_addrs[] = { .pa_end = 0x490280ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mcbsp2_sidetone */ @@ -2793,7 +2794,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp2_sidetone = { .slave = &omap3xxx_mcbsp2_sidetone_hwmod, .clk = "mcbsp2_ick", .addr = omap3xxx_mcbsp2_sidetone_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sidetone_addrs), .user = OCP_USER_MPU, }; @@ -2834,6 +2834,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp3_sidetone_addrs[] = { .pa_end = 0x4902A0ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mcbsp3_sidetone */ @@ -2842,7 +2843,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp3_sidetone = { .slave = &omap3xxx_mcbsp3_sidetone_hwmod, .clk = "mcbsp3_ick", .addr = omap3xxx_mcbsp3_sidetone_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sidetone_addrs), .user = OCP_USER_MPU, }; @@ -3033,6 +3033,7 @@ static struct omap_hwmod_addr_space omap3xxx_mailbox_addrs[] = { .pa_end = 0x480941ff, .flags = ADDR_TYPE_RT, }, + { } }; /* l4_core -> mailbox */ @@ -3040,7 +3041,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mailbox = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_mailbox_hwmod, .addr = omap3xxx_mailbox_addrs, - .addr_cnt = ARRAY_SIZE(omap3xxx_mailbox_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3076,6 +3076,7 @@ static struct omap_hwmod_addr_space omap34xx_mcspi1_addr_space[] = { .pa_end = 0x480980ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi1 = { @@ -3083,7 +3084,6 @@ static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi1 = { .slave = &omap34xx_mcspi1, .clk = "mcspi1_ick", .addr = omap34xx_mcspi1_addr_space, - .addr_cnt = ARRAY_SIZE(omap34xx_mcspi1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3094,6 +3094,7 @@ static struct omap_hwmod_addr_space omap34xx_mcspi2_addr_space[] = { .pa_end = 0x4809a0ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi2 = { @@ -3101,7 +3102,6 @@ static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi2 = { .slave = &omap34xx_mcspi2, .clk = "mcspi2_ick", .addr = omap34xx_mcspi2_addr_space, - .addr_cnt = ARRAY_SIZE(omap34xx_mcspi2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3112,6 +3112,7 @@ static struct omap_hwmod_addr_space omap34xx_mcspi3_addr_space[] = { .pa_end = 0x480b80ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi3 = { @@ -3119,7 +3120,6 @@ static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi3 = { .slave = &omap34xx_mcspi3, .clk = "mcspi3_ick", .addr = omap34xx_mcspi3_addr_space, - .addr_cnt = ARRAY_SIZE(omap34xx_mcspi3_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3130,6 +3130,7 @@ static struct omap_hwmod_addr_space omap34xx_mcspi4_addr_space[] = { .pa_end = 0x480ba0ff, .flags = ADDR_TYPE_RT, }, + { } }; static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi4 = { @@ -3137,7 +3138,6 @@ static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi4 = { .slave = &omap34xx_mcspi4, .clk = "mcspi4_ick", .addr = omap34xx_mcspi4_addr_space, - .addr_cnt = ARRAY_SIZE(omap34xx_mcspi4_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index e1c69ffe0f6..81fd313bb1a 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -95,6 +95,7 @@ static struct omap_hwmod_addr_space omap44xx_dmm_addrs[] = { .pa_end = 0x4e0007ff, .flags = ADDR_TYPE_RT }, + { } }; /* mpu -> dmm */ @@ -103,7 +104,6 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__dmm = { .slave = &omap44xx_dmm_hwmod, .clk = "l3_div_ck", .addr = omap44xx_dmm_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dmm_addrs), .user = OCP_USER_MPU, }; @@ -150,6 +150,7 @@ static struct omap_hwmod_addr_space omap44xx_emif_fw_addrs[] = { .pa_end = 0x4a20c0ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_cfg -> emif_fw */ @@ -158,7 +159,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__emif_fw = { .slave = &omap44xx_emif_fw_hwmod, .clk = "l4_div_ck", .addr = omap44xx_emif_fw_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_emif_fw_addrs), .user = OCP_USER_MPU, }; @@ -276,6 +276,7 @@ static struct omap_hwmod_addr_space omap44xx_l3_main_1_addrs[] = { .pa_end = 0x44000fff, .flags = ADDR_TYPE_RT, }, + { } }; /* mpu -> l3_main_1 */ @@ -284,7 +285,6 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__l3_main_1 = { .slave = &omap44xx_l3_main_1_hwmod, .clk = "l3_div_ck", .addr = omap44xx_l3_main_1_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_l3_main_1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -356,6 +356,7 @@ static struct omap_hwmod_addr_space omap44xx_l3_main_2_addrs[] = { .pa_end = 0x44801fff, .flags = ADDR_TYPE_RT, }, + { } }; /* l3_main_1 -> l3_main_2 */ @@ -364,7 +365,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_2 = { .slave = &omap44xx_l3_main_2_hwmod, .clk = "l3_div_ck", .addr = omap44xx_l3_main_2_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_l3_main_2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -411,6 +411,7 @@ static struct omap_hwmod_addr_space omap44xx_l3_main_3_addrs[] = { .pa_end = 0x45000fff, .flags = ADDR_TYPE_RT, }, + { } }; /* l3_main_1 -> l3_main_3 */ @@ -419,7 +420,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_3 = { .slave = &omap44xx_l3_main_3_hwmod, .clk = "l3_div_ck", .addr = omap44xx_l3_main_3_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_l3_main_3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -696,6 +696,7 @@ static struct omap_hwmod_addr_space omap44xx_aess_addrs[] = { .pa_end = 0x401f13ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> aess */ @@ -704,7 +705,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__aess = { .slave = &omap44xx_aess_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_aess_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_aess_addrs), .user = OCP_USER_MPU, }; @@ -714,6 +714,7 @@ static struct omap_hwmod_addr_space omap44xx_aess_dma_addrs[] = { .pa_end = 0x490f13ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> aess (dma) */ @@ -722,7 +723,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__aess_dma = { .slave = &omap44xx_aess_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_aess_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_aess_dma_addrs), .user = OCP_USER_SDMA, }; @@ -806,6 +806,7 @@ static struct omap_hwmod_addr_space omap44xx_counter_32k_addrs[] = { .pa_end = 0x4a30401f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_wkup -> counter_32k */ @@ -814,7 +815,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__counter_32k = { .slave = &omap44xx_counter_32k_hwmod, .clk = "l4_wkup_clk_mux_ck", .addr = omap44xx_counter_32k_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_counter_32k_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -888,6 +888,7 @@ static struct omap_hwmod_addr_space omap44xx_dma_system_addrs[] = { .pa_end = 0x4a056fff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_cfg -> dma_system */ @@ -896,7 +897,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__dma_system = { .slave = &omap44xx_dma_system_hwmod, .clk = "l4_div_ck", .addr = omap44xx_dma_system_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dma_system_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -960,6 +960,7 @@ static struct omap_hwmod_addr_space omap44xx_dmic_addrs[] = { .pa_end = 0x4012e07f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> dmic */ @@ -968,7 +969,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic = { .slave = &omap44xx_dmic_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_dmic_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dmic_addrs), .user = OCP_USER_MPU, }; @@ -978,6 +978,7 @@ static struct omap_hwmod_addr_space omap44xx_dmic_dma_addrs[] = { .pa_end = 0x4902e07f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> dmic (dma) */ @@ -986,7 +987,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic_dma = { .slave = &omap44xx_dmic_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_dmic_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dmic_dma_addrs), .user = OCP_USER_SDMA, }; @@ -1127,6 +1127,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dma_addrs[] = { .pa_end = 0x5800007f, .flags = ADDR_TYPE_RT }, + { } }; /* l3_main_2 -> dss */ @@ -1135,7 +1136,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss = { .slave = &omap44xx_dss_hwmod, .clk = "l3_div_ck", .addr = omap44xx_dss_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_dma_addrs), .user = OCP_USER_SDMA, }; @@ -1145,6 +1145,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_addrs[] = { .pa_end = 0x4804007f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> dss */ @@ -1153,7 +1154,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss = { .slave = &omap44xx_dss_hwmod, .clk = "l4_div_ck", .addr = omap44xx_dss_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_addrs), .user = OCP_USER_MPU, }; @@ -1227,6 +1227,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dispc_dma_addrs[] = { .pa_end = 0x58001fff, .flags = ADDR_TYPE_RT }, + { } }; /* l3_main_2 -> dss_dispc */ @@ -1235,7 +1236,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dispc = { .slave = &omap44xx_dss_dispc_hwmod, .clk = "l3_div_ck", .addr = omap44xx_dss_dispc_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_dispc_dma_addrs), .user = OCP_USER_SDMA, }; @@ -1245,6 +1245,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dispc_addrs[] = { .pa_end = 0x48041fff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> dss_dispc */ @@ -1253,7 +1254,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dispc = { .slave = &omap44xx_dss_dispc_hwmod, .clk = "l4_div_ck", .addr = omap44xx_dss_dispc_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_dispc_addrs), .user = OCP_USER_MPU, }; @@ -1318,6 +1318,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi1_dma_addrs[] = { .pa_end = 0x580041ff, .flags = ADDR_TYPE_RT }, + { } }; /* l3_main_2 -> dss_dsi1 */ @@ -1326,7 +1327,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi1 = { .slave = &omap44xx_dss_dsi1_hwmod, .clk = "l3_div_ck", .addr = omap44xx_dss_dsi1_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_dma_addrs), .user = OCP_USER_SDMA, }; @@ -1336,6 +1336,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi1_addrs[] = { .pa_end = 0x480441ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> dss_dsi1 */ @@ -1344,7 +1345,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dsi1 = { .slave = &omap44xx_dss_dsi1_hwmod, .clk = "l4_div_ck", .addr = omap44xx_dss_dsi1_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_addrs), .user = OCP_USER_MPU, }; @@ -1388,6 +1388,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi2_dma_addrs[] = { .pa_end = 0x580051ff, .flags = ADDR_TYPE_RT }, + { } }; /* l3_main_2 -> dss_dsi2 */ @@ -1396,7 +1397,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi2 = { .slave = &omap44xx_dss_dsi2_hwmod, .clk = "l3_div_ck", .addr = omap44xx_dss_dsi2_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_dma_addrs), .user = OCP_USER_SDMA, }; @@ -1406,6 +1406,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi2_addrs[] = { .pa_end = 0x480451ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> dss_dsi2 */ @@ -1414,7 +1415,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dsi2 = { .slave = &omap44xx_dss_dsi2_hwmod, .clk = "l4_div_ck", .addr = omap44xx_dss_dsi2_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_addrs), .user = OCP_USER_MPU, }; @@ -1478,6 +1478,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_hdmi_dma_addrs[] = { .pa_end = 0x58006fff, .flags = ADDR_TYPE_RT }, + { } }; /* l3_main_2 -> dss_hdmi */ @@ -1486,7 +1487,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_hdmi = { .slave = &omap44xx_dss_hdmi_hwmod, .clk = "l3_div_ck", .addr = omap44xx_dss_hdmi_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_dma_addrs), .user = OCP_USER_SDMA, }; @@ -1496,6 +1496,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_hdmi_addrs[] = { .pa_end = 0x48046fff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> dss_hdmi */ @@ -1504,7 +1505,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_hdmi = { .slave = &omap44xx_dss_hdmi_hwmod, .clk = "l4_div_ck", .addr = omap44xx_dss_hdmi_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_addrs), .user = OCP_USER_MPU, }; @@ -1564,6 +1564,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_rfbi_dma_addrs[] = { .pa_end = 0x580020ff, .flags = ADDR_TYPE_RT }, + { } }; /* l3_main_2 -> dss_rfbi */ @@ -1572,7 +1573,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_rfbi = { .slave = &omap44xx_dss_rfbi_hwmod, .clk = "l3_div_ck", .addr = omap44xx_dss_rfbi_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_dma_addrs), .user = OCP_USER_SDMA, }; @@ -1582,6 +1582,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_rfbi_addrs[] = { .pa_end = 0x480420ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> dss_rfbi */ @@ -1590,7 +1591,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_rfbi = { .slave = &omap44xx_dss_rfbi_hwmod, .clk = "l4_div_ck", .addr = omap44xx_dss_rfbi_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_addrs), .user = OCP_USER_MPU, }; @@ -1633,6 +1633,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_venc_dma_addrs[] = { .pa_end = 0x580030ff, .flags = ADDR_TYPE_RT }, + { } }; /* l3_main_2 -> dss_venc */ @@ -1641,7 +1642,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_venc = { .slave = &omap44xx_dss_venc_hwmod, .clk = "l3_div_ck", .addr = omap44xx_dss_venc_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_venc_dma_addrs), .user = OCP_USER_SDMA, }; @@ -1651,6 +1651,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_venc_addrs[] = { .pa_end = 0x480430ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> dss_venc */ @@ -1659,7 +1660,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_venc = { .slave = &omap44xx_dss_venc_hwmod, .clk = "l4_div_ck", .addr = omap44xx_dss_venc_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_dss_venc_addrs), .user = OCP_USER_MPU, }; @@ -1724,6 +1724,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio1_addrs[] = { .pa_end = 0x4a3101ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_wkup -> gpio1 */ @@ -1732,7 +1733,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__gpio1 = { .slave = &omap44xx_gpio1_hwmod, .clk = "l4_wkup_clk_mux_ck", .addr = omap44xx_gpio1_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_gpio1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1776,6 +1776,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio2_addrs[] = { .pa_end = 0x480551ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> gpio2 */ @@ -1784,7 +1785,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio2 = { .slave = &omap44xx_gpio2_hwmod, .clk = "l4_div_ck", .addr = omap44xx_gpio2_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_gpio2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1829,6 +1829,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio3_addrs[] = { .pa_end = 0x480571ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> gpio3 */ @@ -1837,7 +1838,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio3 = { .slave = &omap44xx_gpio3_hwmod, .clk = "l4_div_ck", .addr = omap44xx_gpio3_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_gpio3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1882,6 +1882,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio4_addrs[] = { .pa_end = 0x480591ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> gpio4 */ @@ -1890,7 +1891,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio4 = { .slave = &omap44xx_gpio4_hwmod, .clk = "l4_div_ck", .addr = omap44xx_gpio4_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_gpio4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1935,6 +1935,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio5_addrs[] = { .pa_end = 0x4805b1ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> gpio5 */ @@ -1943,7 +1944,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio5 = { .slave = &omap44xx_gpio5_hwmod, .clk = "l4_div_ck", .addr = omap44xx_gpio5_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_gpio5_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1988,6 +1988,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio6_addrs[] = { .pa_end = 0x4805d1ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> gpio6 */ @@ -1996,7 +1997,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio6 = { .slave = &omap44xx_gpio6_hwmod, .clk = "l4_div_ck", .addr = omap44xx_gpio6_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_gpio6_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2071,6 +2071,7 @@ static struct omap_hwmod_addr_space omap44xx_hsi_addrs[] = { .pa_end = 0x4a05bfff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_cfg -> hsi */ @@ -2079,7 +2080,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__hsi = { .slave = &omap44xx_hsi_hwmod, .clk = "l4_div_ck", .addr = omap44xx_hsi_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_hsi_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2144,6 +2144,7 @@ static struct omap_hwmod_addr_space omap44xx_i2c1_addrs[] = { .pa_end = 0x480700ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> i2c1 */ @@ -2152,7 +2153,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c1 = { .slave = &omap44xx_i2c1_hwmod, .clk = "l4_div_ck", .addr = omap44xx_i2c1_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_i2c1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2197,6 +2197,7 @@ static struct omap_hwmod_addr_space omap44xx_i2c2_addrs[] = { .pa_end = 0x480720ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> i2c2 */ @@ -2205,7 +2206,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c2 = { .slave = &omap44xx_i2c2_hwmod, .clk = "l4_div_ck", .addr = omap44xx_i2c2_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_i2c2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2250,6 +2250,7 @@ static struct omap_hwmod_addr_space omap44xx_i2c3_addrs[] = { .pa_end = 0x480600ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> i2c3 */ @@ -2258,7 +2259,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c3 = { .slave = &omap44xx_i2c3_hwmod, .clk = "l4_div_ck", .addr = omap44xx_i2c3_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_i2c3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2303,6 +2303,7 @@ static struct omap_hwmod_addr_space omap44xx_i2c4_addrs[] = { .pa_end = 0x483500ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> i2c4 */ @@ -2311,7 +2312,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c4 = { .slave = &omap44xx_i2c4_hwmod, .clk = "l4_div_ck", .addr = omap44xx_i2c4_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_i2c4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2478,6 +2478,7 @@ static struct omap_hwmod_addr_space omap44xx_iss_addrs[] = { .pa_end = 0x520000ff, .flags = ADDR_TYPE_RT }, + { } }; /* l3_main_2 -> iss */ @@ -2486,7 +2487,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__iss = { .slave = &omap44xx_iss_hwmod, .clk = "l3_div_ck", .addr = omap44xx_iss_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_iss_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2561,6 +2561,7 @@ static struct omap_hwmod_addr_space omap44xx_iva_addrs[] = { .pa_end = 0x5a07ffff, .flags = ADDR_TYPE_RT }, + { } }; /* l3_main_2 -> iva */ @@ -2569,7 +2570,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__iva = { .slave = &omap44xx_iva_hwmod, .clk = "l3_div_ck", .addr = omap44xx_iva_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_iva_addrs), .user = OCP_USER_MPU, }; @@ -2664,6 +2664,7 @@ static struct omap_hwmod_addr_space omap44xx_kbd_addrs[] = { .pa_end = 0x4a31c07f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_wkup -> kbd */ @@ -2672,7 +2673,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__kbd = { .slave = &omap44xx_kbd_hwmod, .clk = "l4_wkup_clk_mux_ck", .addr = omap44xx_kbd_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_kbd_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2729,6 +2729,7 @@ static struct omap_hwmod_addr_space omap44xx_mailbox_addrs[] = { .pa_end = 0x4a0f41ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_cfg -> mailbox */ @@ -2737,7 +2738,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__mailbox = { .slave = &omap44xx_mailbox_hwmod, .clk = "l4_div_ck", .addr = omap44xx_mailbox_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mailbox_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2798,6 +2798,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp1_addrs[] = { .pa_end = 0x401220ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> mcbsp1 */ @@ -2806,7 +2807,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1 = { .slave = &omap44xx_mcbsp1_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_mcbsp1_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp1_addrs), .user = OCP_USER_MPU, }; @@ -2817,6 +2817,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp1_dma_addrs[] = { .pa_end = 0x490220ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> mcbsp1 (dma) */ @@ -2825,7 +2826,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1_dma = { .slave = &omap44xx_mcbsp1_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_mcbsp1_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp1_dma_addrs), .user = OCP_USER_SDMA, }; @@ -2871,6 +2871,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp2_addrs[] = { .pa_end = 0x401240ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> mcbsp2 */ @@ -2879,7 +2880,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2 = { .slave = &omap44xx_mcbsp2_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_mcbsp2_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp2_addrs), .user = OCP_USER_MPU, }; @@ -2890,6 +2890,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp2_dma_addrs[] = { .pa_end = 0x490240ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> mcbsp2 (dma) */ @@ -2898,7 +2899,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2_dma = { .slave = &omap44xx_mcbsp2_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_mcbsp2_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp2_dma_addrs), .user = OCP_USER_SDMA, }; @@ -2944,6 +2944,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp3_addrs[] = { .pa_end = 0x401260ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> mcbsp3 */ @@ -2952,7 +2953,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3 = { .slave = &omap44xx_mcbsp3_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_mcbsp3_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp3_addrs), .user = OCP_USER_MPU, }; @@ -2963,6 +2963,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp3_dma_addrs[] = { .pa_end = 0x490260ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> mcbsp3 (dma) */ @@ -2971,7 +2972,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3_dma = { .slave = &omap44xx_mcbsp3_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_mcbsp3_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp3_dma_addrs), .user = OCP_USER_SDMA, }; @@ -3016,6 +3016,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp4_addrs[] = { .pa_end = 0x480960ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mcbsp4 */ @@ -3024,7 +3025,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcbsp4 = { .slave = &omap44xx_mcbsp4_hwmod, .clk = "l4_div_ck", .addr = omap44xx_mcbsp4_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3089,6 +3089,7 @@ static struct omap_hwmod_addr_space omap44xx_mcpdm_addrs[] = { .pa_end = 0x4013207f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> mcpdm */ @@ -3097,7 +3098,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcpdm = { .slave = &omap44xx_mcpdm_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_mcpdm_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcpdm_addrs), .user = OCP_USER_MPU, }; @@ -3107,6 +3107,7 @@ static struct omap_hwmod_addr_space omap44xx_mcpdm_dma_addrs[] = { .pa_end = 0x4903207f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> mcpdm (dma) */ @@ -3115,7 +3116,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcpdm_dma = { .slave = &omap44xx_mcpdm_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_mcpdm_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcpdm_dma_addrs), .user = OCP_USER_SDMA, }; @@ -3188,6 +3188,7 @@ static struct omap_hwmod_addr_space omap44xx_mcspi1_addrs[] = { .pa_end = 0x480981ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mcspi1 */ @@ -3196,7 +3197,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi1 = { .slave = &omap44xx_mcspi1_hwmod, .clk = "l4_div_ck", .addr = omap44xx_mcspi1_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcspi1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3248,6 +3248,7 @@ static struct omap_hwmod_addr_space omap44xx_mcspi2_addrs[] = { .pa_end = 0x4809a1ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mcspi2 */ @@ -3256,7 +3257,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi2 = { .slave = &omap44xx_mcspi2_hwmod, .clk = "l4_div_ck", .addr = omap44xx_mcspi2_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcspi2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3308,6 +3308,7 @@ static struct omap_hwmod_addr_space omap44xx_mcspi3_addrs[] = { .pa_end = 0x480b81ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mcspi3 */ @@ -3316,7 +3317,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi3 = { .slave = &omap44xx_mcspi3_hwmod, .clk = "l4_div_ck", .addr = omap44xx_mcspi3_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcspi3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3366,6 +3366,7 @@ static struct omap_hwmod_addr_space omap44xx_mcspi4_addrs[] = { .pa_end = 0x480ba1ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mcspi4 */ @@ -3374,7 +3375,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi4 = { .slave = &omap44xx_mcspi4_hwmod, .clk = "l4_div_ck", .addr = omap44xx_mcspi4_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mcspi4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3451,6 +3451,7 @@ static struct omap_hwmod_addr_space omap44xx_mmc1_addrs[] = { .pa_end = 0x4809c3ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mmc1 */ @@ -3459,7 +3460,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc1 = { .slave = &omap44xx_mmc1_hwmod, .clk = "l4_div_ck", .addr = omap44xx_mmc1_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mmc1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3515,6 +3515,7 @@ static struct omap_hwmod_addr_space omap44xx_mmc2_addrs[] = { .pa_end = 0x480b43ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mmc2 */ @@ -3523,7 +3524,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc2 = { .slave = &omap44xx_mmc2_hwmod, .clk = "l4_div_ck", .addr = omap44xx_mmc2_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mmc2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3569,6 +3569,7 @@ static struct omap_hwmod_addr_space omap44xx_mmc3_addrs[] = { .pa_end = 0x480ad3ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mmc3 */ @@ -3577,7 +3578,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc3 = { .slave = &omap44xx_mmc3_hwmod, .clk = "l4_div_ck", .addr = omap44xx_mmc3_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mmc3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3621,6 +3621,7 @@ static struct omap_hwmod_addr_space omap44xx_mmc4_addrs[] = { .pa_end = 0x480d13ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mmc4 */ @@ -3629,7 +3630,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc4 = { .slave = &omap44xx_mmc4_hwmod, .clk = "l4_div_ck", .addr = omap44xx_mmc4_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mmc4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3673,6 +3673,7 @@ static struct omap_hwmod_addr_space omap44xx_mmc5_addrs[] = { .pa_end = 0x480d53ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> mmc5 */ @@ -3681,7 +3682,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc5 = { .slave = &omap44xx_mmc5_hwmod, .clk = "l4_div_ck", .addr = omap44xx_mmc5_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_mmc5_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3786,6 +3786,7 @@ static struct omap_hwmod_addr_space omap44xx_smartreflex_core_addrs[] = { .pa_end = 0x4a0dd03f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_cfg -> smartreflex_core */ @@ -3794,7 +3795,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_core = { .slave = &omap44xx_smartreflex_core_hwmod, .clk = "l4_div_ck", .addr = omap44xx_smartreflex_core_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_smartreflex_core_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3832,6 +3832,7 @@ static struct omap_hwmod_addr_space omap44xx_smartreflex_iva_addrs[] = { .pa_end = 0x4a0db03f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_cfg -> smartreflex_iva */ @@ -3840,7 +3841,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_iva = { .slave = &omap44xx_smartreflex_iva_hwmod, .clk = "l4_div_ck", .addr = omap44xx_smartreflex_iva_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_smartreflex_iva_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3878,6 +3878,7 @@ static struct omap_hwmod_addr_space omap44xx_smartreflex_mpu_addrs[] = { .pa_end = 0x4a0d903f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_cfg -> smartreflex_mpu */ @@ -3886,7 +3887,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_mpu = { .slave = &omap44xx_smartreflex_mpu_hwmod, .clk = "l4_div_ck", .addr = omap44xx_smartreflex_mpu_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_smartreflex_mpu_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3943,6 +3943,7 @@ static struct omap_hwmod_addr_space omap44xx_spinlock_addrs[] = { .pa_end = 0x4a0f6fff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_cfg -> spinlock */ @@ -3951,7 +3952,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__spinlock = { .slave = &omap44xx_spinlock_hwmod, .clk = "l4_div_ck", .addr = omap44xx_spinlock_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_spinlock_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4023,6 +4023,7 @@ static struct omap_hwmod_addr_space omap44xx_timer1_addrs[] = { .pa_end = 0x4a31807f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_wkup -> timer1 */ @@ -4031,7 +4032,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__timer1 = { .slave = &omap44xx_timer1_hwmod, .clk = "l4_wkup_clk_mux_ck", .addr = omap44xx_timer1_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4068,6 +4068,7 @@ static struct omap_hwmod_addr_space omap44xx_timer2_addrs[] = { .pa_end = 0x4803207f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer2 */ @@ -4076,7 +4077,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer2 = { .slave = &omap44xx_timer2_hwmod, .clk = "l4_div_ck", .addr = omap44xx_timer2_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4113,6 +4113,7 @@ static struct omap_hwmod_addr_space omap44xx_timer3_addrs[] = { .pa_end = 0x4803407f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer3 */ @@ -4121,7 +4122,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer3 = { .slave = &omap44xx_timer3_hwmod, .clk = "l4_div_ck", .addr = omap44xx_timer3_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4158,6 +4158,7 @@ static struct omap_hwmod_addr_space omap44xx_timer4_addrs[] = { .pa_end = 0x4803607f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer4 */ @@ -4166,7 +4167,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer4 = { .slave = &omap44xx_timer4_hwmod, .clk = "l4_div_ck", .addr = omap44xx_timer4_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4203,6 +4203,7 @@ static struct omap_hwmod_addr_space omap44xx_timer5_addrs[] = { .pa_end = 0x4013807f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> timer5 */ @@ -4211,7 +4212,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer5 = { .slave = &omap44xx_timer5_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_timer5_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer5_addrs), .user = OCP_USER_MPU, }; @@ -4221,6 +4221,7 @@ static struct omap_hwmod_addr_space omap44xx_timer5_dma_addrs[] = { .pa_end = 0x4903807f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> timer5 (dma) */ @@ -4229,7 +4230,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer5_dma = { .slave = &omap44xx_timer5_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_timer5_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer5_dma_addrs), .user = OCP_USER_SDMA, }; @@ -4267,6 +4267,7 @@ static struct omap_hwmod_addr_space omap44xx_timer6_addrs[] = { .pa_end = 0x4013a07f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> timer6 */ @@ -4275,7 +4276,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer6 = { .slave = &omap44xx_timer6_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_timer6_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer6_addrs), .user = OCP_USER_MPU, }; @@ -4285,6 +4285,7 @@ static struct omap_hwmod_addr_space omap44xx_timer6_dma_addrs[] = { .pa_end = 0x4903a07f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> timer6 (dma) */ @@ -4293,7 +4294,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer6_dma = { .slave = &omap44xx_timer6_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_timer6_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer6_dma_addrs), .user = OCP_USER_SDMA, }; @@ -4331,6 +4331,7 @@ static struct omap_hwmod_addr_space omap44xx_timer7_addrs[] = { .pa_end = 0x4013c07f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> timer7 */ @@ -4339,7 +4340,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer7 = { .slave = &omap44xx_timer7_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_timer7_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer7_addrs), .user = OCP_USER_MPU, }; @@ -4349,6 +4349,7 @@ static struct omap_hwmod_addr_space omap44xx_timer7_dma_addrs[] = { .pa_end = 0x4903c07f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> timer7 (dma) */ @@ -4357,7 +4358,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer7_dma = { .slave = &omap44xx_timer7_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_timer7_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer7_dma_addrs), .user = OCP_USER_SDMA, }; @@ -4395,6 +4395,7 @@ static struct omap_hwmod_addr_space omap44xx_timer8_addrs[] = { .pa_end = 0x4013e07f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> timer8 */ @@ -4403,7 +4404,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer8 = { .slave = &omap44xx_timer8_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_timer8_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer8_addrs), .user = OCP_USER_MPU, }; @@ -4413,6 +4413,7 @@ static struct omap_hwmod_addr_space omap44xx_timer8_dma_addrs[] = { .pa_end = 0x4903e07f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> timer8 (dma) */ @@ -4421,7 +4422,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer8_dma = { .slave = &omap44xx_timer8_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_timer8_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer8_dma_addrs), .user = OCP_USER_SDMA, }; @@ -4459,6 +4459,7 @@ static struct omap_hwmod_addr_space omap44xx_timer9_addrs[] = { .pa_end = 0x4803e07f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer9 */ @@ -4467,7 +4468,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer9 = { .slave = &omap44xx_timer9_hwmod, .clk = "l4_div_ck", .addr = omap44xx_timer9_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer9_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4504,6 +4504,7 @@ static struct omap_hwmod_addr_space omap44xx_timer10_addrs[] = { .pa_end = 0x4808607f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer10 */ @@ -4512,7 +4513,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer10 = { .slave = &omap44xx_timer10_hwmod, .clk = "l4_div_ck", .addr = omap44xx_timer10_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer10_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4549,6 +4549,7 @@ static struct omap_hwmod_addr_space omap44xx_timer11_addrs[] = { .pa_end = 0x4808807f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> timer11 */ @@ -4557,7 +4558,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer11 = { .slave = &omap44xx_timer11_hwmod, .clk = "l4_div_ck", .addr = omap44xx_timer11_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_timer11_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4621,6 +4621,7 @@ static struct omap_hwmod_addr_space omap44xx_uart1_addrs[] = { .pa_end = 0x4806a0ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> uart1 */ @@ -4629,7 +4630,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__uart1 = { .slave = &omap44xx_uart1_hwmod, .clk = "l4_div_ck", .addr = omap44xx_uart1_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_uart1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4673,6 +4673,7 @@ static struct omap_hwmod_addr_space omap44xx_uart2_addrs[] = { .pa_end = 0x4806c0ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> uart2 */ @@ -4681,7 +4682,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__uart2 = { .slave = &omap44xx_uart2_hwmod, .clk = "l4_div_ck", .addr = omap44xx_uart2_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_uart2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4725,6 +4725,7 @@ static struct omap_hwmod_addr_space omap44xx_uart3_addrs[] = { .pa_end = 0x480200ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> uart3 */ @@ -4733,7 +4734,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__uart3 = { .slave = &omap44xx_uart3_hwmod, .clk = "l4_div_ck", .addr = omap44xx_uart3_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_uart3_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4778,6 +4778,7 @@ static struct omap_hwmod_addr_space omap44xx_uart4_addrs[] = { .pa_end = 0x4806e0ff, .flags = ADDR_TYPE_RT }, + { } }; /* l4_per -> uart4 */ @@ -4786,7 +4787,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__uart4 = { .slave = &omap44xx_uart4_hwmod, .clk = "l4_div_ck", .addr = omap44xx_uart4_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_uart4_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4853,6 +4853,7 @@ static struct omap_hwmod_addr_space omap44xx_usb_otg_hs_addrs[] = { .pa_end = 0x4a0ab003, .flags = ADDR_TYPE_RT }, + { } }; /* l4_cfg -> usb_otg_hs */ @@ -4861,7 +4862,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_otg_hs = { .slave = &omap44xx_usb_otg_hs_hwmod, .clk = "l4_div_ck", .addr = omap44xx_usb_otg_hs_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4930,6 +4930,7 @@ static struct omap_hwmod_addr_space omap44xx_wd_timer2_addrs[] = { .pa_end = 0x4a31407f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_wkup -> wd_timer2 */ @@ -4938,7 +4939,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__wd_timer2 = { .slave = &omap44xx_wd_timer2_hwmod, .clk = "l4_wkup_clk_mux_ck", .addr = omap44xx_wd_timer2_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_wd_timer2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -4975,6 +4975,7 @@ static struct omap_hwmod_addr_space omap44xx_wd_timer3_addrs[] = { .pa_end = 0x4013007f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> wd_timer3 */ @@ -4983,7 +4984,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3 = { .slave = &omap44xx_wd_timer3_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_wd_timer3_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_wd_timer3_addrs), .user = OCP_USER_MPU, }; @@ -4993,6 +4993,7 @@ static struct omap_hwmod_addr_space omap44xx_wd_timer3_dma_addrs[] = { .pa_end = 0x4903007f, .flags = ADDR_TYPE_RT }, + { } }; /* l4_abe -> wd_timer3 (dma) */ @@ -5001,7 +5002,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3_dma = { .slave = &omap44xx_wd_timer3_hwmod, .clk = "ocp_abe_iclk", .addr = omap44xx_wd_timer3_dma_addrs, - .addr_cnt = ARRAY_SIZE(omap44xx_wd_timer3_dma_addrs), .user = OCP_USER_SDMA, }; diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 1adea9c6298..523e0b585b6 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -220,7 +220,6 @@ struct omap_hwmod_addr_space { * @clk: interface clock: OMAP clock name * @_clk: pointer to the interface struct clk (filled in at runtime) * @fw: interface firewall data - * @addr_cnt: ARRAY_SIZE(@addr) * @width: OCP data width * @user: initiators using this interface (see OCP_USER_* macros above) * @flags: OCP interface flags (see OCPIF_* macros above) @@ -239,7 +238,6 @@ struct omap_hwmod_ocp_if { union { struct omap_hwmod_omap2_firewall omap2; } fw; - u8 addr_cnt; u8 width; u8 user; u8 flags; -- cgit v1.2.3-70-g09d2 From 212738a4499d278254ed6fdb400e3b4be4cb1de2 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Sat, 9 Jul 2011 19:14:06 -0600 Subject: omap_hwmod: use a terminator record with omap_hwmod_mpu_irqs arrays Previously, struct omap_hwmod_mpu_irqs arrays were unterminated; and users of these arrays used the ARRAY_SIZE() macro to determine the length of the array. However, ARRAY_SIZE() only works when the array is in the same scope as the macro user. So far this hasn't been a problem. However, to reduce duplicated data, a subsequent patch will move common data to a separate, shared file. When this is done, ARRAY_SIZE() will no longer be usable. This patch removes ARRAY_SIZE() usage for struct omap_hwmod_mpu_irqs arrays and uses a sentinel value (irq == -1) as the array terminator instead. Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod.c | 30 ++++++- arch/arm/mach-omap2/omap_hwmod_2420_data.c | 56 ++++++------ arch/arm/mach-omap2/omap_hwmod_2430_data.c | 72 +++++++-------- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 92 +++++++++---------- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 127 ++++++++++++++------------- arch/arm/plat-omap/include/plat/omap_hwmod.h | 8 +- 6 files changed, 205 insertions(+), 180 deletions(-) (limited to 'arch/arm/mach-omap2/omap_hwmod.c') diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 77094d75367..21e3eb8e83c 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -678,6 +678,29 @@ static void _disable_optional_clocks(struct omap_hwmod *oh) } } +/** + * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh + * @oh: struct omap_hwmod *oh + * + * Count and return the number of MPU IRQs associated with the hwmod + * @oh. Used to allocate struct resource data. Returns 0 if @oh is + * NULL. + */ +static int _count_mpu_irqs(struct omap_hwmod *oh) +{ + struct omap_hwmod_irq_info *ohii; + int i = 0; + + if (!oh || !oh->mpu_irqs) + return 0; + + do { + ohii = &oh->mpu_irqs[i++]; + } while (ohii->irq != -1); + + return i; +} + /** * _count_ocp_if_addr_spaces - count the number of address space entries for @oh * @oh: struct omap_hwmod *oh @@ -1964,7 +1987,7 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh) { int ret, i; - ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt; + ret = _count_mpu_irqs(oh) + oh->sdma_reqs_cnt; for (i = 0; i < oh->slaves_cnt; i++) ret += _count_ocp_if_addr_spaces(oh->slaves[i]); @@ -1984,12 +2007,13 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh) */ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) { - int i, j; + int i, j, mpu_irqs_cnt; int r = 0; /* For each IRQ, DMA, memory area, fill in array.*/ - for (i = 0; i < oh->mpu_irqs_cnt; i++) { + mpu_irqs_cnt = _count_mpu_irqs(oh); + for (i = 0; i < mpu_irqs_cnt; i++) { (res + r)->name = (oh->mpu_irqs + i)->name; (res + r)->start = (oh->mpu_irqs + i)->irq; (res + r)->end = (oh->mpu_irqs + i)->irq; diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 3ec625c40c1..04730d33ba5 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -296,6 +296,7 @@ static struct omap_hwmod_class omap2420_timer_hwmod_class = { static struct omap_hwmod omap2420_timer1_hwmod; static struct omap_hwmod_irq_info omap2420_timer1_mpu_irqs[] = { { .irq = 37, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap2420_timer1_addrs[] = { @@ -325,7 +326,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer1_slaves[] = { static struct omap_hwmod omap2420_timer1_hwmod = { .name = "timer1", .mpu_irqs = omap2420_timer1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer1_mpu_irqs), .main_clk = "gpt1_fck", .prcm = { .omap2 = { @@ -346,6 +346,7 @@ static struct omap_hwmod omap2420_timer1_hwmod = { static struct omap_hwmod omap2420_timer2_hwmod; static struct omap_hwmod_irq_info omap2420_timer2_mpu_irqs[] = { { .irq = 38, }, + { .irq = -1 } }; @@ -367,7 +368,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer2_slaves[] = { static struct omap_hwmod omap2420_timer2_hwmod = { .name = "timer2", .mpu_irqs = omap2420_timer2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer2_mpu_irqs), .main_clk = "gpt2_fck", .prcm = { .omap2 = { @@ -388,6 +388,7 @@ static struct omap_hwmod omap2420_timer2_hwmod = { static struct omap_hwmod omap2420_timer3_hwmod; static struct omap_hwmod_irq_info omap2420_timer3_mpu_irqs[] = { { .irq = 39, }, + { .irq = -1 } }; /* l4_core -> timer3 */ @@ -408,7 +409,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer3_slaves[] = { static struct omap_hwmod omap2420_timer3_hwmod = { .name = "timer3", .mpu_irqs = omap2420_timer3_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer3_mpu_irqs), .main_clk = "gpt3_fck", .prcm = { .omap2 = { @@ -429,6 +429,7 @@ static struct omap_hwmod omap2420_timer3_hwmod = { static struct omap_hwmod omap2420_timer4_hwmod; static struct omap_hwmod_irq_info omap2420_timer4_mpu_irqs[] = { { .irq = 40, }, + { .irq = -1 } }; /* l4_core -> timer4 */ @@ -449,7 +450,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer4_slaves[] = { static struct omap_hwmod omap2420_timer4_hwmod = { .name = "timer4", .mpu_irqs = omap2420_timer4_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer4_mpu_irqs), .main_clk = "gpt4_fck", .prcm = { .omap2 = { @@ -470,6 +470,7 @@ static struct omap_hwmod omap2420_timer4_hwmod = { static struct omap_hwmod omap2420_timer5_hwmod; static struct omap_hwmod_irq_info omap2420_timer5_mpu_irqs[] = { { .irq = 41, }, + { .irq = -1 } }; /* l4_core -> timer5 */ @@ -490,7 +491,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer5_slaves[] = { static struct omap_hwmod omap2420_timer5_hwmod = { .name = "timer5", .mpu_irqs = omap2420_timer5_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer5_mpu_irqs), .main_clk = "gpt5_fck", .prcm = { .omap2 = { @@ -512,6 +512,7 @@ static struct omap_hwmod omap2420_timer5_hwmod = { static struct omap_hwmod omap2420_timer6_hwmod; static struct omap_hwmod_irq_info omap2420_timer6_mpu_irqs[] = { { .irq = 42, }, + { .irq = -1 } }; /* l4_core -> timer6 */ @@ -532,7 +533,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer6_slaves[] = { static struct omap_hwmod omap2420_timer6_hwmod = { .name = "timer6", .mpu_irqs = omap2420_timer6_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer6_mpu_irqs), .main_clk = "gpt6_fck", .prcm = { .omap2 = { @@ -553,6 +553,7 @@ static struct omap_hwmod omap2420_timer6_hwmod = { static struct omap_hwmod omap2420_timer7_hwmod; static struct omap_hwmod_irq_info omap2420_timer7_mpu_irqs[] = { { .irq = 43, }, + { .irq = -1 } }; /* l4_core -> timer7 */ @@ -573,7 +574,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer7_slaves[] = { static struct omap_hwmod omap2420_timer7_hwmod = { .name = "timer7", .mpu_irqs = omap2420_timer7_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer7_mpu_irqs), .main_clk = "gpt7_fck", .prcm = { .omap2 = { @@ -594,6 +594,7 @@ static struct omap_hwmod omap2420_timer7_hwmod = { static struct omap_hwmod omap2420_timer8_hwmod; static struct omap_hwmod_irq_info omap2420_timer8_mpu_irqs[] = { { .irq = 44, }, + { .irq = -1 } }; /* l4_core -> timer8 */ @@ -614,7 +615,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer8_slaves[] = { static struct omap_hwmod omap2420_timer8_hwmod = { .name = "timer8", .mpu_irqs = omap2420_timer8_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer8_mpu_irqs), .main_clk = "gpt8_fck", .prcm = { .omap2 = { @@ -635,6 +635,7 @@ static struct omap_hwmod omap2420_timer8_hwmod = { static struct omap_hwmod omap2420_timer9_hwmod; static struct omap_hwmod_irq_info omap2420_timer9_mpu_irqs[] = { { .irq = 45, }, + { .irq = -1 } }; /* l4_core -> timer9 */ @@ -655,7 +656,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer9_slaves[] = { static struct omap_hwmod omap2420_timer9_hwmod = { .name = "timer9", .mpu_irqs = omap2420_timer9_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer9_mpu_irqs), .main_clk = "gpt9_fck", .prcm = { .omap2 = { @@ -676,6 +676,7 @@ static struct omap_hwmod omap2420_timer9_hwmod = { static struct omap_hwmod omap2420_timer10_hwmod; static struct omap_hwmod_irq_info omap2420_timer10_mpu_irqs[] = { { .irq = 46, }, + { .irq = -1 } }; /* l4_core -> timer10 */ @@ -696,7 +697,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer10_slaves[] = { static struct omap_hwmod omap2420_timer10_hwmod = { .name = "timer10", .mpu_irqs = omap2420_timer10_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer10_mpu_irqs), .main_clk = "gpt10_fck", .prcm = { .omap2 = { @@ -717,6 +717,7 @@ static struct omap_hwmod omap2420_timer10_hwmod = { static struct omap_hwmod omap2420_timer11_hwmod; static struct omap_hwmod_irq_info omap2420_timer11_mpu_irqs[] = { { .irq = 47, }, + { .irq = -1 } }; /* l4_core -> timer11 */ @@ -737,7 +738,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer11_slaves[] = { static struct omap_hwmod omap2420_timer11_hwmod = { .name = "timer11", .mpu_irqs = omap2420_timer11_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer11_mpu_irqs), .main_clk = "gpt11_fck", .prcm = { .omap2 = { @@ -758,6 +758,7 @@ static struct omap_hwmod omap2420_timer11_hwmod = { static struct omap_hwmod omap2420_timer12_hwmod; static struct omap_hwmod_irq_info omap2420_timer12_mpu_irqs[] = { { .irq = 48, }, + { .irq = -1 } }; /* l4_core -> timer12 */ @@ -778,7 +779,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer12_slaves[] = { static struct omap_hwmod omap2420_timer12_hwmod = { .name = "timer12", .mpu_irqs = omap2420_timer12_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer12_mpu_irqs), .main_clk = "gpt12_fck", .prcm = { .omap2 = { @@ -879,6 +879,7 @@ static struct omap_hwmod_class uart_class = { static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { { .irq = INT_24XX_UART1_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { @@ -893,7 +894,6 @@ static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { static struct omap_hwmod omap2420_uart1_hwmod = { .name = "uart1", .mpu_irqs = uart1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs), .sdma_reqs = uart1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), .main_clk = "uart1_fck", @@ -916,6 +916,7 @@ static struct omap_hwmod omap2420_uart1_hwmod = { static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { { .irq = INT_24XX_UART2_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { @@ -930,7 +931,6 @@ static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = { static struct omap_hwmod omap2420_uart2_hwmod = { .name = "uart2", .mpu_irqs = uart2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs), .sdma_reqs = uart2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), .main_clk = "uart2_fck", @@ -953,6 +953,7 @@ static struct omap_hwmod omap2420_uart2_hwmod = { static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { { .irq = INT_24XX_UART3_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { @@ -967,7 +968,6 @@ static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = { static struct omap_hwmod omap2420_uart3_hwmod = { .name = "uart3", .mpu_irqs = uart3_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs), .sdma_reqs = uart3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), .main_clk = "uart3_fck", @@ -1087,6 +1087,7 @@ static struct omap_hwmod_class omap2420_dispc_hwmod_class = { static struct omap_hwmod_irq_info omap2420_dispc_irqs[] = { { .irq = 25 }, + { .irq = -1 } }; /* l4_core -> dss_dispc */ @@ -1113,7 +1114,6 @@ static struct omap_hwmod omap2420_dss_dispc_hwmod = { .name = "dss_dispc", .class = &omap2420_dispc_hwmod_class, .mpu_irqs = omap2420_dispc_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_dispc_irqs), .main_clk = "dss1_fck", .prcm = { .omap2 = { @@ -1254,6 +1254,7 @@ static struct omap_i2c_dev_attr i2c_dev_attr; static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { { .irq = INT_24XX_I2C1_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { @@ -1268,7 +1269,6 @@ static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = { static struct omap_hwmod omap2420_i2c1_hwmod = { .name = "i2c1", .mpu_irqs = i2c1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs), .sdma_reqs = i2c1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), .main_clk = "i2c1_fck", @@ -1293,6 +1293,7 @@ static struct omap_hwmod omap2420_i2c1_hwmod = { static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { { .irq = INT_24XX_I2C2_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { @@ -1307,7 +1308,6 @@ static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = { static struct omap_hwmod omap2420_i2c2_hwmod = { .name = "i2c2", .mpu_irqs = i2c2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(i2c2_mpu_irqs), .sdma_reqs = i2c2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), .main_clk = "i2c2_fck", @@ -1430,6 +1430,7 @@ static struct omap_hwmod_class omap242x_gpio_hwmod_class = { /* gpio1 */ static struct omap_hwmod_irq_info omap242x_gpio1_irqs[] = { { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ + { .irq = -1 } }; static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = { @@ -1440,7 +1441,6 @@ static struct omap_hwmod omap2420_gpio1_hwmod = { .name = "gpio1", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap242x_gpio1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio1_irqs), .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1461,6 +1461,7 @@ static struct omap_hwmod omap2420_gpio1_hwmod = { /* gpio2 */ static struct omap_hwmod_irq_info omap242x_gpio2_irqs[] = { { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ + { .irq = -1 } }; static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = { @@ -1471,7 +1472,6 @@ static struct omap_hwmod omap2420_gpio2_hwmod = { .name = "gpio2", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap242x_gpio2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio2_irqs), .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1492,6 +1492,7 @@ static struct omap_hwmod omap2420_gpio2_hwmod = { /* gpio3 */ static struct omap_hwmod_irq_info omap242x_gpio3_irqs[] = { { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ + { .irq = -1 } }; static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = { @@ -1502,7 +1503,6 @@ static struct omap_hwmod omap2420_gpio3_hwmod = { .name = "gpio3", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap242x_gpio3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio3_irqs), .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1523,6 +1523,7 @@ static struct omap_hwmod omap2420_gpio3_hwmod = { /* gpio4 */ static struct omap_hwmod_irq_info omap242x_gpio4_irqs[] = { { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ + { .irq = -1 } }; static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = { @@ -1533,7 +1534,6 @@ static struct omap_hwmod omap2420_gpio4_hwmod = { .name = "gpio4", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap242x_gpio4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio4_irqs), .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1580,6 +1580,7 @@ static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = { { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ + { .irq = -1 } }; /* dma_system -> L3 */ @@ -1613,7 +1614,6 @@ static struct omap_hwmod omap2420_dma_system_hwmod = { .name = "dma", .class = &omap2420_dma_hwmod_class, .mpu_irqs = omap2420_dma_system_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_dma_system_irqs), .main_clk = "core_l3_ck", .slaves = omap2420_dma_system_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_dma_system_slaves), @@ -1650,6 +1650,7 @@ static struct omap_hwmod omap2420_mailbox_hwmod; static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = { { .name = "dsp", .irq = 26 }, { .name = "iva", .irq = 34 }, + { .irq = -1 } }; /* l4_core -> mailbox */ @@ -1669,7 +1670,6 @@ static struct omap_hwmod omap2420_mailbox_hwmod = { .name = "mailbox", .class = &omap2420_mailbox_hwmod_class, .mpu_irqs = omap2420_mailbox_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mailbox_irqs), .main_clk = "mailboxes_ick", .prcm = { .omap2 = { @@ -1711,6 +1711,7 @@ static struct omap_hwmod_class omap2420_mcspi_class = { /* mcspi1 */ static struct omap_hwmod_irq_info omap2420_mcspi1_mpu_irqs[] = { { .irq = 65 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = { @@ -1735,7 +1736,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { static struct omap_hwmod omap2420_mcspi1_hwmod = { .name = "mcspi1_hwmod", .mpu_irqs = omap2420_mcspi1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcspi1_mpu_irqs), .sdma_reqs = omap2420_mcspi1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", @@ -1758,6 +1758,7 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = { /* mcspi2 */ static struct omap_hwmod_irq_info omap2420_mcspi2_mpu_irqs[] = { { .irq = 66 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = { @@ -1778,7 +1779,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { static struct omap_hwmod omap2420_mcspi2_hwmod = { .name = "mcspi2_hwmod", .mpu_irqs = omap2420_mcspi2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcspi2_mpu_irqs), .sdma_reqs = omap2420_mcspi2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", @@ -1811,6 +1811,7 @@ static struct omap_hwmod_class omap2420_mcbsp_hwmod_class = { static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = { { .name = "tx", .irq = 59 }, { .name = "rx", .irq = 60 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = { @@ -1836,7 +1837,6 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = { .name = "mcbsp1", .class = &omap2420_mcbsp_hwmod_class, .mpu_irqs = omap2420_mcbsp1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcbsp1_irqs), .sdma_reqs = omap2420_mcbsp1_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp1_sdma_chs), .main_clk = "mcbsp1_fck", @@ -1858,6 +1858,7 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = { static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = { { .name = "tx", .irq = 62 }, { .name = "rx", .irq = 63 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = { @@ -1883,7 +1884,6 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = { .name = "mcbsp2", .class = &omap2420_mcbsp_hwmod_class, .mpu_irqs = omap2420_mcbsp2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcbsp2_irqs), .sdma_reqs = omap2420_mcbsp2_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp2_sdma_chs), .main_clk = "mcbsp2_fck", diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 9531ef2802f..2c28468a37f 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -369,6 +369,7 @@ static struct omap_hwmod_class omap2430_timer_hwmod_class = { static struct omap_hwmod omap2430_timer1_hwmod; static struct omap_hwmod_irq_info omap2430_timer1_mpu_irqs[] = { { .irq = 37, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = { @@ -398,7 +399,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer1_slaves[] = { static struct omap_hwmod omap2430_timer1_hwmod = { .name = "timer1", .mpu_irqs = omap2430_timer1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer1_mpu_irqs), .main_clk = "gpt1_fck", .prcm = { .omap2 = { @@ -419,6 +419,7 @@ static struct omap_hwmod omap2430_timer1_hwmod = { static struct omap_hwmod omap2430_timer2_hwmod; static struct omap_hwmod_irq_info omap2430_timer2_mpu_irqs[] = { { .irq = 38, }, + { .irq = -1 } }; /* l4_core -> timer2 */ @@ -439,7 +440,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer2_slaves[] = { static struct omap_hwmod omap2430_timer2_hwmod = { .name = "timer2", .mpu_irqs = omap2430_timer2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer2_mpu_irqs), .main_clk = "gpt2_fck", .prcm = { .omap2 = { @@ -460,6 +460,7 @@ static struct omap_hwmod omap2430_timer2_hwmod = { static struct omap_hwmod omap2430_timer3_hwmod; static struct omap_hwmod_irq_info omap2430_timer3_mpu_irqs[] = { { .irq = 39, }, + { .irq = -1 } }; /* l4_core -> timer3 */ @@ -480,7 +481,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer3_slaves[] = { static struct omap_hwmod omap2430_timer3_hwmod = { .name = "timer3", .mpu_irqs = omap2430_timer3_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer3_mpu_irqs), .main_clk = "gpt3_fck", .prcm = { .omap2 = { @@ -501,6 +501,7 @@ static struct omap_hwmod omap2430_timer3_hwmod = { static struct omap_hwmod omap2430_timer4_hwmod; static struct omap_hwmod_irq_info omap2430_timer4_mpu_irqs[] = { { .irq = 40, }, + { .irq = -1 } }; /* l4_core -> timer4 */ @@ -521,7 +522,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer4_slaves[] = { static struct omap_hwmod omap2430_timer4_hwmod = { .name = "timer4", .mpu_irqs = omap2430_timer4_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer4_mpu_irqs), .main_clk = "gpt4_fck", .prcm = { .omap2 = { @@ -542,6 +542,7 @@ static struct omap_hwmod omap2430_timer4_hwmod = { static struct omap_hwmod omap2430_timer5_hwmod; static struct omap_hwmod_irq_info omap2430_timer5_mpu_irqs[] = { { .irq = 41, }, + { .irq = -1 } }; /* l4_core -> timer5 */ @@ -562,7 +563,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer5_slaves[] = { static struct omap_hwmod omap2430_timer5_hwmod = { .name = "timer5", .mpu_irqs = omap2430_timer5_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer5_mpu_irqs), .main_clk = "gpt5_fck", .prcm = { .omap2 = { @@ -583,6 +583,7 @@ static struct omap_hwmod omap2430_timer5_hwmod = { static struct omap_hwmod omap2430_timer6_hwmod; static struct omap_hwmod_irq_info omap2430_timer6_mpu_irqs[] = { { .irq = 42, }, + { .irq = -1 } }; /* l4_core -> timer6 */ @@ -603,7 +604,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer6_slaves[] = { static struct omap_hwmod omap2430_timer6_hwmod = { .name = "timer6", .mpu_irqs = omap2430_timer6_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer6_mpu_irqs), .main_clk = "gpt6_fck", .prcm = { .omap2 = { @@ -624,6 +624,7 @@ static struct omap_hwmod omap2430_timer6_hwmod = { static struct omap_hwmod omap2430_timer7_hwmod; static struct omap_hwmod_irq_info omap2430_timer7_mpu_irqs[] = { { .irq = 43, }, + { .irq = -1 } }; /* l4_core -> timer7 */ @@ -644,7 +645,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer7_slaves[] = { static struct omap_hwmod omap2430_timer7_hwmod = { .name = "timer7", .mpu_irqs = omap2430_timer7_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer7_mpu_irqs), .main_clk = "gpt7_fck", .prcm = { .omap2 = { @@ -665,6 +665,7 @@ static struct omap_hwmod omap2430_timer7_hwmod = { static struct omap_hwmod omap2430_timer8_hwmod; static struct omap_hwmod_irq_info omap2430_timer8_mpu_irqs[] = { { .irq = 44, }, + { .irq = -1 } }; /* l4_core -> timer8 */ @@ -685,7 +686,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer8_slaves[] = { static struct omap_hwmod omap2430_timer8_hwmod = { .name = "timer8", .mpu_irqs = omap2430_timer8_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer8_mpu_irqs), .main_clk = "gpt8_fck", .prcm = { .omap2 = { @@ -706,6 +706,7 @@ static struct omap_hwmod omap2430_timer8_hwmod = { static struct omap_hwmod omap2430_timer9_hwmod; static struct omap_hwmod_irq_info omap2430_timer9_mpu_irqs[] = { { .irq = 45, }, + { .irq = -1 } }; /* l4_core -> timer9 */ @@ -726,7 +727,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer9_slaves[] = { static struct omap_hwmod omap2430_timer9_hwmod = { .name = "timer9", .mpu_irqs = omap2430_timer9_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer9_mpu_irqs), .main_clk = "gpt9_fck", .prcm = { .omap2 = { @@ -747,6 +747,7 @@ static struct omap_hwmod omap2430_timer9_hwmod = { static struct omap_hwmod omap2430_timer10_hwmod; static struct omap_hwmod_irq_info omap2430_timer10_mpu_irqs[] = { { .irq = 46, }, + { .irq = -1 } }; /* l4_core -> timer10 */ @@ -767,7 +768,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer10_slaves[] = { static struct omap_hwmod omap2430_timer10_hwmod = { .name = "timer10", .mpu_irqs = omap2430_timer10_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer10_mpu_irqs), .main_clk = "gpt10_fck", .prcm = { .omap2 = { @@ -788,6 +788,7 @@ static struct omap_hwmod omap2430_timer10_hwmod = { static struct omap_hwmod omap2430_timer11_hwmod; static struct omap_hwmod_irq_info omap2430_timer11_mpu_irqs[] = { { .irq = 47, }, + { .irq = -1 } }; /* l4_core -> timer11 */ @@ -808,7 +809,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer11_slaves[] = { static struct omap_hwmod omap2430_timer11_hwmod = { .name = "timer11", .mpu_irqs = omap2430_timer11_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer11_mpu_irqs), .main_clk = "gpt11_fck", .prcm = { .omap2 = { @@ -829,6 +829,7 @@ static struct omap_hwmod omap2430_timer11_hwmod = { static struct omap_hwmod omap2430_timer12_hwmod; static struct omap_hwmod_irq_info omap2430_timer12_mpu_irqs[] = { { .irq = 48, }, + { .irq = -1 } }; /* l4_core -> timer12 */ @@ -849,7 +850,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer12_slaves[] = { static struct omap_hwmod omap2430_timer12_hwmod = { .name = "timer12", .mpu_irqs = omap2430_timer12_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer12_mpu_irqs), .main_clk = "gpt12_fck", .prcm = { .omap2 = { @@ -950,6 +950,7 @@ static struct omap_hwmod_class uart_class = { static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { { .irq = INT_24XX_UART1_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { @@ -964,7 +965,6 @@ static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { static struct omap_hwmod omap2430_uart1_hwmod = { .name = "uart1", .mpu_irqs = uart1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs), .sdma_reqs = uart1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), .main_clk = "uart1_fck", @@ -987,6 +987,7 @@ static struct omap_hwmod omap2430_uart1_hwmod = { static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { { .irq = INT_24XX_UART2_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { @@ -1001,7 +1002,6 @@ static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = { static struct omap_hwmod omap2430_uart2_hwmod = { .name = "uart2", .mpu_irqs = uart2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs), .sdma_reqs = uart2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), .main_clk = "uart2_fck", @@ -1024,6 +1024,7 @@ static struct omap_hwmod omap2430_uart2_hwmod = { static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { { .irq = INT_24XX_UART3_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { @@ -1038,7 +1039,6 @@ static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = { static struct omap_hwmod omap2430_uart3_hwmod = { .name = "uart3", .mpu_irqs = uart3_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs), .sdma_reqs = uart3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), .main_clk = "uart3_fck", @@ -1152,6 +1152,7 @@ static struct omap_hwmod_class omap2430_dispc_hwmod_class = { static struct omap_hwmod_irq_info omap2430_dispc_irqs[] = { { .irq = 25 }, + { .irq = -1 } }; /* l4_core -> dss_dispc */ @@ -1172,7 +1173,6 @@ static struct omap_hwmod omap2430_dss_dispc_hwmod = { .name = "dss_dispc", .class = &omap2430_dispc_hwmod_class, .mpu_irqs = omap2430_dispc_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dispc_irqs), .main_clk = "dss1_fck", .prcm = { .omap2 = { @@ -1304,6 +1304,7 @@ static struct omap_i2c_dev_attr i2c_dev_attr = { static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { { .irq = INT_24XX_I2C1_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { @@ -1318,7 +1319,6 @@ static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { static struct omap_hwmod omap2430_i2c1_hwmod = { .name = "i2c1", .mpu_irqs = i2c1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs), .sdma_reqs = i2c1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), .main_clk = "i2chs1_fck", @@ -1350,6 +1350,7 @@ static struct omap_hwmod omap2430_i2c1_hwmod = { static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { { .irq = INT_24XX_I2C2_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { @@ -1364,7 +1365,6 @@ static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { static struct omap_hwmod omap2430_i2c2_hwmod = { .name = "i2c2", .mpu_irqs = i2c2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(i2c2_mpu_irqs), .sdma_reqs = i2c2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), .main_clk = "i2chs2_fck", @@ -1504,6 +1504,7 @@ static struct omap_hwmod_class omap243x_gpio_hwmod_class = { /* gpio1 */ static struct omap_hwmod_irq_info omap243x_gpio1_irqs[] = { { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ + { .irq = -1 } }; static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = { @@ -1514,7 +1515,6 @@ static struct omap_hwmod omap2430_gpio1_hwmod = { .name = "gpio1", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap243x_gpio1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio1_irqs), .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1535,6 +1535,7 @@ static struct omap_hwmod omap2430_gpio1_hwmod = { /* gpio2 */ static struct omap_hwmod_irq_info omap243x_gpio2_irqs[] = { { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ + { .irq = -1 } }; static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = { @@ -1545,7 +1546,6 @@ static struct omap_hwmod omap2430_gpio2_hwmod = { .name = "gpio2", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap243x_gpio2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio2_irqs), .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1566,6 +1566,7 @@ static struct omap_hwmod omap2430_gpio2_hwmod = { /* gpio3 */ static struct omap_hwmod_irq_info omap243x_gpio3_irqs[] = { { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ + { .irq = -1 } }; static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = { @@ -1576,7 +1577,6 @@ static struct omap_hwmod omap2430_gpio3_hwmod = { .name = "gpio3", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap243x_gpio3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio3_irqs), .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1597,6 +1597,7 @@ static struct omap_hwmod omap2430_gpio3_hwmod = { /* gpio4 */ static struct omap_hwmod_irq_info omap243x_gpio4_irqs[] = { { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ + { .irq = -1 } }; static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = { @@ -1607,7 +1608,6 @@ static struct omap_hwmod omap2430_gpio4_hwmod = { .name = "gpio4", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap243x_gpio4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio4_irqs), .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1628,6 +1628,7 @@ static struct omap_hwmod omap2430_gpio4_hwmod = { /* gpio5 */ static struct omap_hwmod_irq_info omap243x_gpio5_irqs[] = { { .irq = 33 }, /* INT_24XX_GPIO_BANK5 */ + { .irq = -1 } }; static struct omap_hwmod_ocp_if *omap2430_gpio5_slaves[] = { @@ -1638,7 +1639,6 @@ static struct omap_hwmod omap2430_gpio5_hwmod = { .name = "gpio5", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap243x_gpio5_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio5_irqs), .main_clk = "gpio5_fck", .prcm = { .omap2 = { @@ -1685,6 +1685,7 @@ static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = { { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ + { .irq = -1 } }; /* dma_system -> L3 */ @@ -1718,7 +1719,6 @@ static struct omap_hwmod omap2430_dma_system_hwmod = { .name = "dma", .class = &omap2430_dma_hwmod_class, .mpu_irqs = omap2430_dma_system_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dma_system_irqs), .main_clk = "core_l3_ck", .slaves = omap2430_dma_system_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_dma_system_slaves), @@ -1754,6 +1754,7 @@ static struct omap_hwmod_class omap2430_mailbox_hwmod_class = { static struct omap_hwmod omap2430_mailbox_hwmod; static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = { { .irq = 26 }, + { .irq = -1 } }; /* l4_core -> mailbox */ @@ -1773,7 +1774,6 @@ static struct omap_hwmod omap2430_mailbox_hwmod = { .name = "mailbox", .class = &omap2430_mailbox_hwmod_class, .mpu_irqs = omap2430_mailbox_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mailbox_irqs), .main_clk = "mailboxes_ick", .prcm = { .omap2 = { @@ -1815,6 +1815,7 @@ static struct omap_hwmod_class omap2430_mcspi_class = { /* mcspi1 */ static struct omap_hwmod_irq_info omap2430_mcspi1_mpu_irqs[] = { { .irq = 65 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = { @@ -1839,7 +1840,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { static struct omap_hwmod omap2430_mcspi1_hwmod = { .name = "mcspi1_hwmod", .mpu_irqs = omap2430_mcspi1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi1_mpu_irqs), .sdma_reqs = omap2430_mcspi1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", @@ -1862,6 +1862,7 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = { /* mcspi2 */ static struct omap_hwmod_irq_info omap2430_mcspi2_mpu_irqs[] = { { .irq = 66 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = { @@ -1882,7 +1883,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { static struct omap_hwmod omap2430_mcspi2_hwmod = { .name = "mcspi2_hwmod", .mpu_irqs = omap2430_mcspi2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi2_mpu_irqs), .sdma_reqs = omap2430_mcspi2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", @@ -1905,6 +1905,7 @@ static struct omap_hwmod omap2430_mcspi2_hwmod = { /* mcspi3 */ static struct omap_hwmod_irq_info omap2430_mcspi3_mpu_irqs[] = { { .irq = 91 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2430_mcspi3_sdma_reqs[] = { @@ -1925,7 +1926,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = { static struct omap_hwmod omap2430_mcspi3_hwmod = { .name = "mcspi3_hwmod", .mpu_irqs = omap2430_mcspi3_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi3_mpu_irqs), .sdma_reqs = omap2430_mcspi3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi3_sdma_reqs), .main_clk = "mcspi3_fck", @@ -1970,12 +1970,12 @@ static struct omap_hwmod_irq_info omap2430_usbhsotg_mpu_irqs[] = { { .name = "mc", .irq = 92 }, { .name = "dma", .irq = 93 }, + { .irq = -1 } }; static struct omap_hwmod omap2430_usbhsotg_hwmod = { .name = "usb_otg_hs", .mpu_irqs = omap2430_usbhsotg_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_usbhsotg_mpu_irqs), .main_clk = "usbhs_ick", .prcm = { .omap2 = { @@ -2025,6 +2025,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = { { .name = "rx", .irq = 60 }, { .name = "ovr", .irq = 61 }, { .name = "common", .irq = 64 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = { @@ -2050,7 +2051,6 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = { .name = "mcbsp1", .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp1_irqs), .sdma_reqs = omap2430_mcbsp1_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp1_sdma_chs), .main_clk = "mcbsp1_fck", @@ -2073,6 +2073,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp2_irqs[] = { { .name = "tx", .irq = 62 }, { .name = "rx", .irq = 63 }, { .name = "common", .irq = 16 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = { @@ -2098,7 +2099,6 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = { .name = "mcbsp2", .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp2_irqs), .sdma_reqs = omap2430_mcbsp2_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp2_sdma_chs), .main_clk = "mcbsp2_fck", @@ -2121,6 +2121,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp3_irqs[] = { { .name = "tx", .irq = 89 }, { .name = "rx", .irq = 90 }, { .name = "common", .irq = 17 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2430_mcbsp3_sdma_chs[] = { @@ -2156,7 +2157,6 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = { .name = "mcbsp3", .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp3_irqs), .sdma_reqs = omap2430_mcbsp3_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp3_sdma_chs), .main_clk = "mcbsp3_fck", @@ -2179,6 +2179,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp4_irqs[] = { { .name = "tx", .irq = 54 }, { .name = "rx", .irq = 55 }, { .name = "common", .irq = 18 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2430_mcbsp4_sdma_chs[] = { @@ -2214,7 +2215,6 @@ static struct omap_hwmod omap2430_mcbsp4_hwmod = { .name = "mcbsp4", .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp4_irqs), .sdma_reqs = omap2430_mcbsp4_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp4_sdma_chs), .main_clk = "mcbsp4_fck", @@ -2237,6 +2237,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp5_irqs[] = { { .name = "tx", .irq = 81 }, { .name = "rx", .irq = 82 }, { .name = "common", .irq = 19 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2430_mcbsp5_sdma_chs[] = { @@ -2272,7 +2273,6 @@ static struct omap_hwmod omap2430_mcbsp5_hwmod = { .name = "mcbsp5", .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp5_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp5_irqs), .sdma_reqs = omap2430_mcbsp5_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp5_sdma_chs), .main_clk = "mcbsp5_fck", @@ -2312,6 +2312,7 @@ static struct omap_hwmod_class omap2430_mmc_class = { static struct omap_hwmod_irq_info omap2430_mmc1_mpu_irqs[] = { { .irq = 83 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2430_mmc1_sdma_reqs[] = { @@ -2335,7 +2336,6 @@ static struct omap_hwmod omap2430_mmc1_hwmod = { .name = "mmc1", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap2430_mmc1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mmc1_mpu_irqs), .sdma_reqs = omap2430_mmc1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc1_sdma_reqs), .opt_clks = omap2430_mmc1_opt_clks, @@ -2361,6 +2361,7 @@ static struct omap_hwmod omap2430_mmc1_hwmod = { static struct omap_hwmod_irq_info omap2430_mmc2_mpu_irqs[] = { { .irq = 86 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap2430_mmc2_sdma_reqs[] = { @@ -2380,7 +2381,6 @@ static struct omap_hwmod omap2430_mmc2_hwmod = { .name = "mmc2", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap2430_mmc2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mmc2_mpu_irqs), .sdma_reqs = omap2430_mmc2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc2_sdma_reqs), .opt_clks = omap2430_mmc2_opt_clks, diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 791f9b290e8..cc178b573fe 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -103,6 +103,7 @@ static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_per = { static struct omap_hwmod_irq_info omap3xxx_l3_main_irqs[] = { { .irq = INT_34XX_L3_DBG_IRQ }, { .irq = INT_34XX_L3_APP_IRQ }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_l3_main_addrs[] = { @@ -151,7 +152,6 @@ static struct omap_hwmod omap3xxx_l3_main_hwmod = { .name = "l3_main", .class = &l3_hwmod_class, .mpu_irqs = omap3xxx_l3_main_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_l3_main_irqs), .masters = omap3xxx_l3_main_masters, .masters_cnt = ARRAY_SIZE(omap3xxx_l3_main_masters), .slaves = omap3xxx_l3_main_slaves, @@ -574,6 +574,7 @@ static struct omap_hwmod_class omap3xxx_timer_hwmod_class = { static struct omap_hwmod omap3xxx_timer1_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer1_mpu_irqs[] = { { .irq = 37, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_timer1_addrs[] = { @@ -603,7 +604,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer1_slaves[] = { static struct omap_hwmod omap3xxx_timer1_hwmod = { .name = "timer1", .mpu_irqs = omap3xxx_timer1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer1_mpu_irqs), .main_clk = "gpt1_fck", .prcm = { .omap2 = { @@ -624,6 +624,7 @@ static struct omap_hwmod omap3xxx_timer1_hwmod = { static struct omap_hwmod omap3xxx_timer2_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer2_mpu_irqs[] = { { .irq = 38, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_timer2_addrs[] = { @@ -653,7 +654,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer2_slaves[] = { static struct omap_hwmod omap3xxx_timer2_hwmod = { .name = "timer2", .mpu_irqs = omap3xxx_timer2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer2_mpu_irqs), .main_clk = "gpt2_fck", .prcm = { .omap2 = { @@ -674,6 +674,7 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = { static struct omap_hwmod omap3xxx_timer3_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer3_mpu_irqs[] = { { .irq = 39, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_timer3_addrs[] = { @@ -703,7 +704,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer3_slaves[] = { static struct omap_hwmod omap3xxx_timer3_hwmod = { .name = "timer3", .mpu_irqs = omap3xxx_timer3_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer3_mpu_irqs), .main_clk = "gpt3_fck", .prcm = { .omap2 = { @@ -724,6 +724,7 @@ static struct omap_hwmod omap3xxx_timer3_hwmod = { static struct omap_hwmod omap3xxx_timer4_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer4_mpu_irqs[] = { { .irq = 40, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_timer4_addrs[] = { @@ -753,7 +754,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer4_slaves[] = { static struct omap_hwmod omap3xxx_timer4_hwmod = { .name = "timer4", .mpu_irqs = omap3xxx_timer4_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer4_mpu_irqs), .main_clk = "gpt4_fck", .prcm = { .omap2 = { @@ -774,6 +774,7 @@ static struct omap_hwmod omap3xxx_timer4_hwmod = { static struct omap_hwmod omap3xxx_timer5_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer5_mpu_irqs[] = { { .irq = 41, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_timer5_addrs[] = { @@ -803,7 +804,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer5_slaves[] = { static struct omap_hwmod omap3xxx_timer5_hwmod = { .name = "timer5", .mpu_irqs = omap3xxx_timer5_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer5_mpu_irqs), .main_clk = "gpt5_fck", .prcm = { .omap2 = { @@ -824,6 +824,7 @@ static struct omap_hwmod omap3xxx_timer5_hwmod = { static struct omap_hwmod omap3xxx_timer6_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer6_mpu_irqs[] = { { .irq = 42, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_timer6_addrs[] = { @@ -853,7 +854,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer6_slaves[] = { static struct omap_hwmod omap3xxx_timer6_hwmod = { .name = "timer6", .mpu_irqs = omap3xxx_timer6_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer6_mpu_irqs), .main_clk = "gpt6_fck", .prcm = { .omap2 = { @@ -874,6 +874,7 @@ static struct omap_hwmod omap3xxx_timer6_hwmod = { static struct omap_hwmod omap3xxx_timer7_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer7_mpu_irqs[] = { { .irq = 43, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_timer7_addrs[] = { @@ -903,7 +904,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer7_slaves[] = { static struct omap_hwmod omap3xxx_timer7_hwmod = { .name = "timer7", .mpu_irqs = omap3xxx_timer7_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer7_mpu_irqs), .main_clk = "gpt7_fck", .prcm = { .omap2 = { @@ -924,6 +924,7 @@ static struct omap_hwmod omap3xxx_timer7_hwmod = { static struct omap_hwmod omap3xxx_timer8_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer8_mpu_irqs[] = { { .irq = 44, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_timer8_addrs[] = { @@ -953,7 +954,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer8_slaves[] = { static struct omap_hwmod omap3xxx_timer8_hwmod = { .name = "timer8", .mpu_irqs = omap3xxx_timer8_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer8_mpu_irqs), .main_clk = "gpt8_fck", .prcm = { .omap2 = { @@ -974,6 +974,7 @@ static struct omap_hwmod omap3xxx_timer8_hwmod = { static struct omap_hwmod omap3xxx_timer9_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer9_mpu_irqs[] = { { .irq = 45, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_timer9_addrs[] = { @@ -1003,7 +1004,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer9_slaves[] = { static struct omap_hwmod omap3xxx_timer9_hwmod = { .name = "timer9", .mpu_irqs = omap3xxx_timer9_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer9_mpu_irqs), .main_clk = "gpt9_fck", .prcm = { .omap2 = { @@ -1024,6 +1024,7 @@ static struct omap_hwmod omap3xxx_timer9_hwmod = { static struct omap_hwmod omap3xxx_timer10_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer10_mpu_irqs[] = { { .irq = 46, }, + { .irq = -1 } }; /* l4_core -> timer10 */ @@ -1044,7 +1045,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer10_slaves[] = { static struct omap_hwmod omap3xxx_timer10_hwmod = { .name = "timer10", .mpu_irqs = omap3xxx_timer10_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer10_mpu_irqs), .main_clk = "gpt10_fck", .prcm = { .omap2 = { @@ -1065,6 +1065,7 @@ static struct omap_hwmod omap3xxx_timer10_hwmod = { static struct omap_hwmod omap3xxx_timer11_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer11_mpu_irqs[] = { { .irq = 47, }, + { .irq = -1 } }; /* l4_core -> timer11 */ @@ -1085,7 +1086,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer11_slaves[] = { static struct omap_hwmod omap3xxx_timer11_hwmod = { .name = "timer11", .mpu_irqs = omap3xxx_timer11_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer11_mpu_irqs), .main_clk = "gpt11_fck", .prcm = { .omap2 = { @@ -1106,6 +1106,7 @@ static struct omap_hwmod omap3xxx_timer11_hwmod = { static struct omap_hwmod omap3xxx_timer12_hwmod; static struct omap_hwmod_irq_info omap3xxx_timer12_mpu_irqs[] = { { .irq = 95, }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_timer12_addrs[] = { @@ -1135,7 +1136,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer12_slaves[] = { static struct omap_hwmod omap3xxx_timer12_hwmod = { .name = "timer12", .mpu_irqs = omap3xxx_timer12_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer12_mpu_irqs), .main_clk = "gpt12_fck", .prcm = { .omap2 = { @@ -1256,6 +1256,7 @@ static struct omap_hwmod_class uart_class = { static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { { .irq = INT_24XX_UART1_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { @@ -1270,7 +1271,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = { static struct omap_hwmod omap3xxx_uart1_hwmod = { .name = "uart1", .mpu_irqs = uart1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs), .sdma_reqs = uart1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), .main_clk = "uart1_fck", @@ -1293,6 +1293,7 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = { static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { { .irq = INT_24XX_UART2_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { @@ -1307,7 +1308,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = { static struct omap_hwmod omap3xxx_uart2_hwmod = { .name = "uart2", .mpu_irqs = uart2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs), .sdma_reqs = uart2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), .main_clk = "uart2_fck", @@ -1330,6 +1330,7 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = { static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { { .irq = INT_24XX_UART3_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { @@ -1344,7 +1345,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = { static struct omap_hwmod omap3xxx_uart3_hwmod = { .name = "uart3", .mpu_irqs = uart3_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs), .sdma_reqs = uart3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), .main_clk = "uart3_fck", @@ -1367,6 +1367,7 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = { static struct omap_hwmod_irq_info uart4_mpu_irqs[] = { { .irq = INT_36XX_UART4_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info uart4_sdma_reqs[] = { @@ -1381,7 +1382,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart4_slaves[] = { static struct omap_hwmod omap3xxx_uart4_hwmod = { .name = "uart4", .mpu_irqs = uart4_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(uart4_mpu_irqs), .sdma_reqs = uart4_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(uart4_sdma_reqs), .main_clk = "uart4_fck", @@ -1557,6 +1557,7 @@ static struct omap_hwmod_class omap3xxx_dispc_hwmod_class = { static struct omap_hwmod_irq_info omap3xxx_dispc_irqs[] = { { .irq = 25 }, + { .irq = -1 } }; /* l4_core -> dss_dispc */ @@ -1584,7 +1585,6 @@ static struct omap_hwmod omap3xxx_dss_dispc_hwmod = { .name = "dss_dispc", .class = &omap3xxx_dispc_hwmod_class, .mpu_irqs = omap3xxx_dispc_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dispc_irqs), .main_clk = "dss1_alwon_fck", .prcm = { .omap2 = { @@ -1612,6 +1612,7 @@ static struct omap_hwmod_class omap3xxx_dsi_hwmod_class = { static struct omap_hwmod_irq_info omap3xxx_dsi1_irqs[] = { { .irq = 25 }, + { .irq = -1 } }; /* dss_dsi1 */ @@ -1648,7 +1649,6 @@ static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = { .name = "dss_dsi1", .class = &omap3xxx_dsi_hwmod_class, .mpu_irqs = omap3xxx_dsi1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dsi1_irqs), .main_clk = "dss1_alwon_fck", .prcm = { .omap2 = { @@ -1783,6 +1783,7 @@ static struct omap_i2c_dev_attr i2c1_dev_attr = { static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { { .irq = INT_24XX_I2C1_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { @@ -1797,7 +1798,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { static struct omap_hwmod omap3xxx_i2c1_hwmod = { .name = "i2c1", .mpu_irqs = i2c1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs), .sdma_reqs = i2c1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), .main_clk = "i2c1_fck", @@ -1825,6 +1825,7 @@ static struct omap_i2c_dev_attr i2c2_dev_attr = { static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { { .irq = INT_24XX_I2C2_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { @@ -1839,7 +1840,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { static struct omap_hwmod omap3xxx_i2c2_hwmod = { .name = "i2c2", .mpu_irqs = i2c2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(i2c2_mpu_irqs), .sdma_reqs = i2c2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), .main_clk = "i2c2_fck", @@ -1867,6 +1867,7 @@ static struct omap_i2c_dev_attr i2c3_dev_attr = { static struct omap_hwmod_irq_info i2c3_mpu_irqs[] = { { .irq = INT_34XX_I2C3_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info i2c3_sdma_reqs[] = { @@ -1881,7 +1882,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c3_slaves[] = { static struct omap_hwmod omap3xxx_i2c3_hwmod = { .name = "i2c3", .mpu_irqs = i2c3_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(i2c3_mpu_irqs), .sdma_reqs = i2c3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(i2c3_sdma_reqs), .main_clk = "i2c3_fck", @@ -2034,6 +2034,7 @@ static struct omap_gpio_dev_attr gpio_dev_attr = { /* gpio1 */ static struct omap_hwmod_irq_info omap3xxx_gpio1_irqs[] = { { .irq = 29 }, /* INT_34XX_GPIO_BANK1 */ + { .irq = -1 } }; static struct omap_hwmod_opt_clk gpio1_opt_clks[] = { @@ -2048,7 +2049,6 @@ static struct omap_hwmod omap3xxx_gpio1_hwmod = { .name = "gpio1", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap3xxx_gpio1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio1_irqs), .main_clk = "gpio1_ick", .opt_clks = gpio1_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio1_opt_clks), @@ -2071,6 +2071,7 @@ static struct omap_hwmod omap3xxx_gpio1_hwmod = { /* gpio2 */ static struct omap_hwmod_irq_info omap3xxx_gpio2_irqs[] = { { .irq = 30 }, /* INT_34XX_GPIO_BANK2 */ + { .irq = -1 } }; static struct omap_hwmod_opt_clk gpio2_opt_clks[] = { @@ -2085,7 +2086,6 @@ static struct omap_hwmod omap3xxx_gpio2_hwmod = { .name = "gpio2", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap3xxx_gpio2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio2_irqs), .main_clk = "gpio2_ick", .opt_clks = gpio2_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio2_opt_clks), @@ -2108,6 +2108,7 @@ static struct omap_hwmod omap3xxx_gpio2_hwmod = { /* gpio3 */ static struct omap_hwmod_irq_info omap3xxx_gpio3_irqs[] = { { .irq = 31 }, /* INT_34XX_GPIO_BANK3 */ + { .irq = -1 } }; static struct omap_hwmod_opt_clk gpio3_opt_clks[] = { @@ -2122,7 +2123,6 @@ static struct omap_hwmod omap3xxx_gpio3_hwmod = { .name = "gpio3", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap3xxx_gpio3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio3_irqs), .main_clk = "gpio3_ick", .opt_clks = gpio3_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio3_opt_clks), @@ -2145,6 +2145,7 @@ static struct omap_hwmod omap3xxx_gpio3_hwmod = { /* gpio4 */ static struct omap_hwmod_irq_info omap3xxx_gpio4_irqs[] = { { .irq = 32 }, /* INT_34XX_GPIO_BANK4 */ + { .irq = -1 } }; static struct omap_hwmod_opt_clk gpio4_opt_clks[] = { @@ -2159,7 +2160,6 @@ static struct omap_hwmod omap3xxx_gpio4_hwmod = { .name = "gpio4", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap3xxx_gpio4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio4_irqs), .main_clk = "gpio4_ick", .opt_clks = gpio4_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio4_opt_clks), @@ -2182,6 +2182,7 @@ static struct omap_hwmod omap3xxx_gpio4_hwmod = { /* gpio5 */ static struct omap_hwmod_irq_info omap3xxx_gpio5_irqs[] = { { .irq = 33 }, /* INT_34XX_GPIO_BANK5 */ + { .irq = -1 } }; static struct omap_hwmod_opt_clk gpio5_opt_clks[] = { @@ -2196,7 +2197,6 @@ static struct omap_hwmod omap3xxx_gpio5_hwmod = { .name = "gpio5", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap3xxx_gpio5_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio5_irqs), .main_clk = "gpio5_ick", .opt_clks = gpio5_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio5_opt_clks), @@ -2219,6 +2219,7 @@ static struct omap_hwmod omap3xxx_gpio5_hwmod = { /* gpio6 */ static struct omap_hwmod_irq_info omap3xxx_gpio6_irqs[] = { { .irq = 34 }, /* INT_34XX_GPIO_BANK6 */ + { .irq = -1 } }; static struct omap_hwmod_opt_clk gpio6_opt_clks[] = { @@ -2233,7 +2234,6 @@ static struct omap_hwmod omap3xxx_gpio6_hwmod = { .name = "gpio6", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap3xxx_gpio6_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio6_irqs), .main_clk = "gpio6_ick", .opt_clks = gpio6_opt_clks, .opt_clks_cnt = ARRAY_SIZE(gpio6_opt_clks), @@ -2292,6 +2292,7 @@ static struct omap_hwmod_irq_info omap3xxx_dma_system_irqs[] = { { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = { @@ -2326,7 +2327,6 @@ static struct omap_hwmod omap3xxx_dma_system_hwmod = { .name = "dma", .class = &omap3xxx_dma_hwmod_class, .mpu_irqs = omap3xxx_dma_system_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dma_system_irqs), .main_clk = "core_l3_ick", .prcm = { .omap2 = { @@ -2371,6 +2371,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = { { .name = "irq", .irq = 16 }, { .name = "tx", .irq = 59 }, { .name = "rx", .irq = 60 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap3xxx_mcbsp1_sdma_chs[] = { @@ -2406,7 +2407,6 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = { .name = "mcbsp1", .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_irqs), .sdma_reqs = omap3xxx_mcbsp1_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_sdma_chs), .main_clk = "mcbsp1_fck", @@ -2429,6 +2429,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp2_irqs[] = { { .name = "irq", .irq = 17 }, { .name = "tx", .irq = 62 }, { .name = "rx", .irq = 63 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap3xxx_mcbsp2_sdma_chs[] = { @@ -2469,7 +2470,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = { .name = "mcbsp2", .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_irqs), .sdma_reqs = omap3xxx_mcbsp2_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sdma_chs), .main_clk = "mcbsp2_fck", @@ -2493,6 +2493,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp3_irqs[] = { { .name = "irq", .irq = 22 }, { .name = "tx", .irq = 89 }, { .name = "rx", .irq = 90 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap3xxx_mcbsp3_sdma_chs[] = { @@ -2532,7 +2533,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = { .name = "mcbsp3", .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_irqs), .sdma_reqs = omap3xxx_mcbsp3_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sdma_chs), .main_clk = "mcbsp3_fck", @@ -2556,6 +2556,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp4_irqs[] = { { .name = "irq", .irq = 23 }, { .name = "tx", .irq = 54 }, { .name = "rx", .irq = 55 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap3xxx_mcbsp4_sdma_chs[] = { @@ -2591,7 +2592,6 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod = { .name = "mcbsp4", .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_irqs), .sdma_reqs = omap3xxx_mcbsp4_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_sdma_chs), .main_clk = "mcbsp4_fck", @@ -2614,6 +2614,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp5_irqs[] = { { .name = "irq", .irq = 27 }, { .name = "tx", .irq = 81 }, { .name = "rx", .irq = 82 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap3xxx_mcbsp5_sdma_chs[] = { @@ -2649,7 +2650,6 @@ static struct omap_hwmod omap3xxx_mcbsp5_hwmod = { .name = "mcbsp5", .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp5_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_irqs), .sdma_reqs = omap3xxx_mcbsp5_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_sdma_chs), .main_clk = "mcbsp5_fck", @@ -2682,6 +2682,7 @@ static struct omap_hwmod_class omap3xxx_mcbsp_sidetone_hwmod_class = { /* mcbsp2_sidetone */ static struct omap_hwmod_irq_info omap3xxx_mcbsp2_sidetone_irqs[] = { { .name = "irq", .irq = 4 }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_mcbsp2_sidetone_addrs[] = { @@ -2712,7 +2713,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = { .name = "mcbsp2_sidetone", .class = &omap3xxx_mcbsp_sidetone_hwmod_class, .mpu_irqs = omap3xxx_mcbsp2_sidetone_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sidetone_irqs), .main_clk = "mcbsp2_fck", .prcm = { .omap2 = { @@ -2731,6 +2731,7 @@ static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = { /* mcbsp3_sidetone */ static struct omap_hwmod_irq_info omap3xxx_mcbsp3_sidetone_irqs[] = { { .name = "irq", .irq = 5 }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_mcbsp3_sidetone_addrs[] = { @@ -2761,7 +2762,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod = { .name = "mcbsp3_sidetone", .class = &omap3xxx_mcbsp_sidetone_hwmod_class, .mpu_irqs = omap3xxx_mcbsp3_sidetone_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sidetone_irqs), .main_clk = "mcbsp3_fck", .prcm = { .omap2 = { @@ -2931,6 +2931,7 @@ static struct omap_hwmod_class omap3xxx_mailbox_hwmod_class = { static struct omap_hwmod omap3xxx_mailbox_hwmod; static struct omap_hwmod_irq_info omap3xxx_mailbox_irqs[] = { { .irq = 26 }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap3xxx_mailbox_addrs[] = { @@ -2959,7 +2960,6 @@ static struct omap_hwmod omap3xxx_mailbox_hwmod = { .name = "mailbox", .class = &omap3xxx_mailbox_hwmod_class, .mpu_irqs = omap3xxx_mailbox_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mailbox_irqs), .main_clk = "mailboxes_ick", .prcm = { .omap2 = { @@ -3046,6 +3046,7 @@ static struct omap_hwmod_class omap34xx_mcspi_class = { /* mcspi1 */ static struct omap_hwmod_irq_info omap34xx_mcspi1_mpu_irqs[] = { { .name = "irq", .irq = 65 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap34xx_mcspi1_sdma_reqs[] = { @@ -3070,7 +3071,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { static struct omap_hwmod omap34xx_mcspi1 = { .name = "mcspi1", .mpu_irqs = omap34xx_mcspi1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mcspi1_mpu_irqs), .sdma_reqs = omap34xx_mcspi1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", @@ -3093,6 +3093,7 @@ static struct omap_hwmod omap34xx_mcspi1 = { /* mcspi2 */ static struct omap_hwmod_irq_info omap34xx_mcspi2_mpu_irqs[] = { { .name = "irq", .irq = 66 }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap34xx_mcspi2_sdma_reqs[] = { @@ -3113,7 +3114,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { static struct omap_hwmod omap34xx_mcspi2 = { .name = "mcspi2", .mpu_irqs = omap34xx_mcspi2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mcspi2_mpu_irqs), .sdma_reqs = omap34xx_mcspi2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", @@ -3136,6 +3136,7 @@ static struct omap_hwmod omap34xx_mcspi2 = { /* mcspi3 */ static struct omap_hwmod_irq_info omap34xx_mcspi3_mpu_irqs[] = { { .name = "irq", .irq = 91 }, /* 91 */ + { .irq = -1 } }; static struct omap_hwmod_dma_info omap34xx_mcspi3_sdma_reqs[] = { @@ -3156,7 +3157,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = { static struct omap_hwmod omap34xx_mcspi3 = { .name = "mcspi3", .mpu_irqs = omap34xx_mcspi3_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mcspi3_mpu_irqs), .sdma_reqs = omap34xx_mcspi3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi3_sdma_reqs), .main_clk = "mcspi3_fck", @@ -3179,6 +3179,7 @@ static struct omap_hwmod omap34xx_mcspi3 = { /* SPI4 */ static struct omap_hwmod_irq_info omap34xx_mcspi4_mpu_irqs[] = { { .name = "irq", .irq = INT_34XX_SPI4_IRQ }, /* 48 */ + { .irq = -1 } }; static struct omap_hwmod_dma_info omap34xx_mcspi4_sdma_reqs[] = { @@ -3197,7 +3198,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi4_dev_attr = { static struct omap_hwmod omap34xx_mcspi4 = { .name = "mcspi4", .mpu_irqs = omap34xx_mcspi4_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mcspi4_mpu_irqs), .sdma_reqs = omap34xx_mcspi4_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi4_sdma_reqs), .main_clk = "mcspi4_fck", @@ -3241,12 +3241,12 @@ static struct omap_hwmod_irq_info omap3xxx_usbhsotg_mpu_irqs[] = { { .name = "mc", .irq = 92 }, { .name = "dma", .irq = 93 }, + { .irq = -1 } }; static struct omap_hwmod omap3xxx_usbhsotg_hwmod = { .name = "usb_otg_hs", .mpu_irqs = omap3xxx_usbhsotg_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_usbhsotg_mpu_irqs), .main_clk = "hsotgusb_ick", .prcm = { .omap2 = { @@ -3278,6 +3278,7 @@ static struct omap_hwmod omap3xxx_usbhsotg_hwmod = { static struct omap_hwmod_irq_info am35xx_usbhsotg_mpu_irqs[] = { { .name = "mc", .irq = 71 }, + { .irq = -1 } }; static struct omap_hwmod_class am35xx_usbotg_class = { @@ -3288,7 +3289,6 @@ static struct omap_hwmod_class am35xx_usbotg_class = { static struct omap_hwmod am35xx_usbhsotg_hwmod = { .name = "am35x_otg_hs", .mpu_irqs = am35xx_usbhsotg_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(am35xx_usbhsotg_mpu_irqs), .main_clk = NULL, .prcm = { .omap2 = { @@ -3324,6 +3324,7 @@ static struct omap_hwmod_class omap34xx_mmc_class = { static struct omap_hwmod_irq_info omap34xx_mmc1_mpu_irqs[] = { { .irq = 83, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap34xx_mmc1_sdma_reqs[] = { @@ -3346,7 +3347,6 @@ static struct omap_mmc_dev_attr mmc1_dev_attr = { static struct omap_hwmod omap3xxx_mmc1_hwmod = { .name = "mmc1", .mpu_irqs = omap34xx_mmc1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mmc1_mpu_irqs), .sdma_reqs = omap34xx_mmc1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc1_sdma_reqs), .opt_clks = omap34xx_mmc1_opt_clks, @@ -3372,6 +3372,7 @@ static struct omap_hwmod omap3xxx_mmc1_hwmod = { static struct omap_hwmod_irq_info omap34xx_mmc2_mpu_irqs[] = { { .irq = INT_24XX_MMC2_IRQ, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap34xx_mmc2_sdma_reqs[] = { @@ -3390,7 +3391,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_mmc2_slaves[] = { static struct omap_hwmod omap3xxx_mmc2_hwmod = { .name = "mmc2", .mpu_irqs = omap34xx_mmc2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mmc2_mpu_irqs), .sdma_reqs = omap34xx_mmc2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc2_sdma_reqs), .opt_clks = omap34xx_mmc2_opt_clks, @@ -3415,6 +3415,7 @@ static struct omap_hwmod omap3xxx_mmc2_hwmod = { static struct omap_hwmod_irq_info omap34xx_mmc3_mpu_irqs[] = { { .irq = 94, }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap34xx_mmc3_sdma_reqs[] = { @@ -3433,7 +3434,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_mmc3_slaves[] = { static struct omap_hwmod omap3xxx_mmc3_hwmod = { .name = "mmc3", .mpu_irqs = omap34xx_mmc3_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mmc3_mpu_irqs), .sdma_reqs = omap34xx_mmc3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc3_sdma_reqs), .opt_clks = omap34xx_mmc3_opt_clks, diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 81fd313bb1a..bbfc4db664b 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -115,6 +115,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dmm_slaves[] = { static struct omap_hwmod_irq_info omap44xx_dmm_irqs[] = { { .irq = 113 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod omap44xx_dmm_hwmod = { @@ -123,7 +124,6 @@ static struct omap_hwmod omap44xx_dmm_hwmod = { .slaves = omap44xx_dmm_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves), .mpu_irqs = omap44xx_dmm_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dmm_irqs), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; @@ -268,6 +268,7 @@ static struct omap_hwmod_ocp_if omap44xx_mmc2__l3_main_1 = { static struct omap_hwmod_irq_info omap44xx_l3_targ_irqs[] = { { .irq = 9 + OMAP44XX_IRQ_GIC_START }, { .irq = 10 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_l3_main_1_addrs[] = { @@ -303,7 +304,6 @@ static struct omap_hwmod omap44xx_l3_main_1_hwmod = { .name = "l3_main_1", .class = &omap44xx_l3_hwmod_class, .mpu_irqs = omap44xx_l3_targ_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_l3_targ_irqs), .slaves = omap44xx_l3_main_1_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -672,6 +672,7 @@ static struct omap_hwmod_class omap44xx_aess_hwmod_class = { /* aess */ static struct omap_hwmod_irq_info omap44xx_aess_irqs[] = { { .irq = 99 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_aess_sdma_reqs[] = { @@ -736,7 +737,6 @@ static struct omap_hwmod omap44xx_aess_hwmod = { .name = "aess", .class = &omap44xx_aess_hwmod_class, .mpu_irqs = omap44xx_aess_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_aess_irqs), .sdma_reqs = omap44xx_aess_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_aess_sdma_reqs), .main_clk = "aess_fck", @@ -875,6 +875,7 @@ static struct omap_hwmod_irq_info omap44xx_dma_system_irqs[] = { { .name = "1", .irq = 13 + OMAP44XX_IRQ_GIC_START }, { .name = "2", .irq = 14 + OMAP44XX_IRQ_GIC_START }, { .name = "3", .irq = 15 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; /* dma_system master ports */ @@ -909,7 +910,6 @@ static struct omap_hwmod omap44xx_dma_system_hwmod = { .name = "dma_system", .class = &omap44xx_dma_hwmod_class, .mpu_irqs = omap44xx_dma_system_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dma_system_irqs), .main_clk = "l3_div_ck", .prcm = { .omap4 = { @@ -948,6 +948,7 @@ static struct omap_hwmod_class omap44xx_dmic_hwmod_class = { static struct omap_hwmod omap44xx_dmic_hwmod; static struct omap_hwmod_irq_info omap44xx_dmic_irqs[] = { { .irq = 114 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_dmic_sdma_reqs[] = { @@ -1000,7 +1001,6 @@ static struct omap_hwmod omap44xx_dmic_hwmod = { .name = "dmic", .class = &omap44xx_dmic_hwmod_class, .mpu_irqs = omap44xx_dmic_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dmic_irqs), .sdma_reqs = omap44xx_dmic_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dmic_sdma_reqs), .main_clk = "dmic_fck", @@ -1026,6 +1026,7 @@ static struct omap_hwmod_class omap44xx_dsp_hwmod_class = { /* dsp */ static struct omap_hwmod_irq_info omap44xx_dsp_irqs[] = { { .irq = 28 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_rst_info omap44xx_dsp_resets[] = { @@ -1082,7 +1083,6 @@ static struct omap_hwmod omap44xx_dsp_hwmod = { .name = "dsp", .class = &omap44xx_dsp_hwmod_class, .mpu_irqs = omap44xx_dsp_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dsp_irqs), .rst_lines = omap44xx_dsp_resets, .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_resets), .main_clk = "dsp_fck", @@ -1215,6 +1215,7 @@ static struct omap_hwmod_class omap44xx_dispc_hwmod_class = { static struct omap_hwmod omap44xx_dss_dispc_hwmod; static struct omap_hwmod_irq_info omap44xx_dss_dispc_irqs[] = { { .irq = 25 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_dss_dispc_sdma_reqs[] = { @@ -1267,7 +1268,6 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = { .name = "dss_dispc", .class = &omap44xx_dispc_hwmod_class, .mpu_irqs = omap44xx_dss_dispc_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dispc_irqs), .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dispc_sdma_reqs), .main_clk = "dss_fck", @@ -1306,6 +1306,7 @@ static struct omap_hwmod_class omap44xx_dsi_hwmod_class = { static struct omap_hwmod omap44xx_dss_dsi1_hwmod; static struct omap_hwmod_irq_info omap44xx_dss_dsi1_irqs[] = { { .irq = 53 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_dss_dsi1_sdma_reqs[] = { @@ -1358,7 +1359,6 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { .name = "dss_dsi1", .class = &omap44xx_dsi_hwmod_class, .mpu_irqs = omap44xx_dss_dsi1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_irqs), .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_sdma_reqs), .main_clk = "dss_fck", @@ -1376,6 +1376,7 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { static struct omap_hwmod omap44xx_dss_dsi2_hwmod; static struct omap_hwmod_irq_info omap44xx_dss_dsi2_irqs[] = { { .irq = 84 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_dss_dsi2_sdma_reqs[] = { @@ -1428,7 +1429,6 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { .name = "dss_dsi2", .class = &omap44xx_dsi_hwmod_class, .mpu_irqs = omap44xx_dss_dsi2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_irqs), .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_sdma_reqs), .main_clk = "dss_fck", @@ -1466,6 +1466,7 @@ static struct omap_hwmod_class omap44xx_hdmi_hwmod_class = { static struct omap_hwmod omap44xx_dss_hdmi_hwmod; static struct omap_hwmod_irq_info omap44xx_dss_hdmi_irqs[] = { { .irq = 101 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_dss_hdmi_sdma_reqs[] = { @@ -1518,7 +1519,6 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { .name = "dss_hdmi", .class = &omap44xx_hdmi_hwmod_class, .mpu_irqs = omap44xx_dss_hdmi_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_irqs), .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_sdma_reqs), .main_clk = "dss_fck", @@ -1716,6 +1716,7 @@ static struct omap_gpio_dev_attr gpio_dev_attr = { static struct omap_hwmod omap44xx_gpio1_hwmod; static struct omap_hwmod_irq_info omap44xx_gpio1_irqs[] = { { .irq = 29 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_gpio1_addrs[] = { @@ -1749,7 +1750,6 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = { .name = "gpio1", .class = &omap44xx_gpio_hwmod_class, .mpu_irqs = omap44xx_gpio1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio1_irqs), .main_clk = "gpio1_ick", .prcm = { .omap4 = { @@ -1768,6 +1768,7 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = { static struct omap_hwmod omap44xx_gpio2_hwmod; static struct omap_hwmod_irq_info omap44xx_gpio2_irqs[] = { { .irq = 30 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_gpio2_addrs[] = { @@ -1802,7 +1803,6 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = { .class = &omap44xx_gpio_hwmod_class, .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap44xx_gpio2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio2_irqs), .main_clk = "gpio2_ick", .prcm = { .omap4 = { @@ -1821,6 +1821,7 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = { static struct omap_hwmod omap44xx_gpio3_hwmod; static struct omap_hwmod_irq_info omap44xx_gpio3_irqs[] = { { .irq = 31 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_gpio3_addrs[] = { @@ -1855,7 +1856,6 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = { .class = &omap44xx_gpio_hwmod_class, .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap44xx_gpio3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio3_irqs), .main_clk = "gpio3_ick", .prcm = { .omap4 = { @@ -1874,6 +1874,7 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = { static struct omap_hwmod omap44xx_gpio4_hwmod; static struct omap_hwmod_irq_info omap44xx_gpio4_irqs[] = { { .irq = 32 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_gpio4_addrs[] = { @@ -1908,7 +1909,6 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = { .class = &omap44xx_gpio_hwmod_class, .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap44xx_gpio4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio4_irqs), .main_clk = "gpio4_ick", .prcm = { .omap4 = { @@ -1927,6 +1927,7 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = { static struct omap_hwmod omap44xx_gpio5_hwmod; static struct omap_hwmod_irq_info omap44xx_gpio5_irqs[] = { { .irq = 33 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_gpio5_addrs[] = { @@ -1961,7 +1962,6 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = { .class = &omap44xx_gpio_hwmod_class, .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap44xx_gpio5_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio5_irqs), .main_clk = "gpio5_ick", .prcm = { .omap4 = { @@ -1980,6 +1980,7 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = { static struct omap_hwmod omap44xx_gpio6_hwmod; static struct omap_hwmod_irq_info omap44xx_gpio6_irqs[] = { { .irq = 34 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_gpio6_addrs[] = { @@ -2014,7 +2015,6 @@ static struct omap_hwmod omap44xx_gpio6_hwmod = { .class = &omap44xx_gpio_hwmod_class, .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap44xx_gpio6_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio6_irqs), .main_clk = "gpio6_ick", .prcm = { .omap4 = { @@ -2058,6 +2058,7 @@ static struct omap_hwmod_irq_info omap44xx_hsi_irqs[] = { { .name = "mpu_p1", .irq = 67 + OMAP44XX_IRQ_GIC_START }, { .name = "mpu_p2", .irq = 68 + OMAP44XX_IRQ_GIC_START }, { .name = "mpu_dma", .irq = 71 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; /* hsi master ports */ @@ -2092,7 +2093,6 @@ static struct omap_hwmod omap44xx_hsi_hwmod = { .name = "hsi", .class = &omap44xx_hsi_hwmod_class, .mpu_irqs = omap44xx_hsi_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_hsi_irqs), .main_clk = "hsi_fck", .prcm = { .omap4 = { @@ -2131,6 +2131,7 @@ static struct omap_hwmod_class omap44xx_i2c_hwmod_class = { static struct omap_hwmod omap44xx_i2c1_hwmod; static struct omap_hwmod_irq_info omap44xx_i2c1_irqs[] = { { .irq = 56 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_i2c1_sdma_reqs[] = { @@ -2166,7 +2167,6 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = { .class = &omap44xx_i2c_hwmod_class, .flags = HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_i2c1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c1_irqs), .sdma_reqs = omap44xx_i2c1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c1_sdma_reqs), .main_clk = "i2c1_fck", @@ -2184,6 +2184,7 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = { static struct omap_hwmod omap44xx_i2c2_hwmod; static struct omap_hwmod_irq_info omap44xx_i2c2_irqs[] = { { .irq = 57 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_i2c2_sdma_reqs[] = { @@ -2219,7 +2220,6 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = { .class = &omap44xx_i2c_hwmod_class, .flags = HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_i2c2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c2_irqs), .sdma_reqs = omap44xx_i2c2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c2_sdma_reqs), .main_clk = "i2c2_fck", @@ -2237,6 +2237,7 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = { static struct omap_hwmod omap44xx_i2c3_hwmod; static struct omap_hwmod_irq_info omap44xx_i2c3_irqs[] = { { .irq = 61 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_i2c3_sdma_reqs[] = { @@ -2272,7 +2273,6 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = { .class = &omap44xx_i2c_hwmod_class, .flags = HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_i2c3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c3_irqs), .sdma_reqs = omap44xx_i2c3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c3_sdma_reqs), .main_clk = "i2c3_fck", @@ -2290,6 +2290,7 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = { static struct omap_hwmod omap44xx_i2c4_hwmod; static struct omap_hwmod_irq_info omap44xx_i2c4_irqs[] = { { .irq = 62 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_i2c4_sdma_reqs[] = { @@ -2325,7 +2326,6 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = { .class = &omap44xx_i2c_hwmod_class, .flags = HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_i2c4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c4_irqs), .sdma_reqs = omap44xx_i2c4_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c4_sdma_reqs), .main_clk = "i2c4_fck", @@ -2351,6 +2351,7 @@ static struct omap_hwmod_class omap44xx_ipu_hwmod_class = { /* ipu */ static struct omap_hwmod_irq_info omap44xx_ipu_irqs[] = { { .irq = 100 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_rst_info omap44xx_ipu_c0_resets[] = { @@ -2417,7 +2418,6 @@ static struct omap_hwmod omap44xx_ipu_hwmod = { .name = "ipu", .class = &omap44xx_ipu_hwmod_class, .mpu_irqs = omap44xx_ipu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_ipu_irqs), .rst_lines = omap44xx_ipu_resets, .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_resets), .main_clk = "ipu_fck", @@ -2458,6 +2458,7 @@ static struct omap_hwmod_class omap44xx_iss_hwmod_class = { /* iss */ static struct omap_hwmod_irq_info omap44xx_iss_irqs[] = { { .irq = 24 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_iss_sdma_reqs[] = { @@ -2503,7 +2504,6 @@ static struct omap_hwmod omap44xx_iss_hwmod = { .name = "iss", .class = &omap44xx_iss_hwmod_class, .mpu_irqs = omap44xx_iss_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_iss_irqs), .sdma_reqs = omap44xx_iss_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_iss_sdma_reqs), .main_clk = "iss_fck", @@ -2535,6 +2535,7 @@ static struct omap_hwmod_irq_info omap44xx_iva_irqs[] = { { .name = "sync_1", .irq = 103 + OMAP44XX_IRQ_GIC_START }, { .name = "sync_0", .irq = 104 + OMAP44XX_IRQ_GIC_START }, { .name = "mailbox_0", .irq = 107 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_rst_info omap44xx_iva_resets[] = { @@ -2613,7 +2614,6 @@ static struct omap_hwmod omap44xx_iva_hwmod = { .name = "iva", .class = &omap44xx_iva_hwmod_class, .mpu_irqs = omap44xx_iva_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_iva_irqs), .rst_lines = omap44xx_iva_resets, .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_resets), .main_clk = "iva_fck", @@ -2656,6 +2656,7 @@ static struct omap_hwmod_class omap44xx_kbd_hwmod_class = { static struct omap_hwmod omap44xx_kbd_hwmod; static struct omap_hwmod_irq_info omap44xx_kbd_irqs[] = { { .irq = 120 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_kbd_addrs[] = { @@ -2685,7 +2686,6 @@ static struct omap_hwmod omap44xx_kbd_hwmod = { .name = "kbd", .class = &omap44xx_kbd_hwmod_class, .mpu_irqs = omap44xx_kbd_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_kbd_irqs), .main_clk = "kbd_fck", .prcm = { .omap4 = { @@ -2721,6 +2721,7 @@ static struct omap_hwmod_class omap44xx_mailbox_hwmod_class = { static struct omap_hwmod omap44xx_mailbox_hwmod; static struct omap_hwmod_irq_info omap44xx_mailbox_irqs[] = { { .irq = 26 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_mailbox_addrs[] = { @@ -2750,7 +2751,6 @@ static struct omap_hwmod omap44xx_mailbox_hwmod = { .name = "mailbox", .class = &omap44xx_mailbox_hwmod_class, .mpu_irqs = omap44xx_mailbox_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mailbox_irqs), .prcm = { .omap4 = { .clkctrl_reg = OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL, @@ -2784,6 +2784,7 @@ static struct omap_hwmod_class omap44xx_mcbsp_hwmod_class = { static struct omap_hwmod omap44xx_mcbsp1_hwmod; static struct omap_hwmod_irq_info omap44xx_mcbsp1_irqs[] = { { .irq = 17 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mcbsp1_sdma_reqs[] = { @@ -2839,7 +2840,6 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = { .name = "mcbsp1", .class = &omap44xx_mcbsp_hwmod_class, .mpu_irqs = omap44xx_mcbsp1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp1_irqs), .sdma_reqs = omap44xx_mcbsp1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp1_sdma_reqs), .main_clk = "mcbsp1_fck", @@ -2857,6 +2857,7 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = { static struct omap_hwmod omap44xx_mcbsp2_hwmod; static struct omap_hwmod_irq_info omap44xx_mcbsp2_irqs[] = { { .irq = 22 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mcbsp2_sdma_reqs[] = { @@ -2912,7 +2913,6 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = { .name = "mcbsp2", .class = &omap44xx_mcbsp_hwmod_class, .mpu_irqs = omap44xx_mcbsp2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp2_irqs), .sdma_reqs = omap44xx_mcbsp2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp2_sdma_reqs), .main_clk = "mcbsp2_fck", @@ -2930,6 +2930,7 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = { static struct omap_hwmod omap44xx_mcbsp3_hwmod; static struct omap_hwmod_irq_info omap44xx_mcbsp3_irqs[] = { { .irq = 23 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mcbsp3_sdma_reqs[] = { @@ -2985,7 +2986,6 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = { .name = "mcbsp3", .class = &omap44xx_mcbsp_hwmod_class, .mpu_irqs = omap44xx_mcbsp3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp3_irqs), .sdma_reqs = omap44xx_mcbsp3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp3_sdma_reqs), .main_clk = "mcbsp3_fck", @@ -3003,6 +3003,7 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = { static struct omap_hwmod omap44xx_mcbsp4_hwmod; static struct omap_hwmod_irq_info omap44xx_mcbsp4_irqs[] = { { .irq = 16 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mcbsp4_sdma_reqs[] = { @@ -3037,7 +3038,6 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = { .name = "mcbsp4", .class = &omap44xx_mcbsp_hwmod_class, .mpu_irqs = omap44xx_mcbsp4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp4_irqs), .sdma_reqs = omap44xx_mcbsp4_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp4_sdma_reqs), .main_clk = "mcbsp4_fck", @@ -3076,6 +3076,7 @@ static struct omap_hwmod_class omap44xx_mcpdm_hwmod_class = { static struct omap_hwmod omap44xx_mcpdm_hwmod; static struct omap_hwmod_irq_info omap44xx_mcpdm_irqs[] = { { .irq = 112 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mcpdm_sdma_reqs[] = { @@ -3129,7 +3130,6 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = { .name = "mcpdm", .class = &omap44xx_mcpdm_hwmod_class, .mpu_irqs = omap44xx_mcpdm_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcpdm_irqs), .sdma_reqs = omap44xx_mcpdm_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcpdm_sdma_reqs), .main_clk = "mcpdm_fck", @@ -3169,6 +3169,7 @@ static struct omap_hwmod_class omap44xx_mcspi_hwmod_class = { static struct omap_hwmod omap44xx_mcspi1_hwmod; static struct omap_hwmod_irq_info omap44xx_mcspi1_irqs[] = { { .irq = 65 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mcspi1_sdma_reqs[] = { @@ -3214,7 +3215,6 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = { .name = "mcspi1", .class = &omap44xx_mcspi_hwmod_class, .mpu_irqs = omap44xx_mcspi1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi1_irqs), .sdma_reqs = omap44xx_mcspi1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", @@ -3233,6 +3233,7 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = { static struct omap_hwmod omap44xx_mcspi2_hwmod; static struct omap_hwmod_irq_info omap44xx_mcspi2_irqs[] = { { .irq = 66 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mcspi2_sdma_reqs[] = { @@ -3274,7 +3275,6 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = { .name = "mcspi2", .class = &omap44xx_mcspi_hwmod_class, .mpu_irqs = omap44xx_mcspi2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi2_irqs), .sdma_reqs = omap44xx_mcspi2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", @@ -3293,6 +3293,7 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = { static struct omap_hwmod omap44xx_mcspi3_hwmod; static struct omap_hwmod_irq_info omap44xx_mcspi3_irqs[] = { { .irq = 91 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mcspi3_sdma_reqs[] = { @@ -3334,7 +3335,6 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = { .name = "mcspi3", .class = &omap44xx_mcspi_hwmod_class, .mpu_irqs = omap44xx_mcspi3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi3_irqs), .sdma_reqs = omap44xx_mcspi3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi3_sdma_reqs), .main_clk = "mcspi3_fck", @@ -3353,6 +3353,7 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = { static struct omap_hwmod omap44xx_mcspi4_hwmod; static struct omap_hwmod_irq_info omap44xx_mcspi4_irqs[] = { { .irq = 48 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mcspi4_sdma_reqs[] = { @@ -3392,7 +3393,6 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = { .name = "mcspi4", .class = &omap44xx_mcspi_hwmod_class, .mpu_irqs = omap44xx_mcspi4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi4_irqs), .sdma_reqs = omap44xx_mcspi4_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi4_sdma_reqs), .main_clk = "mcspi4_fck", @@ -3433,6 +3433,7 @@ static struct omap_hwmod_class omap44xx_mmc_hwmod_class = { static struct omap_hwmod_irq_info omap44xx_mmc1_irqs[] = { { .irq = 83 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mmc1_sdma_reqs[] = { @@ -3477,7 +3478,6 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = { .name = "mmc1", .class = &omap44xx_mmc_hwmod_class, .mpu_irqs = omap44xx_mmc1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc1_irqs), .sdma_reqs = omap44xx_mmc1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc1_sdma_reqs), .main_clk = "mmc1_fck", @@ -3497,6 +3497,7 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = { /* mmc2 */ static struct omap_hwmod_irq_info omap44xx_mmc2_irqs[] = { { .irq = 86 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mmc2_sdma_reqs[] = { @@ -3536,7 +3537,6 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = { .name = "mmc2", .class = &omap44xx_mmc_hwmod_class, .mpu_irqs = omap44xx_mmc2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc2_irqs), .sdma_reqs = omap44xx_mmc2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc2_sdma_reqs), .main_clk = "mmc2_fck", @@ -3556,6 +3556,7 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = { static struct omap_hwmod omap44xx_mmc3_hwmod; static struct omap_hwmod_irq_info omap44xx_mmc3_irqs[] = { { .irq = 94 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mmc3_sdma_reqs[] = { @@ -3590,7 +3591,6 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = { .name = "mmc3", .class = &omap44xx_mmc_hwmod_class, .mpu_irqs = omap44xx_mmc3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc3_irqs), .sdma_reqs = omap44xx_mmc3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc3_sdma_reqs), .main_clk = "mmc3_fck", @@ -3608,6 +3608,7 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = { static struct omap_hwmod omap44xx_mmc4_hwmod; static struct omap_hwmod_irq_info omap44xx_mmc4_irqs[] = { { .irq = 96 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mmc4_sdma_reqs[] = { @@ -3642,7 +3643,7 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = { .name = "mmc4", .class = &omap44xx_mmc_hwmod_class, .mpu_irqs = omap44xx_mmc4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc4_irqs), + .sdma_reqs = omap44xx_mmc4_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc4_sdma_reqs), .main_clk = "mmc4_fck", @@ -3660,6 +3661,7 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = { static struct omap_hwmod omap44xx_mmc5_hwmod; static struct omap_hwmod_irq_info omap44xx_mmc5_irqs[] = { { .irq = 59 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_mmc5_sdma_reqs[] = { @@ -3694,7 +3696,6 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = { .name = "mmc5", .class = &omap44xx_mmc_hwmod_class, .mpu_irqs = omap44xx_mmc5_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc5_irqs), .sdma_reqs = omap44xx_mmc5_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc5_sdma_reqs), .main_clk = "mmc5_fck", @@ -3722,6 +3723,7 @@ static struct omap_hwmod_irq_info omap44xx_mpu_irqs[] = { { .name = "pl310", .irq = 0 + OMAP44XX_IRQ_GIC_START }, { .name = "cti0", .irq = 1 + OMAP44XX_IRQ_GIC_START }, { .name = "cti1", .irq = 2 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; /* mpu master ports */ @@ -3736,7 +3738,6 @@ static struct omap_hwmod omap44xx_mpu_hwmod = { .class = &omap44xx_mpu_hwmod_class, .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), .mpu_irqs = omap44xx_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mpu_irqs), .main_clk = "dpll_mpu_m2_ck", .prcm = { .omap4 = { @@ -3778,6 +3779,7 @@ static struct omap_hwmod_class omap44xx_smartreflex_hwmod_class = { static struct omap_hwmod omap44xx_smartreflex_core_hwmod; static struct omap_hwmod_irq_info omap44xx_smartreflex_core_irqs[] = { { .irq = 19 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_smartreflex_core_addrs[] = { @@ -3807,7 +3809,7 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = { .name = "smartreflex_core", .class = &omap44xx_smartreflex_hwmod_class, .mpu_irqs = omap44xx_smartreflex_core_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_smartreflex_core_irqs), + .main_clk = "smartreflex_core_fck", .vdd_name = "core", .prcm = { @@ -3824,6 +3826,7 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = { static struct omap_hwmod omap44xx_smartreflex_iva_hwmod; static struct omap_hwmod_irq_info omap44xx_smartreflex_iva_irqs[] = { { .irq = 102 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_smartreflex_iva_addrs[] = { @@ -3853,7 +3856,6 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = { .name = "smartreflex_iva", .class = &omap44xx_smartreflex_hwmod_class, .mpu_irqs = omap44xx_smartreflex_iva_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_smartreflex_iva_irqs), .main_clk = "smartreflex_iva_fck", .vdd_name = "iva", .prcm = { @@ -3870,6 +3872,7 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = { static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod; static struct omap_hwmod_irq_info omap44xx_smartreflex_mpu_irqs[] = { { .irq = 18 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_smartreflex_mpu_addrs[] = { @@ -3899,7 +3902,6 @@ static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = { .name = "smartreflex_mpu", .class = &omap44xx_smartreflex_hwmod_class, .mpu_irqs = omap44xx_smartreflex_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_smartreflex_mpu_irqs), .main_clk = "smartreflex_mpu_fck", .vdd_name = "mpu", .prcm = { @@ -4015,6 +4017,7 @@ static struct omap_hwmod_class omap44xx_timer_hwmod_class = { static struct omap_hwmod omap44xx_timer1_hwmod; static struct omap_hwmod_irq_info omap44xx_timer1_irqs[] = { { .irq = 37 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_timer1_addrs[] = { @@ -4044,7 +4047,6 @@ static struct omap_hwmod omap44xx_timer1_hwmod = { .name = "timer1", .class = &omap44xx_timer_1ms_hwmod_class, .mpu_irqs = omap44xx_timer1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer1_irqs), .main_clk = "timer1_fck", .prcm = { .omap4 = { @@ -4060,6 +4062,7 @@ static struct omap_hwmod omap44xx_timer1_hwmod = { static struct omap_hwmod omap44xx_timer2_hwmod; static struct omap_hwmod_irq_info omap44xx_timer2_irqs[] = { { .irq = 38 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_timer2_addrs[] = { @@ -4089,7 +4092,6 @@ static struct omap_hwmod omap44xx_timer2_hwmod = { .name = "timer2", .class = &omap44xx_timer_1ms_hwmod_class, .mpu_irqs = omap44xx_timer2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer2_irqs), .main_clk = "timer2_fck", .prcm = { .omap4 = { @@ -4105,6 +4107,7 @@ static struct omap_hwmod omap44xx_timer2_hwmod = { static struct omap_hwmod omap44xx_timer3_hwmod; static struct omap_hwmod_irq_info omap44xx_timer3_irqs[] = { { .irq = 39 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_timer3_addrs[] = { @@ -4134,7 +4137,6 @@ static struct omap_hwmod omap44xx_timer3_hwmod = { .name = "timer3", .class = &omap44xx_timer_hwmod_class, .mpu_irqs = omap44xx_timer3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer3_irqs), .main_clk = "timer3_fck", .prcm = { .omap4 = { @@ -4150,6 +4152,7 @@ static struct omap_hwmod omap44xx_timer3_hwmod = { static struct omap_hwmod omap44xx_timer4_hwmod; static struct omap_hwmod_irq_info omap44xx_timer4_irqs[] = { { .irq = 40 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_timer4_addrs[] = { @@ -4179,7 +4182,6 @@ static struct omap_hwmod omap44xx_timer4_hwmod = { .name = "timer4", .class = &omap44xx_timer_hwmod_class, .mpu_irqs = omap44xx_timer4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer4_irqs), .main_clk = "timer4_fck", .prcm = { .omap4 = { @@ -4195,6 +4197,7 @@ static struct omap_hwmod omap44xx_timer4_hwmod = { static struct omap_hwmod omap44xx_timer5_hwmod; static struct omap_hwmod_irq_info omap44xx_timer5_irqs[] = { { .irq = 41 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_timer5_addrs[] = { @@ -4243,7 +4246,6 @@ static struct omap_hwmod omap44xx_timer5_hwmod = { .name = "timer5", .class = &omap44xx_timer_hwmod_class, .mpu_irqs = omap44xx_timer5_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer5_irqs), .main_clk = "timer5_fck", .prcm = { .omap4 = { @@ -4259,6 +4261,7 @@ static struct omap_hwmod omap44xx_timer5_hwmod = { static struct omap_hwmod omap44xx_timer6_hwmod; static struct omap_hwmod_irq_info omap44xx_timer6_irqs[] = { { .irq = 42 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_timer6_addrs[] = { @@ -4307,7 +4310,7 @@ static struct omap_hwmod omap44xx_timer6_hwmod = { .name = "timer6", .class = &omap44xx_timer_hwmod_class, .mpu_irqs = omap44xx_timer6_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer6_irqs), + .main_clk = "timer6_fck", .prcm = { .omap4 = { @@ -4323,6 +4326,7 @@ static struct omap_hwmod omap44xx_timer6_hwmod = { static struct omap_hwmod omap44xx_timer7_hwmod; static struct omap_hwmod_irq_info omap44xx_timer7_irqs[] = { { .irq = 43 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_timer7_addrs[] = { @@ -4371,7 +4375,6 @@ static struct omap_hwmod omap44xx_timer7_hwmod = { .name = "timer7", .class = &omap44xx_timer_hwmod_class, .mpu_irqs = omap44xx_timer7_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer7_irqs), .main_clk = "timer7_fck", .prcm = { .omap4 = { @@ -4387,6 +4390,7 @@ static struct omap_hwmod omap44xx_timer7_hwmod = { static struct omap_hwmod omap44xx_timer8_hwmod; static struct omap_hwmod_irq_info omap44xx_timer8_irqs[] = { { .irq = 44 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_timer8_addrs[] = { @@ -4435,7 +4439,6 @@ static struct omap_hwmod omap44xx_timer8_hwmod = { .name = "timer8", .class = &omap44xx_timer_hwmod_class, .mpu_irqs = omap44xx_timer8_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer8_irqs), .main_clk = "timer8_fck", .prcm = { .omap4 = { @@ -4451,6 +4454,7 @@ static struct omap_hwmod omap44xx_timer8_hwmod = { static struct omap_hwmod omap44xx_timer9_hwmod; static struct omap_hwmod_irq_info omap44xx_timer9_irqs[] = { { .irq = 45 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_timer9_addrs[] = { @@ -4480,7 +4484,6 @@ static struct omap_hwmod omap44xx_timer9_hwmod = { .name = "timer9", .class = &omap44xx_timer_hwmod_class, .mpu_irqs = omap44xx_timer9_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer9_irqs), .main_clk = "timer9_fck", .prcm = { .omap4 = { @@ -4496,6 +4499,7 @@ static struct omap_hwmod omap44xx_timer9_hwmod = { static struct omap_hwmod omap44xx_timer10_hwmod; static struct omap_hwmod_irq_info omap44xx_timer10_irqs[] = { { .irq = 46 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_timer10_addrs[] = { @@ -4525,7 +4529,6 @@ static struct omap_hwmod omap44xx_timer10_hwmod = { .name = "timer10", .class = &omap44xx_timer_1ms_hwmod_class, .mpu_irqs = omap44xx_timer10_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer10_irqs), .main_clk = "timer10_fck", .prcm = { .omap4 = { @@ -4541,6 +4544,7 @@ static struct omap_hwmod omap44xx_timer10_hwmod = { static struct omap_hwmod omap44xx_timer11_hwmod; static struct omap_hwmod_irq_info omap44xx_timer11_irqs[] = { { .irq = 47 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_timer11_addrs[] = { @@ -4570,7 +4574,6 @@ static struct omap_hwmod omap44xx_timer11_hwmod = { .name = "timer11", .class = &omap44xx_timer_hwmod_class, .mpu_irqs = omap44xx_timer11_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer11_irqs), .main_clk = "timer11_fck", .prcm = { .omap4 = { @@ -4608,6 +4611,7 @@ static struct omap_hwmod_class omap44xx_uart_hwmod_class = { static struct omap_hwmod omap44xx_uart1_hwmod; static struct omap_hwmod_irq_info omap44xx_uart1_irqs[] = { { .irq = 72 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_uart1_sdma_reqs[] = { @@ -4642,7 +4646,6 @@ static struct omap_hwmod omap44xx_uart1_hwmod = { .name = "uart1", .class = &omap44xx_uart_hwmod_class, .mpu_irqs = omap44xx_uart1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart1_irqs), .sdma_reqs = omap44xx_uart1_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart1_sdma_reqs), .main_clk = "uart1_fck", @@ -4660,6 +4663,7 @@ static struct omap_hwmod omap44xx_uart1_hwmod = { static struct omap_hwmod omap44xx_uart2_hwmod; static struct omap_hwmod_irq_info omap44xx_uart2_irqs[] = { { .irq = 73 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_uart2_sdma_reqs[] = { @@ -4694,7 +4698,6 @@ static struct omap_hwmod omap44xx_uart2_hwmod = { .name = "uart2", .class = &omap44xx_uart_hwmod_class, .mpu_irqs = omap44xx_uart2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart2_irqs), .sdma_reqs = omap44xx_uart2_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart2_sdma_reqs), .main_clk = "uart2_fck", @@ -4712,6 +4715,7 @@ static struct omap_hwmod omap44xx_uart2_hwmod = { static struct omap_hwmod omap44xx_uart3_hwmod; static struct omap_hwmod_irq_info omap44xx_uart3_irqs[] = { { .irq = 74 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_uart3_sdma_reqs[] = { @@ -4747,7 +4751,6 @@ static struct omap_hwmod omap44xx_uart3_hwmod = { .class = &omap44xx_uart_hwmod_class, .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), .mpu_irqs = omap44xx_uart3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart3_irqs), .sdma_reqs = omap44xx_uart3_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart3_sdma_reqs), .main_clk = "uart3_fck", @@ -4765,6 +4768,7 @@ static struct omap_hwmod omap44xx_uart3_hwmod = { static struct omap_hwmod omap44xx_uart4_hwmod; static struct omap_hwmod_irq_info omap44xx_uart4_irqs[] = { { .irq = 70 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_dma_info omap44xx_uart4_sdma_reqs[] = { @@ -4799,7 +4803,6 @@ static struct omap_hwmod omap44xx_uart4_hwmod = { .name = "uart4", .class = &omap44xx_uart_hwmod_class, .mpu_irqs = omap44xx_uart4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart4_irqs), .sdma_reqs = omap44xx_uart4_sdma_reqs, .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart4_sdma_reqs), .main_clk = "uart4_fck", @@ -4840,6 +4843,7 @@ static struct omap_hwmod_class omap44xx_usb_otg_hs_hwmod_class = { static struct omap_hwmod_irq_info omap44xx_usb_otg_hs_irqs[] = { { .name = "mc", .irq = 92 + OMAP44XX_IRQ_GIC_START }, { .name = "dma", .irq = 93 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; /* usb_otg_hs master ports */ @@ -4879,7 +4883,6 @@ static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = { .class = &omap44xx_usb_otg_hs_hwmod_class, .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY, .mpu_irqs = omap44xx_usb_otg_hs_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_irqs), .main_clk = "usb_otg_hs_ick", .prcm = { .omap4 = { @@ -4922,6 +4925,7 @@ static struct omap_hwmod_class omap44xx_wd_timer_hwmod_class = { static struct omap_hwmod omap44xx_wd_timer2_hwmod; static struct omap_hwmod_irq_info omap44xx_wd_timer2_irqs[] = { { .irq = 80 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_wd_timer2_addrs[] = { @@ -4951,7 +4955,6 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = { .name = "wd_timer2", .class = &omap44xx_wd_timer_hwmod_class, .mpu_irqs = omap44xx_wd_timer2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_wd_timer2_irqs), .main_clk = "wd_timer2_fck", .prcm = { .omap4 = { @@ -4967,6 +4970,7 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = { static struct omap_hwmod omap44xx_wd_timer3_hwmod; static struct omap_hwmod_irq_info omap44xx_wd_timer3_irqs[] = { { .irq = 36 + OMAP44XX_IRQ_GIC_START }, + { .irq = -1 } }; static struct omap_hwmod_addr_space omap44xx_wd_timer3_addrs[] = { @@ -5015,7 +5019,6 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = { .name = "wd_timer3", .class = &omap44xx_wd_timer_hwmod_class, .mpu_irqs = omap44xx_wd_timer3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_wd_timer3_irqs), .main_clk = "wd_timer3_fck", .prcm = { .omap4 = { diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 523e0b585b6..3bd6d1d9c0d 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -98,7 +98,7 @@ struct omap_hwmod_mux_info { /** * struct omap_hwmod_irq_info - MPU IRQs used by the hwmod * @name: name of the IRQ channel (module local name) - * @irq_ch: IRQ channel ID + * @irq: IRQ channel ID (should be non-negative except -1 = terminator) * * @name should be something short, e.g., "tx" or "rx". It is for use * by platform_get_resource_byname(). It is defined locally to the @@ -106,7 +106,7 @@ struct omap_hwmod_mux_info { */ struct omap_hwmod_irq_info { const char *name; - u16 irq; + s16 irq; }; /** @@ -466,7 +466,7 @@ struct omap_hwmod_class { * @name: name of the hwmod * @class: struct omap_hwmod_class * to the class of this hwmod * @od: struct omap_device currently associated with this hwmod (internal use) - * @mpu_irqs: ptr to an array of MPU IRQs (see also mpu_irqs_cnt) + * @mpu_irqs: ptr to an array of MPU IRQs * @sdma_reqs: ptr to an array of System DMA request IDs (see sdma_reqs_cnt) * @prcm: PRCM data pertaining to this hwmod * @main_clk: main clock: OMAP clock name @@ -480,7 +480,6 @@ struct omap_hwmod_class { * @_sysc_cache: internal-use hwmod flags * @_mpu_rt_va: cached register target start address (internal use) * @_mpu_port_index: cached MPU register target slave ID (internal use) - * @mpu_irqs_cnt: number of @mpu_irqs * @sdma_reqs_cnt: number of @sdma_reqs * @opt_clks_cnt: number of @opt_clks * @master_cnt: number of @master entries @@ -529,7 +528,6 @@ struct omap_hwmod { u16 flags; u8 _mpu_port_index; u8 response_lat; - u8 mpu_irqs_cnt; u8 sdma_reqs_cnt; u8 rst_lines_cnt; u8 opt_clks_cnt; -- cgit v1.2.3-70-g09d2 From bc6149587b309e3231e5ac7138b84197813e17ec Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Sat, 9 Jul 2011 19:14:07 -0600 Subject: omap_hwmod: use a terminator record with omap_hwmod_dma_info arrays Previously, struct omap_hwmod_dma_info arrays were unterminated; and users of these arrays used the ARRAY_SIZE() macro to determine the length of the array. However, ARRAY_SIZE() only works when the array is in the same scope as the macro user. So far this hasn't been a problem. However, to reduce duplicated data, a subsequent patch will move common data to a separate, shared file. When this is done, ARRAY_SIZE() will no longer be usable. This patch removes ARRAY_SIZE() usage for struct omap_hwmod_dma_info arrays and uses a sentinel value (irq == -1) as the array terminator instead. Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod.c | 30 ++++++++++++-- arch/arm/mach-omap2/omap_hwmod_2420_data.c | 20 +++++----- arch/arm/mach-omap2/omap_hwmod_2430_data.c | 32 +++++++-------- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 43 ++++++++++---------- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 60 ++++++++++++++-------------- arch/arm/plat-omap/include/plat/omap_hwmod.h | 8 ++-- 6 files changed, 106 insertions(+), 87 deletions(-) (limited to 'arch/arm/mach-omap2/omap_hwmod.c') diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 21e3eb8e83c..d1a8bdefea3 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -701,6 +701,29 @@ static int _count_mpu_irqs(struct omap_hwmod *oh) return i; } +/** + * _count_sdma_reqs - count the number of SDMA request lines associated with @oh + * @oh: struct omap_hwmod *oh + * + * Count and return the number of SDMA request lines associated with + * the hwmod @oh. Used to allocate struct resource data. Returns 0 + * if @oh is NULL. + */ +static int _count_sdma_reqs(struct omap_hwmod *oh) +{ + struct omap_hwmod_dma_info *ohdi; + int i = 0; + + if (!oh || !oh->sdma_reqs) + return 0; + + do { + ohdi = &oh->sdma_reqs[i++]; + } while (ohdi->dma_req != -1); + + return i; +} + /** * _count_ocp_if_addr_spaces - count the number of address space entries for @oh * @oh: struct omap_hwmod *oh @@ -1987,7 +2010,7 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh) { int ret, i; - ret = _count_mpu_irqs(oh) + oh->sdma_reqs_cnt; + ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh); for (i = 0; i < oh->slaves_cnt; i++) ret += _count_ocp_if_addr_spaces(oh->slaves[i]); @@ -2007,7 +2030,7 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh) */ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) { - int i, j, mpu_irqs_cnt; + int i, j, mpu_irqs_cnt, sdma_reqs_cnt; int r = 0; /* For each IRQ, DMA, memory area, fill in array.*/ @@ -2021,7 +2044,8 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) r++; } - for (i = 0; i < oh->sdma_reqs_cnt; i++) { + sdma_reqs_cnt = _count_sdma_reqs(oh); + for (i = 0; i < sdma_reqs_cnt; i++) { (res + r)->name = (oh->sdma_reqs + i)->name; (res + r)->start = (oh->sdma_reqs + i)->dma_req; (res + r)->end = (oh->sdma_reqs + i)->dma_req; diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 73157eef259..60c817e63c3 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -831,6 +831,7 @@ static struct omap_hwmod_class uart_class = { static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { @@ -841,7 +842,6 @@ static struct omap_hwmod omap2420_uart1_hwmod = { .name = "uart1", .mpu_irqs = omap2_uart1_mpu_irqs, .sdma_reqs = uart1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), .main_clk = "uart1_fck", .prcm = { .omap2 = { @@ -863,6 +863,7 @@ static struct omap_hwmod omap2420_uart1_hwmod = { static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = { @@ -873,7 +874,6 @@ static struct omap_hwmod omap2420_uart2_hwmod = { .name = "uart2", .mpu_irqs = omap2_uart2_mpu_irqs, .sdma_reqs = uart2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), .main_clk = "uart2_fck", .prcm = { .omap2 = { @@ -895,6 +895,7 @@ static struct omap_hwmod omap2420_uart2_hwmod = { static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = { @@ -905,7 +906,6 @@ static struct omap_hwmod omap2420_uart3_hwmod = { .name = "uart3", .mpu_irqs = omap2_uart3_mpu_irqs, .sdma_reqs = uart3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), .main_clk = "uart3_fck", .prcm = { .omap2 = { @@ -942,6 +942,7 @@ static struct omap_hwmod_class omap2420_dss_hwmod_class = { static struct omap_hwmod_dma_info omap2420_dss_sdma_chs[] = { { .name = "dispc", .dma_req = 5 }, + { .dma_req = -1 } }; /* dss */ @@ -980,7 +981,6 @@ static struct omap_hwmod omap2420_dss_core_hwmod = { .class = &omap2420_dss_hwmod_class, .main_clk = "dss1_fck", /* instead of dss_fck */ .sdma_reqs = omap2420_dss_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_dss_sdma_chs), .prcm = { .omap2 = { .prcm_reg_id = 1, @@ -1186,6 +1186,7 @@ static struct omap_i2c_dev_attr i2c_dev_attr; static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = { @@ -1196,7 +1197,6 @@ static struct omap_hwmod omap2420_i2c1_hwmod = { .name = "i2c1", .mpu_irqs = omap2_i2c1_mpu_irqs, .sdma_reqs = i2c1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), .main_clk = "i2c1_fck", .prcm = { .omap2 = { @@ -1220,6 +1220,7 @@ static struct omap_hwmod omap2420_i2c1_hwmod = { static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = { @@ -1230,7 +1231,6 @@ static struct omap_hwmod omap2420_i2c2_hwmod = { .name = "i2c2", .mpu_irqs = omap2_i2c2_mpu_irqs, .sdma_reqs = i2c2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), .main_clk = "i2c2_fck", .prcm = { .omap2 = { @@ -1611,6 +1611,7 @@ static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = { { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2420_mcspi1_slaves[] = { @@ -1625,7 +1626,6 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = { .name = "mcspi1_hwmod", .mpu_irqs = omap2_mcspi1_mpu_irqs, .sdma_reqs = omap2420_mcspi1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", .prcm = { .omap2 = { @@ -1649,6 +1649,7 @@ static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = { { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2420_mcspi2_slaves[] = { @@ -1663,7 +1664,6 @@ static struct omap_hwmod omap2420_mcspi2_hwmod = { .name = "mcspi2_hwmod", .mpu_irqs = omap2_mcspi2_mpu_irqs, .sdma_reqs = omap2420_mcspi2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", .prcm = { .omap2 = { @@ -1700,6 +1700,7 @@ static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = { static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = { { .name = "rx", .dma_req = 32 }, { .name = "tx", .dma_req = 31 }, + { .dma_req = -1 } }; /* l4_core -> mcbsp1 */ @@ -1721,7 +1722,6 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = { .class = &omap2420_mcbsp_hwmod_class, .mpu_irqs = omap2420_mcbsp1_irqs, .sdma_reqs = omap2420_mcbsp1_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp1_sdma_chs), .main_clk = "mcbsp1_fck", .prcm = { .omap2 = { @@ -1747,6 +1747,7 @@ static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = { static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = { { .name = "rx", .dma_req = 34 }, { .name = "tx", .dma_req = 33 }, + { .dma_req = -1 } }; /* l4_core -> mcbsp2 */ @@ -1768,7 +1769,6 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = { .class = &omap2420_mcbsp_hwmod_class, .mpu_irqs = omap2420_mcbsp2_irqs, .sdma_reqs = omap2420_mcbsp2_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp2_sdma_chs), .main_clk = "mcbsp2_fck", .prcm = { .omap2 = { diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 62ecc685f1a..af758b3e723 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -903,6 +903,7 @@ static struct omap_hwmod_class uart_class = { static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { @@ -913,7 +914,6 @@ static struct omap_hwmod omap2430_uart1_hwmod = { .name = "uart1", .mpu_irqs = omap2_uart1_mpu_irqs, .sdma_reqs = uart1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), .main_clk = "uart1_fck", .prcm = { .omap2 = { @@ -935,6 +935,7 @@ static struct omap_hwmod omap2430_uart1_hwmod = { static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = { @@ -945,7 +946,6 @@ static struct omap_hwmod omap2430_uart2_hwmod = { .name = "uart2", .mpu_irqs = omap2_uart2_mpu_irqs, .sdma_reqs = uart2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), .main_clk = "uart2_fck", .prcm = { .omap2 = { @@ -967,6 +967,7 @@ static struct omap_hwmod omap2430_uart2_hwmod = { static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = { @@ -977,7 +978,6 @@ static struct omap_hwmod omap2430_uart3_hwmod = { .name = "uart3", .mpu_irqs = omap2_uart3_mpu_irqs, .sdma_reqs = uart3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), .main_clk = "uart3_fck", .prcm = { .omap2 = { @@ -1014,6 +1014,7 @@ static struct omap_hwmod_class omap2430_dss_hwmod_class = { static struct omap_hwmod_dma_info omap2430_dss_sdma_chs[] = { { .name = "dispc", .dma_req = 5 }, + { .dma_req = -1 } }; /* dss */ @@ -1046,7 +1047,6 @@ static struct omap_hwmod omap2430_dss_core_hwmod = { .class = &omap2430_dss_hwmod_class, .main_clk = "dss1_fck", /* instead of dss_fck */ .sdma_reqs = omap2430_dss_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_dss_sdma_chs), .prcm = { .omap2 = { .prcm_reg_id = 1, @@ -1237,6 +1237,7 @@ static struct omap_i2c_dev_attr i2c_dev_attr = { static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { @@ -1247,7 +1248,6 @@ static struct omap_hwmod omap2430_i2c1_hwmod = { .name = "i2c1", .mpu_irqs = omap2_i2c1_mpu_irqs, .sdma_reqs = i2c1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), .main_clk = "i2chs1_fck", .prcm = { .omap2 = { @@ -1278,6 +1278,7 @@ static struct omap_hwmod omap2430_i2c1_hwmod = { static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { @@ -1288,7 +1289,6 @@ static struct omap_hwmod omap2430_i2c2_hwmod = { .name = "i2c2", .mpu_irqs = omap2_i2c2_mpu_irqs, .sdma_reqs = i2c2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), .main_clk = "i2chs2_fck", .prcm = { .omap2 = { @@ -1716,6 +1716,7 @@ static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = { { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = { @@ -1730,7 +1731,6 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = { .name = "mcspi1_hwmod", .mpu_irqs = omap2_mcspi1_mpu_irqs, .sdma_reqs = omap2430_mcspi1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", .prcm = { .omap2 = { @@ -1754,6 +1754,7 @@ static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = { { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2430_mcspi2_slaves[] = { @@ -1768,7 +1769,6 @@ static struct omap_hwmod omap2430_mcspi2_hwmod = { .name = "mcspi2_hwmod", .mpu_irqs = omap2_mcspi2_mpu_irqs, .sdma_reqs = omap2430_mcspi2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", .prcm = { .omap2 = { @@ -1797,6 +1797,7 @@ static struct omap_hwmod_dma_info omap2430_mcspi3_sdma_reqs[] = { { .name = "rx0", .dma_req = 16 }, /* DMA_SPI3_RX0 */ { .name = "tx1", .dma_req = 23 }, /* DMA_SPI3_TX1 */ { .name = "rx1", .dma_req = 24 }, /* DMA_SPI3_RX1 */ + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap2430_mcspi3_slaves[] = { @@ -1811,7 +1812,6 @@ static struct omap_hwmod omap2430_mcspi3_hwmod = { .name = "mcspi3_hwmod", .mpu_irqs = omap2430_mcspi3_mpu_irqs, .sdma_reqs = omap2430_mcspi3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi3_sdma_reqs), .main_clk = "mcspi3_fck", .prcm = { .omap2 = { @@ -1915,6 +1915,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = { static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = { { .name = "rx", .dma_req = 32 }, { .name = "tx", .dma_req = 31 }, + { .dma_req = -1 } }; /* l4_core -> mcbsp1 */ @@ -1936,7 +1937,6 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = { .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp1_irqs, .sdma_reqs = omap2430_mcbsp1_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp1_sdma_chs), .main_clk = "mcbsp1_fck", .prcm = { .omap2 = { @@ -1963,6 +1963,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp2_irqs[] = { static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = { { .name = "rx", .dma_req = 34 }, { .name = "tx", .dma_req = 33 }, + { .dma_req = -1 } }; /* l4_core -> mcbsp2 */ @@ -1984,7 +1985,6 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = { .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp2_irqs, .sdma_reqs = omap2430_mcbsp2_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp2_sdma_chs), .main_clk = "mcbsp2_fck", .prcm = { .omap2 = { @@ -2011,6 +2011,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp3_irqs[] = { static struct omap_hwmod_dma_info omap2430_mcbsp3_sdma_chs[] = { { .name = "rx", .dma_req = 18 }, { .name = "tx", .dma_req = 17 }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap2430_mcbsp3_addrs[] = { @@ -2042,7 +2043,6 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = { .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp3_irqs, .sdma_reqs = omap2430_mcbsp3_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp3_sdma_chs), .main_clk = "mcbsp3_fck", .prcm = { .omap2 = { @@ -2069,6 +2069,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp4_irqs[] = { static struct omap_hwmod_dma_info omap2430_mcbsp4_sdma_chs[] = { { .name = "rx", .dma_req = 20 }, { .name = "tx", .dma_req = 19 }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap2430_mcbsp4_addrs[] = { @@ -2100,7 +2101,6 @@ static struct omap_hwmod omap2430_mcbsp4_hwmod = { .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp4_irqs, .sdma_reqs = omap2430_mcbsp4_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp4_sdma_chs), .main_clk = "mcbsp4_fck", .prcm = { .omap2 = { @@ -2127,6 +2127,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp5_irqs[] = { static struct omap_hwmod_dma_info omap2430_mcbsp5_sdma_chs[] = { { .name = "rx", .dma_req = 22 }, { .name = "tx", .dma_req = 21 }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap2430_mcbsp5_addrs[] = { @@ -2158,7 +2159,6 @@ static struct omap_hwmod omap2430_mcbsp5_hwmod = { .class = &omap2430_mcbsp_hwmod_class, .mpu_irqs = omap2430_mcbsp5_irqs, .sdma_reqs = omap2430_mcbsp5_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp5_sdma_chs), .main_clk = "mcbsp5_fck", .prcm = { .omap2 = { @@ -2202,6 +2202,7 @@ static struct omap_hwmod_irq_info omap2430_mmc1_mpu_irqs[] = { static struct omap_hwmod_dma_info omap2430_mmc1_sdma_reqs[] = { { .name = "tx", .dma_req = 61 }, /* DMA_MMC1_TX */ { .name = "rx", .dma_req = 62 }, /* DMA_MMC1_RX */ + { .dma_req = -1 } }; static struct omap_hwmod_opt_clk omap2430_mmc1_opt_clks[] = { @@ -2221,7 +2222,6 @@ static struct omap_hwmod omap2430_mmc1_hwmod = { .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap2430_mmc1_mpu_irqs, .sdma_reqs = omap2430_mmc1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc1_sdma_reqs), .opt_clks = omap2430_mmc1_opt_clks, .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc1_opt_clks), .main_clk = "mmchs1_fck", @@ -2251,6 +2251,7 @@ static struct omap_hwmod_irq_info omap2430_mmc2_mpu_irqs[] = { static struct omap_hwmod_dma_info omap2430_mmc2_sdma_reqs[] = { { .name = "tx", .dma_req = 47 }, /* DMA_MMC2_TX */ { .name = "rx", .dma_req = 48 }, /* DMA_MMC2_RX */ + { .dma_req = -1 } }; static struct omap_hwmod_opt_clk omap2430_mmc2_opt_clks[] = { @@ -2266,7 +2267,6 @@ static struct omap_hwmod omap2430_mmc2_hwmod = { .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, .mpu_irqs = omap2430_mmc2_mpu_irqs, .sdma_reqs = omap2430_mmc2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc2_sdma_reqs), .opt_clks = omap2430_mmc2_opt_clks, .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc2_opt_clks), .main_clk = "mmchs2_fck", diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 6bac4bb14df..265f0b10e5c 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -1213,6 +1213,7 @@ static struct omap_hwmod_class uart_class = { static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = { @@ -1223,7 +1224,6 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = { .name = "uart1", .mpu_irqs = omap2_uart1_mpu_irqs, .sdma_reqs = uart1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), .main_clk = "uart1_fck", .prcm = { .omap2 = { @@ -1245,6 +1245,7 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = { static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = { @@ -1255,7 +1256,6 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = { .name = "uart2", .mpu_irqs = omap2_uart2_mpu_irqs, .sdma_reqs = uart2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), .main_clk = "uart2_fck", .prcm = { .omap2 = { @@ -1277,6 +1277,7 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = { static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = { @@ -1287,7 +1288,6 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = { .name = "uart3", .mpu_irqs = omap2_uart3_mpu_irqs, .sdma_reqs = uart3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), .main_clk = "uart3_fck", .prcm = { .omap2 = { @@ -1314,6 +1314,7 @@ static struct omap_hwmod_irq_info uart4_mpu_irqs[] = { static struct omap_hwmod_dma_info uart4_sdma_reqs[] = { { .name = "rx", .dma_req = OMAP36XX_DMA_UART4_RX, }, { .name = "tx", .dma_req = OMAP36XX_DMA_UART4_TX, }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap3xxx_uart4_slaves[] = { @@ -1324,7 +1325,6 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = { .name = "uart4", .mpu_irqs = uart4_mpu_irqs, .sdma_reqs = uart4_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart4_sdma_reqs), .main_clk = "uart4_fck", .prcm = { .omap2 = { @@ -1367,6 +1367,7 @@ static struct omap_hwmod_class omap3xxx_dss_hwmod_class = { static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = { { .name = "dispc", .dma_req = 5 }, { .name = "dsi1", .dma_req = 74 }, + { .dma_req = -1 } }; /* dss */ @@ -1426,8 +1427,6 @@ static struct omap_hwmod omap3430es1_dss_core_hwmod = { .class = &omap3xxx_dss_hwmod_class, .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ .sdma_reqs = omap3xxx_dss_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_dss_sdma_chs), - .prcm = { .omap2 = { .prcm_reg_id = 1, @@ -1452,8 +1451,6 @@ static struct omap_hwmod omap3xxx_dss_core_hwmod = { .class = &omap3xxx_dss_hwmod_class, .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ .sdma_reqs = omap3xxx_dss_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_dss_sdma_chs), - .prcm = { .omap2 = { .prcm_reg_id = 1, @@ -1720,6 +1717,7 @@ static struct omap_i2c_dev_attr i2c1_dev_attr = { static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { @@ -1730,7 +1728,6 @@ static struct omap_hwmod omap3xxx_i2c1_hwmod = { .name = "i2c1", .mpu_irqs = omap2_i2c1_mpu_irqs, .sdma_reqs = i2c1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), .main_clk = "i2c1_fck", .prcm = { .omap2 = { @@ -1757,6 +1754,7 @@ static struct omap_i2c_dev_attr i2c2_dev_attr = { static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { @@ -1767,7 +1765,6 @@ static struct omap_hwmod omap3xxx_i2c2_hwmod = { .name = "i2c2", .mpu_irqs = omap2_i2c2_mpu_irqs, .sdma_reqs = i2c2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), .main_clk = "i2c2_fck", .prcm = { .omap2 = { @@ -1799,6 +1796,7 @@ static struct omap_hwmod_irq_info i2c3_mpu_irqs[] = { static struct omap_hwmod_dma_info i2c3_sdma_reqs[] = { { .name = "tx", .dma_req = OMAP34XX_DMA_I2C3_TX }, { .name = "rx", .dma_req = OMAP34XX_DMA_I2C3_RX }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap3xxx_i2c3_slaves[] = { @@ -1809,7 +1807,6 @@ static struct omap_hwmod omap3xxx_i2c3_hwmod = { .name = "i2c3", .mpu_irqs = i2c3_mpu_irqs, .sdma_reqs = i2c3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c3_sdma_reqs), .main_clk = "i2c3_fck", .prcm = { .omap2 = { @@ -2275,6 +2272,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = { static struct omap_hwmod_dma_info omap3xxx_mcbsp1_sdma_chs[] = { { .name = "rx", .dma_req = 32 }, { .name = "tx", .dma_req = 31 }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap3xxx_mcbsp1_addrs[] = { @@ -2306,7 +2304,6 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = { .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp1_irqs, .sdma_reqs = omap3xxx_mcbsp1_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_sdma_chs), .main_clk = "mcbsp1_fck", .prcm = { .omap2 = { @@ -2333,6 +2330,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp2_irqs[] = { static struct omap_hwmod_dma_info omap3xxx_mcbsp2_sdma_chs[] = { { .name = "rx", .dma_req = 34 }, { .name = "tx", .dma_req = 33 }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap3xxx_mcbsp2_addrs[] = { @@ -2369,7 +2367,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = { .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp2_irqs, .sdma_reqs = omap3xxx_mcbsp2_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sdma_chs), .main_clk = "mcbsp2_fck", .prcm = { .omap2 = { @@ -2397,6 +2394,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp3_irqs[] = { static struct omap_hwmod_dma_info omap3xxx_mcbsp3_sdma_chs[] = { { .name = "rx", .dma_req = 18 }, { .name = "tx", .dma_req = 17 }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap3xxx_mcbsp3_addrs[] = { @@ -2432,7 +2430,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = { .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp3_irqs, .sdma_reqs = omap3xxx_mcbsp3_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sdma_chs), .main_clk = "mcbsp3_fck", .prcm = { .omap2 = { @@ -2460,6 +2457,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp4_irqs[] = { static struct omap_hwmod_dma_info omap3xxx_mcbsp4_sdma_chs[] = { { .name = "rx", .dma_req = 20 }, { .name = "tx", .dma_req = 19 }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap3xxx_mcbsp4_addrs[] = { @@ -2491,7 +2489,6 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod = { .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp4_irqs, .sdma_reqs = omap3xxx_mcbsp4_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_sdma_chs), .main_clk = "mcbsp4_fck", .prcm = { .omap2 = { @@ -2518,6 +2515,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp5_irqs[] = { static struct omap_hwmod_dma_info omap3xxx_mcbsp5_sdma_chs[] = { { .name = "rx", .dma_req = 22 }, { .name = "tx", .dma_req = 21 }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap3xxx_mcbsp5_addrs[] = { @@ -2549,7 +2547,6 @@ static struct omap_hwmod omap3xxx_mcbsp5_hwmod = { .class = &omap3xxx_mcbsp_hwmod_class, .mpu_irqs = omap3xxx_mcbsp5_irqs, .sdma_reqs = omap3xxx_mcbsp5_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_sdma_chs), .main_clk = "mcbsp5_fck", .prcm = { .omap2 = { @@ -2951,6 +2948,7 @@ static struct omap_hwmod_dma_info omap34xx_mcspi1_sdma_reqs[] = { { .name = "rx2", .dma_req = 40 }, { .name = "tx3", .dma_req = 41 }, { .name = "rx3", .dma_req = 42 }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap34xx_mcspi1_slaves[] = { @@ -2965,7 +2963,6 @@ static struct omap_hwmod omap34xx_mcspi1 = { .name = "mcspi1", .mpu_irqs = omap2_mcspi1_mpu_irqs, .sdma_reqs = omap34xx_mcspi1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", .prcm = { .omap2 = { @@ -2989,6 +2986,7 @@ static struct omap_hwmod_dma_info omap34xx_mcspi2_sdma_reqs[] = { { .name = "rx0", .dma_req = 44 }, { .name = "tx1", .dma_req = 45 }, { .name = "rx1", .dma_req = 46 }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap34xx_mcspi2_slaves[] = { @@ -3003,7 +3001,6 @@ static struct omap_hwmod omap34xx_mcspi2 = { .name = "mcspi2", .mpu_irqs = omap2_mcspi2_mpu_irqs, .sdma_reqs = omap34xx_mcspi2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", .prcm = { .omap2 = { @@ -3032,6 +3029,7 @@ static struct omap_hwmod_dma_info omap34xx_mcspi3_sdma_reqs[] = { { .name = "rx0", .dma_req = 16 }, { .name = "tx1", .dma_req = 23 }, { .name = "rx1", .dma_req = 24 }, + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap34xx_mcspi3_slaves[] = { @@ -3046,7 +3044,6 @@ static struct omap_hwmod omap34xx_mcspi3 = { .name = "mcspi3", .mpu_irqs = omap34xx_mcspi3_mpu_irqs, .sdma_reqs = omap34xx_mcspi3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi3_sdma_reqs), .main_clk = "mcspi3_fck", .prcm = { .omap2 = { @@ -3073,6 +3070,7 @@ static struct omap_hwmod_irq_info omap34xx_mcspi4_mpu_irqs[] = { static struct omap_hwmod_dma_info omap34xx_mcspi4_sdma_reqs[] = { { .name = "tx0", .dma_req = 70 }, /* DMA_SPI4_TX0 */ { .name = "rx0", .dma_req = 71 }, /* DMA_SPI4_RX0 */ + { .dma_req = -1 } }; static struct omap_hwmod_ocp_if *omap34xx_mcspi4_slaves[] = { @@ -3087,7 +3085,6 @@ static struct omap_hwmod omap34xx_mcspi4 = { .name = "mcspi4", .mpu_irqs = omap34xx_mcspi4_mpu_irqs, .sdma_reqs = omap34xx_mcspi4_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi4_sdma_reqs), .main_clk = "mcspi4_fck", .prcm = { .omap2 = { @@ -3218,6 +3215,7 @@ static struct omap_hwmod_irq_info omap34xx_mmc1_mpu_irqs[] = { static struct omap_hwmod_dma_info omap34xx_mmc1_sdma_reqs[] = { { .name = "tx", .dma_req = 61, }, { .name = "rx", .dma_req = 62, }, + { .dma_req = -1 } }; static struct omap_hwmod_opt_clk omap34xx_mmc1_opt_clks[] = { @@ -3236,7 +3234,6 @@ static struct omap_hwmod omap3xxx_mmc1_hwmod = { .name = "mmc1", .mpu_irqs = omap34xx_mmc1_mpu_irqs, .sdma_reqs = omap34xx_mmc1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc1_sdma_reqs), .opt_clks = omap34xx_mmc1_opt_clks, .opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc1_opt_clks), .main_clk = "mmchs1_fck", @@ -3266,6 +3263,7 @@ static struct omap_hwmod_irq_info omap34xx_mmc2_mpu_irqs[] = { static struct omap_hwmod_dma_info omap34xx_mmc2_sdma_reqs[] = { { .name = "tx", .dma_req = 47, }, { .name = "rx", .dma_req = 48, }, + { .dma_req = -1 } }; static struct omap_hwmod_opt_clk omap34xx_mmc2_opt_clks[] = { @@ -3280,7 +3278,6 @@ static struct omap_hwmod omap3xxx_mmc2_hwmod = { .name = "mmc2", .mpu_irqs = omap34xx_mmc2_mpu_irqs, .sdma_reqs = omap34xx_mmc2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc2_sdma_reqs), .opt_clks = omap34xx_mmc2_opt_clks, .opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc2_opt_clks), .main_clk = "mmchs2_fck", @@ -3309,6 +3306,7 @@ static struct omap_hwmod_irq_info omap34xx_mmc3_mpu_irqs[] = { static struct omap_hwmod_dma_info omap34xx_mmc3_sdma_reqs[] = { { .name = "tx", .dma_req = 77, }, { .name = "rx", .dma_req = 78, }, + { .dma_req = -1 } }; static struct omap_hwmod_opt_clk omap34xx_mmc3_opt_clks[] = { @@ -3323,7 +3321,6 @@ static struct omap_hwmod omap3xxx_mmc3_hwmod = { .name = "mmc3", .mpu_irqs = omap34xx_mmc3_mpu_irqs, .sdma_reqs = omap34xx_mmc3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc3_sdma_reqs), .opt_clks = omap34xx_mmc3_opt_clks, .opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc3_opt_clks), .main_clk = "mmchs3_fck", diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index bbfc4db664b..a93c4552a57 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -684,6 +684,7 @@ static struct omap_hwmod_dma_info omap44xx_aess_sdma_reqs[] = { { .name = "fifo5", .dma_req = 105 + OMAP44XX_DMA_REQ_START }, { .name = "fifo6", .dma_req = 106 + OMAP44XX_DMA_REQ_START }, { .name = "fifo7", .dma_req = 107 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; /* aess master ports */ @@ -738,7 +739,6 @@ static struct omap_hwmod omap44xx_aess_hwmod = { .class = &omap44xx_aess_hwmod_class, .mpu_irqs = omap44xx_aess_irqs, .sdma_reqs = omap44xx_aess_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_aess_sdma_reqs), .main_clk = "aess_fck", .prcm = { .omap4 = { @@ -953,6 +953,7 @@ static struct omap_hwmod_irq_info omap44xx_dmic_irqs[] = { static struct omap_hwmod_dma_info omap44xx_dmic_sdma_reqs[] = { { .dma_req = 66 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_dmic_addrs[] = { @@ -1002,7 +1003,6 @@ static struct omap_hwmod omap44xx_dmic_hwmod = { .class = &omap44xx_dmic_hwmod_class, .mpu_irqs = omap44xx_dmic_irqs, .sdma_reqs = omap44xx_dmic_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dmic_sdma_reqs), .main_clk = "dmic_fck", .prcm = { .omap4 = { @@ -1220,6 +1220,7 @@ static struct omap_hwmod_irq_info omap44xx_dss_dispc_irqs[] = { static struct omap_hwmod_dma_info omap44xx_dss_dispc_sdma_reqs[] = { { .dma_req = 5 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_dss_dispc_dma_addrs[] = { @@ -1269,7 +1270,6 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = { .class = &omap44xx_dispc_hwmod_class, .mpu_irqs = omap44xx_dss_dispc_irqs, .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dispc_sdma_reqs), .main_clk = "dss_fck", .prcm = { .omap4 = { @@ -1311,6 +1311,7 @@ static struct omap_hwmod_irq_info omap44xx_dss_dsi1_irqs[] = { static struct omap_hwmod_dma_info omap44xx_dss_dsi1_sdma_reqs[] = { { .dma_req = 74 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_dss_dsi1_dma_addrs[] = { @@ -1360,7 +1361,6 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { .class = &omap44xx_dsi_hwmod_class, .mpu_irqs = omap44xx_dss_dsi1_irqs, .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_sdma_reqs), .main_clk = "dss_fck", .prcm = { .omap4 = { @@ -1381,6 +1381,7 @@ static struct omap_hwmod_irq_info omap44xx_dss_dsi2_irqs[] = { static struct omap_hwmod_dma_info omap44xx_dss_dsi2_sdma_reqs[] = { { .dma_req = 83 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_dss_dsi2_dma_addrs[] = { @@ -1430,7 +1431,6 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { .class = &omap44xx_dsi_hwmod_class, .mpu_irqs = omap44xx_dss_dsi2_irqs, .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_sdma_reqs), .main_clk = "dss_fck", .prcm = { .omap4 = { @@ -1471,6 +1471,7 @@ static struct omap_hwmod_irq_info omap44xx_dss_hdmi_irqs[] = { static struct omap_hwmod_dma_info omap44xx_dss_hdmi_sdma_reqs[] = { { .dma_req = 75 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_dss_hdmi_dma_addrs[] = { @@ -1520,7 +1521,6 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { .class = &omap44xx_hdmi_hwmod_class, .mpu_irqs = omap44xx_dss_hdmi_irqs, .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_sdma_reqs), .main_clk = "dss_fck", .prcm = { .omap4 = { @@ -1556,6 +1556,7 @@ static struct omap_hwmod_class omap44xx_rfbi_hwmod_class = { static struct omap_hwmod omap44xx_dss_rfbi_hwmod; static struct omap_hwmod_dma_info omap44xx_dss_rfbi_sdma_reqs[] = { { .dma_req = 13 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_dss_rfbi_dma_addrs[] = { @@ -1604,7 +1605,6 @@ static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { .name = "dss_rfbi", .class = &omap44xx_rfbi_hwmod_class, .sdma_reqs = omap44xx_dss_rfbi_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_sdma_reqs), .main_clk = "dss_fck", .prcm = { .omap4 = { @@ -2137,6 +2137,7 @@ static struct omap_hwmod_irq_info omap44xx_i2c1_irqs[] = { static struct omap_hwmod_dma_info omap44xx_i2c1_sdma_reqs[] = { { .name = "tx", .dma_req = 26 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 27 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_i2c1_addrs[] = { @@ -2168,7 +2169,6 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = { .flags = HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_i2c1_irqs, .sdma_reqs = omap44xx_i2c1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c1_sdma_reqs), .main_clk = "i2c1_fck", .prcm = { .omap4 = { @@ -2190,6 +2190,7 @@ static struct omap_hwmod_irq_info omap44xx_i2c2_irqs[] = { static struct omap_hwmod_dma_info omap44xx_i2c2_sdma_reqs[] = { { .name = "tx", .dma_req = 28 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 29 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_i2c2_addrs[] = { @@ -2221,7 +2222,6 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = { .flags = HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_i2c2_irqs, .sdma_reqs = omap44xx_i2c2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c2_sdma_reqs), .main_clk = "i2c2_fck", .prcm = { .omap4 = { @@ -2243,6 +2243,7 @@ static struct omap_hwmod_irq_info omap44xx_i2c3_irqs[] = { static struct omap_hwmod_dma_info omap44xx_i2c3_sdma_reqs[] = { { .name = "tx", .dma_req = 24 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 25 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_i2c3_addrs[] = { @@ -2274,7 +2275,6 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = { .flags = HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_i2c3_irqs, .sdma_reqs = omap44xx_i2c3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c3_sdma_reqs), .main_clk = "i2c3_fck", .prcm = { .omap4 = { @@ -2296,6 +2296,7 @@ static struct omap_hwmod_irq_info omap44xx_i2c4_irqs[] = { static struct omap_hwmod_dma_info omap44xx_i2c4_sdma_reqs[] = { { .name = "tx", .dma_req = 123 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 124 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_i2c4_addrs[] = { @@ -2327,7 +2328,6 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = { .flags = HWMOD_INIT_NO_RESET, .mpu_irqs = omap44xx_i2c4_irqs, .sdma_reqs = omap44xx_i2c4_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c4_sdma_reqs), .main_clk = "i2c4_fck", .prcm = { .omap4 = { @@ -2466,6 +2466,7 @@ static struct omap_hwmod_dma_info omap44xx_iss_sdma_reqs[] = { { .name = "2", .dma_req = 9 + OMAP44XX_DMA_REQ_START }, { .name = "3", .dma_req = 11 + OMAP44XX_DMA_REQ_START }, { .name = "4", .dma_req = 12 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; /* iss master ports */ @@ -2505,7 +2506,6 @@ static struct omap_hwmod omap44xx_iss_hwmod = { .class = &omap44xx_iss_hwmod_class, .mpu_irqs = omap44xx_iss_irqs, .sdma_reqs = omap44xx_iss_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_iss_sdma_reqs), .main_clk = "iss_fck", .prcm = { .omap4 = { @@ -2790,6 +2790,7 @@ static struct omap_hwmod_irq_info omap44xx_mcbsp1_irqs[] = { static struct omap_hwmod_dma_info omap44xx_mcbsp1_sdma_reqs[] = { { .name = "tx", .dma_req = 32 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 33 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mcbsp1_addrs[] = { @@ -2841,7 +2842,6 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = { .class = &omap44xx_mcbsp_hwmod_class, .mpu_irqs = omap44xx_mcbsp1_irqs, .sdma_reqs = omap44xx_mcbsp1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp1_sdma_reqs), .main_clk = "mcbsp1_fck", .prcm = { .omap4 = { @@ -2863,6 +2863,7 @@ static struct omap_hwmod_irq_info omap44xx_mcbsp2_irqs[] = { static struct omap_hwmod_dma_info omap44xx_mcbsp2_sdma_reqs[] = { { .name = "tx", .dma_req = 16 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 17 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mcbsp2_addrs[] = { @@ -2914,7 +2915,6 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = { .class = &omap44xx_mcbsp_hwmod_class, .mpu_irqs = omap44xx_mcbsp2_irqs, .sdma_reqs = omap44xx_mcbsp2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp2_sdma_reqs), .main_clk = "mcbsp2_fck", .prcm = { .omap4 = { @@ -2936,6 +2936,7 @@ static struct omap_hwmod_irq_info omap44xx_mcbsp3_irqs[] = { static struct omap_hwmod_dma_info omap44xx_mcbsp3_sdma_reqs[] = { { .name = "tx", .dma_req = 18 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 19 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mcbsp3_addrs[] = { @@ -2987,7 +2988,6 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = { .class = &omap44xx_mcbsp_hwmod_class, .mpu_irqs = omap44xx_mcbsp3_irqs, .sdma_reqs = omap44xx_mcbsp3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp3_sdma_reqs), .main_clk = "mcbsp3_fck", .prcm = { .omap4 = { @@ -3009,6 +3009,7 @@ static struct omap_hwmod_irq_info omap44xx_mcbsp4_irqs[] = { static struct omap_hwmod_dma_info omap44xx_mcbsp4_sdma_reqs[] = { { .name = "tx", .dma_req = 30 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 31 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mcbsp4_addrs[] = { @@ -3039,7 +3040,6 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = { .class = &omap44xx_mcbsp_hwmod_class, .mpu_irqs = omap44xx_mcbsp4_irqs, .sdma_reqs = omap44xx_mcbsp4_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp4_sdma_reqs), .main_clk = "mcbsp4_fck", .prcm = { .omap4 = { @@ -3082,6 +3082,7 @@ static struct omap_hwmod_irq_info omap44xx_mcpdm_irqs[] = { static struct omap_hwmod_dma_info omap44xx_mcpdm_sdma_reqs[] = { { .name = "up_link", .dma_req = 64 + OMAP44XX_DMA_REQ_START }, { .name = "dn_link", .dma_req = 65 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mcpdm_addrs[] = { @@ -3131,7 +3132,6 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = { .class = &omap44xx_mcpdm_hwmod_class, .mpu_irqs = omap44xx_mcpdm_irqs, .sdma_reqs = omap44xx_mcpdm_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcpdm_sdma_reqs), .main_clk = "mcpdm_fck", .prcm = { .omap4 = { @@ -3181,6 +3181,7 @@ static struct omap_hwmod_dma_info omap44xx_mcspi1_sdma_reqs[] = { { .name = "rx2", .dma_req = 39 + OMAP44XX_DMA_REQ_START }, { .name = "tx3", .dma_req = 40 + OMAP44XX_DMA_REQ_START }, { .name = "rx3", .dma_req = 41 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mcspi1_addrs[] = { @@ -3216,7 +3217,6 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = { .class = &omap44xx_mcspi_hwmod_class, .mpu_irqs = omap44xx_mcspi1_irqs, .sdma_reqs = omap44xx_mcspi1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi1_sdma_reqs), .main_clk = "mcspi1_fck", .prcm = { .omap4 = { @@ -3241,6 +3241,7 @@ static struct omap_hwmod_dma_info omap44xx_mcspi2_sdma_reqs[] = { { .name = "rx0", .dma_req = 43 + OMAP44XX_DMA_REQ_START }, { .name = "tx1", .dma_req = 44 + OMAP44XX_DMA_REQ_START }, { .name = "rx1", .dma_req = 45 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mcspi2_addrs[] = { @@ -3276,7 +3277,6 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = { .class = &omap44xx_mcspi_hwmod_class, .mpu_irqs = omap44xx_mcspi2_irqs, .sdma_reqs = omap44xx_mcspi2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi2_sdma_reqs), .main_clk = "mcspi2_fck", .prcm = { .omap4 = { @@ -3301,6 +3301,7 @@ static struct omap_hwmod_dma_info omap44xx_mcspi3_sdma_reqs[] = { { .name = "rx0", .dma_req = 15 + OMAP44XX_DMA_REQ_START }, { .name = "tx1", .dma_req = 22 + OMAP44XX_DMA_REQ_START }, { .name = "rx1", .dma_req = 23 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mcspi3_addrs[] = { @@ -3336,7 +3337,6 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = { .class = &omap44xx_mcspi_hwmod_class, .mpu_irqs = omap44xx_mcspi3_irqs, .sdma_reqs = omap44xx_mcspi3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi3_sdma_reqs), .main_clk = "mcspi3_fck", .prcm = { .omap4 = { @@ -3359,6 +3359,7 @@ static struct omap_hwmod_irq_info omap44xx_mcspi4_irqs[] = { static struct omap_hwmod_dma_info omap44xx_mcspi4_sdma_reqs[] = { { .name = "tx0", .dma_req = 69 + OMAP44XX_DMA_REQ_START }, { .name = "rx0", .dma_req = 70 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mcspi4_addrs[] = { @@ -3394,7 +3395,6 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = { .class = &omap44xx_mcspi_hwmod_class, .mpu_irqs = omap44xx_mcspi4_irqs, .sdma_reqs = omap44xx_mcspi4_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi4_sdma_reqs), .main_clk = "mcspi4_fck", .prcm = { .omap4 = { @@ -3439,6 +3439,7 @@ static struct omap_hwmod_irq_info omap44xx_mmc1_irqs[] = { static struct omap_hwmod_dma_info omap44xx_mmc1_sdma_reqs[] = { { .name = "tx", .dma_req = 60 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 61 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; /* mmc1 master ports */ @@ -3479,7 +3480,6 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = { .class = &omap44xx_mmc_hwmod_class, .mpu_irqs = omap44xx_mmc1_irqs, .sdma_reqs = omap44xx_mmc1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc1_sdma_reqs), .main_clk = "mmc1_fck", .prcm = { .omap4 = { @@ -3503,6 +3503,7 @@ static struct omap_hwmod_irq_info omap44xx_mmc2_irqs[] = { static struct omap_hwmod_dma_info omap44xx_mmc2_sdma_reqs[] = { { .name = "tx", .dma_req = 46 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 47 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; /* mmc2 master ports */ @@ -3538,7 +3539,6 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = { .class = &omap44xx_mmc_hwmod_class, .mpu_irqs = omap44xx_mmc2_irqs, .sdma_reqs = omap44xx_mmc2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc2_sdma_reqs), .main_clk = "mmc2_fck", .prcm = { .omap4 = { @@ -3562,6 +3562,7 @@ static struct omap_hwmod_irq_info omap44xx_mmc3_irqs[] = { static struct omap_hwmod_dma_info omap44xx_mmc3_sdma_reqs[] = { { .name = "tx", .dma_req = 76 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 77 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mmc3_addrs[] = { @@ -3592,7 +3593,6 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = { .class = &omap44xx_mmc_hwmod_class, .mpu_irqs = omap44xx_mmc3_irqs, .sdma_reqs = omap44xx_mmc3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc3_sdma_reqs), .main_clk = "mmc3_fck", .prcm = { .omap4 = { @@ -3614,6 +3614,7 @@ static struct omap_hwmod_irq_info omap44xx_mmc4_irqs[] = { static struct omap_hwmod_dma_info omap44xx_mmc4_sdma_reqs[] = { { .name = "tx", .dma_req = 56 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 57 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mmc4_addrs[] = { @@ -3645,7 +3646,6 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = { .mpu_irqs = omap44xx_mmc4_irqs, .sdma_reqs = omap44xx_mmc4_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc4_sdma_reqs), .main_clk = "mmc4_fck", .prcm = { .omap4 = { @@ -3667,6 +3667,7 @@ static struct omap_hwmod_irq_info omap44xx_mmc5_irqs[] = { static struct omap_hwmod_dma_info omap44xx_mmc5_sdma_reqs[] = { { .name = "tx", .dma_req = 58 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 59 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_mmc5_addrs[] = { @@ -3697,7 +3698,6 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = { .class = &omap44xx_mmc_hwmod_class, .mpu_irqs = omap44xx_mmc5_irqs, .sdma_reqs = omap44xx_mmc5_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc5_sdma_reqs), .main_clk = "mmc5_fck", .prcm = { .omap4 = { @@ -4617,6 +4617,7 @@ static struct omap_hwmod_irq_info omap44xx_uart1_irqs[] = { static struct omap_hwmod_dma_info omap44xx_uart1_sdma_reqs[] = { { .name = "tx", .dma_req = 48 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 49 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_uart1_addrs[] = { @@ -4647,7 +4648,6 @@ static struct omap_hwmod omap44xx_uart1_hwmod = { .class = &omap44xx_uart_hwmod_class, .mpu_irqs = omap44xx_uart1_irqs, .sdma_reqs = omap44xx_uart1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart1_sdma_reqs), .main_clk = "uart1_fck", .prcm = { .omap4 = { @@ -4669,6 +4669,7 @@ static struct omap_hwmod_irq_info omap44xx_uart2_irqs[] = { static struct omap_hwmod_dma_info omap44xx_uart2_sdma_reqs[] = { { .name = "tx", .dma_req = 50 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 51 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_uart2_addrs[] = { @@ -4699,7 +4700,6 @@ static struct omap_hwmod omap44xx_uart2_hwmod = { .class = &omap44xx_uart_hwmod_class, .mpu_irqs = omap44xx_uart2_irqs, .sdma_reqs = omap44xx_uart2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart2_sdma_reqs), .main_clk = "uart2_fck", .prcm = { .omap4 = { @@ -4721,6 +4721,7 @@ static struct omap_hwmod_irq_info omap44xx_uart3_irqs[] = { static struct omap_hwmod_dma_info omap44xx_uart3_sdma_reqs[] = { { .name = "tx", .dma_req = 52 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 53 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_uart3_addrs[] = { @@ -4752,7 +4753,6 @@ static struct omap_hwmod omap44xx_uart3_hwmod = { .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), .mpu_irqs = omap44xx_uart3_irqs, .sdma_reqs = omap44xx_uart3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart3_sdma_reqs), .main_clk = "uart3_fck", .prcm = { .omap4 = { @@ -4774,6 +4774,7 @@ static struct omap_hwmod_irq_info omap44xx_uart4_irqs[] = { static struct omap_hwmod_dma_info omap44xx_uart4_sdma_reqs[] = { { .name = "tx", .dma_req = 54 + OMAP44XX_DMA_REQ_START }, { .name = "rx", .dma_req = 55 + OMAP44XX_DMA_REQ_START }, + { .dma_req = -1 } }; static struct omap_hwmod_addr_space omap44xx_uart4_addrs[] = { @@ -4804,7 +4805,6 @@ static struct omap_hwmod omap44xx_uart4_hwmod = { .class = &omap44xx_uart_hwmod_class, .mpu_irqs = omap44xx_uart4_irqs, .sdma_reqs = omap44xx_uart4_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart4_sdma_reqs), .main_clk = "uart4_fck", .prcm = { .omap4 = { diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 3bd6d1d9c0d..822556ea378 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -112,7 +112,7 @@ struct omap_hwmod_irq_info { /** * struct omap_hwmod_dma_info - DMA channels used by the hwmod * @name: name of the DMA channel (module local name) - * @dma_req: DMA request ID + * @dma_req: DMA request ID (should be non-negative except -1 = terminator) * * @name should be something short, e.g., "tx" or "rx". It is for use * by platform_get_resource_byname(). It is defined locally to the @@ -120,7 +120,7 @@ struct omap_hwmod_irq_info { */ struct omap_hwmod_dma_info { const char *name; - u16 dma_req; + s16 dma_req; }; /** @@ -467,7 +467,7 @@ struct omap_hwmod_class { * @class: struct omap_hwmod_class * to the class of this hwmod * @od: struct omap_device currently associated with this hwmod (internal use) * @mpu_irqs: ptr to an array of MPU IRQs - * @sdma_reqs: ptr to an array of System DMA request IDs (see sdma_reqs_cnt) + * @sdma_reqs: ptr to an array of System DMA request IDs * @prcm: PRCM data pertaining to this hwmod * @main_clk: main clock: OMAP clock name * @_clk: pointer to the main struct clk (filled in at runtime) @@ -480,7 +480,6 @@ struct omap_hwmod_class { * @_sysc_cache: internal-use hwmod flags * @_mpu_rt_va: cached register target start address (internal use) * @_mpu_port_index: cached MPU register target slave ID (internal use) - * @sdma_reqs_cnt: number of @sdma_reqs * @opt_clks_cnt: number of @opt_clks * @master_cnt: number of @master entries * @slaves_cnt: number of @slave entries @@ -528,7 +527,6 @@ struct omap_hwmod { u16 flags; u8 _mpu_port_index; u8 response_lat; - u8 sdma_reqs_cnt; u8 rst_lines_cnt; u8 opt_clks_cnt; u8 masters_cnt; -- cgit v1.2.3-70-g09d2 From 6d3c55fd4f0f94a9455d30df9414ddb0f755f402 Mon Sep 17 00:00:00 2001 From: "Avinash.H.M" Date: Sun, 10 Jul 2011 05:27:16 -0600 Subject: OMAP: hwmod: fix the i2c-reset timeout during bootup The sequence of _ocp_softreset doesn't work for i2c. The i2c module has a special sequence to reset the module. The sequence is - Disable the I2C. - Write to SOFTRESET bit. - Enable the I2C. - Poll on the RESETDONE bit. The sequence is implemented as a function and the i2c_class is updated with the correct 'reset' pointer. omap_hwmod_softreset function is implemented which triggers the softreset by writing into sysconfig register. On following this sequence, i2c module resets properly and timeouts are not seen. Cc: Rajendra Nayak Cc: Paul Walmsley Cc: Benoit Cousson Cc: Kevin Hilman Signed-off-by: Avinash.H.M [paul@pwsan.com: combined this patch with a patch to remove HWMOD_INIT_NO_RESET from the 44xx hwmod flags; change register offset conditional code to use the IP block revision; minor code cleanup] Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/i2c.c | 68 ++++++++++++++++++++++++++++ arch/arm/mach-omap2/omap_hwmod.c | 27 +++++++++++ arch/arm/mach-omap2/omap_hwmod_2420_data.c | 1 + arch/arm/mach-omap2/omap_hwmod_2430_data.c | 1 + arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 7 +-- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 10 ++-- arch/arm/plat-omap/include/plat/i2c.h | 3 ++ arch/arm/plat-omap/include/plat/omap_hwmod.h | 1 + 8 files changed, 111 insertions(+), 7 deletions(-) (limited to 'arch/arm/mach-omap2/omap_hwmod.c') diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c index 79c478c4cb1..ace99944e96 100644 --- a/arch/arm/mach-omap2/i2c.c +++ b/arch/arm/mach-omap2/i2c.c @@ -21,9 +21,19 @@ #include #include +#include +#include #include "mux.h" +/* In register I2C_CON, Bit 15 is the I2C enable bit */ +#define I2C_EN BIT(15) +#define OMAP2_I2C_CON_OFFSET 0x24 +#define OMAP4_I2C_CON_OFFSET 0xA4 + +/* Maximum microseconds to wait for OMAP module to softreset */ +#define MAX_MODULE_SOFTRESET_WAIT 10000 + void __init omap2_i2c_mux_pins(int bus_id) { char mux_name[sizeof("i2c2_scl.i2c2_scl")]; @@ -37,3 +47,61 @@ void __init omap2_i2c_mux_pins(int bus_id) sprintf(mux_name, "i2c%i_sda.i2c%i_sda", bus_id, bus_id); omap_mux_init_signal(mux_name, OMAP_PIN_INPUT); } + +/** + * omap_i2c_reset - reset the omap i2c module. + * @oh: struct omap_hwmod * + * + * The i2c moudle in omap2, omap3 had a special sequence to reset. The + * sequence is: + * - Disable the I2C. + * - Write to SOFTRESET bit. + * - Enable the I2C. + * - Poll on the RESETDONE bit. + * The sequence is implemented in below function. This is called for 2420, + * 2430 and omap3. + */ +int omap_i2c_reset(struct omap_hwmod *oh) +{ + u32 v; + u16 i2c_con; + int c = 0; + + if (oh->class->rev == OMAP_I2C_IP_VERSION_2) { + i2c_con = OMAP4_I2C_CON_OFFSET; + } else if (oh->class->rev == OMAP_I2C_IP_VERSION_1) { + i2c_con = OMAP2_I2C_CON_OFFSET; + } else { + WARN(1, "Cannot reset I2C block %s: unsupported revision\n", + oh->name); + return -EINVAL; + } + + /* Disable I2C */ + v = omap_hwmod_read(oh, i2c_con); + v &= ~I2C_EN; + omap_hwmod_write(v, oh, i2c_con); + + /* Write to the SOFTRESET bit */ + omap_hwmod_softreset(oh); + + /* Enable I2C */ + v = omap_hwmod_read(oh, i2c_con); + v |= I2C_EN; + omap_hwmod_write(v, oh, i2c_con); + + /* Poll on RESETDONE bit */ + omap_test_timeout((omap_hwmod_read(oh, + oh->class->sysc->syss_offs) + & SYSS_RESETDONE_MASK), + MAX_MODULE_SOFTRESET_WAIT, c); + + if (c == MAX_MODULE_SOFTRESET_WAIT) + pr_warning("%s: %s: softreset failed (waited %d usec)\n", + __func__, oh->name, MAX_MODULE_SOFTRESET_WAIT); + else + pr_debug("%s: %s: softreset in %d usec\n", __func__, + oh->name, c); + + return 0; +} diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 7d242c9e2a2..02b6016393a 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1655,6 +1655,33 @@ void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs) __raw_writel(v, oh->_mpu_rt_va + reg_offs); } +/** + * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit + * @oh: struct omap_hwmod * + * + * This is a public function exposed to drivers. Some drivers may need to do + * some settings before and after resetting the device. Those drivers after + * doing the necessary settings could use this function to start a reset by + * setting the SYSCONFIG.SOFTRESET bit. + */ +int omap_hwmod_softreset(struct omap_hwmod *oh) +{ + u32 v; + int ret; + + if (!oh || !(oh->_sysc_cache)) + return -EINVAL; + + v = oh->_sysc_cache; + ret = _set_softreset(oh, &v); + if (ret) + goto error; + _write_sysconfig(v, oh); + +error: + return ret; +} + /** * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode * @oh: struct omap_hwmod * diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 7af251448a7..a015c69068f 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -1030,6 +1030,7 @@ static struct omap_hwmod_class i2c_class = { .name = "i2c", .sysc = &i2c_sysc, .rev = OMAP_I2C_IP_VERSION_1, + .reset = &omap_i2c_reset, }; static struct omap_i2c_dev_attr i2c_dev_attr = { diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 405688ae265..16743c7d6e8 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -1079,6 +1079,7 @@ static struct omap_hwmod_class i2c_class = { .name = "i2c", .sysc = &i2c_sysc, .rev = OMAP_I2C_IP_VERSION_1, + .reset = &omap_i2c_reset, }; static struct omap_i2c_dev_attr i2c_dev_attr = { diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index c704ac8ca6b..25bf43b5a4e 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -1306,9 +1306,10 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = { }; static struct omap_hwmod_class i2c_class = { - .name = "i2c", - .sysc = &i2c_sysc, - .rev = OMAP_I2C_IP_VERSION_1, + .name = "i2c", + .sysc = &i2c_sysc, + .rev = OMAP_I2C_IP_VERSION_1, + .reset = &omap_i2c_reset, }; static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = { diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 55331df4e45..5d5df49749d 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -22,6 +22,7 @@ #include #include +#include #include #include #include @@ -2162,6 +2163,7 @@ static struct omap_hwmod_class omap44xx_i2c_hwmod_class = { .name = "i2c", .sysc = &omap44xx_i2c_sysc, .rev = OMAP_I2C_IP_VERSION_2, + .reset = &omap_i2c_reset, }; static struct omap_i2c_dev_attr i2c_dev_attr = { @@ -2207,7 +2209,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c1_slaves[] = { static struct omap_hwmod omap44xx_i2c1_hwmod = { .name = "i2c1", .class = &omap44xx_i2c_hwmod_class, - .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, + .flags = HWMOD_16BIT_REG, .mpu_irqs = omap44xx_i2c1_irqs, .sdma_reqs = omap44xx_i2c1_sdma_reqs, .main_clk = "i2c1_fck", @@ -2261,7 +2263,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c2_slaves[] = { static struct omap_hwmod omap44xx_i2c2_hwmod = { .name = "i2c2", .class = &omap44xx_i2c_hwmod_class, - .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, + .flags = HWMOD_16BIT_REG, .mpu_irqs = omap44xx_i2c2_irqs, .sdma_reqs = omap44xx_i2c2_sdma_reqs, .main_clk = "i2c2_fck", @@ -2315,7 +2317,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c3_slaves[] = { static struct omap_hwmod omap44xx_i2c3_hwmod = { .name = "i2c3", .class = &omap44xx_i2c_hwmod_class, - .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, + .flags = HWMOD_16BIT_REG, .mpu_irqs = omap44xx_i2c3_irqs, .sdma_reqs = omap44xx_i2c3_sdma_reqs, .main_clk = "i2c3_fck", @@ -2369,7 +2371,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c4_slaves[] = { static struct omap_hwmod omap44xx_i2c4_hwmod = { .name = "i2c4", .class = &omap44xx_i2c_hwmod_class, - .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, + .flags = HWMOD_16BIT_REG, .mpu_irqs = omap44xx_i2c4_irqs, .sdma_reqs = omap44xx_i2c4_sdma_reqs, .main_clk = "i2c4_fck", diff --git a/arch/arm/plat-omap/include/plat/i2c.h b/arch/arm/plat-omap/include/plat/i2c.h index fd75dadfa89..7c22b9e10dc 100644 --- a/arch/arm/plat-omap/include/plat/i2c.h +++ b/arch/arm/plat-omap/include/plat/i2c.h @@ -53,4 +53,7 @@ struct omap_i2c_dev_attr { void __init omap1_i2c_mux_pins(int bus_id); void __init omap2_i2c_mux_pins(int bus_id); +struct omap_hwmod; +int omap_i2c_reset(struct omap_hwmod *oh); + #endif /* __ASM__ARCH_OMAP_I2C_H */ diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index ce06ac6a970..fafdfe3c8d4 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -566,6 +566,7 @@ void omap_hwmod_ocp_barrier(struct omap_hwmod *oh); void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs); u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs); +int omap_hwmod_softreset(struct omap_hwmod *oh); int omap_hwmod_count_resources(struct omap_hwmod *oh); int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res); -- cgit v1.2.3-70-g09d2 From 6ae769973adf1325115d0dfe3fec17e26cbacd81 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sun, 10 Jul 2011 05:56:30 -0600 Subject: OMAP2+: hwmod: Init clkdm field at boot time At boot time, lookup the clkdm_name to get the clkdm structure pointer for further usage. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Rajendra Nayak Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod.c | 34 +++++++++++++++++++++++++++- arch/arm/plat-omap/include/plat/omap_hwmod.h | 1 + 2 files changed, 34 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2/omap_hwmod.c') diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 02b6016393a..1f6f47f1d82 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -990,9 +990,40 @@ static struct omap_hwmod *_lookup(const char *name) return oh; } +/** + * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod + * @oh: struct omap_hwmod * + * + * Convert a clockdomain name stored in a struct omap_hwmod into a + * clockdomain pointer, and save it into the struct omap_hwmod. + * return -EINVAL if clkdm_name does not exist or if the lookup failed. + */ +static int _init_clkdm(struct omap_hwmod *oh) +{ + if (cpu_is_omap24xx() || cpu_is_omap34xx()) + return 0; + + if (!oh->clkdm_name) { + pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name); + return -EINVAL; + } + + oh->clkdm = clkdm_lookup(oh->clkdm_name); + if (!oh->clkdm) { + pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n", + oh->name, oh->clkdm_name); + return -EINVAL; + } + + pr_debug("omap_hwmod: %s: associated to clkdm %s\n", + oh->name, oh->clkdm_name); + + return 0; +} /** - * _init_clocks - clk_get() all clocks associated with this hwmod + * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as + * well the clockdomain. * @oh: struct omap_hwmod * * @data: not used; pass NULL * @@ -1012,6 +1043,7 @@ static int _init_clocks(struct omap_hwmod *oh, void *data) ret |= _init_main_clk(oh); ret |= _init_interface_clks(oh); ret |= _init_opt_clks(oh); + ret |= _init_clkdm(oh); if (!ret) oh->_state = _HWMOD_STATE_CLKS_INITED; diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 21d392233ed..3306bdfb79a 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -516,6 +516,7 @@ struct omap_hwmod { struct clk *_clk; struct omap_hwmod_opt_clk *opt_clks; char *clkdm_name; + struct clockdomain *clkdm; char *vdd_name; struct voltagedomain *voltdm; struct omap_hwmod_ocp_if **masters; /* connect to *_IA */ -- cgit v1.2.3-70-g09d2 From d0f0631ddc61026dca71b5b679803000d70fde50 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sun, 10 Jul 2011 05:56:30 -0600 Subject: OMAP4: hwmod: Replace CLKCTRL absolute address with offset macros The CLKCTRL register was accessed using an absolute address. The usage of hardcoded macros to calculate virtual address from physical one should be avoided as much as possible. The usage of a offset will allow future improvement like migration from the current architecture code toward a module driver. Update cm_xxx accessor, move definition to the proper header file and update copyrights. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Rajendra Nayak Cc: Todd Poynor [paul@pwsan.com: renamed 'omap4_cm_' fns to 'omap4_cminst_'; removed empty fn prototype section from cm44xx.h; incorporated comments from Todd; documented some functions] Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/cm44xx.h | 8 +- arch/arm/mach-omap2/cminst44xx.c | 87 ++++++++++--- arch/arm/mach-omap2/cminst44xx.h | 4 +- arch/arm/mach-omap2/omap_hwmod.c | 12 +- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 182 +++++++++++++++++---------- arch/arm/plat-omap/include/plat/omap_hwmod.h | 2 +- 6 files changed, 198 insertions(+), 97 deletions(-) (limited to 'arch/arm/mach-omap2/omap_hwmod.c') diff --git a/arch/arm/mach-omap2/cm44xx.h b/arch/arm/mach-omap2/cm44xx.h index 0b87ec82b41..3380beeace6 100644 --- a/arch/arm/mach-omap2/cm44xx.h +++ b/arch/arm/mach-omap2/cm44xx.h @@ -1,7 +1,7 @@ /* * OMAP4 Clock Management (CM) definitions * - * Copyright (C) 2007-2009 Texas Instruments, Inc. + * Copyright (C) 2007-2011 Texas Instruments, Inc. * Copyright (C) 2007-2009 Nokia Corporation * * Written by Paul Walmsley @@ -23,10 +23,4 @@ #define OMAP4_CM_CLKSTCTRL 0x0000 #define OMAP4_CM_STATICDEP 0x0004 -/* Function prototypes */ -# ifndef __ASSEMBLER__ - -extern int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg); - -# endif #endif diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c index a482bfa0a95..9033dd4937c 100644 --- a/arch/arm/mach-omap2/cminst44xx.c +++ b/arch/arm/mach-omap2/cminst44xx.c @@ -2,6 +2,7 @@ * OMAP4 CM instance functions * * Copyright (C) 2009 Nokia Corporation + * Copyright (C) 2011 Texas Instruments, Inc. * Paul Walmsley * * This program is free software; you can redistribute it and/or modify @@ -32,6 +33,22 @@ #include "prm44xx.h" #include "prcm_mpu44xx.h" +/* + * CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield: + * + * 0x0 func: Module is fully functional, including OCP + * 0x1 trans: Module is performing transition: wakeup, or sleep, or sleep + * abortion + * 0x2 idle: Module is in Idle mode (only OCP part). It is functional if + * using separate functional clock + * 0x3 disabled: Module is disabled and cannot be accessed + * + */ +#define CLKCTRL_IDLEST_FUNCTIONAL 0x0 +#define CLKCTRL_IDLEST_INTRANSITION 0x1 +#define CLKCTRL_IDLEST_INTERFACE_IDLE 0x2 +#define CLKCTRL_IDLEST_DISABLED 0x3 + static u32 _cm_bases[OMAP4_MAX_PRCM_PARTITIONS] = { [OMAP4430_INVALID_PRCM_PARTITION] = 0, [OMAP4430_PRM_PARTITION] = OMAP4430_PRM_BASE, @@ -41,6 +58,48 @@ static u32 _cm_bases[OMAP4_MAX_PRCM_PARTITIONS] = { [OMAP4430_PRCM_MPU_PARTITION] = OMAP4430_PRCM_MPU_BASE, }; +/* Private functions */ + +/** + * _clkctrl_idlest - read a CM_*_CLKCTRL register; mask & shift IDLEST bitfield + * @part: PRCM partition ID that the CM_CLKCTRL register exists in + * @inst: CM instance register offset (*_INST macro) + * @cdoffs: Clockdomain register offset (*_CDOFFS macro) + * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) + * + * Return the IDLEST bitfield of a CM_*_CLKCTRL register, shifted down to + * bit 0. + */ +static u32 _clkctrl_idlest(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs) +{ + u32 v = omap4_cminst_read_inst_reg(part, inst, clkctrl_offs); + v &= OMAP4430_IDLEST_MASK; + v >>= OMAP4430_IDLEST_SHIFT; + return v; +} + +/** + * _is_module_ready - can module registers be accessed without causing an abort? + * @part: PRCM partition ID that the CM_CLKCTRL register exists in + * @inst: CM instance register offset (*_INST macro) + * @cdoffs: Clockdomain register offset (*_CDOFFS macro) + * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) + * + * Returns true if the module's CM_*_CLKCTRL.IDLEST bitfield is either + * *FUNCTIONAL or *INTERFACE_IDLE; false otherwise. + */ +static bool _is_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs) +{ + u32 v; + + v = _clkctrl_idlest(part, inst, cdoffs, clkctrl_offs); + + return (v == CLKCTRL_IDLEST_FUNCTIONAL || + v == CLKCTRL_IDLEST_INTERFACE_IDLE) ? true : false; +} + +/* Public functions */ + /* Read a register in a CM instance */ u32 omap4_cminst_read_inst_reg(u8 part, s16 inst, u16 idx) { @@ -200,35 +259,27 @@ void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs) */ /** - * omap4_cm_wait_module_ready - wait for a module to be in 'func' state - * @clkctrl_reg: CLKCTRL module address + * omap4_cminst_wait_module_ready - wait for a module to be in 'func' state + * @part: PRCM partition ID that the CM_CLKCTRL register exists in + * @inst: CM instance register offset (*_INST macro) + * @cdoffs: Clockdomain register offset (*_CDOFFS macro) + * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) * * Wait for the module IDLEST to be functional. If the idle state is in any * the non functional state (trans, idle or disabled), module and thus the * sysconfig cannot be accessed and will probably lead to an "imprecise * external abort" - * - * Module idle state: - * 0x0 func: Module is fully functional, including OCP - * 0x1 trans: Module is performing transition: wakeup, or sleep, or sleep - * abortion - * 0x2 idle: Module is in Idle mode (only OCP part). It is functional if - * using separate functional clock - * 0x3 disabled: Module is disabled and cannot be accessed - * */ -int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg) +int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, + u16 clkctrl_offs) { int i = 0; - if (!clkctrl_reg) + if (!clkctrl_offs) return 0; - omap_test_timeout(( - ((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) == 0) || - (((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) >> - OMAP4430_IDLEST_SHIFT) == 0x2)), - MAX_MODULE_READY_TIME, i); + omap_test_timeout(_is_module_ready(part, inst, cdoffs, clkctrl_offs), + MAX_MODULE_READY_TIME, i); return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; } diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h index 2b32c181a2e..8eba2ae87ad 100644 --- a/arch/arm/mach-omap2/cminst44xx.h +++ b/arch/arm/mach-omap2/cminst44xx.h @@ -17,6 +17,8 @@ extern void omap4_cminst_clkdm_disable_hwsup(u8 part, s16 inst, u16 cdoffs); extern void omap4_cminst_clkdm_force_sleep(u8 part, s16 inst, u16 cdoffs); extern void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs); +extern int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs); + /* * In an ideal world, we would not export these low-level functions, * but this will probably take some time to fix properly @@ -32,6 +34,4 @@ extern u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, s16 inst, extern u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx, u32 mask); -extern int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg); - #endif diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 1f6f47f1d82..00241ea5bf0 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -146,7 +146,7 @@ #include #include "cm2xxx_3xxx.h" -#include "cm44xx.h" +#include "cminst44xx.h" #include "prm2xxx_3xxx.h" #include "prm44xx.h" #include "mux.h" @@ -1060,7 +1060,7 @@ static int _init_clocks(struct omap_hwmod *oh, void *data) * Wait for a module @oh to leave slave idle. Returns 0 if the module * does not have an IDLEST bit or if the module successfully leaves * slave idle; otherwise, pass along the return value of the - * appropriate *_cm_wait_module_ready() function. + * appropriate *_cm*_wait_module_ready() function. */ static int _wait_target_ready(struct omap_hwmod *oh) { @@ -1087,7 +1087,13 @@ static int _wait_target_ready(struct omap_hwmod *oh) oh->prcm.omap2.idlest_reg_id, oh->prcm.omap2.idlest_idle_bit); } else if (cpu_is_omap44xx()) { - ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg); + if (!oh->clkdm) + return -EINVAL; + + ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition, + oh->clkdm->cm_inst, + oh->clkdm->clkdm_offs, + oh->prcm.omap4.clkctrl_offs); } else { BUG(); }; diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index becae45db6d..00d7130dd6c 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -124,6 +124,11 @@ static struct omap_hwmod omap44xx_dmm_hwmod = { .name = "dmm", .class = &omap44xx_dmm_hwmod_class, .clkdm_name = "l3_emif_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = OMAP4_CM_MEMIF_DMM_CLKCTRL_OFFSET, + }, + }, .slaves = omap44xx_dmm_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves), .mpu_irqs = omap44xx_dmm_irqs, @@ -175,6 +180,11 @@ static struct omap_hwmod omap44xx_emif_fw_hwmod = { .name = "emif_fw", .class = &omap44xx_emif_fw_hwmod_class, .clkdm_name = "l3_emif_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = OMAP4_CM_MEMIF_EMIF_FW_CLKCTRL_OFFSET, + }, + }, .slaves = omap44xx_emif_fw_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_emif_fw_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -215,6 +225,11 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = { .name = "l3_instr", .class = &omap44xx_l3_hwmod_class, .clkdm_name = "l3_instr_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = OMAP4_CM_L3INSTR_L3_INSTR_CLKCTRL_OFFSET, + }, + }, .slaves = omap44xx_l3_instr_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l3_instr_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -309,6 +324,11 @@ static struct omap_hwmod omap44xx_l3_main_1_hwmod = { .class = &omap44xx_l3_hwmod_class, .clkdm_name = "l3_1_clkdm", .mpu_irqs = omap44xx_l3_main_1_irqs, + .prcm = { + .omap4 = { + .clkctrl_offs = OMAP4_CM_L3_1_L3_1_CLKCTRL_OFFSET, + }, + }, .slaves = omap44xx_l3_main_1_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -405,6 +425,11 @@ static struct omap_hwmod omap44xx_l3_main_2_hwmod = { .name = "l3_main_2", .class = &omap44xx_l3_hwmod_class, .clkdm_name = "l3_2_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = OMAP4_CM_L3_2_L3_2_CLKCTRL_OFFSET, + }, + }, .slaves = omap44xx_l3_main_2_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_2_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -456,6 +481,11 @@ static struct omap_hwmod omap44xx_l3_main_3_hwmod = { .name = "l3_main_3", .class = &omap44xx_l3_hwmod_class, .clkdm_name = "l3_instr_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = OMAP4_CM_L3INSTR_L3_3_CLKCTRL_OFFSET, + }, + }, .slaves = omap44xx_l3_main_3_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_3_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -514,6 +544,11 @@ static struct omap_hwmod omap44xx_l4_abe_hwmod = { .name = "l4_abe", .class = &omap44xx_l4_hwmod_class, .clkdm_name = "abe_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = OMAP4_CM1_ABE_L4ABE_CLKCTRL_OFFSET, + }, + }, .slaves = omap44xx_l4_abe_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l4_abe_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -537,6 +572,11 @@ static struct omap_hwmod omap44xx_l4_cfg_hwmod = { .name = "l4_cfg", .class = &omap44xx_l4_hwmod_class, .clkdm_name = "l4_cfg_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = OMAP4_CM_L4CFG_L4_CFG_CLKCTRL_OFFSET, + }, + }, .slaves = omap44xx_l4_cfg_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l4_cfg_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -560,6 +600,11 @@ static struct omap_hwmod omap44xx_l4_per_hwmod = { .name = "l4_per", .class = &omap44xx_l4_hwmod_class, .clkdm_name = "l4_per_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = OMAP4_CM_L4PER_L4PER_CLKCTRL_OFFSET, + }, + }, .slaves = omap44xx_l4_per_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l4_per_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -583,6 +628,11 @@ static struct omap_hwmod omap44xx_l4_wkup_hwmod = { .name = "l4_wkup", .class = &omap44xx_l4_hwmod_class, .clkdm_name = "l4_wkup_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = OMAP4_CM_WKUP_L4WKUP_CLKCTRL_OFFSET, + }, + }, .slaves = omap44xx_l4_wkup_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l4_wkup_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -758,7 +808,7 @@ static struct omap_hwmod omap44xx_aess_hwmod = { .main_clk = "aess_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM1_ABE_AESS_CLKCTRL, + .clkctrl_offs = OMAP4_CM1_ABE_AESS_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_aess_slaves, @@ -788,7 +838,7 @@ static struct omap_hwmod omap44xx_bandgap_hwmod = { .clkdm_name = "l4_wkup_clkdm", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_WKUP_BANDGAP_CLKCTRL, + .clkctrl_offs = OMAP4_CM_WKUP_BANDGAP_CLKCTRL_OFFSET, }, }, .opt_clks = bandgap_opt_clks, @@ -848,7 +898,7 @@ static struct omap_hwmod omap44xx_counter_32k_hwmod = { .main_clk = "sys_32k_ck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_WKUP_SYNCTIMER_CLKCTRL, + .clkctrl_offs = OMAP4_CM_WKUP_SYNCTIMER_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_counter_32k_slaves, @@ -932,7 +982,7 @@ static struct omap_hwmod omap44xx_dma_system_hwmod = { .main_clk = "l3_div_ck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_SDMA_SDMA_CLKCTRL, + .clkctrl_offs = OMAP4_CM_SDMA_SDMA_CLKCTRL_OFFSET, }, }, .dev_attr = &dma_dev_attr, @@ -1026,7 +1076,7 @@ static struct omap_hwmod omap44xx_dmic_hwmod = { .main_clk = "dmic_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM1_ABE_DMIC_CLKCTRL, + .clkctrl_offs = OMAP4_CM1_ABE_DMIC_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_dmic_slaves, @@ -1110,7 +1160,7 @@ static struct omap_hwmod omap44xx_dsp_hwmod = { .main_clk = "dsp_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_TESLA_TESLA_CLKCTRL, + .clkctrl_offs = OMAP4_CM_TESLA_TESLA_CLKCTRL_OFFSET, .rstctrl_reg = OMAP4430_RM_TESLA_RSTCTRL, }, }, @@ -1199,7 +1249,7 @@ static struct omap_hwmod omap44xx_dss_hwmod = { .main_clk = "dss_dss_clk", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, + .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, }, }, .opt_clks = dss_opt_clks, @@ -1303,7 +1353,7 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = { .main_clk = "dss_dss_clk", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, + .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, }, }, .opt_clks = dss_dispc_opt_clks, @@ -1401,7 +1451,7 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { .main_clk = "dss_dss_clk", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, + .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, }, }, .opt_clks = dss_dsi1_opt_clks, @@ -1478,7 +1528,7 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { .main_clk = "dss_dss_clk", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, + .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, }, }, .opt_clks = dss_dsi2_opt_clks, @@ -1575,7 +1625,7 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { .main_clk = "dss_dss_clk", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, + .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, }, }, .opt_clks = dss_hdmi_opt_clks, @@ -1666,7 +1716,7 @@ static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { .main_clk = "dss_dss_clk", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, + .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, }, }, .opt_clks = dss_rfbi_opt_clks, @@ -1736,7 +1786,7 @@ static struct omap_hwmod omap44xx_dss_venc_hwmod = { .main_clk = "dss_dss_clk", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, + .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_dss_venc_slaves, @@ -1815,7 +1865,7 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = { .main_clk = "gpio1_ick", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_WKUP_GPIO1_CLKCTRL, + .clkctrl_offs = OMAP4_CM_WKUP_GPIO1_CLKCTRL_OFFSET, }, }, .opt_clks = gpio1_opt_clks, @@ -1869,7 +1919,7 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = { .main_clk = "gpio2_ick", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_GPIO2_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_GPIO2_CLKCTRL_OFFSET, }, }, .opt_clks = gpio2_opt_clks, @@ -1923,7 +1973,7 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = { .main_clk = "gpio3_ick", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_GPIO3_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_GPIO3_CLKCTRL_OFFSET, }, }, .opt_clks = gpio3_opt_clks, @@ -1977,7 +2027,7 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = { .main_clk = "gpio4_ick", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_GPIO4_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_GPIO4_CLKCTRL_OFFSET, }, }, .opt_clks = gpio4_opt_clks, @@ -2031,7 +2081,7 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = { .main_clk = "gpio5_ick", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_GPIO5_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_GPIO5_CLKCTRL_OFFSET, }, }, .opt_clks = gpio5_opt_clks, @@ -2085,7 +2135,7 @@ static struct omap_hwmod omap44xx_gpio6_hwmod = { .main_clk = "gpio6_ick", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_GPIO6_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_GPIO6_CLKCTRL_OFFSET, }, }, .opt_clks = gpio6_opt_clks, @@ -2164,7 +2214,7 @@ static struct omap_hwmod omap44xx_hsi_hwmod = { .main_clk = "hsi_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L3INIT_HSI_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L3INIT_HSI_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_hsi_slaves, @@ -2247,7 +2297,7 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = { .main_clk = "i2c1_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_I2C1_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_I2C1_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_i2c1_slaves, @@ -2302,7 +2352,7 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = { .main_clk = "i2c2_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_I2C2_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_I2C2_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_i2c2_slaves, @@ -2357,7 +2407,7 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = { .main_clk = "i2c3_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_I2C3_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_I2C3_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_i2c3_slaves, @@ -2412,7 +2462,7 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = { .main_clk = "i2c4_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_I2C4_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_I2C4_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_i2c4_slaves, @@ -2508,7 +2558,7 @@ static struct omap_hwmod omap44xx_ipu_hwmod = { .main_clk = "ipu_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_DUCATI_DUCATI_CLKCTRL, + .clkctrl_offs = OMAP4_CM_DUCATI_DUCATI_CLKCTRL_OFFSET, .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, }, }, @@ -2595,7 +2645,7 @@ static struct omap_hwmod omap44xx_iss_hwmod = { .main_clk = "iss_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_CAM_ISS_CLKCTRL, + .clkctrl_offs = OMAP4_CM_CAM_ISS_CLKCTRL_OFFSET, }, }, .opt_clks = iss_opt_clks, @@ -2708,7 +2758,7 @@ static struct omap_hwmod omap44xx_iva_hwmod = { .main_clk = "iva_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, + .clkctrl_offs = OMAP4_CM_IVAHD_IVAHD_CLKCTRL_OFFSET, .rstctrl_reg = OMAP4430_RM_IVAHD_RSTCTRL, }, }, @@ -2779,7 +2829,7 @@ static struct omap_hwmod omap44xx_kbd_hwmod = { .main_clk = "kbd_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_WKUP_KEYBOARD_CLKCTRL, + .clkctrl_offs = OMAP4_CM_WKUP_KEYBOARD_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_kbd_slaves, @@ -2844,7 +2894,7 @@ static struct omap_hwmod omap44xx_mailbox_hwmod = { .mpu_irqs = omap44xx_mailbox_irqs, .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4CFG_MAILBOX_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_mailbox_slaves, @@ -2937,7 +2987,7 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = { .main_clk = "mcbsp1_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM1_ABE_MCBSP1_CLKCTRL, + .clkctrl_offs = OMAP4_CM1_ABE_MCBSP1_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_mcbsp1_slaves, @@ -3011,7 +3061,7 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = { .main_clk = "mcbsp2_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM1_ABE_MCBSP2_CLKCTRL, + .clkctrl_offs = OMAP4_CM1_ABE_MCBSP2_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_mcbsp2_slaves, @@ -3085,7 +3135,7 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = { .main_clk = "mcbsp3_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM1_ABE_MCBSP3_CLKCTRL, + .clkctrl_offs = OMAP4_CM1_ABE_MCBSP3_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_mcbsp3_slaves, @@ -3138,7 +3188,7 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = { .main_clk = "mcbsp4_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_MCBSP4_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_MCBSP4_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_mcbsp4_slaves, @@ -3231,7 +3281,7 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = { .main_clk = "mcpdm_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM1_ABE_PDM_CLKCTRL, + .clkctrl_offs = OMAP4_CM1_ABE_PDM_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_mcpdm_slaves, @@ -3317,7 +3367,7 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = { .main_clk = "mcspi1_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_MCSPI1_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_MCSPI1_CLKCTRL_OFFSET, }, }, .dev_attr = &mcspi1_dev_attr, @@ -3378,7 +3428,7 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = { .main_clk = "mcspi2_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_MCSPI2_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_MCSPI2_CLKCTRL_OFFSET, }, }, .dev_attr = &mcspi2_dev_attr, @@ -3439,7 +3489,7 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = { .main_clk = "mcspi3_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_MCSPI3_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_MCSPI3_CLKCTRL_OFFSET, }, }, .dev_attr = &mcspi3_dev_attr, @@ -3498,7 +3548,7 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = { .main_clk = "mcspi4_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_MCSPI4_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_MCSPI4_CLKCTRL_OFFSET, }, }, .dev_attr = &mcspi4_dev_attr, @@ -3583,7 +3633,7 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = { .main_clk = "mmc1_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L3INIT_MMC1_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L3INIT_MMC1_CLKCTRL_OFFSET, }, }, .dev_attr = &mmc1_dev_attr, @@ -3643,7 +3693,7 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = { .main_clk = "mmc2_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L3INIT_MMC2_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L3INIT_MMC2_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_mmc2_slaves, @@ -3698,7 +3748,7 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = { .main_clk = "mmc3_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD3_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_MMCSD3_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_mmc3_slaves, @@ -3752,7 +3802,7 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = { .main_clk = "mmc4_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD4_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_MMCSD4_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_mmc4_slaves, @@ -3805,7 +3855,7 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = { .main_clk = "mmc5_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD5_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_MMCSD5_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_mmc5_slaves, @@ -3846,7 +3896,7 @@ static struct omap_hwmod omap44xx_mpu_hwmod = { .main_clk = "dpll_mpu_m2_ck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_MPU_MPU_CLKCTRL, + .clkctrl_offs = OMAP4_CM_MPU_MPU_CLKCTRL_OFFSET, }, }, .masters = omap44xx_mpu_masters, @@ -3920,7 +3970,7 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = { .vdd_name = "core", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_ALWON_SR_CORE_CLKCTRL, + .clkctrl_offs = OMAP4_CM_ALWON_SR_CORE_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_smartreflex_core_slaves, @@ -3967,7 +4017,7 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = { .vdd_name = "iva", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_ALWON_SR_IVA_CLKCTRL, + .clkctrl_offs = OMAP4_CM_ALWON_SR_IVA_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_smartreflex_iva_slaves, @@ -4014,7 +4064,7 @@ static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = { .vdd_name = "mpu", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_ALWON_SR_MPU_CLKCTRL, + .clkctrl_offs = OMAP4_CM_ALWON_SR_MPU_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_smartreflex_mpu_slaves, @@ -4076,7 +4126,7 @@ static struct omap_hwmod omap44xx_spinlock_hwmod = { .clkdm_name = "l4_cfg_clkdm", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4CFG_HW_SEM_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4CFG_HW_SEM_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_spinlock_slaves, @@ -4160,7 +4210,7 @@ static struct omap_hwmod omap44xx_timer1_hwmod = { .main_clk = "timer1_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_WKUP_TIMER1_CLKCTRL, + .clkctrl_offs = OMAP4_CM_WKUP_TIMER1_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_timer1_slaves, @@ -4206,7 +4256,7 @@ static struct omap_hwmod omap44xx_timer2_hwmod = { .main_clk = "timer2_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER2_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER2_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_timer2_slaves, @@ -4252,7 +4302,7 @@ static struct omap_hwmod omap44xx_timer3_hwmod = { .main_clk = "timer3_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER3_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER3_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_timer3_slaves, @@ -4298,7 +4348,7 @@ static struct omap_hwmod omap44xx_timer4_hwmod = { .main_clk = "timer4_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER4_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER4_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_timer4_slaves, @@ -4363,7 +4413,7 @@ static struct omap_hwmod omap44xx_timer5_hwmod = { .main_clk = "timer5_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM1_ABE_TIMER5_CLKCTRL, + .clkctrl_offs = OMAP4_CM1_ABE_TIMER5_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_timer5_slaves, @@ -4429,7 +4479,7 @@ static struct omap_hwmod omap44xx_timer6_hwmod = { .main_clk = "timer6_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM1_ABE_TIMER6_CLKCTRL, + .clkctrl_offs = OMAP4_CM1_ABE_TIMER6_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_timer6_slaves, @@ -4494,7 +4544,7 @@ static struct omap_hwmod omap44xx_timer7_hwmod = { .main_clk = "timer7_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM1_ABE_TIMER7_CLKCTRL, + .clkctrl_offs = OMAP4_CM1_ABE_TIMER7_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_timer7_slaves, @@ -4559,7 +4609,7 @@ static struct omap_hwmod omap44xx_timer8_hwmod = { .main_clk = "timer8_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM1_ABE_TIMER8_CLKCTRL, + .clkctrl_offs = OMAP4_CM1_ABE_TIMER8_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_timer8_slaves, @@ -4605,7 +4655,7 @@ static struct omap_hwmod omap44xx_timer9_hwmod = { .main_clk = "timer9_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER9_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER9_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_timer9_slaves, @@ -4651,7 +4701,7 @@ static struct omap_hwmod omap44xx_timer10_hwmod = { .main_clk = "timer10_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER10_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER10_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_timer10_slaves, @@ -4697,7 +4747,7 @@ static struct omap_hwmod omap44xx_timer11_hwmod = { .main_clk = "timer11_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER11_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER11_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_timer11_slaves, @@ -4772,7 +4822,7 @@ static struct omap_hwmod omap44xx_uart1_hwmod = { .main_clk = "uart1_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_UART1_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_UART1_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_uart1_slaves, @@ -4825,7 +4875,7 @@ static struct omap_hwmod omap44xx_uart2_hwmod = { .main_clk = "uart2_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_UART2_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_UART2_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_uart2_slaves, @@ -4879,7 +4929,7 @@ static struct omap_hwmod omap44xx_uart3_hwmod = { .main_clk = "uart3_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_UART3_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_UART3_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_uart3_slaves, @@ -4932,7 +4982,7 @@ static struct omap_hwmod omap44xx_uart4_hwmod = { .main_clk = "uart4_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L4PER_UART4_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L4PER_UART4_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_uart4_slaves, @@ -5011,7 +5061,7 @@ static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = { .main_clk = "usb_otg_hs_ick", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_L3INIT_USB_OTG_CLKCTRL, + .clkctrl_offs = OMAP4_CM_L3INIT_USB_OTG_CLKCTRL_OFFSET, }, }, .opt_clks = usb_otg_hs_opt_clks, @@ -5084,7 +5134,7 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = { .main_clk = "wd_timer2_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM_WKUP_WDT2_CLKCTRL, + .clkctrl_offs = OMAP4_CM_WKUP_WDT2_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_wd_timer2_slaves, @@ -5149,7 +5199,7 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = { .main_clk = "wd_timer3_fck", .prcm = { .omap4 = { - .clkctrl_reg = OMAP4430_CM1_ABE_WDT3_CLKCTRL, + .clkctrl_offs = OMAP4_CM1_ABE_WDT3_CLKCTRL_OFFSET, }, }, .slaves = omap44xx_wd_timer3_slaves, diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 3306bdfb79a..fc54355de72 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -360,7 +360,7 @@ struct omap_hwmod_omap2_prcm { * @submodule_wkdep_bit: bit shift of the WKDEP range */ struct omap_hwmod_omap4_prcm { - void __iomem *clkctrl_reg; + u16 clkctrl_offs; void __iomem *rstctrl_reg; u8 submodule_wkdep_bit; }; -- cgit v1.2.3-70-g09d2 From 11b10341bd12c87a8409c69cdcd7ee898400842f Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sun, 10 Jul 2011 05:56:30 -0600 Subject: OMAP: hwmod: Wait the idle status to be disabled It is mandatory to wait for a module to be in disabled state before potentially disabling source clock or re-asserting a reset. omap_hwmod_idle and omap_hwmod_shutdown does not wait for the module to be fully idle. Add a cm_xxx accessor to wait the clkctrl idle status to be disabled. Fix hwmod_[idle|shutdown] to use this API. Based on Rajendra's initial patch. Please note that most interconnects hwmod will return one timeout because it is impossible for them to be in idle since the processor is accessing the registers though the interconnect. Signed-off-by: Benoit Cousson Signed-off-by: Rajendra Nayak Cc: Paul Walmsley Cc: Todd Poynor [paul@pwsan.com: move cpu_is_*() tests to the top of _wait_target_disable(); incorporate some feedback from Todd] Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/cminst44xx.c | 25 +++++++++++++++++++++++++ arch/arm/mach-omap2/cminst44xx.h | 1 + arch/arm/mach-omap2/omap_hwmod.c | 40 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 66 insertions(+) (limited to 'arch/arm/mach-omap2/omap_hwmod.c') diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c index 9033dd4937c..0fe3f147f26 100644 --- a/arch/arm/mach-omap2/cminst44xx.c +++ b/arch/arm/mach-omap2/cminst44xx.c @@ -284,3 +284,28 @@ int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; } +/** + * omap4_cminst_wait_module_idle - wait for a module to be in 'disabled' + * state + * @part: PRCM partition ID that the CM_CLKCTRL register exists in + * @inst: CM instance register offset (*_INST macro) + * @cdoffs: Clockdomain register offset (*_CDOFFS macro) + * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) + * + * Wait for the module IDLEST to be disabled. Some PRCM transition, + * like reset assertion or parent clock de-activation must wait the + * module to be fully disabled. + */ +int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs) +{ + int i = 0; + + if (!clkctrl_offs) + return 0; + + omap_test_timeout((_clkctrl_idlest(part, inst, cdoffs, clkctrl_offs) == + CLKCTRL_IDLEST_DISABLED), + MAX_MODULE_READY_TIME, i); + + return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; +} diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h index 8eba2ae87ad..a98540081f9 100644 --- a/arch/arm/mach-omap2/cminst44xx.h +++ b/arch/arm/mach-omap2/cminst44xx.h @@ -18,6 +18,7 @@ extern void omap4_cminst_clkdm_force_sleep(u8 part, s16 inst, u16 cdoffs); extern void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs); extern int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs); +extern int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs); /* * In an ideal world, we would not export these low-level functions, diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 00241ea5bf0..d21f49b8764 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1101,6 +1101,36 @@ static int _wait_target_ready(struct omap_hwmod *oh) return ret; } +/** + * _wait_target_disable - wait for a module to be disabled + * @oh: struct omap_hwmod * + * + * Wait for a module @oh to enter slave idle. Returns 0 if the module + * does not have an IDLEST bit or if the module successfully enters + * slave idle; otherwise, pass along the return value of the + * appropriate *_cm*_wait_module_idle() function. + */ +static int _wait_target_disable(struct omap_hwmod *oh) +{ + /* TODO: For now just handle OMAP4+ */ + if (cpu_is_omap24xx() || cpu_is_omap34xx()) + return 0; + + if (!oh) + return -EINVAL; + + if (oh->_int_flags & _HWMOD_NO_MPU_PORT) + return 0; + + if (oh->flags & HWMOD_NO_IDLEST) + return 0; + + return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition, + oh->clkdm->cm_inst, + oh->clkdm->clkdm_offs, + oh->prcm.omap4.clkctrl_offs); +} + /** * _lookup_hardreset - fill register bit info for this hwmod/reset line * @oh: struct omap_hwmod * @@ -1410,6 +1440,8 @@ static int _enable(struct omap_hwmod *oh) */ static int _idle(struct omap_hwmod *oh) { + int ret; + pr_debug("omap_hwmod: %s: idling\n", oh->name); if (oh->_state != _HWMOD_STATE_ENABLED) { @@ -1422,6 +1454,10 @@ static int _idle(struct omap_hwmod *oh) _idle_sysc(oh); _del_initiator_dep(oh, mpu_oh); _disable_clocks(oh); + ret = _wait_target_disable(oh); + if (ret) + pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", + oh->name); /* Mux pins for device idle if populated */ if (oh->mux && oh->mux->pads_dynamic) @@ -1514,6 +1550,10 @@ static int _shutdown(struct omap_hwmod *oh) _del_initiator_dep(oh, mpu_oh); /* XXX what about the other system initiators here? dma, dsp */ _disable_clocks(oh); + ret = _wait_target_disable(oh); + if (ret) + pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", + oh->name); } /* XXX Should this code also force-disable the optional clocks? */ -- cgit v1.2.3-70-g09d2 From eaac329dfa6d3a4025242bf34d33aa3cb9df9f9f Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sun, 10 Jul 2011 05:56:31 -0600 Subject: OMAP4: hwmod: Replace RSTCTRL absolute address with offset macros The RSTCTRL register was accessed using an absolute address. The usage of hardcoded macros to calculate virtual address from physical one should be avoided as much as possible. The usage of an offset will allow future improvement like migration from the current architecture code toward a module driver. Update prm_xxx accessors, move definition to the proper header file and update copyrights. Change the s16 register offset parameter to u16. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Rajendra Nayak [paul@pwsan.com: use '_prminst_' in function names that are part of the prminst44xx.c file] Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod.c | 19 ++++-- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 16 ++--- arch/arm/mach-omap2/prm44xx.c | 93 +--------------------------- arch/arm/mach-omap2/prm44xx.h | 4 -- arch/arm/mach-omap2/prminst44xx.c | 93 +++++++++++++++++++++++++++- arch/arm/mach-omap2/prminst44xx.h | 10 ++- arch/arm/plat-omap/include/plat/omap_hwmod.h | 3 +- 7 files changed, 125 insertions(+), 113 deletions(-) (limited to 'arch/arm/mach-omap2/omap_hwmod.c') diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index d21f49b8764..a0f7d313e69 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -149,6 +149,7 @@ #include "cminst44xx.h" #include "prm2xxx_3xxx.h" #include "prm44xx.h" +#include "prminst44xx.h" #include "mux.h" /* Maximum microseconds to wait for OMAP module to softreset */ @@ -1187,8 +1188,10 @@ static int _assert_hardreset(struct omap_hwmod *oh, const char *name) return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs, ohri.rst_shift); else if (cpu_is_omap44xx()) - return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg, - ohri.rst_shift); + return omap4_prminst_assert_hardreset(ohri.rst_shift, + oh->clkdm->pwrdm.ptr->prcm_partition, + oh->clkdm->pwrdm.ptr->prcm_offs, + oh->prcm.omap4.rstctrl_offs); else return -EINVAL; } @@ -1223,8 +1226,10 @@ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) if (ohri.st_shift) pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n", oh->name, name); - ret = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg, - ohri.rst_shift); + ret = omap4_prminst_deassert_hardreset(ohri.rst_shift, + oh->clkdm->pwrdm.ptr->prcm_partition, + oh->clkdm->pwrdm.ptr->prcm_offs, + oh->prcm.omap4.rstctrl_offs); } else { return -EINVAL; } @@ -1259,8 +1264,10 @@ static int _read_hardreset(struct omap_hwmod *oh, const char *name) return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs, ohri.st_shift); } else if (cpu_is_omap44xx()) { - return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg, - ohri.rst_shift); + return omap4_prminst_is_hardreset_asserted(ohri.rst_shift, + oh->clkdm->pwrdm.ptr->prcm_partition, + oh->clkdm->pwrdm.ptr->prcm_offs, + oh->prcm.omap4.rstctrl_offs); } else { return -EINVAL; } diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 00d7130dd6c..6a190f5de47 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -1144,7 +1144,7 @@ static struct omap_hwmod omap44xx_dsp_c0_hwmod = { .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_c0_resets), .prcm = { .omap4 = { - .rstctrl_reg = OMAP4430_RM_TESLA_RSTCTRL, + .rstctrl_offs = OMAP4_RM_TESLA_RSTCTRL_OFFSET, }, }, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -1161,7 +1161,7 @@ static struct omap_hwmod omap44xx_dsp_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_TESLA_TESLA_CLKCTRL_OFFSET, - .rstctrl_reg = OMAP4430_RM_TESLA_RSTCTRL, + .rstctrl_offs = OMAP4_RM_TESLA_RSTCTRL_OFFSET, }, }, .slaves = omap44xx_dsp_slaves, @@ -2526,7 +2526,7 @@ static struct omap_hwmod omap44xx_ipu_c0_hwmod = { .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c0_resets), .prcm = { .omap4 = { - .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, + .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET, }, }, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -2542,7 +2542,7 @@ static struct omap_hwmod omap44xx_ipu_c1_hwmod = { .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c1_resets), .prcm = { .omap4 = { - .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, + .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET, }, }, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -2559,7 +2559,7 @@ static struct omap_hwmod omap44xx_ipu_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_DUCATI_DUCATI_CLKCTRL_OFFSET, - .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, + .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET, }, }, .slaves = omap44xx_ipu_slaves, @@ -2726,7 +2726,7 @@ static struct omap_hwmod omap44xx_iva_seq0_hwmod = { .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_seq0_resets), .prcm = { .omap4 = { - .rstctrl_reg = OMAP4430_RM_IVAHD_RSTCTRL, + .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET, }, }, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -2742,7 +2742,7 @@ static struct omap_hwmod omap44xx_iva_seq1_hwmod = { .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_seq1_resets), .prcm = { .omap4 = { - .rstctrl_reg = OMAP4430_RM_IVAHD_RSTCTRL, + .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET, }, }, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), @@ -2759,7 +2759,7 @@ static struct omap_hwmod omap44xx_iva_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_IVAHD_IVAHD_CLKCTRL_OFFSET, - .rstctrl_reg = OMAP4430_RM_IVAHD_RSTCTRL, + .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET, }, }, .slaves = omap44xx_iva_slaves, diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index a2a04bfa962..faec860ebc0 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -1,7 +1,7 @@ /* * OMAP4 PRM module functions * - * Copyright (C) 2010 Texas Instruments, Inc. + * Copyright (C) 2011 Texas Instruments, Inc. * Copyright (C) 2010 Nokia Corporation * Benoît Cousson * Paul Walmsley @@ -24,12 +24,6 @@ #include "prm44xx.h" #include "prm-regbits-44xx.h" -/* - * Address offset (in bytes) between the reset control and the reset - * status registers: 4 bytes on OMAP4 - */ -#define OMAP4_RST_CTRL_ST_OFFSET 4 - /* PRM low-level functions */ /* Read a register in a CM/PRM instance in the PRM module */ @@ -94,91 +88,6 @@ u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 reg) return omap4_prm_rmw_inst_reg_bits(bits, 0x0, inst, reg); } -/** - * omap4_prm_is_hardreset_asserted - read the HW reset line state of - * submodules contained in the hwmod module - * @rstctrl_reg: RM_RSTCTRL register address for this module - * @shift: register bit shift corresponding to the reset line to check - * - * Returns 1 if the (sub)module hardreset line is currently asserted, - * 0 if the (sub)module hardreset line is not currently asserted, or - * -EINVAL upon parameter error. - */ -int omap4_prm_is_hardreset_asserted(void __iomem *rstctrl_reg, u8 shift) -{ - if (!cpu_is_omap44xx() || !rstctrl_reg) - return -EINVAL; - - return omap4_prm_read_bits_shift(rstctrl_reg, (1 << shift)); -} - -/** - * omap4_prm_assert_hardreset - assert the HW reset line of a submodule - * @rstctrl_reg: RM_RSTCTRL register address for this module - * @shift: register bit shift corresponding to the reset line to assert - * - * Some IPs like dsp, ipu or iva contain processors that require an HW - * reset line to be asserted / deasserted in order to fully enable the - * IP. These modules may have multiple hard-reset lines that reset - * different 'submodules' inside the IP block. This function will - * place the submodule into reset. Returns 0 upon success or -EINVAL - * upon an argument error. - */ -int omap4_prm_assert_hardreset(void __iomem *rstctrl_reg, u8 shift) -{ - u32 mask; - - if (!cpu_is_omap44xx() || !rstctrl_reg) - return -EINVAL; - - mask = 1 << shift; - omap4_prm_rmw_reg_bits(mask, mask, rstctrl_reg); - - return 0; -} - -/** - * omap4_prm_deassert_hardreset - deassert a submodule hardreset line and wait - * @rstctrl_reg: RM_RSTCTRL register address for this module - * @shift: register bit shift corresponding to the reset line to deassert - * - * Some IPs like dsp, ipu or iva contain processors that require an HW - * reset line to be asserted / deasserted in order to fully enable the - * IP. These modules may have multiple hard-reset lines that reset - * different 'submodules' inside the IP block. This function will - * take the submodule out of reset and wait until the PRCM indicates - * that the reset has completed before returning. Returns 0 upon success or - * -EINVAL upon an argument error, -EEXIST if the submodule was already out - * of reset, or -EBUSY if the submodule did not exit reset promptly. - */ -int omap4_prm_deassert_hardreset(void __iomem *rstctrl_reg, u8 shift) -{ - u32 mask; - void __iomem *rstst_reg; - int c; - - if (!cpu_is_omap44xx() || !rstctrl_reg) - return -EINVAL; - - rstst_reg = rstctrl_reg + OMAP4_RST_CTRL_ST_OFFSET; - - mask = 1 << shift; - - /* Check the current status to avoid de-asserting the line twice */ - if (omap4_prm_read_bits_shift(rstctrl_reg, mask) == 0) - return -EEXIST; - - /* Clear the reset status by writing 1 to the status bit */ - omap4_prm_rmw_reg_bits(0xffffffff, mask, rstst_reg); - /* de-assert the reset control line */ - omap4_prm_rmw_reg_bits(mask, 0, rstctrl_reg); - /* wait the status to be set */ - omap_test_timeout(omap4_prm_read_bits_shift(rstst_reg, mask), - MAX_MODULE_HARDRESET_WAIT, c); - - return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; -} - void omap4_prm_global_warm_sw_reset(void) { u32 v; diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h index 6e53120fd6c..3732e026a22 100644 --- a/arch/arm/mach-omap2/prm44xx.h +++ b/arch/arm/mach-omap2/prm44xx.h @@ -755,10 +755,6 @@ extern u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 inst, s16 idx); extern u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 idx); extern u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask); -extern int omap4_prm_is_hardreset_asserted(void __iomem *rstctrl_reg, u8 shift); -extern int omap4_prm_assert_hardreset(void __iomem *rstctrl_reg, u8 shift); -extern int omap4_prm_deassert_hardreset(void __iomem *rstctrl_reg, u8 shift); - extern void omap4_prm_global_warm_sw_reset(void); # endif diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-omap2/prminst44xx.c index a3032429727..35e02aac1de 100644 --- a/arch/arm/mach-omap2/prminst44xx.c +++ b/arch/arm/mach-omap2/prminst44xx.c @@ -2,6 +2,7 @@ * OMAP4 PRM instance functions * * Copyright (C) 2009 Nokia Corporation + * Copyright (C) 2011 Texas Instruments, Inc. * Paul Walmsley * * This program is free software; you can redistribute it and/or modify @@ -53,7 +54,7 @@ void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx) /* Read-modify-write a register in PRM. Caller must lock */ u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, s16 inst, - s16 idx) + u16 idx) { u32 v; @@ -64,3 +65,93 @@ u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, s16 inst, return v; } + +/* + * Address offset (in bytes) between the reset control and the reset + * status registers: 4 bytes on OMAP4 + */ +#define OMAP4_RST_CTRL_ST_OFFSET 4 + +/** + * omap4_prminst_is_hardreset_asserted - read the HW reset line state of + * submodules contained in the hwmod module + * @rstctrl_reg: RM_RSTCTRL register address for this module + * @shift: register bit shift corresponding to the reset line to check + * + * Returns 1 if the (sub)module hardreset line is currently asserted, + * 0 if the (sub)module hardreset line is not currently asserted, or + * -EINVAL upon parameter error. + */ +int omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst, + u16 rstctrl_offs) +{ + u32 v; + + v = omap4_prminst_read_inst_reg(part, inst, rstctrl_offs); + v &= 1 << shift; + v >>= shift; + + return v; +} + +/** + * omap4_prminst_assert_hardreset - assert the HW reset line of a submodule + * @rstctrl_reg: RM_RSTCTRL register address for this module + * @shift: register bit shift corresponding to the reset line to assert + * + * Some IPs like dsp, ipu or iva contain processors that require an HW + * reset line to be asserted / deasserted in order to fully enable the + * IP. These modules may have multiple hard-reset lines that reset + * different 'submodules' inside the IP block. This function will + * place the submodule into reset. Returns 0 upon success or -EINVAL + * upon an argument error. + */ +int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst, + u16 rstctrl_offs) +{ + u32 mask = 1 << shift; + + omap4_prminst_rmw_inst_reg_bits(mask, mask, part, inst, rstctrl_offs); + + return 0; +} + +/** + * omap4_prminst_deassert_hardreset - deassert a submodule hardreset line and + * wait + * @rstctrl_reg: RM_RSTCTRL register address for this module + * @shift: register bit shift corresponding to the reset line to deassert + * + * Some IPs like dsp, ipu or iva contain processors that require an HW + * reset line to be asserted / deasserted in order to fully enable the + * IP. These modules may have multiple hard-reset lines that reset + * different 'submodules' inside the IP block. This function will + * take the submodule out of reset and wait until the PRCM indicates + * that the reset has completed before returning. Returns 0 upon success or + * -EINVAL upon an argument error, -EEXIST if the submodule was already out + * of reset, or -EBUSY if the submodule did not exit reset promptly. + */ +int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst, + u16 rstctrl_offs) +{ + int c; + u32 mask = 1 << shift; + u16 rstst_offs = rstctrl_offs + OMAP4_RST_CTRL_ST_OFFSET; + + /* Check the current status to avoid de-asserting the line twice */ + if (omap4_prminst_is_hardreset_asserted(shift, part, inst, + rstctrl_offs) == 0) + return -EEXIST; + + /* Clear the reset status by writing 1 to the status bit */ + omap4_prminst_rmw_inst_reg_bits(0xffffffff, mask, part, inst, + rstst_offs); + /* de-assert the reset control line */ + omap4_prminst_rmw_inst_reg_bits(mask, 0, part, inst, rstctrl_offs); + /* wait the status to be set */ + omap_test_timeout(omap4_prminst_is_hardreset_asserted(shift, part, inst, + rstst_offs), + MAX_MODULE_HARDRESET_WAIT, c); + + return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; +} diff --git a/arch/arm/mach-omap2/prminst44xx.h b/arch/arm/mach-omap2/prminst44xx.h index 02dd66ddda8..c14ae294cd5 100644 --- a/arch/arm/mach-omap2/prminst44xx.h +++ b/arch/arm/mach-omap2/prminst44xx.h @@ -2,6 +2,7 @@ * OMAP4 Power/Reset Management (PRM) function prototypes * * Copyright (C) 2010 Nokia Corporation + * Copyright (C) 2011 Texas Instruments, Inc. * Paul Walmsley * * This program is free software; you can redistribute it and/or modify @@ -18,8 +19,15 @@ extern u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx); extern void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx); extern u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, - s16 inst, s16 idx); + s16 inst, u16 idx); extern void omap4_prm_global_warm_sw_reset(void); +extern int omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst, + u16 rstctrl_offs); +extern int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst, + u16 rstctrl_offs); +extern int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst, + u16 rstctrl_offs); + #endif diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index fc54355de72..9ef4424366d 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -2,6 +2,7 @@ * omap_hwmod macros, structures * * Copyright (C) 2009-2011 Nokia Corporation + * Copyright (C) 2011 Texas Instruments, Inc. * Paul Walmsley * * Created in collaboration with (alphabetical order): Benoît Cousson, @@ -361,7 +362,7 @@ struct omap_hwmod_omap2_prcm { */ struct omap_hwmod_omap4_prcm { u16 clkctrl_offs; - void __iomem *rstctrl_reg; + u16 rstctrl_offs; u8 submodule_wkdep_bit; }; -- cgit v1.2.3-70-g09d2 From 45c38252d76a96e6e0e05f982ca44096191a8eea Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Sun, 10 Jul 2011 05:56:33 -0600 Subject: OMAP4: hwmod: Introduce the module control in hwmod control Take advantage of the explicit modulemode control to fix the way parents clocks are managed. A module must be disabled before any parents are disabled. That programming model was not possible with the previous implementation that was considering a modulemode as a leaf clock node managed by the clock fmwk. This was leading to bad crash upon disable when the parent clock was gated before the module completed its transition to idle. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Cc: Rajendra Nayak Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod.c | 63 ++++++++++++++++++++++++++++++++++++++-- 1 file changed, 61 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-omap2/omap_hwmod.c') diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index a0f7d313e69..4424fee5cd5 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -679,6 +679,56 @@ static void _disable_optional_clocks(struct omap_hwmod *oh) } } +/** + * _enable_module - enable CLKCTRL modulemode on OMAP4 + * @oh: struct omap_hwmod * + * + * Enables the PRCM module mode related to the hwmod @oh. + * No return value. + */ +static void _enable_module(struct omap_hwmod *oh) +{ + /* The module mode does not exist prior OMAP4 */ + if (cpu_is_omap24xx() || cpu_is_omap34xx()) + return; + + if (!oh->clkdm || !oh->prcm.omap4.modulemode) + return; + + pr_debug("omap_hwmod: %s: _enable_module: %d\n", + oh->name, oh->prcm.omap4.modulemode); + + omap4_cminst_module_enable(oh->prcm.omap4.modulemode, + oh->clkdm->prcm_partition, + oh->clkdm->cm_inst, + oh->clkdm->clkdm_offs, + oh->prcm.omap4.clkctrl_offs); +} + +/** + * _disable_module - enable CLKCTRL modulemode on OMAP4 + * @oh: struct omap_hwmod * + * + * Disable the PRCM module mode related to the hwmod @oh. + * No return value. + */ +static void _disable_module(struct omap_hwmod *oh) +{ + /* The module mode does not exist prior OMAP4 */ + if (cpu_is_omap24xx() || cpu_is_omap34xx()) + return; + + if (!oh->clkdm || !oh->prcm.omap4.modulemode) + return; + + pr_debug("omap_hwmod: %s: _disable_module\n", oh->name); + + omap4_cminst_module_disable(oh->clkdm->prcm_partition, + oh->clkdm->cm_inst, + oh->clkdm->clkdm_offs, + oh->prcm.omap4.clkctrl_offs); +} + /** * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh * @oh: struct omap_hwmod *oh @@ -1424,6 +1474,7 @@ static int _enable(struct omap_hwmod *oh) return r; } + _enable_module(oh); oh->_state = _HWMOD_STATE_ENABLED; @@ -1460,11 +1511,18 @@ static int _idle(struct omap_hwmod *oh) if (oh->class->sysc) _idle_sysc(oh); _del_initiator_dep(oh, mpu_oh); - _disable_clocks(oh); + _disable_module(oh); ret = _wait_target_disable(oh); if (ret) pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", oh->name); + /* + * The module must be in idle mode before disabling any parents + * clocks. Otherwise, the parent clock might be disabled before + * the module transition is done, and thus will prevent the + * transition to complete properly. + */ + _disable_clocks(oh); /* Mux pins for device idle if populated */ if (oh->mux && oh->mux->pads_dynamic) @@ -1556,11 +1614,12 @@ static int _shutdown(struct omap_hwmod *oh) if (oh->_state == _HWMOD_STATE_ENABLED) { _del_initiator_dep(oh, mpu_oh); /* XXX what about the other system initiators here? dma, dsp */ - _disable_clocks(oh); + _disable_module(oh); ret = _wait_target_disable(oh); if (ret) pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", oh->name); + _disable_clocks(oh); } /* XXX Should this code also force-disable the optional clocks? */ -- cgit v1.2.3-70-g09d2 From 665d001338b494d6d62810aa99b4c0fa1a0884b9 Mon Sep 17 00:00:00 2001 From: Rajendra Nayak Date: Sun, 10 Jul 2011 05:57:07 -0600 Subject: OMAP2+: hwmod: Follow the recommended PRCM module enable sequence On OMAP4, the PRCM recommended sequence for enabling a module after power-on-reset is: -1- Force clkdm to SW_WKUP -2- Enabling the clocks -3- Configure desired module mode to "enable" or "auto" -4- Wait for the desired module idle status to be FUNC -5- Program clkdm in HW_AUTO(if supported) This sequence applies to all older OMAPs' as well, however since they use autodeps, it makes sure that no clkdm is in IDLE, and hence not requiring a force SW_WKUP when a module is being enabled. OMAP4 does not need to support autodeps, because of the dyanamic dependency feature, wherein the HW takes care of waking up a clockdomain from idle and hence the module, whenever an interconnect access happens to the given module. Implementing the sequence for OMAP4 requires the clockdomain handling that is currently done in clock framework to be done as part of hwmod framework since the step -4- above to "Wait for the desired module idle status to be FUNC" is done as part of hwmod framework. Signed-off-by: Rajendra Nayak [b-cousson@ti.com: Adapt it to the new clkdm hwmod attribute and API] Signed-off-by: Benoit Cousson Cc: Paul Walmsley [paul@pwsan.com: dropped mach-omap2/clock.c changes; modified to only call the clockdomain code if oh->clkdm is set; disable clock->clockdomain interaction on OMAP4] Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/clock44xx_data.c | 1 + arch/arm/mach-omap2/omap_hwmod.c | 70 +++++++++++++++++++++++++----------- 2 files changed, 51 insertions(+), 20 deletions(-) (limited to 'arch/arm/mach-omap2/omap_hwmod.c') diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 25788202849..dc79b39abb8 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -3212,6 +3212,7 @@ int __init omap4xxx_clk_init(void) } clk_init(&omap2_clk_functions); + omap2_clk_disable_clkdm_control(); for (c = omap44xx_clks; c < omap44xx_clks + ARRAY_SIZE(omap44xx_clks); c++) diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 4424fee5cd5..84cc0bdda3a 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1437,6 +1437,7 @@ static int _reset(struct omap_hwmod *oh) static int _enable(struct omap_hwmod *oh) { int r; + int hwsup = 0; pr_debug("omap_hwmod: %s: enabling\n", oh->name); @@ -1448,14 +1449,6 @@ static int _enable(struct omap_hwmod *oh) return -EINVAL; } - /* Mux pins for device runtime if populated */ - if (oh->mux && (!oh->mux->enabled || - ((oh->_state == _HWMOD_STATE_IDLE) && - oh->mux->pads_dynamic))) - omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED); - - _add_initiator_dep(oh, mpu_oh); - _enable_clocks(oh); /* * If an IP contains only one HW reset line, then de-assert it in order @@ -1466,23 +1459,56 @@ static int _enable(struct omap_hwmod *oh) oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1) _deassert_hardreset(oh, oh->rst_lines[0].name); - r = _wait_target_ready(oh); - if (r) { - pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n", - oh->name, r); - _disable_clocks(oh); + /* Mux pins for device runtime if populated */ + if (oh->mux && (!oh->mux->enabled || + ((oh->_state == _HWMOD_STATE_IDLE) && + oh->mux->pads_dynamic))) + omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED); + + _add_initiator_dep(oh, mpu_oh); - return r; + if (oh->clkdm) { + /* + * A clockdomain must be in SW_SUP before enabling + * completely the module. The clockdomain can be set + * in HW_AUTO only when the module become ready. + */ + hwsup = clkdm_in_hwsup(oh->clkdm); + r = clkdm_hwmod_enable(oh->clkdm, oh); + if (r) { + WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n", + oh->name, oh->clkdm->name, r); + return r; + } } + + _enable_clocks(oh); _enable_module(oh); - oh->_state = _HWMOD_STATE_ENABLED; + r = _wait_target_ready(oh); + if (!r) { + /* + * Set the clockdomain to HW_AUTO only if the target is ready, + * assuming that the previous state was HW_AUTO + */ + if (oh->clkdm && hwsup) + clkdm_allow_idle(oh->clkdm); - /* Access the sysconfig only if the target is ready */ - if (oh->class->sysc) { - if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED)) - _update_sysc_cache(oh); - _enable_sysc(oh); + oh->_state = _HWMOD_STATE_ENABLED; + + /* Access the sysconfig only if the target is ready */ + if (oh->class->sysc) { + if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED)) + _update_sysc_cache(oh); + _enable_sysc(oh); + } + } else { + _disable_clocks(oh); + pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n", + oh->name, r); + + if (oh->clkdm) + clkdm_hwmod_disable(oh->clkdm, oh); } return r; @@ -1523,6 +1549,8 @@ static int _idle(struct omap_hwmod *oh) * transition to complete properly. */ _disable_clocks(oh); + if (oh->clkdm) + clkdm_hwmod_disable(oh->clkdm, oh); /* Mux pins for device idle if populated */ if (oh->mux && oh->mux->pads_dynamic) @@ -1620,6 +1648,8 @@ static int _shutdown(struct omap_hwmod *oh) pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", oh->name); _disable_clocks(oh); + if (oh->clkdm) + clkdm_hwmod_disable(oh->clkdm, oh); } /* XXX Should this code also force-disable the optional clocks? */ -- cgit v1.2.3-70-g09d2