From 68b921ad7f35e0323ce0d9fe94e5701a112f257c Mon Sep 17 00:00:00 2001 From: Rajendra Nayak Date: Fri, 25 Feb 2011 16:06:47 -0700 Subject: OMAP: clockdomain: Arch specific funcs for sleep/wakeup of clkdm Define the following architecture specific funtions for omap2/3/4 .clkdm_sleep .clkdm_wakeup Convert the platform-independent framework to call these functions. Also rename the api's by removing the omap2_ preamble. Hence call omap2_clkdm_wakeup as clkdm_wakeup and omap2_clkdm_sleep as clkdm_sleep. Signed-off-by: Rajendra Nayak [paul@pwsan.com: fixed omap3_clkdm_clear_all_sleepdeps() and omap2_clkdm_clear_all_wkdeps() to test against the correct loop termination condition; thanks to Kevin Hilman for finding and helping fix] Cc: Kevin Hilman Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/pm34xx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2/pm34xx.c') diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 2f864e4b085..81df2b169a5 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -993,7 +993,7 @@ static int __init clkdms_setup(struct clockdomain *clkdm, void *unused) omap2_clkdm_allow_idle(clkdm); else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP && atomic_read(&clkdm->usecount) == 0) - omap2_clkdm_sleep(clkdm); + clkdm_sleep(clkdm); return 0; } -- cgit v1.2.3-70-g09d2 From 5cd1937b6d5990fe5d5287d925f05afd38e9fb02 Mon Sep 17 00:00:00 2001 From: Rajendra Nayak Date: Fri, 25 Feb 2011 16:06:48 -0700 Subject: OMAP: clockdomain: Arch specific funcs for hwsup control of clkdm Define the following architecture specific funtions for omap2/3/4 .clkdm_allow_idle .clkdm_deny_idle Convert the platform-independent framework to call these functions. Also rename the api's by removing the omap2_ preamble. Hence call omap2_clkdm_allow_idle as clkdm_allow_idle and omap2_clkdm_deny_idle as clkdm_deny_idle. Make the _clkdm_add_autodeps and _clkdm_del_autodeps as non-static so they can be accessed from OMAP2/3 platform specific code. Signed-off-by: Rajendra Nayak Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/clockdomain.c | 47 ++++++++++-------------------- arch/arm/mach-omap2/clockdomain.h | 6 ++-- arch/arm/mach-omap2/clockdomain2xxx_3xxx.c | 40 +++++++++++++++++++++++++ arch/arm/mach-omap2/clockdomain44xx.c | 14 +++++++++ arch/arm/mach-omap2/cpuidle34xx.c | 4 +-- arch/arm/mach-omap2/pm.c | 2 +- arch/arm/mach-omap2/pm24xx.c | 2 +- arch/arm/mach-omap2/pm34xx.c | 4 +-- 8 files changed, 79 insertions(+), 40 deletions(-) (limited to 'arch/arm/mach-omap2/pm34xx.c') diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index 3035eb9eec3..44664e7cc2a 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c @@ -178,7 +178,7 @@ static void _autodep_lookup(struct clkdm_autodep *autodep) * XXX autodeps are deprecated and should be removed at the earliest * opportunity */ -static void _clkdm_add_autodeps(struct clockdomain *clkdm) +void _clkdm_add_autodeps(struct clockdomain *clkdm) { struct clkdm_autodep *autodep; @@ -212,7 +212,7 @@ static void _clkdm_add_autodeps(struct clockdomain *clkdm) * XXX autodeps are deprecated and should be removed at the earliest * opportunity */ -static void _clkdm_del_autodeps(struct clockdomain *clkdm) +void _clkdm_del_autodeps(struct clockdomain *clkdm) { struct clkdm_autodep *autodep; @@ -357,7 +357,7 @@ void clkdm_init(struct clockdomain **clkdms, if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) clkdm_wakeup(clkdm); else if (clkdm->flags & CLKDM_CAN_DISABLE_AUTO) - omap2_clkdm_deny_idle(clkdm); + clkdm_deny_idle(clkdm); _resolve_clkdm_deps(clkdm, clkdm->wkdep_srcs); clkdm_clear_all_wkdeps(clkdm); @@ -821,7 +821,7 @@ int clkdm_wakeup(struct clockdomain *clkdm) } /** - * omap2_clkdm_allow_idle - enable hwsup idle transitions for clkdm + * clkdm_allow_idle - enable hwsup idle transitions for clkdm * @clkdm: struct clockdomain * * * Allow the hardware to automatically switch the clockdomain @clkdm into @@ -830,7 +830,7 @@ int clkdm_wakeup(struct clockdomain *clkdm) * framework, wkdep/sleepdep autodependencies are added; this is so * device drivers can read and write to the device. No return value. */ -void omap2_clkdm_allow_idle(struct clockdomain *clkdm) +void clkdm_allow_idle(struct clockdomain *clkdm) { if (!clkdm) return; @@ -841,27 +841,18 @@ void omap2_clkdm_allow_idle(struct clockdomain *clkdm) return; } + if (!arch_clkdm || !arch_clkdm->clkdm_allow_idle) + return; + pr_debug("clockdomain: enabling automatic idle transitions for %s\n", clkdm->name); - /* - * XXX This should be removed once TI adds wakeup/sleep - * dependency code and data for OMAP4. - */ - if (cpu_is_omap44xx()) { - pr_err("clockdomain: %s: OMAP4 wakeup/sleep dependency support: not yet implemented\n", clkdm->name); - } else { - if (atomic_read(&clkdm->usecount) > 0) - _clkdm_add_autodeps(clkdm); - } - - _enable_hwsup(clkdm); - + arch_clkdm->clkdm_allow_idle(clkdm); pwrdm_clkdm_state_switch(clkdm); } /** - * omap2_clkdm_deny_idle - disable hwsup idle transitions for clkdm + * clkdm_deny_idle - disable hwsup idle transitions for clkdm * @clkdm: struct clockdomain * * * Prevent the hardware from automatically switching the clockdomain @@ -869,7 +860,7 @@ void omap2_clkdm_allow_idle(struct clockdomain *clkdm) * downstream clocks enabled in the clock framework, wkdep/sleepdep * autodependencies are removed. No return value. */ -void omap2_clkdm_deny_idle(struct clockdomain *clkdm) +void clkdm_deny_idle(struct clockdomain *clkdm) { if (!clkdm) return; @@ -880,21 +871,13 @@ void omap2_clkdm_deny_idle(struct clockdomain *clkdm) return; } + if (!arch_clkdm || !arch_clkdm->clkdm_deny_idle) + return; + pr_debug("clockdomain: disabling automatic idle transitions for %s\n", clkdm->name); - _disable_hwsup(clkdm); - - /* - * XXX This should be removed once TI adds wakeup/sleep - * dependency code and data for OMAP4. - */ - if (cpu_is_omap44xx()) { - pr_err("clockdomain: %s: OMAP4 wakeup/sleep dependency support: not yet implemented\n", clkdm->name); - } else { - if (atomic_read(&clkdm->usecount) > 0) - _clkdm_del_autodeps(clkdm); - } + arch_clkdm->clkdm_deny_idle(clkdm); } diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h index 7a5cb5cf994..7126658d9ae 100644 --- a/arch/arm/mach-omap2/clockdomain.h +++ b/arch/arm/mach-omap2/clockdomain.h @@ -167,8 +167,8 @@ int clkdm_del_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2); int clkdm_read_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2); int clkdm_clear_all_sleepdeps(struct clockdomain *clkdm); -void omap2_clkdm_allow_idle(struct clockdomain *clkdm); -void omap2_clkdm_deny_idle(struct clockdomain *clkdm); +void clkdm_allow_idle(struct clockdomain *clkdm); +void clkdm_deny_idle(struct clockdomain *clkdm); int clkdm_wakeup(struct clockdomain *clkdm); int clkdm_sleep(struct clockdomain *clkdm); @@ -179,6 +179,8 @@ int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk); extern void __init omap2xxx_clockdomains_init(void); extern void __init omap3xxx_clockdomains_init(void); extern void __init omap44xx_clockdomains_init(void); +extern void _clkdm_add_autodeps(struct clockdomain *clkdm); +extern void _clkdm_del_autodeps(struct clockdomain *clkdm); extern struct clkdm_ops omap2_clkdm_operations; extern struct clkdm_ops omap3_clkdm_operations; diff --git a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c index 08c87fe3da1..25c27a5c722 100644 --- a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c +++ b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c @@ -128,6 +128,24 @@ static int omap2_clkdm_wakeup(struct clockdomain *clkdm) return 0; } +static void omap2_clkdm_allow_idle(struct clockdomain *clkdm) +{ + if (atomic_read(&clkdm->usecount) > 0) + _clkdm_add_autodeps(clkdm); + + omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); +} + +static void omap2_clkdm_deny_idle(struct clockdomain *clkdm) +{ + omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + + if (atomic_read(&clkdm->usecount) > 0) + _clkdm_del_autodeps(clkdm); +} + static int omap3_clkdm_sleep(struct clockdomain *clkdm) { omap3xxx_cm_clkdm_force_sleep(clkdm->pwrdm.ptr->prcm_offs, @@ -142,6 +160,24 @@ static int omap3_clkdm_wakeup(struct clockdomain *clkdm) return 0; } +static void omap3_clkdm_allow_idle(struct clockdomain *clkdm) +{ + if (atomic_read(&clkdm->usecount) > 0) + _clkdm_add_autodeps(clkdm); + + omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); +} + +static void omap3_clkdm_deny_idle(struct clockdomain *clkdm) +{ + omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + + if (atomic_read(&clkdm->usecount) > 0) + _clkdm_del_autodeps(clkdm); +} + struct clkdm_ops omap2_clkdm_operations = { .clkdm_add_wkdep = omap2_clkdm_add_wkdep, .clkdm_del_wkdep = omap2_clkdm_del_wkdep, @@ -149,6 +185,8 @@ struct clkdm_ops omap2_clkdm_operations = { .clkdm_clear_all_wkdeps = omap2_clkdm_clear_all_wkdeps, .clkdm_sleep = omap2_clkdm_sleep, .clkdm_wakeup = omap2_clkdm_wakeup, + .clkdm_allow_idle = omap2_clkdm_allow_idle, + .clkdm_deny_idle = omap2_clkdm_deny_idle, }; struct clkdm_ops omap3_clkdm_operations = { @@ -162,4 +200,6 @@ struct clkdm_ops omap3_clkdm_operations = { .clkdm_clear_all_sleepdeps = omap3_clkdm_clear_all_sleepdeps, .clkdm_sleep = omap3_clkdm_sleep, .clkdm_wakeup = omap3_clkdm_wakeup, + .clkdm_allow_idle = omap3_clkdm_allow_idle, + .clkdm_deny_idle = omap3_clkdm_deny_idle, }; diff --git a/arch/arm/mach-omap2/clockdomain44xx.c b/arch/arm/mach-omap2/clockdomain44xx.c index 9ccb406cf54..a46125f1545 100644 --- a/arch/arm/mach-omap2/clockdomain44xx.c +++ b/arch/arm/mach-omap2/clockdomain44xx.c @@ -29,7 +29,21 @@ static int omap4_clkdm_wakeup(struct clockdomain *clkdm) return 0; } +static void omap4_clkdm_allow_idle(struct clockdomain *clkdm) +{ + omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition, + clkdm->cm_inst, clkdm->clkdm_offs); +} + +static void omap4_clkdm_deny_idle(struct clockdomain *clkdm) +{ + omap4_cminst_clkdm_disable_hwsup(clkdm->prcm_partition, + clkdm->cm_inst, clkdm->clkdm_offs); +} + struct clkdm_ops omap4_clkdm_operations = { .clkdm_sleep = omap4_clkdm_sleep, .clkdm_wakeup = omap4_clkdm_wakeup, + .clkdm_allow_idle = omap4_clkdm_allow_idle, + .clkdm_deny_idle = omap4_clkdm_deny_idle, }; diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index f7b22a16f38..7cc80715ef1 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c @@ -99,14 +99,14 @@ static int omap3_idle_bm_check(void) static int _cpuidle_allow_idle(struct powerdomain *pwrdm, struct clockdomain *clkdm) { - omap2_clkdm_allow_idle(clkdm); + clkdm_allow_idle(clkdm); return 0; } static int _cpuidle_deny_idle(struct powerdomain *pwrdm, struct clockdomain *clkdm) { - omap2_clkdm_deny_idle(clkdm); + clkdm_deny_idle(clkdm); return 0; } diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index 74c31008079..7bb64d8121a 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -140,7 +140,7 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state) switch (sleep_switch) { case FORCEWAKEUP_SWITCH: if (pwrdm->pwrdm_clkdms[0]->flags & CLKDM_CAN_ENABLE_AUTO) - omap2_clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]); + clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]); else clkdm_sleep(pwrdm->pwrdm_clkdms[0]); break; diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c index 4125621bf59..e983c8301f5 100644 --- a/arch/arm/mach-omap2/pm24xx.c +++ b/arch/arm/mach-omap2/pm24xx.c @@ -367,7 +367,7 @@ static int __init clkdms_setup(struct clockdomain *clkdm, void *unused) clkdm_clear_all_sleepdeps(clkdm); if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO) - omap2_clkdm_allow_idle(clkdm); + clkdm_allow_idle(clkdm); else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP && atomic_read(&clkdm->usecount) == 0) clkdm_sleep(clkdm); diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 81df2b169a5..eda9a4e99a8 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -496,7 +496,7 @@ console_still_active: pwrdm_post_transition(); - omap2_clkdm_allow_idle(mpu_pwrdm->pwrdm_clkdms[0]); + clkdm_allow_idle(mpu_pwrdm->pwrdm_clkdms[0]); } int omap3_can_sleep(void) @@ -990,7 +990,7 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused) static int __init clkdms_setup(struct clockdomain *clkdm, void *unused) { if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO) - omap2_clkdm_allow_idle(clkdm); + clkdm_allow_idle(clkdm); else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP && atomic_read(&clkdm->usecount) == 0) clkdm_sleep(clkdm); -- cgit v1.2.3-70-g09d2 From b80b956dc56c6a3cb77b97e2abff48fb7ebc2119 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Fri, 25 Feb 2011 15:49:01 -0700 Subject: OMAP2+: clock: autoidle as many clocks as possible if CONFIG_OMAP_RESET_CLOCKS Attempt to enable autoidle for as many clocks as possible in the OMAP2+-common CONFIG_OMAP_RESET_CLOCKS code. Currently, this only enables DPLL autoidle for OMAP3/4 DPLLs; but future patches will enable autoidle for other clocks and the OMAP2 DPLL/APLLs. In the long run, we should probably get rid of CONFIG_OMAP_RESET_CLOCKS, and unconditionally run the code that it selects. Otherwise, the state of the clock tree won't match the hardware state - this could result in clocks being enabled or disabled unpredictably. Based on a patch by Rajendra Nayak that did this in the pm34xx.c/pm44xx.c code. Signed-off-by: Paul Walmsley Cc: Rajendra Nayak --- arch/arm/mach-omap2/pm34xx.c | 17 ----------------- arch/arm/plat-omap/clock.c | 1 + 2 files changed, 1 insertion(+), 17 deletions(-) (limited to 'arch/arm/mach-omap2/pm34xx.c') diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index eda9a4e99a8..a99f296bdbf 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -813,23 +813,6 @@ static void __init prcm_setup_regs(void) omap_ctrl_writel(OMAP3430_AUTOIDLE_MASK, OMAP2_CONTROL_SYSCONFIG); - /* - * Set all plls to autoidle. This is needed until autoidle is - * enabled by clockfw - */ - omap2_cm_write_mod_reg(1 << OMAP3430_AUTO_IVA2_DPLL_SHIFT, - OMAP3430_IVA2_MOD, CM_AUTOIDLE2); - omap2_cm_write_mod_reg(1 << OMAP3430_AUTO_MPU_DPLL_SHIFT, - MPU_MOD, - CM_AUTOIDLE2); - omap2_cm_write_mod_reg((1 << OMAP3430_AUTO_PERIPH_DPLL_SHIFT) | - (1 << OMAP3430_AUTO_CORE_DPLL_SHIFT), - PLL_MOD, - CM_AUTOIDLE); - omap2_cm_write_mod_reg(1 << OMAP3430ES2_AUTO_PERIPH2_DPLL_SHIFT, - PLL_MOD, - CM_AUTOIDLE2); - /* * Enable control of expternal oscillator through * sys_clkreq. In the long run clock framework should diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c index 0ae0eae01fd..2770dddd72c 100644 --- a/arch/arm/plat-omap/clock.c +++ b/arch/arm/plat-omap/clock.c @@ -446,6 +446,7 @@ static int __init clk_disable_unused(void) return 0; } late_initcall(clk_disable_unused); +late_initcall(omap_clk_enable_autoidle_all); #endif int __init clk_init(struct clk_functions * custom_clocks) -- cgit v1.2.3-70-g09d2 From 4ef70c0694bf428d9f1d4722edaffa1dc5fa39e1 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Fri, 25 Feb 2011 15:39:30 -0700 Subject: OMAP2/3: PM: remove manual CM_AUTOIDLE bit setting in mach-omap2/pm*xx.c These CM_AUTOIDLE bits are now set by the clock code via the common PM code in mach-omap2/pm.c. N.B.: The pm24xx.c code that this patch removes didn't ensure that the CM_AUTOIDLE bits were set for several 2430-only modules, such as GPIO5, MDM_INTC, MMCHS1/2, the modem oscillator clock, and USBHS. Similarly, the pm34xx.c code that this patch removes didn't ensure that the CM_AUTOIDLE bits were set for USIM and the AM3517 UART4. Those cases should now be handled. Signed-off-by: Paul Walmsley Cc: Kevin Hilman Tested-by: Rajendra Nayak Reviewed-by: Kevin Hilman --- arch/arm/mach-omap2/pm24xx.c | 63 ++------------------------ arch/arm/mach-omap2/pm34xx.c | 105 +------------------------------------------ 2 files changed, 5 insertions(+), 163 deletions(-) (limited to 'arch/arm/mach-omap2/pm34xx.c') diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c index abe08f49b2e..96907da1910 100644 --- a/arch/arm/mach-omap2/pm24xx.c +++ b/arch/arm/mach-omap2/pm24xx.c @@ -379,7 +379,10 @@ static void __init prcm_setup_regs(void) int i, num_mem_banks; struct powerdomain *pwrdm; - /* Enable autoidle */ + /* + * Enable autoidle + * XXX This should be handled by hwmod code or PRCM init code + */ omap2_prm_write_mod_reg(OMAP24XX_AUTOIDLE_MASK, OCP_MOD, OMAP2_PRCM_SYSCONFIG_OFFSET); @@ -418,64 +421,6 @@ static void __init prcm_setup_regs(void) clkdm_for_each(clkdms_setup, NULL); clkdm_add_wkdep(mpu_clkdm, wkup_clkdm); - /* Enable clock autoidle for all domains */ - omap2_cm_write_mod_reg(OMAP24XX_AUTO_CAM_MASK | - OMAP24XX_AUTO_MAILBOXES_MASK | - OMAP24XX_AUTO_WDT4_MASK | - OMAP2420_AUTO_WDT3_MASK | - OMAP24XX_AUTO_MSPRO_MASK | - OMAP2420_AUTO_MMC_MASK | - OMAP24XX_AUTO_FAC_MASK | - OMAP2420_AUTO_EAC_MASK | - OMAP24XX_AUTO_HDQ_MASK | - OMAP24XX_AUTO_UART2_MASK | - OMAP24XX_AUTO_UART1_MASK | - OMAP24XX_AUTO_I2C2_MASK | - OMAP24XX_AUTO_I2C1_MASK | - OMAP24XX_AUTO_MCSPI2_MASK | - OMAP24XX_AUTO_MCSPI1_MASK | - OMAP24XX_AUTO_MCBSP2_MASK | - OMAP24XX_AUTO_MCBSP1_MASK | - OMAP24XX_AUTO_GPT12_MASK | - OMAP24XX_AUTO_GPT11_MASK | - OMAP24XX_AUTO_GPT10_MASK | - OMAP24XX_AUTO_GPT9_MASK | - OMAP24XX_AUTO_GPT8_MASK | - OMAP24XX_AUTO_GPT7_MASK | - OMAP24XX_AUTO_GPT6_MASK | - OMAP24XX_AUTO_GPT5_MASK | - OMAP24XX_AUTO_GPT4_MASK | - OMAP24XX_AUTO_GPT3_MASK | - OMAP24XX_AUTO_GPT2_MASK | - OMAP2420_AUTO_VLYNQ_MASK | - OMAP24XX_AUTO_DSS_MASK, - CORE_MOD, CM_AUTOIDLE1); - omap2_cm_write_mod_reg(OMAP24XX_AUTO_UART3_MASK | - OMAP24XX_AUTO_SSI_MASK | - OMAP24XX_AUTO_USB_MASK, - CORE_MOD, CM_AUTOIDLE2); - omap2_cm_write_mod_reg(OMAP24XX_AUTO_SDRC_MASK | - OMAP24XX_AUTO_GPMC_MASK | - OMAP24XX_AUTO_SDMA_MASK, - CORE_MOD, CM_AUTOIDLE3); - omap2_cm_write_mod_reg(OMAP24XX_AUTO_PKA_MASK | - OMAP24XX_AUTO_AES_MASK | - OMAP24XX_AUTO_RNG_MASK | - OMAP24XX_AUTO_SHA_MASK | - OMAP24XX_AUTO_DES_MASK, - CORE_MOD, OMAP24XX_CM_AUTOIDLE4); - - omap2_cm_write_mod_reg(OMAP2420_AUTO_DSP_IPI_MASK, OMAP24XX_DSP_MOD, - CM_AUTOIDLE); - - omap2_cm_write_mod_reg(OMAP24XX_AUTO_OMAPCTRL_MASK | - OMAP24XX_AUTO_WDT1_MASK | - OMAP24XX_AUTO_MPU_WDT_MASK | - OMAP24XX_AUTO_GPIOS_MASK | - OMAP24XX_AUTO_32KSYNC_MASK | - OMAP24XX_AUTO_GPT1_MASK, - WKUP_MOD, CM_AUTOIDLE); - /* REVISIT: Configure number of 32 kHz clock cycles for sys_clk * stabilisation */ omap2_prm_write_mod_reg(15 << OMAP_SETUP_TIME_SHIFT, OMAP24XX_GR_MOD, diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index a99f296bdbf..3d6a00e07a5 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -688,14 +688,11 @@ static void __init omap3_d2d_idle(void) static void __init prcm_setup_regs(void) { - u32 omap3630_auto_uart4_mask = cpu_is_omap3630() ? - OMAP3630_AUTO_UART4_MASK : 0; u32 omap3630_en_uart4_mask = cpu_is_omap3630() ? OMAP3630_EN_UART4_MASK : 0; u32 omap3630_grpsel_uart4_mask = cpu_is_omap3630() ? OMAP3630_GRPSEL_UART4_MASK : 0; - /* XXX Reset all wkdeps. This should be done when initializing * powerdomains */ omap2_prm_write_mod_reg(0, OMAP3430_IVA2_MOD, PM_WKDEP); @@ -710,107 +707,7 @@ static void __init prcm_setup_regs(void) } else omap2_prm_write_mod_reg(0, GFX_MOD, PM_WKDEP); - /* - * Enable interface clock autoidle for all modules. - * Note that in the long run this should be done by clockfw - */ - omap2_cm_write_mod_reg( - OMAP3430_AUTO_MODEM_MASK | - OMAP3430ES2_AUTO_MMC3_MASK | - OMAP3430ES2_AUTO_ICR_MASK | - OMAP3430_AUTO_AES2_MASK | - OMAP3430_AUTO_SHA12_MASK | - OMAP3430_AUTO_DES2_MASK | - OMAP3430_AUTO_MMC2_MASK | - OMAP3430_AUTO_MMC1_MASK | - OMAP3430_AUTO_MSPRO_MASK | - OMAP3430_AUTO_HDQ_MASK | - OMAP3430_AUTO_MCSPI4_MASK | - OMAP3430_AUTO_MCSPI3_MASK | - OMAP3430_AUTO_MCSPI2_MASK | - OMAP3430_AUTO_MCSPI1_MASK | - OMAP3430_AUTO_I2C3_MASK | - OMAP3430_AUTO_I2C2_MASK | - OMAP3430_AUTO_I2C1_MASK | - OMAP3430_AUTO_UART2_MASK | - OMAP3430_AUTO_UART1_MASK | - OMAP3430_AUTO_GPT11_MASK | - OMAP3430_AUTO_GPT10_MASK | - OMAP3430_AUTO_MCBSP5_MASK | - OMAP3430_AUTO_MCBSP1_MASK | - OMAP3430ES1_AUTO_FAC_MASK | /* This is es1 only */ - OMAP3430_AUTO_MAILBOXES_MASK | - OMAP3430_AUTO_OMAPCTRL_MASK | - OMAP3430ES1_AUTO_FSHOSTUSB_MASK | - OMAP3430_AUTO_HSOTGUSB_MASK | - OMAP3430_AUTO_SAD2D_MASK | - OMAP3430_AUTO_SSI_MASK, - CORE_MOD, CM_AUTOIDLE1); - - omap2_cm_write_mod_reg( - OMAP3430_AUTO_PKA_MASK | - OMAP3430_AUTO_AES1_MASK | - OMAP3430_AUTO_RNG_MASK | - OMAP3430_AUTO_SHA11_MASK | - OMAP3430_AUTO_DES1_MASK, - CORE_MOD, CM_AUTOIDLE2); - - if (omap_rev() > OMAP3430_REV_ES1_0) { - omap2_cm_write_mod_reg( - OMAP3430_AUTO_MAD2D_MASK | - OMAP3430ES2_AUTO_USBTLL_MASK, - CORE_MOD, CM_AUTOIDLE3); - } - - omap2_cm_write_mod_reg( - OMAP3430_AUTO_WDT2_MASK | - OMAP3430_AUTO_WDT1_MASK | - OMAP3430_AUTO_GPIO1_MASK | - OMAP3430_AUTO_32KSYNC_MASK | - OMAP3430_AUTO_GPT12_MASK | - OMAP3430_AUTO_GPT1_MASK, - WKUP_MOD, CM_AUTOIDLE); - - omap2_cm_write_mod_reg( - OMAP3430_AUTO_DSS_MASK, - OMAP3430_DSS_MOD, - CM_AUTOIDLE); - - omap2_cm_write_mod_reg( - OMAP3430_AUTO_CAM_MASK, - OMAP3430_CAM_MOD, - CM_AUTOIDLE); - - omap2_cm_write_mod_reg( - omap3630_auto_uart4_mask | - OMAP3430_AUTO_GPIO6_MASK | - OMAP3430_AUTO_GPIO5_MASK | - OMAP3430_AUTO_GPIO4_MASK | - OMAP3430_AUTO_GPIO3_MASK | - OMAP3430_AUTO_GPIO2_MASK | - OMAP3430_AUTO_WDT3_MASK | - OMAP3430_AUTO_UART3_MASK | - OMAP3430_AUTO_GPT9_MASK | - OMAP3430_AUTO_GPT8_MASK | - OMAP3430_AUTO_GPT7_MASK | - OMAP3430_AUTO_GPT6_MASK | - OMAP3430_AUTO_GPT5_MASK | - OMAP3430_AUTO_GPT4_MASK | - OMAP3430_AUTO_GPT3_MASK | - OMAP3430_AUTO_GPT2_MASK | - OMAP3430_AUTO_MCBSP4_MASK | - OMAP3430_AUTO_MCBSP3_MASK | - OMAP3430_AUTO_MCBSP2_MASK, - OMAP3430_PER_MOD, - CM_AUTOIDLE); - - if (omap_rev() > OMAP3430_REV_ES1_0) { - omap2_cm_write_mod_reg( - OMAP3430ES2_AUTO_USBHOST_MASK, - OMAP3430ES2_USBHOST_MOD, - CM_AUTOIDLE); - } - + /* XXX This should be handled by hwmod code or SCM init code */ omap_ctrl_writel(OMAP3430_AUTOIDLE_MASK, OMAP2_CONTROL_SYSCONFIG); /* -- cgit v1.2.3-70-g09d2