From 58aaa599a97308c0f4a68ef07039157807fa8324 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Mon, 28 Mar 2011 10:52:04 -0700 Subject: OMAP2+: add PRM VP functions for checking/clearing VP TX done status Add SoC specific PRM VP helper functions for checking and clearing the VP transaction done status. Longer term, these events should be handled by the forthcoming PRCM interrupt handler. Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/prm44xx.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/mach-omap2/prm44xx.h') diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h index 7dfa379b625..b28c87dcbfa 100644 --- a/arch/arm/mach-omap2/prm44xx.h +++ b/arch/arm/mach-omap2/prm44xx.h @@ -751,6 +751,10 @@ extern u32 omap4_prm_read_inst_reg(s16 inst, u16 idx); extern void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 idx); extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx); +/* OMAP4-specific VP functions */ +u32 omap4_prm_vp_check_txdone(u8 vp_id); +void omap4_prm_vp_clear_txdone(u8 vp_id); + # endif #endif -- cgit v1.2.3-70-g09d2 From 4bb73adec43bbf63d39e1c2021de0aab0c60ea34 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Mon, 28 Mar 2011 10:25:12 -0700 Subject: OMAP2+: PRM: add register access functions for VC/VP On OMAP3+, the voltage controller (VC) and voltage processor (VP) are inside the PRM. Add some PRM helper functions for register access to these module registers. Thanks to Nishanth Menon for finding/fixing a sparse problem. Cc: Nishanth Menon Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/prm2xxx_3xxx.c | 17 ++++++++++++++++- arch/arm/mach-omap2/prm2xxx_3xxx.h | 8 ++++++++ arch/arm/mach-omap2/prm44xx.c | 22 ++++++++++++++++++++++ arch/arm/mach-omap2/prm44xx.h | 8 ++++++++ 4 files changed, 54 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2/prm44xx.h') diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c index 58c5c878b29..f02d87f68e5 100644 --- a/arch/arm/mach-omap2/prm2xxx_3xxx.c +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c @@ -169,7 +169,7 @@ struct omap3_vp { u32 tranxdone_status; }; -struct omap3_vp omap3_vp[] = { +static struct omap3_vp omap3_vp[] = { [OMAP3_VP_VDD_MPU_ID] = { .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK, }, @@ -197,3 +197,18 @@ void omap3_prm_vp_clear_txdone(u8 vp_id) omap2_prm_write_mod_reg(vp->tranxdone_status, OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); } + +u32 omap3_prm_vcvp_read(u8 offset) +{ + return omap2_prm_read_mod_reg(OMAP3430_GR_MOD, offset); +} + +void omap3_prm_vcvp_write(u32 val, u8 offset) +{ + omap2_prm_write_mod_reg(val, OMAP3430_GR_MOD, offset); +} + +u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset) +{ + return omap2_prm_rmw_mod_reg_bits(mask, bits, OMAP3430_GR_MOD, offset); +} diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h index 51125268632..cef533df086 100644 --- a/arch/arm/mach-omap2/prm2xxx_3xxx.h +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h @@ -307,7 +307,15 @@ extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift); u32 omap3_prm_vp_check_txdone(u8 vp_id); void omap3_prm_vp_clear_txdone(u8 vp_id); +/* + * OMAP3 access functions for voltage controller (VC) and + * voltage proccessor (VP) in the PRM. + */ +extern u32 omap3_prm_vcvp_read(u8 offset); +extern void omap3_prm_vcvp_write(u32 val, u8 offset); +extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); #endif /* CONFIG_ARCH_OMAP4 */ + #endif /* diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index 390e32c53b0..495a31a7e8a 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -24,6 +24,8 @@ #include "vp.h" #include "prm44xx.h" #include "prm-regbits-44xx.h" +#include "prcm44xx.h" +#include "prminst44xx.h" /* PRM low-level functions */ @@ -99,3 +101,23 @@ void omap4_prm_vp_clear_txdone(u8 vp_id) OMAP4430_PRM_OCP_SOCKET_INST, vp->irqstatus_mpu); }; + +u32 omap4_prm_vcvp_read(u8 offset) +{ + return omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, + OMAP4430_PRM_DEVICE_INST, offset); +} + +void omap4_prm_vcvp_write(u32 val, u8 offset) +{ + omap4_prminst_write_inst_reg(val, OMAP4430_PRM_PARTITION, + OMAP4430_PRM_DEVICE_INST, offset); +} + +u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset) +{ + return omap4_prminst_rmw_inst_reg_bits(mask, bits, + OMAP4430_PRM_PARTITION, + OMAP4430_PRM_DEVICE_INST, + offset); +} diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h index b28c87dcbfa..3d66ccd849d 100644 --- a/arch/arm/mach-omap2/prm44xx.h +++ b/arch/arm/mach-omap2/prm44xx.h @@ -755,6 +755,14 @@ extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx); u32 omap4_prm_vp_check_txdone(u8 vp_id); void omap4_prm_vp_clear_txdone(u8 vp_id); +/* + * OMAP4 access functions for voltage controller (VC) and + * voltage proccessor (VP) in the PRM. + */ +extern u32 omap4_prm_vcvp_read(u8 offset); +extern void omap4_prm_vcvp_write(u32 val, u8 offset); +extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); + # endif #endif -- cgit v1.2.3-70-g09d2