From ee0049d49ad2556222a7b3127be2dae11982f7b3 Mon Sep 17 00:00:00 2001 From: Huang Weiyi Date: Sat, 11 Jul 2009 09:31:58 +0800 Subject: [ARM] remove duplicated #include Remove duplicated #include('s) in arch/arm/mach-mx3/devices.c arch/arm/mach-omap1/mcbsp.c arch/arm/mach-omap2/mcbsp.c arch/arm/plat-stmp3xxx/pinmux.c Signed-off-by: Huang Weiyi Signed-off-by: Russell King --- arch/arm/mach-omap2/mcbsp.c | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index a5c0f0435cd..99b6e154631 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -19,7 +19,6 @@ #include #include -#include #include #include #include -- cgit v1.2.3-70-g09d2 From a5b92cc348299c20be215b9f4b50853ecfbf3864 Mon Sep 17 00:00:00 2001 From: Syed Rafiuddin Date: Tue, 28 Jul 2009 18:57:10 +0530 Subject: ARM: OMAP4: Add McBSP support This patch creates McBSP support on OMAP4430 development platform. This patch includes corresponding base address changes for OMAP4. Signed-off-by: Syed Rafiuddin --- arch/arm/mach-omap2/mcbsp.c | 41 +++++++++++++++++++++++++++++++++ arch/arm/plat-omap/include/mach/mcbsp.h | 8 ++++++- arch/arm/plat-omap/mcbsp.c | 2 +- 3 files changed, 49 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index a5c0f0435cd..d49dfb5e931 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -169,6 +169,42 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { #define OMAP34XX_MCBSP_PDATA_SZ 0 #endif +static struct omap_mcbsp_platform_data omap44xx_mcbsp_pdata[] = { + { + .phys_base = OMAP44XX_MCBSP1_BASE, + .dma_rx_sync = OMAP44XX_DMA_MCBSP1_RX, + .dma_tx_sync = OMAP44XX_DMA_MCBSP1_TX, + .rx_irq = INT_24XX_MCBSP1_IRQ_RX, + .tx_irq = INT_24XX_MCBSP1_IRQ_TX, + .ops = &omap2_mcbsp_ops, + }, + { + .phys_base = OMAP44XX_MCBSP2_BASE, + .dma_rx_sync = OMAP44XX_DMA_MCBSP2_RX, + .dma_tx_sync = OMAP44XX_DMA_MCBSP2_TX, + .rx_irq = INT_24XX_MCBSP2_IRQ_RX, + .tx_irq = INT_24XX_MCBSP2_IRQ_TX, + .ops = &omap2_mcbsp_ops, + }, + { + .phys_base = OMAP44XX_MCBSP3_BASE, + .dma_rx_sync = OMAP44XX_DMA_MCBSP3_RX, + .dma_tx_sync = OMAP44XX_DMA_MCBSP3_TX, + .rx_irq = INT_24XX_MCBSP3_IRQ_RX, + .tx_irq = INT_24XX_MCBSP3_IRQ_TX, + .ops = &omap2_mcbsp_ops, + }, + { + .phys_base = OMAP44XX_MCBSP4_BASE, + .dma_rx_sync = OMAP44XX_DMA_MCBSP4_RX, + .dma_tx_sync = OMAP44XX_DMA_MCBSP4_TX, + .rx_irq = INT_24XX_MCBSP4_IRQ_RX, + .tx_irq = INT_24XX_MCBSP4_IRQ_TX, + .ops = &omap2_mcbsp_ops, + }, +}; +#define OMAP44XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap44xx_mcbsp_pdata) + static int __init omap2_mcbsp_init(void) { if (cpu_is_omap2420()) @@ -177,6 +213,8 @@ static int __init omap2_mcbsp_init(void) omap_mcbsp_count = OMAP2430_MCBSP_PDATA_SZ; if (cpu_is_omap34xx()) omap_mcbsp_count = OMAP34XX_MCBSP_PDATA_SZ; + if (cpu_is_omap44xx()) + omap_mcbsp_count = OMAP44XX_MCBSP_PDATA_SZ; mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *), GFP_KERNEL); @@ -192,6 +230,9 @@ static int __init omap2_mcbsp_init(void) if (cpu_is_omap34xx()) omap_mcbsp_register_board_cfg(omap34xx_mcbsp_pdata, OMAP34XX_MCBSP_PDATA_SZ); + if (cpu_is_omap44xx()) + omap_mcbsp_register_board_cfg(omap44xx_mcbsp_pdata, + OMAP44XX_MCBSP_PDATA_SZ); return omap_mcbsp_init(); } diff --git a/arch/arm/plat-omap/include/mach/mcbsp.h b/arch/arm/plat-omap/include/mach/mcbsp.h index bb154ea7676..ec6f81e06d3 100644 --- a/arch/arm/plat-omap/include/mach/mcbsp.h +++ b/arch/arm/plat-omap/include/mach/mcbsp.h @@ -53,6 +53,11 @@ #define OMAP34XX_MCBSP4_BASE 0x49026000 #define OMAP34XX_MCBSP5_BASE 0x48096000 +#define OMAP44XX_MCBSP1_BASE 0x49022000 +#define OMAP44XX_MCBSP2_BASE 0x49024000 +#define OMAP44XX_MCBSP3_BASE 0x49026000 +#define OMAP44XX_MCBSP4_BASE 0x48074000 + #if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP730) #define OMAP_MCBSP_REG_DRR2 0x00 @@ -98,7 +103,8 @@ #define AUDIO_DMA_TX OMAP_DMA_MCBSP1_TX #define AUDIO_DMA_RX OMAP_DMA_MCBSP1_RX -#elif defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) +#elif defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ + defined(CONFIG_ARCH_OMAP4) #define OMAP_MCBSP_REG_DRR2 0x00 #define OMAP_MCBSP_REG_DRR1 0x04 diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index efa0e0111f3..e42fa7cfc79 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -191,7 +191,7 @@ void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config) OMAP_MCBSP_WRITE(io_base, MCR2, config->mcr2); OMAP_MCBSP_WRITE(io_base, MCR1, config->mcr1); OMAP_MCBSP_WRITE(io_base, PCR0, config->pcr0); - if (cpu_is_omap2430() || cpu_is_omap34xx()) { + if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) { OMAP_MCBSP_WRITE(io_base, XCCR, config->xccr); OMAP_MCBSP_WRITE(io_base, RCCR, config->rccr); } -- cgit v1.2.3-70-g09d2 From 085b54d99b8ee999e7905b8f16e201e0da8ba369 Mon Sep 17 00:00:00 2001 From: Syed Rafiuddin Date: Tue, 28 Jul 2009 18:57:22 +0530 Subject: ARM: OMAP4: Add UART4 support This patch adds UART4 support on OMAP4430 development platform. Signed-off-by: Syed Rafiuddin --- arch/arm/mach-omap2/board-4430sdp.c | 2 +- arch/arm/mach-omap2/serial.c | 10 ++++++++++ 2 files changed, 11 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index 57e477bd89c..7e1e721f032 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c @@ -39,7 +39,7 @@ static struct platform_device *sdp4430_devices[] __initdata = { }; static struct omap_uart_config sdp4430_uart_config __initdata = { - .enabled_uarts = (1 << 0) | (1 << 1) | (1 << 2), + .enabled_uarts = (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3), }; static struct omap_lcd_config sdp4430_lcd_config __initdata = { diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index b094c15bfe4..c0bea75f13f 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c @@ -97,6 +97,16 @@ static struct plat_serial8250_port serial_platform_data[] = { .regshift = 2, .uartclk = OMAP24XX_BASE_BAUD * 16, }, { +#ifdef CONFIG_ARCH_OMAP4 + .membase = IO_ADDRESS(OMAP_UART4_BASE), + .mapbase = OMAP_UART4_BASE, + .irq = 70, + .flags = UPF_BOOT_AUTOCONF, + .iotype = UPIO_MEM, + .regshift = 2, + .uartclk = OMAP24XX_BASE_BAUD * 16, + }, { +#endif .flags = 0 } }; -- cgit v1.2.3-70-g09d2 From a1a56f5faa41327116bf960a8e79f21a8ea35dce Mon Sep 17 00:00:00 2001 From: Eduardo Valentin Date: Thu, 20 Aug 2009 16:18:11 +0300 Subject: OMAP: McBSP: Create and export max_(r|t)x_thres property This patch export through sysfs two properties to configure maximum threshold for transmission and reception on each mcbsp instance. Also, it exports two helper functions to allow mcbsp users to read this values. Signed-off-by: Eduardo Valentin Acked-by: Tony Lindgren Signed-off-by: Mark Brown --- arch/arm/mach-omap2/mcbsp.c | 5 ++ arch/arm/plat-omap/include/mach/mcbsp.h | 11 +++ arch/arm/plat-omap/mcbsp.c | 122 ++++++++++++++++++++++++++++++++ 3 files changed, 138 insertions(+) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index a5c0f0435cd..f837114d1d6 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -129,6 +129,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { .rx_irq = INT_24XX_MCBSP1_IRQ_RX, .tx_irq = INT_24XX_MCBSP1_IRQ_TX, .ops = &omap2_mcbsp_ops, + .buffer_size = 0x7F, }, { .phys_base = OMAP34XX_MCBSP2_BASE, @@ -137,6 +138,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { .rx_irq = INT_24XX_MCBSP2_IRQ_RX, .tx_irq = INT_24XX_MCBSP2_IRQ_TX, .ops = &omap2_mcbsp_ops, + .buffer_size = 0x3FF, }, { .phys_base = OMAP34XX_MCBSP3_BASE, @@ -145,6 +147,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { .rx_irq = INT_24XX_MCBSP3_IRQ_RX, .tx_irq = INT_24XX_MCBSP3_IRQ_TX, .ops = &omap2_mcbsp_ops, + .buffer_size = 0x7F, }, { .phys_base = OMAP34XX_MCBSP4_BASE, @@ -153,6 +156,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { .rx_irq = INT_24XX_MCBSP4_IRQ_RX, .tx_irq = INT_24XX_MCBSP4_IRQ_TX, .ops = &omap2_mcbsp_ops, + .buffer_size = 0x7F, }, { .phys_base = OMAP34XX_MCBSP5_BASE, @@ -161,6 +165,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { .rx_irq = INT_24XX_MCBSP5_IRQ_RX, .tx_irq = INT_24XX_MCBSP5_IRQ_TX, .ops = &omap2_mcbsp_ops, + .buffer_size = 0x7F, }, }; #define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata) diff --git a/arch/arm/plat-omap/include/mach/mcbsp.h b/arch/arm/plat-omap/include/mach/mcbsp.h index 2544aa5bccd..832330d7cb3 100644 --- a/arch/arm/plat-omap/include/mach/mcbsp.h +++ b/arch/arm/plat-omap/include/mach/mcbsp.h @@ -348,6 +348,9 @@ struct omap_mcbsp_platform_data { u8 dma_rx_sync, dma_tx_sync; u16 rx_irq, tx_irq; struct omap_mcbsp_ops *ops; +#ifdef CONFIG_ARCH_OMAP34XX + u16 buffer_size; +#endif }; struct omap_mcbsp { @@ -381,6 +384,10 @@ struct omap_mcbsp { struct omap_mcbsp_platform_data *pdata; struct clk *iclk; struct clk *fclk; +#ifdef CONFIG_ARCH_OMAP34XX + u16 max_tx_thres; + u16 max_rx_thres; +#endif }; extern struct omap_mcbsp **mcbsp_ptr; extern int omap_mcbsp_count; @@ -392,11 +399,15 @@ void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg * config #ifdef CONFIG_ARCH_OMAP34XX void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold); void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold); +u16 omap_mcbsp_get_max_tx_threshold(unsigned int id); +u16 omap_mcbsp_get_max_rx_threshold(unsigned int id); #else static inline void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold) { } static inline void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold) { } +static inline u16 omap_mcbsp_get_max_tx_threshold(unsigned int id) { return 0; } +static inline u16 omap_mcbsp_get_max_rx_threshold(unsigned int id) { return 0; } #endif int omap_mcbsp_request(unsigned int id); void omap_mcbsp_free(unsigned int id); diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 081f2eace92..0bbc912e548 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -246,6 +246,42 @@ void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold) OMAP_MCBSP_WRITE(io_base, THRSH1, threshold); } EXPORT_SYMBOL(omap_mcbsp_set_rx_threshold); + +/* + * omap_mcbsp_get_max_tx_thres just return the current configured + * maximum threshold for transmission + */ +u16 omap_mcbsp_get_max_tx_threshold(unsigned int id) +{ + struct omap_mcbsp *mcbsp; + + if (!omap_mcbsp_check_valid_id(id)) { + printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); + return -ENODEV; + } + mcbsp = id_to_mcbsp_ptr(id); + + return mcbsp->max_tx_thres; +} +EXPORT_SYMBOL(omap_mcbsp_get_max_tx_threshold); + +/* + * omap_mcbsp_get_max_rx_thres just return the current configured + * maximum threshold for reception + */ +u16 omap_mcbsp_get_max_rx_threshold(unsigned int id) +{ + struct omap_mcbsp *mcbsp; + + if (!omap_mcbsp_check_valid_id(id)) { + printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); + return -ENODEV; + } + mcbsp = id_to_mcbsp_ptr(id); + + return mcbsp->max_rx_thres; +} +EXPORT_SYMBOL(omap_mcbsp_get_max_rx_threshold); #endif /* @@ -1005,6 +1041,86 @@ void omap_mcbsp_set_spi_mode(unsigned int id, } EXPORT_SYMBOL(omap_mcbsp_set_spi_mode); +#ifdef CONFIG_ARCH_OMAP34XX +#define max_thres(m) (mcbsp->pdata->buffer_size) +#define valid_threshold(m, val) ((val) <= max_thres(m)) +#define THRESHOLD_PROP_BUILDER(prop) \ +static ssize_t prop##_show(struct device *dev, \ + struct device_attribute *attr, char *buf) \ +{ \ + struct omap_mcbsp *mcbsp = dev_get_drvdata(dev); \ + \ + return sprintf(buf, "%u\n", mcbsp->prop); \ +} \ + \ +static ssize_t prop##_store(struct device *dev, \ + struct device_attribute *attr, \ + const char *buf, size_t size) \ +{ \ + struct omap_mcbsp *mcbsp = dev_get_drvdata(dev); \ + unsigned long val; \ + int status; \ + \ + status = strict_strtoul(buf, 0, &val); \ + if (status) \ + return status; \ + \ + if (!valid_threshold(mcbsp, val)) \ + return -EDOM; \ + \ + mcbsp->prop = val; \ + return size; \ +} \ + \ +static DEVICE_ATTR(prop, 0644, prop##_show, prop##_store); + +THRESHOLD_PROP_BUILDER(max_tx_thres); +THRESHOLD_PROP_BUILDER(max_rx_thres); + +static const struct attribute *threshold_attrs[] = { + &dev_attr_max_tx_thres.attr, + &dev_attr_max_rx_thres.attr, + NULL, +}; + +static const struct attribute_group threshold_attr_group = { + .attrs = (struct attribute **)threshold_attrs, +}; + +static inline int __devinit omap_thres_add(struct device *dev) +{ + return sysfs_create_group(&dev->kobj, &threshold_attr_group); +} + +static inline void __devexit omap_thres_remove(struct device *dev) +{ + sysfs_remove_group(&dev->kobj, &threshold_attr_group); +} + +static inline void __devinit omap34xx_device_init(struct omap_mcbsp *mcbsp) +{ + if (cpu_is_omap34xx()) { + mcbsp->max_tx_thres = max_thres(mcbsp); + mcbsp->max_rx_thres = max_thres(mcbsp); + if (omap_thres_add(mcbsp->dev)) + dev_warn(mcbsp->dev, + "Unable to create threshold controls\n"); + } else { + mcbsp->max_tx_thres = -EINVAL; + mcbsp->max_rx_thres = -EINVAL; + } +} + +static inline void __devexit omap34xx_device_exit(struct omap_mcbsp *mcbsp) +{ + if (cpu_is_omap34xx()) + omap_thres_remove(mcbsp->dev); +} +#else +static inline void __devinit omap34xx_device_init(struct omap_mcbsp *mcbsp) {} +static inline void __devexit omap34xx_device_exit(struct omap_mcbsp *mcbsp) {} +#endif /* CONFIG_ARCH_OMAP34XX */ + /* * McBSP1 and McBSP3 are directly mapped on 1610 and 1510. * 730 has only 2 McBSP, and both of them are MPU peripherals. @@ -1075,6 +1191,10 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev) mcbsp->dev = &pdev->dev; mcbsp_ptr[id] = mcbsp; platform_set_drvdata(pdev, mcbsp); + + /* Initialize mcbsp properties for OMAP34XX if needed / applicable */ + omap34xx_device_init(mcbsp); + return 0; err_fclk: @@ -1098,6 +1218,8 @@ static int __devexit omap_mcbsp_remove(struct platform_device *pdev) mcbsp->pdata->ops->free) mcbsp->pdata->ops->free(mcbsp->id); + omap34xx_device_exit(mcbsp); + clk_disable(mcbsp->fclk); clk_disable(mcbsp->iclk); clk_put(mcbsp->fclk); -- cgit v1.2.3-70-g09d2 From 7e4f943b725008272d5c50e676a89d642232a4e3 Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Thu, 20 Aug 2009 16:18:12 +0300 Subject: OMAP3: McBSP: Lower the maximum buffersize for McBSP1, 3, 4, 5 Do not allow applications to use the full buffer found on McBSP1,3,4,5. Using the full buffer in threshold mode causes the McBSP buffer to run dry, which can be observed as channels are switching (in reality the channels are shifting). Signed-off-by: Peter Ujfalusi Acked-by: Tony Lindgren Signed-off-by: Mark Brown --- arch/arm/mach-omap2/mcbsp.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index f837114d1d6..7d22caf6009 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -129,7 +129,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { .rx_irq = INT_24XX_MCBSP1_IRQ_RX, .tx_irq = INT_24XX_MCBSP1_IRQ_TX, .ops = &omap2_mcbsp_ops, - .buffer_size = 0x7F, + .buffer_size = 0x6F, }, { .phys_base = OMAP34XX_MCBSP2_BASE, @@ -147,7 +147,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { .rx_irq = INT_24XX_MCBSP3_IRQ_RX, .tx_irq = INT_24XX_MCBSP3_IRQ_TX, .ops = &omap2_mcbsp_ops, - .buffer_size = 0x7F, + .buffer_size = 0x6F, }, { .phys_base = OMAP34XX_MCBSP4_BASE, @@ -156,7 +156,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { .rx_irq = INT_24XX_MCBSP4_IRQ_RX, .tx_irq = INT_24XX_MCBSP4_IRQ_TX, .ops = &omap2_mcbsp_ops, - .buffer_size = 0x7F, + .buffer_size = 0x6F, }, { .phys_base = OMAP34XX_MCBSP5_BASE, @@ -165,7 +165,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { .rx_irq = INT_24XX_MCBSP5_IRQ_RX, .tx_irq = INT_24XX_MCBSP5_IRQ_TX, .ops = &omap2_mcbsp_ops, - .buffer_size = 0x7F, + .buffer_size = 0x6F, }, }; #define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata) -- cgit v1.2.3-70-g09d2 From 941132606c7611246d2034cb7b01f9270c2d1ede Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Fri, 28 Aug 2009 10:50:33 -0700 Subject: OMAP: Remove OMAP_IO_ADDRESS, use OMAP1_IO_ADDRESS and OMAP2_IO_ADDRESS instead Search and replace OMAP_IO_ADDRESS with OMAP1_IO_ADDRESS and OMAP2_IO_ADDRESS, and convert omap_read/write into a functions instead of a macros. Also rename OMAP_MPUIO_VBASE to OMAP1_MPUIO_VBASE. In the long run, most code should use ioremap + __raw_read/write instead. Signed-off-by: Tony Lindgren --- arch/arm/mach-omap1/devices.c | 2 +- arch/arm/mach-omap1/pm.h | 4 +- arch/arm/mach-omap1/serial.c | 6 +- arch/arm/mach-omap1/sram.S | 12 ++-- arch/arm/mach-omap1/time.c | 4 +- arch/arm/mach-omap2/board-4430sdp.c | 4 +- arch/arm/mach-omap2/cm.h | 6 +- arch/arm/mach-omap2/omap-smp.c | 2 +- arch/arm/mach-omap2/pm-debug.c | 2 +- arch/arm/mach-omap2/prm.h | 6 +- arch/arm/mach-omap2/sdrc.h | 6 +- arch/arm/mach-omap2/serial.c | 6 +- arch/arm/mach-omap2/sram242x.S | 4 +- arch/arm/mach-omap2/sram243x.S | 4 +- arch/arm/mach-omap2/timer-gp.c | 2 +- arch/arm/plat-omap/dma.c | 8 +-- arch/arm/plat-omap/dmtimer.c | 5 +- arch/arm/plat-omap/gpio.c | 86 +++++++++++++-------------- arch/arm/plat-omap/include/mach/control.h | 12 ++-- arch/arm/plat-omap/include/mach/entry-macro.S | 8 +-- arch/arm/plat-omap/include/mach/io.h | 64 +++++++------------- arch/arm/plat-omap/include/mach/mtd-xip.h | 2 +- arch/arm/plat-omap/include/mach/omap44xx.h | 8 +-- arch/arm/plat-omap/include/mach/sdrc.h | 6 +- arch/arm/plat-omap/io.c | 58 ++++++++++++++++++ arch/arm/plat-omap/sram.c | 20 +++---- drivers/video/omap/dispc.c | 6 +- 27 files changed, 196 insertions(+), 157 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c index bbbaeb0abcd..06808434ea0 100644 --- a/arch/arm/mach-omap1/devices.c +++ b/arch/arm/mach-omap1/devices.c @@ -71,7 +71,7 @@ static inline void omap_init_rtc(void) {} # define INT_DSP_MAILBOX1 INT_1610_DSP_MAILBOX1 #endif -#define OMAP1_MBOX_BASE IO_ADDRESS(OMAP16XX_MAILBOX_BASE) +#define OMAP1_MBOX_BASE OMAP1_IO_ADDRESS(OMAP16XX_MAILBOX_BASE) static struct resource mbox_resources[] = { { diff --git a/arch/arm/mach-omap1/pm.h b/arch/arm/mach-omap1/pm.h index 9ed5e2c1de4..c4f05bdcf8a 100644 --- a/arch/arm/mach-omap1/pm.h +++ b/arch/arm/mach-omap1/pm.h @@ -39,11 +39,11 @@ * Register and offset definitions to be used in PM assembler code * ---------------------------------------------------------------------------- */ -#define CLKGEN_REG_ASM_BASE IO_ADDRESS(0xfffece00) +#define CLKGEN_REG_ASM_BASE OMAP1_IO_ADDRESS(0xfffece00) #define ARM_IDLECT1_ASM_OFFSET 0x04 #define ARM_IDLECT2_ASM_OFFSET 0x08 -#define TCMIF_ASM_BASE IO_ADDRESS(0xfffecc00) +#define TCMIF_ASM_BASE OMAP1_IO_ADDRESS(0xfffecc00) #define EMIFS_CONFIG_ASM_OFFSET 0x0c #define EMIFF_SDRAM_CONFIG_ASM_OFFSET 0x20 diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c index f754cee4f3c..6f54b2c591c 100644 --- a/arch/arm/mach-omap1/serial.c +++ b/arch/arm/mach-omap1/serial.c @@ -64,7 +64,7 @@ static void __init omap_serial_reset(struct plat_serial8250_port *p) static struct plat_serial8250_port serial_platform_data[] = { { - .membase = IO_ADDRESS(OMAP_UART1_BASE), + .membase = OMAP1_IO_ADDRESS(OMAP_UART1_BASE), .mapbase = OMAP_UART1_BASE, .irq = INT_UART1, .flags = UPF_BOOT_AUTOCONF, @@ -73,7 +73,7 @@ static struct plat_serial8250_port serial_platform_data[] = { .uartclk = OMAP16XX_BASE_BAUD * 16, }, { - .membase = IO_ADDRESS(OMAP_UART2_BASE), + .membase = OMAP1_IO_ADDRESS(OMAP_UART2_BASE), .mapbase = OMAP_UART2_BASE, .irq = INT_UART2, .flags = UPF_BOOT_AUTOCONF, @@ -82,7 +82,7 @@ static struct plat_serial8250_port serial_platform_data[] = { .uartclk = OMAP16XX_BASE_BAUD * 16, }, { - .membase = IO_ADDRESS(OMAP_UART3_BASE), + .membase = OMAP1_IO_ADDRESS(OMAP_UART3_BASE), .mapbase = OMAP_UART3_BASE, .irq = INT_UART3, .flags = UPF_BOOT_AUTOCONF, diff --git a/arch/arm/mach-omap1/sram.S b/arch/arm/mach-omap1/sram.S index 261cdc48228..7724e520d07 100644 --- a/arch/arm/mach-omap1/sram.S +++ b/arch/arm/mach-omap1/sram.S @@ -21,13 +21,13 @@ ENTRY(omap1_sram_reprogram_clock) stmfd sp!, {r0 - r12, lr} @ save registers on stack - mov r2, #IO_ADDRESS(DPLL_CTL) & 0xff000000 - orr r2, r2, #IO_ADDRESS(DPLL_CTL) & 0x00ff0000 - orr r2, r2, #IO_ADDRESS(DPLL_CTL) & 0x0000ff00 + mov r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0xff000000 + orr r2, r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0x00ff0000 + orr r2, r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0x0000ff00 - mov r3, #IO_ADDRESS(ARM_CKCTL) & 0xff000000 - orr r3, r3, #IO_ADDRESS(ARM_CKCTL) & 0x00ff0000 - orr r3, r3, #IO_ADDRESS(ARM_CKCTL) & 0x0000ff00 + mov r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0xff000000 + orr r3, r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0x00ff0000 + orr r3, r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0x0000ff00 tst r0, #1 << 4 @ want lock mode? beq newck @ nope diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c index 4d56408d3cf..1be6a214d88 100644 --- a/arch/arm/mach-omap1/time.c +++ b/arch/arm/mach-omap1/time.c @@ -62,8 +62,8 @@ typedef struct { u32 read_tim; /* READ_TIM, R */ } omap_mpu_timer_regs_t; -#define omap_mpu_timer_base(n) \ -((volatile omap_mpu_timer_regs_t*)IO_ADDRESS(OMAP_MPU_TIMER_BASE + \ +#define omap_mpu_timer_base(n) \ +((volatile omap_mpu_timer_regs_t*)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE + \ (n)*OMAP_MPU_TIMER_OFFSET)) static inline unsigned long omap_mpu_timer_read(int nr) diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index b0c7402248f..bdfda36d8aa 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c @@ -53,8 +53,8 @@ static struct omap_board_config_kernel sdp4430_config[] __initdata = { static void __init gic_init_irq(void) { - gic_dist_init(0, IO_ADDRESS(OMAP44XX_GIC_DIST_BASE), 29); - gic_cpu_init(0, IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)); + gic_dist_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_DIST_BASE), 29); + gic_cpu_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)); } static void __init omap_4430sdp_init_irq(void) diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h index f3c91a1ca39..18d9a121aa7 100644 --- a/arch/arm/mach-omap2/cm.h +++ b/arch/arm/mach-omap2/cm.h @@ -17,11 +17,11 @@ #include "prcm-common.h" #define OMAP2420_CM_REGADDR(module, reg) \ - IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg)) + OMAP2_IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg)) #define OMAP2430_CM_REGADDR(module, reg) \ - IO_ADDRESS(OMAP2430_CM_BASE + (module) + (reg)) + OMAP2_IO_ADDRESS(OMAP2430_CM_BASE + (module) + (reg)) #define OMAP34XX_CM_REGADDR(module, reg) \ - IO_ADDRESS(OMAP3430_CM_BASE + (module) + (reg)) + OMAP2_IO_ADDRESS(OMAP3430_CM_BASE + (module) + (reg)) /* * Architecture-specific global CM registers diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c index 8fe8d230f21..48ee295db27 100644 --- a/arch/arm/mach-omap2/omap-smp.c +++ b/arch/arm/mach-omap2/omap-smp.c @@ -54,7 +54,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu) * for us: do so */ - gic_cpu_init(0, IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)); + gic_cpu_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)); /* * Synchronise with the boot thread. diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index 6cc375a275b..da3a53f8ccc 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c @@ -48,7 +48,7 @@ int omap2_pm_debug; regs[reg_count++].val = __raw_readl(reg) #define DUMP_INTC_REG(reg, off) \ regs[reg_count].name = #reg; \ - regs[reg_count++].val = __raw_readl(IO_ADDRESS(0x480fe000 + (off))) + regs[reg_count++].val = __raw_readl(OMAP2_IO_ADDRESS(0x480fe000 + (off))) void omap2_pm_dump(int mode, int resume, unsigned int us) { diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h index 9937e281469..03c467c35f5 100644 --- a/arch/arm/mach-omap2/prm.h +++ b/arch/arm/mach-omap2/prm.h @@ -17,11 +17,11 @@ #include "prcm-common.h" #define OMAP2420_PRM_REGADDR(module, reg) \ - IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg)) + OMAP2_IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg)) #define OMAP2430_PRM_REGADDR(module, reg) \ - IO_ADDRESS(OMAP2430_PRM_BASE + (module) + (reg)) + OMAP2_IO_ADDRESS(OMAP2430_PRM_BASE + (module) + (reg)) #define OMAP34XX_PRM_REGADDR(module, reg) \ - IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg)) + OMAP2_IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg)) /* * Architecture-specific global PRM registers diff --git a/arch/arm/mach-omap2/sdrc.h b/arch/arm/mach-omap2/sdrc.h index 1a8bbd09406..0837eda5f2b 100644 --- a/arch/arm/mach-omap2/sdrc.h +++ b/arch/arm/mach-omap2/sdrc.h @@ -48,9 +48,9 @@ static inline u32 sms_read_reg(u16 reg) return __raw_readl(OMAP_SMS_REGADDR(reg)); } #else -#define OMAP242X_SDRC_REGADDR(reg) IO_ADDRESS(OMAP2420_SDRC_BASE + (reg)) -#define OMAP243X_SDRC_REGADDR(reg) IO_ADDRESS(OMAP243X_SDRC_BASE + (reg)) -#define OMAP34XX_SDRC_REGADDR(reg) IO_ADDRESS(OMAP343X_SDRC_BASE + (reg)) +#define OMAP242X_SDRC_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP2420_SDRC_BASE + (reg)) +#define OMAP243X_SDRC_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP243X_SDRC_BASE + (reg)) +#define OMAP34XX_SDRC_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP343X_SDRC_BASE + (reg)) #endif /* __ASSEMBLER__ */ #endif diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index a7421a50410..42449002f60 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c @@ -73,7 +73,7 @@ static LIST_HEAD(uart_list); static struct plat_serial8250_port serial_platform_data0[] = { { - .membase = IO_ADDRESS(OMAP_UART1_BASE), + .membase = OMAP2_IO_ADDRESS(OMAP_UART1_BASE), .mapbase = OMAP_UART1_BASE, .irq = 72, .flags = UPF_BOOT_AUTOCONF, @@ -87,7 +87,7 @@ static struct plat_serial8250_port serial_platform_data0[] = { static struct plat_serial8250_port serial_platform_data1[] = { { - .membase = IO_ADDRESS(OMAP_UART2_BASE), + .membase = OMAP2_IO_ADDRESS(OMAP_UART2_BASE), .mapbase = OMAP_UART2_BASE, .irq = 73, .flags = UPF_BOOT_AUTOCONF, @@ -101,7 +101,7 @@ static struct plat_serial8250_port serial_platform_data1[] = { static struct plat_serial8250_port serial_platform_data2[] = { { - .membase = IO_ADDRESS(OMAP_UART3_BASE), + .membase = OMAP2_IO_ADDRESS(OMAP_UART3_BASE), .mapbase = OMAP_UART3_BASE, .irq = 74, .flags = UPF_BOOT_AUTOCONF, diff --git a/arch/arm/mach-omap2/sram242x.S b/arch/arm/mach-omap2/sram242x.S index bb299851116..9b62208658b 100644 --- a/arch/arm/mach-omap2/sram242x.S +++ b/arch/arm/mach-omap2/sram242x.S @@ -128,7 +128,7 @@ omap242x_sdi_prcm_voltctrl: prcm_mask_val: .word 0xFFFF3FFC omap242x_sdi_timer_32ksynct_cr: - .word IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010) + .word OMAP2_IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010) ENTRY(omap242x_sram_ddr_init_sz) .word . - omap242x_sram_ddr_init @@ -224,7 +224,7 @@ omap242x_srs_prcm_voltctrl: ddr_prcm_mask_val: .word 0xFFFF3FFC omap242x_srs_timer_32ksynct: - .word IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010) + .word OMAP2_IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010) ENTRY(omap242x_sram_reprogram_sdrc_sz) .word . - omap242x_sram_reprogram_sdrc diff --git a/arch/arm/mach-omap2/sram243x.S b/arch/arm/mach-omap2/sram243x.S index 9955abcaeb3..df2cd9277c0 100644 --- a/arch/arm/mach-omap2/sram243x.S +++ b/arch/arm/mach-omap2/sram243x.S @@ -128,7 +128,7 @@ omap243x_sdi_prcm_voltctrl: prcm_mask_val: .word 0xFFFF3FFC omap243x_sdi_timer_32ksynct_cr: - .word IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010) + .word OMAP2_IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010) ENTRY(omap243x_sram_ddr_init_sz) .word . - omap243x_sram_ddr_init @@ -224,7 +224,7 @@ omap243x_srs_prcm_voltctrl: ddr_prcm_mask_val: .word 0xFFFF3FFC omap243x_srs_timer_32ksynct: - .word IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010) + .word OMAP2_IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010) ENTRY(omap243x_sram_reprogram_sdrc_sz) .word . - omap243x_sram_reprogram_sdrc diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c index 97eeeebcb06..e2338c0aebc 100644 --- a/arch/arm/mach-omap2/timer-gp.c +++ b/arch/arm/mach-omap2/timer-gp.c @@ -231,7 +231,7 @@ static void __init omap2_gp_clocksource_init(void) static void __init omap2_gp_timer_init(void) { #ifdef CONFIG_LOCAL_TIMERS - twd_base = IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE); + twd_base = OMAP2_IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE); #endif omap_dm_timer_init(); diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index e3ac94f0900..bf086346210 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c @@ -2337,16 +2337,16 @@ static int __init omap_init_dma(void) int ch, r; if (cpu_class_is_omap1()) { - omap_dma_base = IO_ADDRESS(OMAP1_DMA_BASE); + omap_dma_base = OMAP1_IO_ADDRESS(OMAP1_DMA_BASE); dma_lch_count = OMAP1_LOGICAL_DMA_CH_COUNT; } else if (cpu_is_omap24xx()) { - omap_dma_base = IO_ADDRESS(OMAP24XX_DMA4_BASE); + omap_dma_base = OMAP2_IO_ADDRESS(OMAP24XX_DMA4_BASE); dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT; } else if (cpu_is_omap34xx()) { - omap_dma_base = IO_ADDRESS(OMAP34XX_DMA4_BASE); + omap_dma_base = OMAP2_IO_ADDRESS(OMAP34XX_DMA4_BASE); dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT; } else if (cpu_is_omap44xx()) { - omap_dma_base = IO_ADDRESS(OMAP44XX_DMA4_BASE); + omap_dma_base = OMAP2_IO_ADDRESS(OMAP44XX_DMA4_BASE); dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT; } else { pr_err("DMA init failed for unsupported omap\n"); diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index 7f50b6103de..d325b54daeb 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c @@ -774,7 +774,10 @@ int __init omap_dm_timer_init(void) for (i = 0; i < dm_timer_count; i++) { timer = &dm_timers[i]; - timer->io_base = IO_ADDRESS(timer->phys_base); + if (cpu_class_is_omap1()) + timer->io_base = OMAP1_IO_ADDRESS(timer->phys_base); + else + timer->io_base = OMAP2_IO_ADDRESS(timer->phys_base); #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ defined(CONFIG_ARCH_OMAP4) if (cpu_class_is_omap2()) { diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index 9298bc0ab17..fd63dd3bf4c 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c @@ -31,7 +31,7 @@ /* * OMAP1510 GPIO registers */ -#define OMAP1510_GPIO_BASE IO_ADDRESS(0xfffce000) +#define OMAP1510_GPIO_BASE OMAP1_IO_ADDRESS(0xfffce000) #define OMAP1510_GPIO_DATA_INPUT 0x00 #define OMAP1510_GPIO_DATA_OUTPUT 0x04 #define OMAP1510_GPIO_DIR_CONTROL 0x08 @@ -45,10 +45,10 @@ /* * OMAP1610 specific GPIO registers */ -#define OMAP1610_GPIO1_BASE IO_ADDRESS(0xfffbe400) -#define OMAP1610_GPIO2_BASE IO_ADDRESS(0xfffbec00) -#define OMAP1610_GPIO3_BASE IO_ADDRESS(0xfffbb400) -#define OMAP1610_GPIO4_BASE IO_ADDRESS(0xfffbbc00) +#define OMAP1610_GPIO1_BASE OMAP1_IO_ADDRESS(0xfffbe400) +#define OMAP1610_GPIO2_BASE OMAP1_IO_ADDRESS(0xfffbec00) +#define OMAP1610_GPIO3_BASE OMAP1_IO_ADDRESS(0xfffbb400) +#define OMAP1610_GPIO4_BASE OMAP1_IO_ADDRESS(0xfffbbc00) #define OMAP1610_GPIO_REVISION 0x0000 #define OMAP1610_GPIO_SYSCONFIG 0x0010 #define OMAP1610_GPIO_SYSSTATUS 0x0014 @@ -70,12 +70,12 @@ /* * OMAP730 specific GPIO registers */ -#define OMAP730_GPIO1_BASE IO_ADDRESS(0xfffbc000) -#define OMAP730_GPIO2_BASE IO_ADDRESS(0xfffbc800) -#define OMAP730_GPIO3_BASE IO_ADDRESS(0xfffbd000) -#define OMAP730_GPIO4_BASE IO_ADDRESS(0xfffbd800) -#define OMAP730_GPIO5_BASE IO_ADDRESS(0xfffbe000) -#define OMAP730_GPIO6_BASE IO_ADDRESS(0xfffbe800) +#define OMAP730_GPIO1_BASE OMAP1_IO_ADDRESS(0xfffbc000) +#define OMAP730_GPIO2_BASE OMAP1_IO_ADDRESS(0xfffbc800) +#define OMAP730_GPIO3_BASE OMAP1_IO_ADDRESS(0xfffbd000) +#define OMAP730_GPIO4_BASE OMAP1_IO_ADDRESS(0xfffbd800) +#define OMAP730_GPIO5_BASE OMAP1_IO_ADDRESS(0xfffbe000) +#define OMAP730_GPIO6_BASE OMAP1_IO_ADDRESS(0xfffbe800) #define OMAP730_GPIO_DATA_INPUT 0x00 #define OMAP730_GPIO_DATA_OUTPUT 0x04 #define OMAP730_GPIO_DIR_CONTROL 0x08 @@ -86,12 +86,12 @@ /* * OMAP850 specific GPIO registers */ -#define OMAP850_GPIO1_BASE IO_ADDRESS(0xfffbc000) -#define OMAP850_GPIO2_BASE IO_ADDRESS(0xfffbc800) -#define OMAP850_GPIO3_BASE IO_ADDRESS(0xfffbd000) -#define OMAP850_GPIO4_BASE IO_ADDRESS(0xfffbd800) -#define OMAP850_GPIO5_BASE IO_ADDRESS(0xfffbe000) -#define OMAP850_GPIO6_BASE IO_ADDRESS(0xfffbe800) +#define OMAP850_GPIO1_BASE OMAP1_IO_ADDRESS(0xfffbc000) +#define OMAP850_GPIO2_BASE OMAP1_IO_ADDRESS(0xfffbc800) +#define OMAP850_GPIO3_BASE OMAP1_IO_ADDRESS(0xfffbd000) +#define OMAP850_GPIO4_BASE OMAP1_IO_ADDRESS(0xfffbd800) +#define OMAP850_GPIO5_BASE OMAP1_IO_ADDRESS(0xfffbe000) +#define OMAP850_GPIO6_BASE OMAP1_IO_ADDRESS(0xfffbe800) #define OMAP850_GPIO_DATA_INPUT 0x00 #define OMAP850_GPIO_DATA_OUTPUT 0x04 #define OMAP850_GPIO_DIR_CONTROL 0x08 @@ -99,19 +99,21 @@ #define OMAP850_GPIO_INT_MASK 0x10 #define OMAP850_GPIO_INT_STATUS 0x14 +#define OMAP1_MPUIO_VBASE OMAP1_IO_ADDRESS(OMAP_MPUIO_BASE) + /* * omap24xx specific GPIO registers */ -#define OMAP242X_GPIO1_BASE IO_ADDRESS(0x48018000) -#define OMAP242X_GPIO2_BASE IO_ADDRESS(0x4801a000) -#define OMAP242X_GPIO3_BASE IO_ADDRESS(0x4801c000) -#define OMAP242X_GPIO4_BASE IO_ADDRESS(0x4801e000) +#define OMAP242X_GPIO1_BASE OMAP2_IO_ADDRESS(0x48018000) +#define OMAP242X_GPIO2_BASE OMAP2_IO_ADDRESS(0x4801a000) +#define OMAP242X_GPIO3_BASE OMAP2_IO_ADDRESS(0x4801c000) +#define OMAP242X_GPIO4_BASE OMAP2_IO_ADDRESS(0x4801e000) -#define OMAP243X_GPIO1_BASE IO_ADDRESS(0x4900C000) -#define OMAP243X_GPIO2_BASE IO_ADDRESS(0x4900E000) -#define OMAP243X_GPIO3_BASE IO_ADDRESS(0x49010000) -#define OMAP243X_GPIO4_BASE IO_ADDRESS(0x49012000) -#define OMAP243X_GPIO5_BASE IO_ADDRESS(0x480B6000) +#define OMAP243X_GPIO1_BASE OMAP2_IO_ADDRESS(0x4900C000) +#define OMAP243X_GPIO2_BASE OMAP2_IO_ADDRESS(0x4900E000) +#define OMAP243X_GPIO3_BASE OMAP2_IO_ADDRESS(0x49010000) +#define OMAP243X_GPIO4_BASE OMAP2_IO_ADDRESS(0x49012000) +#define OMAP243X_GPIO5_BASE OMAP2_IO_ADDRESS(0x480B6000) #define OMAP24XX_GPIO_REVISION 0x0000 #define OMAP24XX_GPIO_SYSCONFIG 0x0010 @@ -142,24 +144,22 @@ * omap34xx specific GPIO registers */ -#define OMAP34XX_GPIO1_BASE IO_ADDRESS(0x48310000) -#define OMAP34XX_GPIO2_BASE IO_ADDRESS(0x49050000) -#define OMAP34XX_GPIO3_BASE IO_ADDRESS(0x49052000) -#define OMAP34XX_GPIO4_BASE IO_ADDRESS(0x49054000) -#define OMAP34XX_GPIO5_BASE IO_ADDRESS(0x49056000) -#define OMAP34XX_GPIO6_BASE IO_ADDRESS(0x49058000) +#define OMAP34XX_GPIO1_BASE OMAP2_IO_ADDRESS(0x48310000) +#define OMAP34XX_GPIO2_BASE OMAP2_IO_ADDRESS(0x49050000) +#define OMAP34XX_GPIO3_BASE OMAP2_IO_ADDRESS(0x49052000) +#define OMAP34XX_GPIO4_BASE OMAP2_IO_ADDRESS(0x49054000) +#define OMAP34XX_GPIO5_BASE OMAP2_IO_ADDRESS(0x49056000) +#define OMAP34XX_GPIO6_BASE OMAP2_IO_ADDRESS(0x49058000) /* * OMAP44XX specific GPIO registers */ -#define OMAP44XX_GPIO1_BASE IO_ADDRESS(0x4a310000) -#define OMAP44XX_GPIO2_BASE IO_ADDRESS(0x48055000) -#define OMAP44XX_GPIO3_BASE IO_ADDRESS(0x48057000) -#define OMAP44XX_GPIO4_BASE IO_ADDRESS(0x48059000) -#define OMAP44XX_GPIO5_BASE IO_ADDRESS(0x4805B000) -#define OMAP44XX_GPIO6_BASE IO_ADDRESS(0x4805D000) - -#define OMAP_MPUIO_VBASE IO_ADDRESS(OMAP_MPUIO_BASE) +#define OMAP44XX_GPIO1_BASE OMAP2_IO_ADDRESS(0x4a310000) +#define OMAP44XX_GPIO2_BASE OMAP2_IO_ADDRESS(0x48055000) +#define OMAP44XX_GPIO3_BASE OMAP2_IO_ADDRESS(0x48057000) +#define OMAP44XX_GPIO4_BASE OMAP2_IO_ADDRESS(0x48059000) +#define OMAP44XX_GPIO5_BASE OMAP2_IO_ADDRESS(0x4805B000) +#define OMAP44XX_GPIO6_BASE OMAP2_IO_ADDRESS(0x4805D000) struct gpio_bank { void __iomem *base; @@ -195,7 +195,7 @@ struct gpio_bank { #ifdef CONFIG_ARCH_OMAP16XX static struct gpio_bank gpio_bank_1610[5] = { - { OMAP_MPUIO_VBASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO}, + { OMAP1_MPUIO_VBASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO}, { OMAP1610_GPIO1_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1610 }, { OMAP1610_GPIO2_BASE, INT_1610_GPIO_BANK2, IH_GPIO_BASE + 16, METHOD_GPIO_1610 }, { OMAP1610_GPIO3_BASE, INT_1610_GPIO_BANK3, IH_GPIO_BASE + 32, METHOD_GPIO_1610 }, @@ -205,14 +205,14 @@ static struct gpio_bank gpio_bank_1610[5] = { #ifdef CONFIG_ARCH_OMAP15XX static struct gpio_bank gpio_bank_1510[2] = { - { OMAP_MPUIO_VBASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, + { OMAP1_MPUIO_VBASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, { OMAP1510_GPIO_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1510 } }; #endif #ifdef CONFIG_ARCH_OMAP730 static struct gpio_bank gpio_bank_730[7] = { - { OMAP_MPUIO_VBASE, INT_730_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, + { OMAP1_MPUIO_VBASE, INT_730_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, { OMAP730_GPIO1_BASE, INT_730_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_730 }, { OMAP730_GPIO2_BASE, INT_730_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_730 }, { OMAP730_GPIO3_BASE, INT_730_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_730 }, diff --git a/arch/arm/plat-omap/include/mach/control.h b/arch/arm/plat-omap/include/mach/control.h index 8140dbccb7b..826d317cdbe 100644 --- a/arch/arm/plat-omap/include/mach/control.h +++ b/arch/arm/plat-omap/include/mach/control.h @@ -20,15 +20,15 @@ #ifndef __ASSEMBLY__ #define OMAP242X_CTRL_REGADDR(reg) \ - IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) + OMAP2_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) #define OMAP243X_CTRL_REGADDR(reg) \ - IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) + OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) #define OMAP343X_CTRL_REGADDR(reg) \ - IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) + OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) #else -#define OMAP242X_CTRL_REGADDR(reg) IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) -#define OMAP243X_CTRL_REGADDR(reg) IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) -#define OMAP343X_CTRL_REGADDR(reg) IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) +#define OMAP242X_CTRL_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) +#define OMAP243X_CTRL_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) +#define OMAP343X_CTRL_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) #endif /* __ASSEMBLY__ */ /* diff --git a/arch/arm/plat-omap/include/mach/entry-macro.S b/arch/arm/plat-omap/include/mach/entry-macro.S index 56426ed45ef..a5592991634 100644 --- a/arch/arm/plat-omap/include/mach/entry-macro.S +++ b/arch/arm/plat-omap/include/mach/entry-macro.S @@ -41,7 +41,7 @@ .endm .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \base, =IO_ADDRESS(OMAP_IH1_BASE) + ldr \base, =OMAP1_IO_ADDRESS(OMAP_IH1_BASE) ldr \irqnr, [\base, #IRQ_ITR_REG_OFFSET] ldr \tmp, [\base, #IRQ_MIR_REG_OFFSET] mov \irqstat, #0xffffffff @@ -53,7 +53,7 @@ cmp \irqnr, #0 ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET] cmpeq \irqnr, #INT_IH2_IRQ - ldreq \base, =IO_ADDRESS(OMAP_IH2_BASE) + ldreq \base, =OMAP1_IO_ADDRESS(OMAP_IH2_BASE) ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET] addeqs \irqnr, \irqnr, #32 1510: @@ -68,9 +68,9 @@ /* REVISIT: This should be set dynamically if CONFIG_MULTI_OMAP2 is selected */ #if defined(CONFIG_ARCH_OMAP2420) || defined(CONFIG_ARCH_OMAP2430) -#define OMAP2_VA_IC_BASE IO_ADDRESS(OMAP24XX_IC_BASE) +#define OMAP2_VA_IC_BASE OMAP2_IO_ADDRESS(OMAP24XX_IC_BASE) #elif defined(CONFIG_ARCH_OMAP34XX) -#define OMAP2_VA_IC_BASE IO_ADDRESS(OMAP34XX_IC_BASE) +#define OMAP2_VA_IC_BASE OMAP2_IO_ADDRESS(OMAP34XX_IC_BASE) #endif #if defined(CONFIG_ARCH_OMAP4) #include diff --git a/arch/arm/plat-omap/include/mach/io.h b/arch/arm/plat-omap/include/mach/io.h index 21fb0efdda8..55659809478 100644 --- a/arch/arm/plat-omap/include/mach/io.h +++ b/arch/arm/plat-omap/include/mach/io.h @@ -54,15 +54,23 @@ * ---------------------------------------------------------------------------- */ +#ifdef __ASSEMBLER__ +#define IOMEM(x) (x) +#else +#define IOMEM(x) ((void __force __iomem *)(x)) +#endif + +#define OMAP1_IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */ +#define OMAP1_IO_ADDRESS(pa) IOMEM((pa) - OMAP1_IO_OFFSET) + +#define OMAP2_IO_OFFSET 0x90000000 +#define OMAP2_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_IO_OFFSET) /* L3 and L4 */ + #if defined(CONFIG_ARCH_OMAP1) #define IO_PHYS 0xFFFB0000 -#define IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */ #define IO_SIZE 0x40000 -#define IO_VIRT (IO_PHYS - IO_OFFSET) -#define __IO_ADDRESS(pa) ((pa) - IO_OFFSET) -#define __OMAP1_IO_ADDRESS(pa) ((pa) - IO_OFFSET) -#define io_v2p(va) ((va) + IO_OFFSET) +#define IO_VIRT (IO_PHYS - OMAP1_IO_OFFSET) #elif defined(CONFIG_ARCH_OMAP2) @@ -87,11 +95,6 @@ #define OMAP243X_SMS_VIRT 0xFC000000 #define OMAP243X_SMS_SIZE SZ_1M -#define IO_OFFSET 0x90000000 -#define __IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ -#define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ -#define io_v2p(va) ((va) - IO_OFFSET) /* Works for L3 and L4 */ - /* DSP */ #define DSP_MEM_24XX_PHYS OMAP2420_DSP_MEM_BASE /* 0x58000000 */ #define DSP_MEM_24XX_VIRT 0xe0000000 @@ -143,12 +146,6 @@ #define OMAP343X_SDRC_VIRT 0xFD000000 #define OMAP343X_SDRC_SIZE SZ_1M - -#define IO_OFFSET 0x90000000 -#define __IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ -#define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ -#define io_v2p(va) ((va) - IO_OFFSET)/* Works for L3 and L4 */ - /* DSP */ #define DSP_MEM_34XX_PHYS OMAP34XX_DSP_MEM_BASE /* 0x58000000 */ #define DSP_MEM_34XX_VIRT 0xe0000000 @@ -188,39 +185,20 @@ #define OMAP44XX_GPMC_VIRT 0xe0000000 #define OMAP44XX_GPMC_SIZE SZ_1M - -#define IO_OFFSET 0x90000000 -#define __IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ -#define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ -#define io_v2p(va) ((va) - IO_OFFSET)/* Works for L3 and L4 */ - #endif -#define IO_ADDRESS(pa) IOMEM(__IO_ADDRESS(pa)) -#define OMAP1_IO_ADDRESS(pa) IOMEM(__OMAP1_IO_ADDRESS(pa)) -#define OMAP2_IO_ADDRESS(pa) IOMEM(__OMAP2_IO_ADDRESS(pa)) - -#ifdef __ASSEMBLER__ -#define IOMEM(x) (x) -#else -#define IOMEM(x) ((void __force __iomem *)(x)) +#ifndef __ASSEMBLER__ /* - * Functions to access the OMAP IO region - * - * NOTE: - Use omap_read/write[bwl] for physical register addresses - * - Use __raw_read/write[bwl]() for virtual register addresses - * - Use IO_ADDRESS(phys_addr) to convert registers to virtual addresses - * - DO NOT use hardcoded virtual addresses to allow changing the - * IO address space again if needed + * NOTE: Please use ioremap + __raw_read/write where possible instead of these */ -#define omap_readb(a) __raw_readb(IO_ADDRESS(a)) -#define omap_readw(a) __raw_readw(IO_ADDRESS(a)) -#define omap_readl(a) __raw_readl(IO_ADDRESS(a)) -#define omap_writeb(v,a) __raw_writeb(v, IO_ADDRESS(a)) -#define omap_writew(v,a) __raw_writew(v, IO_ADDRESS(a)) -#define omap_writel(v,a) __raw_writel(v, IO_ADDRESS(a)) +extern u8 omap_readb(u32 pa); +extern u16 omap_readw(u32 pa); +extern u32 omap_readl(u32 pa); +extern void omap_writeb(u8 v, u32 pa); +extern void omap_writew(u16 v, u32 pa); +extern void omap_writel(u32 v, u32 pa); struct omap_sdrc_params; diff --git a/arch/arm/plat-omap/include/mach/mtd-xip.h b/arch/arm/plat-omap/include/mach/mtd-xip.h index 39b591ff54b..f82a8dcaad9 100644 --- a/arch/arm/plat-omap/include/mach/mtd-xip.h +++ b/arch/arm/plat-omap/include/mach/mtd-xip.h @@ -25,7 +25,7 @@ typedef struct { } xip_omap_mpu_timer_regs_t; #define xip_omap_mpu_timer_base(n) \ -((volatile xip_omap_mpu_timer_regs_t*)IO_ADDRESS(OMAP_MPU_TIMER_BASE + \ +((volatile xip_omap_mpu_timer_regs_t*)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE + \ (n)*OMAP_MPU_TIMER_OFFSET)) static inline unsigned long xip_omap_mpu_timer_read(int nr) diff --git a/arch/arm/plat-omap/include/mach/omap44xx.h b/arch/arm/plat-omap/include/mach/omap44xx.h index 15dec7f1c7c..b3ba5ac7b4a 100644 --- a/arch/arm/plat-omap/include/mach/omap44xx.h +++ b/arch/arm/plat-omap/include/mach/omap44xx.h @@ -33,14 +33,14 @@ #define IRQ_SIR_IRQ 0x0040 #define OMAP44XX_GIC_DIST_BASE 0x48241000 #define OMAP44XX_GIC_CPU_BASE 0x48240100 -#define OMAP44XX_VA_GIC_CPU_BASE IO_ADDRESS(OMAP44XX_GIC_CPU_BASE) +#define OMAP44XX_VA_GIC_CPU_BASE OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE) #define OMAP44XX_SCU_BASE 0x48240000 -#define OMAP44XX_VA_SCU_BASE IO_ADDRESS(OMAP44XX_SCU_BASE) +#define OMAP44XX_VA_SCU_BASE OMAP2_IO_ADDRESS(OMAP44XX_SCU_BASE) #define OMAP44XX_LOCAL_TWD_BASE 0x48240600 -#define OMAP44XX_VA_LOCAL_TWD_BASE IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE) +#define OMAP44XX_VA_LOCAL_TWD_BASE OMAP2_IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE) #define OMAP44XX_LOCAL_TWD_SIZE 0x00000100 #define OMAP44XX_WKUPGEN_BASE 0x48281000 -#define OMAP44XX_VA_WKUPGEN_BASE IO_ADDRESS(OMAP44XX_WKUPGEN_BASE) +#define OMAP44XX_VA_WKUPGEN_BASE OMAP2_IO_ADDRESS(OMAP44XX_WKUPGEN_BASE) #endif /* __ASM_ARCH_OMAP44XX_H */ diff --git a/arch/arm/plat-omap/include/mach/sdrc.h b/arch/arm/plat-omap/include/mach/sdrc.h index 0be18e4ff18..93f70d2cbce 100644 --- a/arch/arm/plat-omap/include/mach/sdrc.h +++ b/arch/arm/plat-omap/include/mach/sdrc.h @@ -71,11 +71,11 @@ */ #define OMAP242X_SMS_REGADDR(reg) \ - (void __iomem *)IO_ADDRESS(OMAP2420_SMS_BASE + reg) + (void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_SMS_BASE + reg) #define OMAP243X_SMS_REGADDR(reg) \ - (void __iomem *)IO_ADDRESS(OMAP243X_SMS_BASE + reg) + (void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_SMS_BASE + reg) #define OMAP343X_SMS_REGADDR(reg) \ - (void __iomem *)IO_ADDRESS(OMAP343X_SMS_BASE + reg) + (void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_SMS_BASE + reg) /* SMS register offsets - read/write with sms_{read,write}_reg() */ diff --git a/arch/arm/plat-omap/io.c b/arch/arm/plat-omap/io.c index 9b42d72d96c..d491ad15f19 100644 --- a/arch/arm/plat-omap/io.c +++ b/arch/arm/plat-omap/io.c @@ -132,3 +132,61 @@ void omap_iounmap(volatile void __iomem *addr) __iounmap(addr); } EXPORT_SYMBOL(omap_iounmap); + +/* + * NOTE: Please use ioremap + __raw_read/write where possible instead of these + */ + +u8 omap_readb(u32 pa) +{ + if (cpu_class_is_omap1()) + return __raw_readb(OMAP1_IO_ADDRESS(pa)); + else + return __raw_readb(OMAP2_IO_ADDRESS(pa)); +} +EXPORT_SYMBOL(omap_readb); + +u16 omap_readw(u32 pa) +{ + if (cpu_class_is_omap1()) + return __raw_readw(OMAP1_IO_ADDRESS(pa)); + else + return __raw_readw(OMAP2_IO_ADDRESS(pa)); +} +EXPORT_SYMBOL(omap_readw); + +u32 omap_readl(u32 pa) +{ + if (cpu_class_is_omap1()) + return __raw_readl(OMAP1_IO_ADDRESS(pa)); + else + return __raw_readl(OMAP2_IO_ADDRESS(pa)); +} +EXPORT_SYMBOL(omap_readl); + +void omap_writeb(u8 v, u32 pa) +{ + if (cpu_class_is_omap1()) + __raw_writeb(v, OMAP1_IO_ADDRESS(pa)); + else + __raw_writeb(v, OMAP2_IO_ADDRESS(pa)); +} +EXPORT_SYMBOL(omap_writeb); + +void omap_writew(u16 v, u32 pa) +{ + if (cpu_class_is_omap1()) + __raw_writew(v, OMAP1_IO_ADDRESS(pa)); + else + __raw_writew(v, OMAP2_IO_ADDRESS(pa)); +} +EXPORT_SYMBOL(omap_writew); + +void omap_writel(u32 v, u32 pa) +{ + if (cpu_class_is_omap1()) + __raw_writel(v, OMAP1_IO_ADDRESS(pa)); + else + __raw_writel(v, OMAP2_IO_ADDRESS(pa)); +} +EXPORT_SYMBOL(omap_writel); diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c index 5eae7876979..925f64711c3 100644 --- a/arch/arm/plat-omap/sram.c +++ b/arch/arm/plat-omap/sram.c @@ -56,16 +56,16 @@ #define SRAM_BOOTLOADER_SZ 0x80 #endif -#define OMAP24XX_VA_REQINFOPERM0 IO_ADDRESS(0x68005048) -#define OMAP24XX_VA_READPERM0 IO_ADDRESS(0x68005050) -#define OMAP24XX_VA_WRITEPERM0 IO_ADDRESS(0x68005058) - -#define OMAP34XX_VA_REQINFOPERM0 IO_ADDRESS(0x68012848) -#define OMAP34XX_VA_READPERM0 IO_ADDRESS(0x68012850) -#define OMAP34XX_VA_WRITEPERM0 IO_ADDRESS(0x68012858) -#define OMAP34XX_VA_ADDR_MATCH2 IO_ADDRESS(0x68012880) -#define OMAP34XX_VA_SMS_RG_ATT0 IO_ADDRESS(0x6C000048) -#define OMAP34XX_VA_CONTROL_STAT IO_ADDRESS(0x480022F0) +#define OMAP24XX_VA_REQINFOPERM0 OMAP2_IO_ADDRESS(0x68005048) +#define OMAP24XX_VA_READPERM0 OMAP2_IO_ADDRESS(0x68005050) +#define OMAP24XX_VA_WRITEPERM0 OMAP2_IO_ADDRESS(0x68005058) + +#define OMAP34XX_VA_REQINFOPERM0 OMAP2_IO_ADDRESS(0x68012848) +#define OMAP34XX_VA_READPERM0 OMAP2_IO_ADDRESS(0x68012850) +#define OMAP34XX_VA_WRITEPERM0 OMAP2_IO_ADDRESS(0x68012858) +#define OMAP34XX_VA_ADDR_MATCH2 OMAP2_IO_ADDRESS(0x68012880) +#define OMAP34XX_VA_SMS_RG_ATT0 OMAP2_IO_ADDRESS(0x6C000048) +#define OMAP34XX_VA_CONTROL_STAT OMAP2_IO_ADDRESS(0x480022F0) #define GP_DEVICE 0x300 diff --git a/drivers/video/omap/dispc.c b/drivers/video/omap/dispc.c index 148cbcc3960..915439dc05a 100644 --- a/drivers/video/omap/dispc.c +++ b/drivers/video/omap/dispc.c @@ -212,9 +212,9 @@ static void enable_rfbi_mode(int enable) dispc_write_reg(DISPC_CONTROL, l); /* Set bypass mode in RFBI module */ - l = __raw_readl(IO_ADDRESS(RFBI_CONTROL)); + l = __raw_readl(OMAP2_IO_ADDRESS(RFBI_CONTROL)); l |= enable ? 0 : (1 << 1); - __raw_writel(l, IO_ADDRESS(RFBI_CONTROL)); + __raw_writel(l, OMAP2_IO_ADDRESS(RFBI_CONTROL)); } static void set_lcd_data_lines(int data_lines) @@ -1421,7 +1421,7 @@ static int omap_dispc_init(struct omapfb_device *fbdev, int ext_mode, } /* L3 firewall setting: enable access to OCM RAM */ - __raw_writel(0x402000b0, IO_ADDRESS(0x680050a0)); + __raw_writel(0x402000b0, OMAP2_IO_ADDRESS(0x680050a0)); if ((r = alloc_palette_ram()) < 0) goto fail2; -- cgit v1.2.3-70-g09d2 From 15ac408ee5a509053a765b816e9179515329369f Mon Sep 17 00:00:00 2001 From: Kalle Valo Date: Fri, 28 Aug 2009 10:51:31 -0700 Subject: OMAP: UART: drop OMAP_TAG_UART, enable all UARTs, auto-disabled on idle OMAP tags are deprecrated so drop them. Drop UART config data which decides which UARTs to enable during boot. This is no longer necessary since serial core code disables clocks after inactivity. Background: with new UART idle code, all on-chip UARTs are idled using a configurable inactivity timer (default 5 seconds.) After the inactivity timer, UART clocks are disabled automatically. Signed-off-by: Kalle Valo Signed-off-by: Kevin Hilman Signed-off-by: Tony Lindgren --- arch/arm/mach-omap1/board-ams-delta.c | 5 ----- arch/arm/mach-omap1/board-fsample.c | 5 ----- arch/arm/mach-omap1/board-generic.c | 5 ----- arch/arm/mach-omap1/board-h2.c | 5 ----- arch/arm/mach-omap1/board-h3.c | 5 ----- arch/arm/mach-omap1/board-innovator.c | 5 ----- arch/arm/mach-omap1/board-osk.c | 5 ----- arch/arm/mach-omap1/board-palmte.c | 5 ----- arch/arm/mach-omap1/board-palmtt.c | 5 ----- arch/arm/mach-omap1/board-palmz71.c | 5 ----- arch/arm/mach-omap1/board-perseus2.c | 5 ----- arch/arm/mach-omap1/board-sx1.c | 5 ----- arch/arm/mach-omap1/board-voiceblue.c | 5 ----- arch/arm/mach-omap1/serial.c | 11 ----------- arch/arm/mach-omap2/board-2430sdp.c | 5 ----- arch/arm/mach-omap2/board-3430sdp.c | 5 ----- arch/arm/mach-omap2/board-4430sdp.c | 1 - arch/arm/mach-omap2/board-apollon.c | 5 ----- arch/arm/mach-omap2/board-generic.c | 5 ----- arch/arm/mach-omap2/board-h4.c | 5 ----- arch/arm/mach-omap2/board-ldp.c | 5 ----- arch/arm/mach-omap2/board-omap3beagle.c | 5 ----- arch/arm/mach-omap2/board-omap3evm.c | 5 ----- arch/arm/mach-omap2/board-omap3pandora.c | 5 ----- arch/arm/mach-omap2/board-overo.c | 4 ---- arch/arm/mach-omap2/board-rx51.c | 5 ----- arch/arm/mach-omap2/board-zoom2.c | 5 ----- arch/arm/mach-omap2/serial.c | 12 ------------ arch/arm/plat-omap/include/mach/board.h | 1 - 29 files changed, 149 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 8b40aace9db..580773202ea 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -162,10 +162,6 @@ static struct omap_lcd_config ams_delta_lcd_config __initdata = { .ctrl_name = "internal", }; -static struct omap_uart_config ams_delta_uart_config __initdata = { - .enabled_uarts = 1, -}; - static struct omap_usb_config ams_delta_usb_config __initdata = { .register_host = 1, .hmc_mode = 16, @@ -174,7 +170,6 @@ static struct omap_usb_config ams_delta_usb_config __initdata = { static struct omap_board_config_kernel ams_delta_config[] = { { OMAP_TAG_LCD, &ams_delta_lcd_config }, - { OMAP_TAG_UART, &ams_delta_uart_config }, }; static struct resource ams_delta_kp_resources[] = { diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c index 19e0e923233..a7ead1b9322 100644 --- a/arch/arm/mach-omap1/board-fsample.c +++ b/arch/arm/mach-omap1/board-fsample.c @@ -240,16 +240,11 @@ static int nand_dev_ready(struct omap_nand_platform_data *data) return gpio_get_value(P2_NAND_RB_GPIO_PIN); } -static struct omap_uart_config fsample_uart_config __initdata = { - .enabled_uarts = ((1 << 0) | (1 << 1)), -}; - static struct omap_lcd_config fsample_lcd_config __initdata = { .ctrl_name = "internal", }; static struct omap_board_config_kernel fsample_config[] = { - { OMAP_TAG_UART, &fsample_uart_config }, { OMAP_TAG_LCD, &fsample_lcd_config }, }; diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c index e724940e86f..fb47239da72 100644 --- a/arch/arm/mach-omap1/board-generic.c +++ b/arch/arm/mach-omap1/board-generic.c @@ -57,12 +57,7 @@ static struct omap_usb_config generic1610_usb_config __initdata = { }; #endif -static struct omap_uart_config generic_uart_config __initdata = { - .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), -}; - static struct omap_board_config_kernel generic_config[] __initdata = { - { OMAP_TAG_UART, &generic_uart_config }, }; static void __init omap_generic_init(void) diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index f695aa053ac..aab860307dc 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c @@ -360,16 +360,11 @@ static struct omap_usb_config h2_usb_config __initdata = { .pins[1] = 3, }; -static struct omap_uart_config h2_uart_config __initdata = { - .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), -}; - static struct omap_lcd_config h2_lcd_config __initdata = { .ctrl_name = "internal", }; static struct omap_board_config_kernel h2_config[] __initdata = { - { OMAP_TAG_UART, &h2_uart_config }, { OMAP_TAG_LCD, &h2_lcd_config }, }; diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c index f597968733b..89586b80b8d 100644 --- a/arch/arm/mach-omap1/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c @@ -313,16 +313,11 @@ static struct omap_usb_config h3_usb_config __initdata = { .pins[1] = 3, }; -static struct omap_uart_config h3_uart_config __initdata = { - .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), -}; - static struct omap_lcd_config h3_lcd_config __initdata = { .ctrl_name = "internal", }; static struct omap_board_config_kernel h3_config[] __initdata = { - { OMAP_TAG_UART, &h3_uart_config }, { OMAP_TAG_LCD, &h3_lcd_config }, }; diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index 2fd98260ea4..cc2abbb2d0f 100644 --- a/arch/arm/mach-omap1/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c @@ -368,13 +368,8 @@ static inline void innovator_mmc_init(void) } #endif -static struct omap_uart_config innovator_uart_config __initdata = { - .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), -}; - static struct omap_board_config_kernel innovator_config[] = { { OMAP_TAG_LCD, NULL }, - { OMAP_TAG_UART, &innovator_uart_config }, }; static void __init innovator_init(void) diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index cf3247b15f8..ed891b8a6b1 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c @@ -293,10 +293,6 @@ static struct omap_usb_config osk_usb_config __initdata = { .pins[0] = 2, }; -static struct omap_uart_config osk_uart_config __initdata = { - .enabled_uarts = (1 << 0), -}; - #ifdef CONFIG_OMAP_OSK_MISTRAL static struct omap_lcd_config osk_lcd_config __initdata = { .ctrl_name = "internal", @@ -304,7 +300,6 @@ static struct omap_lcd_config osk_lcd_config __initdata = { #endif static struct omap_board_config_kernel osk_config[] __initdata = { - { OMAP_TAG_UART, &osk_uart_config }, #ifdef CONFIG_OMAP_OSK_MISTRAL { OMAP_TAG_LCD, &osk_lcd_config }, #endif diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c index 886b4c0569b..90dd0431b0d 100644 --- a/arch/arm/mach-omap1/board-palmte.c +++ b/arch/arm/mach-omap1/board-palmte.c @@ -212,10 +212,6 @@ static struct omap_lcd_config palmte_lcd_config __initdata = { .ctrl_name = "internal", }; -static struct omap_uart_config palmte_uart_config __initdata = { - .enabled_uarts = (1 << 0) | (1 << 1) | (0 << 2), -}; - #ifdef CONFIG_APM /* * Values measured in 10 minute intervals averaged over 10 samples. @@ -302,7 +298,6 @@ static void palmte_get_power_status(struct apm_power_info *info, int *battery) static struct omap_board_config_kernel palmte_config[] __initdata = { { OMAP_TAG_LCD, &palmte_lcd_config }, - { OMAP_TAG_UART, &palmte_uart_config }, }; static struct spi_board_info palmte_spi_info[] __initdata = { diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c index 4f1b44831d3..8256139891f 100644 --- a/arch/arm/mach-omap1/board-palmtt.c +++ b/arch/arm/mach-omap1/board-palmtt.c @@ -274,13 +274,8 @@ static struct omap_lcd_config palmtt_lcd_config __initdata = { .ctrl_name = "internal", }; -static struct omap_uart_config palmtt_uart_config __initdata = { - .enabled_uarts = (1 << 0) | (1 << 1) | (0 << 2), -}; - static struct omap_board_config_kernel palmtt_config[] __initdata = { { OMAP_TAG_LCD, &palmtt_lcd_config }, - { OMAP_TAG_UART, &palmtt_uart_config }, }; static void __init omap_mpu_wdt_mode(int mode) { diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c index 9a55c3c5821..81b6bde1c5a 100644 --- a/arch/arm/mach-omap1/board-palmz71.c +++ b/arch/arm/mach-omap1/board-palmz71.c @@ -244,13 +244,8 @@ static struct omap_lcd_config palmz71_lcd_config __initdata = { .ctrl_name = "internal", }; -static struct omap_uart_config palmz71_uart_config __initdata = { - .enabled_uarts = (1 << 0) | (1 << 1) | (0 << 2), -}; - static struct omap_board_config_kernel palmz71_config[] __initdata = { {OMAP_TAG_LCD, &palmz71_lcd_config}, - {OMAP_TAG_UART, &palmz71_uart_config}, }; static irqreturn_t diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c index 3b9f907aa89..83406699f31 100644 --- a/arch/arm/mach-omap1/board-perseus2.c +++ b/arch/arm/mach-omap1/board-perseus2.c @@ -208,16 +208,11 @@ static int nand_dev_ready(struct omap_nand_platform_data *data) return gpio_get_value(P2_NAND_RB_GPIO_PIN); } -static struct omap_uart_config perseus2_uart_config __initdata = { - .enabled_uarts = ((1 << 0) | (1 << 1)), -}; - static struct omap_lcd_config perseus2_lcd_config __initdata = { .ctrl_name = "internal", }; static struct omap_board_config_kernel perseus2_config[] __initdata = { - { OMAP_TAG_UART, &perseus2_uart_config }, { OMAP_TAG_LCD, &perseus2_lcd_config }, }; diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c index c096577695f..02c85ca2e1d 100644 --- a/arch/arm/mach-omap1/board-sx1.c +++ b/arch/arm/mach-omap1/board-sx1.c @@ -369,13 +369,8 @@ static struct platform_device *sx1_devices[] __initdata = { }; /*-----------------------------------------*/ -static struct omap_uart_config sx1_uart_config __initdata = { - .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), -}; - static struct omap_board_config_kernel sx1_config[] __initdata = { { OMAP_TAG_LCD, &sx1_lcd_config }, - { OMAP_TAG_UART, &sx1_uart_config }, }; /*-----------------------------------------*/ diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c index 98275e03dad..c06e7a55347 100644 --- a/arch/arm/mach-omap1/board-voiceblue.c +++ b/arch/arm/mach-omap1/board-voiceblue.c @@ -140,12 +140,7 @@ static struct omap_usb_config voiceblue_usb_config __initdata = { .pins[2] = 6, }; -static struct omap_uart_config voiceblue_uart_config __initdata = { - .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), -}; - static struct omap_board_config_kernel voiceblue_config[] = { - { OMAP_TAG_UART, &voiceblue_uart_config }, }; static void __init voiceblue_init_irq(void) diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c index 6f54b2c591c..d496e50fec4 100644 --- a/arch/arm/mach-omap1/serial.c +++ b/arch/arm/mach-omap1/serial.c @@ -109,7 +109,6 @@ static struct platform_device serial_device = { void __init omap_serial_init(void) { int i; - const struct omap_uart_config *info; if (cpu_is_omap730()) { serial_platform_data[0].regshift = 0; @@ -131,19 +130,9 @@ void __init omap_serial_init(void) serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16; } - info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config); - if (info == NULL) - return; - for (i = 0; i < OMAP_MAX_NR_PORTS; i++) { unsigned char reg; - if (!((1 << i) & info->enabled_uarts)) { - serial_platform_data[i].membase = NULL; - serial_platform_data[i].mapbase = 0; - continue; - } - switch (i) { case 0: uart1_ck = clk_get(NULL, "uart1_ck"); diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c index 8ec2a132904..7f5a74d5924 100644 --- a/arch/arm/mach-omap2/board-2430sdp.c +++ b/arch/arm/mach-omap2/board-2430sdp.c @@ -146,12 +146,7 @@ static void __init omap_2430sdp_init_irq(void) omap_gpio_init(); } -static struct omap_uart_config sdp2430_uart_config __initdata = { - .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), -}; - static struct omap_board_config_kernel sdp2430_config[] = { - {OMAP_TAG_UART, &sdp2430_uart_config}, {OMAP_TAG_LCD, &sdp2430_lcd_config}, }; diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c index ac262cd7450..7e9b76cc767 100644 --- a/arch/arm/mach-omap2/board-3430sdp.c +++ b/arch/arm/mach-omap2/board-3430sdp.c @@ -174,16 +174,11 @@ static void __init omap_3430sdp_init_irq(void) omap_gpio_init(); } -static struct omap_uart_config sdp3430_uart_config __initdata = { - .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), -}; - static struct omap_lcd_config sdp3430_lcd_config __initdata = { .ctrl_name = "internal", }; static struct omap_board_config_kernel sdp3430_config[] __initdata = { - { OMAP_TAG_UART, &sdp3430_uart_config }, { OMAP_TAG_LCD, &sdp3430_lcd_config }, }; diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index bdfda36d8aa..f22f429c88f 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c @@ -47,7 +47,6 @@ static struct omap_lcd_config sdp4430_lcd_config __initdata = { }; static struct omap_board_config_kernel sdp4430_config[] __initdata = { - { OMAP_TAG_UART, &sdp4430_uart_config }, { OMAP_TAG_LCD, &sdp4430_lcd_config }, }; diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c index dcfc20d0389..615f21d1eb2 100644 --- a/arch/arm/mach-omap2/board-apollon.c +++ b/arch/arm/mach-omap2/board-apollon.c @@ -256,10 +256,6 @@ static void __init omap_apollon_init_irq(void) apollon_init_smc91x(); } -static struct omap_uart_config apollon_uart_config __initdata = { - .enabled_uarts = (1 << 0) | (0 << 1) | (0 << 2), -}; - static struct omap_usb_config apollon_usb_config __initdata = { .register_dev = 1, .hmc_mode = 0x14, /* 0:dev 1:host1 2:disable */ @@ -272,7 +268,6 @@ static struct omap_lcd_config apollon_lcd_config __initdata = { }; static struct omap_board_config_kernel apollon_config[] = { - { OMAP_TAG_UART, &apollon_uart_config }, { OMAP_TAG_LCD, &apollon_lcd_config }, }; diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index fd00aa03690..3e401c5b6e4 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -37,12 +37,7 @@ static void __init omap_generic_init_irq(void) omap_init_irq(); } -static struct omap_uart_config generic_uart_config __initdata = { - .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), -}; - static struct omap_board_config_kernel generic_config[] = { - { OMAP_TAG_UART, &generic_uart_config }, }; static void __init omap_generic_init(void) diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c index 7b1d61d5bb2..b6501d241c1 100644 --- a/arch/arm/mach-omap2/board-h4.c +++ b/arch/arm/mach-omap2/board-h4.c @@ -276,10 +276,6 @@ static void __init omap_h4_init_irq(void) h4_init_flash(); } -static struct omap_uart_config h4_uart_config __initdata = { - .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), -}; - static struct omap_lcd_config h4_lcd_config __initdata = { .ctrl_name = "internal", }; @@ -318,7 +314,6 @@ static struct omap_usb_config h4_usb_config __initdata = { }; static struct omap_board_config_kernel h4_config[] = { - { OMAP_TAG_UART, &h4_uart_config }, { OMAP_TAG_LCD, &h4_lcd_config }, }; diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index ea383f88cb1..2dd6806a1e8 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c @@ -276,10 +276,6 @@ static void __init omap_ldp_init_irq(void) ldp_init_smsc911x(); } -static struct omap_uart_config ldp_uart_config __initdata = { - .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), -}; - static struct platform_device ldp_lcd_device = { .name = "ldp_lcd", .id = -1, @@ -290,7 +286,6 @@ static struct omap_lcd_config ldp_lcd_config __initdata = { }; static struct omap_board_config_kernel ldp_config[] __initdata = { - { OMAP_TAG_UART, &ldp_uart_config }, { OMAP_TAG_LCD, &ldp_lcd_config }, }; diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index e00ba128cec..201360781ac 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c @@ -108,10 +108,6 @@ static struct platform_device omap3beagle_nand_device = { #include "sdram-micron-mt46h32m32lf-6.h" -static struct omap_uart_config omap3_beagle_uart_config __initdata = { - .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), -}; - static struct twl4030_hsmmc_info mmc[] = { { .mmc = 1, @@ -345,7 +341,6 @@ static struct platform_device keys_gpio = { }; static struct omap_board_config_kernel omap3_beagle_config[] __initdata = { - { OMAP_TAG_UART, &omap3_beagle_uart_config }, { OMAP_TAG_LCD, &omap3_beagle_lcd_config }, }; diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index c4b144647dc..3e0435371ce 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c @@ -92,10 +92,6 @@ static inline void __init omap3evm_init_smc911x(void) gpio_direction_input(OMAP3EVM_ETHR_GPIO_IRQ); } -static struct omap_uart_config omap3_evm_uart_config __initdata = { - .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), -}; - static struct twl4030_hsmmc_info mmc[] = { { .mmc = 1, @@ -287,7 +283,6 @@ static void __init omap3_evm_init_irq(void) } static struct omap_board_config_kernel omap3_evm_config[] __initdata = { - { OMAP_TAG_UART, &omap3_evm_uart_config }, { OMAP_TAG_LCD, &omap3_evm_lcd_config }, }; diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c index 864ee3d021f..8236708c362 100644 --- a/arch/arm/mach-omap2/board-omap3pandora.c +++ b/arch/arm/mach-omap2/board-omap3pandora.c @@ -213,10 +213,6 @@ static struct twl4030_hsmmc_info omap3pandora_mmc[] = { {} /* Terminator */ }; -static struct omap_uart_config omap3pandora_uart_config __initdata = { - .enabled_uarts = (1 << 2), /* UART3 */ -}; - static struct regulator_consumer_supply pandora_vmmc1_supply = { .supply = "vmmc", }; @@ -376,7 +372,6 @@ static struct omap_lcd_config omap3pandora_lcd_config __initdata = { }; static struct omap_board_config_kernel omap3pandora_config[] __initdata = { - { OMAP_TAG_UART, &omap3pandora_uart_config }, { OMAP_TAG_LCD, &omap3pandora_lcd_config }, }; diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c index 6bce23004aa..eb78e6eab4f 100644 --- a/arch/arm/mach-omap2/board-overo.c +++ b/arch/arm/mach-omap2/board-overo.c @@ -271,9 +271,6 @@ static void __init overo_flash_init(void) printk(KERN_ERR "Unable to register NAND device\n"); } } -static struct omap_uart_config overo_uart_config __initdata = { - .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), -}; static struct twl4030_hsmmc_info mmc[] = { { @@ -378,7 +375,6 @@ static struct omap_lcd_config overo_lcd_config __initdata = { }; static struct omap_board_config_kernel overo_config[] __initdata = { - { OMAP_TAG_UART, &overo_uart_config }, { OMAP_TAG_LCD, &overo_lcd_config }, }; diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c index 1c9e07fe826..c0d13401425 100644 --- a/arch/arm/mach-omap2/board-rx51.c +++ b/arch/arm/mach-omap2/board-rx51.c @@ -31,10 +31,6 @@ #include #include -static struct omap_uart_config rx51_uart_config = { - .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), -}; - static struct omap_lcd_config rx51_lcd_config = { .ctrl_name = "internal", }; @@ -52,7 +48,6 @@ static struct omap_fbmem_config rx51_fbmem2_config = { }; static struct omap_board_config_kernel rx51_config[] = { - { OMAP_TAG_UART, &rx51_uart_config }, { OMAP_TAG_FBMEM, &rx51_fbmem0_config }, { OMAP_TAG_FBMEM, &rx51_fbmem1_config }, { OMAP_TAG_FBMEM, &rx51_fbmem2_config }, diff --git a/arch/arm/mach-omap2/board-zoom2.c b/arch/arm/mach-omap2/board-zoom2.c index 427b7b8b123..3a42eca1ad8 100644 --- a/arch/arm/mach-omap2/board-zoom2.c +++ b/arch/arm/mach-omap2/board-zoom2.c @@ -30,12 +30,7 @@ static void __init omap_zoom2_init_irq(void) omap_gpio_init(); } -static struct omap_uart_config zoom2_uart_config __initdata = { - .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), -}; - static struct omap_board_config_kernel zoom2_config[] __initdata = { - { OMAP_TAG_UART, &zoom2_uart_config }, }; static struct twl4030_gpio_platform_data zoom2_gpio_data = { diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index 42449002f60..409b03309af 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c @@ -555,7 +555,6 @@ static struct omap_uart_state omap_uart[OMAP_MAX_NR_PORTS] = { void __init omap_serial_init(void) { int i; - const struct omap_uart_config *info; char name[16]; /* @@ -564,23 +563,12 @@ void __init omap_serial_init(void) * if not needed. */ - info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config); - - if (info == NULL) - return; - for (i = 0; i < OMAP_MAX_NR_PORTS; i++) { struct omap_uart_state *uart = &omap_uart[i]; struct platform_device *pdev = &uart->pdev; struct device *dev = &pdev->dev; struct plat_serial8250_port *p = dev->platform_data; - if (!(info->enabled_uarts & (1 << i))) { - p->membase = NULL; - p->mapbase = 0; - continue; - } - sprintf(name, "uart%d_ick", i+1); uart->ick = clk_get(NULL, name); if (IS_ERR(uart->ick)) { diff --git a/arch/arm/plat-omap/include/mach/board.h b/arch/arm/plat-omap/include/mach/board.h index 0d125868b62..8e913c32281 100644 --- a/arch/arm/plat-omap/include/mach/board.h +++ b/arch/arm/plat-omap/include/mach/board.h @@ -18,7 +18,6 @@ #define OMAP_TAG_CLOCK 0x4f01 #define OMAP_TAG_LCD 0x4f05 #define OMAP_TAG_GPIO_SWITCH 0x4f06 -#define OMAP_TAG_UART 0x4f07 #define OMAP_TAG_FBMEM 0x4f08 #define OMAP_TAG_STI_CONSOLE 0x4f09 #define OMAP_TAG_CAMERA_SENSOR 0x4f0a -- cgit v1.2.3-70-g09d2 From 1b52d5df64bea12bed82dbc1c736638e77d1ce80 Mon Sep 17 00:00:00 2001 From: Kalle Valo Date: Fri, 28 Aug 2009 10:51:37 -0700 Subject: OMAP2: compile usb-tusb6010.c For some reason usb-tusb6010.c was't compiled, add it to Makefile and Kconfig. This is prepraration for upcoming n8x0 support. Signed-off-by: Kalle Valo Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/Kconfig | 5 +++++ arch/arm/mach-omap2/Makefile | 1 + 2 files changed, 6 insertions(+) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index a755eb5e236..bf54686c8b7 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -31,6 +31,11 @@ config MACH_OMAP_GENERIC bool "Generic OMAP board" depends on ARCH_OMAP2 && ARCH_OMAP24XX +config MACH_OMAP2_TUSB6010 + bool + depends on ARCH_OMAP2 && ARCH_OMAP2420 + default y if MACH_NOKIA_N8X0 + config MACH_OMAP_H4 bool "OMAP 2420 H4 board" depends on ARCH_OMAP2 && ARCH_OMAP24XX diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 735bae5b0de..757c84b8eef 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -74,6 +74,7 @@ obj-$(CONFIG_MACH_OMAP_4430SDP) += board-4430sdp.o # Platform specific device init code obj-y += usb-musb.o +obj-$(CONFIG_MACH_OMAP2_TUSB6010) += usb-tusb6010.o onenand-$(CONFIG_MTD_ONENAND_OMAP2) := gpmc-onenand.o obj-y += $(onenand-m) $(onenand-y) -- cgit v1.2.3-70-g09d2 From 6313881292c238190bc119404ae13f65c61b2daa Mon Sep 17 00:00:00 2001 From: Kalle Valo Date: Fri, 28 Aug 2009 10:51:38 -0700 Subject: OMAP2: add board file for Nokia N800 and N810 Add board file for Nokia N800 and N810 devices. Currently only serial ports, onenand and spi are configured, more to come later. Tested on Nokia N800. Signed-off-by: Kalle Valo Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/Kconfig | 4 ++ arch/arm/mach-omap2/Makefile | 2 +- arch/arm/mach-omap2/board-n8x0.c | 150 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 155 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-omap2/board-n8x0.c (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index bf54686c8b7..75b1c7efae7 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -73,6 +73,10 @@ config MACH_OMAP_3430SDP bool "OMAP 3430 SDP board" depends on ARCH_OMAP3 && ARCH_OMAP34XX +config MACH_NOKIA_N8X0 + bool "Nokia N800/N810" + depends on ARCH_OMAP2420 + config MACH_NOKIA_RX51 bool "Nokia RX-51 board" depends on ARCH_OMAP3 && ARCH_OMAP34XX diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 757c84b8eef..8850a247bec 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -62,7 +62,7 @@ obj-$(CONFIG_MACH_OMAP3_PANDORA) += board-omap3pandora.o \ mmc-twl4030.o obj-$(CONFIG_MACH_OMAP_3430SDP) += board-3430sdp.o \ mmc-twl4030.o - +obj-$(CONFIG_MACH_NOKIA_N8X0) += board-n8x0.o obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o \ board-rx51-peripherals.o \ mmc-twl4030.o diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c new file mode 100644 index 00000000000..8341632d260 --- /dev/null +++ b/arch/arm/mach-omap2/board-n8x0.c @@ -0,0 +1,150 @@ +/* + * linux/arch/arm/mach-omap2/board-n8x0.c + * + * Copyright (C) 2005-2009 Nokia Corporation + * Author: Juha Yrjola + * + * Modified from mach-omap2/board-generic.c + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include +#include +#include +#include +#include + +static struct omap2_mcspi_device_config p54spi_mcspi_config = { + .turbo_mode = 0, + .single_channel = 1, +}; + +static struct spi_board_info n800_spi_board_info[] __initdata = { + { + .modalias = "p54spi", + .bus_num = 2, + .chip_select = 0, + .max_speed_hz = 48000000, + .controller_data = &p54spi_mcspi_config, + }, +}; + +#if defined(CONFIG_MTD_ONENAND_OMAP2) || \ + defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) + +static struct mtd_partition onenand_partitions[] = { + { + .name = "bootloader", + .offset = 0, + .size = 0x20000, + .mask_flags = MTD_WRITEABLE, /* Force read-only */ + }, + { + .name = "config", + .offset = MTDPART_OFS_APPEND, + .size = 0x60000, + }, + { + .name = "kernel", + .offset = MTDPART_OFS_APPEND, + .size = 0x200000, + }, + { + .name = "initfs", + .offset = MTDPART_OFS_APPEND, + .size = 0x400000, + }, + { + .name = "rootfs", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL, + }, +}; + +static struct omap_onenand_platform_data board_onenand_data = { + .cs = 0, + .gpio_irq = 26, + .parts = onenand_partitions, + .nr_parts = ARRAY_SIZE(onenand_partitions), + .flags = ONENAND_SYNC_READ, +}; + +static void __init n8x0_onenand_init(void) +{ + gpmc_onenand_init(&board_onenand_data); +} + +#else + +static void __init n8x0_onenand_init(void) {} + +#endif + +static void __init n8x0_map_io(void) +{ + omap2_set_globals_242x(); + omap2_map_common_io(); +} + +static void __init n8x0_init_irq(void) +{ + omap2_init_common_hw(NULL, NULL); + omap_init_irq(); + omap_gpio_init(); +} + +static void __init n8x0_init_machine(void) +{ + /* FIXME: add n810 spi devices */ + spi_register_board_info(n800_spi_board_info, + ARRAY_SIZE(n800_spi_board_info)); + + omap_serial_init(); + n8x0_onenand_init(); +} + +MACHINE_START(NOKIA_N800, "Nokia N800") + .phys_io = 0x48000000, + .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, + .boot_params = 0x80000100, + .map_io = n8x0_map_io, + .init_irq = n8x0_init_irq, + .init_machine = n8x0_init_machine, + .timer = &omap_timer, +MACHINE_END + +MACHINE_START(NOKIA_N810, "Nokia N810") + .phys_io = 0x48000000, + .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, + .boot_params = 0x80000100, + .map_io = n8x0_map_io, + .init_irq = n8x0_init_irq, + .init_machine = n8x0_init_machine, + .timer = &omap_timer, +MACHINE_END + +MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") + .phys_io = 0x48000000, + .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, + .boot_params = 0x80000100, + .map_io = n8x0_map_io, + .init_irq = n8x0_init_irq, + .init_machine = n8x0_init_machine, + .timer = &omap_timer, +MACHINE_END -- cgit v1.2.3-70-g09d2 From 14e0e6796a0d460ac6f7727616161dc317bbbf3a Mon Sep 17 00:00:00 2001 From: Hiroshi DOYU Date: Fri, 28 Aug 2009 10:54:41 -0700 Subject: OMAP: iommu: add initial debugfs support This enables to peek the following data. $ /debug/iommu/isp# ls mem nr_tlb_entries regs mmap pagetable tlb $ /debug/iommu/isp# head pagetable L: da: pa: ----------------------------------------- 2: 00001000 8ae4a002 2: 00002000 8e7bb002 2: 00003000 8ae49002 2: 00004000 8ae65002 ..... Signed-off-by: Hiroshi DOYU Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/iommu2.c | 19 +- arch/arm/plat-omap/Kconfig | 4 + arch/arm/plat-omap/Makefile | 1 + arch/arm/plat-omap/include/mach/iommu.h | 6 +- arch/arm/plat-omap/iommu-debug.c | 415 ++++++++++++++++++++++++++++++++ arch/arm/plat-omap/iommu.c | 23 +- 6 files changed, 449 insertions(+), 19 deletions(-) create mode 100644 arch/arm/plat-omap/iommu-debug.c (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/iommu2.c b/arch/arm/mach-omap2/iommu2.c index 015f22a53ea..2d9b5cc981c 100644 --- a/arch/arm/mach-omap2/iommu2.c +++ b/arch/arm/mach-omap2/iommu2.c @@ -217,10 +217,19 @@ static ssize_t omap2_dump_cr(struct iommu *obj, struct cr_regs *cr, char *buf) } #define pr_reg(name) \ - p += sprintf(p, "%20s: %08x\n", \ - __stringify(name), iommu_read_reg(obj, MMU_##name)); - -static ssize_t omap2_iommu_dump_ctx(struct iommu *obj, char *buf) + do { \ + ssize_t bytes; \ + const char *str = "%20s: %08x\n"; \ + const int maxcol = 32; \ + bytes = snprintf(p, maxcol, str, __stringify(name), \ + iommu_read_reg(obj, MMU_##name)); \ + p += bytes; \ + len -= bytes; \ + if (len < maxcol) \ + goto out; \ + } while (0) + +static ssize_t omap2_iommu_dump_ctx(struct iommu *obj, char *buf, ssize_t len) { char *p = buf; @@ -242,7 +251,7 @@ static ssize_t omap2_iommu_dump_ctx(struct iommu *obj, char *buf) pr_reg(READ_CAM); pr_reg(READ_RAM); pr_reg(EMU_FAULT_AD); - +out: return p - buf; } diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index efe85d09519..ab9f9efc9b6 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig @@ -120,6 +120,10 @@ config OMAP_MBOX_FWK config OMAP_IOMMU tristate +config OMAP_IOMMU_DEBUG + depends on OMAP_IOMMU + tristate + choice prompt "System timer" default OMAP_MPU_TIMER diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile index a8327952395..769a4c20036 100644 --- a/arch/arm/plat-omap/Makefile +++ b/arch/arm/plat-omap/Makefile @@ -14,6 +14,7 @@ obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o obj-$(CONFIG_OMAP_IOMMU) += iommu.o iovmm.o +obj-$(CONFIG_OMAP_IOMMU_DEBUG) += iommu-debug.o obj-$(CONFIG_CPU_FREQ) += cpu-omap.o obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o diff --git a/arch/arm/plat-omap/include/mach/iommu.h b/arch/arm/plat-omap/include/mach/iommu.h index 769b00b4c34..46d41ac83db 100644 --- a/arch/arm/plat-omap/include/mach/iommu.h +++ b/arch/arm/plat-omap/include/mach/iommu.h @@ -95,7 +95,7 @@ struct iommu_functions { void (*save_ctx)(struct iommu *obj); void (*restore_ctx)(struct iommu *obj); - ssize_t (*dump_ctx)(struct iommu *obj, char *buf); + ssize_t (*dump_ctx)(struct iommu *obj, char *buf, ssize_t len); }; struct iommu_platform_data { @@ -162,7 +162,7 @@ extern void uninstall_iommu_arch(const struct iommu_functions *ops); extern int foreach_iommu_device(void *data, int (*fn)(struct device *, void *)); -extern ssize_t iommu_dump_ctx(struct iommu *obj, char *buf); -extern size_t dump_tlb_entries(struct iommu *obj, char *buf); +extern ssize_t iommu_dump_ctx(struct iommu *obj, char *buf, ssize_t len); +extern size_t dump_tlb_entries(struct iommu *obj, char *buf, ssize_t len); #endif /* __MACH_IOMMU_H */ diff --git a/arch/arm/plat-omap/iommu-debug.c b/arch/arm/plat-omap/iommu-debug.c new file mode 100644 index 00000000000..c799b3b0d70 --- /dev/null +++ b/arch/arm/plat-omap/iommu-debug.c @@ -0,0 +1,415 @@ +/* + * omap iommu: debugfs interface + * + * Copyright (C) 2008-2009 Nokia Corporation + * + * Written by Hiroshi DOYU + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "iopgtable.h" + +#define MAXCOLUMN 100 /* for short messages */ + +static DEFINE_MUTEX(iommu_debug_lock); + +static struct dentry *iommu_debug_root; + +static ssize_t debug_read_ver(struct file *file, char __user *userbuf, + size_t count, loff_t *ppos) +{ + u32 ver = iommu_arch_version(); + char buf[MAXCOLUMN], *p = buf; + + p += sprintf(p, "H/W version: %d.%d\n", (ver >> 4) & 0xf , ver & 0xf); + + return simple_read_from_buffer(userbuf, count, ppos, buf, p - buf); +} + +static ssize_t debug_read_regs(struct file *file, char __user *userbuf, + size_t count, loff_t *ppos) +{ + struct iommu *obj = file->private_data; + char *p, *buf; + ssize_t bytes; + + buf = kmalloc(count, GFP_KERNEL); + if (!buf) + return -ENOMEM; + p = buf; + + mutex_lock(&iommu_debug_lock); + + bytes = iommu_dump_ctx(obj, p, count); + bytes = simple_read_from_buffer(userbuf, count, ppos, buf, bytes); + + mutex_unlock(&iommu_debug_lock); + kfree(buf); + + return bytes; +} + +static ssize_t debug_read_tlb(struct file *file, char __user *userbuf, + size_t count, loff_t *ppos) +{ + struct iommu *obj = file->private_data; + char *p, *buf; + ssize_t bytes, rest; + + buf = kmalloc(count, GFP_KERNEL); + if (!buf) + return -ENOMEM; + p = buf; + + mutex_lock(&iommu_debug_lock); + + p += sprintf(p, "%8s %8s\n", "cam:", "ram:"); + p += sprintf(p, "-----------------------------------------\n"); + rest = count - (p - buf); + p += dump_tlb_entries(obj, p, rest); + + bytes = simple_read_from_buffer(userbuf, count, ppos, buf, p - buf); + + mutex_unlock(&iommu_debug_lock); + kfree(buf); + + return bytes; +} + +static ssize_t debug_write_pagetable(struct file *file, + const char __user *userbuf, size_t count, loff_t *ppos) +{ + struct iotlb_entry e; + struct cr_regs cr; + int err; + struct iommu *obj = file->private_data; + char buf[MAXCOLUMN], *p = buf; + + count = min(count, sizeof(buf)); + + mutex_lock(&iommu_debug_lock); + if (copy_from_user(p, userbuf, count)) { + mutex_unlock(&iommu_debug_lock); + return -EFAULT; + } + + sscanf(p, "%x %x", &cr.cam, &cr.ram); + if (!cr.cam || !cr.ram) { + mutex_unlock(&iommu_debug_lock); + return -EINVAL; + } + + iotlb_cr_to_e(&cr, &e); + err = iopgtable_store_entry(obj, &e); + if (err) + dev_err(obj->dev, "%s: fail to store cr\n", __func__); + + mutex_unlock(&iommu_debug_lock); + return count; +} + +#define dump_ioptable_entry_one(lv, da, val) \ + ({ \ + int __err = 0; \ + ssize_t bytes; \ + const int maxcol = 22; \ + const char *str = "%d: %08x %08x\n"; \ + bytes = snprintf(p, maxcol, str, lv, da, val); \ + p += bytes; \ + len -= bytes; \ + if (len < maxcol) \ + __err = -ENOMEM; \ + __err; \ + }) + +static ssize_t dump_ioptable(struct iommu *obj, char *buf, ssize_t len) +{ + int i; + u32 *iopgd; + char *p = buf; + + spin_lock(&obj->page_table_lock); + + iopgd = iopgd_offset(obj, 0); + for (i = 0; i < PTRS_PER_IOPGD; i++, iopgd++) { + int j, err; + u32 *iopte; + u32 da; + + if (!*iopgd) + continue; + + if (!(*iopgd & IOPGD_TABLE)) { + da = i << IOPGD_SHIFT; + + err = dump_ioptable_entry_one(1, da, *iopgd); + if (err) + goto out; + continue; + } + + iopte = iopte_offset(iopgd, 0); + + for (j = 0; j < PTRS_PER_IOPTE; j++, iopte++) { + if (!*iopte) + continue; + + da = (i << IOPGD_SHIFT) + (j << IOPTE_SHIFT); + err = dump_ioptable_entry_one(2, da, *iopgd); + if (err) + goto out; + } + } +out: + spin_unlock(&obj->page_table_lock); + + return p - buf; +} + +static ssize_t debug_read_pagetable(struct file *file, char __user *userbuf, + size_t count, loff_t *ppos) +{ + struct iommu *obj = file->private_data; + char *p, *buf; + size_t bytes; + + buf = (char *)__get_free_page(GFP_KERNEL); + if (!buf) + return -ENOMEM; + p = buf; + + p += sprintf(p, "L: %8s %8s\n", "da:", "pa:"); + p += sprintf(p, "-----------------------------------------\n"); + + mutex_lock(&iommu_debug_lock); + + bytes = PAGE_SIZE - (p - buf); + p += dump_ioptable(obj, p, bytes); + + bytes = simple_read_from_buffer(userbuf, count, ppos, buf, p - buf); + + mutex_unlock(&iommu_debug_lock); + free_page((unsigned long)buf); + + return bytes; +} + +static ssize_t debug_read_mmap(struct file *file, char __user *userbuf, + size_t count, loff_t *ppos) +{ + struct iommu *obj = file->private_data; + char *p, *buf; + struct iovm_struct *tmp; + int uninitialized_var(i); + ssize_t bytes; + + buf = (char *)__get_free_page(GFP_KERNEL); + if (!buf) + return -ENOMEM; + p = buf; + + p += sprintf(p, "%-3s %-8s %-8s %6s %8s\n", + "No", "start", "end", "size", "flags"); + p += sprintf(p, "-------------------------------------------------\n"); + + mutex_lock(&iommu_debug_lock); + + list_for_each_entry(tmp, &obj->mmap, list) { + size_t len; + const char *str = "%3d %08x-%08x %6x %8x\n"; + const int maxcol = 39; + + len = tmp->da_end - tmp->da_start; + p += snprintf(p, maxcol, str, + i, tmp->da_start, tmp->da_end, len, tmp->flags); + + if (PAGE_SIZE - (p - buf) < maxcol) + break; + i++; + } + + bytes = simple_read_from_buffer(userbuf, count, ppos, buf, p - buf); + + mutex_unlock(&iommu_debug_lock); + free_page((unsigned long)buf); + + return bytes; +} + +static ssize_t debug_read_mem(struct file *file, char __user *userbuf, + size_t count, loff_t *ppos) +{ + struct iommu *obj = file->private_data; + char *p, *buf; + struct iovm_struct *area; + ssize_t bytes; + + count = min_t(ssize_t, count, PAGE_SIZE); + + buf = (char *)__get_free_page(GFP_KERNEL); + if (!buf) + return -ENOMEM; + p = buf; + + mutex_lock(&iommu_debug_lock); + + area = find_iovm_area(obj, (u32)ppos); + if (IS_ERR(area)) { + bytes = -EINVAL; + goto err_out; + } + memcpy(p, area->va, count); + p += count; + + bytes = simple_read_from_buffer(userbuf, count, ppos, buf, p - buf); +err_out: + mutex_unlock(&iommu_debug_lock); + free_page((unsigned long)buf); + + return bytes; +} + +static ssize_t debug_write_mem(struct file *file, const char __user *userbuf, + size_t count, loff_t *ppos) +{ + struct iommu *obj = file->private_data; + struct iovm_struct *area; + char *p, *buf; + + count = min_t(size_t, count, PAGE_SIZE); + + buf = (char *)__get_free_page(GFP_KERNEL); + if (!buf) + return -ENOMEM; + p = buf; + + mutex_lock(&iommu_debug_lock); + + if (copy_from_user(p, userbuf, count)) { + count = -EFAULT; + goto err_out; + } + + area = find_iovm_area(obj, (u32)ppos); + if (IS_ERR(area)) { + count = -EINVAL; + goto err_out; + } + memcpy(area->va, p, count); +err_out: + mutex_unlock(&iommu_debug_lock); + free_page((unsigned long)buf); + + return count; +} + +static int debug_open_generic(struct inode *inode, struct file *file) +{ + file->private_data = inode->i_private; + return 0; +} + +#define DEBUG_FOPS(name) \ + static const struct file_operations debug_##name##_fops = { \ + .open = debug_open_generic, \ + .read = debug_read_##name, \ + .write = debug_write_##name, \ + }; + +#define DEBUG_FOPS_RO(name) \ + static const struct file_operations debug_##name##_fops = { \ + .open = debug_open_generic, \ + .read = debug_read_##name, \ + }; + +DEBUG_FOPS_RO(ver); +DEBUG_FOPS_RO(regs); +DEBUG_FOPS_RO(tlb); +DEBUG_FOPS(pagetable); +DEBUG_FOPS_RO(mmap); +DEBUG_FOPS(mem); + +#define __DEBUG_ADD_FILE(attr, mode) \ + { \ + struct dentry *dent; \ + dent = debugfs_create_file(#attr, mode, parent, \ + obj, &debug_##attr##_fops); \ + if (!dent) \ + return -ENOMEM; \ + } + +#define DEBUG_ADD_FILE(name) __DEBUG_ADD_FILE(name, 600) +#define DEBUG_ADD_FILE_RO(name) __DEBUG_ADD_FILE(name, 400) + +static int iommu_debug_register(struct device *dev, void *data) +{ + struct platform_device *pdev = to_platform_device(dev); + struct iommu *obj = platform_get_drvdata(pdev); + struct dentry *d, *parent; + + if (!obj || !obj->dev) + return -EINVAL; + + d = debugfs_create_dir(obj->name, iommu_debug_root); + if (!d) + return -ENOMEM; + parent = d; + + d = debugfs_create_u8("nr_tlb_entries", 400, parent, + (u8 *)&obj->nr_tlb_entries); + if (!d) + return -ENOMEM; + + DEBUG_ADD_FILE_RO(ver); + DEBUG_ADD_FILE_RO(regs); + DEBUG_ADD_FILE_RO(tlb); + DEBUG_ADD_FILE(pagetable); + DEBUG_ADD_FILE_RO(mmap); + DEBUG_ADD_FILE(mem); + + return 0; +} + +static int __init iommu_debug_init(void) +{ + struct dentry *d; + int err; + + d = debugfs_create_dir("iommu", NULL); + if (!d) + return -ENOMEM; + iommu_debug_root = d; + + err = foreach_iommu_device(d, iommu_debug_register); + if (err) + goto err_out; + return 0; + +err_out: + debugfs_remove_recursive(iommu_debug_root); + return err; +} +module_init(iommu_debug_init) + +static void __exit iommu_debugfs_exit(void) +{ + debugfs_remove_recursive(iommu_debug_root); +} +module_exit(iommu_debugfs_exit) + +MODULE_DESCRIPTION("omap iommu: debugfs interface"); +MODULE_AUTHOR("Hiroshi DOYU "); +MODULE_LICENSE("GPL v2"); diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c index 4a030139901..4b601270730 100644 --- a/arch/arm/plat-omap/iommu.c +++ b/arch/arm/plat-omap/iommu.c @@ -351,16 +351,14 @@ EXPORT_SYMBOL_GPL(flush_iotlb_all); #if defined(CONFIG_OMAP_IOMMU_DEBUG_MODULE) -ssize_t iommu_dump_ctx(struct iommu *obj, char *buf) +ssize_t iommu_dump_ctx(struct iommu *obj, char *buf, ssize_t bytes) { - ssize_t bytes; - if (!obj || !buf) return -EINVAL; clk_enable(obj->clk); - bytes = arch_iommu->dump_ctx(obj, buf); + bytes = arch_iommu->dump_ctx(obj, buf, bytes); clk_disable(obj->clk); @@ -368,7 +366,7 @@ ssize_t iommu_dump_ctx(struct iommu *obj, char *buf) } EXPORT_SYMBOL_GPL(iommu_dump_ctx); -static int __dump_tlb_entries(struct iommu *obj, struct cr_regs *crs) +static int __dump_tlb_entries(struct iommu *obj, struct cr_regs *crs, int num) { int i; struct iotlb_lock saved, l; @@ -379,7 +377,7 @@ static int __dump_tlb_entries(struct iommu *obj, struct cr_regs *crs) iotlb_lock_get(obj, &saved); memcpy(&l, &saved, sizeof(saved)); - for (i = 0; i < obj->nr_tlb_entries; i++) { + for (i = 0; i < num; i++) { struct cr_regs tmp; iotlb_lock_get(obj, &l); @@ -402,18 +400,21 @@ static int __dump_tlb_entries(struct iommu *obj, struct cr_regs *crs) * @obj: target iommu * @buf: output buffer **/ -size_t dump_tlb_entries(struct iommu *obj, char *buf) +size_t dump_tlb_entries(struct iommu *obj, char *buf, ssize_t bytes) { - int i, n; + int i, num; struct cr_regs *cr; char *p = buf; - cr = kcalloc(obj->nr_tlb_entries, sizeof(*cr), GFP_KERNEL); + num = bytes / sizeof(*cr); + num = min(obj->nr_tlb_entries, num); + + cr = kcalloc(num, sizeof(*cr), GFP_KERNEL); if (!cr) return 0; - n = __dump_tlb_entries(obj, cr); - for (i = 0; i < n; i++) + num = __dump_tlb_entries(obj, cr, num); + for (i = 0; i < num; i++) p += iotlb_dump_cr(obj, cr + i, p); kfree(cr); -- cgit v1.2.3-70-g09d2 From c426df87d8197cde077d03c808f52e3a17045b09 Mon Sep 17 00:00:00 2001 From: Vikram Pandita Date: Fri, 28 Aug 2009 11:24:08 -0700 Subject: OMAP2/3: Pass irqflags to 8250 driver Pass irqflags to 8250 driver with platform_data. At least Zoom2 has IRQF_TRIGGER_RISING requirement for the 8250 GPIO irq. This patch is dependent on 8250 driver changes getting accepted upstream: http://git.kernel.org/?p=linux/kernel/git/sfr/linux-next.git;a=commit;h=7053133124d5cdf207c1168c7a0c582a18e12ea7 Signed-off-by: Vikram Pandita Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/board-zoom-debugboard.c | 2 ++ arch/arm/mach-omap2/serial.c | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/board-zoom-debugboard.c b/arch/arm/mach-omap2/board-zoom-debugboard.c index bac5c4321ff..f546063775b 100644 --- a/arch/arm/mach-omap2/board-zoom-debugboard.c +++ b/arch/arm/mach-omap2/board-zoom-debugboard.c @@ -12,6 +12,7 @@ #include #include #include +#include #include @@ -84,6 +85,7 @@ static struct plat_serial8250_port serial_platform_data[] = { .mapbase = 0x10000000, .irq = OMAP_GPIO_IRQ(102), .flags = UPF_BOOT_AUTOCONF|UPF_IOREMAP|UPF_SHARE_IRQ, + .irqflags = IRQF_SHARED | IRQF_TRIGGER_RISING, .iotype = UPIO_MEM, .regshift = 1, .uartclk = QUART_CLK, diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index 409b03309af..dd3c735b558 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c @@ -460,7 +460,7 @@ static void omap_uart_idle_init(struct omap_uart_state *uart) uart->padconf = 0; } - p->flags |= UPF_SHARE_IRQ; + p->irqflags |= IRQF_SHARED; ret = request_irq(p->irq, omap_uart_interrupt, IRQF_SHARED, "serial idle", (void *)uart); WARN_ON(ret); -- cgit v1.2.3-70-g09d2 From 57b9daa0e18167e8ba449bc236c3f4a755dd1833 Mon Sep 17 00:00:00 2001 From: Vikram Pandita Date: Fri, 28 Aug 2009 11:24:11 -0700 Subject: OMAP3: MMC: Add mux for pins For OMAP3 add MMC1 MMC2 pin mux MMC3 mux is not added as there are multiple configurations possible, so the muxing is left to be done in board file. Signed-off-by: Vikram Pandita Signed-off-by: Chikkature Rajashekar Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/devices.c | 41 ++++++++++++++++++++++++++++ arch/arm/mach-omap2/mux.c | 50 +++++++++++++++++++++++++++++++++++ arch/arm/plat-omap/include/mach/mux.h | 28 ++++++++++++++++++++ 3 files changed, 119 insertions(+) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 894cc355818..a2e915639b7 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -513,6 +513,47 @@ static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller, omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0); } } + + if (cpu_is_omap3430()) { + if (controller_nr == 0) { + omap_cfg_reg(N28_3430_MMC1_CLK); + omap_cfg_reg(M27_3430_MMC1_CMD); + omap_cfg_reg(N27_3430_MMC1_DAT0); + if (mmc_controller->slots[0].wires == 4 || + mmc_controller->slots[0].wires == 8) { + omap_cfg_reg(N26_3430_MMC1_DAT1); + omap_cfg_reg(N25_3430_MMC1_DAT2); + omap_cfg_reg(P28_3430_MMC1_DAT3); + } + if (mmc_controller->slots[0].wires == 8) { + omap_cfg_reg(P27_3430_MMC1_DAT4); + omap_cfg_reg(P26_3430_MMC1_DAT5); + omap_cfg_reg(R27_3430_MMC1_DAT6); + omap_cfg_reg(R25_3430_MMC1_DAT7); + } + } + if (controller_nr == 1) { + /* MMC2 */ + omap_cfg_reg(AE2_3430_MMC2_CLK); + omap_cfg_reg(AG5_3430_MMC2_CMD); + omap_cfg_reg(AH5_3430_MMC2_DAT0); + + /* + * For 8 wire configurations, Lines DAT4, 5, 6 and 7 need to be muxed + * in the board-*.c files + */ + if (mmc_controller->slots[0].wires == 4 || + mmc_controller->slots[0].wires == 8) { + omap_cfg_reg(AH4_3430_MMC2_DAT1); + omap_cfg_reg(AG4_3430_MMC2_DAT2); + omap_cfg_reg(AF4_3430_MMC2_DAT3); + } + } + + /* + * For MMC3 the pins need to be muxed in the board-*.c files + */ + } } void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data, diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index 43d6b92b65f..f63f3a23782 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c @@ -492,6 +492,56 @@ MUX_CFG_34XX("H16_34XX_SDRC_CKE0", 0x262, OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT) MUX_CFG_34XX("H17_34XX_SDRC_CKE1", 0x264, OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT) + +/* MMC1 */ +MUX_CFG_34XX("N28_3430_MMC1_CLK", 0x144, + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("M27_3430_MMC1_CMD", 0x146, + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("N27_3430_MMC1_DAT0", 0x148, + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("N26_3430_MMC1_DAT1", 0x14a, + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("N25_3430_MMC1_DAT2", 0x14c, + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("P28_3430_MMC1_DAT3", 0x14e, + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("P27_3430_MMC1_DAT4", 0x150, + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("P26_3430_MMC1_DAT5", 0x152, + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("R27_3430_MMC1_DAT6", 0x154, + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("R25_3430_MMC1_DAT7", 0x156, + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) + +/* MMC2 */ +MUX_CFG_34XX("AE2_3430_MMC2_CLK", 0x158, + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("AG5_3430_MMC2_CMD", 0x15A, + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("AH5_3430_MMC2_DAT0", 0x15c, + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("AH4_3430_MMC2_DAT1", 0x15e, + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("AG4_3430_MMC2_DAT2", 0x160, + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("AF4_3430_MMC2_DAT3", 0x162, + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) + +/* MMC3 */ +MUX_CFG_34XX("AF10_3430_MMC3_CLK", 0x5d8, + OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("AC3_3430_MMC3_CMD", 0x1d0, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("AE11_3430_MMC3_DAT0", 0x5e4, + OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("AH9_3430_MMC3_DAT1", 0x5e6, + OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("AF13_3430_MMC3_DAT2", 0x5e8, + OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("AF13_3430_MMC3_DAT3", 0x5e2, + OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP) }; #define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins) diff --git a/arch/arm/plat-omap/include/mach/mux.h b/arch/arm/plat-omap/include/mach/mux.h index 80281c458ba..2c57bad65b0 100644 --- a/arch/arm/plat-omap/include/mach/mux.h +++ b/arch/arm/plat-omap/include/mach/mux.h @@ -857,6 +857,34 @@ enum omap34xx_index { /* OMAP3 SDRC CKE signals to SDR/DDR ram chips */ H16_34XX_SDRC_CKE0, H17_34XX_SDRC_CKE1, + + /* MMC1 */ + N28_3430_MMC1_CLK, + M27_3430_MMC1_CMD, + N27_3430_MMC1_DAT0, + N26_3430_MMC1_DAT1, + N25_3430_MMC1_DAT2, + P28_3430_MMC1_DAT3, + P27_3430_MMC1_DAT4, + P26_3430_MMC1_DAT5, + R27_3430_MMC1_DAT6, + R25_3430_MMC1_DAT7, + + /* MMC2 */ + AE2_3430_MMC2_CLK, + AG5_3430_MMC2_CMD, + AH5_3430_MMC2_DAT0, + AH4_3430_MMC2_DAT1, + AG4_3430_MMC2_DAT2, + AF4_3430_MMC2_DAT3, + + /* MMC3 */ + AF10_3430_MMC3_CLK, + AC3_3430_MMC3_CMD, + AE11_3430_MMC3_DAT0, + AH9_3430_MMC3_DAT1, + AF13_3430_MMC3_DAT2, + AF13_3430_MMC3_DAT3, }; struct omap_mux_cfg { -- cgit v1.2.3-70-g09d2 From 70ac51ab2cd9ddc7ded24adbe63fc6fd3557e44c Mon Sep 17 00:00:00 2001 From: Vikram Pandita Date: Fri, 28 Aug 2009 11:24:13 -0700 Subject: OMAP3: Zoom2: Add TWL4030 support Add TWL4030 CORE and TWL4030 drivers to Zoom2 board file TWL drivers enabled are: bci madc usb keypad mmc Signed-off-by: Vikram Pandita Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/board-zoom2.c | 203 +++++++++++++++++++++++++++++++++++--- 1 file changed, 192 insertions(+), 11 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/board-zoom2.c b/arch/arm/mach-omap2/board-zoom2.c index 3a42eca1ad8..dabba2720a9 100644 --- a/arch/arm/mach-omap2/board-zoom2.c +++ b/arch/arm/mach-omap2/board-zoom2.c @@ -12,17 +12,84 @@ #include #include #include +#include #include #include +#include #include #include #include #include +#include #include "mmc-twl4030.h" +/* Zoom2 has Qwerty keyboard*/ +static int zoom2_twl4030_keymap[] = { + KEY(0, 0, KEY_E), + KEY(1, 0, KEY_R), + KEY(2, 0, KEY_T), + KEY(3, 0, KEY_HOME), + KEY(6, 0, KEY_I), + KEY(7, 0, KEY_LEFTSHIFT), + KEY(0, 1, KEY_D), + KEY(1, 1, KEY_F), + KEY(2, 1, KEY_G), + KEY(3, 1, KEY_SEND), + KEY(6, 1, KEY_K), + KEY(7, 1, KEY_ENTER), + KEY(0, 2, KEY_X), + KEY(1, 2, KEY_C), + KEY(2, 2, KEY_V), + KEY(3, 2, KEY_END), + KEY(6, 2, KEY_DOT), + KEY(7, 2, KEY_CAPSLOCK), + KEY(0, 3, KEY_Z), + KEY(1, 3, KEY_KPPLUS), + KEY(2, 3, KEY_B), + KEY(3, 3, KEY_F1), + KEY(6, 3, KEY_O), + KEY(7, 3, KEY_SPACE), + KEY(0, 4, KEY_W), + KEY(1, 4, KEY_Y), + KEY(2, 4, KEY_U), + KEY(3, 4, KEY_F2), + KEY(4, 4, KEY_VOLUMEUP), + KEY(6, 4, KEY_L), + KEY(7, 4, KEY_LEFT), + KEY(0, 5, KEY_S), + KEY(1, 5, KEY_H), + KEY(2, 5, KEY_J), + KEY(3, 5, KEY_F3), + KEY(5, 5, KEY_VOLUMEDOWN), + KEY(6, 5, KEY_M), + KEY(4, 5, KEY_ENTER), + KEY(7, 5, KEY_RIGHT), + KEY(0, 6, KEY_Q), + KEY(1, 6, KEY_A), + KEY(2, 6, KEY_N), + KEY(3, 6, KEY_BACKSPACE), + KEY(6, 6, KEY_P), + KEY(7, 6, KEY_UP), + KEY(6, 7, KEY_SELECT), + KEY(7, 7, KEY_DOWN), + KEY(0, 7, KEY_PROG1), /*MACRO 1 */ + KEY(1, 7, KEY_PROG2), /*MACRO 2 */ + KEY(2, 7, KEY_PROG3), /*MACRO 3 */ + KEY(3, 7, KEY_PROG4), /*MACRO 4 */ + 0 +}; + +static struct twl4030_keypad_data zoom2_kp_twl4030_data = { + .rows = 8, + .cols = 8, + .keymap = zoom2_twl4030_keymap, + .keymapsize = ARRAY_SIZE(zoom2_twl4030_keymap), + .rep = 1, +}; + static void __init omap_zoom2_init_irq(void) { omap2_init_common_hw(NULL, NULL); @@ -33,10 +100,127 @@ static void __init omap_zoom2_init_irq(void) static struct omap_board_config_kernel zoom2_config[] __initdata = { }; +static struct regulator_consumer_supply zoom2_vmmc1_supply = { + .supply = "vmmc", +}; + +static struct regulator_consumer_supply zoom2_vsim_supply = { + .supply = "vmmc_aux", +}; + +static struct regulator_consumer_supply zoom2_vmmc2_supply = { + .supply = "vmmc", +}; + +/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */ +static struct regulator_init_data zoom2_vmmc1 = { + .constraints = { + .min_uV = 1850000, + .max_uV = 3150000, + .valid_modes_mask = REGULATOR_MODE_NORMAL + | REGULATOR_MODE_STANDBY, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE + | REGULATOR_CHANGE_MODE + | REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies = 1, + .consumer_supplies = &zoom2_vmmc1_supply, +}; + +/* VMMC2 for MMC2 card */ +static struct regulator_init_data zoom2_vmmc2 = { + .constraints = { + .min_uV = 1850000, + .max_uV = 1850000, + .apply_uV = true, + .valid_modes_mask = REGULATOR_MODE_NORMAL + | REGULATOR_MODE_STANDBY, + .valid_ops_mask = REGULATOR_CHANGE_MODE + | REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies = 1, + .consumer_supplies = &zoom2_vmmc2_supply, +}; + +/* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */ +static struct regulator_init_data zoom2_vsim = { + .constraints = { + .min_uV = 1800000, + .max_uV = 3000000, + .valid_modes_mask = REGULATOR_MODE_NORMAL + | REGULATOR_MODE_STANDBY, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE + | REGULATOR_CHANGE_MODE + | REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies = 1, + .consumer_supplies = &zoom2_vsim_supply, +}; + +static struct twl4030_hsmmc_info mmc[] __initdata = { + { + .mmc = 1, + .wires = 4, + .gpio_wp = -EINVAL, + }, + { + .mmc = 2, + .wires = 4, + .gpio_wp = -EINVAL, + }, + {} /* Terminator */ +}; + +static int zoom2_twl_gpio_setup(struct device *dev, + unsigned gpio, unsigned ngpio) +{ + /* gpio + 0 is "mmc0_cd" (input/IRQ), + * gpio + 1 is "mmc1_cd" (input/IRQ) + */ + mmc[0].gpio_cd = gpio + 0; + mmc[1].gpio_cd = gpio + 1; + twl4030_mmc_init(mmc); + + /* link regulators to MMC adapters ... we "know" the + * regulators will be set up only *after* we return. + */ + zoom2_vmmc1_supply.dev = mmc[0].dev; + zoom2_vsim_supply.dev = mmc[0].dev; + zoom2_vmmc2_supply.dev = mmc[1].dev; + + return 0; +} + + +static int zoom2_batt_table[] = { +/* 0 C*/ +30800, 29500, 28300, 27100, +26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900, +17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100, +11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310, +8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830, +5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170, +4040, 3910, 3790, 3670, 3550 +}; + +static struct twl4030_bci_platform_data zoom2_bci_data = { + .battery_tmp_tbl = zoom2_batt_table, + .tblsize = ARRAY_SIZE(zoom2_batt_table), +}; + +static struct twl4030_usb_data zoom2_usb_data = { + .usb_mode = T2_USB_MODE_ULPI, +}; + static struct twl4030_gpio_platform_data zoom2_gpio_data = { .gpio_base = OMAP_MAX_GPIO_LINES, .irq_base = TWL4030_GPIO_IRQ_BASE, .irq_end = TWL4030_GPIO_IRQ_END, + .setup = zoom2_twl_gpio_setup, +}; + +static struct twl4030_madc_platform_data zoom2_madc_data = { + .irq_line = 1, }; static struct twl4030_platform_data zoom2_twldata = { @@ -44,7 +228,15 @@ static struct twl4030_platform_data zoom2_twldata = { .irq_end = TWL4030_IRQ_END, /* platform_data for children goes here */ + .bci = &zoom2_bci_data, + .madc = &zoom2_madc_data, + .usb = &zoom2_usb_data, .gpio = &zoom2_gpio_data, + .keypad = &zoom2_kp_twl4030_data, + .vmmc1 = &zoom2_vmmc1, + .vmmc2 = &zoom2_vmmc2, + .vsim = &zoom2_vsim, + }; static struct i2c_board_info __initdata zoom2_i2c_boardinfo[] = { @@ -65,16 +257,6 @@ static int __init omap_i2c_init(void) return 0; } -static struct twl4030_hsmmc_info mmc[] __initdata = { - { - .mmc = 1, - .wires = 4, - .gpio_cd = -EINVAL, - .gpio_wp = -EINVAL, - }, - {} /* Terminator */ -}; - extern int __init omap_zoom2_debugboard_init(void); static void __init omap_zoom2_init(void) @@ -84,7 +266,6 @@ static void __init omap_zoom2_init(void) omap_board_config_size = ARRAY_SIZE(zoom2_config); omap_serial_init(); omap_zoom2_debugboard_init(); - twl4030_mmc_init(mmc); usb_musb_init(); } -- cgit v1.2.3-70-g09d2 From bd04e46558380aaba0caab6325c07a3c6bf27706 Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Fri, 28 Aug 2009 11:24:15 -0700 Subject: OMAP3: beagle: add missing twl4030 usb platform_data without it twl4030_usb driver will not probe. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/board-omap3beagle.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index 201360781ac..d79ea8da627 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c @@ -245,11 +245,16 @@ static struct regulator_init_data beagle_vpll2 = { .consumer_supplies = &beagle_vdvi_supply, }; +static struct twl4030_usb_data beagle_usb_data = { + .usb_mode = T2_USB_MODE_ULPI, +}; + static struct twl4030_platform_data beagle_twldata = { .irq_base = TWL4030_IRQ_BASE, .irq_end = TWL4030_IRQ_END, /* platform_data for children goes here */ + .usb = &beagle_usb_data, .gpio = &beagle_gpio_data, .vmmc1 = &beagle_vmmc1, .vsim = &beagle_vsim, -- cgit v1.2.3-70-g09d2 From 0e3eaadfe3da84f98250ad8a2c36e87fe00e42ee Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar Date: Sat, 22 Aug 2009 13:30:11 +0530 Subject: ARM: OMAP4: Fix NULL pointer dereference crash. After the patch series "[PATCH 00/14] OMAP PM fixes for .31-rc" merge in 2.6.31-rc5, the kernel crashed during boot on OMAP4430. This patch fixes it by adding UART4 support and related code. Without this patch omap_serial_init() would produce " NULL pointer dereference" and kernel crashes in the bootup on OMAP4430 platform. Some more info on the merge issue can be found here. More info- http://lkml.org/lkml/2009/8/20/192 Note: While merging this patch,"IO_ADDRESS" needs to be changed to "OMAP2_IO_ADDRESS" if the Tony's below series is already merged in. http://www.mail-archive.com/linux-omap@vger.kernel.org/msg15072.html Signed-off-by: Syed Rafiuddin Signed-off-by: Santosh Shilimkar Acked-by: Tony Lindgren Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/serial.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index dd3c735b558..645546cbd26 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c @@ -113,6 +113,21 @@ static struct plat_serial8250_port serial_platform_data2[] = { } }; +#ifdef CONFIG_ARCH_OMAP4 +static struct plat_serial8250_port serial_platform_data3[] = { + { + .membase = IO_ADDRESS(OMAP_UART4_BASE), + .mapbase = OMAP_UART4_BASE, + .irq = 70, + .flags = UPF_BOOT_AUTOCONF, + .iotype = UPIO_MEM, + .regshift = 2, + .uartclk = OMAP24XX_BASE_BAUD * 16, + }, { + .flags = 0 + } +}; +#endif static inline unsigned int serial_read_reg(struct plat_serial8250_port *up, int offset) { @@ -550,6 +565,17 @@ static struct omap_uart_state omap_uart[OMAP_MAX_NR_PORTS] = { }, }, }, +#ifdef CONFIG_ARCH_OMAP4 + { + .pdev = { + .name = "serial8250", + .id = 3 + .dev = { + .platform_data = serial_platform_data3, + }, + }, + }, +#endif }; void __init omap_serial_init(void) -- cgit v1.2.3-70-g09d2 From aae290fb4d64e2b09b659f4b8a7f9d2547ef63b1 Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar Date: Sat, 22 Aug 2009 13:30:12 +0530 Subject: ARM: OMAP4: Bypass the clock check. Second reason of OMAP4 boot failure on 2.6.31.rc6, the UART platform data is not getting registered to kernel. Registration was failing because of clock check failure in omap_serial_init(). Below patch fix the same. OMAP4 clock framework patches are still getting discussed on mailing list so till then we need this. Signed-off-by: Syed Rafiuddin Signed-off-by: Santosh Shilimkar Acked-by: Tony Lindgren Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/serial.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index 645546cbd26..0f508109adc 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c @@ -609,8 +609,11 @@ void __init omap_serial_init(void) uart->fck = NULL; } - if (!uart->ick || !uart->fck) - continue; + /* FIXME: Remove this once the clkdev is ready */ + if (!cpu_is_omap44xx()) { + if (!uart->ick || !uart->fck) + continue; + } uart->num = i; p->private_data = uart; -- cgit v1.2.3-70-g09d2 From 24bcadb6508b7c0f7307749228841fe04af6d70f Mon Sep 17 00:00:00 2001 From: Vikram Pandita Date: Fri, 21 Aug 2009 13:11:06 -0500 Subject: OMAP: Zoom2: update serial platform_data id for external UART Now that on-chip UARTs each have separate platform_data, the external UART needs an non-conflicting ID. Since there are 3 on-chip UARTs, the Zoom2 external UART will be registered after as the fourth. Signed-off-by: Vikram Pandita Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/board-zoom-debugboard.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/board-zoom-debugboard.c b/arch/arm/mach-omap2/board-zoom-debugboard.c index f546063775b..e0948c92298 100644 --- a/arch/arm/mach-omap2/board-zoom-debugboard.c +++ b/arch/arm/mach-omap2/board-zoom-debugboard.c @@ -96,7 +96,7 @@ static struct plat_serial8250_port serial_platform_data[] = { static struct platform_device zoom2_debugboard_serial_device = { .name = "serial8250", - .id = PLAT8250_DEV_PLATFORM1, + .id = 3, .dev = { .platform_data = serial_platform_data, }, -- cgit v1.2.3-70-g09d2 From bbde6ebae6dacf2f6e6ac4ab28c1805a2d51c5e1 Mon Sep 17 00:00:00 2001 From: Anand Gadiyar Date: Mon, 24 Aug 2009 17:36:37 +0530 Subject: MUSB: Remove usb_musb_pm_init() call In usb_musb_pm_init, we attempt to access an MUSB register when the i-clock may not be on, or the module is otherwise not accessible. We need to either: - enable the clock before this access, or - remove this code and move it to the bootloader, or - enable the clock in the bootloader If we enable the clock in the bootloader, we might as well add the workaround in the bootloader itself. This code will anyway be changed once hwmod is in place, so remove it for now This allows us to boot the kernel on certain OMAP3 boards with a bootloader that doesn't enable this clock. Without this, we will need to upgrade the bootloaders on these boards. Signed-off-by: Anand Gadiyar Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/usb-musb.c | 12 ------------ 1 file changed, 12 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c index 739e59e8025..1145a2562b0 100644 --- a/arch/arm/mach-omap2/usb-musb.c +++ b/arch/arm/mach-omap2/usb-musb.c @@ -31,15 +31,6 @@ #include #include -#define OTG_SYSCONFIG (OMAP34XX_HSUSB_OTG_BASE + 0x404) - -static void __init usb_musb_pm_init(void) -{ - /* Ensure force-idle mode for OTG controller */ - if (cpu_is_omap34xx()) - omap_writel(0, OTG_SYSCONFIG); -} - #ifdef CONFIG_USB_MUSB_SOC static struct resource musb_resources[] = { @@ -173,13 +164,10 @@ void __init usb_musb_init(void) printk(KERN_ERR "Unable to register HS-USB (MUSB) device\n"); return; } - - usb_musb_pm_init(); } #else void __init usb_musb_init(void) { - usb_musb_pm_init(); } #endif /* CONFIG_USB_MUSB_SOC */ -- cgit v1.2.3-70-g09d2 From 5110b2980a1299f6c253260de385b0dc2b2308b0 Mon Sep 17 00:00:00 2001 From: "Reddy, Teerth" Date: Mon, 24 Aug 2009 11:58:59 +0530 Subject: OMAP3: PM: add T2 interrupt line mux setting, and enable on 3430SDP This patch changes for setting the padconf value for sys_nirq line which is connected to T2 INTR1. This will fix the T2 keypad wakeup issue on OMAP3 SDP. Signed-off-by: Teerth Reddy Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/board-3430sdp.c | 6 ++++++ arch/arm/mach-omap2/mux.c | 5 +++++ arch/arm/plat-omap/include/mach/mux.h | 3 +++ 3 files changed, 14 insertions(+) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c index 7e9b76cc767..31d9f56c648 100644 --- a/arch/arm/mach-omap2/board-3430sdp.c +++ b/arch/arm/mach-omap2/board-3430sdp.c @@ -473,6 +473,11 @@ static inline void board_smc91x_init(void) #endif +static void enable_board_wakeup_source(void) +{ + omap_cfg_reg(AF26_34XX_SYS_NIRQ); /* T2 interrupt line (keypad) */ +} + static void __init omap_3430sdp_init(void) { omap3430_i2c_init(); @@ -490,6 +495,7 @@ static void __init omap_3430sdp_init(void) omap_serial_init(); usb_musb_init(); board_smc91x_init(); + enable_board_wakeup_source(); } static void __init omap_3430sdp_map_io(void) diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index f63f3a23782..2daa595aaff 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c @@ -542,6 +542,11 @@ MUX_CFG_34XX("AF13_3430_MMC3_DAT2", 0x5e8, OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP) MUX_CFG_34XX("AF13_3430_MMC3_DAT3", 0x5e2, OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP) + +/* SYS_NIRQ T2 INT1 */ +MUX_CFG_34XX("AF26_34XX_SYS_NIRQ", 0x1E0, + OMAP3_WAKEUP_EN | OMAP34XX_PIN_INPUT_PULLUP | + OMAP34XX_MUX_MODE0) }; #define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins) diff --git a/arch/arm/plat-omap/include/mach/mux.h b/arch/arm/plat-omap/include/mach/mux.h index 2c57bad65b0..98dfab651df 100644 --- a/arch/arm/plat-omap/include/mach/mux.h +++ b/arch/arm/plat-omap/include/mach/mux.h @@ -885,6 +885,9 @@ enum omap34xx_index { AH9_3430_MMC3_DAT1, AF13_3430_MMC3_DAT2, AF13_3430_MMC3_DAT3, + + /* SYS_NIRQ T2 INT1 */ + AF26_34XX_SYS_NIRQ, }; struct omap_mux_cfg { -- cgit v1.2.3-70-g09d2 From 2fcc81a38b699a81e47fdd655cf514c789576554 Mon Sep 17 00:00:00 2001 From: Vikram Pandita Date: Fri, 21 Aug 2009 13:11:20 -0500 Subject: OMAP: Zoom2: release debug board detect gpio line Release the Dbg board detection gpio once its purpose is served Signed-off-by: Vikram Pandita Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/board-zoom-debugboard.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/board-zoom-debugboard.c b/arch/arm/mach-omap2/board-zoom-debugboard.c index e0948c92298..1f13e2a1f32 100644 --- a/arch/arm/mach-omap2/board-zoom-debugboard.c +++ b/arch/arm/mach-omap2/board-zoom-debugboard.c @@ -129,6 +129,7 @@ static inline void __init zoom2_init_quaduart(void) static inline int omap_zoom2_debugboard_detect(void) { int debug_board_detect = 0; + int ret = 1; debug_board_detect = ZOOM2_SMSC911X_GPIO; @@ -140,10 +141,10 @@ static inline int omap_zoom2_debugboard_detect(void) gpio_direction_input(debug_board_detect); if (!gpio_get_value(debug_board_detect)) { - gpio_free(debug_board_detect); - return 0; + ret = 0; } - return 1; + gpio_free(debug_board_detect); + return ret; } static struct platform_device *zoom2_devices[] __initdata = { -- cgit v1.2.3-70-g09d2 From d3d381c6365ef5b06c4184a3fe047cf027533970 Mon Sep 17 00:00:00 2001 From: Ming Lei Date: Sat, 22 Aug 2009 21:20:26 +0800 Subject: OMAP3: PM: fix lockdep warning caused by omap3_pm_init This patch uses kmalloc(size,GFP_ATOMIC) instead of kmalloc(size,GFP_KERNEL) to allocate memory for instance of struct power_state in pwrdms_setup(), since it may be called by pwrdm_for_each() with irq disabled. It is a easy fix for the following lockdep warning caused by kmalloc(size,GFP_KERNEL) in pwrdms_setup(): Power Management for TI OMAP3. ------------[ cut here ]------------ WARNING: at kernel/lockdep.c:2282 lockdep_trace_alloc+0xe8/0xfc() Modules linked in: [] (unwind_backtrace+0x0/0xec) from [] (warn_slowpath_common+0x48/0x60) [] (warn_slowpath_common+0x48/0x60) from [] (lockdep_trace_alloc+0xe8/0xfc) [] (lockdep_trace_alloc+0xe8/0xfc) from [] (kmem_cache_alloc+0x28/0x178) [] (kmem_cache_alloc+0x28/0x178) from [] (pwrdms_setup+0x30/0xf8) [] (pwrdms_setup+0x30/0xf8) from [] (pwrdm_for_each+0x64/0x84) [] (pwrdm_for_each+0x64/0x84) from [] (omap3_pm_init+0x3f4/0x5ac) [] (omap3_pm_init+0x3f4/0x5ac) from [] (do_one_initcall+0x30/0x1d4) [] (do_one_initcall+0x30/0x1d4) from [] (kernel_init+0xa4/0x118) [] (kernel_init+0xa4/0x118) from [] (kernel_thread_exit+0x0/0x8) ---[ end trace 1e06f8d97dc5a19b ]--- Signed-off-by: Ming Lei Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/pm34xx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 488d595d8e4..d67b781045b 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -665,7 +665,7 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm) if (!pwrdm->pwrsts) return 0; - pwrst = kmalloc(sizeof(struct power_state), GFP_KERNEL); + pwrst = kmalloc(sizeof(struct power_state), GFP_ATOMIC); if (!pwrst) return -ENOMEM; pwrst->pwrdm = pwrdm; -- cgit v1.2.3-70-g09d2 From ba20bb126940ce4847e146a0d00b7f7b0868d773 Mon Sep 17 00:00:00 2001 From: Peter 'p2' De Schrijver Date: Wed, 15 Oct 2008 17:48:43 +0300 Subject: OMAP: PM counter infrastructure. This patch provides the infrastructure to count how many times a powerdomain entered a given power state (on, inactive, retention, off). A number of functions are provided which will be called by the chip specific powerdomain and clockdomain code whenever a transition might have happened. Signed-off-by: Peter 'p2' De Schrijver Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/clockdomain.c | 2 + arch/arm/mach-omap2/powerdomain.c | 101 +++++++++++++++++++++++++- arch/arm/plat-omap/include/mach/powerdomain.h | 7 ++ 3 files changed, 108 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index 0e7d501865b..26912a95dc1 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c @@ -484,6 +484,8 @@ void omap2_clkdm_allow_idle(struct clockdomain *clkdm) v << __ffs(clkdm->clktrctrl_mask), clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL); + + pwrdm_clkdm_state_switch(clkdm); } /** diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index 983f1cb676b..a2d98718c6d 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c @@ -35,6 +35,11 @@ #include #include +enum { + PWRDM_STATE_NOW = 0, + PWRDM_STATE_PREV, +}; + /* pwrdm_list contains all registered struct powerdomains */ static LIST_HEAD(pwrdm_list); @@ -102,6 +107,63 @@ static struct powerdomain *_pwrdm_deps_lookup(struct powerdomain *pwrdm, return pd->pwrdm; } +static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag) +{ + + int prev; + int state; + + if (pwrdm == NULL) + return -EINVAL; + + state = pwrdm_read_pwrst(pwrdm); + + switch (flag) { + case PWRDM_STATE_NOW: + prev = pwrdm->state; + break; + case PWRDM_STATE_PREV: + prev = pwrdm_read_prev_pwrst(pwrdm); + if (pwrdm->state != prev) + pwrdm->state_counter[prev]++; + break; + default: + return -EINVAL; + } + + if (state != prev) + pwrdm->state_counter[state]++; + + pwrdm->state = state; + + return 0; +} + +static int _pwrdm_pre_transition_cb(struct powerdomain *pwrdm) +{ + pwrdm_clear_all_prev_pwrst(pwrdm); + _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW); + return 0; +} + +static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm) +{ + _pwrdm_state_switch(pwrdm, PWRDM_STATE_PREV); + return 0; +} + +static __init void _pwrdm_setup(struct powerdomain *pwrdm) +{ + int i; + + for (i = 0; i < 4; i++) + pwrdm->state_counter[i] = 0; + + pwrdm_wait_transition(pwrdm); + pwrdm->state = pwrdm_read_pwrst(pwrdm); + pwrdm->state_counter[pwrdm->state] = 1; + +} /* Public functions */ @@ -117,9 +179,12 @@ void pwrdm_init(struct powerdomain **pwrdm_list) { struct powerdomain **p = NULL; - if (pwrdm_list) - for (p = pwrdm_list; *p; p++) + if (pwrdm_list) { + for (p = pwrdm_list; *p; p++) { pwrdm_register(*p); + _pwrdm_setup(*p); + } + } } /** @@ -1110,4 +1175,36 @@ int pwrdm_wait_transition(struct powerdomain *pwrdm) return 0; } +int pwrdm_state_switch(struct powerdomain *pwrdm) +{ + return _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW); +} + +int pwrdm_clkdm_state_switch(struct clockdomain *clkdm) +{ + if (clkdm != NULL && clkdm->pwrdm.ptr != NULL) { + pwrdm_wait_transition(clkdm->pwrdm.ptr); + return pwrdm_state_switch(clkdm->pwrdm.ptr); + } + + return -EINVAL; +} +int pwrdm_clk_state_switch(struct clk *clk) +{ + if (clk != NULL && clk->clkdm != NULL) + return pwrdm_clkdm_state_switch(clk->clkdm); + return -EINVAL; +} + +int pwrdm_pre_transition(void) +{ + pwrdm_for_each(_pwrdm_pre_transition_cb); + return 0; +} + +int pwrdm_post_transition(void) +{ + pwrdm_for_each(_pwrdm_post_transition_cb); + return 0; +} diff --git a/arch/arm/plat-omap/include/mach/powerdomain.h b/arch/arm/plat-omap/include/mach/powerdomain.h index 69c9e675d8e..52663fc549d 100644 --- a/arch/arm/plat-omap/include/mach/powerdomain.h +++ b/arch/arm/plat-omap/include/mach/powerdomain.h @@ -117,6 +117,8 @@ struct powerdomain { struct list_head node; + int state; + unsigned state_counter[4]; }; @@ -164,4 +166,9 @@ bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm); int pwrdm_wait_transition(struct powerdomain *pwrdm); +int pwrdm_state_switch(struct powerdomain *pwrdm); +int pwrdm_clkdm_state_switch(struct clockdomain *clkdm); +int pwrdm_pre_transition(void); +int pwrdm_post_transition(void); + #endif -- cgit v1.2.3-70-g09d2 From fe617af716bc09cbbdd11ad820d5818017a9f481 Mon Sep 17 00:00:00 2001 From: Peter 'p2' De Schrijver Date: Wed, 15 Oct 2008 17:48:44 +0300 Subject: OMAP: PM: Hook into PM counters This patch modifies the clock, clockdomain and OMAP3 specific powerdomain code to call the PM counter infrastructure whenever one or more powerdomains might have changed state. Signed-off-by: Peter 'p2' De Schrijver Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/clock.c | 2 ++ arch/arm/mach-omap2/clockdomain.c | 3 +++ arch/arm/mach-omap2/pm34xx.c | 6 ++++++ 3 files changed, 11 insertions(+) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index 456e2ad5f62..f2a92d614f0 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c @@ -1043,5 +1043,7 @@ void omap2_clk_disable_unused(struct clk *clk) omap2_clk_disable(clk); } else _omap2_clk_disable(clk); + if (clk->clkdm != NULL) + pwrdm_clkdm_state_switch(clk->clkdm); } #endif diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index 26912a95dc1..5b0b90b76e1 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c @@ -574,6 +574,7 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk) omap2_clkdm_wakeup(clkdm); pwrdm_wait_transition(clkdm->pwrdm.ptr); + pwrdm_clkdm_state_switch(clkdm); return 0; } @@ -626,6 +627,8 @@ int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk) else omap2_clkdm_sleep(clkdm); + pwrdm_clkdm_state_switch(clkdm); + return 0; } diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 488d595d8e4..f1976242f99 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -170,6 +170,8 @@ static void omap_sram_idle(void) printk(KERN_ERR "Invalid mpu state in sram_idle\n"); return; } + pwrdm_pre_transition(); + omap2_gpio_prepare_for_retention(); omap_uart_prepare_idle(0); omap_uart_prepare_idle(1); @@ -182,6 +184,9 @@ static void omap_sram_idle(void) omap_uart_resume_idle(1); omap_uart_resume_idle(0); omap2_gpio_resume_after_retention(); + + pwrdm_post_transition(); + } /* @@ -271,6 +276,7 @@ static int set_pwrdm_state(struct powerdomain *pwrdm, u32 state) if (sleep_switch) { omap2_clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]); pwrdm_wait_transition(pwrdm); + pwrdm_state_switch(pwrdm); } err: -- cgit v1.2.3-70-g09d2 From a23456e9b02b3fae0fc78cb33fad69803a50e5bc Mon Sep 17 00:00:00 2001 From: Peter 'p2' De Schrijver Date: Wed, 15 Oct 2008 18:13:47 +0300 Subject: OMAP: PM: Add closures to clkdm_for_each and pwrdm_for_each. Add some infrastructure to easily iterate over clock and power domains. Signed-off-by: Peter 'p2' De Schrijver Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/clockdomain.c | 5 +++-- arch/arm/mach-omap2/pm24xx.c | 4 ++-- arch/arm/mach-omap2/pm34xx.c | 8 ++++---- arch/arm/plat-omap/include/mach/clockdomain.h | 3 ++- arch/arm/plat-omap/include/mach/powerdomain.h | 3 ++- 5 files changed, 13 insertions(+), 10 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index 5b0b90b76e1..4ef7b4f5474 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c @@ -299,7 +299,8 @@ struct clockdomain *clkdm_lookup(const char *name) * anything else to indicate failure; or -EINVAL if the function pointer * is null. */ -int clkdm_for_each(int (*fn)(struct clockdomain *clkdm)) +int clkdm_for_each(int (*fn)(struct clockdomain *clkdm, void *user), + void *user) { struct clockdomain *clkdm; int ret = 0; @@ -309,7 +310,7 @@ int clkdm_for_each(int (*fn)(struct clockdomain *clkdm)) mutex_lock(&clkdm_mutex); list_for_each_entry(clkdm, &clkdm_list, node) { - ret = (*fn)(clkdm); + ret = (*fn)(clkdm, user); if (ret) break; } diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c index 528dbdc26e2..bff5c4e8974 100644 --- a/arch/arm/mach-omap2/pm24xx.c +++ b/arch/arm/mach-omap2/pm24xx.c @@ -333,7 +333,7 @@ static struct platform_suspend_ops omap_pm_ops = { .valid = suspend_valid_only_mem, }; -static int _pm_clkdm_enable_hwsup(struct clockdomain *clkdm) +static int _pm_clkdm_enable_hwsup(struct clockdomain *clkdm, void *unused) { omap2_clkdm_allow_idle(clkdm); return 0; @@ -385,7 +385,7 @@ static void __init prcm_setup_regs(void) omap2_clkdm_sleep(gfx_clkdm); /* Enable clockdomain hardware-supervised control for all clkdms */ - clkdm_for_each(_pm_clkdm_enable_hwsup); + clkdm_for_each(_pm_clkdm_enable_hwsup, NULL); /* Enable clock autoidle for all domains */ cm_write_mod_reg(OMAP24XX_AUTO_CAM | diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index f1976242f99..331dfca93ed 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -664,7 +664,7 @@ static void __init prcm_setup_regs(void) omap3_d2d_idle(); } -static int __init pwrdms_setup(struct powerdomain *pwrdm) +static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused) { struct power_state *pwrst; @@ -689,7 +689,7 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm) * supported. Initiate sleep transition for other clockdomains, if * they are not used */ -static int __init clkdms_setup(struct clockdomain *clkdm) +static int __init clkdms_setup(struct clockdomain *clkdm, void *unused) { if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO) omap2_clkdm_allow_idle(clkdm); @@ -722,13 +722,13 @@ static int __init omap3_pm_init(void) goto err1; } - ret = pwrdm_for_each(pwrdms_setup); + ret = pwrdm_for_each(pwrdms_setup, NULL); if (ret) { printk(KERN_ERR "Failed to setup powerdomains\n"); goto err2; } - (void) clkdm_for_each(clkdms_setup); + (void) clkdm_for_each(clkdms_setup, NULL); mpu_pwrdm = pwrdm_lookup("mpu_pwrdm"); if (mpu_pwrdm == NULL) { diff --git a/arch/arm/plat-omap/include/mach/clockdomain.h b/arch/arm/plat-omap/include/mach/clockdomain.h index b9d0dd2da89..99ebd886f13 100644 --- a/arch/arm/plat-omap/include/mach/clockdomain.h +++ b/arch/arm/plat-omap/include/mach/clockdomain.h @@ -95,7 +95,8 @@ int clkdm_register(struct clockdomain *clkdm); int clkdm_unregister(struct clockdomain *clkdm); struct clockdomain *clkdm_lookup(const char *name); -int clkdm_for_each(int (*fn)(struct clockdomain *clkdm)); +int clkdm_for_each(int (*fn)(struct clockdomain *clkdm, void *user), + void *user); struct powerdomain *clkdm_get_pwrdm(struct clockdomain *clkdm); void omap2_clkdm_allow_idle(struct clockdomain *clkdm); diff --git a/arch/arm/plat-omap/include/mach/powerdomain.h b/arch/arm/plat-omap/include/mach/powerdomain.h index 52663fc549d..de03f3dbbf3 100644 --- a/arch/arm/plat-omap/include/mach/powerdomain.h +++ b/arch/arm/plat-omap/include/mach/powerdomain.h @@ -128,7 +128,8 @@ int pwrdm_register(struct powerdomain *pwrdm); int pwrdm_unregister(struct powerdomain *pwrdm); struct powerdomain *pwrdm_lookup(const char *name); -int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm)); +int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user), + void *user); int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm); int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm); -- cgit v1.2.3-70-g09d2 From 331b93f41dff21c8f95709032cb184fb82bf2003 Mon Sep 17 00:00:00 2001 From: Peter 'p2' De Schrijver Date: Wed, 15 Oct 2008 18:13:48 +0300 Subject: OMAP: PM: Add pm-debug counters This patch provides the debugfs entries and a function which will be called by the PM code to register the time spent per domain per state. Also some new fields are added to the powerdomain struct to keep the time information. NOTE: As of v2.6.29, using getnstimeofday() after drivers are suspended is no longer safe since the timekeeping subsystem is also suspended as part of the suspend process. Instead use sched_clock() which on OMAP returns the 32k SYNC timer in nanoseconds. Also, do not print out status for meta powerdomains (dpll*) Signed-off-by: Peter 'p2' De Schrijver Signed-off-by: Tero Kristo Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/pm-debug.c | 178 +++++++++++++++++++++++++- arch/arm/mach-omap2/pm.h | 4 + arch/arm/plat-omap/include/mach/powerdomain.h | 5 + 3 files changed, 186 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index da3a53f8ccc..7383e85eac2 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c @@ -20,13 +20,15 @@ */ #include -#include +#include #include #include #include #include #include +#include +#include #include "prm.h" #include "cm.h" @@ -150,3 +152,177 @@ void omap2_pm_dump(int mode, int resume, unsigned int us) for (i = 0; i < reg_count; i++) printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, regs[i].val); } + +#ifdef CONFIG_DEBUG_FS +#include +#include + +struct dentry *pm_dbg_dir; + +static int pm_dbg_init_done; + +enum { + DEBUG_FILE_COUNTERS = 0, + DEBUG_FILE_TIMERS, +}; + +static const char pwrdm_state_names[][4] = { + "OFF", + "RET", + "INA", + "ON" +}; + +void pm_dbg_update_time(struct powerdomain *pwrdm, int prev) +{ + s64 t; + + if (!pm_dbg_init_done) + return ; + + /* Update timer for previous state */ + t = sched_clock(); + + pwrdm->state_timer[prev] += t - pwrdm->timer; + + pwrdm->timer = t; +} + +static int clkdm_dbg_show_counter(struct clockdomain *clkdm, void *user) +{ + struct seq_file *s = (struct seq_file *)user; + + if (strcmp(clkdm->name, "emu_clkdm") == 0 || + strcmp(clkdm->name, "wkup_clkdm") == 0 || + strncmp(clkdm->name, "dpll", 4) == 0) + return 0; + + seq_printf(s, "%s->%s (%d)", clkdm->name, + clkdm->pwrdm.ptr->name, + atomic_read(&clkdm->usecount)); + seq_printf(s, "\n"); + + return 0; +} + +static int pwrdm_dbg_show_counter(struct powerdomain *pwrdm, void *user) +{ + struct seq_file *s = (struct seq_file *)user; + int i; + + if (strcmp(pwrdm->name, "emu_pwrdm") == 0 || + strcmp(pwrdm->name, "wkup_pwrdm") == 0 || + strncmp(pwrdm->name, "dpll", 4) == 0) + return 0; + + if (pwrdm->state != pwrdm_read_pwrst(pwrdm)) + printk(KERN_ERR "pwrdm state mismatch(%s) %d != %d\n", + pwrdm->name, pwrdm->state, pwrdm_read_pwrst(pwrdm)); + + seq_printf(s, "%s (%s)", pwrdm->name, + pwrdm_state_names[pwrdm->state]); + for (i = 0; i < 4; i++) + seq_printf(s, ",%s:%d", pwrdm_state_names[i], + pwrdm->state_counter[i]); + + seq_printf(s, "\n"); + + return 0; +} + +static int pwrdm_dbg_show_timer(struct powerdomain *pwrdm, void *user) +{ + struct seq_file *s = (struct seq_file *)user; + int i; + + if (strcmp(pwrdm->name, "emu_pwrdm") == 0 || + strcmp(pwrdm->name, "wkup_pwrdm") == 0 || + strncmp(pwrdm->name, "dpll", 4) == 0) + return 0; + + pwrdm_state_switch(pwrdm); + + seq_printf(s, "%s (%s)", pwrdm->name, + pwrdm_state_names[pwrdm->state]); + + for (i = 0; i < 4; i++) + seq_printf(s, ",%s:%lld", pwrdm_state_names[i], + pwrdm->state_timer[i]); + + seq_printf(s, "\n"); + return 0; +} + +static int pm_dbg_show_counters(struct seq_file *s, void *unused) +{ + pwrdm_for_each(pwrdm_dbg_show_counter, s); + clkdm_for_each(clkdm_dbg_show_counter, s); + + return 0; +} + +static int pm_dbg_show_timers(struct seq_file *s, void *unused) +{ + pwrdm_for_each(pwrdm_dbg_show_timer, s); + return 0; +} + +static int pm_dbg_open(struct inode *inode, struct file *file) +{ + switch ((int)inode->i_private) { + case DEBUG_FILE_COUNTERS: + return single_open(file, pm_dbg_show_counters, + &inode->i_private); + case DEBUG_FILE_TIMERS: + default: + return single_open(file, pm_dbg_show_timers, + &inode->i_private); + }; +} + +static const struct file_operations debug_fops = { + .open = pm_dbg_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + +static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused) +{ + int i; + s64 t; + + t = sched_clock(); + + for (i = 0; i < 4; i++) + pwrdm->state_timer[i] = 0; + + pwrdm->timer = t; + + return 0; +} + +static int __init pm_dbg_init(void) +{ + struct dentry *d; + + d = debugfs_create_dir("pm_debug", NULL); + if (IS_ERR(d)) + return PTR_ERR(d); + + (void) debugfs_create_file("count", S_IRUGO, + d, (void *)DEBUG_FILE_COUNTERS, &debug_fops); + (void) debugfs_create_file("time", S_IRUGO, + d, (void *)DEBUG_FILE_TIMERS, &debug_fops); + + pwrdm_for_each(pwrdms_setup, NULL); + + pm_dbg_init_done = 1; + + return 0; +} +late_initcall(pm_dbg_init); + +#else +void pm_dbg_update_time(struct powerdomain *pwrdm, int prev) {} +#endif diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index 21201cd4117..4589db1c8af 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h @@ -11,12 +11,16 @@ #ifndef __ARCH_ARM_MACH_OMAP2_PM_H #define __ARCH_ARM_MACH_OMAP2_PM_H +#include + #ifdef CONFIG_PM_DEBUG extern void omap2_pm_dump(int mode, int resume, unsigned int us); extern int omap2_pm_debug; +extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev); #else #define omap2_pm_dump(mode, resume, us) do {} while (0); #define omap2_pm_debug 0 +#define pm_dbg_update_time(pwrdm, prev) do {} while (0); #endif /* CONFIG_PM_DEBUG */ extern void omap24xx_idle_loop_suspend(void); diff --git a/arch/arm/plat-omap/include/mach/powerdomain.h b/arch/arm/plat-omap/include/mach/powerdomain.h index de03f3dbbf3..6271d8556a4 100644 --- a/arch/arm/plat-omap/include/mach/powerdomain.h +++ b/arch/arm/plat-omap/include/mach/powerdomain.h @@ -119,6 +119,11 @@ struct powerdomain { int state; unsigned state_counter[4]; + +#ifdef CONFIG_PM_DEBUG + s64 timer; + s64 state_timer[4]; +#endif }; -- cgit v1.2.3-70-g09d2 From 6199ab2690ca6f44f838603da079b3faa837e502 Mon Sep 17 00:00:00 2001 From: Peter 'p2' De Schrijver Date: Wed, 15 Oct 2008 18:13:49 +0300 Subject: OMAP: PM debug: make powerdomains use PM-debug counters Make the powerdomain code call the new hook for updating the time. Also implement the updated pwrdm_for_each. Signed-off-by: Peter 'p2' De Schrijver Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/powerdomain.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index a2d98718c6d..5a6cef3e42b 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c @@ -35,6 +35,8 @@ #include #include +#include "pm.h" + enum { PWRDM_STATE_NOW = 0, PWRDM_STATE_PREV, @@ -134,19 +136,21 @@ static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag) if (state != prev) pwrdm->state_counter[state]++; + pm_dbg_update_time(pwrdm, prev); + pwrdm->state = state; return 0; } -static int _pwrdm_pre_transition_cb(struct powerdomain *pwrdm) +static int _pwrdm_pre_transition_cb(struct powerdomain *pwrdm, void *unused) { pwrdm_clear_all_prev_pwrst(pwrdm); _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW); return 0; } -static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm) +static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm, void *unused) { _pwrdm_state_switch(pwrdm, PWRDM_STATE_PREV); return 0; @@ -282,7 +286,8 @@ struct powerdomain *pwrdm_lookup(const char *name) * anything else to indicate failure; or -EINVAL if the function * pointer is null. */ -int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm)) +int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user), + void *user) { struct powerdomain *temp_pwrdm; unsigned long flags; @@ -293,7 +298,7 @@ int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm)) read_lock_irqsave(&pwrdm_rwlock, flags); list_for_each_entry(temp_pwrdm, &pwrdm_list, node) { - ret = (*fn)(temp_pwrdm); + ret = (*fn)(temp_pwrdm, user); if (ret) break; } @@ -1198,13 +1203,13 @@ int pwrdm_clk_state_switch(struct clk *clk) int pwrdm_pre_transition(void) { - pwrdm_for_each(_pwrdm_pre_transition_cb); + pwrdm_for_each(_pwrdm_pre_transition_cb, NULL); return 0; } int pwrdm_post_transition(void) { - pwrdm_for_each(_pwrdm_post_transition_cb); + pwrdm_for_each(_pwrdm_post_transition_cb, NULL); return 0; } -- cgit v1.2.3-70-g09d2 From 2811d6b3237c9b77007a6b2b10ee5b576da0574e Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Wed, 29 Oct 2008 13:31:24 +0200 Subject: OMAP: PM debug: Add PRCM register dump support Allows dumping out current register contents from the debug filesystem, and also allows user to add arbitrary register save points into code. Current register contents are available under debugfs at: [debugfs]/pm_debug/registers/current To add a save point, do following: From module init (or somewhere before the save call, called only once): pm_dbg_init_regset(n); // n=1..4, allocates memory for dump area #n From arbitrary code location: pm_dbg_regset_save(n); // n=1..4, saves registers to dump area #n After this, the register dump can be seen under [debugfs]/pm_debug/registers/n Signed-off-by: Tero Kristo Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/pm-debug.c | 226 ++++++++++++++++++++++++++++++++++++++++- arch/arm/mach-omap2/pm.h | 4 + 2 files changed, 229 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index 7383e85eac2..982aa67f268 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c @@ -52,6 +52,8 @@ int omap2_pm_debug; regs[reg_count].name = #reg; \ regs[reg_count++].val = __raw_readl(OMAP2_IO_ADDRESS(0x480fe000 + (off))) +static int __init pm_dbg_init(void); + void omap2_pm_dump(int mode, int resume, unsigned int us) { struct reg { @@ -157,6 +159,8 @@ void omap2_pm_dump(int mode, int resume, unsigned int us) #include #include +static void pm_dbg_regset_store(u32 *ptr); + struct dentry *pm_dbg_dir; static int pm_dbg_init_done; @@ -166,6 +170,160 @@ enum { DEBUG_FILE_TIMERS, }; +struct pm_module_def { + char name[8]; /* Name of the module */ + short type; /* CM or PRM */ + unsigned short offset; + int low; /* First register address on this module */ + int high; /* Last register address on this module */ +}; + +#define MOD_CM 0 +#define MOD_PRM 1 + +static const struct pm_module_def *pm_dbg_reg_modules; +static const struct pm_module_def omap3_pm_reg_modules[] = { + { "IVA2", MOD_CM, OMAP3430_IVA2_MOD, 0, 0x4c }, + { "OCP", MOD_CM, OCP_MOD, 0, 0x10 }, + { "MPU", MOD_CM, MPU_MOD, 4, 0x4c }, + { "CORE", MOD_CM, CORE_MOD, 0, 0x4c }, + { "SGX", MOD_CM, OMAP3430ES2_SGX_MOD, 0, 0x4c }, + { "WKUP", MOD_CM, WKUP_MOD, 0, 0x40 }, + { "CCR", MOD_CM, PLL_MOD, 0, 0x70 }, + { "DSS", MOD_CM, OMAP3430_DSS_MOD, 0, 0x4c }, + { "CAM", MOD_CM, OMAP3430_CAM_MOD, 0, 0x4c }, + { "PER", MOD_CM, OMAP3430_PER_MOD, 0, 0x4c }, + { "EMU", MOD_CM, OMAP3430_EMU_MOD, 0x40, 0x54 }, + { "NEON", MOD_CM, OMAP3430_NEON_MOD, 0x20, 0x48 }, + { "USB", MOD_CM, OMAP3430ES2_USBHOST_MOD, 0, 0x4c }, + + { "IVA2", MOD_PRM, OMAP3430_IVA2_MOD, 0x50, 0xfc }, + { "OCP", MOD_PRM, OCP_MOD, 4, 0x1c }, + { "MPU", MOD_PRM, MPU_MOD, 0x58, 0xe8 }, + { "CORE", MOD_PRM, CORE_MOD, 0x58, 0xf8 }, + { "SGX", MOD_PRM, OMAP3430ES2_SGX_MOD, 0x58, 0xe8 }, + { "WKUP", MOD_PRM, WKUP_MOD, 0xa0, 0xb0 }, + { "CCR", MOD_PRM, PLL_MOD, 0x40, 0x70 }, + { "DSS", MOD_PRM, OMAP3430_DSS_MOD, 0x58, 0xe8 }, + { "CAM", MOD_PRM, OMAP3430_CAM_MOD, 0x58, 0xe8 }, + { "PER", MOD_PRM, OMAP3430_PER_MOD, 0x58, 0xe8 }, + { "EMU", MOD_PRM, OMAP3430_EMU_MOD, 0x58, 0xe4 }, + { "GLBL", MOD_PRM, OMAP3430_GR_MOD, 0x20, 0xe4 }, + { "NEON", MOD_PRM, OMAP3430_NEON_MOD, 0x58, 0xe8 }, + { "USB", MOD_PRM, OMAP3430ES2_USBHOST_MOD, 0x58, 0xe8 }, + { "", 0, 0, 0, 0 }, +}; + +#define PM_DBG_MAX_REG_SETS 4 + +static void *pm_dbg_reg_set[PM_DBG_MAX_REG_SETS]; + +static int pm_dbg_get_regset_size(void) +{ + static int regset_size; + + if (regset_size == 0) { + int i = 0; + + while (pm_dbg_reg_modules[i].name[0] != 0) { + regset_size += pm_dbg_reg_modules[i].high + + 4 - pm_dbg_reg_modules[i].low; + i++; + } + } + return regset_size; +} + +static int pm_dbg_show_regs(struct seq_file *s, void *unused) +{ + int i, j; + unsigned long val; + int reg_set = (int)s->private; + u32 *ptr; + void *store = NULL; + int regs; + int linefeed; + + if (reg_set == 0) { + store = kmalloc(pm_dbg_get_regset_size(), GFP_KERNEL); + ptr = store; + pm_dbg_regset_store(ptr); + } else { + ptr = pm_dbg_reg_set[reg_set - 1]; + } + + i = 0; + + while (pm_dbg_reg_modules[i].name[0] != 0) { + regs = 0; + linefeed = 0; + if (pm_dbg_reg_modules[i].type == MOD_CM) + seq_printf(s, "MOD: CM_%s (%08x)\n", + pm_dbg_reg_modules[i].name, + (u32)(OMAP3430_CM_BASE + + pm_dbg_reg_modules[i].offset)); + else + seq_printf(s, "MOD: PRM_%s (%08x)\n", + pm_dbg_reg_modules[i].name, + (u32)(OMAP3430_PRM_BASE + + pm_dbg_reg_modules[i].offset)); + + for (j = pm_dbg_reg_modules[i].low; + j <= pm_dbg_reg_modules[i].high; j += 4) { + val = *(ptr++); + if (val != 0) { + regs++; + if (linefeed) { + seq_printf(s, "\n"); + linefeed = 0; + } + seq_printf(s, " %02x => %08lx", j, val); + if (regs % 4 == 0) + linefeed = 1; + } + } + seq_printf(s, "\n"); + i++; + } + + if (store != NULL) + kfree(store); + + return 0; +} + +static void pm_dbg_regset_store(u32 *ptr) +{ + int i, j; + u32 val; + + i = 0; + + while (pm_dbg_reg_modules[i].name[0] != 0) { + for (j = pm_dbg_reg_modules[i].low; + j <= pm_dbg_reg_modules[i].high; j += 4) { + if (pm_dbg_reg_modules[i].type == MOD_CM) + val = cm_read_mod_reg( + pm_dbg_reg_modules[i].offset, j); + else + val = prm_read_mod_reg( + pm_dbg_reg_modules[i].offset, j); + *(ptr++) = val; + } + i++; + } +} + +int pm_dbg_regset_save(int reg_set) +{ + if (pm_dbg_reg_set[reg_set-1] == NULL) + return -EINVAL; + + pm_dbg_regset_store(pm_dbg_reg_set[reg_set-1]); + + return 0; +} + static const char pwrdm_state_names[][4] = { "OFF", "RET", @@ -280,6 +438,11 @@ static int pm_dbg_open(struct inode *inode, struct file *file) }; } +static int pm_dbg_reg_open(struct inode *inode, struct file *file) +{ + return single_open(file, pm_dbg_show_regs, inode->i_private); +} + static const struct file_operations debug_fops = { .open = pm_dbg_open, .read = seq_read, @@ -287,6 +450,40 @@ static const struct file_operations debug_fops = { .release = single_release, }; +static const struct file_operations debug_reg_fops = { + .open = pm_dbg_reg_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + +int pm_dbg_regset_init(int reg_set) +{ + char name[2]; + + if (!pm_dbg_init_done) + pm_dbg_init(); + + if (reg_set < 1 || reg_set > PM_DBG_MAX_REG_SETS || + pm_dbg_reg_set[reg_set-1] != NULL) + return -EINVAL; + + pm_dbg_reg_set[reg_set-1] = + kmalloc(pm_dbg_get_regset_size(), GFP_KERNEL); + + if (pm_dbg_reg_set[reg_set-1] == NULL) + return -ENOMEM; + + if (pm_dbg_dir != NULL) { + sprintf(name, "%d", reg_set); + + (void) debugfs_create_file(name, S_IRUGO, + pm_dbg_dir, (void *)reg_set, &debug_reg_fops); + } + + return 0; +} + static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused) { int i; @@ -304,8 +501,20 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused) static int __init pm_dbg_init(void) { + int i; struct dentry *d; + char name[2]; + if (pm_dbg_init_done) + return 0; + + if (cpu_is_omap34xx()) + pm_dbg_reg_modules = omap3_pm_reg_modules; + else { + printk(KERN_ERR "%s: only OMAP3 supported\n", __func__); + return -ENODEV; + } + d = debugfs_create_dir("pm_debug", NULL); if (IS_ERR(d)) return PTR_ERR(d); @@ -317,11 +526,26 @@ static int __init pm_dbg_init(void) pwrdm_for_each(pwrdms_setup, NULL); + pm_dbg_dir = debugfs_create_dir("registers", d); + if (IS_ERR(pm_dbg_dir)) + return PTR_ERR(pm_dbg_dir); + + (void) debugfs_create_file("current", S_IRUGO, + pm_dbg_dir, (void *)0, &debug_reg_fops); + + for (i = 0; i < PM_DBG_MAX_REG_SETS; i++) + if (pm_dbg_reg_set[i] != NULL) { + sprintf(name, "%d", i+1); + (void) debugfs_create_file(name, S_IRUGO, + pm_dbg_dir, (void *)(i+1), &debug_reg_fops); + + } + pm_dbg_init_done = 1; return 0; } -late_initcall(pm_dbg_init); +arch_initcall(pm_dbg_init); #else void pm_dbg_update_time(struct powerdomain *pwrdm, int prev) {} diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index 4589db1c8af..8fa85677018 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h @@ -17,10 +17,14 @@ extern void omap2_pm_dump(int mode, int resume, unsigned int us); extern int omap2_pm_debug; extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev); +extern int pm_dbg_regset_save(int reg_set); +extern int pm_dbg_regset_init(int reg_set); #else #define omap2_pm_dump(mode, resume, us) do {} while (0); #define omap2_pm_debug 0 #define pm_dbg_update_time(pwrdm, prev) do {} while (0); +#define pm_dbg_regset_save(reg_set) do {} while (0); +#define pm_dbg_regset_init(reg_set) do {} while (0); #endif /* CONFIG_PM_DEBUG */ extern void omap24xx_idle_loop_suspend(void); -- cgit v1.2.3-70-g09d2 From 68d4778c701b7e22ddfd64e3afb6628c92718ad2 Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Wed, 26 Nov 2008 12:26:24 +0200 Subject: OMAP: PM: Added suspend target state control to debugfs for OMAP3 Target state can be read / programmed via files under: [debugfs]/pm_debug/[pwrdm]/suspend Signed-off-by: Tero Kristo Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/pm-debug.c | 31 +++++++++++++++++++++++++++++-- arch/arm/mach-omap2/pm.h | 3 +++ arch/arm/mach-omap2/pm34xx.c | 24 ++++++++++++++++++++++++ 3 files changed, 56 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index 982aa67f268..1b4c1600f8d 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include @@ -484,10 +485,28 @@ int pm_dbg_regset_init(int reg_set) return 0; } -static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused) +static int pwrdm_suspend_get(void *data, u64 *val) +{ + *val = omap3_pm_get_suspend_state((struct powerdomain *)data); + + if (*val >= 0) + return 0; + return *val; +} + +static int pwrdm_suspend_set(void *data, u64 val) +{ + return omap3_pm_set_suspend_state((struct powerdomain *)data, (int)val); +} + +DEFINE_SIMPLE_ATTRIBUTE(pwrdm_suspend_fops, pwrdm_suspend_get, + pwrdm_suspend_set, "%llu\n"); + +static int __init pwrdms_setup(struct powerdomain *pwrdm, void *dir) { int i; s64 t; + struct dentry *d; t = sched_clock(); @@ -496,6 +515,14 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused) pwrdm->timer = t; + if (strncmp(pwrdm->name, "dpll", 4) == 0) + return 0; + + d = debugfs_create_dir(pwrdm->name, (struct dentry *)dir); + + (void) debugfs_create_file("suspend", S_IRUGO|S_IWUSR, d, + (void *)pwrdm, &pwrdm_suspend_fops); + return 0; } @@ -524,7 +551,7 @@ static int __init pm_dbg_init(void) (void) debugfs_create_file("time", S_IRUGO, d, (void *)DEBUG_FILE_TIMERS, &debug_fops); - pwrdm_for_each(pwrdms_setup, NULL); + pwrdm_for_each(pwrdms_setup, (void *)d); pm_dbg_dir = debugfs_create_dir("registers", d); if (IS_ERR(pm_dbg_dir)) diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index 8fa85677018..8400f576892 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h @@ -13,6 +13,9 @@ #include +extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm); +extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state); + #ifdef CONFIG_PM_DEBUG extern void omap2_pm_dump(int mode, int resume, unsigned int us); extern int omap2_pm_debug; diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 331dfca93ed..26f2aca9abe 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -664,6 +664,30 @@ static void __init prcm_setup_regs(void) omap3_d2d_idle(); } +int omap3_pm_get_suspend_state(struct powerdomain *pwrdm) +{ + struct power_state *pwrst; + + list_for_each_entry(pwrst, &pwrst_list, node) { + if (pwrst->pwrdm == pwrdm) + return pwrst->next_state; + } + return -EINVAL; +} + +int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state) +{ + struct power_state *pwrst; + + list_for_each_entry(pwrst, &pwrst_list, node) { + if (pwrst->pwrdm == pwrdm) { + pwrst->next_state = state; + return 0; + } + } + return -EINVAL; +} + static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused) { struct power_state *pwrst; -- cgit v1.2.3-70-g09d2 From 5d113262ee9e074e0d36362d878892819bfdeb47 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Thu, 3 Sep 2009 20:13:53 +0300 Subject: OMAP: powerdomain: Fix overflow when doing powerdomain deps lookups. At the end of the list pd is a pointer to a NULL struct, so checking if the address == NULL doesn't help here. In fact the original code will just keep running past the struct to read who knows what in memory. This case manifests itself when from clkdms_setup() when enabling auto idle for a clock domain and the clockdomain usecount is greater than 0. When _clkdm_add_autodeps() tries to add the a dependency that does not exist in the powerdomain->wkdep_srcs array the for loop will run past the wkdep_srcs array. Currently in linux-omap you won't hit this because the not found case is never executed, unless you start modifying powerdomains and their wakeup/sleep deps. Signed-off-by: Mike Chan Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/powerdomain.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index 983f1cb676b..66206b6357f 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c @@ -83,7 +83,7 @@ static struct powerdomain *_pwrdm_deps_lookup(struct powerdomain *pwrdm, if (!pwrdm || !deps || !omap_chip_is(pwrdm->omap_chip)) return ERR_PTR(-EINVAL); - for (pd = deps; pd; pd++) { + for (pd = deps; pd->pwrdm_name; pd++) { if (!omap_chip_is(pd->omap_chip)) continue; @@ -96,7 +96,7 @@ static struct powerdomain *_pwrdm_deps_lookup(struct powerdomain *pwrdm, } - if (!pd) + if (!pd->pwrdm_name) return ERR_PTR(-ENOENT); return pd->pwrdm; -- cgit v1.2.3-70-g09d2 From 11b66383aa722a3321d2aeec09808c5b140ad396 Mon Sep 17 00:00:00 2001 From: Sanjeev Premi Date: Thu, 3 Sep 2009 20:13:58 +0300 Subject: OMAP3 clock: Fixed processing of bootarg 'mpurate' The argument 'mpurate' had no effect on the MPU frequency. This patch fixes the same. Signed-off-by: Sanjeev Premi Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/clock34xx.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c index cd7819cc0c9..fafcd32e690 100644 --- a/arch/arm/mach-omap2/clock34xx.c +++ b/arch/arm/mach-omap2/clock34xx.c @@ -27,6 +27,7 @@ #include #include +#include #include #include #include @@ -1067,17 +1068,17 @@ static int __init omap2_clk_arch_init(void) return -EINVAL; /* REVISIT: not yet ready for 343x */ -#if 0 - if (clk_set_rate(&virt_prcm_set, mpurate)) - printk(KERN_ERR "Could not find matching MPU rate\n"); -#endif + if (clk_set_rate(&dpll1_ck, mpurate)) + printk(KERN_ERR "*** Unable to set MPU rate\n"); recalculate_root_clocks(); - printk(KERN_INFO "Switched to new clocking rate (Crystal/DPLL3/MPU): " + printk(KERN_INFO "Switched to new clocking rate (Crystal/Core/MPU): " "%ld.%01ld/%ld/%ld MHz\n", - (osc_sys_ck.rate / 1000000), (osc_sys_ck.rate / 100000) % 10, - (core_ck.rate / 1000000), (dpll1_fck.rate / 1000000)) ; + (osc_sys_ck.rate / 1000000), ((osc_sys_ck.rate / 100000) % 10), + (core_ck.rate / 1000000), (arm_fck.rate / 1000000)) ; + + calibrate_delay(); return 0; } @@ -1136,7 +1137,7 @@ int __init omap2_clk_init(void) recalculate_root_clocks(); - printk(KERN_INFO "Clocking rate (Crystal/DPLL/ARM core): " + printk(KERN_INFO "Clocking rate (Crystal/Core/MPU): " "%ld.%01ld/%ld/%ld MHz\n", (osc_sys_ck.rate / 1000000), (osc_sys_ck.rate / 100000) % 10, (core_ck.rate / 1000000), (arm_fck.rate / 1000000)); -- cgit v1.2.3-70-g09d2 From 19f4d3a90bf2815cb97b66e603b5e0311d234458 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Thu, 3 Sep 2009 20:14:00 +0300 Subject: OMAP clock: associate MPU clocks with the mpu_clkdm All MPU-related clocks should be in the mpu_clkdm. This is needed for the upcoming omap_hwmod patches, which needs to know the clockdomain that arm_fck is in. Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/clock34xx.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h index 57cc2725b92..9a823c341b7 100644 --- a/arch/arm/mach-omap2/clock34xx.h +++ b/arch/arm/mach-omap2/clock34xx.h @@ -1020,6 +1020,7 @@ static struct clk arm_fck = { .clksel_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_IDLEST_PLL), .clksel_mask = OMAP3430_ST_MPU_CLK_MASK, .clksel = arm_fck_clksel, + .clkdm_name = "mpu_clkdm", .recalc = &omap2_clksel_recalc, }; -- cgit v1.2.3-70-g09d2 From 08e3d5f28d4d696dc559898676019cbd36501025 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Thu, 3 Sep 2009 20:14:00 +0300 Subject: OMAP3 clock: remove superfluous calls to omap2_init_clk_clkdm omap2_init_clk_clkdm() is called as part of the chip architecture-specific initialization code, so calling it again from the struct clk init pointer just wastes cycles. Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/clock34xx.h | 20 -------------------- 1 file changed, 20 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h index 9a823c341b7..c8119781e00 100644 --- a/arch/arm/mach-omap2/clock34xx.h +++ b/arch/arm/mach-omap2/clock34xx.h @@ -1156,7 +1156,6 @@ static struct clk gfx_cg1_ck = { .name = "gfx_cg1_ck", .ops = &clkops_omap2_dflt_wait, .parent = &gfx_l3_fck, /* REVISIT: correct? */ - .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN), .enable_bit = OMAP3430ES1_EN_2D_SHIFT, .clkdm_name = "gfx_3430es1_clkdm", @@ -1167,7 +1166,6 @@ static struct clk gfx_cg2_ck = { .name = "gfx_cg2_ck", .ops = &clkops_omap2_dflt_wait, .parent = &gfx_l3_fck, /* REVISIT: correct? */ - .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN), .enable_bit = OMAP3430ES1_EN_3D_SHIFT, .clkdm_name = "gfx_3430es1_clkdm", @@ -1211,7 +1209,6 @@ static struct clk sgx_ick = { .name = "sgx_ick", .ops = &clkops_omap2_dflt_wait, .parent = &l3_ick, - .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_ICLKEN), .enable_bit = OMAP3430ES2_CM_ICLKEN_SGX_EN_SGX_SHIFT, .clkdm_name = "sgx_clkdm", @@ -1224,7 +1221,6 @@ static struct clk d2d_26m_fck = { .name = "d2d_26m_fck", .ops = &clkops_omap2_dflt_wait, .parent = &sys_ck, - .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430ES1_EN_D2D_SHIFT, .clkdm_name = "d2d_clkdm", @@ -1235,7 +1231,6 @@ static struct clk modem_fck = { .name = "modem_fck", .ops = &clkops_omap2_dflt_wait, .parent = &sys_ck, - .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_MODEM_SHIFT, .clkdm_name = "d2d_clkdm", @@ -1623,7 +1618,6 @@ static struct clk core_l3_ick = { .name = "core_l3_ick", .ops = &clkops_null, .parent = &l3_ick, - .init = &omap2_init_clk_clkdm, .clkdm_name = "core_l3_clkdm", .recalc = &followparent_recalc, }; @@ -1692,7 +1686,6 @@ static struct clk core_l4_ick = { .name = "core_l4_ick", .ops = &clkops_null, .parent = &l4_ick, - .init = &omap2_init_clk_clkdm, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -2090,7 +2083,6 @@ static struct clk dss_tv_fck = { .name = "dss_tv_fck", .ops = &clkops_omap2_dflt, .parent = &omap_54m_fck, - .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_TV_SHIFT, .clkdm_name = "dss_clkdm", @@ -2101,7 +2093,6 @@ static struct clk dss_96m_fck = { .name = "dss_96m_fck", .ops = &clkops_omap2_dflt, .parent = &omap_96m_fck, - .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_TV_SHIFT, .clkdm_name = "dss_clkdm", @@ -2112,7 +2103,6 @@ static struct clk dss2_alwon_fck = { .name = "dss2_alwon_fck", .ops = &clkops_omap2_dflt, .parent = &sys_ck, - .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_DSS2_SHIFT, .clkdm_name = "dss_clkdm", @@ -2124,7 +2114,6 @@ static struct clk dss_ick_3430es1 = { .name = "dss_ick", .ops = &clkops_omap2_dflt, .parent = &l4_ick, - .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_ICLKEN), .enable_bit = OMAP3430_CM_ICLKEN_DSS_EN_DSS_SHIFT, .clkdm_name = "dss_clkdm", @@ -2136,7 +2125,6 @@ static struct clk dss_ick_3430es2 = { .name = "dss_ick", .ops = &clkops_omap3430es2_dss_usbhost_wait, .parent = &l4_ick, - .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_ICLKEN), .enable_bit = OMAP3430_CM_ICLKEN_DSS_EN_DSS_SHIFT, .clkdm_name = "dss_clkdm", @@ -2160,7 +2148,6 @@ static struct clk cam_ick = { .name = "cam_ick", .ops = &clkops_omap2_dflt, .parent = &l4_ick, - .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_CAM_SHIFT, .clkdm_name = "cam_clkdm", @@ -2171,7 +2158,6 @@ static struct clk csi2_96m_fck = { .name = "csi2_96m_fck", .ops = &clkops_omap2_dflt, .parent = &core_96m_fck, - .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_CSI2_SHIFT, .clkdm_name = "cam_clkdm", @@ -2184,7 +2170,6 @@ static struct clk usbhost_120m_fck = { .name = "usbhost_120m_fck", .ops = &clkops_omap2_dflt, .parent = &dpll5_m2_ck, - .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN), .enable_bit = OMAP3430ES2_EN_USBHOST2_SHIFT, .clkdm_name = "usbhost_clkdm", @@ -2195,7 +2180,6 @@ static struct clk usbhost_48m_fck = { .name = "usbhost_48m_fck", .ops = &clkops_omap3430es2_dss_usbhost_wait, .parent = &omap_48m_fck, - .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN), .enable_bit = OMAP3430ES2_EN_USBHOST1_SHIFT, .clkdm_name = "usbhost_clkdm", @@ -2207,7 +2191,6 @@ static struct clk usbhost_ick = { .name = "usbhost_ick", .ops = &clkops_omap3430es2_dss_usbhost_wait, .parent = &l4_ick, - .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_ICLKEN), .enable_bit = OMAP3430ES2_EN_USBHOST_SHIFT, .clkdm_name = "usbhost_clkdm", @@ -2269,7 +2252,6 @@ static struct clk gpt1_fck = { static struct clk wkup_32k_fck = { .name = "wkup_32k_fck", .ops = &clkops_null, - .init = &omap2_init_clk_clkdm, .parent = &omap_32k_fck, .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, @@ -2384,7 +2366,6 @@ static struct clk per_96m_fck = { .name = "per_96m_fck", .ops = &clkops_null, .parent = &omap_96m_alwon_fck, - .init = &omap2_init_clk_clkdm, .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2393,7 +2374,6 @@ static struct clk per_48m_fck = { .name = "per_48m_fck", .ops = &clkops_null, .parent = &omap_48m_fck, - .init = &omap2_init_clk_clkdm, .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; -- cgit v1.2.3-70-g09d2 From c0407a96d04794be586eab4a412320079446cf93 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Thu, 3 Sep 2009 20:14:01 +0300 Subject: OMAP2/3 PM: create the OMAP PM interface and add a default OMAP PM no-op layer MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The interface provides device drivers, CPUFreq, and DSPBridge with a means of controlling OMAP power management parameters that are not yet supported by the Linux PM PMQoS interface. Copious documentation is in the patch in Documentation/arm/OMAP/omap_pm and the interface header file, arch/arm/plat-omap/include/mach/omap-pm.h. Thanks to Rajendra Nayak for adding CORE (VDD2) OPP support and moving the OPP table initialization earlier in the event that the clock code needs them. Thanks to Tero Kristo for fixing the parameter check in omap_pm_set_min_bus_tput(). Jouni signed off on Tero's patch. Signed-off-by: Paul Walmsley Signed-off-by: Kevin Hilman Signed-off-by: Rajendra Nayak Signed-off-by: Tero Kristo Signed-off-by: Jouni Högander Cc: Tony Lindgren Cc: Igor Stoppa Cc: Richard Woodruff Cc: Anand Sawant Cc: Sakari Poussa Cc: Veeramanikandan Raju Cc: Karthik Dasu --- Documentation/arm/OMAP/omap_pm | 129 +++++++++++++ arch/arm/mach-omap2/io.c | 4 + arch/arm/plat-omap/Kconfig | 13 ++ arch/arm/plat-omap/Makefile | 1 + arch/arm/plat-omap/include/mach/omap-pm.h | 301 ++++++++++++++++++++++++++++++ arch/arm/plat-omap/omap-pm-noop.c | 296 +++++++++++++++++++++++++++++ 6 files changed, 744 insertions(+) create mode 100644 Documentation/arm/OMAP/omap_pm create mode 100644 arch/arm/plat-omap/include/mach/omap-pm.h create mode 100644 arch/arm/plat-omap/omap-pm-noop.c (limited to 'arch/arm/mach-omap2') diff --git a/Documentation/arm/OMAP/omap_pm b/Documentation/arm/OMAP/omap_pm new file mode 100644 index 00000000000..5389440aade --- /dev/null +++ b/Documentation/arm/OMAP/omap_pm @@ -0,0 +1,129 @@ + +The OMAP PM interface +===================== + +This document describes the temporary OMAP PM interface. Driver +authors use these functions to communicate minimum latency or +throughput constraints to the kernel power management code. +Over time, the intention is to merge features from the OMAP PM +interface into the Linux PM QoS code. + +Drivers need to express PM parameters which: + +- support the range of power management parameters present in the TI SRF; + +- separate the drivers from the underlying PM parameter + implementation, whether it is the TI SRF or Linux PM QoS or Linux + latency framework or something else; + +- specify PM parameters in terms of fundamental units, such as + latency and throughput, rather than units which are specific to OMAP + or to particular OMAP variants; + +- allow drivers which are shared with other architectures (e.g., + DaVinci) to add these constraints in a way which won't affect non-OMAP + systems, + +- can be implemented immediately with minimal disruption of other + architectures. + + +This document proposes the OMAP PM interface, including the following +five power management functions for driver code: + +1. Set the maximum MPU wakeup latency: + (*pdata->set_max_mpu_wakeup_lat)(struct device *dev, unsigned long t) + +2. Set the maximum device wakeup latency: + (*pdata->set_max_dev_wakeup_lat)(struct device *dev, unsigned long t) + +3. Set the maximum system DMA transfer start latency (CORE pwrdm): + (*pdata->set_max_sdma_lat)(struct device *dev, long t) + +4. Set the minimum bus throughput needed by a device: + (*pdata->set_min_bus_tput)(struct device *dev, u8 agent_id, unsigned long r) + +5. Return the number of times the device has lost context + (*pdata->get_dev_context_loss_count)(struct device *dev) + + +Further documentation for all OMAP PM interface functions can be +found in arch/arm/plat-omap/include/mach/omap-pm.h. + + +The OMAP PM layer is intended to be temporary +--------------------------------------------- + +The intention is that eventually the Linux PM QoS layer should support +the range of power management features present in OMAP3. As this +happens, existing drivers using the OMAP PM interface can be modified +to use the Linux PM QoS code; and the OMAP PM interface can disappear. + + +Driver usage of the OMAP PM functions +------------------------------------- + +As the 'pdata' in the above examples indicates, these functions are +exposed to drivers through function pointers in driver .platform_data +structures. The function pointers are initialized by the board-*.c +files to point to the corresponding OMAP PM functions: +.set_max_dev_wakeup_lat will point to +omap_pm_set_max_dev_wakeup_lat(), etc. Other architectures which do +not support these functions should leave these function pointers set +to NULL. Drivers should use the following idiom: + + if (pdata->set_max_dev_wakeup_lat) + (*pdata->set_max_dev_wakeup_lat)(dev, t); + +The most common usage of these functions will probably be to specify +the maximum time from when an interrupt occurs, to when the device +becomes accessible. To accomplish this, driver writers should use the +set_max_mpu_wakeup_lat() function to to constrain the MPU wakeup +latency, and the set_max_dev_wakeup_lat() function to constrain the +device wakeup latency (from clk_enable() to accessibility). For +example, + + /* Limit MPU wakeup latency */ + if (pdata->set_max_mpu_wakeup_lat) + (*pdata->set_max_mpu_wakeup_lat)(dev, tc); + + /* Limit device powerdomain wakeup latency */ + if (pdata->set_max_dev_wakeup_lat) + (*pdata->set_max_dev_wakeup_lat)(dev, td); + + /* total wakeup latency in this example: (tc + td) */ + +The PM parameters can be overwritten by calling the function again +with the new value. The settings can be removed by calling the +function with a t argument of -1 (except in the case of +set_max_bus_tput(), which should be called with an r argument of 0). + +The fifth function above, omap_pm_get_dev_context_loss_count(), +is intended as an optimization to allow drivers to determine whether the +device has lost its internal context. If context has been lost, the +driver must restore its internal context before proceeding. + + +Other specialized interface functions +------------------------------------- + +The five functions listed above are intended to be usable by any +device driver. DSPBridge and CPUFreq have a few special requirements. +DSPBridge expresses target DSP performance levels in terms of OPP IDs. +CPUFreq expresses target MPU performance levels in terms of MPU +frequency. The OMAP PM interface contains functions for these +specialized cases to convert that input information (OPPs/MPU +frequency) into the form that the underlying power management +implementation needs: + +6. (*pdata->dsp_get_opp_table)(void) + +7. (*pdata->dsp_set_min_opp)(u8 opp_id) + +8. (*pdata->dsp_get_opp)(void) + +9. (*pdata->cpu_get_freq_table)(void) + +10. (*pdata->cpu_set_freq)(unsigned long f) + +11. (*pdata->cpu_get_freq)(void) diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index e9b9bcb19b4..4bfe873e1b8 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -36,6 +36,7 @@ #ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once clkdev is ready */ #include "clock.h" +#include #include #include "powerdomains.h" @@ -281,9 +282,12 @@ void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0, { omap2_mux_init(); #ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once the clkdev is ready */ + /* The OPP tables have to be registered before a clk init */ + omap_pm_if_early_init(mpu_opps, dsp_opps, l3_opps); pwrdm_init(powerdomains_omap); clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps); omap2_clk_init(); + omap_pm_if_init(); omap2_sdrc_init(sdrc_cs0, sdrc_cs1); _omap2_init_reprogram_sdrc(); #endif diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index ab9f9efc9b6..64b3f52bd9b 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig @@ -187,6 +187,19 @@ config OMAP_SERIAL_WAKE to data on the serial RX line. This allows you to wake the system from serial console. +choice + prompt "OMAP PM layer selection" + depends on ARCH_OMAP + default OMAP_PM_NOOP + +config OMAP_PM_NONE + bool "No PM layer" + +config OMAP_PM_NOOP + bool "No-op/debug PM layer" + +endchoice + endmenu endif diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile index 769a4c20036..5e10d0a2eb8 100644 --- a/arch/arm/plat-omap/Makefile +++ b/arch/arm/plat-omap/Makefile @@ -26,3 +26,4 @@ obj-y += $(i2c-omap-m) $(i2c-omap-y) # OMAP mailbox framework obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox.o +obj-$(CONFIG_OMAP_PM_NOOP) += omap-pm-noop.o \ No newline at end of file diff --git a/arch/arm/plat-omap/include/mach/omap-pm.h b/arch/arm/plat-omap/include/mach/omap-pm.h new file mode 100644 index 00000000000..3ee41d71149 --- /dev/null +++ b/arch/arm/plat-omap/include/mach/omap-pm.h @@ -0,0 +1,301 @@ +/* + * omap-pm.h - OMAP power management interface + * + * Copyright (C) 2008-2009 Texas Instruments, Inc. + * Copyright (C) 2008-2009 Nokia Corporation + * Paul Walmsley + * + * Interface developed by (in alphabetical order): Karthik Dasu, Jouni + * Högander, Tony Lindgren, Rajendra Nayak, Sakari Poussa, + * Veeramanikandan Raju, Anand Sawant, Igor Stoppa, Paul Walmsley, + * Richard Woodruff + */ + +#ifndef ASM_ARM_ARCH_OMAP_OMAP_PM_H +#define ASM_ARM_ARCH_OMAP_OMAP_PM_H + +#include +#include + +#include "powerdomain.h" + +/** + * struct omap_opp - clock frequency-to-OPP ID table for DSP, MPU + * @rate: target clock rate + * @opp_id: OPP ID + * @min_vdd: minimum VDD1 voltage (in millivolts) for this OPP + * + * Operating performance point data. Can vary by OMAP chip and board. + */ +struct omap_opp { + unsigned long rate; + u8 opp_id; + u16 min_vdd; +}; + +extern struct omap_opp *mpu_opps; +extern struct omap_opp *dsp_opps; +extern struct omap_opp *l3_opps; + +/* + * agent_id values for use with omap_pm_set_min_bus_tput(): + * + * OCP_INITIATOR_AGENT is only valid for devices that can act as + * initiators -- it represents the device's L3 interconnect + * connection. OCP_TARGET_AGENT represents the device's L4 + * interconnect connection. + */ +#define OCP_TARGET_AGENT 1 +#define OCP_INITIATOR_AGENT 2 + +/** + * omap_pm_if_early_init - OMAP PM init code called before clock fw init + * @mpu_opp_table: array ptr to struct omap_opp for MPU + * @dsp_opp_table: array ptr to struct omap_opp for DSP + * @l3_opp_table : array ptr to struct omap_opp for CORE + * + * Initialize anything that must be configured before the clock + * framework starts. The "_if_" is to avoid name collisions with the + * PM idle-loop code. + */ +int __init omap_pm_if_early_init(struct omap_opp *mpu_opp_table, + struct omap_opp *dsp_opp_table, + struct omap_opp *l3_opp_table); + +/** + * omap_pm_if_init - OMAP PM init code called after clock fw init + * + * The main initialization code. OPP tables are passed in here. The + * "_if_" is to avoid name collisions with the PM idle-loop code. + */ +int __init omap_pm_if_init(void); + +/** + * omap_pm_if_exit - OMAP PM exit code + * + * Exit code; currently unused. The "_if_" is to avoid name + * collisions with the PM idle-loop code. + */ +void omap_pm_if_exit(void); + +/* + * Device-driver-originated constraints (via board-*.c files, platform_data) + */ + + +/** + * omap_pm_set_max_mpu_wakeup_lat - set the maximum MPU wakeup latency + * @dev: struct device * requesting the constraint + * @t: maximum MPU wakeup latency in microseconds + * + * Request that the maximum interrupt latency for the MPU to be no + * greater than 't' microseconds. "Interrupt latency" in this case is + * defined as the elapsed time from the occurrence of a hardware or + * timer interrupt to the time when the device driver's interrupt + * service routine has been entered by the MPU. + * + * It is intended that underlying PM code will use this information to + * determine what power state to put the MPU powerdomain into, and + * possibly the CORE powerdomain as well, since interrupt handling + * code currently runs from SDRAM. Advanced PM or board*.c code may + * also configure interrupt controller priorities, OCP bus priorities, + * CPU speed(s), etc. + * + * This function will not affect device wakeup latency, e.g., time + * elapsed from when a device driver enables a hardware device with + * clk_enable(), to when the device is ready for register access or + * other use. To control this device wakeup latency, use + * set_max_dev_wakeup_lat() + * + * Multiple calls to set_max_mpu_wakeup_lat() will replace the + * previous t value. To remove the latency target for the MPU, call + * with t = -1. + * + * No return value. + */ +void omap_pm_set_max_mpu_wakeup_lat(struct device *dev, long t); + + +/** + * omap_pm_set_min_bus_tput - set minimum bus throughput needed by device + * @dev: struct device * requesting the constraint + * @tbus_id: interconnect to operate on (OCP_{INITIATOR,TARGET}_AGENT) + * @r: minimum throughput (in KiB/s) + * + * Request that the minimum data throughput on the OCP interconnect + * attached to device 'dev' interconnect agent 'tbus_id' be no less + * than 'r' KiB/s. + * + * It is expected that the OMAP PM or bus code will use this + * information to set the interconnect clock to run at the lowest + * possible speed that satisfies all current system users. The PM or + * bus code will adjust the estimate based on its model of the bus, so + * device driver authors should attempt to specify an accurate + * quantity for their device use case, and let the PM or bus code + * overestimate the numbers as necessary to handle request/response + * latency, other competing users on the system, etc. On OMAP2/3, if + * a driver requests a minimum L4 interconnect speed constraint, the + * code will also need to add an minimum L3 interconnect speed + * constraint, + * + * Multiple calls to set_min_bus_tput() will replace the previous rate + * value for this device. To remove the interconnect throughput + * restriction for this device, call with r = 0. + * + * No return value. + */ +void omap_pm_set_min_bus_tput(struct device *dev, u8 agent_id, unsigned long r); + + +/** + * omap_pm_set_max_dev_wakeup_lat - set the maximum device enable latency + * @dev: struct device * + * @t: maximum device wakeup latency in microseconds + * + * Request that the maximum amount of time necessary for a device to + * become accessible after its clocks are enabled should be no greater + * than 't' microseconds. Specifically, this represents the time from + * when a device driver enables device clocks with clk_enable(), to + * when the register reads and writes on the device will succeed. + * This function should be called before clk_disable() is called, + * since the power state transition decision may be made during + * clk_disable(). + * + * It is intended that underlying PM code will use this information to + * determine what power state to put the powerdomain enclosing this + * device into. + * + * Multiple calls to set_max_dev_wakeup_lat() will replace the + * previous wakeup latency values for this device. To remove the wakeup + * latency restriction for this device, call with t = -1. + * + * No return value. + */ +void omap_pm_set_max_dev_wakeup_lat(struct device *dev, long t); + + +/** + * omap_pm_set_max_sdma_lat - set the maximum system DMA transfer start latency + * @dev: struct device * + * @t: maximum DMA transfer start latency in microseconds + * + * Request that the maximum system DMA transfer start latency for this + * device 'dev' should be no greater than 't' microseconds. "DMA + * transfer start latency" here is defined as the elapsed time from + * when a device (e.g., McBSP) requests that a system DMA transfer + * start or continue, to the time at which data starts to flow into + * that device from the system DMA controller. + * + * It is intended that underlying PM code will use this information to + * determine what power state to put the CORE powerdomain into. + * + * Since system DMA transfers may not involve the MPU, this function + * will not affect MPU wakeup latency. Use set_max_cpu_lat() to do + * so. Similarly, this function will not affect device wakeup latency + * -- use set_max_dev_wakeup_lat() to affect that. + * + * Multiple calls to set_max_sdma_lat() will replace the previous t + * value for this device. To remove the maximum DMA latency for this + * device, call with t = -1. + * + * No return value. + */ +void omap_pm_set_max_sdma_lat(struct device *dev, long t); + + +/* + * DSP Bridge-specific constraints + */ + +/** + * omap_pm_dsp_get_opp_table - get OPP->DSP clock frequency table + * + * Intended for use by DSPBridge. Returns an array of OPP->DSP clock + * frequency entries. The final item in the array should have .rate = + * .opp_id = 0. + */ +const struct omap_opp *omap_pm_dsp_get_opp_table(void); + +/** + * omap_pm_dsp_set_min_opp - receive desired OPP target ID from DSP Bridge + * @opp_id: target DSP OPP ID + * + * Set a minimum OPP ID for the DSP. This is intended to be called + * only from the DSP Bridge MPU-side driver. Unfortunately, the only + * information that code receives from the DSP/BIOS load estimator is the + * target OPP ID; hence, this interface. No return value. + */ +void omap_pm_dsp_set_min_opp(u8 opp_id); + +/** + * omap_pm_dsp_get_opp - report the current DSP OPP ID + * + * Report the current OPP for the DSP. Since on OMAP3, the DSP and + * MPU share a single voltage domain, the OPP ID returned back may + * represent a higher DSP speed than the OPP requested via + * omap_pm_dsp_set_min_opp(). + * + * Returns the current VDD1 OPP ID, or 0 upon error. + */ +u8 omap_pm_dsp_get_opp(void); + + +/* + * CPUFreq-originated constraint + * + * In the future, this should be handled by custom OPP clocktype + * functions. + */ + +/** + * omap_pm_cpu_get_freq_table - return a cpufreq_frequency_table array ptr + * + * Provide a frequency table usable by CPUFreq for the current chip/board. + * Returns a pointer to a struct cpufreq_frequency_table array or NULL + * upon error. + */ +struct cpufreq_frequency_table **omap_pm_cpu_get_freq_table(void); + +/** + * omap_pm_cpu_set_freq - set the current minimum MPU frequency + * @f: MPU frequency in Hz + * + * Set the current minimum CPU frequency. The actual CPU frequency + * used could end up higher if the DSP requested a higher OPP. + * Intended to be called by plat-omap/cpu_omap.c:omap_target(). No + * return value. + */ +void omap_pm_cpu_set_freq(unsigned long f); + +/** + * omap_pm_cpu_get_freq - report the current CPU frequency + * + * Returns the current MPU frequency, or 0 upon error. + */ +unsigned long omap_pm_cpu_get_freq(void); + + +/* + * Device context loss tracking + */ + +/** + * omap_pm_get_dev_context_loss_count - return count of times dev has lost ctx + * @dev: struct device * + * + * This function returns the number of times that the device @dev has + * lost its internal context. This generally occurs on a powerdomain + * transition to OFF. Drivers use this as an optimization to avoid restoring + * context if the device hasn't lost it. To use, drivers should initially + * call this in their context save functions and store the result. Early in + * the driver's context restore function, the driver should call this function + * again, and compare the result to the stored counter. If they differ, the + * driver must restore device context. If the number of context losses + * exceeds the maximum positive integer, the function will wrap to 0 and + * continue counting. Returns the number of context losses for this device, + * or -EINVAL upon error. + */ +int omap_pm_get_dev_context_loss_count(struct device *dev); + + +#endif diff --git a/arch/arm/plat-omap/omap-pm-noop.c b/arch/arm/plat-omap/omap-pm-noop.c new file mode 100644 index 00000000000..e98f0a2a6c2 --- /dev/null +++ b/arch/arm/plat-omap/omap-pm-noop.c @@ -0,0 +1,296 @@ +/* + * omap-pm-noop.c - OMAP power management interface - dummy version + * + * This code implements the OMAP power management interface to + * drivers, CPUIdle, CPUFreq, and DSP Bridge. It is strictly for + * debug/demonstration use, as it does nothing but printk() whenever a + * function is called (when DEBUG is defined, below) + * + * Copyright (C) 2008-2009 Texas Instruments, Inc. + * Copyright (C) 2008-2009 Nokia Corporation + * Paul Walmsley + * + * Interface developed by (in alphabetical order): + * Karthik Dasu, Tony Lindgren, Rajendra Nayak, Sakari Poussa, Veeramanikandan + * Raju, Anand Sawant, Igor Stoppa, Paul Walmsley, Richard Woodruff + */ + +#undef DEBUG + +#include +#include +#include + +/* Interface documentation is in mach/omap-pm.h */ +#include + +#include + +struct omap_opp *dsp_opps; +struct omap_opp *mpu_opps; +struct omap_opp *l3_opps; + +/* + * Device-driver-originated constraints (via board-*.c files) + */ + +void omap_pm_set_max_mpu_wakeup_lat(struct device *dev, long t) +{ + if (!dev || t < -1) { + WARN_ON(1); + return; + }; + + if (t == -1) + pr_debug("OMAP PM: remove max MPU wakeup latency constraint: " + "dev %s\n", dev_name(dev)); + else + pr_debug("OMAP PM: add max MPU wakeup latency constraint: " + "dev %s, t = %ld usec\n", dev_name(dev), t); + + /* + * For current Linux, this needs to map the MPU to a + * powerdomain, then go through the list of current max lat + * constraints on the MPU and find the smallest. If + * the latency constraint has changed, the code should + * recompute the state to enter for the next powerdomain + * state. + * + * TI CDP code can call constraint_set here. + */ +} + +void omap_pm_set_min_bus_tput(struct device *dev, u8 agent_id, unsigned long r) +{ + if (!dev || (agent_id != OCP_INITIATOR_AGENT && + agent_id != OCP_TARGET_AGENT)) { + WARN_ON(1); + return; + }; + + if (r == 0) + pr_debug("OMAP PM: remove min bus tput constraint: " + "dev %s for agent_id %d\n", dev_name(dev), agent_id); + else + pr_debug("OMAP PM: add min bus tput constraint: " + "dev %s for agent_id %d: rate %ld KiB\n", + dev_name(dev), agent_id, r); + + /* + * This code should model the interconnect and compute the + * required clock frequency, convert that to a VDD2 OPP ID, then + * set the VDD2 OPP appropriately. + * + * TI CDP code can call constraint_set here on the VDD2 OPP. + */ +} + +void omap_pm_set_max_dev_wakeup_lat(struct device *dev, long t) +{ + if (!dev || t < -1) { + WARN_ON(1); + return; + }; + + if (t == -1) + pr_debug("OMAP PM: remove max device latency constraint: " + "dev %s\n", dev_name(dev)); + else + pr_debug("OMAP PM: add max device latency constraint: " + "dev %s, t = %ld usec\n", dev_name(dev), t); + + /* + * For current Linux, this needs to map the device to a + * powerdomain, then go through the list of current max lat + * constraints on that powerdomain and find the smallest. If + * the latency constraint has changed, the code should + * recompute the state to enter for the next powerdomain + * state. Conceivably, this code should also determine + * whether to actually disable the device clocks or not, + * depending on how long it takes to re-enable the clocks. + * + * TI CDP code can call constraint_set here. + */ +} + +void omap_pm_set_max_sdma_lat(struct device *dev, long t) +{ + if (!dev || t < -1) { + WARN_ON(1); + return; + }; + + if (t == -1) + pr_debug("OMAP PM: remove max DMA latency constraint: " + "dev %s\n", dev_name(dev)); + else + pr_debug("OMAP PM: add max DMA latency constraint: " + "dev %s, t = %ld usec\n", dev_name(dev), t); + + /* + * For current Linux PM QOS params, this code should scan the + * list of maximum CPU and DMA latencies and select the + * smallest, then set cpu_dma_latency pm_qos_param + * accordingly. + * + * For future Linux PM QOS params, with separate CPU and DMA + * latency params, this code should just set the dma_latency param. + * + * TI CDP code can call constraint_set here. + */ + +} + + +/* + * DSP Bridge-specific constraints + */ + +const struct omap_opp *omap_pm_dsp_get_opp_table(void) +{ + pr_debug("OMAP PM: DSP request for OPP table\n"); + + /* + * Return DSP frequency table here: The final item in the + * array should have .rate = .opp_id = 0. + */ + + return NULL; +} + +void omap_pm_dsp_set_min_opp(u8 opp_id) +{ + if (opp_id == 0) { + WARN_ON(1); + return; + } + + pr_debug("OMAP PM: DSP requests minimum VDD1 OPP to be %d\n", opp_id); + + /* + * + * For l-o dev tree, our VDD1 clk is keyed on OPP ID, so we + * can just test to see which is higher, the CPU's desired OPP + * ID or the DSP's desired OPP ID, and use whichever is + * highest. + * + * In CDP12.14+, the VDD1 OPP custom clock that controls the DSP + * rate is keyed on MPU speed, not the OPP ID. So we need to + * map the OPP ID to the MPU speed for use with clk_set_rate() + * if it is higher than the current OPP clock rate. + * + */ +} + + +u8 omap_pm_dsp_get_opp(void) +{ + pr_debug("OMAP PM: DSP requests current DSP OPP ID\n"); + + /* + * For l-o dev tree, call clk_get_rate() on VDD1 OPP clock + * + * CDP12.14+: + * Call clk_get_rate() on the OPP custom clock, map that to an + * OPP ID using the tables defined in board-*.c/chip-*.c files. + */ + + return 0; +} + +/* + * CPUFreq-originated constraint + * + * In the future, this should be handled by custom OPP clocktype + * functions. + */ + +struct cpufreq_frequency_table **omap_pm_cpu_get_freq_table(void) +{ + pr_debug("OMAP PM: CPUFreq request for frequency table\n"); + + /* + * Return CPUFreq frequency table here: loop over + * all VDD1 clkrates, pull out the mpu_ck frequencies, build + * table + */ + + return NULL; +} + +void omap_pm_cpu_set_freq(unsigned long f) +{ + if (f == 0) { + WARN_ON(1); + return; + } + + pr_debug("OMAP PM: CPUFreq requests CPU frequency to be set to %lu\n", + f); + + /* + * For l-o dev tree, determine whether MPU freq or DSP OPP id + * freq is higher. Find the OPP ID corresponding to the + * higher frequency. Call clk_round_rate() and clk_set_rate() + * on the OPP custom clock. + * + * CDP should just be able to set the VDD1 OPP clock rate here. + */ +} + +unsigned long omap_pm_cpu_get_freq(void) +{ + pr_debug("OMAP PM: CPUFreq requests current CPU frequency\n"); + + /* + * Call clk_get_rate() on the mpu_ck. + */ + + return 0; +} + +/* + * Device context loss tracking + */ + +int omap_pm_get_dev_context_loss_count(struct device *dev) +{ + if (!dev) { + WARN_ON(1); + return -EINVAL; + }; + + pr_debug("OMAP PM: returning context loss count for dev %s\n", + dev_name(dev)); + + /* + * Map the device to the powerdomain. Return the powerdomain + * off counter. + */ + + return 0; +} + + +/* Should be called before clk framework init */ +int __init omap_pm_if_early_init(struct omap_opp *mpu_opp_table, + struct omap_opp *dsp_opp_table, + struct omap_opp *l3_opp_table) +{ + mpu_opps = mpu_opp_table; + dsp_opps = dsp_opp_table; + l3_opps = l3_opp_table; + return 0; +} + +/* Must be called after clock framework is initialized */ +int __init omap_pm_if_init(void) +{ + return 0; +} + +void omap_pm_if_exit(void) +{ + /* Deallocate CPUFreq frequency table here */ +} + -- cgit v1.2.3-70-g09d2 From 71348bcaac6f4c372525d4d62e88a82a7330435b Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Thu, 3 Sep 2009 20:14:02 +0300 Subject: OMAP2/3/4 PRCM: add module IDLEST wait code After a hardware module's clocks are enabled, Linux must wait for it to indicate readiness via its IDLEST bit before attempting to access the device, otherwise register accesses to the device may trigger an abort. This has traditionally been implemented in the clock framework, but this is the wrong place for it: the clock framework doesn't know which module clocks must be enabled for a module to leave idle; and if a module is not in smart-idle mode, it may never leave idle at all. This type of information is best stored in a per-hardware module data structure (coming in a following patch), rather than a per-clock data structure. The new code will use these new functions to handle waiting for modules to enable. Once hardware module data is filled in for all of the on-chip devices, the clock framework code to handle IDLEST waiting can be removed. Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/Makefile | 5 ++++ arch/arm/mach-omap2/cm.c | 70 ++++++++++++++++++++++++++++++++++++++++++++ arch/arm/mach-omap2/cm.h | 4 +++ arch/arm/mach-omap2/cm4xxx.c | 68 ++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 147 insertions(+) create mode 100644 arch/arm/mach-omap2/cm.c create mode 100644 arch/arm/mach-omap2/cm4xxx.c (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 8850a247bec..59d730fa77e 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -35,6 +35,11 @@ obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o obj-$(CONFIG_PM_DEBUG) += pm-debug.o endif +# PRCM +obj-$(CONFIG_ARCH_OMAP2) += cm.o +obj-$(CONFIG_ARCH_OMAP3) += cm.o +obj-$(CONFIG_ARCH_OMAP4) += cm4xxx.o + # Clock framework obj-$(CONFIG_ARCH_OMAP2) += clock24xx.o obj-$(CONFIG_ARCH_OMAP3) += clock34xx.o diff --git a/arch/arm/mach-omap2/cm.c b/arch/arm/mach-omap2/cm.c new file mode 100644 index 00000000000..8eb2dab8c7d --- /dev/null +++ b/arch/arm/mach-omap2/cm.c @@ -0,0 +1,70 @@ +/* + * OMAP2/3 CM module functions + * + * Copyright (C) 2009 Nokia Corporation + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "cm.h" +#include "cm-regbits-24xx.h" +#include "cm-regbits-34xx.h" + +/* MAX_MODULE_READY_TIME: max milliseconds for module to leave idle */ +#define MAX_MODULE_READY_TIME 20000 + +static const u8 cm_idlest_offs[] = { + CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3 +}; + +/** + * omap2_cm_wait_idlest_ready - wait for a module to leave idle or standby + * @prcm_mod: PRCM module offset + * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3) + * @idlest_shift: shift of the bit in the CM_IDLEST* register to check + * + * XXX document + */ +int omap2_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift) +{ + int ena = 0, i = 0; + u8 cm_idlest_reg; + u32 mask; + + if (!idlest_id || (idlest_id > ARRAY_SIZE(cm_idlest_offs))) + return -EINVAL; + + cm_idlest_reg = cm_idlest_offs[idlest_id - 1]; + + if (cpu_is_omap24xx()) + ena = idlest_shift; + else if (cpu_is_omap34xx()) + ena = 0; + else + BUG(); + + mask = 1 << idlest_shift; + + /* XXX should be OMAP2 CM */ + while (((cm_read_mod_reg(prcm_mod, cm_idlest_reg) & mask) != ena) && + (i++ < MAX_MODULE_READY_TIME)) + udelay(1); + + return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; +} + diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h index 18d9a121aa7..cfd0b726ba4 100644 --- a/arch/arm/mach-omap2/cm.h +++ b/arch/arm/mach-omap2/cm.h @@ -98,6 +98,10 @@ extern u32 cm_read_mod_reg(s16 module, u16 idx); extern void cm_write_mod_reg(u32 val, s16 module, u16 idx); extern u32 cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx); +extern int omap2_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, + u8 idlest_shift); +extern int omap4_cm_wait_module_ready(u32 prcm_mod, u8 prcm_dev_offs); + static inline u32 cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx) { return cm_rmw_mod_reg_bits(bits, bits, module, idx); diff --git a/arch/arm/mach-omap2/cm4xxx.c b/arch/arm/mach-omap2/cm4xxx.c new file mode 100644 index 00000000000..e4ebd6d5313 --- /dev/null +++ b/arch/arm/mach-omap2/cm4xxx.c @@ -0,0 +1,68 @@ +/* + * OMAP4 CM module functions + * + * Copyright (C) 2009 Nokia Corporation + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "cm.h" +#include "cm-regbits-4xxx.h" + +/* XXX move this to cm.h */ +/* MAX_MODULE_READY_TIME: max milliseconds for module to leave idle */ +#define MAX_MODULE_READY_TIME 20000 + +/* + * OMAP4_PRCM_CM_CLKCTRL_IDLEST_MASK: isolates the IDLEST field in the + * CM_CLKCTRL register. + */ +#define OMAP4_PRCM_CM_CLKCTRL_IDLEST_MASK (0x2 << 16) + +/* + * OMAP4 prcm_mod u32 fields contain packed data: the CM ID in bit 16 and + * the PRCM module offset address (from the CM module base) in bits 15-0. + */ +#define OMAP4_PRCM_MOD_CM_ID_SHIFT 16 +#define OMAP4_PRCM_MOD_OFFS_MASK 0xffff + +/** + * omap4_cm_wait_idlest_ready - wait for a module to leave idle or standby + * @prcm_mod: PRCM module offset (XXX example) + * @prcm_dev_offs: PRCM device offset (e.g. MCASP XXX example) + * + * XXX document + */ +int omap4_cm_wait_idlest_ready(u32 prcm_mod, u8 prcm_dev_offs) +{ + int i = 0; + u8 cm_id; + u16 prcm_mod_offs; + u32 mask = OMAP4_PRCM_CM_CLKCTRL_IDLEST_MASK; + + cm_id = prcm_mod >> OMAP4_PRCM_MOD_CM_ID_SHIFT; + prcm_mod_offs = prcm_mod & OMAP4_PRCM_MOD_OFFS_MASK; + + while (((omap4_cm_read_mod_reg(cm_id, prcm_mod_offs, prcm_dev_offs, + OMAP4_CM_CLKCTRL_DREG) & mask) != 0) && + (i++ < MAX_MODULE_READY_TIME)) + udelay(1); + + return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; +} + -- cgit v1.2.3-70-g09d2 From b3c6df3ab2b17cd7ddf927d39a64f235b25ac8d4 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Thu, 3 Sep 2009 20:14:02 +0300 Subject: OMAP2/3 board-*.c files: read bootloader configuration earlier Most board-*.c files read configuration data from the bootloader in their .init_machine() function. This needs to happen earlier, at some point before omap2_init_common_hw() is called. This is because a future patch will use the bootloader serial console port information to enable the UART clocks earlier, immediately after omap2_clk_init(). This is in turn necessary since otherwise clock tree usecounts on clocks like dpll4_m2x2_ck will be bogus, which can cause the currently-active console UART clock to be disabled during boot. Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/board-2430sdp.c | 13 ++++++------- arch/arm/mach-omap2/board-3430sdp.c | 18 +++++++++--------- arch/arm/mach-omap2/board-apollon.c | 20 ++++++++++---------- arch/arm/mach-omap2/board-generic.c | 10 +++++----- arch/arm/mach-omap2/board-h4.c | 20 ++++++++++---------- arch/arm/mach-omap2/board-ldp.c | 20 ++++++++++---------- arch/arm/mach-omap2/board-omap3beagle.c | 26 +++++++++++++------------- arch/arm/mach-omap2/board-omap3evm.c | 12 ++++++------ arch/arm/mach-omap2/board-omap3pandora.c | 20 ++++++++++---------- arch/arm/mach-omap2/board-overo.c | 20 ++++++++++---------- arch/arm/mach-omap2/board-rx51.c | 4 ++-- arch/arm/mach-omap2/board-zoom2.c | 18 +++++++++--------- arch/arm/mach-omap2/io.c | 2 ++ arch/arm/mach-omap2/serial.c | 14 +++++++++++++- arch/arm/plat-omap/include/mach/serial.h | 3 +++ 15 files changed, 118 insertions(+), 102 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c index 7f5a74d5924..42217b32f83 100644 --- a/arch/arm/mach-omap2/board-2430sdp.c +++ b/arch/arm/mach-omap2/board-2430sdp.c @@ -139,18 +139,19 @@ static inline void board_smc91x_init(void) #endif +static struct omap_board_config_kernel sdp2430_config[] = { + {OMAP_TAG_LCD, &sdp2430_lcd_config}, +}; + static void __init omap_2430sdp_init_irq(void) { + omap_board_config = sdp2430_config; + omap_board_config_size = ARRAY_SIZE(sdp2430_config); omap2_init_common_hw(NULL, NULL); omap_init_irq(); omap_gpio_init(); } -static struct omap_board_config_kernel sdp2430_config[] = { - {OMAP_TAG_LCD, &sdp2430_lcd_config}, -}; - - static struct twl4030_gpio_platform_data sdp2430_gpio_data = { .gpio_base = OMAP_MAX_GPIO_LINES, .irq_base = TWL4030_GPIO_IRQ_BASE, @@ -200,8 +201,6 @@ static void __init omap_2430sdp_init(void) omap2430_i2c_init(); platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices)); - omap_board_config = sdp2430_config; - omap_board_config_size = ARRAY_SIZE(sdp2430_config); omap_serial_init(); twl4030_mmc_init(mmc); usb_musb_init(); diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c index 7e9b76cc767..4500e7f674d 100644 --- a/arch/arm/mach-omap2/board-3430sdp.c +++ b/arch/arm/mach-omap2/board-3430sdp.c @@ -167,13 +167,6 @@ static struct platform_device *sdp3430_devices[] __initdata = { &sdp3430_lcd_device, }; -static void __init omap_3430sdp_init_irq(void) -{ - omap2_init_common_hw(hyb18m512160af6_sdrc_params, NULL); - omap_init_irq(); - omap_gpio_init(); -} - static struct omap_lcd_config sdp3430_lcd_config __initdata = { .ctrl_name = "internal", }; @@ -182,6 +175,15 @@ static struct omap_board_config_kernel sdp3430_config[] __initdata = { { OMAP_TAG_LCD, &sdp3430_lcd_config }, }; +static void __init omap_3430sdp_init_irq(void) +{ + omap_board_config = sdp3430_config; + omap_board_config_size = ARRAY_SIZE(sdp3430_config); + omap2_init_common_hw(hyb18m512160af6_sdrc_params, NULL); + omap_init_irq(); + omap_gpio_init(); +} + static int sdp3430_batt_table[] = { /* 0 C*/ 30800, 29500, 28300, 27100, @@ -477,8 +479,6 @@ static void __init omap_3430sdp_init(void) { omap3430_i2c_init(); platform_add_devices(sdp3430_devices, ARRAY_SIZE(sdp3430_devices)); - omap_board_config = sdp3430_config; - omap_board_config_size = ARRAY_SIZE(sdp3430_config); if (omap_rev() > OMAP3430_REV_ES1_0) ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV2; else diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c index 615f21d1eb2..7a2b54c7291 100644 --- a/arch/arm/mach-omap2/board-apollon.c +++ b/arch/arm/mach-omap2/board-apollon.c @@ -248,14 +248,6 @@ out: clk_put(gpmc_fck); } -static void __init omap_apollon_init_irq(void) -{ - omap2_init_common_hw(NULL, NULL); - omap_init_irq(); - omap_gpio_init(); - apollon_init_smc91x(); -} - static struct omap_usb_config apollon_usb_config __initdata = { .register_dev = 1, .hmc_mode = 0x14, /* 0:dev 1:host1 2:disable */ @@ -271,6 +263,16 @@ static struct omap_board_config_kernel apollon_config[] = { { OMAP_TAG_LCD, &apollon_lcd_config }, }; +static void __init omap_apollon_init_irq(void) +{ + omap_board_config = apollon_config; + omap_board_config_size = ARRAY_SIZE(apollon_config); + omap2_init_common_hw(NULL, NULL); + omap_init_irq(); + omap_gpio_init(); + apollon_init_smc91x(); +} + static void __init apollon_led_init(void) { /* LED0 - AA10 */ @@ -319,8 +321,6 @@ static void __init omap_apollon_init(void) * if not needed. */ platform_add_devices(apollon_devices, ARRAY_SIZE(apollon_devices)); - omap_board_config = apollon_config; - omap_board_config_size = ARRAY_SIZE(apollon_config); omap_serial_init(); } diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index 3e401c5b6e4..2e09a1c444c 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -31,19 +31,19 @@ #include #include +static struct omap_board_config_kernel generic_config[] = { +}; + static void __init omap_generic_init_irq(void) { + omap_board_config = generic_config; + omap_board_config_size = ARRAY_SIZE(generic_config); omap2_init_common_hw(NULL, NULL); omap_init_irq(); } -static struct omap_board_config_kernel generic_config[] = { -}; - static void __init omap_generic_init(void) { - omap_board_config = generic_config; - omap_board_config_size = ARRAY_SIZE(generic_config); omap_serial_init(); } diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c index b6501d241c1..eaa02d012c5 100644 --- a/arch/arm/mach-omap2/board-h4.c +++ b/arch/arm/mach-omap2/board-h4.c @@ -268,14 +268,6 @@ static void __init h4_init_flash(void) h4_flash_resource.end = base + SZ_64M - 1; } -static void __init omap_h4_init_irq(void) -{ - omap2_init_common_hw(NULL, NULL); - omap_init_irq(); - omap_gpio_init(); - h4_init_flash(); -} - static struct omap_lcd_config h4_lcd_config __initdata = { .ctrl_name = "internal", }; @@ -317,6 +309,16 @@ static struct omap_board_config_kernel h4_config[] = { { OMAP_TAG_LCD, &h4_lcd_config }, }; +static void __init omap_h4_init_irq(void) +{ + omap_board_config = h4_config; + omap_board_config_size = ARRAY_SIZE(h4_config); + omap2_init_common_hw(NULL, NULL); + omap_init_irq(); + omap_gpio_init(); + h4_init_flash(); +} + static struct at24_platform_data m24c01 = { .byte_len = SZ_1K / 8, .page_size = 16, @@ -361,8 +363,6 @@ static void __init omap_h4_init(void) ARRAY_SIZE(h4_i2c_board_info)); platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices)); - omap_board_config = h4_config; - omap_board_config_size = ARRAY_SIZE(h4_config); omap_usb_init(&h4_usb_config); omap_serial_init(); } diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index 2dd6806a1e8..ec6854cbdd9 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c @@ -268,14 +268,6 @@ static inline void __init ldp_init_smsc911x(void) gpio_direction_input(eth_gpio); } -static void __init omap_ldp_init_irq(void) -{ - omap2_init_common_hw(NULL, NULL); - omap_init_irq(); - omap_gpio_init(); - ldp_init_smsc911x(); -} - static struct platform_device ldp_lcd_device = { .name = "ldp_lcd", .id = -1, @@ -289,6 +281,16 @@ static struct omap_board_config_kernel ldp_config[] __initdata = { { OMAP_TAG_LCD, &ldp_lcd_config }, }; +static void __init omap_ldp_init_irq(void) +{ + omap_board_config = ldp_config; + omap_board_config_size = ARRAY_SIZE(ldp_config); + omap2_init_common_hw(NULL, NULL); + omap_init_irq(); + omap_gpio_init(); + ldp_init_smsc911x(); +} + static struct twl4030_usb_data ldp_usb_data = { .usb_mode = T2_USB_MODE_ULPI, }; @@ -372,8 +374,6 @@ static void __init omap_ldp_init(void) { omap_i2c_init(); platform_add_devices(ldp_devices, ARRAY_SIZE(ldp_devices)); - omap_board_config = ldp_config; - omap_board_config_size = ARRAY_SIZE(ldp_config); ts_gpio = 54; ldp_spi_board_info[0].irq = gpio_to_irq(ts_gpio); spi_register_board_info(ldp_spi_board_info, diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index d79ea8da627..500c9956876 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c @@ -281,17 +281,6 @@ static int __init omap3_beagle_i2c_init(void) return 0; } -static void __init omap3_beagle_init_irq(void) -{ - omap2_init_common_hw(mt46h32m32lf6_sdrc_params, - mt46h32m32lf6_sdrc_params); - omap_init_irq(); -#ifdef CONFIG_OMAP_32K_TIMER - omap2_gp_clockevent_set_gptimer(12); -#endif - omap_gpio_init(); -} - static struct gpio_led gpio_leds[] = { { .name = "beagleboard::usr0", @@ -349,6 +338,19 @@ static struct omap_board_config_kernel omap3_beagle_config[] __initdata = { { OMAP_TAG_LCD, &omap3_beagle_lcd_config }, }; +static void __init omap3_beagle_init_irq(void) +{ + omap_board_config = omap3_beagle_config; + omap_board_config_size = ARRAY_SIZE(omap3_beagle_config); + omap2_init_common_hw(mt46h32m32lf6_sdrc_params, + mt46h32m32lf6_sdrc_params); + omap_init_irq(); +#ifdef CONFIG_OMAP_32K_TIMER + omap2_gp_clockevent_set_gptimer(12); +#endif + omap_gpio_init(); +} + static struct platform_device *omap3_beagle_devices[] __initdata = { &omap3_beagle_lcd_device, &leds_gpio, @@ -398,8 +400,6 @@ static void __init omap3_beagle_init(void) omap3_beagle_i2c_init(); platform_add_devices(omap3_beagle_devices, ARRAY_SIZE(omap3_beagle_devices)); - omap_board_config = omap3_beagle_config; - omap_board_config_size = ARRAY_SIZE(omap3_beagle_config); omap_serial_init(); omap_cfg_reg(J25_34XX_GPIO170); diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index 3e0435371ce..d50b9be9058 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c @@ -274,18 +274,20 @@ struct spi_board_info omap3evm_spi_board_info[] = { }, }; +static struct omap_board_config_kernel omap3_evm_config[] __initdata = { + { OMAP_TAG_LCD, &omap3_evm_lcd_config }, +}; + static void __init omap3_evm_init_irq(void) { + omap_board_config = omap3_evm_config; + omap_board_config_size = ARRAY_SIZE(omap3_evm_config); omap2_init_common_hw(mt46h32m32lf6_sdrc_params, NULL); omap_init_irq(); omap_gpio_init(); omap3evm_init_smc911x(); } -static struct omap_board_config_kernel omap3_evm_config[] __initdata = { - { OMAP_TAG_LCD, &omap3_evm_lcd_config }, -}; - static struct platform_device *omap3_evm_devices[] __initdata = { &omap3_evm_lcd_device, &omap3evm_smc911x_device, @@ -296,8 +298,6 @@ static void __init omap3_evm_init(void) omap3_evm_i2c_init(); platform_add_devices(omap3_evm_devices, ARRAY_SIZE(omap3_evm_devices)); - omap_board_config = omap3_evm_config; - omap_board_config_size = ARRAY_SIZE(omap3_evm_config); spi_register_board_info(omap3evm_spi_board_info, ARRAY_SIZE(omap3evm_spi_board_info)); diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c index 8236708c362..b43f6e36b6d 100644 --- a/arch/arm/mach-omap2/board-omap3pandora.c +++ b/arch/arm/mach-omap2/board-omap3pandora.c @@ -305,14 +305,6 @@ static int __init omap3pandora_i2c_init(void) return 0; } -static void __init omap3pandora_init_irq(void) -{ - omap2_init_common_hw(mt46h32m32lf6_sdrc_params, - mt46h32m32lf6_sdrc_params); - omap_init_irq(); - omap_gpio_init(); -} - static void __init omap3pandora_ads7846_init(void) { int gpio = OMAP3_PANDORA_TS_GPIO; @@ -375,6 +367,16 @@ static struct omap_board_config_kernel omap3pandora_config[] __initdata = { { OMAP_TAG_LCD, &omap3pandora_lcd_config }, }; +static void __init omap3pandora_init_irq(void) +{ + omap_board_config = omap3pandora_config; + omap_board_config_size = ARRAY_SIZE(omap3pandora_config); + omap2_init_common_hw(mt46h32m32lf6_sdrc_params, + mt46h32m32lf6_sdrc_params); + omap_init_irq(); + omap_gpio_init(); +} + static struct platform_device *omap3pandora_devices[] __initdata = { &omap3pandora_lcd_device, &pandora_leds_gpio, @@ -386,8 +388,6 @@ static void __init omap3pandora_init(void) omap3pandora_i2c_init(); platform_add_devices(omap3pandora_devices, ARRAY_SIZE(omap3pandora_devices)); - omap_board_config = omap3pandora_config; - omap_board_config_size = ARRAY_SIZE(omap3pandora_config); omap_serial_init(); spi_register_board_info(omap3pandora_spi_board_info, ARRAY_SIZE(omap3pandora_spi_board_info)); diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c index eb78e6eab4f..9917d2fddc2 100644 --- a/arch/arm/mach-omap2/board-overo.c +++ b/arch/arm/mach-omap2/board-overo.c @@ -357,14 +357,6 @@ static int __init overo_i2c_init(void) return 0; } -static void __init overo_init_irq(void) -{ - omap2_init_common_hw(mt46h32m32lf6_sdrc_params, - mt46h32m32lf6_sdrc_params); - omap_init_irq(); - omap_gpio_init(); -} - static struct platform_device overo_lcd_device = { .name = "overo_lcd", .id = -1, @@ -378,6 +370,16 @@ static struct omap_board_config_kernel overo_config[] __initdata = { { OMAP_TAG_LCD, &overo_lcd_config }, }; +static void __init overo_init_irq(void) +{ + omap_board_config = overo_config; + omap_board_config_size = ARRAY_SIZE(overo_config); + omap2_init_common_hw(mt46h32m32lf6_sdrc_params, + mt46h32m32lf6_sdrc_params); + omap_init_irq(); + omap_gpio_init(); +} + static struct platform_device *overo_devices[] __initdata = { &overo_lcd_device, }; @@ -386,8 +388,6 @@ static void __init overo_init(void) { overo_i2c_init(); platform_add_devices(overo_devices, ARRAY_SIZE(overo_devices)); - omap_board_config = overo_config; - omap_board_config_size = ARRAY_SIZE(overo_config); omap_serial_init(); overo_flash_init(); usb_musb_init(); diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c index c0d13401425..f9196c3b1a7 100644 --- a/arch/arm/mach-omap2/board-rx51.c +++ b/arch/arm/mach-omap2/board-rx51.c @@ -56,6 +56,8 @@ static struct omap_board_config_kernel rx51_config[] = { static void __init rx51_init_irq(void) { + omap_board_config = rx51_config; + omap_board_config_size = ARRAY_SIZE(rx51_config); omap2_init_common_hw(NULL, NULL); omap_init_irq(); omap_gpio_init(); @@ -65,8 +67,6 @@ extern void __init rx51_peripherals_init(void); static void __init rx51_init(void) { - omap_board_config = rx51_config; - omap_board_config_size = ARRAY_SIZE(rx51_config); omap_serial_init(); usb_musb_init(); rx51_peripherals_init(); diff --git a/arch/arm/mach-omap2/board-zoom2.c b/arch/arm/mach-omap2/board-zoom2.c index dabba2720a9..324009edbd5 100644 --- a/arch/arm/mach-omap2/board-zoom2.c +++ b/arch/arm/mach-omap2/board-zoom2.c @@ -90,13 +90,6 @@ static struct twl4030_keypad_data zoom2_kp_twl4030_data = { .rep = 1, }; -static void __init omap_zoom2_init_irq(void) -{ - omap2_init_common_hw(NULL, NULL); - omap_init_irq(); - omap_gpio_init(); -} - static struct omap_board_config_kernel zoom2_config[] __initdata = { }; @@ -212,6 +205,15 @@ static struct twl4030_usb_data zoom2_usb_data = { .usb_mode = T2_USB_MODE_ULPI, }; +static void __init omap_zoom2_init_irq(void) +{ + omap_board_config = zoom2_config; + omap_board_config_size = ARRAY_SIZE(zoom2_config); + omap2_init_common_hw(NULL, NULL); + omap_init_irq(); + omap_gpio_init(); +} + static struct twl4030_gpio_platform_data zoom2_gpio_data = { .gpio_base = OMAP_MAX_GPIO_LINES, .irq_base = TWL4030_GPIO_IRQ_BASE, @@ -262,8 +264,6 @@ extern int __init omap_zoom2_debugboard_init(void); static void __init omap_zoom2_init(void) { omap_i2c_init(); - omap_board_config = zoom2_config; - omap_board_config_size = ARRAY_SIZE(zoom2_config); omap_serial_init(); omap_zoom2_debugboard_init(); usb_musb_init(); diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 4bfe873e1b8..470b1d10c4e 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -32,6 +32,7 @@ #include #include #include +#include #ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once clkdev is ready */ #include "clock.h" @@ -287,6 +288,7 @@ void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0, pwrdm_init(powerdomains_omap); clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps); omap2_clk_init(); + omap_serial_early_init(); omap_pm_if_init(); omap2_sdrc_init(sdrc_cs0, sdrc_cs1); _omap2_init_reprogram_sdrc(); diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index dd3c735b558..ca28424f2fb 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c @@ -552,7 +552,7 @@ static struct omap_uart_state omap_uart[OMAP_MAX_NR_PORTS] = { }, }; -void __init omap_serial_init(void) +void __init omap_serial_early_init(void) { int i; char name[16]; @@ -595,6 +595,18 @@ void __init omap_serial_init(void) p->irq += 32; omap_uart_enable_clocks(uart); + } +} + +void __init omap_serial_init(void) +{ + int i; + + for (i = 0; i < OMAP_MAX_NR_PORTS; i++) { + struct omap_uart_state *uart = &omap_uart[i]; + struct platform_device *pdev = &uart->pdev; + struct device *dev = &pdev->dev; + omap_uart_reset(uart); omap_uart_idle_init(uart); diff --git a/arch/arm/plat-omap/include/mach/serial.h b/arch/arm/plat-omap/include/mach/serial.h index def0529c75e..e249186d26e 100644 --- a/arch/arm/plat-omap/include/mach/serial.h +++ b/arch/arm/plat-omap/include/mach/serial.h @@ -13,6 +13,8 @@ #ifndef __ASM_ARCH_SERIAL_H #define __ASM_ARCH_SERIAL_H +#include + #if defined(CONFIG_ARCH_OMAP1) /* OMAP1 serial ports */ #define OMAP_UART1_BASE 0xfffb0000 @@ -53,6 +55,7 @@ }) #ifndef __ASSEMBLER__ +extern void __init omap_serial_early_init(void); extern void omap_serial_init(void); extern int omap_uart_can_sleep(void); extern void omap_uart_check_wakeup(void); -- cgit v1.2.3-70-g09d2 From 63c852384125ca0eff0e695f92cbbd439bed4aa3 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Thu, 3 Sep 2009 20:14:03 +0300 Subject: OMAP2/3/4: create omap_hwmod layer OMAP SoCs can be considered a collection of hardware IP blocks connected by various interconnects. The bus topology and device integration data is somewhat more complex than platform_device can encode. This patch creates code and structures to manage information about OMAP on-chip devices ("hardware modules") and their integration to the rest of the chip. Hardware module data is intended to be generated dynamically from the TI hardware database for the OMAP4 chips and beyond, easing Linux support for new chip variants. This code currently: - resets and configures all hardware modules upon startup, reducing bootloader dependencies; - provides hooks for Linux driver model code to enable, idle, and shutdown hardware modules (forthcoming patch); - waits for hardware modules to leave idle once their clocks are enabled and OCP_SYSCONFIG bits are set appropriately. - provides a means to pass arbitrary IP block configuration data (e.g., FIFO size) to the device driver (via the dev_attr void pointer) In the future this code is intended to: - estimate interconnect bandwidth and latency characteristics to ensure constraints are satisfied during DVFS - provide *GRPSEL bit data to the powerdomain code - handle pin/ball muxing for devices - generate IO mapping information dynamically - supply device firewall configuration data - provide hardware module data to other on-chip coprocessor software - allow the removal of the "disable unused clocks" code in the OMAP2/3 clock code This patch represents a collaborative effort involving many people from TI, Nokia, and the Linux-OMAP community. Signed-off-by: Paul Walmsley Cc: Benoit Cousson Cc: Kevin Hilman Cc: Tony Lindgren Cc: Rajendra Nayak Cc: Vikram Pandita Cc: Sakari Poussa Cc: Anand Sawant Cc: Santosh Shilimkar Cc: Eric Thomas Cc: Richard Woodruff --- arch/arm/mach-omap2/Makefile | 2 +- arch/arm/mach-omap2/omap_hwmod.c | 1555 ++++++++++++++++++++++++++ arch/arm/plat-omap/include/mach/omap_hwmod.h | 447 ++++++++ 3 files changed, 2003 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-omap2/omap_hwmod.c create mode 100644 arch/arm/plat-omap/include/mach/omap_hwmod.h (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 59d730fa77e..8cb16777661 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -5,7 +5,7 @@ # Common support obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o -omap-2-3-common = irq.o sdrc.o +omap-2-3-common = irq.o sdrc.o omap_hwmod.o prcm-common = prcm.o powerdomain.o clock-common = clock.o clockdomain.o diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c new file mode 100644 index 00000000000..3b10ad6c47d --- /dev/null +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -0,0 +1,1555 @@ +/* + * omap_hwmod implementation for OMAP2/3/4 + * + * Copyright (C) 2009 Nokia Corporation + * Paul Walmsley + * With fixes and testing from Kevin Hilman + * + * Created in collaboration with (alphabetical order): Benoit Cousson, + * Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari + * Poussa, Anand Sawant, Santosh Shilimkar, Richard Woodruff + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This code manages "OMAP modules" (on-chip devices) and their + * integration with Linux device driver and bus code. + * + * References: + * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064) + * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090) + * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108) + * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140) + * - Open Core Protocol Specification 2.2 + * + * To do: + * - pin mux handling + * - handle IO mapping + * - bus throughput & module latency measurement code + * + * XXX add tests at the beginning of each function to ensure the hwmod is + * in the appropriate state + * XXX error return values should be checked to ensure that they are + * appropriate + */ +#undef DEBUG + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "cm.h" + +/* Maximum microseconds to wait for OMAP module to reset */ +#define MAX_MODULE_RESET_WAIT 10000 + +/* Name of the OMAP hwmod for the MPU */ +#define MPU_INITIATOR_NAME "mpu_hwmod" + +/* omap_hwmod_list contains all registered struct omap_hwmods */ +static LIST_HEAD(omap_hwmod_list); + +static DEFINE_MUTEX(omap_hwmod_mutex); + +/* mpu_oh: used to add/remove MPU initiator from sleepdep list */ +static struct omap_hwmod *mpu_oh; + +/* inited: 0 if omap_hwmod_init() has not yet been called; 1 otherwise */ +static u8 inited; + + +/* Private functions */ + +/** + * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy + * @oh: struct omap_hwmod * + * + * Load the current value of the hwmod OCP_SYSCONFIG register into the + * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no + * OCP_SYSCONFIG register or 0 upon success. + */ +static int _update_sysc_cache(struct omap_hwmod *oh) +{ + if (!oh->sysconfig) { + WARN(!oh->sysconfig, "omap_hwmod: %s: cannot read " + "OCP_SYSCONFIG: not defined on hwmod\n", oh->name); + return -EINVAL; + } + + /* XXX ensure module interface clock is up */ + + oh->_sysc_cache = omap_hwmod_readl(oh, oh->sysconfig->sysc_offs); + + oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED; + + return 0; +} + +/** + * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register + * @v: OCP_SYSCONFIG value to write + * @oh: struct omap_hwmod * + * + * Write @v into the module OCP_SYSCONFIG register, if it has one. No + * return value. + */ +static void _write_sysconfig(u32 v, struct omap_hwmod *oh) +{ + if (!oh->sysconfig) { + WARN(!oh->sysconfig, "omap_hwmod: %s: cannot write " + "OCP_SYSCONFIG: not defined on hwmod\n", oh->name); + return; + } + + /* XXX ensure module interface clock is up */ + + if (oh->_sysc_cache != v) { + oh->_sysc_cache = v; + omap_hwmod_writel(v, oh, oh->sysconfig->sysc_offs); + } +} + +/** + * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v + * @oh: struct omap_hwmod * + * @standbymode: MIDLEMODE field bits + * @v: pointer to register contents to modify + * + * Update the master standby mode bits in @v to be @standbymode for + * the @oh hwmod. Does not write to the hardware. Returns -EINVAL + * upon error or 0 upon success. + */ +static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode, + u32 *v) +{ + if (!oh->sysconfig || + !(oh->sysconfig->sysc_flags & SYSC_HAS_MIDLEMODE)) + return -EINVAL; + + *v &= ~SYSC_MIDLEMODE_MASK; + *v |= __ffs(standbymode) << SYSC_MIDLEMODE_SHIFT; + + return 0; +} + +/** + * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v + * @oh: struct omap_hwmod * + * @idlemode: SIDLEMODE field bits + * @v: pointer to register contents to modify + * + * Update the slave idle mode bits in @v to be @idlemode for the @oh + * hwmod. Does not write to the hardware. Returns -EINVAL upon error + * or 0 upon success. + */ +static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v) +{ + if (!oh->sysconfig || + !(oh->sysconfig->sysc_flags & SYSC_HAS_SIDLEMODE)) + return -EINVAL; + + *v &= ~SYSC_SIDLEMODE_MASK; + *v |= __ffs(idlemode) << SYSC_SIDLEMODE_SHIFT; + + return 0; +} + +/** + * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v + * @oh: struct omap_hwmod * + * @clockact: CLOCKACTIVITY field bits + * @v: pointer to register contents to modify + * + * Update the clockactivity mode bits in @v to be @clockact for the + * @oh hwmod. Used for additional powersaving on some modules. Does + * not write to the hardware. Returns -EINVAL upon error or 0 upon + * success. + */ +static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v) +{ + if (!oh->sysconfig || + !(oh->sysconfig->sysc_flags & SYSC_HAS_CLOCKACTIVITY)) + return -EINVAL; + + *v &= ~SYSC_CLOCKACTIVITY_MASK; + *v |= clockact << SYSC_CLOCKACTIVITY_SHIFT; + + return 0; +} + +/** + * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v + * @oh: struct omap_hwmod * + * @v: pointer to register contents to modify + * + * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon + * error or 0 upon success. + */ +static int _set_softreset(struct omap_hwmod *oh, u32 *v) +{ + if (!oh->sysconfig || + !(oh->sysconfig->sysc_flags & SYSC_HAS_SOFTRESET)) + return -EINVAL; + + *v |= SYSC_SOFTRESET_MASK; + + return 0; +} + +/** + * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware + * @oh: struct omap_hwmod * + * + * Allow the hardware module @oh to send wakeups. Returns -EINVAL + * upon error or 0 upon success. + */ +static int _enable_wakeup(struct omap_hwmod *oh) +{ + u32 v; + + if (!oh->sysconfig || + !(oh->sysconfig->sysc_flags & SYSC_HAS_ENAWAKEUP)) + return -EINVAL; + + v = oh->_sysc_cache; + v |= SYSC_ENAWAKEUP_MASK; + _write_sysconfig(v, oh); + + /* XXX test pwrdm_get_wken for this hwmod's subsystem */ + + oh->_int_flags |= _HWMOD_WAKEUP_ENABLED; + + return 0; +} + +/** + * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware + * @oh: struct omap_hwmod * + * + * Prevent the hardware module @oh to send wakeups. Returns -EINVAL + * upon error or 0 upon success. + */ +static int _disable_wakeup(struct omap_hwmod *oh) +{ + u32 v; + + if (!oh->sysconfig || + !(oh->sysconfig->sysc_flags & SYSC_HAS_ENAWAKEUP)) + return -EINVAL; + + v = oh->_sysc_cache; + v &= ~SYSC_ENAWAKEUP_MASK; + _write_sysconfig(v, oh); + + /* XXX test pwrdm_get_wken for this hwmod's subsystem */ + + oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED; + + return 0; +} + +/** + * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active + * @oh: struct omap_hwmod * + * + * Prevent the hardware module @oh from entering idle while the + * hardare module initiator @init_oh is active. Useful when a module + * will be accessed by a particular initiator (e.g., if a module will + * be accessed by the IVA, there should be a sleepdep between the IVA + * initiator and the module). Only applies to modules in smart-idle + * mode. Returns -EINVAL upon error or passes along + * pwrdm_add_sleepdep() value upon success. + */ +static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh) +{ + if (!oh->_clk) + return -EINVAL; + + return pwrdm_add_sleepdep(oh->_clk->clkdm->pwrdm.ptr, + init_oh->_clk->clkdm->pwrdm.ptr); +} + +/** + * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active + * @oh: struct omap_hwmod * + * + * Allow the hardware module @oh to enter idle while the hardare + * module initiator @init_oh is active. Useful when a module will not + * be accessed by a particular initiator (e.g., if a module will not + * be accessed by the IVA, there should be no sleepdep between the IVA + * initiator and the module). Only applies to modules in smart-idle + * mode. Returns -EINVAL upon error or passes along + * pwrdm_add_sleepdep() value upon success. + */ +static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh) +{ + if (!oh->_clk) + return -EINVAL; + + return pwrdm_del_sleepdep(oh->_clk->clkdm->pwrdm.ptr, + init_oh->_clk->clkdm->pwrdm.ptr); +} + +/** + * _init_main_clk - get a struct clk * for the the hwmod's main functional clk + * @oh: struct omap_hwmod * + * + * Called from _init_clocks(). Populates the @oh _clk (main + * functional clock pointer) if a main_clk is present. Returns 0 on + * success or -EINVAL on error. + */ +static int _init_main_clk(struct omap_hwmod *oh) +{ + struct clk *c; + int ret = 0; + + if (!oh->clkdev_con_id) + return 0; + + c = clk_get_sys(oh->clkdev_dev_id, oh->clkdev_con_id); + WARN(IS_ERR(c), "omap_hwmod: %s: cannot clk_get main_clk %s.%s\n", + oh->name, oh->clkdev_dev_id, oh->clkdev_con_id); + if (IS_ERR(c)) + ret = -EINVAL; + oh->_clk = c; + + return ret; +} + +/** + * _init_interface_clk - get a struct clk * for the the hwmod's interface clks + * @oh: struct omap_hwmod * + * + * Called from _init_clocks(). Populates the @oh OCP slave interface + * clock pointers. Returns 0 on success or -EINVAL on error. + */ +static int _init_interface_clks(struct omap_hwmod *oh) +{ + struct omap_hwmod_ocp_if *os; + struct clk *c; + int i; + int ret = 0; + + if (oh->slaves_cnt == 0) + return 0; + + for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) { + if (!os->clkdev_con_id) + continue; + + c = clk_get_sys(os->clkdev_dev_id, os->clkdev_con_id); + WARN(IS_ERR(c), "omap_hwmod: %s: cannot clk_get " + "interface_clk %s.%s\n", oh->name, + os->clkdev_dev_id, os->clkdev_con_id); + if (IS_ERR(c)) + ret = -EINVAL; + os->_clk = c; + } + + return ret; +} + +/** + * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks + * @oh: struct omap_hwmod * + * + * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk + * clock pointers. Returns 0 on success or -EINVAL on error. + */ +static int _init_opt_clks(struct omap_hwmod *oh) +{ + struct omap_hwmod_opt_clk *oc; + struct clk *c; + int i; + int ret = 0; + + for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) { + c = clk_get_sys(oc->clkdev_dev_id, oc->clkdev_con_id); + WARN(IS_ERR(c), "omap_hwmod: %s: cannot clk_get opt_clk " + "%s.%s\n", oh->name, oc->clkdev_dev_id, + oc->clkdev_con_id); + if (IS_ERR(c)) + ret = -EINVAL; + oc->_clk = c; + } + + return ret; +} + +/** + * _enable_clocks - enable hwmod main clock and interface clocks + * @oh: struct omap_hwmod * + * + * Enables all clocks necessary for register reads and writes to succeed + * on the hwmod @oh. Returns 0. + */ +static int _enable_clocks(struct omap_hwmod *oh) +{ + struct omap_hwmod_ocp_if *os; + int i; + + pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name); + + if (oh->_clk && !IS_ERR(oh->_clk)) + clk_enable(oh->_clk); + + if (oh->slaves_cnt > 0) { + for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) { + struct clk *c = os->_clk; + + if (c && !IS_ERR(c) && (os->flags & OCPIF_SWSUP_IDLE)) + clk_enable(c); + } + } + + /* The opt clocks are controlled by the device driver. */ + + return 0; +} + +/** + * _disable_clocks - disable hwmod main clock and interface clocks + * @oh: struct omap_hwmod * + * + * Disables the hwmod @oh main functional and interface clocks. Returns 0. + */ +static int _disable_clocks(struct omap_hwmod *oh) +{ + struct omap_hwmod_ocp_if *os; + int i; + + pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name); + + if (oh->_clk && !IS_ERR(oh->_clk)) + clk_disable(oh->_clk); + + if (oh->slaves_cnt > 0) { + for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) { + struct clk *c = os->_clk; + + if (c && !IS_ERR(c) && (os->flags & OCPIF_SWSUP_IDLE)) + clk_disable(c); + } + } + + /* The opt clocks are controlled by the device driver. */ + + return 0; +} + +/** + * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use + * @oh: struct omap_hwmod * + * + * Returns the array index of the OCP slave port that the MPU + * addresses the device on, or -EINVAL upon error or not found. + */ +static int _find_mpu_port_index(struct omap_hwmod *oh) +{ + struct omap_hwmod_ocp_if *os; + int i; + int found = 0; + + if (!oh || oh->slaves_cnt == 0) + return -EINVAL; + + for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) { + if (os->user & OCP_USER_MPU) { + found = 1; + break; + } + } + + if (found) + pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n", + oh->name, i); + else + pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n", + oh->name); + + return (found) ? i : -EINVAL; +} + +/** + * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU + * @oh: struct omap_hwmod * + * + * Return the virtual address of the base of the register target of + * device @oh, or NULL on error. + */ +static void __iomem *_find_mpu_rt_base(struct omap_hwmod *oh, u8 index) +{ + struct omap_hwmod_ocp_if *os; + struct omap_hwmod_addr_space *mem; + int i; + int found = 0; + + if (!oh || oh->slaves_cnt == 0) + return NULL; + + os = *oh->slaves + index; + + for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) { + if (mem->flags & ADDR_TYPE_RT) { + found = 1; + break; + } + } + + /* XXX use ioremap() instead? */ + + if (found) + pr_debug("omap_hwmod: %s: MPU register target at va %p\n", + oh->name, OMAP2_IO_ADDRESS(mem->pa_start)); + else + pr_debug("omap_hwmod: %s: no MPU register target found\n", + oh->name); + + return (found) ? OMAP2_IO_ADDRESS(mem->pa_start) : NULL; +} + +/** + * _sysc_enable - try to bring a module out of idle via OCP_SYSCONFIG + * @oh: struct omap_hwmod * + * + * If module is marked as SWSUP_SIDLE, force the module out of slave + * idle; otherwise, configure it for smart-idle. If module is marked + * as SWSUP_MSUSPEND, force the module out of master standby; + * otherwise, configure it for smart-standby. No return value. + */ +static void _sysc_enable(struct omap_hwmod *oh) +{ + u8 idlemode; + u32 v; + + if (!oh->sysconfig) + return; + + v = oh->_sysc_cache; + + if (oh->sysconfig->sysc_flags & SYSC_HAS_SIDLEMODE) { + idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ? + HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART; + _set_slave_idlemode(oh, idlemode, &v); + } + + if (oh->sysconfig->sysc_flags & SYSC_HAS_MIDLEMODE) { + idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ? + HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART; + _set_master_standbymode(oh, idlemode, &v); + } + + /* XXX OCP AUTOIDLE bit? */ + + if (oh->flags & HWMOD_SET_DEFAULT_CLOCKACT && + oh->sysconfig->sysc_flags & SYSC_HAS_CLOCKACTIVITY) + _set_clockactivity(oh, oh->sysconfig->clockact, &v); + + _write_sysconfig(v, oh); +} + +/** + * _sysc_idle - try to put a module into idle via OCP_SYSCONFIG + * @oh: struct omap_hwmod * + * + * If module is marked as SWSUP_SIDLE, force the module into slave + * idle; otherwise, configure it for smart-idle. If module is marked + * as SWSUP_MSUSPEND, force the module into master standby; otherwise, + * configure it for smart-standby. No return value. + */ +static void _sysc_idle(struct omap_hwmod *oh) +{ + u8 idlemode; + u32 v; + + if (!oh->sysconfig) + return; + + v = oh->_sysc_cache; + + if (oh->sysconfig->sysc_flags & SYSC_HAS_SIDLEMODE) { + idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ? + HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART; + _set_slave_idlemode(oh, idlemode, &v); + } + + if (oh->sysconfig->sysc_flags & SYSC_HAS_MIDLEMODE) { + idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ? + HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART; + _set_master_standbymode(oh, idlemode, &v); + } + + _write_sysconfig(v, oh); +} + +/** + * _sysc_shutdown - force a module into idle via OCP_SYSCONFIG + * @oh: struct omap_hwmod * + * + * Force the module into slave idle and master suspend. No return + * value. + */ +static void _sysc_shutdown(struct omap_hwmod *oh) +{ + u32 v; + + if (!oh->sysconfig) + return; + + v = oh->_sysc_cache; + + if (oh->sysconfig->sysc_flags & SYSC_HAS_SIDLEMODE) + _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v); + + if (oh->sysconfig->sysc_flags & SYSC_HAS_MIDLEMODE) + _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v); + + /* XXX clear OCP AUTOIDLE bit? */ + + _write_sysconfig(v, oh); +} + +/** + * _lookup - find an omap_hwmod by name + * @name: find an omap_hwmod by name + * + * Return a pointer to an omap_hwmod by name, or NULL if not found. + * Caller must hold omap_hwmod_mutex. + */ +static struct omap_hwmod *_lookup(const char *name) +{ + struct omap_hwmod *oh, *temp_oh; + + oh = NULL; + + list_for_each_entry(temp_oh, &omap_hwmod_list, node) { + if (!strcmp(name, temp_oh->name)) { + oh = temp_oh; + break; + } + } + + return oh; +} + +/** + * _init_clocks - clk_get() all clocks associated with this hwmod + * @oh: struct omap_hwmod * + * + * Called by omap_hwmod_late_init() (after omap2_clk_init()). + * Resolves all clock names embedded in the hwmod. Must be called + * with omap_hwmod_mutex held. Returns -EINVAL if the omap_hwmod + * has not yet been registered or if the clocks have already been + * initialized, 0 on success, or a non-zero error on failure. + */ +static int _init_clocks(struct omap_hwmod *oh) +{ + int ret = 0; + + if (!oh || (oh->_state != _HWMOD_STATE_REGISTERED)) + return -EINVAL; + + pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name); + + ret |= _init_main_clk(oh); + ret |= _init_interface_clks(oh); + ret |= _init_opt_clks(oh); + + oh->_state = _HWMOD_STATE_CLKS_INITED; + + return ret; +} + +/** + * _wait_target_ready - wait for a module to leave slave idle + * @oh: struct omap_hwmod * + * + * Wait for a module @oh to leave slave idle. Returns 0 if the module + * does not have an IDLEST bit or if the module successfully leaves + * slave idle; otherwise, pass along the return value of the + * appropriate *_cm_wait_module_ready() function. + */ +static int _wait_target_ready(struct omap_hwmod *oh) +{ + struct omap_hwmod_ocp_if *os; + int ret; + + if (!oh) + return -EINVAL; + + if (oh->_int_flags & _HWMOD_NO_MPU_PORT) + return 0; + + os = *oh->slaves + oh->_mpu_port_index; + + if (!(os->flags & OCPIF_HAS_IDLEST)) + return 0; + + /* XXX check module SIDLEMODE */ + + /* XXX check clock enable states */ + + if (cpu_is_omap24xx() || cpu_is_omap34xx()) { + ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs, + oh->prcm.omap2.idlest_reg_id, + oh->prcm.omap2.idlest_idle_bit); +#if 0 + } else if (cpu_is_omap44xx()) { + ret = omap4_cm_wait_module_ready(oh->prcm.omap4.module_offs, + oh->prcm.omap4.device_offs); +#endif + } else { + BUG(); + }; + + return ret; +} + +/** + * _reset - reset an omap_hwmod + * @oh: struct omap_hwmod * + * + * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be + * enabled for this to work. Must be called with omap_hwmod_mutex + * held. Returns -EINVAL if the hwmod cannot be reset this way or if + * the hwmod is in the wrong state, -ETIMEDOUT if the module did not + * reset in time, or 0 upon success. + */ +static int _reset(struct omap_hwmod *oh) +{ + u32 r, v; + int c; + + if (!oh->sysconfig || + !(oh->sysconfig->sysc_flags & SYSC_HAS_SOFTRESET) || + (oh->sysconfig->sysc_flags & SYSS_MISSING)) + return -EINVAL; + + /* clocks must be on for this operation */ + if (oh->_state != _HWMOD_STATE_ENABLED) { + WARN(1, "omap_hwmod: %s: reset can only be entered from " + "enabled state\n", oh->name); + return -EINVAL; + } + + pr_debug("omap_hwmod: %s: resetting\n", oh->name); + + v = oh->_sysc_cache; + r = _set_softreset(oh, &v); + if (r) + return r; + _write_sysconfig(v, oh); + + c = 0; + while (c < MAX_MODULE_RESET_WAIT && + !(omap_hwmod_readl(oh, oh->sysconfig->syss_offs) & + SYSS_RESETDONE_MASK)) { + udelay(1); + c++; + } + + if (c == MAX_MODULE_RESET_WAIT) + WARN(1, "omap_hwmod: %s: failed to reset in %d usec\n", + oh->name, MAX_MODULE_RESET_WAIT); + else + pr_debug("omap_hwmod: %s: reset in %d usec\n", oh->name, + MAX_MODULE_RESET_WAIT); + + /* + * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from + * _wait_target_ready() or _reset() + */ + + return (c == MAX_MODULE_RESET_WAIT) ? -ETIMEDOUT : 0; +} + +/** + * _enable - enable an omap_hwmod + * @oh: struct omap_hwmod * + * + * Enables an omap_hwmod @oh such that the MPU can access the hwmod's + * register target. Must be called with omap_hwmod_mutex held. + * Returns -EINVAL if the hwmod is in the wrong state or passes along + * the return value of _wait_target_ready(). + */ +static int _enable(struct omap_hwmod *oh) +{ + int r; + + if (oh->_state != _HWMOD_STATE_INITIALIZED && + oh->_state != _HWMOD_STATE_IDLE && + oh->_state != _HWMOD_STATE_DISABLED) { + WARN(1, "omap_hwmod: %s: enabled state can only be entered " + "from initialized, idle, or disabled state\n", oh->name); + return -EINVAL; + } + + pr_debug("omap_hwmod: %s: enabling\n", oh->name); + + /* XXX mux balls */ + + _add_initiator_dep(oh, mpu_oh); + _enable_clocks(oh); + + if (oh->sysconfig) { + if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED)) + _update_sysc_cache(oh); + _sysc_enable(oh); + } + + r = _wait_target_ready(oh); + if (!r) + oh->_state = _HWMOD_STATE_ENABLED; + + return r; +} + +/** + * _idle - idle an omap_hwmod + * @oh: struct omap_hwmod * + * + * Idles an omap_hwmod @oh. This should be called once the hwmod has + * no further work. Returns -EINVAL if the hwmod is in the wrong + * state or returns 0. + */ +static int _idle(struct omap_hwmod *oh) +{ + if (oh->_state != _HWMOD_STATE_ENABLED) { + WARN(1, "omap_hwmod: %s: idle state can only be entered from " + "enabled state\n", oh->name); + return -EINVAL; + } + + pr_debug("omap_hwmod: %s: idling\n", oh->name); + + if (oh->sysconfig) + _sysc_idle(oh); + _del_initiator_dep(oh, mpu_oh); + _disable_clocks(oh); + + oh->_state = _HWMOD_STATE_IDLE; + + return 0; +} + +/** + * _shutdown - shutdown an omap_hwmod + * @oh: struct omap_hwmod * + * + * Shut down an omap_hwmod @oh. This should be called when the driver + * used for the hwmod is removed or unloaded or if the driver is not + * used by the system. Returns -EINVAL if the hwmod is in the wrong + * state or returns 0. + */ +static int _shutdown(struct omap_hwmod *oh) +{ + if (oh->_state != _HWMOD_STATE_IDLE && + oh->_state != _HWMOD_STATE_ENABLED) { + WARN(1, "omap_hwmod: %s: disabled state can only be entered " + "from idle, or enabled state\n", oh->name); + return -EINVAL; + } + + pr_debug("omap_hwmod: %s: disabling\n", oh->name); + + if (oh->sysconfig) + _sysc_shutdown(oh); + _del_initiator_dep(oh, mpu_oh); + /* XXX what about the other system initiators here? DMA, tesla, d2d */ + _disable_clocks(oh); + /* XXX Should this code also force-disable the optional clocks? */ + + /* XXX mux any associated balls to safe mode */ + + oh->_state = _HWMOD_STATE_DISABLED; + + return 0; +} + +/** + * _write_clockact_lock - set the module's clockactivity bits + * @oh: struct omap_hwmod * + * @clockact: CLOCKACTIVITY field bits + * + * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh + * OCP_SYSCONFIG register. Returns -EINVAL if the hwmod is in the + * wrong state or returns 0. + */ +static int _write_clockact_lock(struct omap_hwmod *oh, u8 clockact) +{ + u32 v; + + if (!oh->sysconfig || + !(oh->sysconfig->sysc_flags & SYSC_HAS_CLOCKACTIVITY)) + return -EINVAL; + + mutex_lock(&omap_hwmod_mutex); + v = oh->_sysc_cache; + _set_clockactivity(oh, clockact, &v); + _write_sysconfig(v, oh); + mutex_unlock(&omap_hwmod_mutex); + + return 0; +} + + +/** + * _setup - do initial configuration of omap_hwmod + * @oh: struct omap_hwmod * + * + * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh + * OCP_SYSCONFIG register. Must be called with omap_hwmod_mutex + * held. Returns -EINVAL if the hwmod is in the wrong state or returns + * 0. + */ +static int _setup(struct omap_hwmod *oh) +{ + struct omap_hwmod_ocp_if *os; + int i; + + if (!oh) + return -EINVAL; + + /* Set iclk autoidle mode */ + if (oh->slaves_cnt > 0) { + for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) { + struct clk *c = os->_clk; + + if (!c || IS_ERR(c)) + continue; + + if (os->flags & OCPIF_SWSUP_IDLE) { + /* XXX omap_iclk_deny_idle(c); */ + } else { + /* XXX omap_iclk_allow_idle(c); */ + clk_enable(c); + } + } + } + + oh->_state = _HWMOD_STATE_INITIALIZED; + + _enable(oh); + + if (!(oh->flags & HWMOD_INIT_NO_RESET)) + _reset(oh); + + /* XXX OCP AUTOIDLE bit? */ + /* XXX OCP ENAWAKEUP bit? */ + + if (!(oh->flags & HWMOD_INIT_NO_IDLE)) + _idle(oh); + + return 0; +} + + + +/* Public functions */ + +u32 omap_hwmod_readl(struct omap_hwmod *oh, u16 reg_offs) +{ + return __raw_readl(oh->_rt_va + reg_offs); +} + +void omap_hwmod_writel(u32 v, struct omap_hwmod *oh, u16 reg_offs) +{ + __raw_writel(v, oh->_rt_va + reg_offs); +} + +/** + * omap_hwmod_register - register a struct omap_hwmod + * @oh: struct omap_hwmod * + * + * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod already + * has been registered by the same name; -EINVAL if the omap_hwmod is in the + * wrong state, or 0 on success. + * + * XXX The data should be copied into bootmem, so the original data + * should be marked __initdata and freed after init. This would allow + * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note + * that the copy process would be relatively complex due to the large number + * of substructures. + */ +int omap_hwmod_register(struct omap_hwmod *oh) +{ + int ret, ms_id; + + if (!oh || (oh->_state != _HWMOD_STATE_UNKNOWN)) + return -EINVAL; + + mutex_lock(&omap_hwmod_mutex); + + pr_debug("omap_hwmod: %s: registering\n", oh->name); + + if (_lookup(oh->name)) { + ret = -EEXIST; + goto ohr_unlock; + } + + ms_id = _find_mpu_port_index(oh); + if (!IS_ERR_VALUE(ms_id)) { + oh->_mpu_port_index = ms_id; + oh->_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index); + } else { + oh->_int_flags |= _HWMOD_NO_MPU_PORT; + } + + list_add_tail(&oh->node, &omap_hwmod_list); + + oh->_state = _HWMOD_STATE_REGISTERED; + + ret = 0; + +ohr_unlock: + mutex_unlock(&omap_hwmod_mutex); + return ret; +} + +/** + * omap_hwmod_lookup - look up a registered omap_hwmod by name + * @name: name of the omap_hwmod to look up + * + * Given a @name of an omap_hwmod, return a pointer to the registered + * struct omap_hwmod *, or NULL upon error. + */ +struct omap_hwmod *omap_hwmod_lookup(const char *name) +{ + struct omap_hwmod *oh; + + if (!name) + return NULL; + + mutex_lock(&omap_hwmod_mutex); + oh = _lookup(name); + mutex_unlock(&omap_hwmod_mutex); + + return oh; +} + +/** + * omap_hwmod_for_each - call function for each registered omap_hwmod + * @fn: pointer to a callback function + * + * Call @fn for each registered omap_hwmod, passing @data to each + * function. @fn must return 0 for success or any other value for + * failure. If @fn returns non-zero, the iteration across omap_hwmods + * will stop and the non-zero return value will be passed to the + * caller of omap_hwmod_for_each(). @fn is called with + * omap_hwmod_for_each() held. + */ +int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh)) +{ + struct omap_hwmod *temp_oh; + int ret; + + if (!fn) + return -EINVAL; + + mutex_lock(&omap_hwmod_mutex); + list_for_each_entry(temp_oh, &omap_hwmod_list, node) { + ret = (*fn)(temp_oh); + if (ret) + break; + } + mutex_unlock(&omap_hwmod_mutex); + + return ret; +} + + +/** + * omap_hwmod_init - init omap_hwmod code and register hwmods + * @ohs: pointer to an array of omap_hwmods to register + * + * Intended to be called early in boot before the clock framework is + * initialized. If @ohs is not null, will register all omap_hwmods + * listed in @ohs that are valid for this chip. Returns -EINVAL if + * omap_hwmod_init() has already been called or 0 otherwise. + */ +int omap_hwmod_init(struct omap_hwmod **ohs) +{ + struct omap_hwmod *oh; + int r; + + if (inited) + return -EINVAL; + + inited = 1; + + if (!ohs) + return 0; + + oh = *ohs; + while (oh) { + if (omap_chip_is(oh->omap_chip)) { + r = omap_hwmod_register(oh); + WARN(r, "omap_hwmod: %s: omap_hwmod_register returned " + "%d\n", oh->name, r); + } + oh = *++ohs; + } + + return 0; +} + +/** + * omap_hwmod_late_init - do some post-clock framework initialization + * + * Must be called after omap2_clk_init(). Resolves the struct clk names + * to struct clk pointers for each registered omap_hwmod. Also calls + * _setup() on each hwmod. Returns 0. + */ +int omap_hwmod_late_init(void) +{ + int r; + + /* XXX check return value */ + r = omap_hwmod_for_each(_init_clocks); + WARN(r, "omap_hwmod: omap_hwmod_late_init(): _init_clocks failed\n"); + + mpu_oh = omap_hwmod_lookup(MPU_INITIATOR_NAME); + WARN(!mpu_oh, "omap_hwmod: could not find MPU initiator hwmod %s\n", + MPU_INITIATOR_NAME); + + omap_hwmod_for_each(_setup); + + return 0; +} + +/** + * omap_hwmod_unregister - unregister an omap_hwmod + * @oh: struct omap_hwmod * + * + * Unregisters a previously-registered omap_hwmod @oh. There's probably + * no use case for this, so it is likely to be removed in a later version. + * + * XXX Free all of the bootmem-allocated structures here when that is + * implemented. Make it clear that core code is the only code that is + * expected to unregister modules. + */ +int omap_hwmod_unregister(struct omap_hwmod *oh) +{ + if (!oh) + return -EINVAL; + + pr_debug("omap_hwmod: %s: unregistering\n", oh->name); + + mutex_lock(&omap_hwmod_mutex); + list_del(&oh->node); + mutex_unlock(&omap_hwmod_mutex); + + return 0; +} + +/** + * omap_hwmod_enable - enable an omap_hwmod + * @oh: struct omap_hwmod * + * + * Enable an omap_hwomd @oh. Intended to be called by omap_device_enable(). + * Returns -EINVAL on error or passes along the return value from _enable(). + */ +int omap_hwmod_enable(struct omap_hwmod *oh) +{ + int r; + + if (!oh) + return -EINVAL; + + mutex_lock(&omap_hwmod_mutex); + r = _enable(oh); + mutex_unlock(&omap_hwmod_mutex); + + return r; +} + +/** + * omap_hwmod_idle - idle an omap_hwmod + * @oh: struct omap_hwmod * + * + * Idle an omap_hwomd @oh. Intended to be called by omap_device_idle(). + * Returns -EINVAL on error or passes along the return value from _idle(). + */ +int omap_hwmod_idle(struct omap_hwmod *oh) +{ + if (!oh) + return -EINVAL; + + mutex_lock(&omap_hwmod_mutex); + _idle(oh); + mutex_unlock(&omap_hwmod_mutex); + + return 0; +} + +/** + * omap_hwmod_shutdown - shutdown an omap_hwmod + * @oh: struct omap_hwmod * + * + * Shutdown an omap_hwomd @oh. Intended to be called by + * omap_device_shutdown(). Returns -EINVAL on error or passes along + * the return value from _shutdown(). + */ +int omap_hwmod_shutdown(struct omap_hwmod *oh) +{ + if (!oh) + return -EINVAL; + + mutex_lock(&omap_hwmod_mutex); + _shutdown(oh); + mutex_unlock(&omap_hwmod_mutex); + + return 0; +} + +/** + * omap_hwmod_enable_clocks - enable main_clk, all interface clocks + * @oh: struct omap_hwmod *oh + * + * Intended to be called by the omap_device code. + */ +int omap_hwmod_enable_clocks(struct omap_hwmod *oh) +{ + mutex_lock(&omap_hwmod_mutex); + _enable_clocks(oh); + mutex_unlock(&omap_hwmod_mutex); + + return 0; +} + +/** + * omap_hwmod_disable_clocks - disable main_clk, all interface clocks + * @oh: struct omap_hwmod *oh + * + * Intended to be called by the omap_device code. + */ +int omap_hwmod_disable_clocks(struct omap_hwmod *oh) +{ + mutex_lock(&omap_hwmod_mutex); + _disable_clocks(oh); + mutex_unlock(&omap_hwmod_mutex); + + return 0; +} + +/** + * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete + * @oh: struct omap_hwmod *oh + * + * Intended to be called by drivers and core code when all posted + * writes to a device must complete before continuing further + * execution (for example, after clearing some device IRQSTATUS + * register bits) + * + * XXX what about targets with multiple OCP threads? + */ +void omap_hwmod_ocp_barrier(struct omap_hwmod *oh) +{ + BUG_ON(!oh); + + if (!oh->sysconfig || !oh->sysconfig->sysc_flags) { + WARN(1, "omap_device: %s: OCP barrier impossible due to " + "device configuration\n", oh->name); + return; + } + + /* + * Forces posted writes to complete on the OCP thread handling + * register writes + */ + omap_hwmod_readl(oh, oh->sysconfig->sysc_offs); +} + +/** + * omap_hwmod_reset - reset the hwmod + * @oh: struct omap_hwmod * + * + * Under some conditions, a driver may wish to reset the entire device. + * Called from omap_device code. Returns -EINVAL on error or passes along + * the return value from _reset()/_enable(). + */ +int omap_hwmod_reset(struct omap_hwmod *oh) +{ + int r; + + if (!oh || !(oh->_state & _HWMOD_STATE_ENABLED)) + return -EINVAL; + + mutex_lock(&omap_hwmod_mutex); + r = _reset(oh); + if (!r) + r = _enable(oh); + mutex_unlock(&omap_hwmod_mutex); + + return r; +} + +/** + * omap_hwmod_count_resources - count number of struct resources needed by hwmod + * @oh: struct omap_hwmod * + * @res: pointer to the first element of an array of struct resource to fill + * + * Count the number of struct resource array elements necessary to + * contain omap_hwmod @oh resources. Intended to be called by code + * that registers omap_devices. Intended to be used to determine the + * size of a dynamically-allocated struct resource array, before + * calling omap_hwmod_fill_resources(). Returns the number of struct + * resource array elements needed. + * + * XXX This code is not optimized. It could attempt to merge adjacent + * resource IDs. + * + */ +int omap_hwmod_count_resources(struct omap_hwmod *oh) +{ + int ret, i; + + ret = oh->mpu_irqs_cnt + oh->sdma_chs_cnt; + + for (i = 0; i < oh->slaves_cnt; i++) + ret += (*oh->slaves + i)->addr_cnt; + + return ret; +} + +/** + * omap_hwmod_fill_resources - fill struct resource array with hwmod data + * @oh: struct omap_hwmod * + * @res: pointer to the first element of an array of struct resource to fill + * + * Fill the struct resource array @res with resource data from the + * omap_hwmod @oh. Intended to be called by code that registers + * omap_devices. See also omap_hwmod_count_resources(). Returns the + * number of array elements filled. + */ +int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) +{ + int i, j; + int r = 0; + + /* For each IRQ, DMA, memory area, fill in array.*/ + + for (i = 0; i < oh->mpu_irqs_cnt; i++) { + (res + r)->start = *(oh->mpu_irqs + i); + (res + r)->end = *(oh->mpu_irqs + i); + (res + r)->flags = IORESOURCE_IRQ; + r++; + } + + for (i = 0; i < oh->sdma_chs_cnt; i++) { + (res + r)->name = (oh->sdma_chs + i)->name; + (res + r)->start = (oh->sdma_chs + i)->dma_ch; + (res + r)->end = (oh->sdma_chs + i)->dma_ch; + (res + r)->flags = IORESOURCE_DMA; + r++; + } + + for (i = 0; i < oh->slaves_cnt; i++) { + struct omap_hwmod_ocp_if *os; + + os = *oh->slaves + i; + + for (j = 0; j < os->addr_cnt; j++) { + (res + r)->start = (os->addr + j)->pa_start; + (res + r)->end = (os->addr + j)->pa_end; + (res + r)->flags = IORESOURCE_MEM; + r++; + } + } + + return r; +} + +/** + * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain + * @oh: struct omap_hwmod * + * + * Return the powerdomain pointer associated with the OMAP module + * @oh's main clock. If @oh does not have a main clk, return the + * powerdomain associated with the interface clock associated with the + * module's MPU port. (XXX Perhaps this should use the SDMA port + * instead?) Returns NULL on error, or a struct powerdomain * on + * success. + */ +struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh) +{ + struct clk *c; + + if (!oh) + return NULL; + + if (oh->_clk) { + c = oh->_clk; + } else { + if (oh->_int_flags & _HWMOD_NO_MPU_PORT) + return NULL; + c = oh->slaves[oh->_mpu_port_index]->_clk; + } + + return c->clkdm->pwrdm.ptr; + +} + +/** + * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh + * @oh: struct omap_hwmod * + * @init_oh: struct omap_hwmod * (initiator) + * + * Add a sleep dependency between the initiator @init_oh and @oh. + * Intended to be called by DSP/Bridge code via platform_data for the + * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge + * code needs to add/del initiator dependencies dynamically + * before/after accessing a device. Returns the return value from + * _add_initiator_dep(). + * + * XXX Keep a usecount in the clockdomain code + */ +int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh, + struct omap_hwmod *init_oh) +{ + return _add_initiator_dep(oh, init_oh); +} + +/* + * XXX what about functions for drivers to save/restore ocp_sysconfig + * for context save/restore operations? + */ + +/** + * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh + * @oh: struct omap_hwmod * + * @init_oh: struct omap_hwmod * (initiator) + * + * Remove a sleep dependency between the initiator @init_oh and @oh. + * Intended to be called by DSP/Bridge code via platform_data for the + * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge + * code needs to add/del initiator dependencies dynamically + * before/after accessing a device. Returns the return value from + * _del_initiator_dep(). + * + * XXX Keep a usecount in the clockdomain code + */ +int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh, + struct omap_hwmod *init_oh) +{ + return _del_initiator_dep(oh, init_oh); +} + +/** + * omap_hwmod_set_clockact_none - set clockactivity test to BOTH + * @oh: struct omap_hwmod * + * + * On some modules, this function can affect the wakeup latency vs. + * power consumption balance. Intended to be called by the + * omap_device layer. Passes along the return value from + * _write_clockact_lock(). + */ +int omap_hwmod_set_clockact_both(struct omap_hwmod *oh) +{ + return _write_clockact_lock(oh, CLOCKACT_TEST_BOTH); +} + +/** + * omap_hwmod_set_clockact_none - set clockactivity test to MAIN + * @oh: struct omap_hwmod * + * + * On some modules, this function can affect the wakeup latency vs. + * power consumption balance. Intended to be called by the + * omap_device layer. Passes along the return value from + * _write_clockact_lock(). + */ +int omap_hwmod_set_clockact_main(struct omap_hwmod *oh) +{ + return _write_clockact_lock(oh, CLOCKACT_TEST_MAIN); +} + +/** + * omap_hwmod_set_clockact_none - set clockactivity test to ICLK + * @oh: struct omap_hwmod * + * + * On some modules, this function can affect the wakeup latency vs. + * power consumption balance. Intended to be called by the + * omap_device layer. Passes along the return value from + * _write_clockact_lock(). + */ +int omap_hwmod_set_clockact_iclk(struct omap_hwmod *oh) +{ + return _write_clockact_lock(oh, CLOCKACT_TEST_ICLK); +} + +/** + * omap_hwmod_set_clockact_none - set clockactivity test to NONE + * @oh: struct omap_hwmod * + * + * On some modules, this function can affect the wakeup latency vs. + * power consumption balance. Intended to be called by the + * omap_device layer. Passes along the return value from + * _write_clockact_lock(). + */ +int omap_hwmod_set_clockact_none(struct omap_hwmod *oh) +{ + return _write_clockact_lock(oh, CLOCKACT_TEST_NONE); +} + +/** + * omap_hwmod_enable_wakeup - allow device to wake up the system + * @oh: struct omap_hwmod * + * + * Sets the module OCP socket ENAWAKEUP bit to allow the module to + * send wakeups to the PRCM. Eventually this should sets PRCM wakeup + * registers to cause the PRCM to receive wakeup events from the + * module. Does not set any wakeup routing registers beyond this + * point - if the module is to wake up any other module or subsystem, + * that must be set separately. Called by omap_device code. Returns + * -EINVAL on error or 0 upon success. + */ +int omap_hwmod_enable_wakeup(struct omap_hwmod *oh) +{ + if (!oh->sysconfig || + !(oh->sysconfig->sysc_flags & SYSC_HAS_ENAWAKEUP)) + return -EINVAL; + + mutex_lock(&omap_hwmod_mutex); + _enable_wakeup(oh); + mutex_unlock(&omap_hwmod_mutex); + + return 0; +} + +/** + * omap_hwmod_disable_wakeup - prevent device from waking the system + * @oh: struct omap_hwmod * + * + * Clears the module OCP socket ENAWAKEUP bit to prevent the module + * from sending wakeups to the PRCM. Eventually this should clear + * PRCM wakeup registers to cause the PRCM to ignore wakeup events + * from the module. Does not set any wakeup routing registers beyond + * this point - if the module is to wake up any other module or + * subsystem, that must be set separately. Called by omap_device + * code. Returns -EINVAL on error or 0 upon success. + */ +int omap_hwmod_disable_wakeup(struct omap_hwmod *oh) +{ + if (!oh->sysconfig || + !(oh->sysconfig->sysc_flags & SYSC_HAS_ENAWAKEUP)) + return -EINVAL; + + mutex_lock(&omap_hwmod_mutex); + _disable_wakeup(oh); + mutex_unlock(&omap_hwmod_mutex); + + return 0; +} diff --git a/arch/arm/plat-omap/include/mach/omap_hwmod.h b/arch/arm/plat-omap/include/mach/omap_hwmod.h new file mode 100644 index 00000000000..1f79c20e292 --- /dev/null +++ b/arch/arm/plat-omap/include/mach/omap_hwmod.h @@ -0,0 +1,447 @@ +/* + * omap_hwmod macros, structures + * + * Copyright (C) 2009 Nokia Corporation + * Paul Walmsley + * + * Created in collaboration with (alphabetical order): Benoit Cousson, + * Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari + * Poussa, Anand Sawant, Santosh Shilimkar, Richard Woodruff + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * These headers and macros are used to define OMAP on-chip module + * data and their integration with other OMAP modules and Linux. + * + * References: + * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064) + * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090) + * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108) + * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140) + * - Open Core Protocol Specification 2.2 + * + * To do: + * - add interconnect error log structures + * - add pinmuxing + * - init_conn_id_bit (CONNID_BIT_VECTOR) + * - implement default hwmod SMS/SDRC flags? + * + */ +#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H +#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H + +#include +#include + +#include + +struct omap_device; + +/* OCP SYSCONFIG bit shifts/masks */ +#define SYSC_MIDLEMODE_SHIFT 12 +#define SYSC_MIDLEMODE_MASK (0x3 << SYSC_MIDLEMODE_SHIFT) +#define SYSC_CLOCKACTIVITY_SHIFT 8 +#define SYSC_CLOCKACTIVITY_MASK (0x3 << SYSC_CLOCKACTIVITY_SHIFT) +#define SYSC_SIDLEMODE_SHIFT 3 +#define SYSC_SIDLEMODE_MASK (0x3 << SYSC_SIDLEMODE_SHIFT) +#define SYSC_ENAWAKEUP_SHIFT 2 +#define SYSC_ENAWAKEUP_MASK (1 << SYSC_ENAWAKEUP_SHIFT) +#define SYSC_SOFTRESET_SHIFT 1 +#define SYSC_SOFTRESET_MASK (1 << SYSC_SOFTRESET_SHIFT) + +/* OCP SYSSTATUS bit shifts/masks */ +#define SYSS_RESETDONE_SHIFT 0 +#define SYSS_RESETDONE_MASK (1 << SYSS_RESETDONE_SHIFT) + +/* Master standby/slave idle mode flags */ +#define HWMOD_IDLEMODE_FORCE (1 << 0) +#define HWMOD_IDLEMODE_NO (1 << 1) +#define HWMOD_IDLEMODE_SMART (1 << 2) + + +/** + * struct omap_hwmod_dma_info - MPU address space handled by the hwmod + * @name: name of the DMA channel (module local name) + * @dma_ch: DMA channel ID + * + * @name should be something short, e.g., "tx" or "rx". It is for use + * by platform_get_resource_byname(). It is defined locally to the + * hwmod. + */ +struct omap_hwmod_dma_info { + const char *name; + u16 dma_ch; +}; + +/** + * struct omap_hwmod_opt_clk - optional clocks used by this hwmod + * @role: "sys", "32k", "tv", etc -- for use in clk_get() + * @clkdev_dev_id: opt clock: clkdev dev_id string + * @clkdev_con_id: opt clock: clkdev con_id string + * @_clk: pointer to the struct clk (filled in at runtime) + * + * The module's interface clock and main functional clock should not + * be added as optional clocks. + */ +struct omap_hwmod_opt_clk { + const char *role; + const char *clkdev_dev_id; + const char *clkdev_con_id; + struct clk *_clk; +}; + + +/* omap_hwmod_omap2_firewall.flags bits */ +#define OMAP_FIREWALL_L3 (1 << 0) +#define OMAP_FIREWALL_L4 (1 << 1) + +/** + * struct omap_hwmod_omap2_firewall - OMAP2/3 device firewall data + * @l3_perm_bit: bit shift for L3_PM_*_PERMISSION_* + * @l4_fw_region: L4 firewall region ID + * @l4_prot_group: L4 protection group ID + * @flags: (see omap_hwmod_omap2_firewall.flags macros above) + */ +struct omap_hwmod_omap2_firewall { + u8 l3_perm_bit; + u8 l4_fw_region; + u8 l4_prot_group; + u8 flags; +}; + + +/* + * omap_hwmod_addr_space.flags bits + * + * ADDR_MAP_ON_INIT: Map this address space during omap_hwmod init. + * ADDR_TYPE_RT: Address space contains module register target data. + */ +#define ADDR_MAP_ON_INIT (1 << 0) +#define ADDR_TYPE_RT (1 << 1) + +/** + * struct omap_hwmod_addr_space - MPU address space handled by the hwmod + * @pa_start: starting physical address + * @pa_end: ending physical address + * @flags: (see omap_hwmod_addr_space.flags macros above) + * + * Address space doesn't necessarily follow physical interconnect + * structure. GPMC is one example. + */ +struct omap_hwmod_addr_space { + u32 pa_start; + u32 pa_end; + u8 flags; +}; + + +/* + * omap_hwmod_ocp_if.user bits: these indicate the initiators that use this + * interface to interact with the hwmod. Used to add sleep dependencies + * when the module is enabled or disabled. + */ +#define OCP_USER_MPU (1 << 0) +#define OCP_USER_SDMA (1 << 1) + +/* omap_hwmod_ocp_if.flags bits */ +#define OCPIF_HAS_IDLEST (1 << 0) +#define OCPIF_SWSUP_IDLE (1 << 1) +#define OCPIF_CAN_BURST (1 << 2) + +/** + * struct omap_hwmod_ocp_if - OCP interface data + * @master: struct omap_hwmod that initiates OCP transactions on this link + * @slave: struct omap_hwmod that responds to OCP transactions on this link + * @addr: address space associated with this link + * @clkdev_dev_id: interface clock: clkdev dev_id string + * @clkdev_con_id: interface clock: clkdev con_id string + * @_clk: pointer to the interface struct clk (filled in at runtime) + * @fw: interface firewall data + * @addr_cnt: ARRAY_SIZE(@addr) + * @width: OCP data width + * @thread_cnt: number of threads + * @max_burst_len: maximum burst length in @width sized words (0 if unlimited) + * @user: initiators using this interface (see OCP_USER_* macros above) + * @flags: OCP interface flags (see OCPIF_* macros above) + * + * It may also be useful to add a tag_cnt field for OCP2.x devices. + * + * Parameter names beginning with an underscore are managed internally by + * the omap_hwmod code and should not be set during initialization. + */ +struct omap_hwmod_ocp_if { + struct omap_hwmod *master; + struct omap_hwmod *slave; + struct omap_hwmod_addr_space *addr; + const char *clkdev_dev_id; + const char *clkdev_con_id; + struct clk *_clk; + union { + struct omap_hwmod_omap2_firewall omap2; + } fw; + u8 addr_cnt; + u8 width; + u8 thread_cnt; + u8 max_burst_len; + u8 user; + u8 flags; +}; + + +/* Macros for use in struct omap_hwmod_sysconfig */ + +/* Flags for use in omap_hwmod_sysconfig.idlemodes */ +#define MASTER_STANDBY_SHIFT 2 +#define SLAVE_IDLE_SHIFT 0 +#define SIDLE_FORCE (HWMOD_IDLEMODE_FORCE << SLAVE_IDLE_SHIFT) +#define SIDLE_NO (HWMOD_IDLEMODE_NO << SLAVE_IDLE_SHIFT) +#define SIDLE_SMART (HWMOD_IDLEMODE_SMART << SLAVE_IDLE_SHIFT) +#define MSTANDBY_FORCE (HWMOD_IDLEMODE_FORCE << MASTER_STANDBY_SHIFT) +#define MSTANDBY_NO (HWMOD_IDLEMODE_NO << MASTER_STANDBY_SHIFT) +#define MSTANDBY_SMART (HWMOD_IDLEMODE_SMART << MASTER_STANDBY_SHIFT) + +/* omap_hwmod_sysconfig.sysc_flags capability flags */ +#define SYSC_HAS_AUTOIDLE (1 << 0) +#define SYSC_HAS_SOFTRESET (1 << 1) +#define SYSC_HAS_ENAWAKEUP (1 << 2) +#define SYSC_HAS_EMUFREE (1 << 3) +#define SYSC_HAS_CLOCKACTIVITY (1 << 4) +#define SYSC_HAS_SIDLEMODE (1 << 5) +#define SYSC_HAS_MIDLEMODE (1 << 6) +#define SYSS_MISSING (1 << 7) + +/* omap_hwmod_sysconfig.clockact flags */ +#define CLOCKACT_TEST_BOTH 0x0 +#define CLOCKACT_TEST_MAIN 0x1 +#define CLOCKACT_TEST_ICLK 0x2 +#define CLOCKACT_TEST_NONE 0x3 + +/** + * struct omap_hwmod_sysconfig - hwmod OCP_SYSCONFIG/OCP_SYSSTATUS data + * @rev_offs: IP block revision register offset (from module base addr) + * @sysc_offs: OCP_SYSCONFIG register offset (from module base addr) + * @syss_offs: OCP_SYSSTATUS register offset (from module base addr) + * @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART} + * @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported + * @clockact: the default value of the module CLOCKACTIVITY bits + * + * @clockact describes to the module which clocks are likely to be + * disabled when the PRCM issues its idle request to the module. Some + * modules have separate clockdomains for the interface clock and main + * functional clock, and can check whether they should acknowledge the + * idle request based on the internal module functionality that has + * been associated with the clocks marked in @clockact. This field is + * only used if HWMOD_SET_DEFAULT_CLOCKACT is set (see below) + * + */ +struct omap_hwmod_sysconfig { + u16 rev_offs; + u16 sysc_offs; + u16 syss_offs; + u8 idlemodes; + u8 sysc_flags; + u8 clockact; +}; + +/** + * struct omap_hwmod_omap2_prcm - OMAP2/3-specific PRCM data + * @module_offs: PRCM submodule offset from the start of the PRM/CM + * @prcm_reg_id: PRCM register ID (e.g., 3 for CM_AUTOIDLE3) + * @module_bit: register bit shift for AUTOIDLE, WKST, WKEN, GRPSEL regs + * @idlest_reg_id: IDLEST register ID (e.g., 3 for CM_IDLEST3) + * @idlest_idle_bit: register bit shift for CM_IDLEST slave idle bit + * @idlest_stdby_bit: register bit shift for CM_IDLEST master standby bit + * + * @prcm_reg_id and @module_bit are specific to the AUTOIDLE, WKST, + * WKEN, GRPSEL registers. In an ideal world, no extra information + * would be needed for IDLEST information, but alas, there are some + * exceptions, so @idlest_reg_id, @idlest_idle_bit, @idlest_stdby_bit + * are needed for the IDLEST registers (c.f. 2430 I2CHS, 3430 USBHOST) + */ +struct omap_hwmod_omap2_prcm { + s16 module_offs; + u8 prcm_reg_id; + u8 module_bit; + u8 idlest_reg_id; + u8 idlest_idle_bit; + u8 idlest_stdby_bit; +}; + + +/** + * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data + * @module_offs: PRCM submodule offset from the start of the PRM/CM1/CM2 + * @device_offs: device register offset from @module_offs + * @submodule_wkdep_bit: bit shift of the WKDEP range + */ +struct omap_hwmod_omap4_prcm { + u32 module_offs; + u16 device_offs; + u8 submodule_wkdep_bit; +}; + + +/* + * omap_hwmod.flags definitions + * + * HWMOD_SWSUP_SIDLE: omap_hwmod code should manually bring module in and out + * of idle, rather than relying on module smart-idle + * HWMOD_SWSUP_MSTDBY: omap_hwmod code should manually bring module in and out + * of standby, rather than relying on module smart-standby + * HWMOD_INIT_NO_RESET: don't reset this module at boot - important for + * SDRAM controller, etc. + * HWMOD_INIT_NO_IDLE: don't idle this module at boot - important for SDRAM + * controller, etc. + * HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup + */ +#define HWMOD_SWSUP_SIDLE (1 << 0) +#define HWMOD_SWSUP_MSTANDBY (1 << 1) +#define HWMOD_INIT_NO_RESET (1 << 2) +#define HWMOD_INIT_NO_IDLE (1 << 3) +#define HWMOD_SET_DEFAULT_CLOCKACT (1 << 4) + +/* + * omap_hwmod._int_flags definitions + * These are for internal use only and are managed by the omap_hwmod code. + * + * _HWMOD_NO_MPU_PORT: no path exists for the MPU to write to this module + * _HWMOD_WAKEUP_ENABLED: set when the omap_hwmod code has enabled ENAWAKEUP + * _HWMOD_SYSCONFIG_LOADED: set when the OCP_SYSCONFIG value has been cached + */ +#define _HWMOD_NO_MPU_PORT (1 << 0) +#define _HWMOD_WAKEUP_ENABLED (1 << 1) +#define _HWMOD_SYSCONFIG_LOADED (1 << 2) + +/* + * omap_hwmod._state definitions + * + * INITIALIZED: reset (optionally), initialized, enabled, disabled + * (optionally) + * + * + */ +#define _HWMOD_STATE_UNKNOWN 0 +#define _HWMOD_STATE_REGISTERED 1 +#define _HWMOD_STATE_CLKS_INITED 2 +#define _HWMOD_STATE_INITIALIZED 3 +#define _HWMOD_STATE_ENABLED 4 +#define _HWMOD_STATE_IDLE 5 +#define _HWMOD_STATE_DISABLED 6 + +/** + * struct omap_hwmod - integration data for OMAP hardware "modules" (IP blocks) + * @name: name of the hwmod + * @od: struct omap_device currently associated with this hwmod (internal use) + * @mpu_irqs: ptr to an array of MPU IRQs (see also mpu_irqs_cnt) + * @sdma_chs: ptr to an array of SDMA channel IDs (see also sdma_chs_cnt) + * @prcm: PRCM data pertaining to this hwmod + * @clkdev_dev_id: main clock: clkdev dev_id string + * @clkdev_con_id: main clock: clkdev con_id string + * @_clk: pointer to the main struct clk (filled in at runtime) + * @opt_clks: other device clocks that drivers can request (0..*) + * @masters: ptr to array of OCP ifs that this hwmod can initiate on + * @slaves: ptr to array of OCP ifs that this hwmod can respond on + * @sysconfig: device SYSCONFIG/SYSSTATUS register data + * @dev_attr: arbitrary device attributes that can be passed to the driver + * @_sysc_cache: internal-use hwmod flags + * @_rt_va: cached register target start address (internal use) + * @_mpu_port_index: cached MPU register target slave ID (internal use) + * @msuspendmux_reg_id: CONTROL_MSUSPENDMUX register ID (1-6) + * @msuspendmux_shift: CONTROL_MSUSPENDMUX register bit shift + * @mpu_irqs_cnt: number of @mpu_irqs + * @sdma_chs_cnt: number of @sdma_chs + * @opt_clks_cnt: number of @opt_clks + * @master_cnt: number of @master entries + * @slaves_cnt: number of @slave entries + * @response_lat: device OCP response latency (in interface clock cycles) + * @_int_flags: internal-use hwmod flags + * @_state: internal-use hwmod state + * @flags: hwmod flags (documented below) + * @omap_chip: OMAP chips this hwmod is present on + * @node: list node for hwmod list (internal use) + * + * @clkdev_dev_id, @clkdev_con_id, and @clk all refer to this module's "main + * clock," which for our purposes is defined as "the functional clock needed + * for register accesses to complete." Modules may not have a main clock if + * the interface clock also serves as a main clock. + * + * Parameter names beginning with an underscore are managed internally by + * the omap_hwmod code and should not be set during initialization. + */ +struct omap_hwmod { + const char *name; + struct omap_device *od; + u8 *mpu_irqs; + struct omap_hwmod_dma_info *sdma_chs; + union { + struct omap_hwmod_omap2_prcm omap2; + struct omap_hwmod_omap4_prcm omap4; + } prcm; + const char *clkdev_dev_id; + const char *clkdev_con_id; + struct clk *_clk; + struct omap_hwmod_opt_clk *opt_clks; + struct omap_hwmod_ocp_if **masters; /* connect to *_IA */ + struct omap_hwmod_ocp_if **slaves; /* connect to *_TA */ + struct omap_hwmod_sysconfig *sysconfig; + void *dev_attr; + u32 _sysc_cache; + void __iomem *_rt_va; + struct list_head node; + u16 flags; + u8 _mpu_port_index; + u8 msuspendmux_reg_id; + u8 msuspendmux_shift; + u8 response_lat; + u8 mpu_irqs_cnt; + u8 sdma_chs_cnt; + u8 opt_clks_cnt; + u8 masters_cnt; + u8 slaves_cnt; + u8 hwmods_cnt; + u8 _int_flags; + u8 _state; + const struct omap_chip_id omap_chip; +}; + +int omap_hwmod_init(struct omap_hwmod **ohs); +int omap_hwmod_register(struct omap_hwmod *oh); +int omap_hwmod_unregister(struct omap_hwmod *oh); +struct omap_hwmod *omap_hwmod_lookup(const char *name); +int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh)); +int omap_hwmod_late_init(void); + +int omap_hwmod_enable(struct omap_hwmod *oh); +int omap_hwmod_idle(struct omap_hwmod *oh); +int omap_hwmod_shutdown(struct omap_hwmod *oh); + +int omap_hwmod_enable_clocks(struct omap_hwmod *oh); +int omap_hwmod_disable_clocks(struct omap_hwmod *oh); + +int omap_hwmod_reset(struct omap_hwmod *oh); +void omap_hwmod_ocp_barrier(struct omap_hwmod *oh); + +void omap_hwmod_writel(u32 v, struct omap_hwmod *oh, u16 reg_offs); +u32 omap_hwmod_readl(struct omap_hwmod *oh, u16 reg_offs); + +int omap_hwmod_count_resources(struct omap_hwmod *oh); +int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res); + +struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh); + +int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh, + struct omap_hwmod *init_oh); +int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh, + struct omap_hwmod *init_oh); + +int omap_hwmod_set_clockact_both(struct omap_hwmod *oh); +int omap_hwmod_set_clockact_main(struct omap_hwmod *oh); +int omap_hwmod_set_clockact_iclk(struct omap_hwmod *oh); +int omap_hwmod_set_clockact_none(struct omap_hwmod *oh); + +int omap_hwmod_enable_wakeup(struct omap_hwmod *oh); +int omap_hwmod_disable_wakeup(struct omap_hwmod *oh); + +#endif -- cgit v1.2.3-70-g09d2 From 02bfc030e4417003b7a94393102c92e39b2dfa65 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Thu, 3 Sep 2009 20:14:05 +0300 Subject: OMAP: omap_hwmod: call omap_hwmod init at boot; create interconnects Connect the omap_hwmod code to the kernel boot. Create some basic interconnect and device structures for OMAP2/3 chips. Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/io.c | 17 +++- arch/arm/mach-omap2/omap_hwmod.c | 3 +- arch/arm/mach-omap2/omap_hwmod_2420.h | 141 ++++++++++++++++++++++++++++ arch/arm/mach-omap2/omap_hwmod_2430.h | 143 +++++++++++++++++++++++++++++ arch/arm/mach-omap2/omap_hwmod_34xx.h | 168 ++++++++++++++++++++++++++++++++++ 5 files changed, 469 insertions(+), 3 deletions(-) create mode 100644 arch/arm/mach-omap2/omap_hwmod_2420.h create mode 100644 arch/arm/mach-omap2/omap_hwmod_2430.h create mode 100644 arch/arm/mach-omap2/omap_hwmod_34xx.h (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 470b1d10c4e..7574b6f20e8 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -39,12 +39,16 @@ #include #include - #include "powerdomains.h" #include #include "clockdomains.h" #endif +#include +#include "omap_hwmod_2420.h" +#include "omap_hwmod_2430.h" +#include "omap_hwmod_34xx.h" + /* * The machine specific code may provide the extra mapping besides the * default mapping provided here. @@ -281,6 +285,16 @@ static int __init _omap2_init_reprogram_sdrc(void) void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0, struct omap_sdrc_params *sdrc_cs1) { + struct omap_hwmod **hwmods = NULL; + + if (cpu_is_omap2420()) + hwmods = omap2420_hwmods; + else if (cpu_is_omap2430()) + hwmods = omap2430_hwmods; + else if (cpu_is_omap34xx()) + hwmods = omap34xx_hwmods; + + omap_hwmod_init(hwmods); omap2_mux_init(); #ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once the clkdev is ready */ /* The OPP tables have to be registered before a clk init */ @@ -289,6 +303,7 @@ void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0, clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps); omap2_clk_init(); omap_serial_early_init(); + omap_hwmod_late_init(); omap_pm_if_init(); omap2_sdrc_init(sdrc_cs0, sdrc_cs1); _omap2_init_reprogram_sdrc(); diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 3b10ad6c47d..d2e0f1c9596 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -765,8 +765,7 @@ static int _reset(struct omap_hwmod *oh) WARN(1, "omap_hwmod: %s: failed to reset in %d usec\n", oh->name, MAX_MODULE_RESET_WAIT); else - pr_debug("omap_hwmod: %s: reset in %d usec\n", oh->name, - MAX_MODULE_RESET_WAIT); + pr_debug("omap_hwmod: %s: reset in %d usec\n", oh->name, c); /* * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from diff --git a/arch/arm/mach-omap2/omap_hwmod_2420.h b/arch/arm/mach-omap2/omap_hwmod_2420.h new file mode 100644 index 00000000000..767e4965ac4 --- /dev/null +++ b/arch/arm/mach-omap2/omap_hwmod_2420.h @@ -0,0 +1,141 @@ +/* + * omap_hwmod_2420.h - hardware modules present on the OMAP2420 chips + * + * Copyright (C) 2009 Nokia Corporation + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * XXX handle crossbar/shared link difference for L3? + * + */ +#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD2420_H +#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD2420_H + +#ifdef CONFIG_ARCH_OMAP2420 + +#include +#include +#include +#include + +#include "prm-regbits-24xx.h" + +static struct omap_hwmod omap2420_mpu_hwmod; +static struct omap_hwmod omap2420_l3_hwmod; +static struct omap_hwmod omap2420_l4_core_hwmod; + +/* L3 -> L4_CORE interface */ +static struct omap_hwmod_ocp_if omap2420_l3__l4_core = { + .master = &omap2420_l3_hwmod, + .slave = &omap2420_l4_core_hwmod, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* MPU -> L3 interface */ +static struct omap_hwmod_ocp_if omap2420_mpu__l3 = { + .master = &omap2420_mpu_hwmod, + .slave = &omap2420_l3_hwmod, + .user = OCP_USER_MPU, +}; + +/* Slave interfaces on the L3 interconnect */ +static struct omap_hwmod_ocp_if *omap2420_l3_slaves[] = { + &omap2420_mpu__l3, +}; + +/* Master interfaces on the L3 interconnect */ +static struct omap_hwmod_ocp_if *omap2420_l3_masters[] = { + &omap2420_l3__l4_core, +}; + +/* L3 */ +static struct omap_hwmod omap2420_l3_hwmod = { + .name = "l3_hwmod", + .masters = omap2420_l3_masters, + .masters_cnt = ARRAY_SIZE(omap2420_l3_masters), + .slaves = omap2420_l3_slaves, + .slaves_cnt = ARRAY_SIZE(omap2420_l3_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) +}; + +static struct omap_hwmod omap2420_l4_wkup_hwmod; + +/* L4_CORE -> L4_WKUP interface */ +static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = { + .master = &omap2420_l4_core_hwmod, + .slave = &omap2420_l4_wkup_hwmod, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* Slave interfaces on the L4_CORE interconnect */ +static struct omap_hwmod_ocp_if *omap2420_l4_core_slaves[] = { + &omap2420_l3__l4_core, +}; + +/* Master interfaces on the L4_CORE interconnect */ +static struct omap_hwmod_ocp_if *omap2420_l4_core_masters[] = { + &omap2420_l4_core__l4_wkup, +}; + +/* L4 CORE */ +static struct omap_hwmod omap2420_l4_core_hwmod = { + .name = "l4_core_hwmod", + .masters = omap2420_l4_core_masters, + .masters_cnt = ARRAY_SIZE(omap2420_l4_core_masters), + .slaves = omap2420_l4_core_slaves, + .slaves_cnt = ARRAY_SIZE(omap2420_l4_core_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) +}; + +/* Slave interfaces on the L4_WKUP interconnect */ +static struct omap_hwmod_ocp_if *omap2420_l4_wkup_slaves[] = { + &omap2420_l4_core__l4_wkup, +}; + +/* Master interfaces on the L4_WKUP interconnect */ +static struct omap_hwmod_ocp_if *omap2420_l4_wkup_masters[] = { +}; + +/* L4 WKUP */ +static struct omap_hwmod omap2420_l4_wkup_hwmod = { + .name = "l4_wkup_hwmod", + .masters = omap2420_l4_wkup_masters, + .masters_cnt = ARRAY_SIZE(omap2420_l4_wkup_masters), + .slaves = omap2420_l4_wkup_slaves, + .slaves_cnt = ARRAY_SIZE(omap2420_l4_wkup_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) +}; + +/* Master interfaces on the MPU device */ +static struct omap_hwmod_ocp_if *omap2420_mpu_masters[] = { + &omap2420_mpu__l3, +}; + +/* MPU */ +static struct omap_hwmod omap2420_mpu_hwmod = { + .name = "mpu_hwmod", + .clkdev_dev_id = NULL, + .clkdev_con_id = "mpu_ck", + .masters = omap2420_mpu_masters, + .masters_cnt = ARRAY_SIZE(omap2420_mpu_masters), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), +}; + +static __initdata struct omap_hwmod *omap2420_hwmods[] = { + &omap2420_l3_hwmod, + &omap2420_l4_core_hwmod, + &omap2420_l4_wkup_hwmod, + &omap2420_mpu_hwmod, + NULL, +}; + +#else +# define omap2420_hwmods 0 +#endif + +#endif + + diff --git a/arch/arm/mach-omap2/omap_hwmod_2430.h b/arch/arm/mach-omap2/omap_hwmod_2430.h new file mode 100644 index 00000000000..a412be6420e --- /dev/null +++ b/arch/arm/mach-omap2/omap_hwmod_2430.h @@ -0,0 +1,143 @@ +/* + * omap_hwmod_2430.h - hardware modules present on the OMAP2430 chips + * + * Copyright (C) 2009 Nokia Corporation + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * XXX handle crossbar/shared link difference for L3? + * + */ +#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD2430_H +#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD2430_H + +#ifdef CONFIG_ARCH_OMAP2430 + +#include +#include +#include +#include + +#include "prm-regbits-24xx.h" + +static struct omap_hwmod omap2430_mpu_hwmod; +static struct omap_hwmod omap2430_l3_hwmod; +static struct omap_hwmod omap2430_l4_core_hwmod; + +/* L3 -> L4_CORE interface */ +static struct omap_hwmod_ocp_if omap2430_l3__l4_core = { + .master = &omap2430_l3_hwmod, + .slave = &omap2430_l4_core_hwmod, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* MPU -> L3 interface */ +static struct omap_hwmod_ocp_if omap2430_mpu__l3 = { + .master = &omap2430_mpu_hwmod, + .slave = &omap2430_l3_hwmod, + .user = OCP_USER_MPU, +}; + +/* Slave interfaces on the L3 interconnect */ +static struct omap_hwmod_ocp_if *omap2430_l3_slaves[] = { + &omap2430_mpu__l3, +}; + +/* Master interfaces on the L3 interconnect */ +static struct omap_hwmod_ocp_if *omap2430_l3_masters[] = { + &omap2430_l3__l4_core, +}; + +/* L3 */ +static struct omap_hwmod omap2430_l3_hwmod = { + .name = "l3_hwmod", + .masters = omap2430_l3_masters, + .masters_cnt = ARRAY_SIZE(omap2430_l3_masters), + .slaves = omap2430_l3_slaves, + .slaves_cnt = ARRAY_SIZE(omap2430_l3_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) +}; + +static struct omap_hwmod omap2430_l4_wkup_hwmod; +static struct omap_hwmod omap2430_mmc1_hwmod; +static struct omap_hwmod omap2430_mmc2_hwmod; + +/* L4_CORE -> L4_WKUP interface */ +static struct omap_hwmod_ocp_if omap2430_l4_core__l4_wkup = { + .master = &omap2430_l4_core_hwmod, + .slave = &omap2430_l4_wkup_hwmod, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* Slave interfaces on the L4_CORE interconnect */ +static struct omap_hwmod_ocp_if *omap2430_l4_core_slaves[] = { + &omap2430_l3__l4_core, +}; + +/* Master interfaces on the L4_CORE interconnect */ +static struct omap_hwmod_ocp_if *omap2430_l4_core_masters[] = { + &omap2430_l4_core__l4_wkup, +}; + +/* L4 CORE */ +static struct omap_hwmod omap2430_l4_core_hwmod = { + .name = "l4_core_hwmod", + .masters = omap2430_l4_core_masters, + .masters_cnt = ARRAY_SIZE(omap2430_l4_core_masters), + .slaves = omap2430_l4_core_slaves, + .slaves_cnt = ARRAY_SIZE(omap2430_l4_core_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) +}; + +/* Slave interfaces on the L4_WKUP interconnect */ +static struct omap_hwmod_ocp_if *omap2430_l4_wkup_slaves[] = { + &omap2430_l4_core__l4_wkup, +}; + +/* Master interfaces on the L4_WKUP interconnect */ +static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = { +}; + +/* L4 WKUP */ +static struct omap_hwmod omap2430_l4_wkup_hwmod = { + .name = "l4_wkup_hwmod", + .masters = omap2430_l4_wkup_masters, + .masters_cnt = ARRAY_SIZE(omap2430_l4_wkup_masters), + .slaves = omap2430_l4_wkup_slaves, + .slaves_cnt = ARRAY_SIZE(omap2430_l4_wkup_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) +}; + +/* Master interfaces on the MPU device */ +static struct omap_hwmod_ocp_if *omap2430_mpu_masters[] = { + &omap2430_mpu__l3, +}; + +/* MPU */ +static struct omap_hwmod omap2430_mpu_hwmod = { + .name = "mpu_hwmod", + .clkdev_dev_id = NULL, + .clkdev_con_id = "mpu_ck", + .masters = omap2430_mpu_masters, + .masters_cnt = ARRAY_SIZE(omap2430_mpu_masters), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), +}; + +static __initdata struct omap_hwmod *omap2430_hwmods[] = { + &omap2430_l3_hwmod, + &omap2430_l4_core_hwmod, + &omap2430_l4_wkup_hwmod, + &omap2430_mpu_hwmod, + NULL, +}; + +#else +# define omap2430_hwmods 0 +#endif + +#endif + + diff --git a/arch/arm/mach-omap2/omap_hwmod_34xx.h b/arch/arm/mach-omap2/omap_hwmod_34xx.h new file mode 100644 index 00000000000..1e069f83157 --- /dev/null +++ b/arch/arm/mach-omap2/omap_hwmod_34xx.h @@ -0,0 +1,168 @@ +/* + * omap_hwmod_34xx.h - hardware modules present on the OMAP34xx chips + * + * Copyright (C) 2009 Nokia Corporation + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ +#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD34XX_H +#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD34XX_H + +#ifdef CONFIG_ARCH_OMAP34XX + +#include +#include +#include +#include + +#include "prm-regbits-34xx.h" + +static struct omap_hwmod omap34xx_mpu_hwmod; +static struct omap_hwmod omap34xx_l3_hwmod; +static struct omap_hwmod omap34xx_l4_core_hwmod; +static struct omap_hwmod omap34xx_l4_per_hwmod; + +/* L3 -> L4_CORE interface */ +static struct omap_hwmod_ocp_if omap34xx_l3__l4_core = { + .master = &omap34xx_l3_hwmod, + .slave = &omap34xx_l4_core_hwmod, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* L3 -> L4_PER interface */ +static struct omap_hwmod_ocp_if omap34xx_l3__l4_per = { + .master = &omap34xx_l3_hwmod, + .slave = &omap34xx_l4_per_hwmod, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* MPU -> L3 interface */ +static struct omap_hwmod_ocp_if omap34xx_mpu__l3 = { + .master = &omap34xx_mpu_hwmod, + .slave = &omap34xx_l3_hwmod, + .user = OCP_USER_MPU, +}; + +/* Slave interfaces on the L3 interconnect */ +static struct omap_hwmod_ocp_if *omap34xx_l3_slaves[] = { + &omap34xx_mpu__l3, +}; + +/* Master interfaces on the L3 interconnect */ +static struct omap_hwmod_ocp_if *omap34xx_l3_masters[] = { + &omap34xx_l3__l4_core, + &omap34xx_l3__l4_per, +}; + +/* L3 */ +static struct omap_hwmod omap34xx_l3_hwmod = { + .name = "l3_hwmod", + .masters = omap34xx_l3_masters, + .masters_cnt = ARRAY_SIZE(omap34xx_l3_masters), + .slaves = omap34xx_l3_slaves, + .slaves_cnt = ARRAY_SIZE(omap34xx_l3_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) +}; + +static struct omap_hwmod omap34xx_l4_wkup_hwmod; + +/* L4_CORE -> L4_WKUP interface */ +static struct omap_hwmod_ocp_if omap34xx_l4_core__l4_wkup = { + .master = &omap34xx_l4_core_hwmod, + .slave = &omap34xx_l4_wkup_hwmod, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* Slave interfaces on the L4_CORE interconnect */ +static struct omap_hwmod_ocp_if *omap34xx_l4_core_slaves[] = { + &omap34xx_l3__l4_core, +}; + +/* Master interfaces on the L4_CORE interconnect */ +static struct omap_hwmod_ocp_if *omap34xx_l4_core_masters[] = { + &omap34xx_l4_core__l4_wkup, +}; + +/* L4 CORE */ +static struct omap_hwmod omap34xx_l4_core_hwmod = { + .name = "l4_core_hwmod", + .masters = omap34xx_l4_core_masters, + .masters_cnt = ARRAY_SIZE(omap34xx_l4_core_masters), + .slaves = omap34xx_l4_core_slaves, + .slaves_cnt = ARRAY_SIZE(omap34xx_l4_core_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) +}; + +/* Slave interfaces on the L4_PER interconnect */ +static struct omap_hwmod_ocp_if *omap34xx_l4_per_slaves[] = { + &omap34xx_l3__l4_per, +}; + +/* Master interfaces on the L4_PER interconnect */ +static struct omap_hwmod_ocp_if *omap34xx_l4_per_masters[] = { +}; + +/* L4 PER */ +static struct omap_hwmod omap34xx_l4_per_hwmod = { + .name = "l4_per_hwmod", + .masters = omap34xx_l4_per_masters, + .masters_cnt = ARRAY_SIZE(omap34xx_l4_per_masters), + .slaves = omap34xx_l4_per_slaves, + .slaves_cnt = ARRAY_SIZE(omap34xx_l4_per_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) +}; + +/* Slave interfaces on the L4_WKUP interconnect */ +static struct omap_hwmod_ocp_if *omap34xx_l4_wkup_slaves[] = { + &omap34xx_l4_core__l4_wkup, +}; + +/* Master interfaces on the L4_WKUP interconnect */ +static struct omap_hwmod_ocp_if *omap34xx_l4_wkup_masters[] = { +}; + +/* L4 WKUP */ +static struct omap_hwmod omap34xx_l4_wkup_hwmod = { + .name = "l4_wkup_hwmod", + .masters = omap34xx_l4_wkup_masters, + .masters_cnt = ARRAY_SIZE(omap34xx_l4_wkup_masters), + .slaves = omap34xx_l4_wkup_slaves, + .slaves_cnt = ARRAY_SIZE(omap34xx_l4_wkup_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) +}; + +/* Master interfaces on the MPU device */ +static struct omap_hwmod_ocp_if *omap34xx_mpu_masters[] = { + &omap34xx_mpu__l3, +}; + +/* MPU */ +static struct omap_hwmod omap34xx_mpu_hwmod = { + .name = "mpu_hwmod", + .clkdev_dev_id = NULL, + .clkdev_con_id = "arm_fck", + .masters = omap34xx_mpu_masters, + .masters_cnt = ARRAY_SIZE(omap34xx_mpu_masters), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; + +static __initdata struct omap_hwmod *omap34xx_hwmods[] = { + &omap34xx_l3_hwmod, + &omap34xx_l4_core_hwmod, + &omap34xx_l4_per_hwmod, + &omap34xx_l4_wkup_hwmod, + &omap34xx_mpu_hwmod, + NULL, +}; + +#else +# define omap34xx_hwmods 0 +#endif + +#endif + + -- cgit v1.2.3-70-g09d2 From 9312fffbad5661a0ad52b5ca5a04875c763a35fa Mon Sep 17 00:00:00 2001 From: Amit Kucheria Date: Thu, 27 Aug 2009 20:27:57 +0200 Subject: mfd: OMAP: Board-specifc twl4030 DPS scripts for RX51 board Add support for Dynamic Power Switching (DPS) for the RX51 board. These scripts are still a work-in-progress. I'll keep sending patches to update the scripts as they are optimised. Signed-off-by: Amit Kucheria Acked-by: Tony Lindgren Signed-off-by: Samuel Ortiz --- arch/arm/mach-omap2/board-rx51-peripherals.c | 122 ++++++++++++++++++++++++++- 1 file changed, 120 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c index 56d931a425f..e70baa79901 100644 --- a/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c @@ -1,5 +1,5 @@ /* - * linux/arch/arm/mach-omap2/board-rx51-flash.c + * linux/arch/arm/mach-omap2/board-rx51-peripherals.c * * Copyright (C) 2008-2009 Nokia * @@ -282,7 +282,124 @@ static struct twl4030_usb_data rx51_usb_data = { .usb_mode = T2_USB_MODE_ULPI, }; -static struct twl4030_platform_data rx51_twldata = { +static struct twl4030_ins sleep_on_seq[] __initdata = { +/* + * Turn off VDD1 and VDD2. + */ + {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_OFF), 4}, + {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_OFF), 2}, +/* + * And also turn off the OMAP3 PLLs and the sysclk output. + */ + {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_OFF), 3}, + {MSG_SINGULAR(DEV_GRP_P1, 0x17, RES_STATE_OFF), 3}, +}; + +static struct twl4030_script sleep_on_script __initdata = { + .script = sleep_on_seq, + .size = ARRAY_SIZE(sleep_on_seq), + .flags = TWL4030_SLEEP_SCRIPT, +}; + +static struct twl4030_ins wakeup_seq[] __initdata = { +/* + * Reenable the OMAP3 PLLs. + * Wakeup VDD1 and VDD2. + * Reenable sysclk output. + */ + {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_ACTIVE), 0x30}, + {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_ACTIVE), 0x30}, + {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_ACTIVE), 0x37}, + {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_ACTIVE), 3}, +}; + +static struct twl4030_script wakeup_script __initdata = { + .script = wakeup_seq, + .size = ARRAY_SIZE(wakeup_seq), + .flags = TWL4030_WAKEUP12_SCRIPT, +}; + +static struct twl4030_ins wakeup_p3_seq[] __initdata = { +/* + * Wakeup VDD1 (dummy to be able to insert a delay) + * Enable CLKEN + */ + {MSG_SINGULAR(DEV_GRP_P1, 0x17, RES_STATE_ACTIVE), 3}, +}; + +static struct twl4030_script wakeup_p3_script __initdata = { + .script = wakeup_p3_seq, + .size = ARRAY_SIZE(wakeup_p3_seq), + .flags = TWL4030_WAKEUP3_SCRIPT, +}; + +static struct twl4030_ins wrst_seq[] __initdata = { +/* + * Reset twl4030. + * Reset VDD1 regulator. + * Reset VDD2 regulator. + * Reset VPLL1 regulator. + * Enable sysclk output. + * Reenable twl4030. + */ + {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_OFF), 2}, + {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 0, 1, RES_STATE_ACTIVE), + 0x13}, + {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 2, RES_STATE_WRST), 0x13}, + {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 3, RES_STATE_OFF), 0x13}, + {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD1, RES_STATE_WRST), 0x13}, + {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD2, RES_STATE_WRST), 0x13}, + {MSG_SINGULAR(DEV_GRP_NULL, RES_VPLL1, RES_STATE_WRST), 0x35}, + {MSG_SINGULAR(DEV_GRP_P1, RES_HFCLKOUT, RES_STATE_ACTIVE), 2}, + {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_ACTIVE), 2}, +}; + +static struct twl4030_script wrst_script __initdata = { + .script = wrst_seq, + .size = ARRAY_SIZE(wrst_seq), + .flags = TWL4030_WRST_SCRIPT, +}; + +static struct twl4030_script *twl4030_scripts[] __initdata = { + /* wakeup12 script should be loaded before sleep script, otherwise a + board might hit retention before loading of wakeup script is + completed. This can cause boot failures depending on timing issues. + */ + &wakeup_script, + &sleep_on_script, + &wakeup_p3_script, + &wrst_script, +}; + +static struct twl4030_resconfig twl4030_rconfig[] __initdata = { + { .resource = RES_VINTANA1, .devgroup = -1, .type = -1, .type2 = 1 }, + { .resource = RES_VINTANA2, .devgroup = -1, .type = -1, .type2 = 1 }, + { .resource = RES_VINTDIG, .devgroup = -1, .type = -1, .type2 = 1 }, + { .resource = RES_VMMC1, .devgroup = -1, .type = -1, .type2 = 3}, + { .resource = RES_VMMC2, .devgroup = DEV_GRP_NULL, .type = -1, + .type2 = 3}, + { .resource = RES_VAUX1, .devgroup = -1, .type = -1, .type2 = 3}, + { .resource = RES_VAUX2, .devgroup = -1, .type = -1, .type2 = 3}, + { .resource = RES_VAUX3, .devgroup = -1, .type = -1, .type2 = 3}, + { .resource = RES_VAUX4, .devgroup = -1, .type = -1, .type2 = 3}, + { .resource = RES_VPLL2, .devgroup = -1, .type = -1, .type2 = 3}, + { .resource = RES_VDAC, .devgroup = -1, .type = -1, .type2 = 3}, + { .resource = RES_VSIM, .devgroup = DEV_GRP_NULL, .type = -1, + .type2 = 3}, + { .resource = RES_CLKEN, .devgroup = DEV_GRP_P3, .type = -1, + .type2 = 1 }, + { 0, 0}, +}; + +static struct twl4030_power_data rx51_t2scripts_data __initdata = { + .scripts = twl4030_scripts, + .num = ARRAY_SIZE(twl4030_scripts), + .resource_config = twl4030_rconfig, +}; + + + +static struct twl4030_platform_data rx51_twldata __initdata = { .irq_base = TWL4030_IRQ_BASE, .irq_end = TWL4030_IRQ_END, @@ -291,6 +408,7 @@ static struct twl4030_platform_data rx51_twldata = { .keypad = &rx51_kp_data, .madc = &rx51_madc_data, .usb = &rx51_usb_data, + .power = &rx51_t2scripts_data, .vaux1 = &rx51_vaux1, .vaux2 = &rx51_vaux2, -- cgit v1.2.3-70-g09d2