From 8ff120e5303e27e03aba7b774e86fd43eaf90376 Mon Sep 17 00:00:00 2001 From: Rajendra Nayak Date: Fri, 24 Jul 2009 19:44:01 -0600 Subject: OMAP3 SDRC: Fix freeze when scaling CORE dpll to < 83Mhz This patch fixes a bug in the CORE dpll scaling sequence which was errouneously clearing some bits in the SDRC DLLA CTRL register and hence causing a freeze. The issue was observed only on platforms which scale CORE dpll to < 83Mhz and hence program the DLL in fixed delay mode. Issue reported by Limei Wang , with debugging assistance from Richard Woodruff and Girish Ghongdemath . Signed-off-by: Rajendra Nayak Cc: Limei Wang Cc: Richard Woodruff Cc: Girish Ghongdemath Signed-off-by: Paul Walmsley [paul@pwsan.com: updated patch description to include collaboration credits] --- arch/arm/mach-omap2/sram34xx.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/sram34xx.S b/arch/arm/mach-omap2/sram34xx.S index 9c2d0465a83..e6b112590d7 100644 --- a/arch/arm/mach-omap2/sram34xx.S +++ b/arch/arm/mach-omap2/sram34xx.S @@ -143,7 +143,7 @@ return_to_sdram: unlock_dll: ldr r11, omap3_sdrc_dlla_ctrl ldr r12, [r11] - and r12, r12, #FIXEDDELAY_MASK + bic r12, r12, #FIXEDDELAY_MASK orr r12, r12, #FIXEDDELAY_DEFAULT orr r12, r12, #DLLIDLE_MASK str r12, [r11] @ (no OCP barrier needed) -- cgit v1.2.3-70-g09d2