From 1a5de3aeb015e495b7ffe03186cc598f17d8ad88 Mon Sep 17 00:00:00 2001 From: Alexandre Courbot Date: Sun, 24 Nov 2013 15:30:49 +0900 Subject: ARM: tegra: add support for Trusted Foundations Register the firmware operations for Trusted Foundations if the device tree indicates it is active on the device. Signed-off-by: Alexandre Courbot Reviewed-by: Tomasz Figa Reviewed-by: Stephen Warren Signed-off-by: Stephen Warren --- arch/arm/mach-tegra/Kconfig | 1 + arch/arm/mach-tegra/tegra.c | 2 ++ 2 files changed, 3 insertions(+) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 09e740f58b2..00b85fd9285 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -2,6 +2,7 @@ config ARCH_TEGRA bool "NVIDIA Tegra" if ARCH_MULTI_V7 select ARCH_HAS_CPUFREQ select ARCH_REQUIRE_GPIOLIB + select ARCH_SUPPORTS_TRUSTED_FOUNDATIONS select ARM_GIC select CLKSRC_MMIO select CLKSRC_OF diff --git a/arch/arm/mach-tegra/tegra.c b/arch/arm/mach-tegra/tegra.c index 73368176c6e..09a1f8d98ca 100644 --- a/arch/arm/mach-tegra/tegra.c +++ b/arch/arm/mach-tegra/tegra.c @@ -40,6 +40,7 @@ #include #include #include +#include #include "apbio.h" #include "board.h" @@ -90,6 +91,7 @@ static void __init tegra_init_cache(void) static void __init tegra_init_early(void) { + of_register_trusted_foundations(); tegra_apb_io_init(); tegra_init_fuse(); tegra_cpu_reset_handler_init(); -- cgit v1.2.3-70-g09d2 From ad14ecee4d868a54556e40cdc3df7fe78e3ab9d0 Mon Sep 17 00:00:00 2001 From: Alexandre Courbot Date: Sun, 24 Nov 2013 15:30:50 +0900 Subject: ARM: tegra: split setting of CPU reset handler Not all Tegra devices can set the CPU reset handler in the same way. In particular, devices using a TrustZone secure monitor cannot set it up directly and need to ask the firmware to do it. This patch separates the act of setting the reset handler from its preparation, so the former can be implemented in a different way. Signed-off-by: Alexandre Courbot Reviewed-by: Tomasz Figa Reviewed-by: Stephen Warren Signed-off-by: Stephen Warren --- arch/arm/mach-tegra/reset.c | 27 +++++++++++++++++---------- 1 file changed, 17 insertions(+), 10 deletions(-) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/reset.c b/arch/arm/mach-tegra/reset.c index 568f5bbf979..17c4b6d6b49 100644 --- a/arch/arm/mach-tegra/reset.c +++ b/arch/arm/mach-tegra/reset.c @@ -33,26 +33,18 @@ static bool is_enabled; -static void __init tegra_cpu_reset_handler_enable(void) +static void __init tegra_cpu_reset_handler_set(const u32 reset_address) { - void __iomem *iram_base = IO_ADDRESS(TEGRA_IRAM_RESET_BASE); void __iomem *evp_cpu_reset = IO_ADDRESS(TEGRA_EXCEPTION_VECTORS_BASE + 0x100); void __iomem *sb_ctrl = IO_ADDRESS(TEGRA_SB_BASE); u32 reg; - BUG_ON(is_enabled); - BUG_ON(tegra_cpu_reset_handler_size > TEGRA_IRAM_RESET_HANDLER_SIZE); - - memcpy(iram_base, (void *)__tegra_cpu_reset_handler_start, - tegra_cpu_reset_handler_size); - /* * NOTE: This must be the one and only write to the EVP CPU reset * vector in the entire system. */ - writel(TEGRA_IRAM_RESET_BASE + tegra_cpu_reset_handler_offset, - evp_cpu_reset); + writel(reset_address, evp_cpu_reset); wmb(); reg = readl(evp_cpu_reset); @@ -66,6 +58,21 @@ static void __init tegra_cpu_reset_handler_enable(void) writel(reg, sb_ctrl); wmb(); } +} + +static void __init tegra_cpu_reset_handler_enable(void) +{ + void __iomem *iram_base = IO_ADDRESS(TEGRA_IRAM_RESET_BASE); + const u32 reset_address = TEGRA_IRAM_RESET_BASE + + tegra_cpu_reset_handler_offset; + + BUG_ON(is_enabled); + BUG_ON(tegra_cpu_reset_handler_size > TEGRA_IRAM_RESET_HANDLER_SIZE); + + memcpy(iram_base, (void *)__tegra_cpu_reset_handler_start, + tegra_cpu_reset_handler_size); + + tegra_cpu_reset_handler_set(reset_address); is_enabled = true; } -- cgit v1.2.3-70-g09d2 From 265c89c994611e75943563e9b741cb8ae04a43af Mon Sep 17 00:00:00 2001 From: Alexandre Courbot Date: Sun, 24 Nov 2013 15:30:51 +0900 Subject: ARM: tegra: set CPU reset handler using firmware Use a firmware operation to set the CPU reset handler and only resort to doing it ourselves if there is none defined. This supports the booting of secondary CPUs on devices using a TrustZone secure monitor. Signed-off-by: Alexandre Courbot Reviewed-by: Tomasz Figa Reviewed-by: Stephen Warren Signed-off-by: Stephen Warren --- arch/arm/mach-tegra/reset.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/reset.c b/arch/arm/mach-tegra/reset.c index 17c4b6d6b49..146fe8e0ae7 100644 --- a/arch/arm/mach-tegra/reset.c +++ b/arch/arm/mach-tegra/reset.c @@ -21,6 +21,7 @@ #include #include +#include #include "iomap.h" #include "irammap.h" @@ -65,6 +66,7 @@ static void __init tegra_cpu_reset_handler_enable(void) void __iomem *iram_base = IO_ADDRESS(TEGRA_IRAM_RESET_BASE); const u32 reset_address = TEGRA_IRAM_RESET_BASE + tegra_cpu_reset_handler_offset; + int err; BUG_ON(is_enabled); BUG_ON(tegra_cpu_reset_handler_size > TEGRA_IRAM_RESET_HANDLER_SIZE); @@ -72,9 +74,18 @@ static void __init tegra_cpu_reset_handler_enable(void) memcpy(iram_base, (void *)__tegra_cpu_reset_handler_start, tegra_cpu_reset_handler_size); - tegra_cpu_reset_handler_set(reset_address); - - is_enabled = true; + err = call_firmware_op(set_cpu_boot_addr, 0, reset_address); + switch (err) { + case -ENOSYS: + tegra_cpu_reset_handler_set(reset_address); + /* pass-through */ + case 0: + is_enabled = true; + break; + default: + pr_crit("Cannot set CPU reset handler: %d\n", err); + BUG(); + } } void __init tegra_cpu_reset_handler_init(void) -- cgit v1.2.3-70-g09d2