From 2c20b9f19add2248dc867f1f78dcef1eb0944543 Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Wed, 10 Nov 2010 21:27:55 +0100 Subject: ARM: mx25: dynamically allocate mxc-ehci devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit According to the reference manual of the i.MX25 the host controller uses an offset of 0x200 not 0x400 as was specified in the resources for mxc_usbh2. Needs-Testing: yes Signed-off-by: Uwe Kleine-König --- arch/arm/plat-mxc/include/mach/mx25.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'arch/arm/plat-mxc/include/mach') diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h index a2404b0d980..0d31f828d21 100644 --- a/arch/arm/plat-mxc/include/mach/mx25.h +++ b/arch/arm/plat-mxc/include/mach/mx25.h @@ -43,7 +43,9 @@ #define MX25_LCDC_BASE_ADDR 0x53fbc000 #define MX25_KPP_BASE_ADDR 0x43fa8000 #define MX25_SDMA_BASE_ADDR 0x53fd4000 -#define MX25_OTG_BASE_ADDR 0x53ff4000 +#define MX25_USB_BASE_ADDR 0x53ff4000 +#define MX25_USB_OTG_BASE_ADDR (MX25_USB_BASE_ADDR + 0x0000) +#define MX25_USB_HS_BASE_ADDR (MX25_USB_BASE_ADDR + 0x0200) #define MX25_CSI_BASE_ADDR 0x53ff8000 #define MX25_IO_P2V(x) IMX_IO_P2V(x) @@ -67,6 +69,8 @@ #define MX25_INT_UART2 32 #define MX25_INT_NFC 33 #define MX25_INT_SDMA 34 +#define MX25_INT_USB_HS 35 +#define MX25_INT_USB_OTG 37 #define MX25_INT_LCDC 39 #define MX25_INT_UART5 40 #define MX25_INT_CAN1 43 -- cgit v1.2.3-70-g09d2