From b0b6ff0b21057bb8e58b0be8b427a4713fd4b5a5 Mon Sep 17 00:00:00 2001 From: KyongHo Cho Date: Mon, 7 Mar 2011 09:10:24 +0900 Subject: ARM: EXYNOS4: Implement Clock gating for System MMU This patch includes the implementation of the clock gating for System MMU. Initially, all System MMUs are not asserted the system clock. Asserting the system clock to a System MMU is enabled only when s5p_sysmmu_enable() is called. Likewise, it is disabled only when s5p_sysmmu_disable() is called. Therefore, clock gating on System MMUs are still invisible to the outside of the System MMU driver. Signed-off-by: KyongHo Cho Signed-off-by: Kukjin Kim --- arch/arm/plat-s5p/sysmmu.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/arm/plat-s5p') diff --git a/arch/arm/plat-s5p/sysmmu.c b/arch/arm/plat-s5p/sysmmu.c index 89e024f377b..54f5eddc921 100644 --- a/arch/arm/plat-s5p/sysmmu.c +++ b/arch/arm/plat-s5p/sysmmu.c @@ -174,6 +174,8 @@ void s5p_sysmmu_set_tablebase_pgd(sysmmu_ips ips, unsigned long pgd) void s5p_sysmmu_enable(sysmmu_ips ips, unsigned long pgd) { if (!is_sysmmu_active(ips)) { + sysmmu_clk_enable(ips); + __sysmmu_set_ptbase(ips, pgd); __raw_writel(CTRL_ENABLE, sysmmusfrs[ips] + S5P_MMU_CTRL); @@ -190,6 +192,7 @@ void s5p_sysmmu_disable(sysmmu_ips ips) if (is_sysmmu_active(ips)) { __raw_writel(CTRL_DISABLE, sysmmusfrs[ips] + S5P_MMU_CTRL); set_sysmmu_inactive(ips); + sysmmu_clk_disable(ips); dev_dbg(dev, "%s is disabled.\n", sysmmu_ips_name[ips]); } else { dev_dbg(dev, "%s is already disabled.\n", sysmmu_ips_name[ips]); @@ -218,6 +221,9 @@ static int s5p_sysmmu_probe(struct platform_device *pdev) for (i = 0; i < S5P_SYSMMU_TOTAL_IPNUM; i++) { int irq; + sysmmu_clk_init(dev, i); + sysmmu_clk_disable(i); + res = platform_get_resource(pdev, IORESOURCE_MEM, i); if (!res) { dev_err(dev, "Failed to get the resource of %s.\n", -- cgit v1.2.3-70-g09d2