From ec15038f2becd710eef7485baff7830abb1c9330 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sat, 22 Jan 2011 17:22:34 +0000 Subject: ARM: realview,vexpress: fix section mismatch warning for pen_release Fix two section mismatch warnings in the platform SMP bringup code for Realview and Versatile Express: WARNING: arch/arm/mach-realview/built-in.o(.text+0x8ac): Section mismatch in reference from the function write_pen_release() to the variable .cpuinit.data:pen_release The function write_pen_release() references the variable __cpuinitdata pen_release. This is often because write_pen_release lacks a __cpuinitdata annotation or the annotation of pen_release is wrong. WARNING: arch/arm/mach-vexpress/built-in.o(.text+0x7b4): Section mismatch in reference from the function write_pen_release() to the variable .cpuinit.data:pen_release The function write_pen_release() references the variable __cpuinitdata pen_release. This is often because write_pen_release lacks a __cpuinitdata annotation or the annotation of pen_release is wrong. Signed-off-by: Russell King --- arch/arm/mach-realview/platsmp.c | 2 +- arch/arm/mach-vexpress/platsmp.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c index a22bf67f2f7..6959d13d908 100644 --- a/arch/arm/mach-realview/platsmp.c +++ b/arch/arm/mach-realview/platsmp.c @@ -41,7 +41,7 @@ volatile int __cpuinitdata pen_release = -1; * observers, irrespective of whether they're taking part in coherency * or not. This is necessary for the hotplug code to work reliably. */ -static void write_pen_release(int val) +static void __cpuinit write_pen_release(int val) { pen_release = val; smp_wmb(); diff --git a/arch/arm/mach-vexpress/platsmp.c b/arch/arm/mach-vexpress/platsmp.c index b1687b6abe6..634bf1d3a31 100644 --- a/arch/arm/mach-vexpress/platsmp.c +++ b/arch/arm/mach-vexpress/platsmp.c @@ -39,7 +39,7 @@ volatile int __cpuinitdata pen_release = -1; * observers, irrespective of whether they're taking part in coherency * or not. This is necessary for the hotplug code to work reliably. */ -static void write_pen_release(int val) +static void __cpuinit write_pen_release(int val) { pen_release = val; smp_wmb(); -- cgit v1.2.3-70-g09d2 From d2a1c9ad785897850db0d46f4ba02364d89386b5 Mon Sep 17 00:00:00 2001 From: Russell King Date: Mon, 24 Jan 2011 10:58:24 +0000 Subject: ARM: realview: name configuration options after actual board names As no one seems to really know which configuration options tie up with which boards, I thought I'd do some investigation and try to work it out. After discussion with some folk in linaro, I think I have this nailed. The names are updated to use the name on the front of the appropriate board user guide for the various baseboards, which I've taken to be the official name for each board. I haven't significantly updated the descriptions for the tiles as that is even less clear - as far as I can see on ARMs website, there is no Cortex-A9 tile for Realview EB - only ARM11MPCore, ARM1156T2F-S, ARM1176TZF-S and Cortex-R4F. So exactly what this 'Multicore Cortex-A9 Tile' is... Acked-by: Catalin Marinas Signed-off-by: Russell King --- arch/arm/mach-realview/Kconfig | 49 +++++++++++++++++++++++------------------- 1 file changed, 27 insertions(+), 22 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig index b4575ae9648..7ca138a943a 100644 --- a/arch/arm/mach-realview/Kconfig +++ b/arch/arm/mach-realview/Kconfig @@ -2,52 +2,56 @@ menu "RealView platform type" depends on ARCH_REALVIEW config MACH_REALVIEW_EB - bool "Support RealView/EB platform" + bool "Support RealView(R) Emulation Baseboard" select ARM_GIC help - Include support for the ARM(R) RealView Emulation Baseboard platform. + Include support for the ARM(R) RealView(R) Emulation Baseboard + platform. config REALVIEW_EB_A9MP - bool "Support Multicore Cortex-A9" + bool "Support Multicore Cortex-A9 Tile" depends on MACH_REALVIEW_EB select CPU_V7 help - Enable support for the Cortex-A9MPCore tile on the Realview platform. + Enable support for the Cortex-A9MPCore tile fitted to the + Realview(R) Emulation Baseboard platform. config REALVIEW_EB_ARM11MP - bool "Support ARM11MPCore tile" + bool "Support ARM11MPCore Tile" depends on MACH_REALVIEW_EB select CPU_V6 select ARCH_HAS_BARRIERS if SMP help - Enable support for the ARM11MPCore tile on the Realview platform. + Enable support for the ARM11MPCore tile fitted to the Realview(R) + Emulation Baseboard platform. config REALVIEW_EB_ARM11MP_REVB - bool "Support ARM11MPCore RevB tile" + bool "Support ARM11MPCore RevB Tile" depends on REALVIEW_EB_ARM11MP help - Enable support for the ARM11MPCore RevB tile on the Realview - platform. Since there are device address differences, a - kernel built with this option enabled is not compatible with - other revisions of the ARM11MPCore tile. + Enable support for the ARM11MPCore Revision B tile on the + Realview(R) Emulation Baseboard platform. Since there are device + address differences, a kernel built with this option enabled is + not compatible with other revisions of the ARM11MPCore tile. config MACH_REALVIEW_PB11MP - bool "Support RealView/PB11MPCore platform" + bool "Support RealView(R) Platform Baseboard for ARM11MPCore" select CPU_V6 select ARM_GIC select HAVE_PATA_PLATFORM select ARCH_HAS_BARRIERS if SMP help - Include support for the ARM(R) RealView MPCore Platform Baseboard. - PB11MPCore is a platform with an on-board ARM11MPCore and has + Include support for the ARM(R) RealView(R) Platform Baseboard for + the ARM11MPCore. This platform has an on-board ARM11MPCore and has support for PCI-E and Compact Flash. config MACH_REALVIEW_PB1176 - bool "Support RealView/PB1176 platform" + bool "Support RealView(R) Platform Baseboard for ARM1176JZF-S" select CPU_V6 select ARM_GIC help - Include support for the ARM(R) RealView ARM1176 Platform Baseboard. + Include support for the ARM(R) RealView(R) Platform Baseboard for + ARM1176JZF-S. config REALVIEW_PB1176_SECURE_FLASH bool "Allow access to the secure flash memory block" @@ -59,23 +63,24 @@ config REALVIEW_PB1176_SECURE_FLASH block (64MB @ 0x3c000000) is required. config MACH_REALVIEW_PBA8 - bool "Support RealView/PB-A8 platform" + bool "Support RealView(R) Platform Baseboard for Cortex(tm)-A8 platform" select CPU_V7 select ARM_GIC select HAVE_PATA_PLATFORM help - Include support for the ARM(R) RealView Cortex-A8 Platform Baseboard. - PB-A8 is a platform with an on-board Cortex-A8 and has support for - PCI-E and Compact Flash. + Include support for the ARM(R) RealView Platform Baseboard for + Cortex(tm)-A8. This platform has an on-board Cortex-A8 and has + support for PCI-E and Compact Flash. config MACH_REALVIEW_PBX - bool "Support RealView/PBX platform" + bool "Support RealView(R) Platform Baseboard Explore" select ARM_GIC select HAVE_PATA_PLATFORM select ARCH_SPARSEMEM_ENABLE if CPU_V7 && !REALVIEW_HIGH_PHYS_OFFSET select ZONE_DMA if SPARSEMEM help - Include support for the ARM(R) RealView PBX platform. + Include support for the ARM(R) RealView(R) Platform Baseboard + Explore. config REALVIEW_HIGH_PHYS_OFFSET bool "High physical base address for the RealView platform" -- cgit v1.2.3-70-g09d2 From e5310f611d17ed4e92e0d4e46fd9f6fb40e66df3 Mon Sep 17 00:00:00 2001 From: Russell King Date: Mon, 24 Jan 2011 12:00:01 +0000 Subject: ARM: versatile: name configuration options after actual board names Update the option text to those which appear on the front of the appropriate board user guides. This gives consistent board naming, and makes it obvious which option is for which platform. Acked-by: Catalin Marinas Signed-off-by: Russell King --- arch/arm/mach-versatile/Kconfig | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-versatile/Kconfig b/arch/arm/mach-versatile/Kconfig index 3f7b5e9d83c..9cdec5aa04a 100644 --- a/arch/arm/mach-versatile/Kconfig +++ b/arch/arm/mach-versatile/Kconfig @@ -2,17 +2,19 @@ menu "Versatile platform type" depends on ARCH_VERSATILE config ARCH_VERSATILE_PB - bool "Support Versatile/PB platform" + bool "Support Versatile Platform Baseboard for ARM926EJ-S" select CPU_ARM926T select MIGHT_HAVE_PCI default y help - Include support for the ARM(R) Versatile/PB platform. + Include support for the ARM(R) Versatile Platform Baseboard + for the ARM926EJ-S. config MACH_VERSATILE_AB - bool "Support Versatile/AB platform" + bool "Support Versatile Application Baseboard for ARM926EJ-S" select CPU_ARM926T help - Include support for the ARM(R) Versatile/AP platform. + Include support for the ARM(R) Versatile Application Baseboard + for the ARM926EJ-S. endmenu -- cgit v1.2.3-70-g09d2 From baaece224570a935210a59257b5d9073e99843ea Mon Sep 17 00:00:00 2001 From: Pawel Moll Date: Tue, 25 Jan 2011 15:53:03 +0100 Subject: ARM: 6635/2: Configure reference clock for Versatile Express timers Timers on Versatile Express mainboard are used as system clock/event sources. Driver assumes that they are clocked with 1MHz signal. Old V2M firmware apparently configured it by default, but on newer boards one can observe that "sleep 1" command takes over 30 seconds to finish, as the timers are fed with 32kHz instead... This patch performs required magic and also removes code clearing timer's control registers, as exactly the same operations are performed by the timer driver few jiffies later. Signed-off-by: Pawel Moll Tested-by: Will Deacon Signed-off-by: Russell King --- arch/arm/include/asm/hardware/sp810.h | 6 ++++++ arch/arm/mach-vexpress/v2m.c | 9 +++++++++ 2 files changed, 15 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/include/asm/hardware/sp810.h b/arch/arm/include/asm/hardware/sp810.h index a101f10bb5b..721847dc68a 100644 --- a/arch/arm/include/asm/hardware/sp810.h +++ b/arch/arm/include/asm/hardware/sp810.h @@ -50,6 +50,12 @@ #define SCPCELLID2 0xFF8 #define SCPCELLID3 0xFFC +#define SCCTRL_TIMEREN0SEL_REFCLK (0 << 15) +#define SCCTRL_TIMEREN0SEL_TIMCLK (1 << 15) + +#define SCCTRL_TIMEREN1SEL_REFCLK (0 << 17) +#define SCCTRL_TIMEREN1SEL_TIMCLK (1 << 17) + static inline void sysctl_soft_reset(void __iomem *base) { /* writing any value to SCSYSSTAT reg will reset system */ diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c index a9ed3428a2f..1edae65a0e7 100644 --- a/arch/arm/mach-vexpress/v2m.c +++ b/arch/arm/mach-vexpress/v2m.c @@ -19,6 +19,7 @@ #include #include #include +#include #include @@ -50,8 +51,16 @@ void __init v2m_map_io(struct map_desc *tile, size_t num) static void __init v2m_timer_init(void) { + u32 scctrl; + versatile_sched_clock_init(MMIO_P2V(V2M_SYS_24MHZ), 24000000); + /* Select 1MHz TIMCLK as the reference clock for SP804 timers */ + scctrl = readl(MMIO_P2V(V2M_SYSCTL + SCCTRL)); + scctrl |= SCCTRL_TIMEREN0SEL_TIMCLK; + scctrl |= SCCTRL_TIMEREN1SEL_TIMCLK; + writel(scctrl, MMIO_P2V(V2M_SYSCTL + SCCTRL)); + writel(0, MMIO_P2V(V2M_TIMER0) + TIMER_CTRL); writel(0, MMIO_P2V(V2M_TIMER1) + TIMER_CTRL); -- cgit v1.2.3-70-g09d2 From 03399c1cb4e2503e92d10c1ce38ac2e69b7d2380 Mon Sep 17 00:00:00 2001 From: Russell King Date: Tue, 25 Jan 2011 10:35:36 +0000 Subject: ARM: twd: ensure timer reload is reprogrammed on entry to periodic mode Ensure that the twd timer reload value is reprogrammed each time we enter periodic mode. This ensures that the reload value is always reset correctly. Tested-by: Santosh Shilimkar Acked-by: Colin Cross Signed-off-by: Russell King --- arch/arm/kernel/smp_twd.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c index fd9156698ab..60636f499cb 100644 --- a/arch/arm/kernel/smp_twd.c +++ b/arch/arm/kernel/smp_twd.c @@ -36,6 +36,7 @@ static void twd_set_mode(enum clock_event_mode mode, /* timer load already set up */ ctrl = TWD_TIMER_CONTROL_ENABLE | TWD_TIMER_CONTROL_IT_ENABLE | TWD_TIMER_CONTROL_PERIODIC; + __raw_writel(twd_timer_rate / HZ, twd_base + TWD_TIMER_LOAD); break; case CLOCK_EVT_MODE_ONESHOT: /* period set, and timer enabled in 'next_event' hook */ @@ -81,7 +82,7 @@ int twd_timer_ack(void) static void __cpuinit twd_calibrate_rate(void) { - unsigned long load, count; + unsigned long count; u64 waitjiffies; /* @@ -116,10 +117,6 @@ static void __cpuinit twd_calibrate_rate(void) printk("%lu.%02luMHz.\n", twd_timer_rate / 1000000, (twd_timer_rate / 1000000) % 100); } - - load = twd_timer_rate / HZ; - - __raw_writel(load, twd_base + TWD_TIMER_LOAD); } /* -- cgit v1.2.3-70-g09d2 From 05b112ff98070dc1f3293e8cd8e4c6f468d1084a Mon Sep 17 00:00:00 2001 From: Catalin Marinas Date: Tue, 25 Jan 2011 11:18:25 +0100 Subject: ARM: 6637/1: Make the argument to virt_to_phys() "const volatile" Changing the virt_to_phys() argument to "const volatile void *" avoids compiler warnings in some situations where this function is used. Signed-off-by: Catalin Marinas Acked-by: Stephen Boyd Acked-by: Arnd Bergmann Signed-off-by: Russell King --- arch/arm/include/asm/memory.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h index 23c2e8e5c0f..d0ee74b7cf8 100644 --- a/arch/arm/include/asm/memory.h +++ b/arch/arm/include/asm/memory.h @@ -188,7 +188,7 @@ * translation for translating DMA addresses. Use the driver * DMA support - see dma-mapping.h. */ -static inline unsigned long virt_to_phys(void *x) +static inline unsigned long virt_to_phys(const volatile void *x) { return __virt_to_phys((unsigned long)(x)); } -- cgit v1.2.3-70-g09d2 From fd015480c29deb52ae3bfaf41e888c450765edd8 Mon Sep 17 00:00:00 2001 From: Hartley Sweeten Date: Tue, 25 Jan 2011 01:05:35 +0100 Subject: ARM: 6636/1: ep93xx: default multiplexed gpio ports to gpio mode MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The EP93xx C and D GPIO ports are multiplexed with the Keypad Interface peripheral.  At power-up they default into non-GPIO mode with the Key Matrix controller enabled so these ports are unusable for GPIO.  Note that the Keypad Interface peripheral is only available in the EP9307, EP9312, and EP9315 processor variants. The keypad support will clear the DeviceConfig bits appropriately to enable the Keypad Interface when the driver is loaded.  And, when the driver is unloaded it will set the bits to return the ports to GPIO mode. To make these ports available for GPIO after power-up on all EP93xx processor variants, set the KEYS and GONK bits in the DeviceConfig register. Similarly, the E, G, and H ports are multiplexed with the IDE Interface peripheral.  At power-up these also default into non-GPIO mode.  Note that the IDE peripheral is only available in the EP9312 and EP9315 processor variants. Since an IDE driver is not even available in mainline, set the EONIDE, GONIDE, and HONIDE bits in the DeviceConfig register so that these ports will be available for GPIO use after power-up. Signed-off-by: H Hartley Sweeten Acked-by: Ryan Mallon Signed-off-by: Russell King --- arch/arm/mach-ep93xx/gpio.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-ep93xx/gpio.c b/arch/arm/mach-ep93xx/gpio.c index f3dc76fdcea..bec34b83495 100644 --- a/arch/arm/mach-ep93xx/gpio.c +++ b/arch/arm/mach-ep93xx/gpio.c @@ -427,6 +427,13 @@ void __init ep93xx_gpio_init(void) { int i; + /* Set Ports C, D, E, G, and H for GPIO use */ + ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS | + EP93XX_SYSCON_DEVCFG_GONK | + EP93XX_SYSCON_DEVCFG_EONIDE | + EP93XX_SYSCON_DEVCFG_GONIDE | + EP93XX_SYSCON_DEVCFG_HONIDE); + for (i = 0; i < ARRAY_SIZE(ep93xx_gpio_banks); i++) gpiochip_add(&ep93xx_gpio_banks[i].chip); } -- cgit v1.2.3-70-g09d2