From b07fed455c883f07f8e847f5b0d79975b4dc8e7a Mon Sep 17 00:00:00 2001 From: Dong Aisheng Date: Tue, 22 Nov 2011 23:54:25 +0800 Subject: ARM: mx28evk: set a initial clock rate for saif MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Dong Aisheng Acked-by: Marek Vasut Cc: Sascha Hauer Cc: Wolfram Sang Cc: Uwe Kleine-König Cc: Mark Brown Cc: Liam Girdwood Signed-off-by: Shawn Guo --- arch/arm/mach-mxs/clock-mx28.c | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-mxs/clock-mx28.c b/arch/arm/mach-mxs/clock-mx28.c index 60c189a441b..df0ad3ce234 100644 --- a/arch/arm/mach-mxs/clock-mx28.c +++ b/arch/arm/mach-mxs/clock-mx28.c @@ -814,6 +814,15 @@ int __init mx28_clocks_init(void) clk_set_parent(&saif0_clk, &pll0_clk); clk_set_parent(&saif1_clk, &pll0_clk); + /* + * Set an initial clock rate for the saif internal logic to work + * properly. This is important when working in EXTMASTER mode that + * uses the other saif's BITCLK&LRCLK but it still needs a basic + * clock which should be fast enough for the internal logic. + */ + clk_set_rate(&saif0_clk, 24000000); + clk_set_rate(&saif1_clk, 24000000); + clkdev_add_table(lookups, ARRAY_SIZE(lookups)); mxs_timer_init(&clk32k_clk, MX28_INT_TIMER0); -- cgit v1.2.3-70-g09d2