From 27e5c5a9a240d2a7790bfe31045020a043c5d74a Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 17:32:45 +0100 Subject: m32r: Convert genirq namespace Scripted with coccinelle. Signed-off-by: Thomas Gleixner --- arch/m32r/platforms/mappi2/setup.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) (limited to 'arch/m32r/platforms/mappi2') diff --git a/arch/m32r/platforms/mappi2/setup.c b/arch/m32r/platforms/mappi2/setup.c index 9117c30ea36..f3ed6b60a5f 100644 --- a/arch/m32r/platforms/mappi2/setup.c +++ b/arch/m32r/platforms/mappi2/setup.c @@ -76,38 +76,38 @@ void __init init_IRQ(void) { #if defined(CONFIG_SMC91X) /* INT0 : LAN controller (SMC91111) */ - set_irq_chip_and_handler(M32R_IRQ_INT0, &mappi2_irq_type, + irq_set_chip_and_handler(M32R_IRQ_INT0, &mappi2_irq_type, handle_level_irq); icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; disable_mappi2_irq(M32R_IRQ_INT0); #endif /* CONFIG_SMC91X */ /* MFT2 : system timer */ - set_irq_chip_and_handler(M32R_IRQ_MFT2, &mappi2_irq_type, + irq_set_chip_and_handler(M32R_IRQ_MFT2, &mappi2_irq_type, handle_level_irq); icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; disable_mappi2_irq(M32R_IRQ_MFT2); #ifdef CONFIG_SERIAL_M32R_SIO /* SIO0_R : uart receive data */ - set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &mappi2_irq_type, + irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &mappi2_irq_type, handle_level_irq); icu_data[M32R_IRQ_SIO0_R].icucr = 0; disable_mappi2_irq(M32R_IRQ_SIO0_R); /* SIO0_S : uart send data */ - set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &mappi2_irq_type, + irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &mappi2_irq_type, handle_level_irq); icu_data[M32R_IRQ_SIO0_S].icucr = 0; disable_mappi2_irq(M32R_IRQ_SIO0_S); /* SIO1_R : uart receive data */ - set_irq_chip_and_handler(M32R_IRQ_SIO1_R, &mappi2_irq_type, + irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &mappi2_irq_type, handle_level_irq); icu_data[M32R_IRQ_SIO1_R].icucr = 0; disable_mappi2_irq(M32R_IRQ_SIO1_R); /* SIO1_S : uart send data */ - set_irq_chip_and_handler(M32R_IRQ_SIO1_S, &mappi2_irq_type, + irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &mappi2_irq_type, handle_level_irq); icu_data[M32R_IRQ_SIO1_S].icucr = 0; disable_mappi2_irq(M32R_IRQ_SIO1_S); @@ -115,27 +115,27 @@ void __init init_IRQ(void) #if defined(CONFIG_USB) /* INT1 : USB Host controller interrupt */ - set_irq_chip_and_handler(M32R_IRQ_INT1, &mappi2_irq_type, + irq_set_chip_and_handler(M32R_IRQ_INT1, &mappi2_irq_type, handle_level_irq); icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01; disable_mappi2_irq(M32R_IRQ_INT1); #endif /* CONFIG_USB */ /* ICUCR40: CFC IREQ */ - set_irq_chip_and_handler(PLD_IRQ_CFIREQ, &mappi2_irq_type, + irq_set_chip_and_handler(PLD_IRQ_CFIREQ, &mappi2_irq_type, handle_level_irq); icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01; disable_mappi2_irq(PLD_IRQ_CFIREQ); #if defined(CONFIG_M32R_CFC) /* ICUCR41: CFC Insert */ - set_irq_chip_and_handler(PLD_IRQ_CFC_INSERT, &mappi2_irq_type, + irq_set_chip_and_handler(PLD_IRQ_CFC_INSERT, &mappi2_irq_type, handle_level_irq); icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00; disable_mappi2_irq(PLD_IRQ_CFC_INSERT); /* ICUCR42: CFC Eject */ - set_irq_chip_and_handler(PLD_IRQ_CFC_EJECT, &mappi2_irq_type, + irq_set_chip_and_handler(PLD_IRQ_CFC_EJECT, &mappi2_irq_type, handle_level_irq); icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; disable_mappi2_irq(PLD_IRQ_CFC_EJECT); -- cgit v1.2.3-70-g09d2