From 25985edcedea6396277003854657b5f3cb31a628 Mon Sep 17 00:00:00 2001 From: Lucas De Marchi Date: Wed, 30 Mar 2011 22:57:33 -0300 Subject: Fix common misspellings Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi --- arch/m68k/platform/523x/config.c | 2 +- arch/m68k/platform/5272/intc.c | 2 +- arch/m68k/platform/527x/config.c | 2 +- arch/m68k/platform/528x/config.c | 2 +- arch/m68k/platform/coldfire/cache.c | 2 +- arch/m68k/platform/coldfire/entry.S | 2 +- arch/m68k/platform/coldfire/head.S | 2 +- arch/m68k/platform/coldfire/intc.c | 2 +- arch/m68k/platform/coldfire/sltimers.c | 2 +- 9 files changed, 9 insertions(+), 9 deletions(-) (limited to 'arch/m68k/platform') diff --git a/arch/m68k/platform/523x/config.c b/arch/m68k/platform/523x/config.c index 418a76feb1e..71f4436ec80 100644 --- a/arch/m68k/platform/523x/config.c +++ b/arch/m68k/platform/523x/config.c @@ -3,7 +3,7 @@ /* * linux/arch/m68knommu/platform/523x/config.c * - * Sub-architcture dependant initialization code for the Freescale + * Sub-architcture dependent initialization code for the Freescale * 523x CPUs. * * Copyright (C) 1999-2005, Greg Ungerer (gerg@snapgear.com) diff --git a/arch/m68k/platform/5272/intc.c b/arch/m68k/platform/5272/intc.c index 43e6e96f087..7e715dfe281 100644 --- a/arch/m68k/platform/5272/intc.c +++ b/arch/m68k/platform/5272/intc.c @@ -33,7 +33,7 @@ * * Note that the external interrupts are edge triggered (unlike the * internal interrupt sources which are level triggered). Which means - * they also need acknowledgeing via acknowledge bits. + * they also need acknowledging via acknowledge bits. */ struct irqmap { unsigned char icr; diff --git a/arch/m68k/platform/527x/config.c b/arch/m68k/platform/527x/config.c index fa359593b61..3ebc769cefd 100644 --- a/arch/m68k/platform/527x/config.c +++ b/arch/m68k/platform/527x/config.c @@ -3,7 +3,7 @@ /* * linux/arch/m68knommu/platform/527x/config.c * - * Sub-architcture dependant initialization code for the Freescale + * Sub-architcture dependent initialization code for the Freescale * 5270/5271 CPUs. * * Copyright (C) 1999-2004, Greg Ungerer (gerg@snapgear.com) diff --git a/arch/m68k/platform/528x/config.c b/arch/m68k/platform/528x/config.c index ac39fc66121..7abe77a2f3e 100644 --- a/arch/m68k/platform/528x/config.c +++ b/arch/m68k/platform/528x/config.c @@ -3,7 +3,7 @@ /* * linux/arch/m68knommu/platform/528x/config.c * - * Sub-architcture dependant initialization code for the Freescale + * Sub-architcture dependent initialization code for the Freescale * 5280, 5281 and 5282 CPUs. * * Copyright (C) 1999-2003, Greg Ungerer (gerg@snapgear.com) diff --git a/arch/m68k/platform/coldfire/cache.c b/arch/m68k/platform/coldfire/cache.c index 235d3c4f4f0..71beeaf0c5c 100644 --- a/arch/m68k/platform/coldfire/cache.c +++ b/arch/m68k/platform/coldfire/cache.c @@ -1,7 +1,7 @@ /***************************************************************************/ /* - * cache.c -- general ColdFire Cache maintainence code + * cache.c -- general ColdFire Cache maintenance code * * Copyright (C) 2010, Greg Ungerer (gerg@snapgear.com) */ diff --git a/arch/m68k/platform/coldfire/entry.S b/arch/m68k/platform/coldfire/entry.S index 5837cf080b6..eab63f09965 100644 --- a/arch/m68k/platform/coldfire/entry.S +++ b/arch/m68k/platform/coldfire/entry.S @@ -163,7 +163,7 @@ Lsignal_return: /* * This is the generic interrupt handler (for all hardware interrupt - * sources). Calls upto high level code to do all the work. + * sources). Calls up to high level code to do all the work. */ ENTRY(inthandler) SAVE_ALL diff --git a/arch/m68k/platform/coldfire/head.S b/arch/m68k/platform/coldfire/head.S index 129bff4956b..6ae91a49918 100644 --- a/arch/m68k/platform/coldfire/head.S +++ b/arch/m68k/platform/coldfire/head.S @@ -20,7 +20,7 @@ /* * If we don't have a fixed memory size, then lets build in code - * to auto detect the DRAM size. Obviously this is the prefered + * to auto detect the DRAM size. Obviously this is the preferred * method, and should work for most boards. It won't work for those * that do not have their RAM starting at address 0, and it only * works on SDRAM (not boards fitted with SRAM). diff --git a/arch/m68k/platform/coldfire/intc.c b/arch/m68k/platform/coldfire/intc.c index c28a6ed6cb2..0bbb414856e 100644 --- a/arch/m68k/platform/coldfire/intc.c +++ b/arch/m68k/platform/coldfire/intc.c @@ -37,7 +37,7 @@ unsigned char mcf_irq2imr[NR_IRQS]; /* * In the early version 2 core ColdFire parts the IMR register was 16 bits * in size. Version 3 (and later version 2) core parts have a 32 bit - * sized IMR register. Provide some size independant methods to access the + * sized IMR register. Provide some size independent methods to access the * IMR register. */ #ifdef MCFSIM_IMR_IS_16BITS diff --git a/arch/m68k/platform/coldfire/sltimers.c b/arch/m68k/platform/coldfire/sltimers.c index 0a1b937c3e1..6a85daf9a7f 100644 --- a/arch/m68k/platform/coldfire/sltimers.c +++ b/arch/m68k/platform/coldfire/sltimers.c @@ -106,7 +106,7 @@ static cycle_t mcfslt_read_clk(struct clocksource *cs) cycles = mcfslt_cnt; local_irq_restore(flags); - /* substract because slice timers count down */ + /* subtract because slice timers count down */ return cycles - scnt; } -- cgit v1.2.3-70-g09d2