From 455a503f4cd4971b26e431904d98fdf5beea1075 Mon Sep 17 00:00:00 2001 From: Maxime Bizon Date: Fri, 4 Nov 2011 19:09:26 +0100 Subject: MIPS: BCM63XX: Hook up plat_ioremap to intercept soc registers remapping. Internal SOC registers can be directly accessed, no need to waste a TLB entry. Signed-off-by: Maxime Bizon Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2890/ Signed-off-by: Ralf Baechle --- arch/mips/include/asm/mach-bcm63xx/ioremap.h | 38 ++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) create mode 100644 arch/mips/include/asm/mach-bcm63xx/ioremap.h (limited to 'arch/mips/include/asm/mach-bcm63xx/ioremap.h') diff --git a/arch/mips/include/asm/mach-bcm63xx/ioremap.h b/arch/mips/include/asm/mach-bcm63xx/ioremap.h new file mode 100644 index 00000000000..e3fe04dc50b --- /dev/null +++ b/arch/mips/include/asm/mach-bcm63xx/ioremap.h @@ -0,0 +1,38 @@ +#ifndef BCM63XX_IOREMAP_H_ +#define BCM63XX_IOREMAP_H_ + +#include + +static inline phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size) +{ + return phys_addr; +} + +static inline int is_bcm63xx_internal_registers(phys_t offset) +{ + switch (bcm63xx_get_cpu_id()) { + case BCM6338_CPU_ID: + case BCM6345_CPU_ID: + case BCM6348_CPU_ID: + case BCM6358_CPU_ID: + if (offset >= 0xfff00000) + return 1; + break; + } + return 0; +} + +static inline void __iomem *plat_ioremap(phys_t offset, unsigned long size, + unsigned long flags) +{ + if (is_bcm63xx_internal_registers(offset)) + return (void __iomem *)offset; + return NULL; +} + +static inline int plat_iounmap(const volatile void __iomem *addr) +{ + return is_bcm63xx_internal_registers((unsigned long)addr); +} + +#endif /* BCM63XX_IOREMAP_H_ */ -- cgit v1.2.3-70-g09d2