From ce59d0f7fec6fa4e7a6c484308e25bad8a6caa39 Mon Sep 17 00:00:00 2001 From: Jayachandran C Date: Sat, 21 Dec 2013 16:52:14 +0530 Subject: MIPS: Netlogic: Add topology.h for XLP family Add mach-netlogic/topology.h which contains XLP cpu number to core and node mapping. Signed-off-by: Jayachandran C Signed-off-by: John Crispin Patchwork: http://patchwork.linux-mips.org/patch/6271/ --- arch/mips/include/asm/mach-netlogic/multi-node.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) (limited to 'arch/mips/include/asm/mach-netlogic/multi-node.h') diff --git a/arch/mips/include/asm/mach-netlogic/multi-node.h b/arch/mips/include/asm/mach-netlogic/multi-node.h index d62fc773f4d..b3d91e0c10d 100644 --- a/arch/mips/include/asm/mach-netlogic/multi-node.h +++ b/arch/mips/include/asm/mach-netlogic/multi-node.h @@ -51,4 +51,23 @@ #define NLM_THREADS_PER_CORE 4 #define NLM_CPUS_PER_NODE (NLM_CORES_PER_NODE * NLM_THREADS_PER_CORE) +struct nlm_soc_info { + unsigned long coremask; /* cores enabled on the soc */ + unsigned long ebase; /* not used now */ + uint64_t irqmask; /* EIMR for the node */ + uint64_t sysbase; /* only for XLP - sys block base */ + uint64_t picbase; /* PIC block base */ + spinlock_t piclock; /* lock for PIC access */ + cpumask_t cpumask; /* logical cpu mask for node */ +}; + +extern struct nlm_soc_info nlm_nodes[NLM_NR_NODES]; +#define nlm_get_node(i) (&nlm_nodes[i]) +#ifdef CONFIG_CPU_XLR +#define nlm_current_node() (&nlm_nodes[0]) +#else +#define nlm_current_node() (&nlm_nodes[nlm_nodeid()]) +#endif +void nlm_node_init(int node); + #endif -- cgit v1.2.3-70-g09d2 From cfec4c63f5034160ab4a4654c05dd6241f51b282 Mon Sep 17 00:00:00 2001 From: Jayachandran C Date: Sat, 21 Dec 2013 16:52:17 +0530 Subject: MIPS: Netlogic: Add macro for node present Add macro nlm_node_present() that can be used to check if a node is present in a multi-chip configuration. This can be used even when NUMA is not enabled. Signed-off-by: Jayachandran C Signed-off-by: John Crispin Patchwork: http://patchwork.linux-mips.org/patch/6272/ --- arch/mips/include/asm/mach-netlogic/multi-node.h | 2 ++ arch/mips/pci/pci-xlp.c | 6 ++---- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/mips/include/asm/mach-netlogic/multi-node.h') diff --git a/arch/mips/include/asm/mach-netlogic/multi-node.h b/arch/mips/include/asm/mach-netlogic/multi-node.h index b3d91e0c10d..beeb36b9f9f 100644 --- a/arch/mips/include/asm/mach-netlogic/multi-node.h +++ b/arch/mips/include/asm/mach-netlogic/multi-node.h @@ -63,6 +63,8 @@ struct nlm_soc_info { extern struct nlm_soc_info nlm_nodes[NLM_NR_NODES]; #define nlm_get_node(i) (&nlm_nodes[i]) +#define nlm_node_present(n) ((n) >= 0 && (n) < NLM_NR_NODES && \ + nlm_get_node(n)->coremask != 0) #ifdef CONFIG_CPU_XLR #define nlm_current_node() (&nlm_nodes[0]) #else diff --git a/arch/mips/pci/pci-xlp.c b/arch/mips/pci/pci-xlp.c index 222d804e77d..da7a37a5598 100644 --- a/arch/mips/pci/pci-xlp.c +++ b/arch/mips/pci/pci-xlp.c @@ -235,7 +235,6 @@ static inline void xlp_config_pci_bswap(int node, int link) {} static int __init pcibios_init(void) { - struct nlm_soc_info *nodep; uint64_t pciebase; int link, n; u32 reg; @@ -249,9 +248,8 @@ static int __init pcibios_init(void) ioport_resource.end = ~0; for (n = 0; n < NLM_NR_NODES; n++) { - nodep = nlm_get_node(n); - if (!nodep->coremask) - continue; /* node does not exist */ + if (!nlm_node_present(n)) + continue; for (link = 0; link < PCIE_NLINKS; link++) { pciebase = nlm_get_pcie_base(n, link); -- cgit v1.2.3-70-g09d2 From 5513c760db4f3a914247b8fff1ba74b9ebb0af8e Mon Sep 17 00:00:00 2001 From: Jayachandran C Date: Sat, 21 Dec 2013 16:52:21 +0530 Subject: MIPS: Netlogic: update iomap.h for XLP9XX Most IO block offsets have changed in XLP9XX. Update iomap.h to add the new addresses of different SoC blocks like PIC, SYS, UART etc. that are needed by the base code. On XLP9xx, the SoC blocks of other nodes are seen on a PCI bus corresponding to the node. Update iomap code to reflect this. Signed-off-by: Jayachandran C Signed-off-by: John Crispin Patchwork: http://patchwork.linux-mips.org/patch/6277/ --- arch/mips/include/asm/mach-netlogic/multi-node.h | 1 + arch/mips/include/asm/netlogic/xlp-hal/iomap.h | 45 ++++++++++++++++++++++-- arch/mips/netlogic/xlp/nlm_hal.c | 4 +++ 3 files changed, 48 insertions(+), 2 deletions(-) (limited to 'arch/mips/include/asm/mach-netlogic/multi-node.h') diff --git a/arch/mips/include/asm/mach-netlogic/multi-node.h b/arch/mips/include/asm/mach-netlogic/multi-node.h index beeb36b9f9f..df9869d13af 100644 --- a/arch/mips/include/asm/mach-netlogic/multi-node.h +++ b/arch/mips/include/asm/mach-netlogic/multi-node.h @@ -59,6 +59,7 @@ struct nlm_soc_info { uint64_t picbase; /* PIC block base */ spinlock_t piclock; /* lock for PIC access */ cpumask_t cpumask; /* logical cpu mask for node */ + unsigned int socbus; }; extern struct nlm_soc_info nlm_nodes[NLM_NR_NODES]; diff --git a/arch/mips/include/asm/netlogic/xlp-hal/iomap.h b/arch/mips/include/asm/netlogic/xlp-hal/iomap.h index 55eee77adac..92fd8669f6d 100644 --- a/arch/mips/include/asm/netlogic/xlp-hal/iomap.h +++ b/arch/mips/include/asm/netlogic/xlp-hal/iomap.h @@ -48,8 +48,10 @@ #define XLP_IO_SIZE (64 << 20) /* ECFG space size */ #define XLP_IO_PCI_HDRSZ 0x100 #define XLP_IO_DEV(node, dev) ((dev) + (node) * 8) -#define XLP_HDR_OFFSET(node, bus, dev, fn) (((bus) << 20) | \ - ((XLP_IO_DEV(node, dev)) << 15) | ((fn) << 12)) +#define XLP_IO_PCI_OFFSET(b, d, f) (((b) << 20) | ((d) << 15) | ((f) << 12)) + +#define XLP_HDR_OFFSET(node, bus, dev, fn) \ + XLP_IO_PCI_OFFSET(bus, XLP_IO_DEV(node, dev), fn) #define XLP_IO_BRIDGE_OFFSET(node) XLP_HDR_OFFSET(node, 0, 0, 0) /* coherent inter chip */ @@ -109,6 +111,36 @@ #define XLP_IO_MMC_OFFSET(node, slot) \ ((XLP_IO_SD_OFFSET(node))+(slot*0x100)+XLP_IO_PCI_HDRSZ) +/* Things have changed drastically in XLP 9XX */ +#define XLP9XX_HDR_OFFSET(n, d, f) \ + XLP_IO_PCI_OFFSET(xlp9xx_get_socbus(n), d, f) + +#define XLP9XX_IO_BRIDGE_OFFSET(node) XLP_IO_PCI_OFFSET(0, 0, node) +#define XLP9XX_IO_PIC_OFFSET(node) XLP9XX_HDR_OFFSET(node, 2, 0) +#define XLP9XX_IO_UART_OFFSET(node) XLP9XX_HDR_OFFSET(node, 2, 2) +#define XLP9XX_IO_SYS_OFFSET(node) XLP9XX_HDR_OFFSET(node, 6, 0) +#define XLP9XX_IO_FUSE_OFFSET(node) XLP9XX_HDR_OFFSET(node, 6, 1) +#define XLP9XX_IO_JTAG_OFFSET(node) XLP9XX_HDR_OFFSET(node, 6, 4) + +#define XLP9XX_IO_PCIE_OFFSET(node, i) XLP9XX_HDR_OFFSET(node, 1, i) +#define XLP9XX_IO_PCIE0_OFFSET(node) XLP9XX_HDR_OFFSET(node, 1, 0) +#define XLP9XX_IO_PCIE2_OFFSET(node) XLP9XX_HDR_OFFSET(node, 1, 2) +#define XLP9XX_IO_PCIE3_OFFSET(node) XLP9XX_HDR_OFFSET(node, 1, 3) + +/* XLP9xx USB block */ +#define XLP9XX_IO_USB_OFFSET(node, i) XLP9XX_HDR_OFFSET(node, 4, i) +#define XLP9XX_IO_USB_XHCI0_OFFSET(node) XLP9XX_HDR_OFFSET(node, 4, 1) +#define XLP9XX_IO_USB_XHCI1_OFFSET(node) XLP9XX_HDR_OFFSET(node, 4, 2) + +/* XLP9XX on-chip SATA controller */ +#define XLP9XX_IO_SATA_OFFSET(node) XLP9XX_HDR_OFFSET(node, 3, 2) + +#define XLP9XX_IO_NOR_OFFSET(node) XLP9XX_HDR_OFFSET(node, 7, 0) +#define XLP9XX_IO_NAND_OFFSET(node) XLP9XX_HDR_OFFSET(node, 7, 1) +#define XLP9XX_IO_SPI_OFFSET(node) XLP9XX_HDR_OFFSET(node, 7, 2) +/* SD flash */ +#define XLP9XX_IO_MMCSD_OFFSET(node) XLP9XX_HDR_OFFSET(node, 7, 3) + /* PCI config header register id's */ #define XLP_PCI_CFGREG0 0x00 #define XLP_PCI_CFGREG1 0x01 @@ -161,6 +193,15 @@ #define nlm_read_pci_reg(b, r) nlm_read_reg(b, r) #define nlm_write_pci_reg(b, r, v) nlm_write_reg(b, r, v) +static inline int xlp9xx_get_socbus(int node) +{ + uint64_t socbridge; + + if (node == 0) + return 1; + socbridge = nlm_pcicfg_base(XLP9XX_IO_BRIDGE_OFFSET(node)); + return (nlm_read_pci_reg(socbridge, 0x6) >> 8) & 0xff; +} #endif /* !__ASSEMBLY */ #endif /* __NLM_HAL_IOMAP_H__ */ diff --git a/arch/mips/netlogic/xlp/nlm_hal.c b/arch/mips/netlogic/xlp/nlm_hal.c index 56930219964..5f191f54f9c 100644 --- a/arch/mips/netlogic/xlp/nlm_hal.c +++ b/arch/mips/netlogic/xlp/nlm_hal.c @@ -57,6 +57,10 @@ void nlm_node_init(int node) nodep->sysbase = nlm_get_sys_regbase(node); nodep->picbase = nlm_get_pic_regbase(node); nodep->ebase = read_c0_ebase() & (~((1 << 12) - 1)); + if (cpu_is_xlp9xx()) + nodep->socbus = xlp9xx_get_socbus(node); + else + nodep->socbus = 0; spin_lock_init(&nodep->piclock); } -- cgit v1.2.3-70-g09d2 From 98d4884ca55883e8b16180bd969a8bccaa885c80 Mon Sep 17 00:00:00 2001 From: Jayachandran C Date: Sat, 21 Dec 2013 16:52:26 +0530 Subject: MIPS: Netlogic: Add cpu to node mapping for XLP9XX XLP9XX has 20 cores per node, opposed to 8 on earlier XLP8XX. Update code that calculates node id from cpu id to handle this. Signed-off-by: Jayachandran C Signed-off-by: John Crispin Patchwork: http://patchwork.linux-mips.org/patch/6283/ --- arch/mips/include/asm/mach-netlogic/multi-node.h | 11 +++++++++-- arch/mips/include/asm/netlogic/mips-extns.h | 7 ++++++- arch/mips/netlogic/common/irq.c | 6 +++--- arch/mips/netlogic/common/smp.c | 8 +++++--- arch/mips/netlogic/xlp/setup.c | 5 +++++ arch/mips/netlogic/xlp/wakeup.c | 4 ++-- arch/mips/netlogic/xlr/wakeup.c | 2 +- arch/mips/pci/msi-xlp.c | 4 ++-- 8 files changed, 33 insertions(+), 14 deletions(-) (limited to 'arch/mips/include/asm/mach-netlogic/multi-node.h') diff --git a/arch/mips/include/asm/mach-netlogic/multi-node.h b/arch/mips/include/asm/mach-netlogic/multi-node.h index df9869d13af..9ed8dacdc37 100644 --- a/arch/mips/include/asm/mach-netlogic/multi-node.h +++ b/arch/mips/include/asm/mach-netlogic/multi-node.h @@ -47,9 +47,16 @@ #endif #endif -#define NLM_CORES_PER_NODE 8 #define NLM_THREADS_PER_CORE 4 -#define NLM_CPUS_PER_NODE (NLM_CORES_PER_NODE * NLM_THREADS_PER_CORE) +#ifdef CONFIG_CPU_XLR +#define nlm_cores_per_node() 8 +#else +extern unsigned int xlp_cores_per_node; +#define nlm_cores_per_node() xlp_cores_per_node +#endif + +#define nlm_threads_per_node() (nlm_cores_per_node() * NLM_THREADS_PER_CORE) +#define nlm_cpuid_to_node(c) ((c) / nlm_threads_per_node()) struct nlm_soc_info { unsigned long coremask; /* cores enabled on the soc */ diff --git a/arch/mips/include/asm/netlogic/mips-extns.h b/arch/mips/include/asm/netlogic/mips-extns.h index f299d31d7c1..de9aada6f4c 100644 --- a/arch/mips/include/asm/netlogic/mips-extns.h +++ b/arch/mips/include/asm/netlogic/mips-extns.h @@ -146,7 +146,12 @@ static inline int hard_smp_processor_id(void) static inline int nlm_nodeid(void) { - return (__read_32bit_c0_register($15, 1) >> 5) & 0x3; + uint32_t prid = read_c0_prid(); + + if ((prid & 0xff00) == PRID_IMP_NETLOGIC_XLP9XX) + return (__read_32bit_c0_register($15, 1) >> 7) & 0x7; + else + return (__read_32bit_c0_register($15, 1) >> 5) & 0x3; } static inline unsigned int nlm_core_id(void) diff --git a/arch/mips/netlogic/common/irq.c b/arch/mips/netlogic/common/irq.c index 3800bf6551a..8092bb32061 100644 --- a/arch/mips/netlogic/common/irq.c +++ b/arch/mips/netlogic/common/irq.c @@ -223,7 +223,7 @@ static void nlm_init_node_irqs(int node) continue; nlm_pic_init_irt(nodep->picbase, irt, i, - node * NLM_CPUS_PER_NODE, 0); + node * nlm_threads_per_node(), 0); nlm_setup_pic_irq(node, i, i, irt); } } @@ -232,8 +232,8 @@ void nlm_smp_irq_init(int hwcpuid) { int node, cpu; - node = hwcpuid / NLM_CPUS_PER_NODE; - cpu = hwcpuid % NLM_CPUS_PER_NODE; + node = nlm_cpuid_to_node(hwcpuid); + cpu = hwcpuid % nlm_threads_per_node(); if (cpu == 0 && node != 0) nlm_init_node_irqs(node); diff --git a/arch/mips/netlogic/common/smp.c b/arch/mips/netlogic/common/smp.c index c0eded01fde..6baae15cc7b 100644 --- a/arch/mips/netlogic/common/smp.c +++ b/arch/mips/netlogic/common/smp.c @@ -63,7 +63,7 @@ void nlm_send_ipi_single(int logical_cpu, unsigned int action) uint64_t picbase; cpu = cpu_logical_map(logical_cpu); - node = cpu / NLM_CPUS_PER_NODE; + node = nlm_cpuid_to_node(cpu); picbase = nlm_get_node(node)->picbase; if (action & SMP_CALL_FUNCTION) @@ -152,7 +152,7 @@ void nlm_boot_secondary(int logical_cpu, struct task_struct *idle) int cpu, node; cpu = cpu_logical_map(logical_cpu); - node = cpu / NLM_CPUS_PER_NODE; + node = nlm_cpuid_to_node(logical_cpu); nlm_next_sp = (unsigned long)__KSTK_TOS(idle); nlm_next_gp = (unsigned long)task_thread_info(idle); @@ -164,7 +164,7 @@ void nlm_boot_secondary(int logical_cpu, struct task_struct *idle) void __init nlm_smp_setup(void) { unsigned int boot_cpu; - int num_cpus, i, ncore; + int num_cpus, i, ncore, node; volatile u32 *cpu_ready = nlm_get_boot_data(BOOT_CPU_READY); char buf[64]; @@ -187,6 +187,8 @@ void __init nlm_smp_setup(void) __cpu_number_map[i] = num_cpus; __cpu_logical_map[num_cpus] = i; set_cpu_possible(num_cpus, true); + node = nlm_cpuid_to_node(i); + cpumask_set_cpu(num_cpus, &nlm_get_node(node)->cpumask); ++num_cpus; } } diff --git a/arch/mips/netlogic/xlp/setup.c b/arch/mips/netlogic/xlp/setup.c index 310d88a82ab..2a39bbeb45b 100644 --- a/arch/mips/netlogic/xlp/setup.c +++ b/arch/mips/netlogic/xlp/setup.c @@ -51,6 +51,7 @@ uint64_t nlm_io_base; struct nlm_soc_info nlm_nodes[NLM_NR_NODES]; cpumask_t nlm_cpumask = CPU_MASK_CPU0; unsigned int nlm_threads_per_core; +unsigned int xlp_cores_per_node; static void nlm_linux_exit(void) { @@ -154,6 +155,10 @@ void __init prom_init(void) void *reset_vec; nlm_io_base = CKSEG1ADDR(XLP_DEFAULT_IO_BASE); + if (cpu_is_xlp9xx()) + xlp_cores_per_node = 32; + else + xlp_cores_per_node = 8; nlm_init_boot_cpu(); xlp_mmu_init(); nlm_node_init(0); diff --git a/arch/mips/netlogic/xlp/wakeup.c b/arch/mips/netlogic/xlp/wakeup.c index a5d6647e5fe..bbd53f8e92d 100644 --- a/arch/mips/netlogic/xlp/wakeup.c +++ b/arch/mips/netlogic/xlp/wakeup.c @@ -165,7 +165,7 @@ static void xlp_enable_secondary_cores(const cpumask_t *wakeup_mask) nodep->coremask = 1; pr_info("Node %d - SYS/FUSE coremask %x\n", n, syscoremask); - for (core = 0; core < NLM_CORES_PER_NODE; core++) { + for (core = 0; core < nlm_cores_per_node(); core++) { /* we will be on node 0 core 0 */ if (n == 0 && core == 0) continue; @@ -175,7 +175,7 @@ static void xlp_enable_secondary_cores(const cpumask_t *wakeup_mask) continue; /* see if at least the first hw thread is enabled */ - cpu = (n * NLM_CORES_PER_NODE + core) + cpu = (n * nlm_cores_per_node() + core) * NLM_THREADS_PER_CORE; if (!cpumask_test_cpu(cpu, wakeup_mask)) continue; diff --git a/arch/mips/netlogic/xlr/wakeup.c b/arch/mips/netlogic/xlr/wakeup.c index 9fb81fa6272..ec60e716938 100644 --- a/arch/mips/netlogic/xlr/wakeup.c +++ b/arch/mips/netlogic/xlr/wakeup.c @@ -70,7 +70,7 @@ int xlr_wakeup_secondary_cpus(void) /* Fill up the coremask early */ nodep->coremask = 1; - for (i = 1; i < NLM_CORES_PER_NODE; i++) { + for (i = 1; i < nlm_cores_per_node(); i++) { for (j = 1000000; j > 0; j--) { if (cpu_ready[i * NLM_THREADS_PER_CORE]) break; diff --git a/arch/mips/pci/msi-xlp.c b/arch/mips/pci/msi-xlp.c index 66a244a73a8..afd8405e018 100644 --- a/arch/mips/pci/msi-xlp.c +++ b/arch/mips/pci/msi-xlp.c @@ -280,7 +280,7 @@ static int xlp_setup_msi(uint64_t lnkbase, int node, int link, irt = PIC_IRT_PCIE_LINK_INDEX(link); nlm_setup_pic_irq(node, lirq, lirq, irt); nlm_pic_init_irt(nlm_get_node(node)->picbase, irt, lirq, - node * NLM_CPUS_PER_NODE, 1 /*en */); + node * nlm_threads_per_node(), 1 /*en */); } /* allocate a MSI vec, and tell the bridge about it */ @@ -443,7 +443,7 @@ void __init xlp_init_node_msi_irqs(int node, int link) msixvec = link * XLP_MSIXVEC_PER_LINK + i; irt = PIC_IRT_PCIE_MSIX_INDEX(msixvec); nlm_pic_init_irt(nodep->picbase, irt, PIC_PCIE_MSIX_IRQ(link), - node * NLM_CPUS_PER_NODE, 1 /* enable */); + node * nlm_threads_per_node(), 1 /* enable */); /* Initialize MSI-X extended irq space for the link */ irq = nlm_irq_to_xirq(node, nlm_link_msixirq(link, i)); -- cgit v1.2.3-70-g09d2