From ca4437d4a58147aa975f3b4ad8f6cb35dfa43bdc Mon Sep 17 00:00:00 2001 From: Franck Bui-Huu Date: Thu, 3 May 2007 12:58:54 +0200 Subject: [MIPS] early_printk: use init section Signed-off-by: Franck Bui-Huu Signed-off-by: Ralf Baechle --- arch/mips/kernel/early_printk.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'arch/mips/kernel') diff --git a/arch/mips/kernel/early_printk.c b/arch/mips/kernel/early_printk.c index 4fa54b230c0..818d7c350a2 100644 --- a/arch/mips/kernel/early_printk.c +++ b/arch/mips/kernel/early_printk.c @@ -12,7 +12,8 @@ extern void prom_putchar(char); -static void early_console_write(struct console *con, const char *s, unsigned n) +static void __init +early_console_write(struct console *con, const char *s, unsigned n) { while (n-- && *s) { if (*s == '\n') @@ -22,7 +23,7 @@ static void early_console_write(struct console *con, const char *s, unsigned n) } } -static struct console early_console = { +static struct console early_console __initdata = { .name = "early", .write = early_console_write, .flags = CON_PRINTBUFFER | CON_BOOT, -- cgit v1.2.3-70-g09d2 From 36ea1d57a4bb7d033b5f99f13c08f9af56cd70d7 Mon Sep 17 00:00:00 2001 From: Franck Bui-Huu Date: Thu, 3 May 2007 13:01:32 +0200 Subject: [MIPS] early_printk: allow the early console to run earlier Signed-off-by: Franck Bui-Huu Signed-off-by: Ralf Baechle --- arch/mips/kernel/early_printk.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/mips/kernel') diff --git a/arch/mips/kernel/early_printk.c b/arch/mips/kernel/early_printk.c index 818d7c350a2..9dccfa4752b 100644 --- a/arch/mips/kernel/early_printk.c +++ b/arch/mips/kernel/early_printk.c @@ -30,7 +30,13 @@ static struct console early_console __initdata = { .index = -1 }; +static int early_console_initialized __initdata; + void __init setup_early_printk(void) { + if (early_console_initialized) + return; + early_console_initialized = 1; + register_console(&early_console); } -- cgit v1.2.3-70-g09d2 From 99af900aef048f4923e71bb72f88cc556241a0d4 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Sun, 6 May 2007 17:18:16 +0100 Subject: [MIPS] Make do_default_vi static Signed-off-by: Ralf Baechle --- arch/mips/kernel/traps.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/mips/kernel') diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index ff45a4b8fba..6c41224bae6 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -927,7 +927,7 @@ asmlinkage void do_reserved(struct pt_regs *regs) (regs->cp0_cause & 0x7f) >> 2); } -asmlinkage void do_default_vi(struct pt_regs *regs) +static asmlinkage void do_default_vi(struct pt_regs *regs) { show_regs(regs); panic("Caught unexpected vectored interrupt."); -- cgit v1.2.3-70-g09d2 From 856a514b408fd1b147bf95916811980982fa40d0 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Sun, 6 May 2007 17:51:59 +0100 Subject: [MIPS] Fix do_default_vi to use get_irq_regs to get the irq register ptr. Harmless bug because this function is only called in case of another kernel bug anyway which is also why this was missed for so long. Signed-off-by: Ralf Baechle --- arch/mips/kernel/traps.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/mips/kernel') diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 6c41224bae6..b511ed3091c 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -927,9 +927,9 @@ asmlinkage void do_reserved(struct pt_regs *regs) (regs->cp0_cause & 0x7f) >> 2); } -static asmlinkage void do_default_vi(struct pt_regs *regs) +static asmlinkage void do_default_vi(void) { - show_regs(regs); + show_regs(get_irq_regs()); panic("Caught unexpected vectored interrupt."); } -- cgit v1.2.3-70-g09d2 From ef300e42234eac066b193c871714203d999b481c Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Sun, 6 May 2007 18:31:18 +0100 Subject: [MIPS] Define and use vi_handler_t for vectored interrupt handlers. Signed-off-by: Ralf Baechle --- arch/mips/kernel/traps.c | 4 ++-- include/asm-mips/system.h | 5 ++++- 2 files changed, 6 insertions(+), 3 deletions(-) (limited to 'arch/mips/kernel') diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index b511ed3091c..200de027f35 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -1128,7 +1128,7 @@ void mips_srs_free(int set) clear_bit(set, &sr->sr_allocated); } -static void *set_vi_srs_handler(int n, void *addr, int srs) +static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs) { unsigned long handler; unsigned long old_handler = vi_handlers[n]; @@ -1217,7 +1217,7 @@ static void *set_vi_srs_handler(int n, void *addr, int srs) return (void *)old_handler; } -void *set_vi_handler(int n, void *addr) +void *set_vi_handler(int n, vi_handler_t addr) { return set_vi_srs_handler(n, addr, 0); } diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h index 3713d256d36..bb0b289dbc9 100644 --- a/include/asm-mips/system.h +++ b/include/asm-mips/system.h @@ -464,7 +464,10 @@ static inline unsigned long __cmpxchg_local(volatile void * ptr, extern void set_handler (unsigned long offset, void *addr, unsigned long len); extern void set_uncached_handler (unsigned long offset, void *addr, unsigned long len); -extern void *set_vi_handler (int n, void *addr); + +typedef void (*vi_handler_t)(void); +extern void *set_vi_handler (int n, vi_handler_t addr); + extern void *set_except_vector(int n, void *addr); extern unsigned long ebase; extern void per_cpu_trap_init(void); -- cgit v1.2.3-70-g09d2 From d725cf3818b12a17d78b87a2de19e8eec17126ae Mon Sep 17 00:00:00 2001 From: Chris Dearman Date: Tue, 8 May 2007 14:05:39 +0100 Subject: [MIPS] MT: Reenable EIC support and add support for SOCit SC. Signed-off-by: Chris Dearman Signed-off-by: Ralf Baechle --- arch/mips/Kconfig | 4 ++++ arch/mips/kernel/irq-msc01.c | 10 +++++----- arch/mips/mips-boards/malta/malta_int.c | 21 +++++++++++++-------- include/asm-mips/mips-boards/malta.h | 4 ++++ include/asm-mips/msc01_ic.h | 5 +---- 5 files changed, 27 insertions(+), 17 deletions(-) (limited to 'arch/mips/kernel') diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 16ecea3c081..b684385c4e6 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1557,6 +1557,7 @@ config MIPS_MT_SMP bool "Use 1 TC on each available VPE for SMP" depends on SYS_SUPPORTS_MULTITHREADING select CPU_MIPSR2_IRQ_VI + select CPU_MIPSR2_IRQ_EI select CPU_MIPSR2_SRS select MIPS_MT select NR_CPUS_DEFAULT_2 @@ -1572,6 +1573,7 @@ config MIPS_MT_SMTC #depends on CPU_MIPS64_R2 # once there is hardware ... depends on SYS_SUPPORTS_MULTITHREADING select CPU_MIPSR2_IRQ_VI + select CPU_MIPSR2_IRQ_EI select CPU_MIPSR2_SRS select MIPS_MT select NR_CPUS_DEFAULT_8 @@ -1584,6 +1586,8 @@ config MIPS_MT_SMTC config MIPS_VPE_LOADER bool "VPE loader support." depends on SYS_SUPPORTS_MULTITHREADING + select CPU_MIPSR2_IRQ_VI + select CPU_MIPSR2_IRQ_EI select MIPS_MT help Includes a loader for loading an elf relocatable object diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c index 2967537221e..410868b5ea5 100644 --- a/arch/mips/kernel/irq-msc01.c +++ b/arch/mips/kernel/irq-msc01.c @@ -132,11 +132,11 @@ struct irq_chip msc_edgeirq_type = { }; -void __init init_msc_irqs(unsigned int base, msc_irqmap_t *imp, int nirq) +void __init init_msc_irqs(unsigned long icubase, unsigned int irqbase, msc_irqmap_t *imp, int nirq) { extern void (*board_bind_eic_interrupt)(unsigned int irq, unsigned int regset); - _icctrl_msc = (unsigned long) ioremap (MIPS_MSC01_IC_REG_BASE, 0x40000); + _icctrl_msc = (unsigned long) ioremap (icubase, 0x40000); /* Reset interrupt controller - initialises all registers to 0 */ MSCIC_WRITE(MSC01_IC_RST, MSC01_IC_RST_RST_BIT); @@ -148,14 +148,14 @@ void __init init_msc_irqs(unsigned int base, msc_irqmap_t *imp, int nirq) switch (imp->im_type) { case MSC01_IRQ_EDGE: - set_irq_chip(base+n, &msc_edgeirq_type); + set_irq_chip(irqbase+n, &msc_edgeirq_type); if (cpu_has_veic) MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT); else MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT | imp->im_lvl); break; case MSC01_IRQ_LEVEL: - set_irq_chip(base+n, &msc_levelirq_type); + set_irq_chip(irqbase+n, &msc_levelirq_type); if (cpu_has_veic) MSCIC_WRITE(MSC01_IC_SUP+n*8, 0); else @@ -163,7 +163,7 @@ void __init init_msc_irqs(unsigned int base, msc_irqmap_t *imp, int nirq) } } - irq_base = base; + irq_base = irqbase; MSCIC_WRITE(MSC01_IC_GENA, MSC01_IC_GENA_GENA_BIT); /* Enable interrupt generation */ diff --git a/arch/mips/mips-boards/malta/malta_int.c b/arch/mips/mips-boards/malta/malta_int.c index 83d76025d61..1cd830e3d93 100644 --- a/arch/mips/mips-boards/malta/malta_int.c +++ b/arch/mips/mips-boards/malta/malta_int.c @@ -311,16 +311,21 @@ void __init arch_init_irq(void) if (!cpu_has_veic) mips_cpu_irq_init(); - switch(mips_revision_corid) { - case MIPS_REVISION_CORID_CORE_MSC: - case MIPS_REVISION_CORID_CORE_FPGA2: - case MIPS_REVISION_CORID_CORE_FPGA3: - case MIPS_REVISION_CORID_CORE_24K: - case MIPS_REVISION_CORID_CORE_EMUL_MSC: + switch(mips_revision_sconid) { + case MIPS_REVISION_SCON_SOCIT: + case MIPS_REVISION_SCON_ROCIT: + if (cpu_has_veic) + init_msc_irqs (MIPS_MSC01_IC_REG_BASE, MSC01E_INT_BASE, msc_eicirqmap, msc_nr_eicirqs); + else + init_msc_irqs (MIPS_MSC01_IC_REG_BASE, MSC01C_INT_BASE, msc_irqmap, msc_nr_irqs); + break; + + case MIPS_REVISION_SCON_SOCITSC: + case MIPS_REVISION_SCON_SOCITSCP: if (cpu_has_veic) - init_msc_irqs (MSC01E_INT_BASE, msc_eicirqmap, msc_nr_eicirqs); + init_msc_irqs (MIPS_SOCITSC_IC_REG_BASE, MSC01E_INT_BASE, msc_eicirqmap, msc_nr_eicirqs); else - init_msc_irqs (MSC01C_INT_BASE, msc_irqmap, msc_nr_irqs); + init_msc_irqs (MIPS_SOCITSC_IC_REG_BASE, MSC01C_INT_BASE, msc_irqmap, msc_nr_irqs); } if (cpu_has_veic) { diff --git a/include/asm-mips/mips-boards/malta.h b/include/asm-mips/mips-boards/malta.h index b0ba3c5a921..eec91001bb6 100644 --- a/include/asm-mips/mips-boards/malta.h +++ b/include/asm-mips/mips-boards/malta.h @@ -25,6 +25,10 @@ #include #include +/* Mips interrupt controller found in SOCit variations */ +#define MIPS_MSC01_IC_REG_BASE 0x1bc40000 +#define MIPS_SOCITSC_IC_REG_BASE 0x1ffa0000 + /* * Malta I/O ports base address for the Galileo GT64120 and Algorithmics * Bonito system controllers. diff --git a/include/asm-mips/msc01_ic.h b/include/asm-mips/msc01_ic.h index aa7ad9a7176..7989b9ffc1d 100644 --- a/include/asm-mips/msc01_ic.h +++ b/include/asm-mips/msc01_ic.h @@ -94,10 +94,7 @@ /* * MIPS System controller interrupt register base. * - * FIXME - are these macros specific to Malta and co or to the MSC? If the - * latter, they should be moved elsewhere. */ -#define MIPS_MSC01_IC_REG_BASE 0x1bc40000 /***************************************************************************** * Absolute register addresses @@ -144,7 +141,7 @@ typedef struct msc_irqmap { #define MSC01_IRQ_LEVEL 0 #define MSC01_IRQ_EDGE 1 -extern void __init init_msc_irqs(unsigned int base, msc_irqmap_t *imp, int nirq); +extern void __init init_msc_irqs(unsigned long icubase, unsigned int base, msc_irqmap_t *imp, int nirq); extern void ll_msc_irq(void); #endif /* __ASM_MIPS_BOARDS_MSC01_IC_H */ -- cgit v1.2.3-70-g09d2 From 55d0b4e3f6526daf1cc7449028bf5d4c304a6a69 Mon Sep 17 00:00:00 2001 From: Franck Bui-Huu Date: Fri, 4 May 2007 17:36:44 +0200 Subject: [MIPS] clocksource: use CLOCKSOURCE_MASK() macro Signed-off-by: Franck Bui-Huu Signed-off-by: Ralf Baechle --- arch/mips/kernel/time.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/mips/kernel') diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c index e5e56bd498d..751b4a18b13 100644 --- a/arch/mips/kernel/time.c +++ b/arch/mips/kernel/time.c @@ -306,7 +306,7 @@ static unsigned int __init calibrate_hpt(void) struct clocksource clocksource_mips = { .name = "MIPS", - .mask = 0xffffffff, + .mask = CLOCKSOURCE_MASK(32), .flags = CLOCK_SOURCE_IS_CONTINUOUS, }; -- cgit v1.2.3-70-g09d2 From f543110da7a53acb8c6d367e740ca9e110f0bb3a Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Thu, 10 May 2007 01:20:30 +0900 Subject: [MIPS] Drop __devinit tag from allocate_irqno() and free_irqno() This fix these warnings: WARNING: arch/mips/kernel/built-in.o - Section mismatch: reference to .init.text:free_irqno from __ksymtab_gpl between '__ksymtab_free_irqno' (at offset 0x0) and '__ksymtab_allocate_irqno' WARNING: arch/mips/kernel/built-in.o - Section mismatch: reference to .init.text:allocate_irqno from __ksymtab_gpl after '__ksymtab_allocate_irqno' (at offset 0x8) Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- arch/mips/kernel/irq.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/mips/kernel') diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c index 2fe4c868a80..aeded6c17de 100644 --- a/arch/mips/kernel/irq.c +++ b/arch/mips/kernel/irq.c @@ -28,7 +28,7 @@ static unsigned long irq_map[NR_IRQS / BITS_PER_LONG]; -int __devinit allocate_irqno(void) +int allocate_irqno(void) { int irq; @@ -59,7 +59,7 @@ void __init alloc_legacy_irqno(void) BUG_ON(test_and_set_bit(i, irq_map)); } -void __devinit free_irqno(unsigned int irq) +void free_irqno(unsigned int irq) { smp_mb__before_clear_bit(); clear_bit(irq, irq_map); -- cgit v1.2.3-70-g09d2