From de862b488e81172d4c610945efd9f3fc7f4b84a7 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Fri, 17 Mar 2006 12:59:22 +0900 Subject: [MIPS] TX49XX has prefetch. The TX49XX has the prefetch instruction. It supports only Pref_Load (hint 0). Actually changes in this patch except for Kconfig are not have any effects, I added these changes to prevent misuse of unsupported hints. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- arch/mips/mm/c-r4k.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/mips/mm/c-r4k.c') diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 9572ed44f0d..32b7f6aeb98 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -786,6 +786,7 @@ static void __init probe_pcache(void) c->dcache.waybit = 0; c->options |= MIPS_CPU_CACHE_CDEX_P; + c->options |= MIPS_CPU_PREFETCH; break; case CPU_R4000PC: -- cgit v1.2.3-70-g09d2