From 5864810bc50de57e1b4757850d3208f69579af7f Mon Sep 17 00:00:00 2001 From: Shinya Kuribayashi Date: Wed, 18 Mar 2009 09:04:01 +0900 Subject: MIPS: VR5500: Enable prefetch Signed-off-by: Shinya Kuribayashi Signed-off-by: Ralf Baechle --- arch/mips/mm/c-r4k.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/mips/mm/c-r4k.c') diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index c43f4b26a69..871e828bc62 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -780,7 +780,7 @@ static void __cpuinit probe_pcache(void) c->dcache.ways = 2; c->dcache.waybit = 0; - c->options |= MIPS_CPU_CACHE_CDEX_P; + c->options |= MIPS_CPU_CACHE_CDEX_P | MIPS_CPU_PREFETCH; break; case CPU_TX49XX: -- cgit v1.2.3-70-g09d2