From 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 Mon Sep 17 00:00:00 2001 From: Linus Torvalds Date: Sat, 16 Apr 2005 15:20:36 -0700 Subject: Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip! --- arch/mips/sgi-ip27/TODO | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 arch/mips/sgi-ip27/TODO (limited to 'arch/mips/sgi-ip27/TODO') diff --git a/arch/mips/sgi-ip27/TODO b/arch/mips/sgi-ip27/TODO new file mode 100644 index 00000000000..32106131b0d --- /dev/null +++ b/arch/mips/sgi-ip27/TODO @@ -0,0 +1,23 @@ +1. Need to figure out why PCI writes to the IOC3 hang, and if it is okay +not to write to the IOC3 ever. +2. Need to figure out RRB allocation in bridge_startup(). +3. Need to figure out why address swaizzling is needed in inw/outw for +Qlogic scsi controllers. +4. Need to integrate ip27-klconfig.c:find_lboard and +ip27-init.c:find_lbaord_real. DONE +5. Is it okay to set calias space on all nodes as 0, instead of 8k as +in irix? +6. Investigate why things do not work without the setup_test() call +being invoked on all nodes in ip27-memory.c. +7. Too many CLIs in the locore handlers : +For the low level handlers set up by set_except_vector(), +__tlb_refill_debug_tramp, __xtlb_refill_debug_tramp and cacheerror, +investigate whether the code should do CLI, STI or KMODE. +8. Too many do_page_faults invoked - investigate. +9. start_thread must turn off UX64 ... and define tlb_refill_debug. +10. Need a bad pmd table, bad pte table. __bad_pmd_table/__bad_pagetable +does not agree with pgd_bad/pmd_bad. +11. All intrs (ip27_do_irq handlers) are targetted at cpu A on the node. +This might need to change later. Only the timer intr is set up to be +received on both Cpu A and B. (ip27_do_irq()/bridge_startup()) +13. Cache flushing (specially the SMP version) has to be investigated. -- cgit v1.2.3-70-g09d2