From 7d52c7b0cd46f42ae2c9df37f1a385d9aaf95842 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Fri, 22 Jun 2007 00:23:57 -0500 Subject: [POWERPC] Pass the pci_controller into pci_exclude_device There are times that we need to know which controller we are on to decide how to exclude devices properly. We now pass the pci_controller that we are going to use down to the pci_exclude_device function. This will greatly simplify being able to exclude the PHBs in multiple controller setups. Signed-off-by: Kumar Gala --- arch/powerpc/sysdev/indirect_pci.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/powerpc/sysdev/indirect_pci.c') diff --git a/arch/powerpc/sysdev/indirect_pci.c b/arch/powerpc/sysdev/indirect_pci.c index e7148846970..3dedf8f5bfb 100644 --- a/arch/powerpc/sysdev/indirect_pci.c +++ b/arch/powerpc/sysdev/indirect_pci.c @@ -35,14 +35,14 @@ indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset, u8 cfg_type = 0; if (ppc_md.pci_exclude_device) - if (ppc_md.pci_exclude_device(bus->number, devfn)) + if (ppc_md.pci_exclude_device(hose, bus->number, devfn)) return PCIBIOS_DEVICE_NOT_FOUND; if (hose->set_cfg_type) if (bus->number != hose->first_busno) cfg_type = 1; - PCI_CFG_OUT(hose->cfg_addr, + PCI_CFG_OUT(hose->cfg_addr, (0x80000000 | ((bus->number - hose->bus_offset) << 16) | (devfn << 8) | ((offset & 0xfc) | cfg_type))); @@ -74,14 +74,14 @@ indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset, u8 cfg_type = 0; if (ppc_md.pci_exclude_device) - if (ppc_md.pci_exclude_device(bus->number, devfn)) + if (ppc_md.pci_exclude_device(hose, bus->number, devfn)) return PCIBIOS_DEVICE_NOT_FOUND; if (hose->set_cfg_type) if (bus->number != hose->first_busno) cfg_type = 1; - PCI_CFG_OUT(hose->cfg_addr, + PCI_CFG_OUT(hose->cfg_addr, (0x80000000 | ((bus->number - hose->bus_offset) << 16) | (devfn << 8) | ((offset & 0xfc) | cfg_type))); -- cgit v1.2.3-70-g09d2 From 5ab65ecdaffd85753e7ad957622afcd709a39deb Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Mon, 25 Jun 2007 13:09:42 -0500 Subject: [POWERPC] Added self_busno to indicate which bus number the PHB is Added self_busno to pci_controller and indirect PCI ops to be set by board code to indicate which bus number to use when talking to the PHB. By default we use zero since the majority of controllers that have implicit mechanisms to talk to the PHBs use a bus number of zero. Signed-off-by: Kumar Gala --- arch/powerpc/sysdev/indirect_pci.c | 12 ++++++++++-- include/asm-ppc/pci-bridge.h | 1 + 2 files changed, 11 insertions(+), 2 deletions(-) (limited to 'arch/powerpc/sysdev/indirect_pci.c') diff --git a/arch/powerpc/sysdev/indirect_pci.c b/arch/powerpc/sysdev/indirect_pci.c index 3dedf8f5bfb..d490e71f053 100644 --- a/arch/powerpc/sysdev/indirect_pci.c +++ b/arch/powerpc/sysdev/indirect_pci.c @@ -33,6 +33,7 @@ indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset, struct pci_controller *hose = bus->sysdata; volatile void __iomem *cfg_data; u8 cfg_type = 0; + u32 bus_no; if (ppc_md.pci_exclude_device) if (ppc_md.pci_exclude_device(hose, bus->number, devfn)) @@ -42,8 +43,11 @@ indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset, if (bus->number != hose->first_busno) cfg_type = 1; + bus_no = (bus->number == hose->first_busno) ? + hose->self_busno : bus->number - hose->bus_offset; + PCI_CFG_OUT(hose->cfg_addr, - (0x80000000 | ((bus->number - hose->bus_offset) << 16) + (0x80000000 | (bus_no << 16) | (devfn << 8) | ((offset & 0xfc) | cfg_type))); /* @@ -72,6 +76,7 @@ indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset, struct pci_controller *hose = bus->sysdata; volatile void __iomem *cfg_data; u8 cfg_type = 0; + u32 bus_no; if (ppc_md.pci_exclude_device) if (ppc_md.pci_exclude_device(hose, bus->number, devfn)) @@ -81,8 +86,11 @@ indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset, if (bus->number != hose->first_busno) cfg_type = 1; + bus_no = (bus->number == hose->first_busno) ? + hose->self_busno : bus->number - hose->bus_offset; + PCI_CFG_OUT(hose->cfg_addr, - (0x80000000 | ((bus->number - hose->bus_offset) << 16) + (0x80000000 | (bus_no << 16) | (devfn << 8) | ((offset & 0xfc) | cfg_type))); /* diff --git a/include/asm-ppc/pci-bridge.h b/include/asm-ppc/pci-bridge.h index 4d35b844bc5..2c2abdaad42 100644 --- a/include/asm-ppc/pci-bridge.h +++ b/include/asm-ppc/pci-bridge.h @@ -47,6 +47,7 @@ struct pci_controller { int first_busno; int last_busno; + int self_busno; int bus_offset; void __iomem *io_base_virt; -- cgit v1.2.3-70-g09d2 From 0a3786c5f7575c0739ad94057213b931a9423502 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Mon, 25 Jun 2007 13:32:48 -0500 Subject: [POWERPC] Removed remnants of bus_offset Removed the remants of bus_offset and use self_busno in the mv64x60 case and use pci_assign_all_buses on 83xx/85xx. 83xx/85xx have multiple PHBs and the firmwares on these devices tend not to handle topologies with P2P bridges well so we let Linux just reassign the bus numbers to match. Signed-off-by: Kumar Gala --- arch/powerpc/platforms/83xx/pci.c | 2 +- arch/powerpc/platforms/85xx/pci.c | 2 +- arch/powerpc/sysdev/indirect_pci.c | 4 ++-- arch/powerpc/sysdev/mv64x60_pci.c | 2 +- include/asm-ppc/pci-bridge.h | 1 + 5 files changed, 6 insertions(+), 5 deletions(-) (limited to 'arch/powerpc/sysdev/indirect_pci.c') diff --git a/arch/powerpc/platforms/83xx/pci.c b/arch/powerpc/platforms/83xx/pci.c index 8da935c6e26..f49ed277e84 100644 --- a/arch/powerpc/platforms/83xx/pci.c +++ b/arch/powerpc/platforms/83xx/pci.c @@ -61,6 +61,7 @@ int __init mpc83xx_add_bridge(struct device_node *dev) " bus 0\n", dev->full_name); } + pci_assign_all_buses = 1; hose = pcibios_alloc_controller(); if (!hose) return -ENOMEM; @@ -80,7 +81,6 @@ int __init mpc83xx_add_bridge(struct device_node *dev) if ((rsrc.start & 0xfffff) == 0x8600) { setup_indirect_pci(hose, immr + 0x8380, immr + 0x8384); primary = 0; - hose->bus_offset = hose->first_busno; } printk(KERN_INFO "Found MPC83xx PCI host bridge at 0x%016llx. " diff --git a/arch/powerpc/platforms/85xx/pci.c b/arch/powerpc/platforms/85xx/pci.c index be67f67ee6f..a25b3e77a7d 100644 --- a/arch/powerpc/platforms/85xx/pci.c +++ b/arch/powerpc/platforms/85xx/pci.c @@ -55,6 +55,7 @@ int __init mpc85xx_add_bridge(struct device_node *dev) " bus 0\n", dev->full_name); } + pci_assign_all_buses = 1; hose = pcibios_alloc_controller(); if (!hose) return -ENOMEM; @@ -71,7 +72,6 @@ int __init mpc85xx_add_bridge(struct device_node *dev) if ((rsrc.start & 0xfffff) == 0x9000) { setup_indirect_pci(hose, immr + 0x9000, immr + 0x9004); primary = 0; - hose->bus_offset = hose->first_busno; } printk(KERN_INFO "Found MPC85xx PCI host bridge at 0x%016llx. " diff --git a/arch/powerpc/sysdev/indirect_pci.c b/arch/powerpc/sysdev/indirect_pci.c index d490e71f053..efe3cff8dcd 100644 --- a/arch/powerpc/sysdev/indirect_pci.c +++ b/arch/powerpc/sysdev/indirect_pci.c @@ -44,7 +44,7 @@ indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset, cfg_type = 1; bus_no = (bus->number == hose->first_busno) ? - hose->self_busno : bus->number - hose->bus_offset; + hose->self_busno : bus->number; PCI_CFG_OUT(hose->cfg_addr, (0x80000000 | (bus_no << 16) @@ -87,7 +87,7 @@ indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset, cfg_type = 1; bus_no = (bus->number == hose->first_busno) ? - hose->self_busno : bus->number - hose->bus_offset; + hose->self_busno : bus->number; PCI_CFG_OUT(hose->cfg_addr, (0x80000000 | (bus_no << 16) diff --git a/arch/powerpc/sysdev/mv64x60_pci.c b/arch/powerpc/sysdev/mv64x60_pci.c index 6b08e76de5a..2e7738455ae 100644 --- a/arch/powerpc/sysdev/mv64x60_pci.c +++ b/arch/powerpc/sysdev/mv64x60_pci.c @@ -147,7 +147,7 @@ static int __init mv64x60_add_bridge(struct device_node *dev) hose->last_busno = bus_range ? bus_range[1] : 0xff; setup_indirect_pci(hose, rsrc.start, rsrc.start + 4); - hose->bus_offset = hose->first_busno; + hose->self_busno = hose->first_busno; printk(KERN_INFO "Found MV64x60 PCI host bridge at 0x%016llx. " "Firmware bus number: %d->%d\n", diff --git a/include/asm-ppc/pci-bridge.h b/include/asm-ppc/pci-bridge.h index 2c2abdaad42..70aab669104 100644 --- a/include/asm-ppc/pci-bridge.h +++ b/include/asm-ppc/pci-bridge.h @@ -48,6 +48,7 @@ struct pci_controller { int first_busno; int last_busno; int self_busno; + /* bus_offset is only used by ARCH=ppc */ int bus_offset; void __iomem *io_base_virt; -- cgit v1.2.3-70-g09d2 From ab0f9ad34d1eb31bb13cc4218d7717f8a85b12ed Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Mon, 25 Jun 2007 15:19:48 -0500 Subject: [POWERPC] Added indirect_type to handle variants of PCI ops The generic PCI config ops indirect support for ppc32 covers only two cases (implicit vs explicit) type 0/1 config cycles via set_cfg_type. Added a indirect_type bit mask to handle other variants. Added support for PCI-e extended registers and moved the cfg_type handling into the bit mask for ARCH=powerpc. We can also use this to handle indirect quirks. Signed-off-by: Kumar Gala --- arch/powerpc/sysdev/indirect_pci.c | 22 ++++++++++++++++------ include/asm-ppc/pci-bridge.h | 10 ++++++++++ 2 files changed, 26 insertions(+), 6 deletions(-) (limited to 'arch/powerpc/sysdev/indirect_pci.c') diff --git a/arch/powerpc/sysdev/indirect_pci.c b/arch/powerpc/sysdev/indirect_pci.c index efe3cff8dcd..3a1612253c6 100644 --- a/arch/powerpc/sysdev/indirect_pci.c +++ b/arch/powerpc/sysdev/indirect_pci.c @@ -33,22 +33,27 @@ indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset, struct pci_controller *hose = bus->sysdata; volatile void __iomem *cfg_data; u8 cfg_type = 0; - u32 bus_no; + u32 bus_no, reg; if (ppc_md.pci_exclude_device) if (ppc_md.pci_exclude_device(hose, bus->number, devfn)) return PCIBIOS_DEVICE_NOT_FOUND; - if (hose->set_cfg_type) + if (hose->indirect_type & PPC_INDIRECT_TYPE_SET_CFG_TYPE) if (bus->number != hose->first_busno) cfg_type = 1; bus_no = (bus->number == hose->first_busno) ? hose->self_busno : bus->number; + if (hose->indirect_type & PPC_INDIRECT_TYPE_EXT_REG) + reg = ((offset & 0xf00) << 16) | (offset & 0xfc); + else + reg = offset & 0xfc; + PCI_CFG_OUT(hose->cfg_addr, (0x80000000 | (bus_no << 16) - | (devfn << 8) | ((offset & 0xfc) | cfg_type))); + | (devfn << 8) | reg | cfg_type)); /* * Note: the caller has already checked that offset is @@ -76,22 +81,27 @@ indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset, struct pci_controller *hose = bus->sysdata; volatile void __iomem *cfg_data; u8 cfg_type = 0; - u32 bus_no; + u32 bus_no, reg; if (ppc_md.pci_exclude_device) if (ppc_md.pci_exclude_device(hose, bus->number, devfn)) return PCIBIOS_DEVICE_NOT_FOUND; - if (hose->set_cfg_type) + if (hose->indirect_type & PPC_INDIRECT_TYPE_SET_CFG_TYPE) if (bus->number != hose->first_busno) cfg_type = 1; bus_no = (bus->number == hose->first_busno) ? hose->self_busno : bus->number; + if (hose->indirect_type & PPC_INDIRECT_TYPE_EXT_REG) + reg = ((offset & 0xf00) << 16) | (offset & 0xfc); + else + reg = offset & 0xfc; + PCI_CFG_OUT(hose->cfg_addr, (0x80000000 | (bus_no << 16) - | (devfn << 8) | ((offset & 0xfc) | cfg_type))); + | (devfn << 8) | reg | cfg_type)); /* * Note: the caller has already checked that offset is diff --git a/include/asm-ppc/pci-bridge.h b/include/asm-ppc/pci-bridge.h index 70aab669104..0dee56b839a 100644 --- a/include/asm-ppc/pci-bridge.h +++ b/include/asm-ppc/pci-bridge.h @@ -65,9 +65,19 @@ struct pci_controller { /* * If set, indirect method will set the cfg_type bit as * needed to generate type 1 configuration transactions. + * use only on ARCH=ppc */ int set_cfg_type; + /* + * Used for variants of PCI indirect handling and possible quirks: + * SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1 + * EXT_REG - provides access to PCI-e extended registers + */ +#define PPC_INDIRECT_TYPE_SET_CFG_TYPE (0x00000001) +#define PPC_INDIRECT_TYPE_EXT_REG (0x00000002) + u32 indirect_type; + /* Currently, we limit ourselves to 1 IO range and 3 mem * ranges since the common pci_bus structure can't handle more */ -- cgit v1.2.3-70-g09d2 From 476f5779b77a919f0ced5953de2bf3e0f2d02c07 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 26 Jun 2007 12:12:55 -0500 Subject: [POWERPC] 86xx: Workaround PCI_PRIMARY_BUS usage The Freescale PCI-e controllers have an issue in that they use the PCI_PRIMARY_BUS register in the virtual P2P bridge to determine which bus number to match on when generating a type 0 config cycle. The issue is if we are renumbering bus numbers to match Linux we will try setting the PCI_PRIMARY_BUS and will not know which bus number to use for generating type 0 config cycles. We surpress writing the register in the P2P bridge and always keep it at zero. In the future when proper PCI domain support is working we should be able to remove this. Signed-off-by: Kumar Gala --- arch/powerpc/platforms/86xx/pci.c | 4 +++- arch/powerpc/sysdev/indirect_pci.c | 6 ++++++ include/asm-ppc/pci-bridge.h | 5 +++++ 3 files changed, 14 insertions(+), 1 deletion(-) (limited to 'arch/powerpc/sysdev/indirect_pci.c') diff --git a/arch/powerpc/platforms/86xx/pci.c b/arch/powerpc/platforms/86xx/pci.c index 3825e1ac531..6f3c0f674bb 100644 --- a/arch/powerpc/platforms/86xx/pci.c +++ b/arch/powerpc/platforms/86xx/pci.c @@ -158,11 +158,13 @@ int __init mpc86xx_add_bridge(struct device_node *dev) printk(KERN_WARNING "Can't get bus-range for %s, assume" " bus 0\n", dev->full_name); + pci_assign_all_buses = 1; hose = pcibios_alloc_controller(); if (!hose) return -ENOMEM; hose->arch_data = dev; - hose->indirect_type = PPC_INDIRECT_TYPE_EXT_REG; + hose->indirect_type = PPC_INDIRECT_TYPE_EXT_REG | + PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS; hose->first_busno = bus_range ? bus_range[0] : 0x0; hose->last_busno = bus_range ? bus_range[1] : 0xff; diff --git a/arch/powerpc/sysdev/indirect_pci.c b/arch/powerpc/sysdev/indirect_pci.c index 3a1612253c6..c7e6e859b39 100644 --- a/arch/powerpc/sysdev/indirect_pci.c +++ b/arch/powerpc/sysdev/indirect_pci.c @@ -103,6 +103,12 @@ indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset, (0x80000000 | (bus_no << 16) | (devfn << 8) | reg | cfg_type)); + /* surpress setting of PCI_PRIMARY_BUS */ + if (hose->indirect_type & PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS) + if ((offset == PCI_PRIMARY_BUS) && + (bus->number == hose->first_busno)) + val &= 0xffffff00; + /* * Note: the caller has already checked that offset is * suitably aligned and that len is 1, 2 or 4. diff --git a/include/asm-ppc/pci-bridge.h b/include/asm-ppc/pci-bridge.h index 0dee56b839a..c09fbf02ef2 100644 --- a/include/asm-ppc/pci-bridge.h +++ b/include/asm-ppc/pci-bridge.h @@ -73,9 +73,14 @@ struct pci_controller { * Used for variants of PCI indirect handling and possible quirks: * SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1 * EXT_REG - provides access to PCI-e extended registers + * SURPRESS_PRIMARY_BUS - we surpress the setting of PCI_PRIMARY_BUS + * on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS + * to determine which bus number to match on when generating type0 + * config cycles */ #define PPC_INDIRECT_TYPE_SET_CFG_TYPE (0x00000001) #define PPC_INDIRECT_TYPE_EXT_REG (0x00000002) +#define PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS (0x00000004) u32 indirect_type; /* Currently, we limit ourselves to 1 IO range and 3 mem -- cgit v1.2.3-70-g09d2