From af337c096ca47ac1a776e6f1ea2cde9a85d0e60b Mon Sep 17 00:00:00 2001 From: Mariusz Kozlowski Date: Tue, 2 Jan 2007 12:50:20 +0100 Subject: [POWERPC] arch/powerpc/sysdev/ipic.c of_node_get cleanup No need for ?: because of_node_get() can handle NULL argument. Signed-off-by: Mariusz Kozlowski Signed-off-by: Paul Mackerras --- arch/powerpc/sysdev/ipic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/powerpc/sysdev') diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c index 746f78c1537..522aa14e8f0 100644 --- a/arch/powerpc/sysdev/ipic.c +++ b/arch/powerpc/sysdev/ipic.c @@ -569,7 +569,7 @@ void __init ipic_init(struct device_node *node, return; memset(ipic, 0, sizeof(struct ipic)); - ipic->of_node = node ? of_node_get(node) : NULL; + ipic->of_node = of_node_get(node); ipic->irqhost = irq_alloc_host(IRQ_HOST_MAP_LINEAR, NR_IPIC_INTS, -- cgit v1.2.3-70-g09d2 From c3bfc3a8dd337e41cf7b64f815e37f6e2cfbfcdc Mon Sep 17 00:00:00 2001 From: Mariusz Kozlowski Date: Tue, 2 Jan 2007 12:52:47 +0100 Subject: [POWERPC] arch/powerpc/sysdev/mpic.c of_node_get cleanup No need for ?: because of_node_get() can handle NULL argument. Signed-off-by: Mariusz Kozlowski Signed-off-by: Paul Mackerras --- arch/powerpc/sysdev/mpic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/powerpc/sysdev') diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index d01ced11694..62262f2a4a8 100644 --- a/arch/powerpc/sysdev/mpic.c +++ b/arch/powerpc/sysdev/mpic.c @@ -912,7 +912,7 @@ struct mpic * __init mpic_alloc(struct device_node *node, memset(mpic, 0, sizeof(struct mpic)); mpic->name = name; - mpic->of_node = node ? of_node_get(node) : NULL; + mpic->of_node = of_node_get(node); mpic->irqhost = irq_alloc_host(IRQ_HOST_MAP_LINEAR, 256, &mpic_host_ops, -- cgit v1.2.3-70-g09d2 From a15d5eaa7799cce9cfeec4637db18863e1a89e34 Mon Sep 17 00:00:00 2001 From: Mariusz Kozlowski Date: Tue, 2 Jan 2007 13:07:16 +0100 Subject: [POWERPC] arch/powerpc/sysdev/qe_lib of_node_get cleanup No need for ?: as of_node_get() can handle NULL argument. Signed-off-by: Mariusz Kozlowski arch/powerpc/sysdev/qe_lib/qe_ic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Signed-off-by: Paul Mackerras --- arch/powerpc/sysdev/qe_lib/qe_ic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/powerpc/sysdev') diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.c b/arch/powerpc/sysdev/qe_lib/qe_ic.c index 74e48d94f27..908568f4dd8 100644 --- a/arch/powerpc/sysdev/qe_lib/qe_ic.c +++ b/arch/powerpc/sysdev/qe_lib/qe_ic.c @@ -352,7 +352,7 @@ void __init qe_ic_init(struct device_node *node, unsigned int flags) return; memset(qe_ic, 0, sizeof(struct qe_ic)); - qe_ic->of_node = node ? of_node_get(node) : NULL; + qe_ic->of_node = of_node_get(node); qe_ic->irqhost = irq_alloc_host(IRQ_HOST_MAP_LINEAR, NR_QE_IC_INTS, &qe_ic_host_ops, 0); -- cgit v1.2.3-70-g09d2 From 06c3147564cc65f0a5eac8af2b1834a996933e74 Mon Sep 17 00:00:00 2001 From: Mariusz Kozlowski Date: Tue, 2 Jan 2007 12:36:20 +0100 Subject: [POWERPC] arch/powerpc/sysdev/cpm2_pic.c of_node_get cleanup Remove redundant argument check for of_node_get(). It's ok to remove 'node' check because in real life cpm2_pic_init() never gets called with node == NULL. Signed-off-by: Mariusz Kozlowski Signed-off-by: Paul Mackerras --- arch/powerpc/sysdev/cpm2_pic.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'arch/powerpc/sysdev') diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c index 767ee6651ad..e2739eb93cd 100644 --- a/arch/powerpc/sysdev/cpm2_pic.c +++ b/arch/powerpc/sysdev/cpm2_pic.c @@ -245,9 +245,7 @@ void cpm2_pic_init(struct device_node *node) cpm2_intctl->ic_scprrl = 0x05309770; /* create a legacy host */ - if (node) - cpm2_pic_node = of_node_get(node); - + cpm2_pic_node = of_node_get(node); cpm2_pic_host = irq_alloc_host(IRQ_HOST_MAP_LINEAR, 64, &cpm2_pic_host_ops, 64); if (cpm2_pic_host == NULL) { printk(KERN_ERR "CPM2 PIC: failed to allocate irq host!\n"); -- cgit v1.2.3-70-g09d2 From 126186a055d965d5a7b1ab560e343ef70694f349 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Fri, 26 Jan 2007 01:45:32 -0600 Subject: [POWERPC] 83xx: Return a point to the struct ipic from ipic_init() It's useful to have access to struct ipic handle that just got created in ipic_init(). For example, if we want to setup an external IRQ with out a device node we need access ipic->irqhost to create the virtual to HW IRQ mapping and to set the IRQ sense. With this we can mimic the old sense array concept that existed in arch/ppc. Signed-off-by: Kumar Gala --- arch/powerpc/sysdev/ipic.c | 15 +++++++++------ include/asm-powerpc/ipic.h | 2 +- 2 files changed, 10 insertions(+), 7 deletions(-) (limited to 'arch/powerpc/sysdev') diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c index 522aa14e8f0..473c415e9e2 100644 --- a/arch/powerpc/sysdev/ipic.c +++ b/arch/powerpc/sysdev/ipic.c @@ -557,8 +557,7 @@ static struct irq_host_ops ipic_host_ops = { .xlate = ipic_host_xlate, }; -void __init ipic_init(struct device_node *node, - unsigned int flags) +struct ipic * __init ipic_init(struct device_node *node, unsigned int flags) { struct ipic *ipic; struct resource res; @@ -566,7 +565,7 @@ void __init ipic_init(struct device_node *node, ipic = alloc_bootmem(sizeof(struct ipic)); if (ipic == NULL) - return; + return NULL; memset(ipic, 0, sizeof(struct ipic)); ipic->of_node = of_node_get(node); @@ -576,12 +575,14 @@ void __init ipic_init(struct device_node *node, &ipic_host_ops, 0); if (ipic->irqhost == NULL) { of_node_put(node); - return; + return NULL; } ret = of_address_to_resource(node, 0, &res); - if (ret) - return; + if (ret) { + of_node_put(node); + return NULL; + } ipic->regs = ioremap(res.start, res.end - res.start + 1); @@ -625,6 +626,8 @@ void __init ipic_init(struct device_node *node, printk ("IPIC (%d IRQ sources) at %p\n", NR_IPIC_INTS, primary_ipic->regs); + + return ipic; } int ipic_set_priority(unsigned int virq, unsigned int priority) diff --git a/include/asm-powerpc/ipic.h b/include/asm-powerpc/ipic.h index 9fbb0341586..edec79dcb7c 100644 --- a/include/asm-powerpc/ipic.h +++ b/include/asm-powerpc/ipic.h @@ -78,7 +78,7 @@ extern u32 ipic_get_mcp_status(void); extern void ipic_clear_mcp_status(u32 mask); #ifdef CONFIG_PPC_MERGE -extern void ipic_init(struct device_node *node, unsigned int flags); +extern struct ipic * ipic_init(struct device_node *node, unsigned int flags); extern unsigned int ipic_get_irq(void); #else extern void ipic_init(phys_addr_t phys_addr, unsigned int flags, -- cgit v1.2.3-70-g09d2 From 8943212c97cc56d4dcc853a097740e327fe8a6fe Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Fri, 26 Jan 2007 01:52:27 -0600 Subject: [POWERPC] Remove fastcall function attribute fastcall is an x86 specific function attribute and has no business in ppc code Signed-off-by: Kumar Gala --- arch/powerpc/kernel/iomap.c | 20 ++++++++++---------- arch/powerpc/sysdev/qe_lib/qe_ic.c | 4 ++-- 2 files changed, 12 insertions(+), 12 deletions(-) (limited to 'arch/powerpc/sysdev') diff --git a/arch/powerpc/kernel/iomap.c b/arch/powerpc/kernel/iomap.c index c6811337105..601ef79a591 100644 --- a/arch/powerpc/kernel/iomap.c +++ b/arch/powerpc/kernel/iomap.c @@ -12,23 +12,23 @@ * Here comes the ppc64 implementation of the IOMAP * interfaces. */ -unsigned int fastcall ioread8(void __iomem *addr) +unsigned int ioread8(void __iomem *addr) { return readb(addr); } -unsigned int fastcall ioread16(void __iomem *addr) +unsigned int ioread16(void __iomem *addr) { return readw(addr); } -unsigned int fastcall ioread16be(void __iomem *addr) +unsigned int ioread16be(void __iomem *addr) { return in_be16(addr); } -unsigned int fastcall ioread32(void __iomem *addr) +unsigned int ioread32(void __iomem *addr) { return readl(addr); } -unsigned int fastcall ioread32be(void __iomem *addr) +unsigned int ioread32be(void __iomem *addr) { return in_be32(addr); } @@ -38,23 +38,23 @@ EXPORT_SYMBOL(ioread16be); EXPORT_SYMBOL(ioread32); EXPORT_SYMBOL(ioread32be); -void fastcall iowrite8(u8 val, void __iomem *addr) +void iowrite8(u8 val, void __iomem *addr) { writeb(val, addr); } -void fastcall iowrite16(u16 val, void __iomem *addr) +void iowrite16(u16 val, void __iomem *addr) { writew(val, addr); } -void fastcall iowrite16be(u16 val, void __iomem *addr) +void iowrite16be(u16 val, void __iomem *addr) { out_be16(addr, val); } -void fastcall iowrite32(u32 val, void __iomem *addr) +void iowrite32(u32 val, void __iomem *addr) { writel(val, addr); } -void fastcall iowrite32be(u32 val, void __iomem *addr) +void iowrite32be(u32 val, void __iomem *addr) { out_be32(addr, val); } diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.c b/arch/powerpc/sysdev/qe_lib/qe_ic.c index 908568f4dd8..4d1dcb45963 100644 --- a/arch/powerpc/sysdev/qe_lib/qe_ic.c +++ b/arch/powerpc/sysdev/qe_lib/qe_ic.c @@ -323,7 +323,7 @@ unsigned int qe_ic_get_high_irq(struct qe_ic *qe_ic) return irq_linear_revmap(qe_ic->irqhost, irq); } -void fastcall qe_ic_cascade_low(unsigned int irq, struct irq_desc *desc) +void qe_ic_cascade_low(unsigned int irq, struct irq_desc *desc) { struct qe_ic *qe_ic = desc->handler_data; unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic); @@ -332,7 +332,7 @@ void fastcall qe_ic_cascade_low(unsigned int irq, struct irq_desc *desc) generic_handle_irq(cascade_irq); } -void fastcall qe_ic_cascade_high(unsigned int irq, struct irq_desc *desc) +void qe_ic_cascade_high(unsigned int irq, struct irq_desc *desc) { struct qe_ic *qe_ic = desc->handler_data; unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic); -- cgit v1.2.3-70-g09d2 From 88bdc6f061cfb4579d2327fd457d4b7807525a0e Mon Sep 17 00:00:00 2001 From: Vitaly Bordug Date: Wed, 24 Jan 2007 22:41:15 +0300 Subject: [POWERPC] 8xx: platform related changes to the fsl_soc Added 8xx SoC peripherials: fec for Ethernet and smc for UARTs. Ordinary routines to extract values from the device tree and insert respective platform devices Signed-off-by: Vitaly Bordug Signed-off-by: Paul Mackerras --- arch/powerpc/sysdev/fsl_soc.c | 274 +++++++++++++++++++++++++++++++++++++++++- 1 file changed, 272 insertions(+), 2 deletions(-) (limited to 'arch/powerpc/sysdev') diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c index ad31e56e892..9f2a9a444bf 100644 --- a/arch/powerpc/sysdev/fsl_soc.c +++ b/arch/powerpc/sysdev/fsl_soc.c @@ -38,7 +38,8 @@ #include extern void init_fcc_ioports(struct fs_platform_info*); -extern void init_scc_ioports(struct fs_uart_platform_info*); +extern void init_fec_ioports(struct fs_platform_info*); +extern void init_smc_ioports(struct fs_uart_platform_info*); static phys_addr_t immrbase = -1; phys_addr_t get_immrbase(void) @@ -63,7 +64,7 @@ phys_addr_t get_immrbase(void) EXPORT_SYMBOL(get_immrbase); -#ifdef CONFIG_CPM2 +#if defined(CONFIG_CPM2) || defined(CONFIG_8xx) static u32 brgfreq = -1; @@ -544,6 +545,8 @@ arch_initcall(fsl_usb_of_init); #ifdef CONFIG_CPM2 +extern void init_scc_ioports(struct fs_uart_platform_info*); + static const char fcc_regs[] = "fcc_regs"; static const char fcc_regs_c[] = "fcc_regs_c"; static const char fcc_pram[] = "fcc_pram"; @@ -792,3 +795,270 @@ err: arch_initcall(cpm_uart_of_init); #endif /* CONFIG_CPM2 */ + +#ifdef CONFIG_8xx + +extern void init_scc_ioports(struct fs_platform_info*); +extern int platform_device_skip(char *model, int id); + +static int __init fs_enet_mdio_of_init(void) +{ + struct device_node *np; + unsigned int i; + struct platform_device *mdio_dev; + struct resource res; + int ret; + + for (np = NULL, i = 0; + (np = of_find_compatible_node(np, "mdio", "fs_enet")) != NULL; + i++) { + struct fs_mii_fec_platform_info mdio_data; + + memset(&res, 0, sizeof(res)); + memset(&mdio_data, 0, sizeof(mdio_data)); + + ret = of_address_to_resource(np, 0, &res); + if (ret) + goto err; + + mdio_dev = + platform_device_register_simple("fsl-cpm-fec-mdio", + res.start, &res, 1); + if (IS_ERR(mdio_dev)) { + ret = PTR_ERR(mdio_dev); + goto err; + } + + mdio_data.mii_speed = ((((ppc_proc_freq + 4999999) / 2500000) / 2) & 0x3F) << 1; + + ret = + platform_device_add_data(mdio_dev, &mdio_data, + sizeof(struct fs_mii_fec_platform_info)); + if (ret) + goto unreg; + } + return 0; + +unreg: + platform_device_unregister(mdio_dev); +err: + return ret; +} + +arch_initcall(fs_enet_mdio_of_init); + +static const char *enet_regs = "regs"; +static const char *enet_pram = "pram"; +static const char *enet_irq = "interrupt"; +static char bus_id[9][BUS_ID_SIZE]; + +static int __init fs_enet_of_init(void) +{ + struct device_node *np; + unsigned int i; + struct platform_device *fs_enet_dev = NULL; + struct resource res; + int ret; + + for (np = NULL, i = 0; + (np = of_find_compatible_node(np, "network", "fs_enet")) != NULL; + i++) { + struct resource r[4]; + struct device_node *phy = NULL, *mdio = NULL; + struct fs_platform_info fs_enet_data; + unsigned int *id, *phy_addr; + void *mac_addr; + phandle *ph; + char *model; + + memset(r, 0, sizeof(r)); + memset(&fs_enet_data, 0, sizeof(fs_enet_data)); + + model = (char *)get_property(np, "model", NULL); + if (model == NULL) { + ret = -ENODEV; + goto unreg; + } + + id = (u32 *) get_property(np, "device-id", NULL); + fs_enet_data.fs_no = *id; + + if (platform_device_skip(model, *id)) + continue; + + ret = of_address_to_resource(np, 0, &r[0]); + if (ret) + goto err; + r[0].name = enet_regs; + + mac_addr = (void *)get_property(np, "mac-address", NULL); + memcpy(fs_enet_data.macaddr, mac_addr, 6); + + ph = (phandle *) get_property(np, "phy-handle", NULL); + if (ph != NULL) + phy = of_find_node_by_phandle(*ph); + + if (phy != NULL) { + phy_addr = (u32 *) get_property(phy, "reg", NULL); + fs_enet_data.phy_addr = *phy_addr; + fs_enet_data.has_phy = 1; + + mdio = of_get_parent(phy); + ret = of_address_to_resource(mdio, 0, &res); + if (ret) { + of_node_put(phy); + of_node_put(mdio); + goto unreg; + } + } + + model = (char*)get_property(np, "model", NULL); + strcpy(fs_enet_data.fs_type, model); + + if (strstr(model, "FEC")) { + r[1].start = r[1].end = irq_of_parse_and_map(np, 0); + r[1].flags = IORESOURCE_IRQ; + r[1].name = enet_irq; + + fs_enet_dev = + platform_device_register_simple("fsl-cpm-fec", i, &r[0], 2); + + if (IS_ERR(fs_enet_dev)) { + ret = PTR_ERR(fs_enet_dev); + goto err; + } + + fs_enet_data.rx_ring = 128; + fs_enet_data.tx_ring = 16; + fs_enet_data.rx_copybreak = 240; + fs_enet_data.use_napi = 1; + fs_enet_data.napi_weight = 17; + + snprintf((char*)&bus_id[i], BUS_ID_SIZE, "%x:%02x", + (u32)res.start, fs_enet_data.phy_addr); + fs_enet_data.bus_id = (char*)&bus_id[i]; + fs_enet_data.init_ioports = init_fec_ioports; + } + if (strstr(model, "SCC")) { + ret = of_address_to_resource(np, 1, &r[1]); + if (ret) + goto err; + r[1].name = enet_pram; + + r[2].start = r[2].end = irq_of_parse_and_map(np, 0); + r[2].flags = IORESOURCE_IRQ; + r[2].name = enet_irq; + + fs_enet_dev = + platform_device_register_simple("fsl-cpm-scc", i, &r[0], 3); + + if (IS_ERR(fs_enet_dev)) { + ret = PTR_ERR(fs_enet_dev); + goto err; + } + + fs_enet_data.rx_ring = 64; + fs_enet_data.tx_ring = 8; + fs_enet_data.rx_copybreak = 240; + fs_enet_data.use_napi = 1; + fs_enet_data.napi_weight = 17; + + snprintf((char*)&bus_id[i], BUS_ID_SIZE, "%s", "fixed@10:1"); + fs_enet_data.bus_id = (char*)&bus_id[i]; + fs_enet_data.init_ioports = init_scc_ioports; + } + + of_node_put(phy); + of_node_put(mdio); + + ret = platform_device_add_data(fs_enet_dev, &fs_enet_data, + sizeof(struct + fs_platform_info)); + if (ret) + goto unreg; + } + return 0; + +unreg: + platform_device_unregister(fs_enet_dev); +err: + return ret; +} + +arch_initcall(fs_enet_of_init); + + +static const char *smc_regs = "regs"; +static const char *smc_pram = "pram"; + +static int __init cpm_smc_uart_of_init(void) +{ + struct device_node *np; + unsigned int i; + struct platform_device *cpm_uart_dev; + int ret; + + for (np = NULL, i = 0; + (np = of_find_compatible_node(np, "serial", "cpm_uart")) != NULL; + i++) { + struct resource r[3]; + struct fs_uart_platform_info cpm_uart_data; + int *id; + char *model; + + memset(r, 0, sizeof(r)); + memset(&cpm_uart_data, 0, sizeof(cpm_uart_data)); + + ret = of_address_to_resource(np, 0, &r[0]); + if (ret) + goto err; + + r[0].name = smc_regs; + + ret = of_address_to_resource(np, 1, &r[1]); + if (ret) + goto err; + r[1].name = smc_pram; + + r[2].start = r[2].end = irq_of_parse_and_map(np, 0); + r[2].flags = IORESOURCE_IRQ; + + cpm_uart_dev = + platform_device_register_simple("fsl-cpm-smc:uart", i, &r[0], 3); + + if (IS_ERR(cpm_uart_dev)) { + ret = PTR_ERR(cpm_uart_dev); + goto err; + } + + model = (char*)get_property(np, "model", NULL); + strcpy(cpm_uart_data.fs_type, model); + + id = (int*)get_property(np, "device-id", NULL); + cpm_uart_data.fs_no = *id; + cpm_uart_data.uart_clk = ppc_proc_freq; + + cpm_uart_data.tx_num_fifo = 4; + cpm_uart_data.tx_buf_size = 32; + cpm_uart_data.rx_num_fifo = 4; + cpm_uart_data.rx_buf_size = 32; + + ret = + platform_device_add_data(cpm_uart_dev, &cpm_uart_data, + sizeof(struct + fs_uart_platform_info)); + if (ret) + goto unreg; + } + + return 0; + +unreg: + platform_device_unregister(cpm_uart_dev); +err: + return ret; +} + +arch_initcall(cpm_smc_uart_of_init); + +#endif /* CONFIG_8xx */ -- cgit v1.2.3-70-g09d2 From f2a0bd3753dad7ea4605ebd5435716b39e9f92bb Mon Sep 17 00:00:00 2001 From: Vitaly Bordug Date: Wed, 24 Jan 2007 22:41:24 +0300 Subject: [POWERPC] 8xx: powerpc port of core CPM PIC This covers common CPM access functions, CPM interrupt controller code, micropatch and a few compatibility things to kee the same driver base working with arch/ppc. This version is refined with all the comments (mostly PIC-related) addressed. Signed-off-by: Vitaly Bordug Signed-off-by: Paul Mackerras --- arch/powerpc/sysdev/Makefile | 2 + arch/powerpc/sysdev/commproc.c | 398 +++++++++++++++++++++ arch/powerpc/sysdev/micropatch.c | 743 +++++++++++++++++++++++++++++++++++++++ arch/powerpc/sysdev/mpc8xx_pic.c | 197 +++++++++++ arch/powerpc/sysdev/mpc8xx_pic.h | 12 + include/asm-powerpc/fs_pd.h | 45 ++- include/asm-powerpc/mpc8xx.h | 24 ++ include/asm-powerpc/time.h | 2 + include/asm-ppc/commproc.h | 1 + 9 files changed, 1414 insertions(+), 10 deletions(-) create mode 100644 arch/powerpc/sysdev/commproc.c create mode 100644 arch/powerpc/sysdev/micropatch.c create mode 100644 arch/powerpc/sysdev/mpc8xx_pic.c create mode 100644 arch/powerpc/sysdev/mpc8xx_pic.h create mode 100644 include/asm-powerpc/mpc8xx.h (limited to 'arch/powerpc/sysdev') diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile index 2621a7e72d2..85dcdf17841 100644 --- a/arch/powerpc/sysdev/Makefile +++ b/arch/powerpc/sysdev/Makefile @@ -22,4 +22,6 @@ endif ifeq ($(ARCH),powerpc) obj-$(CONFIG_MTD) += rom.o obj-$(CONFIG_CPM2) += cpm2_common.o cpm2_pic.o +obj-$(CONFIG_8xx) += mpc8xx_pic.o commproc.o +obj-$(CONFIG_UCODE_PATCH) += micropatch.o endif diff --git a/arch/powerpc/sysdev/commproc.c b/arch/powerpc/sysdev/commproc.c new file mode 100644 index 00000000000..9b4fafd9a84 --- /dev/null +++ b/arch/powerpc/sysdev/commproc.c @@ -0,0 +1,398 @@ +/* + * General Purpose functions for the global management of the + * Communication Processor Module. + * Copyright (c) 1997 Dan error_act (dmalek@jlc.net) + * + * In addition to the individual control of the communication + * channels, there are a few functions that globally affect the + * communication processor. + * + * Buffer descriptors must be allocated from the dual ported memory + * space. The allocator for that is here. When the communication + * process is reset, we reclaim the memory available. There is + * currently no deallocator for this memory. + * The amount of space available is platform dependent. On the + * MBX, the EPPC software loads additional microcode into the + * communication processor, and uses some of the DP ram for this + * purpose. Current, the first 512 bytes and the last 256 bytes of + * memory are used. Right now I am conservative and only use the + * memory that can never be used for microcode. If there are + * applications that require more DP ram, we can expand the boundaries + * but then we have to be careful of any downloaded microcode. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define CPM_MAP_SIZE (0x4000) + +static void m8xx_cpm_dpinit(void); +static uint host_buffer; /* One page of host buffer */ +static uint host_end; /* end + 1 */ +cpm8xx_t *cpmp; /* Pointer to comm processor space */ +cpic8xx_t *cpic_reg; + +static struct device_node *cpm_pic_node; +static struct irq_host *cpm_pic_host; + +static void cpm_mask_irq(unsigned int irq) +{ + unsigned int cpm_vec = (unsigned int)irq_map[irq].hwirq; + + clrbits32(&cpic_reg->cpic_cimr, (1 << cpm_vec)); +} + +static void cpm_unmask_irq(unsigned int irq) +{ + unsigned int cpm_vec = (unsigned int)irq_map[irq].hwirq; + + setbits32(&cpic_reg->cpic_cimr, (1 << cpm_vec)); +} + +static void cpm_end_irq(unsigned int irq) +{ + unsigned int cpm_vec = (unsigned int)irq_map[irq].hwirq; + + out_be32(&cpic_reg->cpic_cisr, (1 << cpm_vec)); +} + +static struct irq_chip cpm_pic = { + .typename = " CPM PIC ", + .mask = cpm_mask_irq, + .unmask = cpm_unmask_irq, + .eoi = cpm_end_irq, +}; + +int cpm_get_irq(void) +{ + int cpm_vec; + + /* Get the vector by setting the ACK bit and then reading + * the register. + */ + out_be16(&cpic_reg->cpic_civr, 1); + cpm_vec = in_be16(&cpic_reg->cpic_civr); + cpm_vec >>= 11; + + return irq_linear_revmap(cpm_pic_host, cpm_vec); +} + +static int cpm_pic_host_match(struct irq_host *h, struct device_node *node) +{ + return cpm_pic_node == node; +} + +static int cpm_pic_host_map(struct irq_host *h, unsigned int virq, + irq_hw_number_t hw) +{ + pr_debug("cpm_pic_host_map(%d, 0x%lx)\n", virq, hw); + + get_irq_desc(virq)->status |= IRQ_LEVEL; + set_irq_chip_and_handler(virq, &cpm_pic, handle_fasteoi_irq); + return 0; +} + +/* The CPM can generate the error interrupt when there is a race condition + * between generating and masking interrupts. All we have to do is ACK it + * and return. This is a no-op function so we don't need any special + * tests in the interrupt handler. + */ +static irqreturn_t cpm_error_interrupt(int irq, void *dev) +{ + return IRQ_HANDLED; +} + +static struct irqaction cpm_error_irqaction = { + .handler = cpm_error_interrupt, + .mask = CPU_MASK_NONE, + .name = "error", +}; + +static struct irq_host_ops cpm_pic_host_ops = { + .match = cpm_pic_host_match, + .map = cpm_pic_host_map, +}; + +unsigned int cpm_pic_init(void) +{ + struct device_node *np = NULL; + struct resource res; + unsigned int sirq = NO_IRQ, hwirq, eirq; + int ret; + + pr_debug("cpm_pic_init\n"); + + np = of_find_compatible_node(NULL, "cpm-pic", "CPM"); + if (np == NULL) { + printk(KERN_ERR "CPM PIC init: can not find cpm-pic node\n"); + return sirq; + } + ret = of_address_to_resource(np, 0, &res); + if (ret) + goto end; + + cpic_reg = (void *)ioremap(res.start, res.end - res.start + 1); + if (cpic_reg == NULL) + goto end; + + sirq = irq_of_parse_and_map(np, 0); + if (sirq == NO_IRQ) + goto end; + + /* Initialize the CPM interrupt controller. */ + hwirq = (unsigned int)irq_map[sirq].hwirq; + out_be32(&cpic_reg->cpic_cicr, + (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) | + ((hwirq/2) << 13) | CICR_HP_MASK); + + out_be32(&cpic_reg->cpic_cimr, 0); + + cpm_pic_node = of_node_get(np); + + cpm_pic_host = irq_alloc_host(IRQ_HOST_MAP_LINEAR, 64, &cpm_pic_host_ops, 64); + if (cpm_pic_host == NULL) { + printk(KERN_ERR "CPM2 PIC: failed to allocate irq host!\n"); + sirq = NO_IRQ; + goto end; + } + of_node_put(np); + + /* Install our own error handler. */ + np = of_find_node_by_type(NULL, "cpm"); + if (np == NULL) { + printk(KERN_ERR "CPM PIC init: can not find cpm node\n"); + goto end; + } + eirq= irq_of_parse_and_map(np, 0); + if (eirq == NO_IRQ) + goto end; + + if (setup_irq(eirq, &cpm_error_irqaction)) + printk(KERN_ERR "Could not allocate CPM error IRQ!"); + + setbits32(&cpic_reg->cpic_cicr, CICR_IEN); + +end: + of_node_put(np); + return sirq; +} + +void cpm_reset(void) +{ + cpm8xx_t *commproc; + sysconf8xx_t *siu_conf; + + commproc = (cpm8xx_t *)ioremap(CPM_MAP_ADDR, CPM_MAP_SIZE); + +#ifdef CONFIG_UCODE_PATCH + /* Perform a reset. + */ + out_be16(&commproc->cp_cpcr, CPM_CR_RST | CPM_CR_FLG); + + /* Wait for it. + */ + while (in_be16(&commproc->cp_cpcr) & CPM_CR_FLG); + + cpm_load_patch(commproc); +#endif + + /* Set SDMA Bus Request priority 5. + * On 860T, this also enables FEC priority 6. I am not sure + * this is what we realy want for some applications, but the + * manual recommends it. + * Bit 25, FAM can also be set to use FEC aggressive mode (860T). + */ + siu_conf = (sysconf8xx_t*)immr_map(im_siu_conf); + out_be32(&siu_conf->sc_sdcr, 1); + immr_unmap(siu_conf); + + /* Reclaim the DP memory for our use. */ + m8xx_cpm_dpinit(); + + /* Tell everyone where the comm processor resides. + */ + cpmp = commproc; +} + +/* We used to do this earlier, but have to postpone as long as possible + * to ensure the kernel VM is now running. + */ +static void +alloc_host_memory(void) +{ + dma_addr_t physaddr; + + /* Set the host page for allocation. + */ + host_buffer = (uint)dma_alloc_coherent(NULL, PAGE_SIZE, &physaddr, + GFP_KERNEL); + host_end = host_buffer + PAGE_SIZE; +} + +/* We also own one page of host buffer space for the allocation of + * UART "fifos" and the like. + */ +uint +m8xx_cpm_hostalloc(uint size) +{ + uint retloc; + + if (host_buffer == 0) + alloc_host_memory(); + + if ((host_buffer + size) >= host_end) + return(0); + + retloc = host_buffer; + host_buffer += size; + + return(retloc); +} + +/* Set a baud rate generator. This needs lots of work. There are + * four BRGs, any of which can be wired to any channel. + * The internal baud rate clock is the system clock divided by 16. + * This assumes the baudrate is 16x oversampled by the uart. + */ +#define BRG_INT_CLK (get_brgfreq()) +#define BRG_UART_CLK (BRG_INT_CLK/16) +#define BRG_UART_CLK_DIV16 (BRG_UART_CLK/16) + +void +cpm_setbrg(uint brg, uint rate) +{ + volatile uint *bp; + + /* This is good enough to get SMCs running..... + */ + bp = (uint *)&cpmp->cp_brgc1; + bp += brg; + /* The BRG has a 12-bit counter. For really slow baud rates (or + * really fast processors), we may have to further divide by 16. + */ + if (((BRG_UART_CLK / rate) - 1) < 4096) + *bp = (((BRG_UART_CLK / rate) - 1) << 1) | CPM_BRG_EN; + else + *bp = (((BRG_UART_CLK_DIV16 / rate) - 1) << 1) | + CPM_BRG_EN | CPM_BRG_DIV16; +} + +/* + * dpalloc / dpfree bits. + */ +static spinlock_t cpm_dpmem_lock; +/* + * 16 blocks should be enough to satisfy all requests + * until the memory subsystem goes up... + */ +static rh_block_t cpm_boot_dpmem_rh_block[16]; +static rh_info_t cpm_dpmem_info; + +#define CPM_DPMEM_ALIGNMENT 8 +static u8* dpram_vbase; +static uint dpram_pbase; + +void m8xx_cpm_dpinit(void) +{ + spin_lock_init(&cpm_dpmem_lock); + + dpram_vbase = immr_map_size(im_cpm.cp_dpmem, CPM_DATAONLY_BASE + CPM_DATAONLY_SIZE); + dpram_pbase = (uint)&((immap_t *)IMAP_ADDR)->im_cpm.cp_dpmem; + + /* Initialize the info header */ + rh_init(&cpm_dpmem_info, CPM_DPMEM_ALIGNMENT, + sizeof(cpm_boot_dpmem_rh_block) / + sizeof(cpm_boot_dpmem_rh_block[0]), + cpm_boot_dpmem_rh_block); + + /* + * Attach the usable dpmem area. + * XXX: This is actually crap. CPM_DATAONLY_BASE and + * CPM_DATAONLY_SIZE are a subset of the available dparm. It varies + * with the processor and the microcode patches applied / activated. + * But the following should be at least safe. + */ + rh_attach_region(&cpm_dpmem_info, (void *)CPM_DATAONLY_BASE, CPM_DATAONLY_SIZE); +} + +/* + * Allocate the requested size worth of DP memory. + * This function returns an offset into the DPRAM area. + * Use cpm_dpram_addr() to get the virtual address of the area. + */ +uint cpm_dpalloc(uint size, uint align) +{ + void *start; + unsigned long flags; + + spin_lock_irqsave(&cpm_dpmem_lock, flags); + cpm_dpmem_info.alignment = align; + start = rh_alloc(&cpm_dpmem_info, size, "commproc"); + spin_unlock_irqrestore(&cpm_dpmem_lock, flags); + + return (uint)start; +} +EXPORT_SYMBOL(cpm_dpalloc); + +int cpm_dpfree(uint offset) +{ + int ret; + unsigned long flags; + + spin_lock_irqsave(&cpm_dpmem_lock, flags); + ret = rh_free(&cpm_dpmem_info, (void *)offset); + spin_unlock_irqrestore(&cpm_dpmem_lock, flags); + + return ret; +} +EXPORT_SYMBOL(cpm_dpfree); + +uint cpm_dpalloc_fixed(uint offset, uint size, uint align) +{ + void *start; + unsigned long flags; + + spin_lock_irqsave(&cpm_dpmem_lock, flags); + cpm_dpmem_info.alignment = align; + start = rh_alloc_fixed(&cpm_dpmem_info, (void *)offset, size, "commproc"); + spin_unlock_irqrestore(&cpm_dpmem_lock, flags); + + return (uint)start; +} +EXPORT_SYMBOL(cpm_dpalloc_fixed); + +void cpm_dpdump(void) +{ + rh_dump(&cpm_dpmem_info); +} +EXPORT_SYMBOL(cpm_dpdump); + +void *cpm_dpram_addr(uint offset) +{ + return (void *)(dpram_vbase + offset); +} +EXPORT_SYMBOL(cpm_dpram_addr); + +uint cpm_dpram_phys(u8* addr) +{ + return (dpram_pbase + (uint)(addr - dpram_vbase)); +} +EXPORT_SYMBOL(cpm_dpram_addr); diff --git a/arch/powerpc/sysdev/micropatch.c b/arch/powerpc/sysdev/micropatch.c new file mode 100644 index 00000000000..712b10a55f8 --- /dev/null +++ b/arch/powerpc/sysdev/micropatch.c @@ -0,0 +1,743 @@ + +/* Microcode patches for the CPM as supplied by Motorola. + * This is the one for IIC/SPI. There is a newer one that + * also relocates SMC2, but this would require additional changes + * to uart.c, so I am holding off on that for a moment. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * I2C/SPI relocation patch arrays. + */ + +#ifdef CONFIG_I2C_SPI_UCODE_PATCH + +uint patch_2000[] = { + 0x7FFFEFD9, + 0x3FFD0000, + 0x7FFB49F7, + 0x7FF90000, + 0x5FEFADF7, + 0x5F89ADF7, + 0x5FEFAFF7, + 0x5F89AFF7, + 0x3A9CFBC8, + 0xE7C0EDF0, + 0x77C1E1BB, + 0xF4DC7F1D, + 0xABAD932F, + 0x4E08FDCF, + 0x6E0FAFF8, + 0x7CCF76CF, + 0xFD1FF9CF, + 0xABF88DC6, + 0xAB5679F7, + 0xB0937383, + 0xDFCE79F7, + 0xB091E6BB, + 0xE5BBE74F, + 0xB3FA6F0F, + 0x6FFB76CE, + 0xEE0DF9CF, + 0x2BFBEFEF, + 0xCFEEF9CF, + 0x76CEAD24, + 0x90B2DF9A, + 0x7FDDD0BF, + 0x4BF847FD, + 0x7CCF76CE, + 0xCFEF7E1F, + 0x7F1D7DFD, + 0xF0B6EF71, + 0x7FC177C1, + 0xFBC86079, + 0xE722FBC8, + 0x5FFFDFFF, + 0x5FB2FFFB, + 0xFBC8F3C8, + 0x94A67F01, + 0x7F1D5F39, + 0xAFE85F5E, + 0xFFDFDF96, + 0xCB9FAF7D, + 0x5FC1AFED, + 0x8C1C5FC1, + 0xAFDD5FC3, + 0xDF9A7EFD, + 0xB0B25FB2, + 0xFFFEABAD, + 0x5FB2FFFE, + 0x5FCE600B, + 0xE6BB600B, + 0x5FCEDFC6, + 0x27FBEFDF, + 0x5FC8CFDE, + 0x3A9CE7C0, + 0xEDF0F3C8, + 0x7F0154CD, + 0x7F1D2D3D, + 0x363A7570, + 0x7E0AF1CE, + 0x37EF2E68, + 0x7FEE10EC, + 0xADF8EFDE, + 0xCFEAE52F, + 0x7D0FE12B, + 0xF1CE5F65, + 0x7E0A4DF8, + 0xCFEA5F72, + 0x7D0BEFEE, + 0xCFEA5F74, + 0xE522EFDE, + 0x5F74CFDA, + 0x0B627385, + 0xDF627E0A, + 0x30D8145B, + 0xBFFFF3C8, + 0x5FFFDFFF, + 0xA7F85F5E, + 0xBFFE7F7D, + 0x10D31450, + 0x5F36BFFF, + 0xAF785F5E, + 0xBFFDA7F8, + 0x5F36BFFE, + 0x77FD30C0, + 0x4E08FDCF, + 0xE5FF6E0F, + 0xAFF87E1F, + 0x7E0FFD1F, + 0xF1CF5F1B, + 0xABF80D5E, + 0x5F5EFFEF, + 0x79F730A2, + 0xAFDD5F34, + 0x47F85F34, + 0xAFED7FDD, + 0x50B24978, + 0x47FD7F1D, + 0x7DFD70AD, + 0xEF717EC1, + 0x6BA47F01, + 0x2D267EFD, + 0x30DE5F5E, + 0xFFFD5F5E, + 0xFFEF5F5E, + 0xFFDF0CA0, + 0xAFED0A9E, + 0xAFDD0C3A, + 0x5F3AAFBD, + 0x7FBDB082, + 0x5F8247F8 +}; + +uint patch_2f00[] = { + 0x3E303430, + 0x34343737, + 0xABF7BF9B, + 0x994B4FBD, + 0xBD599493, + 0x349FFF37, + 0xFB9B177D, + 0xD9936956, + 0xBBFDD697, + 0xBDD2FD11, + 0x31DB9BB3, + 0x63139637, + 0x93733693, + 0x193137F7, + 0x331737AF, + 0x7BB9B999, + 0xBB197957, + 0x7FDFD3D5, + 0x73B773F7, + 0x37933B99, + 0x1D115316, + 0x99315315, + 0x31694BF4, + 0xFBDBD359, + 0x31497353, + 0x76956D69, + 0x7B9D9693, + 0x13131979, + 0x79376935 +}; +#endif + +/* + * I2C/SPI/SMC1 relocation patch arrays. + */ + +#ifdef CONFIG_I2C_SPI_SMC1_UCODE_PATCH + +uint patch_2000[] = { + 0x3fff0000, + 0x3ffd0000, + 0x3ffb0000, + 0x3ff90000, + 0x5f13eff8, + 0x5eb5eff8, + 0x5f88adf7, + 0x5fefadf7, + 0x3a9cfbc8, + 0x77cae1bb, + 0xf4de7fad, + 0xabae9330, + 0x4e08fdcf, + 0x6e0faff8, + 0x7ccf76cf, + 0xfdaff9cf, + 0xabf88dc8, + 0xab5879f7, + 0xb0925d8d, + 0xdfd079f7, + 0xb090e6bb, + 0xe5bbe74f, + 0x9e046f0f, + 0x6ffb76ce, + 0xee0cf9cf, + 0x2bfbefef, + 0xcfeef9cf, + 0x76cead23, + 0x90b3df99, + 0x7fddd0c1, + 0x4bf847fd, + 0x7ccf76ce, + 0xcfef77ca, + 0x7eaf7fad, + 0x7dfdf0b7, + 0xef7a7fca, + 0x77cafbc8, + 0x6079e722, + 0xfbc85fff, + 0xdfff5fb3, + 0xfffbfbc8, + 0xf3c894a5, + 0xe7c9edf9, + 0x7f9a7fad, + 0x5f36afe8, + 0x5f5bffdf, + 0xdf95cb9e, + 0xaf7d5fc3, + 0xafed8c1b, + 0x5fc3afdd, + 0x5fc5df99, + 0x7efdb0b3, + 0x5fb3fffe, + 0xabae5fb3, + 0xfffe5fd0, + 0x600be6bb, + 0x600b5fd0, + 0xdfc827fb, + 0xefdf5fca, + 0xcfde3a9c, + 0xe7c9edf9, + 0xf3c87f9e, + 0x54ca7fed, + 0x2d3a3637, + 0x756f7e9a, + 0xf1ce37ef, + 0x2e677fee, + 0x10ebadf8, + 0xefdecfea, + 0xe52f7d9f, + 0xe12bf1ce, + 0x5f647e9a, + 0x4df8cfea, + 0x5f717d9b, + 0xefeecfea, + 0x5f73e522, + 0xefde5f73, + 0xcfda0b61, + 0x5d8fdf61, + 0xe7c9edf9, + 0x7e9a30d5, + 0x1458bfff, + 0xf3c85fff, + 0xdfffa7f8, + 0x5f5bbffe, + 0x7f7d10d0, + 0x144d5f33, + 0xbfffaf78, + 0x5f5bbffd, + 0xa7f85f33, + 0xbffe77fd, + 0x30bd4e08, + 0xfdcfe5ff, + 0x6e0faff8, + 0x7eef7e9f, + 0xfdeff1cf, + 0x5f17abf8, + 0x0d5b5f5b, + 0xffef79f7, + 0x309eafdd, + 0x5f3147f8, + 0x5f31afed, + 0x7fdd50af, + 0x497847fd, + 0x7f9e7fed, + 0x7dfd70a9, + 0xef7e7ece, + 0x6ba07f9e, + 0x2d227efd, + 0x30db5f5b, + 0xfffd5f5b, + 0xffef5f5b, + 0xffdf0c9c, + 0xafed0a9a, + 0xafdd0c37, + 0x5f37afbd, + 0x7fbdb081, + 0x5f8147f8, + 0x3a11e710, + 0xedf0ccdd, + 0xf3186d0a, + 0x7f0e5f06, + 0x7fedbb38, + 0x3afe7468, + 0x7fedf4fc, + 0x8ffbb951, + 0xb85f77fd, + 0xb0df5ddd, + 0xdefe7fed, + 0x90e1e74d, + 0x6f0dcbf7, + 0xe7decfed, + 0xcb74cfed, + 0xcfeddf6d, + 0x91714f74, + 0x5dd2deef, + 0x9e04e7df, + 0xefbb6ffb, + 0xe7ef7f0e, + 0x9e097fed, + 0xebdbeffa, + 0xeb54affb, + 0x7fea90d7, + 0x7e0cf0c3, + 0xbffff318, + 0x5fffdfff, + 0xac59efea, + 0x7fce1ee5, + 0xe2ff5ee1, + 0xaffbe2ff, + 0x5ee3affb, + 0xf9cc7d0f, + 0xaef8770f, + 0x7d0fb0c6, + 0xeffbbfff, + 0xcfef5ede, + 0x7d0fbfff, + 0x5ede4cf8, + 0x7fddd0bf, + 0x49f847fd, + 0x7efdf0bb, + 0x7fedfffd, + 0x7dfdf0b7, + 0xef7e7e1e, + 0x5ede7f0e, + 0x3a11e710, + 0xedf0ccab, + 0xfb18ad2e, + 0x1ea9bbb8, + 0x74283b7e, + 0x73c2e4bb, + 0x2ada4fb8, + 0xdc21e4bb, + 0xb2a1ffbf, + 0x5e2c43f8, + 0xfc87e1bb, + 0xe74ffd91, + 0x6f0f4fe8, + 0xc7ba32e2, + 0xf396efeb, + 0x600b4f78, + 0xe5bb760b, + 0x53acaef8, + 0x4ef88b0e, + 0xcfef9e09, + 0xabf8751f, + 0xefef5bac, + 0x741f4fe8, + 0x751e760d, + 0x7fdbf081, + 0x741cafce, + 0xefcc7fce, + 0x751e70ac, + 0x741ce7bb, + 0x3372cfed, + 0xafdbefeb, + 0xe5bb760b, + 0x53f2aef8, + 0xafe8e7eb, + 0x4bf8771e, + 0x7e247fed, + 0x4fcbe2cc, + 0x7fbc30a9, + 0x7b0f7a0f, + 0x34d577fd, + 0x308b5db7, + 0xde553e5f, + 0xaf78741f, + 0x741f30f0, + 0xcfef5e2c, + 0x741f3eac, + 0xafb8771e, + 0x5e677fed, + 0x0bd3e2cc, + 0x741ccfec, + 0xe5ca53cd, + 0x6fcb4f74, + 0x5dadde4b, + 0x2ab63d38, + 0x4bb3de30, + 0x751f741c, + 0x6c42effa, + 0xefea7fce, + 0x6ffc30be, + 0xefec3fca, + 0x30b3de2e, + 0xadf85d9e, + 0xaf7daefd, + 0x5d9ede2e, + 0x5d9eafdd, + 0x761f10ac, + 0x1da07efd, + 0x30adfffe, + 0x4908fb18, + 0x5fffdfff, + 0xafbb709b, + 0x4ef85e67, + 0xadf814ad, + 0x7a0f70ad, + 0xcfef50ad, + 0x7a0fde30, + 0x5da0afed, + 0x3c12780f, + 0xefef780f, + 0xefef790f, + 0xa7f85e0f, + 0xffef790f, + 0xefef790f, + 0x14adde2e, + 0x5d9eadfd, + 0x5e2dfffb, + 0xe79addfd, + 0xeff96079, + 0x607ae79a, + 0xddfceff9, + 0x60795dff, + 0x607acfef, + 0xefefefdf, + 0xefbfef7f, + 0xeeffedff, + 0xebffe7ff, + 0xafefafdf, + 0xafbfaf7f, + 0xaeffadff, + 0xabffa7ff, + 0x6fef6fdf, + 0x6fbf6f7f, + 0x6eff6dff, + 0x6bff67ff, + 0x2fef2fdf, + 0x2fbf2f7f, + 0x2eff2dff, + 0x2bff27ff, + 0x4e08fd1f, + 0xe5ff6e0f, + 0xaff87eef, + 0x7e0ffdef, + 0xf11f6079, + 0xabf8f542, + 0x7e0af11c, + 0x37cfae3a, + 0x7fec90be, + 0xadf8efdc, + 0xcfeae52f, + 0x7d0fe12b, + 0xf11c6079, + 0x7e0a4df8, + 0xcfea5dc4, + 0x7d0befec, + 0xcfea5dc6, + 0xe522efdc, + 0x5dc6cfda, + 0x4e08fd1f, + 0x6e0faff8, + 0x7c1f761f, + 0xfdeff91f, + 0x6079abf8, + 0x761cee24, + 0xf91f2bfb, + 0xefefcfec, + 0xf91f6079, + 0x761c27fb, + 0xefdf5da7, + 0xcfdc7fdd, + 0xd09c4bf8, + 0x47fd7c1f, + 0x761ccfcf, + 0x7eef7fed, + 0x7dfdf093, + 0xef7e7f1e, + 0x771efb18, + 0x6079e722, + 0xe6bbe5bb, + 0xae0ae5bb, + 0x600bae85, + 0xe2bbe2bb, + 0xe2bbe2bb, + 0xaf02e2bb, + 0xe2bb2ff9, + 0x6079e2bb +}; + +uint patch_2f00[] = { + 0x30303030, + 0x3e3e3434, + 0xabbf9b99, + 0x4b4fbdbd, + 0x59949334, + 0x9fff37fb, + 0x9b177dd9, + 0x936956bb, + 0xfbdd697b, + 0xdd2fd113, + 0x1db9f7bb, + 0x36313963, + 0x79373369, + 0x3193137f, + 0x7331737a, + 0xf7bb9b99, + 0x9bb19795, + 0x77fdfd3d, + 0x573b773f, + 0x737933f7, + 0xb991d115, + 0x31699315, + 0x31531694, + 0xbf4fbdbd, + 0x35931497, + 0x35376956, + 0xbd697b9d, + 0x96931313, + 0x19797937, + 0x6935af78, + 0xb9b3baa3, + 0xb8788683, + 0x368f78f7, + 0x87778733, + 0x3ffffb3b, + 0x8e8f78b8, + 0x1d118e13, + 0xf3ff3f8b, + 0x6bd8e173, + 0xd1366856, + 0x68d1687b, + 0x3daf78b8, + 0x3a3a3f87, + 0x8f81378f, + 0xf876f887, + 0x77fd8778, + 0x737de8d6, + 0xbbf8bfff, + 0xd8df87f7, + 0xfd876f7b, + 0x8bfff8bd, + 0x8683387d, + 0xb873d87b, + 0x3b8fd7f8, + 0xf7338883, + 0xbb8ee1f8, + 0xef837377, + 0x3337b836, + 0x817d11f8, + 0x7378b878, + 0xd3368b7d, + 0xed731b7d, + 0x833731f3, + 0xf22f3f23 +}; + +uint patch_2e00[] = { + 0x27eeeeee, + 0xeeeeeeee, + 0xeeeeeeee, + 0xeeeeeeee, + 0xee4bf4fb, + 0xdbd259bb, + 0x1979577f, + 0xdfd2d573, + 0xb773f737, + 0x4b4fbdbd, + 0x25b9b177, + 0xd2d17376, + 0x956bbfdd, + 0x697bdd2f, + 0xff9f79ff, + 0xff9ff22f +}; +#endif + +/* + * USB SOF patch arrays. + */ + +#ifdef CONFIG_USB_SOF_UCODE_PATCH + +uint patch_2000[] = { + 0x7fff0000, + 0x7ffd0000, + 0x7ffb0000, + 0x49f7ba5b, + 0xba383ffb, + 0xf9b8b46d, + 0xe5ab4e07, + 0xaf77bffe, + 0x3f7bbf79, + 0xba5bba38, + 0xe7676076, + 0x60750000 +}; + +uint patch_2f00[] = { + 0x3030304c, + 0xcab9e441, + 0xa1aaf220 +}; +#endif + +void +cpm_load_patch(cpm8xx_t *cp) +{ + volatile uint *dp; /* Dual-ported RAM. */ + volatile cpm8xx_t *commproc; + volatile iic_t *iip; + volatile spi_t *spp; + volatile smc_uart_t *smp; + int i; + + commproc = cp; + +#ifdef CONFIG_USB_SOF_UCODE_PATCH + commproc->cp_rccr = 0; + + dp = (uint *)(commproc->cp_dpmem); + for (i=0; i<(sizeof(patch_2000)/4); i++) + *dp++ = patch_2000[i]; + + dp = (uint *)&(commproc->cp_dpmem[0x0f00]); + for (i=0; i<(sizeof(patch_2f00)/4); i++) + *dp++ = patch_2f00[i]; + + commproc->cp_rccr = 0x0009; + + printk("USB SOF microcode patch installed\n"); +#endif /* CONFIG_USB_SOF_UCODE_PATCH */ + +#if defined(CONFIG_I2C_SPI_UCODE_PATCH) || \ + defined(CONFIG_I2C_SPI_SMC1_UCODE_PATCH) + + commproc->cp_rccr = 0; + + dp = (uint *)(commproc->cp_dpmem); + for (i=0; i<(sizeof(patch_2000)/4); i++) + *dp++ = patch_2000[i]; + + dp = (uint *)&(commproc->cp_dpmem[0x0f00]); + for (i=0; i<(sizeof(patch_2f00)/4); i++) + *dp++ = patch_2f00[i]; + + iip = (iic_t *)&commproc->cp_dparam[PROFF_IIC]; +# define RPBASE 0x0500 + iip->iic_rpbase = RPBASE; + + /* Put SPI above the IIC, also 32-byte aligned. + */ + i = (RPBASE + sizeof(iic_t) + 31) & ~31; + spp = (spi_t *)&commproc->cp_dparam[PROFF_SPI]; + spp->spi_rpbase = i; + +# if defined(CONFIG_I2C_SPI_UCODE_PATCH) + commproc->cp_cpmcr1 = 0x802a; + commproc->cp_cpmcr2 = 0x8028; + commproc->cp_cpmcr3 = 0x802e; + commproc->cp_cpmcr4 = 0x802c; + commproc->cp_rccr = 1; + + printk("I2C/SPI microcode patch installed.\n"); +# endif /* CONFIG_I2C_SPI_UCODE_PATCH */ + +# if defined(CONFIG_I2C_SPI_SMC1_UCODE_PATCH) + + dp = (uint *)&(commproc->cp_dpmem[0x0e00]); + for (i=0; i<(sizeof(patch_2e00)/4); i++) + *dp++ = patch_2e00[i]; + + commproc->cp_cpmcr1 = 0x8080; + commproc->cp_cpmcr2 = 0x808a; + commproc->cp_cpmcr3 = 0x8028; + commproc->cp_cpmcr4 = 0x802a; + commproc->cp_rccr = 3; + + smp = (smc_uart_t *)&commproc->cp_dparam[PROFF_SMC1]; + smp->smc_rpbase = 0x1FC0; + + printk("I2C/SPI/SMC1 microcode patch installed.\n"); +# endif /* CONFIG_I2C_SPI_SMC1_UCODE_PATCH) */ + +#endif /* some variation of the I2C/SPI patch was selected */ +} + +/* + * Take this entire routine out, since no one calls it and its + * logic is suspect. + */ + +#if 0 +void +verify_patch(volatile immap_t *immr) +{ + volatile uint *dp; + volatile cpm8xx_t *commproc; + int i; + + commproc = (cpm8xx_t *)&immr->im_cpm; + + printk("cp_rccr %x\n", commproc->cp_rccr); + commproc->cp_rccr = 0; + + dp = (uint *)(commproc->cp_dpmem); + for (i=0; i<(sizeof(patch_2000)/4); i++) + if (*dp++ != patch_2000[i]) { + printk("patch_2000 bad at %d\n", i); + dp--; + printk("found 0x%X, wanted 0x%X\n", *dp, patch_2000[i]); + break; + } + + dp = (uint *)&(commproc->cp_dpmem[0x0f00]); + for (i=0; i<(sizeof(patch_2f00)/4); i++) + if (*dp++ != patch_2f00[i]) { + printk("patch_2f00 bad at %d\n", i); + dp--; + printk("found 0x%X, wanted 0x%X\n", *dp, patch_2f00[i]); + break; + } + + commproc->cp_rccr = 0x0009; +} +#endif diff --git a/arch/powerpc/sysdev/mpc8xx_pic.c b/arch/powerpc/sysdev/mpc8xx_pic.c new file mode 100644 index 00000000000..2fc2bcd79b5 --- /dev/null +++ b/arch/powerpc/sysdev/mpc8xx_pic.c @@ -0,0 +1,197 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "mpc8xx_pic.h" + + +#define PIC_VEC_SPURRIOUS 15 + +extern int cpm_get_irq(struct pt_regs *regs); + +static struct device_node *mpc8xx_pic_node; +static struct irq_host *mpc8xx_pic_host; +#define NR_MASK_WORDS ((NR_IRQS + 31) / 32) +static unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; +static sysconf8xx_t *siu_reg; + +int cpm_get_irq(struct pt_regs *regs); + +static void mpc8xx_unmask_irq(unsigned int virq) +{ + int bit, word; + unsigned int irq_nr = (unsigned int)irq_map[virq].hwirq; + + bit = irq_nr & 0x1f; + word = irq_nr >> 5; + + ppc_cached_irq_mask[word] |= (1 << (31-bit)); + out_be32(&siu_reg->sc_simask, ppc_cached_irq_mask[word]); +} + +static void mpc8xx_mask_irq(unsigned int virq) +{ + int bit, word; + unsigned int irq_nr = (unsigned int)irq_map[virq].hwirq; + + bit = irq_nr & 0x1f; + word = irq_nr >> 5; + + ppc_cached_irq_mask[word] &= ~(1 << (31-bit)); + out_be32(&siu_reg->sc_simask, ppc_cached_irq_mask[word]); +} + +static void mpc8xx_ack(unsigned int virq) +{ + int bit; + unsigned int irq_nr = (unsigned int)irq_map[virq].hwirq; + + bit = irq_nr & 0x1f; + out_be32(&siu_reg->sc_sipend, 1 << (31-bit)); +} + +static void mpc8xx_end_irq(unsigned int virq) +{ + int bit, word; + unsigned int irq_nr = (unsigned int)irq_map[virq].hwirq; + + bit = irq_nr & 0x1f; + word = irq_nr >> 5; + + ppc_cached_irq_mask[word] |= (1 << (31-bit)); + out_be32(&siu_reg->sc_simask, ppc_cached_irq_mask[word]); +} + +static int mpc8xx_set_irq_type(unsigned int virq, unsigned int flow_type) +{ + struct irq_desc *desc = get_irq_desc(virq); + + desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); + desc->status |= flow_type & IRQ_TYPE_SENSE_MASK; + if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) + desc->status |= IRQ_LEVEL; + + if (flow_type & IRQ_TYPE_EDGE_FALLING) { + irq_hw_number_t hw = (unsigned int)irq_map[virq].hwirq; + unsigned int siel = in_be32(&siu_reg->sc_siel); + + /* only external IRQ senses are programmable */ + if ((hw & 1) == 0) { + siel |= (0x80000000 >> hw); + out_be32(&siu_reg->sc_siel, siel); + desc->handle_irq = handle_edge_irq; + } + } + return 0; +} + +static struct irq_chip mpc8xx_pic = { + .typename = " MPC8XX SIU ", + .unmask = mpc8xx_unmask_irq, + .mask = mpc8xx_mask_irq, + .ack = mpc8xx_ack, + .eoi = mpc8xx_end_irq, + .set_type = mpc8xx_set_irq_type, +}; + +unsigned int mpc8xx_get_irq(void) +{ + int irq; + + /* For MPC8xx, read the SIVEC register and shift the bits down + * to get the irq number. + */ + irq = in_be32(&siu_reg->sc_sivec) >> 26; + + if (irq == PIC_VEC_SPURRIOUS) + irq = NO_IRQ; + + return irq_linear_revmap(mpc8xx_pic_host, irq); + +} + +static int mpc8xx_pic_host_match(struct irq_host *h, struct device_node *node) +{ + return mpc8xx_pic_node == node; +} + +static int mpc8xx_pic_host_map(struct irq_host *h, unsigned int virq, + irq_hw_number_t hw) +{ + pr_debug("mpc8xx_pic_host_map(%d, 0x%lx)\n", virq, hw); + + /* Set default irq handle */ + set_irq_chip_and_handler(virq, &mpc8xx_pic, handle_level_irq); + return 0; +} + + +static int mpc8xx_pic_host_xlate(struct irq_host *h, struct device_node *ct, + u32 *intspec, unsigned int intsize, + irq_hw_number_t *out_hwirq, unsigned int *out_flags) +{ + static unsigned char map_pic_senses[4] = { + IRQ_TYPE_EDGE_RISING, + IRQ_TYPE_LEVEL_LOW, + IRQ_TYPE_LEVEL_HIGH, + IRQ_TYPE_EDGE_FALLING, + }; + + *out_hwirq = intspec[0]; + if (intsize > 1 && intspec[1] < 4) + *out_flags = map_pic_senses[intspec[1]]; + else + *out_flags = IRQ_TYPE_NONE; + + return 0; +} + + +static struct irq_host_ops mpc8xx_pic_host_ops = { + .match = mpc8xx_pic_host_match, + .map = mpc8xx_pic_host_map, + .xlate = mpc8xx_pic_host_xlate, +}; + +int mpc8xx_pic_init(void) +{ + struct resource res; + struct device_node *np = NULL; + int ret; + + np = of_find_node_by_type(np, "mpc8xx-pic"); + + if (np == NULL) { + printk(KERN_ERR "Could not find open-pic node\n"); + return -ENOMEM; + } + + mpc8xx_pic_node = of_node_get(np); + + ret = of_address_to_resource(np, 0, &res); + of_node_put(np); + if (ret) + return ret; + + siu_reg = (void *)ioremap(res.start, res.end - res.start + 1); + if (siu_reg == NULL) + return -EINVAL; + + mpc8xx_pic_host = irq_alloc_host(IRQ_HOST_MAP_LINEAR, 64, &mpc8xx_pic_host_ops, 64); + if (mpc8xx_pic_host == NULL) { + printk(KERN_ERR "MPC8xx PIC: failed to allocate irq host!\n"); + ret = -ENOMEM; + } + + return ret; +} diff --git a/arch/powerpc/sysdev/mpc8xx_pic.h b/arch/powerpc/sysdev/mpc8xx_pic.h new file mode 100644 index 00000000000..afa2ee6717c --- /dev/null +++ b/arch/powerpc/sysdev/mpc8xx_pic.h @@ -0,0 +1,12 @@ +#ifndef _PPC_KERNEL_MPC8xx_H +#define _PPC_KERNEL_MPC8xx_H + +#include +#include + +extern struct hw_interrupt_type mpc8xx_pic; + +int mpc8xx_pic_init(void); +unsigned int mpc8xx_get_irq(void); + +#endif /* _PPC_KERNEL_PPC8xx_H */ diff --git a/include/asm-powerpc/fs_pd.h b/include/asm-powerpc/fs_pd.h index 3d0e819d37f..1e2962fc4fa 100644 --- a/include/asm-powerpc/fs_pd.h +++ b/include/asm-powerpc/fs_pd.h @@ -11,19 +11,11 @@ #ifndef FS_PD_H #define FS_PD_H -#include #include #include -static inline int uart_baudrate(void) -{ - return get_baudrate(); -} - -static inline int uart_clock(void) -{ - return ppc_proc_freq; -} +#ifdef CONFIG_CPM2 +#include #define cpm2_map(member) \ ({ \ @@ -41,5 +33,38 @@ static inline int uart_clock(void) }) #define cpm2_unmap(addr) iounmap(addr) +#endif + +#ifdef CONFIG_8xx +#include +#include + +#define immr_map(member) \ +({ \ + u32 offset = offsetof(immap_t, member); \ + void *addr = ioremap (IMAP_ADDR + offset, \ + sizeof( ((immap_t*)0)->member)); \ + addr; \ +}) + +#define immr_map_size(member, size) \ +({ \ + u32 offset = offsetof(immap_t, member); \ + void *addr = ioremap (IMAP_ADDR + offset, size); \ + addr; \ +}) + +#define immr_unmap(addr) iounmap(addr) +#endif + +static inline int uart_baudrate(void) +{ + return get_baudrate(); +} + +static inline int uart_clock(void) +{ + return ppc_proc_freq; +} #endif diff --git a/include/asm-powerpc/mpc8xx.h b/include/asm-powerpc/mpc8xx.h new file mode 100644 index 00000000000..e05ba6b1b00 --- /dev/null +++ b/include/asm-powerpc/mpc8xx.h @@ -0,0 +1,24 @@ +/* This is the single file included by all MPC8xx build options. + * Since there are many different boards and no standard configuration, + * we have a unique include file for each. Rather than change every + * file that has to include MPC8xx configuration, they all include + * this one and the configuration switching is done here. + */ +#ifdef __KERNEL__ +#ifndef __CONFIG_8xx_DEFS +#define __CONFIG_8xx_DEFS + + +#ifdef CONFIG_8xx + +#ifdef CONFIG_FADS +#include +#endif + +#if defined(CONFIG_MPC885ADS) +#include +#endif + +#endif /* CONFIG_8xx */ +#endif /* __CONFIG_8xx_DEFS */ +#endif /* __KERNEL__ */ diff --git a/include/asm-powerpc/time.h b/include/asm-powerpc/time.h index 4cff977ad52..3fd57c048f5 100644 --- a/include/asm-powerpc/time.h +++ b/include/asm-powerpc/time.h @@ -39,6 +39,8 @@ extern void generic_calibrate_decr(void); extern void wakeup_decrementer(void); extern void snapshot_timebase(void); +extern void set_dec_cpu6(unsigned int val); + /* Some sane defaults: 125 MHz timebase, 1GHz processor */ extern unsigned long ppc_proc_freq; #define DEFAULT_PROC_FREQ (DEFAULT_TB_FREQ * 8) diff --git a/include/asm-ppc/commproc.h b/include/asm-ppc/commproc.h index 7b06b4e6bf3..4f99df1bafd 100644 --- a/include/asm-ppc/commproc.h +++ b/include/asm-ppc/commproc.h @@ -77,6 +77,7 @@ extern int cpm_dpfree(uint offset); extern uint cpm_dpalloc_fixed(uint offset, uint size, uint align); extern void cpm_dpdump(void); extern void *cpm_dpram_addr(uint offset); +extern uint cpm_dpram_phys(u8* addr); extern void cpm_setbrg(uint brg, uint rate); extern uint m8xx_cpm_hostalloc(uint size); -- cgit v1.2.3-70-g09d2 From 7df2457db83bc922fcc8b462526b77f1ffe8c84b Mon Sep 17 00:00:00 2001 From: Olof Johansson Date: Sun, 28 Jan 2007 23:33:18 -0600 Subject: [POWERPC] MPIC: support more than 256 sources Allow more than the default 256 MPIC sources. Allocates a new flag (MPIC_LARGE_VECTORS) to be used by platform code when instantiating the mpic. I picked 11 bits worth right now since it would cover the number of sources on any hardware I have seen. It can always be increased later if needed. Signed-off-by: Olof Johansson Signed-off-by: Paul Mackerras --- arch/powerpc/platforms/pasemi/setup.c | 5 +-- arch/powerpc/sysdev/mpic.c | 64 +++++++++++++++++++++++------------ include/asm-powerpc/mpic.h | 24 +++++-------- 3 files changed, 54 insertions(+), 39 deletions(-) (limited to 'arch/powerpc/sysdev') diff --git a/arch/powerpc/platforms/pasemi/setup.c b/arch/powerpc/platforms/pasemi/setup.c index bea7d1bb1a3..0505dd884ae 100644 --- a/arch/powerpc/platforms/pasemi/setup.c +++ b/arch/powerpc/platforms/pasemi/setup.c @@ -130,8 +130,9 @@ static __init void pas_init_IRQ(void) openpic_addr = of_read_number(opprop, naddr); printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr); - mpic = mpic_alloc(mpic_node, openpic_addr, MPIC_PRIMARY, 0, 0, - " PAS-OPIC "); + mpic = mpic_alloc(mpic_node, openpic_addr, + MPIC_PRIMARY|MPIC_LARGE_VECTORS, + 0, 0, " PAS-OPIC "); BUG_ON(!mpic); mpic_assign_isu(mpic, 0, openpic_addr + 0x10000); diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index 62262f2a4a8..aa701cc27ec 100644 --- a/arch/powerpc/sysdev/mpic.c +++ b/arch/powerpc/sysdev/mpic.c @@ -496,13 +496,18 @@ static void __init mpic_scan_ht_pics(struct mpic *mpic) static struct mpic *mpic_find(unsigned int irq, unsigned int *is_ipi) { unsigned int src = mpic_irq_to_hw(irq); + struct mpic *mpic; if (irq < NUM_ISA_INTERRUPTS) return NULL; + + mpic = irq_desc[irq].chip_data; + if (is_ipi) - *is_ipi = (src >= MPIC_VEC_IPI_0 && src <= MPIC_VEC_IPI_3); + *is_ipi = (src >= mpic->ipi_vecs[0] && + src <= mpic->ipi_vecs[3]); - return irq_desc[irq].chip_data; + return mpic; } /* Convert a cpu mask from logical to physical cpu numbers. */ @@ -540,7 +545,11 @@ static inline void mpic_eoi(struct mpic *mpic) #ifdef CONFIG_SMP static irqreturn_t mpic_ipi_action(int irq, void *dev_id) { - smp_message_recv(mpic_irq_to_hw(irq) - MPIC_VEC_IPI_0); + struct mpic *mpic; + + mpic = mpic_find(irq, NULL); + smp_message_recv(mpic_irq_to_hw(irq) - mpic->ipi_vecs[0]); + return IRQ_HANDLED; } #endif /* CONFIG_SMP */ @@ -663,7 +672,7 @@ static void mpic_end_ht_irq(unsigned int irq) static void mpic_unmask_ipi(unsigned int irq) { struct mpic *mpic = mpic_from_ipi(irq); - unsigned int src = mpic_irq_to_hw(irq) - MPIC_VEC_IPI_0; + unsigned int src = mpic_irq_to_hw(irq) - mpic->ipi_vecs[0]; DBG("%s: enable_ipi: %d (ipi %d)\n", mpic->name, irq, src); mpic_ipi_write(src, mpic_ipi_read(src) & ~MPIC_VECPRI_MASK); @@ -807,11 +816,11 @@ static int mpic_host_map(struct irq_host *h, unsigned int virq, DBG("mpic: map virq %d, hwirq 0x%lx\n", virq, hw); - if (hw == MPIC_VEC_SPURRIOUS) + if (hw == mpic->spurious_vec) return -EINVAL; #ifdef CONFIG_SMP - else if (hw >= MPIC_VEC_IPI_0) { + else if (hw >= mpic->ipi_vecs[0]) { WARN_ON(!(mpic->flags & MPIC_PRIMARY)); DBG("mpic: mapping as IPI\n"); @@ -904,6 +913,7 @@ struct mpic * __init mpic_alloc(struct device_node *node, u32 reg; const char *vers; int i; + int intvec_top; u64 paddr = phys_addr; mpic = alloc_bootmem(sizeof(struct mpic)); @@ -914,9 +924,9 @@ struct mpic * __init mpic_alloc(struct device_node *node, mpic->name = name; mpic->of_node = of_node_get(node); - mpic->irqhost = irq_alloc_host(IRQ_HOST_MAP_LINEAR, 256, + mpic->irqhost = irq_alloc_host(IRQ_HOST_MAP_LINEAR, isu_size, &mpic_host_ops, - MPIC_VEC_SPURRIOUS); + flags & MPIC_LARGE_VECTORS ? 2048 : 256); if (mpic->irqhost == NULL) { of_node_put(node); return NULL; @@ -944,6 +954,21 @@ struct mpic * __init mpic_alloc(struct device_node *node, mpic->irq_count = irq_count; mpic->num_sources = 0; /* so far */ + if (flags & MPIC_LARGE_VECTORS) + intvec_top = 2047; + else + intvec_top = 255; + + mpic->timer_vecs[0] = intvec_top - 8; + mpic->timer_vecs[1] = intvec_top - 7; + mpic->timer_vecs[2] = intvec_top - 6; + mpic->timer_vecs[3] = intvec_top - 5; + mpic->ipi_vecs[0] = intvec_top - 4; + mpic->ipi_vecs[1] = intvec_top - 3; + mpic->ipi_vecs[2] = intvec_top - 2; + mpic->ipi_vecs[3] = intvec_top - 1; + mpic->spurious_vec = intvec_top; + /* Check for "big-endian" in device-tree */ if (node && get_property(node, "big-endian", NULL) != NULL) mpic->flags |= MPIC_BIG_ENDIAN; @@ -1084,11 +1109,6 @@ void __init mpic_init(struct mpic *mpic) int i; BUG_ON(mpic->num_sources == 0); - WARN_ON(mpic->num_sources > MPIC_VEC_IPI_0); - - /* Sanitize source count */ - if (mpic->num_sources > MPIC_VEC_IPI_0) - mpic->num_sources = MPIC_VEC_IPI_0; printk(KERN_INFO "mpic: Initializing for %d sources\n", mpic->num_sources); @@ -1104,7 +1124,7 @@ void __init mpic_init(struct mpic *mpic) i * MPIC_INFO(TIMER_STRIDE) + MPIC_INFO(TIMER_VECTOR_PRI), MPIC_VECPRI_MASK | - (MPIC_VEC_TIMER_0 + i)); + (mpic->timer_vecs[0] + i)); } /* Initialize IPIs to our reserved vectors and mark them disabled for now */ @@ -1113,7 +1133,7 @@ void __init mpic_init(struct mpic *mpic) mpic_ipi_write(i, MPIC_VECPRI_MASK | (10 << MPIC_VECPRI_PRIORITY_SHIFT) | - (MPIC_VEC_IPI_0 + i)); + (mpic->ipi_vecs[0] + i)); } /* Initialize interrupt sources */ @@ -1136,8 +1156,8 @@ void __init mpic_init(struct mpic *mpic) 1 << hard_smp_processor_id()); } - /* Init spurrious vector */ - mpic_write(mpic->gregs, MPIC_INFO(GREG_SPURIOUS), MPIC_VEC_SPURRIOUS); + /* Init spurious vector */ + mpic_write(mpic->gregs, MPIC_INFO(GREG_SPURIOUS), mpic->spurious_vec); /* Disable 8259 passthrough, if supported */ if (!(mpic->flags & MPIC_NO_PTHROU_DIS)) @@ -1184,9 +1204,9 @@ void mpic_irq_set_priority(unsigned int irq, unsigned int pri) spin_lock_irqsave(&mpic_lock, flags); if (is_ipi) { - reg = mpic_ipi_read(src - MPIC_VEC_IPI_0) & + reg = mpic_ipi_read(src - mpic->ipi_vecs[0]) & ~MPIC_VECPRI_PRIORITY_MASK; - mpic_ipi_write(src - MPIC_VEC_IPI_0, + mpic_ipi_write(src - mpic->ipi_vecs[0], reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT)); } else { reg = mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) @@ -1207,7 +1227,7 @@ unsigned int mpic_irq_get_priority(unsigned int irq) spin_lock_irqsave(&mpic_lock, flags); if (is_ipi) - reg = mpic_ipi_read(src = MPIC_VEC_IPI_0); + reg = mpic_ipi_read(src = mpic->ipi_vecs[0]); else reg = mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)); spin_unlock_irqrestore(&mpic_lock, flags); @@ -1313,7 +1333,7 @@ unsigned int mpic_get_one_irq(struct mpic *mpic) #ifdef DEBUG_LOW DBG("%s: get_one_irq(): %d\n", mpic->name, src); #endif - if (unlikely(src == MPIC_VEC_SPURRIOUS)) + if (unlikely(src == mpic->spurious_vec)) return NO_IRQ; return irq_linear_revmap(mpic->irqhost, src); } @@ -1345,7 +1365,7 @@ void mpic_request_ipis(void) for (i = 0; i < 4; i++) { unsigned int vipi = irq_create_mapping(mpic->irqhost, - MPIC_VEC_IPI_0 + i); + mpic->ipi_vecs[0] + i); if (vipi == NO_IRQ) { printk(KERN_ERR "Failed to map IPI %d\n", i); break; diff --git a/include/asm-powerpc/mpic.h b/include/asm-powerpc/mpic.h index b71e7b32a55..cb204a71e91 100644 --- a/include/asm-powerpc/mpic.h +++ b/include/asm-powerpc/mpic.h @@ -102,21 +102,6 @@ #define MPIC_MAX_CPUS 32 #define MPIC_MAX_ISU 32 -/* - * Special vector numbers (internal use only) - */ -#define MPIC_VEC_SPURRIOUS 255 -#define MPIC_VEC_IPI_3 254 -#define MPIC_VEC_IPI_2 253 -#define MPIC_VEC_IPI_1 252 -#define MPIC_VEC_IPI_0 251 - -/* unused */ -#define MPIC_VEC_TIMER_3 250 -#define MPIC_VEC_TIMER_2 249 -#define MPIC_VEC_TIMER_1 248 -#define MPIC_VEC_TIMER_0 247 - /* * Tsi108 implementation of MPIC has many differences from the original one */ @@ -276,6 +261,13 @@ struct mpic unsigned char *senses; unsigned int senses_count; + /* vector numbers used for internal sources (ipi/timers) */ + unsigned int ipi_vecs[4]; + unsigned int timer_vecs[4]; + + /* Spurious vector to program into unused sources */ + unsigned int spurious_vec; + #ifdef CONFIG_MPIC_BROKEN_U3 /* The fixup table */ struct mpic_irq_fixup *fixups; @@ -332,6 +324,8 @@ struct mpic #define MPIC_NO_PTHROU_DIS 0x00000040 /* DCR based MPIC */ #define MPIC_USES_DCR 0x00000080 +/* MPIC has 11-bit vector fields (or larger) */ +#define MPIC_LARGE_VECTORS 0x00000100 /* MPIC HW modification ID */ #define MPIC_REGSET_MASK 0xf0000000 -- cgit v1.2.3-70-g09d2 From 73844ecbaa58885c5e89af7d1b08faaffffa6833 Mon Sep 17 00:00:00 2001 From: Vitaly Bordug Date: Wed, 31 Jan 2007 02:08:54 +0300 Subject: [POWERPC] cpm2: CPM2 interrupt controller fix This contains important fixes for the CPM2 PIC code. Eliminated CPM_IRQ_OFFSET, pulling the respective interrupt numbers from the interrupt mapping. Updated devicetree files to reflect that. Changed direct IC-related IO accesses to the IO accessors. Fixed all the sense values to keep coherency with ipic. In the current code, CPM2 stuff will have no IRQs and hence could be hardly usable. Signed-off-by: Vitaly Bordug Signed-off-by: Paul Mackerras --- arch/powerpc/boot/dts/mpc8272ads.dts | 47 ++++++----- arch/powerpc/boot/dts/mpc8560ads.dts | 10 +-- arch/powerpc/sysdev/cpm2_pic.c | 150 +++++++++++++++++++++-------------- arch/powerpc/sysdev/cpm2_pic.h | 2 - include/asm-powerpc/mpc8260.h | 24 ++++++ 5 files changed, 145 insertions(+), 88 deletions(-) create mode 100644 include/asm-powerpc/mpc8260.h (limited to 'arch/powerpc/sysdev') diff --git a/arch/powerpc/boot/dts/mpc8272ads.dts b/arch/powerpc/boot/dts/mpc8272ads.dts index 34efdd028c4..286638e8af6 100644 --- a/arch/powerpc/boot/dts/mpc8272ads.dts +++ b/arch/powerpc/boot/dts/mpc8272ads.dts @@ -53,6 +53,13 @@ reg = <00000000 4000000 f4500000 00000020>; }; + chosen { + name = "chosen"; + linux,platform = <0>; + interrupt-controller = <10c00>; + linux,phandle = <400>; + }; + soc8272@f0000000 { #address-cells = <1>; #size-cells = <1>; @@ -71,7 +78,7 @@ ethernet-phy@0 { linux,phandle = <2452000>; interrupt-parent = <10c00>; - interrupts = <19 1>; + interrupts = <17 4>; reg = <0>; bitbang = [ 12 12 13 02 02 01 ]; device_type = "ethernet-phy"; @@ -79,7 +86,7 @@ ethernet-phy@1 { linux,phandle = <2452001>; interrupt-parent = <10c00>; - interrupts = <19 1>; + interrupts = <17 4>; bitbang = [ 12 12 13 02 02 01 ]; reg = <3>; device_type = "ethernet-phy"; @@ -90,7 +97,7 @@ #address-cells = <1>; #size-cells = <0>; device_type = "network"; - device-id = <2>; + device-id = <1>; compatible = "fs_enet"; model = "FCC"; reg = <11300 20 8400 100 11380 30>; @@ -104,7 +111,7 @@ ethernet@25000 { device_type = "network"; - device-id = <3>; + device-id = <2>; compatible = "fs_enet"; model = "FCC"; reg = <11320 20 8500 100 113b0 30>; @@ -133,7 +140,7 @@ device_type = "serial"; compatible = "cpm_uart"; model = "SCC"; - device-id = <2>; + device-id = <1>; reg = <11a00 20 8000 100>; current-speed = <1c200>; interrupts = <28 2>; @@ -147,7 +154,7 @@ device_type = "serial"; compatible = "cpm_uart"; model = "SCC"; - device-id = <5>; + device-id = <4>; reg = <11a60 20 8300 100>; current-speed = <1c200>; interrupts = <2b 2>; @@ -181,24 +188,24 @@ interrupt-map = < /* IDSEL 0x16 */ - b000 0 0 1 f8200000 40 0 - b000 0 0 2 f8200000 41 0 - b000 0 0 3 f8200000 42 0 - b000 0 0 4 f8200000 43 0 + b000 0 0 1 f8200000 40 8 + b000 0 0 2 f8200000 41 8 + b000 0 0 3 f8200000 42 8 + b000 0 0 4 f8200000 43 8 /* IDSEL 0x17 */ - b800 0 0 1 f8200000 43 0 - b800 0 0 2 f8200000 40 0 - b800 0 0 3 f8200000 41 0 - b800 0 0 4 f8200000 42 0 + b800 0 0 1 f8200000 43 8 + b800 0 0 2 f8200000 40 8 + b800 0 0 3 f8200000 41 8 + b800 0 0 4 f8200000 42 8 /* IDSEL 0x18 */ - c000 0 0 1 f8200000 42 0 - c000 0 0 2 f8200000 43 0 - c000 0 0 3 f8200000 40 0 - c000 0 0 4 f8200000 41 0>; + c000 0 0 1 f8200000 42 8 + c000 0 0 2 f8200000 43 8 + c000 0 0 3 f8200000 40 8 + c000 0 0 4 f8200000 41 8>; interrupt-parent = <10c00>; - interrupts = <14 3>; + interrupts = <14 8>; bus-range = <0 0>; ranges = <02000000 0 80000000 80000000 0 40000000 01000000 0 00000000 f6000000 0 02000000>; @@ -210,7 +217,7 @@ model = "SEC2"; compatible = "talitos"; reg = <30000 10000>; - interrupts = ; + interrupts = ; interrupt-parent = <10c00>; num-channels = <4>; channel-fifo-len = <18>; diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts index 2b168486aeb..119bd5d3a83 100644 --- a/arch/powerpc/boot/dts/mpc8560ads.dts +++ b/arch/powerpc/boot/dts/mpc8560ads.dts @@ -200,7 +200,7 @@ a800 0 0 4 40000 31 1>; interrupt-parent = <40000>; - interrupts = <42 0>; + interrupts = <8 0>; bus-range = <0 0>; ranges = <02000000 0 80000000 80000000 0 20000000 01000000 0 00000000 e2000000 0 01000000>; @@ -250,7 +250,7 @@ rx-clock = <1>; tx-clock = <1>; current-speed = <1c200>; - interrupts = <64 1>; + interrupts = <28 8>; interrupt-parent = <90c00>; }; @@ -264,7 +264,7 @@ rx-clock = <2>; tx-clock = <2>; current-speed = <1c200>; - interrupts = <65 1>; + interrupts = <29 8>; interrupt-parent = <90c00>; }; @@ -278,7 +278,7 @@ clock-setup = ; rx-clock = <15>; tx-clock = <16>; - interrupts = <5d 1>; + interrupts = <21 8>; interrupt-parent = <90c00>; phy-handle = <2452002>; }; @@ -293,7 +293,7 @@ clock-setup = ; rx-clock = <17>; tx-clock = <18>; - interrupts = <5e 1>; + interrupts = <22 8>; interrupt-parent = <90c00>; phy-handle = <2452003>; }; diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c index e2739eb93cd..eabfe06fe05 100644 --- a/arch/powerpc/sysdev/cpm2_pic.c +++ b/arch/powerpc/sysdev/cpm2_pic.c @@ -36,9 +36,20 @@ #include #include #include +#include #include "cpm2_pic.h" +/* External IRQS */ +#define CPM2_IRQ_EXT1 19 +#define CPM2_IRQ_EXT7 25 + +/* Port C IRQS */ +#define CPM2_IRQ_PORTC15 48 +#define CPM2_IRQ_PORTC0 63 + +static intctl_cpm2_t *cpm2_intctl; + static struct device_node *cpm2_pic_node; static struct irq_host *cpm2_pic_host; #define NR_MASK_WORDS ((NR_IRQS + 31) / 32) @@ -68,68 +79,55 @@ static const u_char irq_to_siubit[] = { 24, 25, 26, 27, 28, 29, 30, 31, }; -static void cpm2_mask_irq(unsigned int irq_nr) +static void cpm2_mask_irq(unsigned int virq) { int bit, word; - volatile uint *simr; - - irq_nr -= CPM_IRQ_OFFSET; + unsigned int irq_nr = virq_to_hw(virq); bit = irq_to_siubit[irq_nr]; word = irq_to_siureg[irq_nr]; - simr = &(cpm2_intctl->ic_simrh); ppc_cached_irq_mask[word] &= ~(1 << bit); - simr[word] = ppc_cached_irq_mask[word]; + out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]); } -static void cpm2_unmask_irq(unsigned int irq_nr) +static void cpm2_unmask_irq(unsigned int virq) { int bit, word; - volatile uint *simr; - - irq_nr -= CPM_IRQ_OFFSET; + unsigned int irq_nr = virq_to_hw(virq); bit = irq_to_siubit[irq_nr]; word = irq_to_siureg[irq_nr]; - simr = &(cpm2_intctl->ic_simrh); ppc_cached_irq_mask[word] |= 1 << bit; - simr[word] = ppc_cached_irq_mask[word]; + out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]); } -static void cpm2_mask_and_ack(unsigned int irq_nr) +static void cpm2_ack(unsigned int virq) { int bit, word; - volatile uint *simr, *sipnr; - - irq_nr -= CPM_IRQ_OFFSET; + unsigned int irq_nr = virq_to_hw(virq); bit = irq_to_siubit[irq_nr]; word = irq_to_siureg[irq_nr]; - simr = &(cpm2_intctl->ic_simrh); - sipnr = &(cpm2_intctl->ic_sipnrh); - ppc_cached_irq_mask[word] &= ~(1 << bit); - simr[word] = ppc_cached_irq_mask[word]; - sipnr[word] = 1 << bit; + out_be32(&cpm2_intctl->ic_sipnrh + word, 1 << bit); } -static void cpm2_end_irq(unsigned int irq_nr) +static void cpm2_end_irq(unsigned int virq) { int bit, word; - volatile uint *simr; + unsigned int irq_nr = virq_to_hw(virq); if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS)) && irq_desc[irq_nr].action) { - irq_nr -= CPM_IRQ_OFFSET; bit = irq_to_siubit[irq_nr]; word = irq_to_siureg[irq_nr]; - simr = &(cpm2_intctl->ic_simrh); ppc_cached_irq_mask[word] |= 1 << bit; - simr[word] = ppc_cached_irq_mask[word]; + out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]); + /* * Work around large numbers of spurious IRQs on PowerPC 82xx * systems. @@ -138,13 +136,59 @@ static void cpm2_end_irq(unsigned int irq_nr) } } +static int cpm2_set_irq_type(unsigned int virq, unsigned int flow_type) +{ + unsigned int src = virq_to_hw(virq); + struct irq_desc *desc = get_irq_desc(virq); + unsigned int vold, vnew, edibit; + + if (flow_type == IRQ_TYPE_NONE) + flow_type = IRQ_TYPE_LEVEL_LOW; + + if (flow_type & IRQ_TYPE_EDGE_RISING) { + printk(KERN_ERR "CPM2 PIC: sense type 0x%x not supported\n", + flow_type); + return -EINVAL; + } + + desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); + desc->status |= flow_type & IRQ_TYPE_SENSE_MASK; + if (flow_type & IRQ_TYPE_LEVEL_LOW) { + desc->status |= IRQ_LEVEL; + desc->handle_irq = handle_level_irq; + } else + desc->handle_irq = handle_edge_irq; + + /* internal IRQ senses are LEVEL_LOW + * EXT IRQ and Port C IRQ senses are programmable + */ + if (src >= CPM2_IRQ_EXT1 && src <= CPM2_IRQ_EXT7) + edibit = (14 - (src - CPM2_IRQ_EXT1)); + else + if (src >= CPM2_IRQ_PORTC15 && src <= CPM2_IRQ_PORTC0) + edibit = (31 - (src - CPM2_IRQ_PORTC15)); + else + return (flow_type & IRQ_TYPE_LEVEL_LOW) ? 0 : -EINVAL; + + vold = in_be32(&cpm2_intctl->ic_siexr); + + if ((flow_type & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_FALLING) + vnew = vold | (1 << edibit); + else + vnew = vold & ~(1 << edibit); + + if (vold != vnew) + out_be32(&cpm2_intctl->ic_siexr, vnew); + return 0; +} + static struct irq_chip cpm2_pic = { .typename = " CPM2 SIU ", - .enable = cpm2_unmask_irq, - .disable = cpm2_mask_irq, + .mask = cpm2_mask_irq, .unmask = cpm2_unmask_irq, - .mask_ack = cpm2_mask_and_ack, - .end = cpm2_end_irq, + .ack = cpm2_ack, + .eoi = cpm2_end_irq, + .set_type = cpm2_set_irq_type, }; unsigned int cpm2_get_irq(void) @@ -154,17 +198,17 @@ unsigned int cpm2_get_irq(void) /* For CPM2, read the SIVEC register and shift the bits down * to get the irq number. */ - bits = cpm2_intctl->ic_sivec; + bits = in_be32(&cpm2_intctl->ic_sivec); irq = bits >> 26; if (irq == 0) return(-1); - return irq+CPM_IRQ_OFFSET; + return irq_linear_revmap(cpm2_pic_host, irq); } static int cpm2_pic_host_match(struct irq_host *h, struct device_node *node) { - return cpm2_pic_node == NULL || cpm2_pic_node == node; + return cpm2_pic_node == node; } static int cpm2_pic_host_map(struct irq_host *h, unsigned int virq, @@ -177,39 +221,21 @@ static int cpm2_pic_host_map(struct irq_host *h, unsigned int virq, return 0; } -static void cpm2_host_unmap(struct irq_host *h, unsigned int virq) -{ - /* Make sure irq is masked in hardware */ - cpm2_mask_irq(virq); - - /* remove chip and handler */ - set_irq_chip_and_handler(virq, NULL, NULL); -} - static int cpm2_pic_host_xlate(struct irq_host *h, struct device_node *ct, u32 *intspec, unsigned int intsize, irq_hw_number_t *out_hwirq, unsigned int *out_flags) { - static const unsigned char map_cpm2_senses[4] = { - IRQ_TYPE_LEVEL_LOW, - IRQ_TYPE_LEVEL_HIGH, - IRQ_TYPE_EDGE_FALLING, - IRQ_TYPE_EDGE_RISING, - }; - *out_hwirq = intspec[0]; - if (intsize > 1 && intspec[1] < 4) - *out_flags = map_cpm2_senses[intspec[1]]; + if (intsize > 1) + *out_flags = intspec[1]; else *out_flags = IRQ_TYPE_NONE; - return 0; } static struct irq_host_ops cpm2_pic_host_ops = { .match = cpm2_pic_host_match, .map = cpm2_pic_host_map, - .unmap = cpm2_host_unmap, .xlate = cpm2_pic_host_xlate, }; @@ -217,32 +243,34 @@ void cpm2_pic_init(struct device_node *node) { int i; + cpm2_intctl = cpm2_map(im_intctl); + /* Clear the CPM IRQ controller, in case it has any bits set * from the bootloader */ /* Mask out everything */ - cpm2_intctl->ic_simrh = 0x00000000; - cpm2_intctl->ic_simrl = 0x00000000; + out_be32(&cpm2_intctl->ic_simrh, 0x00000000); + out_be32(&cpm2_intctl->ic_simrl, 0x00000000); wmb(); /* Ack everything */ - cpm2_intctl->ic_sipnrh = 0xffffffff; - cpm2_intctl->ic_sipnrl = 0xffffffff; + out_be32(&cpm2_intctl->ic_sipnrh, 0xffffffff); + out_be32(&cpm2_intctl->ic_sipnrl, 0xffffffff); wmb(); /* Dummy read of the vector */ - i = cpm2_intctl->ic_sivec; + i = in_be32(&cpm2_intctl->ic_sivec); rmb(); /* Initialize the default interrupt mapping priorities, * in case the boot rom changed something on us. */ - cpm2_intctl->ic_sicr = 0; - cpm2_intctl->ic_scprrh = 0x05309770; - cpm2_intctl->ic_scprrl = 0x05309770; + out_be16(&cpm2_intctl->ic_sicr, 0); + out_be32(&cpm2_intctl->ic_scprrh, 0x05309770); + out_be32(&cpm2_intctl->ic_scprrl, 0x05309770); /* create a legacy host */ cpm2_pic_node = of_node_get(node); diff --git a/arch/powerpc/sysdev/cpm2_pic.h b/arch/powerpc/sysdev/cpm2_pic.h index 2840616529e..30e5828a278 100644 --- a/arch/powerpc/sysdev/cpm2_pic.h +++ b/arch/powerpc/sysdev/cpm2_pic.h @@ -1,8 +1,6 @@ #ifndef _PPC_KERNEL_CPM2_H #define _PPC_KERNEL_CPM2_H -extern intctl_cpm2_t *cpm2_intctl; - extern unsigned int cpm2_get_irq(void); extern void cpm2_pic_init(struct device_node*); diff --git a/include/asm-powerpc/mpc8260.h b/include/asm-powerpc/mpc8260.h new file mode 100644 index 00000000000..f1b83b09ab2 --- /dev/null +++ b/include/asm-powerpc/mpc8260.h @@ -0,0 +1,24 @@ +/* + * Since there are many different boards and no standard configuration, + * we have a unique include file for each. Rather than change every + * file that has to include MPC8260 configuration, they all include + * this one and the configuration switching is done here. + */ +#ifdef __KERNEL__ +#ifndef __ASM_PPC_MPC8260_H__ +#define __ASM_PPC_MPC8260_H__ + + +#ifdef CONFIG_8260 + +#if defined(CONFIG_PQ2ADS) || defined (CONFIG_PQ2FADS) +#include +#endif + +#ifdef CONFIG_PCI_8260 +#include +#endif + +#endif /* CONFIG_8260 */ +#endif /* !__ASM_PPC_MPC8260_H__ */ +#endif /* __KERNEL__ */ -- cgit v1.2.3-70-g09d2 From a1fdf6940a2a3d3c7475755eba5881403473252d Mon Sep 17 00:00:00 2001 From: Pavel Roskin Date: Sun, 4 Feb 2007 03:16:08 -0500 Subject: [POWERPC] Assign all PCI busses on G3 Blue & White G3 Blue & White is misconfigured by default so that CardBus controllers in PCI slots don't work. The PCI bridge is programmed to only allow access to bus 1 but not higher busses. The patch forces the PCI busses to be reassigned if a Grackle controller is found and the machine identifies itself as "PowerMac1,1" Signed-off-by: Pavel Roskin Acked-by: Benjamin Herrenschmidt Signed-off-by: Paul Mackerras --- arch/powerpc/sysdev/grackle.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/powerpc/sysdev') diff --git a/arch/powerpc/sysdev/grackle.c b/arch/powerpc/sysdev/grackle.c index b6ec793a23b..42053625f49 100644 --- a/arch/powerpc/sysdev/grackle.c +++ b/arch/powerpc/sysdev/grackle.c @@ -56,6 +56,8 @@ static inline void grackle_set_loop_snoop(struct pci_controller *bp, int enable) void __init setup_grackle(struct pci_controller *hose) { setup_indirect_pci(hose, 0xfec00000, 0xfee00000); + if (machine_is_compatible("PowerMac1,1")) + pci_assign_all_buses = 1; if (machine_is_compatible("AAPL,PowerBook1998")) grackle_set_loop_snoop(hose, 1); #if 0 /* Disabled for now, HW problems ??? */ -- cgit v1.2.3-70-g09d2