From 4c7c99788631bab177bd51e15e893be4689bb085 Mon Sep 17 00:00:00 2001 From: Aoi Shinkai Date: Wed, 10 Jun 2009 16:15:42 +0000 Subject: sh: Fix sh4a llsc-based cmpxchg() This fixes up a typo in the ll/sc based cmpxchg code which apparently wasn't getting a lot of testing due to the swapped old/new pair. With that fixed up, the ll/sc code also starts using it and provides its own atomic_add_unless(). Signed-off-by: Aoi Shinkai Signed-off-by: Paul Mundt --- arch/sh/include/asm/spinlock.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/sh/include/asm/spinlock.h') diff --git a/arch/sh/include/asm/spinlock.h b/arch/sh/include/asm/spinlock.h index 60283565f89..a28c9f0053f 100644 --- a/arch/sh/include/asm/spinlock.h +++ b/arch/sh/include/asm/spinlock.h @@ -26,7 +26,7 @@ #define __raw_spin_is_locked(x) ((x)->lock <= 0) #define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock) #define __raw_spin_unlock_wait(x) \ - do { cpu_relax(); } while ((x)->lock) + do { while (__raw_spin_is_locked(x)) cpu_relax(); } while (0) /* * Simple spin lock operations. There are two variants, one clears IRQ's -- cgit v1.2.3-70-g09d2