From 45ed285b54930767937deb0eaf718b1d08c3c475 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Thu, 8 Mar 2007 18:12:17 +0900 Subject: sh: speculative execution support for SH7780. SH7780 has a speculative execution mode where it can speculatively perform an instruction fetch for subroutine returns, this allows it to be enabled. There are some various pitfalls associated with this mode, so it's left as depending on CONFIG_EXPERIMENTAL and not enabled by default. Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/init.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) (limited to 'arch/sh/kernel/cpu') diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c index 726acfcb9b7..6451ad63017 100644 --- a/arch/sh/kernel/cpu/init.c +++ b/arch/sh/kernel/cpu/init.c @@ -41,6 +41,23 @@ __setup("no" __stringify(x), x##_setup); onchip_setup(fpu); onchip_setup(dsp); +#ifdef CONFIG_SPECULATIVE_EXECUTION +#define CPUOPM 0xff2f0000 +#define CPUOPM_RABD (1 << 5) + +static void __init speculative_execution_init(void) +{ + /* Clear RABD */ + ctrl_outl(ctrl_inl(CPUOPM) & ~CPUOPM_RABD, CPUOPM); + + /* Flush the update */ + (void)ctrl_inl(CPUOPM); + ctrl_barrier(); +} +#else +#define speculative_execution_init() do { } while (0) +#endif + /* * Generic first-level cache init */ @@ -261,4 +278,6 @@ asmlinkage void __init sh_cpu_init(void) */ ubc_wakeup(); #endif + + speculative_execution_init(); } -- cgit v1.2.3-70-g09d2 From 32351a28a7e1f2c68afbe559dd35e1ad0301be6d Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Mon, 12 Mar 2007 14:38:59 +0900 Subject: sh: Add SH7785 Highlander board support (R7785RP). This adds preliminary support for the SH7785-based Highlander board. Some of the Highlander support code is reordered so that most of it can be reused directly. This also plugs in missing SH7785 checks in the places that need it, as this is the first board to support the CPU. Signed-off-by: Paul Mundt --- arch/sh/Kconfig | 47 +- arch/sh/Makefile | 2 +- arch/sh/boards/renesas/r7780rp/Kconfig | 18 +- arch/sh/boards/renesas/r7780rp/Makefile | 6 +- arch/sh/boards/renesas/r7780rp/irq-r7780rp.c | 21 + arch/sh/boards/renesas/r7780rp/irq-r7785rp.c | 29 + arch/sh/boards/renesas/r7780rp/irq.c | 25 +- arch/sh/boards/renesas/r7780rp/setup.c | 74 +- arch/sh/configs/r7785rp_defconfig | 1334 ++++++++++++++++++++++++++ arch/sh/drivers/Kconfig | 10 + arch/sh/drivers/pci/Makefile | 3 +- arch/sh/drivers/pci/ops-r7780rp.c | 37 +- arch/sh/drivers/pci/pci-sh4.h | 2 +- arch/sh/drivers/pci/pci-sh7780.c | 17 +- arch/sh/drivers/pci/pci-sh7780.h | 3 +- arch/sh/kernel/cpu/irq/intc2.c | 3 +- arch/sh/kernel/cpu/sh4/probe.c | 8 + arch/sh/kernel/cpu/sh4a/Makefile | 2 + arch/sh/kernel/cpu/sh4a/clock-sh7785.c | 162 ++++ arch/sh/kernel/cpu/sh4a/setup-sh7785.c | 98 ++ arch/sh/kernel/timers/timer-tmu.c | 4 +- arch/sh/tools/mach-types | 1 + drivers/serial/sh-sci.c | 20 +- drivers/serial/sh-sci.h | 40 +- include/asm-sh/cpu-sh4/freq.h | 4 + include/asm-sh/pci.h | 2 +- include/asm-sh/r7780rp.h | 68 +- 27 files changed, 1896 insertions(+), 144 deletions(-) create mode 100644 arch/sh/boards/renesas/r7780rp/irq-r7780rp.c create mode 100644 arch/sh/boards/renesas/r7780rp/irq-r7785rp.c create mode 100644 arch/sh/configs/r7785rp_defconfig create mode 100644 arch/sh/kernel/cpu/sh4a/clock-sh7785.c create mode 100644 arch/sh/kernel/cpu/sh4a/setup-sh7785.c (limited to 'arch/sh/kernel/cpu') diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 51d9d0ab39c..9932d1aa849 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -197,12 +197,8 @@ config SH_RTS7751R2D Select RTS7751R2D if configuring for a Renesas Technology Sales SH-Graphics board. -config SH_R7780RP - bool "R7780RP-1" - select CPU_SUBTYPE_SH7780 - help - Select R7780RP-1 if configuring for a Renesas Solutions - HIGHLANDER board. +config SH_HIGHLANDER + bool "Highlander" config SH_EDOSK7705 bool "EDOSK7705" @@ -262,6 +258,10 @@ config SH_UNKNOWN endchoice +source "arch/sh/boards/renesas/hs7751rvoip/Kconfig" +source "arch/sh/boards/renesas/rts7751r2d/Kconfig" +source "arch/sh/boards/renesas/r7780rp/Kconfig" + source "arch/sh/mm/Kconfig" config CF_ENABLER @@ -412,8 +412,9 @@ config CPU_HAS_PTEA endmenu -menu "Timer support" -depends on !GENERIC_TIME +menu "Timer and clock configuration" + +if !GENERIC_TIME config SH_TMU bool "TMU timer support" @@ -436,17 +437,11 @@ config SH_MTU2 help This enables the use of the MTU2 as the system timer. -endmenu - -source "arch/sh/boards/renesas/hs7751rvoip/Kconfig" - -source "arch/sh/boards/renesas/rts7751r2d/Kconfig" - -source "arch/sh/boards/renesas/r7780rp/Kconfig" +endif config SH_TIMER_IRQ int - default "28" if CPU_SUBTYPE_SH7780 + default "28" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785 default "86" if CPU_SUBTYPE_SH7619 default "140" if CPU_SUBTYPE_SH7206 default "16" @@ -476,7 +471,8 @@ config SH_PCLK_FREQ default "33333333" if CPU_SUBTYPE_SH7300 || CPU_SUBTYPE_SH7770 || \ CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \ CPU_SUBTYPE_SH7206 - default "50000000" if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7780 + default "50000000" if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7780 || \ + CPU_SUBTYPE_SH7785 default "60000000" if CPU_SUBTYPE_SH7751 default "66000000" if CPU_SUBTYPE_SH4_202 help @@ -491,6 +487,8 @@ config SH_CLK_MD help MD2 - MD0 pin setting. +endmenu + menu "CPU Frequency scaling" source "drivers/cpufreq/Kconfig" @@ -509,21 +507,6 @@ config SH_CPU_FREQ endmenu -source "arch/sh/drivers/dma/Kconfig" - -source "arch/sh/cchips/Kconfig" - -config HEARTBEAT - bool "Heartbeat LED" - depends on SH_MPC1211 || SH_SH03 || \ - SOLUTION_ENGINE || \ - SH_RTS7751R2D || SH_SH4202_MICRODEV || SH_LANDISK || \ - SH_R7780RP - help - Use the power-on LED on your machine as a load meter. The exact - behavior is platform-dependent, but normally the flash frequency is - a hyperbolic function of the 5-minute load average. - source "arch/sh/drivers/Kconfig" endmenu diff --git a/arch/sh/Makefile b/arch/sh/Makefile index 0fadde28336..7eef74b1cb7 100644 --- a/arch/sh/Makefile +++ b/arch/sh/Makefile @@ -102,7 +102,7 @@ machdir-$(CONFIG_SH_HS7751RVOIP) := renesas/hs7751rvoip machdir-$(CONFIG_SH_RTS7751R2D) := renesas/rts7751r2d machdir-$(CONFIG_SH_7751_SYSTEMH) := renesas/systemh machdir-$(CONFIG_SH_EDOSK7705) := renesas/edosk7705 -machdir-$(CONFIG_SH_R7780RP) := renesas/r7780rp +machdir-$(CONFIG_SH_HIGHLANDER) := renesas/r7780rp machdir-$(CONFIG_SH_7710VOIPGW) := renesas/sh7710voipgw machdir-$(CONFIG_SH_SH4202_MICRODEV) := superh/microdev machdir-$(CONFIG_SH_LANDISK) := landisk diff --git a/arch/sh/boards/renesas/r7780rp/Kconfig b/arch/sh/boards/renesas/r7780rp/Kconfig index c26d9813d23..9fb11641fe1 100644 --- a/arch/sh/boards/renesas/r7780rp/Kconfig +++ b/arch/sh/boards/renesas/r7780rp/Kconfig @@ -1,14 +1,24 @@ -if SH_R7780RP +if SH_HIGHLANDER -menu "R7780RP options" +choice + prompt "Highlander options" + default SH_R7780MP + +config SH_R7780RP + bool "R7780RP-1 board support" + select CPU_SUBTYPE_SH7780 config SH_R7780MP bool "R7780MP board support" - default y + select CPU_SUBTYPE_SH7780 help Selecting this option will enable support for the mass-production version of the R7780RP. If in doubt, say Y. -endmenu +config SH_R7785RP + bool "R7785RP board support" + select CPU_SUBTYPE_SH7785 + +endchoice endif diff --git a/arch/sh/boards/renesas/r7780rp/Makefile b/arch/sh/boards/renesas/r7780rp/Makefile index ed5f5a9a3b3..609e5d50dde 100644 --- a/arch/sh/boards/renesas/r7780rp/Makefile +++ b/arch/sh/boards/renesas/r7780rp/Makefile @@ -1,7 +1,7 @@ # # Makefile for the R7780RP-1 specific parts of the kernel # - -obj-y := setup.o irq.o - +irqinit-y := irq-r7780rp.o +irqinit-$(CONFIG_SH_R7785RP) := irq-r7785rp.o obj-$(CONFIG_PUSH_SWITCH) += psw.o +obj-y := setup.o irq.o $(irqinit-y) diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c b/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c new file mode 100644 index 00000000000..f5f358746c9 --- /dev/null +++ b/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c @@ -0,0 +1,21 @@ +/* + * Renesas Solutions Highlander R7780RP-1 Support. + * + * Copyright (C) 2002 Atom Create Engineering Co., Ltd. + * Copyright (C) 2006 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include + +void __init highlander_init_irq(void) +{ + int i; + + for (i = 0; i < 15; i++) + make_r7780rp_irq(i); +} diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c b/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c new file mode 100644 index 00000000000..dd6ec4ce44d --- /dev/null +++ b/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c @@ -0,0 +1,29 @@ +/* + * Renesas Solutions Highlander R7780RP-1 Support. + * + * Copyright (C) 2002 Atom Create Engineering Co., Ltd. + * Copyright (C) 2006 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include + +void __init highlander_init_irq(void) +{ + ctrl_outw(0x0000, PA_IRLSSR1); /* FPGA IRLSSR1(CF_CD clear) */ + + /* Setup the FPGA IRL */ + ctrl_outw(0x0000, PA_IRLPRA); /* FPGA IRLA */ + ctrl_outw(0xe598, PA_IRLPRB); /* FPGA IRLB */ + ctrl_outw(0x7060, PA_IRLPRC); /* FPGA IRLC */ + ctrl_outw(0x0000, PA_IRLPRD); /* FPGA IRLD */ + ctrl_outw(0x4321, PA_IRLPRE); /* FPGA IRLE */ + ctrl_outw(0x0000, PA_IRLPRF); /* FPGA IRLF */ + + make_r7780rp_irq(1); /* CF card */ + make_r7780rp_irq(10); /* On-board ethernet */ +} diff --git a/arch/sh/boards/renesas/r7780rp/irq.c b/arch/sh/boards/renesas/r7780rp/irq.c index cc381e19778..e0b8eb52f37 100644 --- a/arch/sh/boards/renesas/r7780rp/irq.c +++ b/arch/sh/boards/renesas/r7780rp/irq.c @@ -14,10 +14,12 @@ #include #include -#ifdef CONFIG_SH_R7780MP -static int mask_pos[] = {12, 11, 9, 14, 15, 8, 13, 6, 5, 4, 3, 2, 0, 0, 1, 0}; -#else +#ifdef CONFIG_SH_R7780RP static int mask_pos[] = {15, 14, 13, 12, 11, 10, 9, 8, 7, 5, 6, 4, 0, 1, 2, 0}; +#elif defined(CONFIG_SH_R7780MP) +static int mask_pos[] = {12, 11, 9, 14, 15, 8, 13, 6, 5, 4, 3, 2, 0, 0, 1, 0}; +#elif defined(CONFIG_SH_R7785RP) +static int mask_pos[] = {2, 11, 2, 2, 2, 2, 9, 8, 7, 5, 10, 2, 2, 2, 2, 2}; #endif static void enable_r7780rp_irq(unsigned int irq) @@ -40,17 +42,10 @@ static struct irq_chip r7780rp_irq_chip __read_mostly = { .mask_ack = disable_r7780rp_irq, }; -/* - * Initialize IRQ setting - */ -void __init init_r7780rp_IRQ(void) +void make_r7780rp_irq(unsigned int irq) { - int i; - - for (i = 0; i < 15; i++) { - disable_irq_nosync(i); - set_irq_chip_and_handler_name(i, &r7780rp_irq_chip, - handle_level_irq, "level"); - enable_r7780rp_irq(i); - } + disable_irq_nosync(irq); + set_irq_chip_and_handler_name(irq, &r7780rp_irq_chip, + handle_level_irq, "level"); + enable_r7780rp_irq(irq); } diff --git a/arch/sh/boards/renesas/r7780rp/setup.c b/arch/sh/boards/renesas/r7780rp/setup.c index 2faba6679e6..6af0cc35ceb 100644 --- a/arch/sh/boards/renesas/r7780rp/setup.c +++ b/arch/sh/boards/renesas/r7780rp/setup.c @@ -1,10 +1,13 @@ /* * arch/sh/boards/renesas/r7780rp/setup.c * + * Renesas Solutions Highlander Support. + * * Copyright (C) 2002 Atom Create Engineering Co., Ltd. * Copyright (C) 2005 - 2007 Paul Mundt * - * Renesas Solutions Highlander R7780RP-1 Support. + * This contains support for the R7780RP-1, R7780MP, and R7785RP + * Highlander modules. * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -18,32 +21,6 @@ #include #include -extern void init_r7780rp_IRQ(void); - -static struct resource m66596_usb_host_resources[] = { - [0] = { - .start = 0xa4800000, - .end = 0xa4ffffff, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = 6, /* irq number */ - .end = 6, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device m66596_usb_host_device = { - .name = "m66596-hcd", - .id = 0, - .dev = { - .dma_mask = NULL, /* don't use dma */ - .coherent_dma_mask = 0xffffffff, - }, - .num_resources = ARRAY_SIZE(m66596_usb_host_resources), - .resource = m66596_usb_host_resources, -}; - static struct resource cf_ide_resources[] = { [0] = { .start = PA_AREA5_IO + 0x1000, @@ -56,10 +33,10 @@ static struct resource cf_ide_resources[] = { .flags = IORESOURCE_MEM, }, [2] = { -#ifdef CONFIG_SH_R7780MP - .start = 1, -#else +#ifdef CONFIG_SH_R7780RP .start = 4, +#else + .start = 1, #endif .flags = IORESOURCE_IRQ, }, @@ -92,15 +69,18 @@ static struct resource heartbeat_resources[] = { static struct platform_device heartbeat_device = { .name = "heartbeat", .id = -1, + + /* R7785RP has a slightly more sensible FPGA.. */ +#ifndef CONFIG_SH_R7785RP .dev = { .platform_data = heartbeat_bit_pos, }, +#endif .num_resources = ARRAY_SIZE(heartbeat_resources), .resource = heartbeat_resources, }; static struct platform_device *r7780rp_devices[] __initdata = { - &m66596_usb_host_device, &cf_ide_device, &heartbeat_device, }; @@ -110,6 +90,7 @@ static int __init r7780rp_devices_setup(void) return platform_add_devices(r7780rp_devices, ARRAY_SIZE(r7780rp_devices)); } +device_initcall(r7780rp_devices_setup); /* * Platform specific clocks @@ -140,22 +121,22 @@ static struct clk *r7780rp_clocks[] = { static void r7780rp_power_off(void) { -#ifdef CONFIG_SH_R7780MP - ctrl_outw(0x0001, PA_POFF); -#endif + if (mach_is_r7780mp() || mach_is_r7785rp()) + ctrl_outw(0x0001, PA_POFF); } /* * Initialize the board */ -static void __init r7780rp_setup(char **cmdline_p) +static void __init highlander_setup(char **cmdline_p) { u16 ver = ctrl_inw(PA_VERREG); int i; - device_initcall(r7780rp_devices_setup); - - printk(KERN_INFO "Renesas Solutions Highlander R7780RP-1 support.\n"); + printk(KERN_INFO "Renesas Solutions Highlander %s support.\n", + mach_is_r7780rp() ? "R7780RP-1" : + mach_is_r7780mp() ? "R7780MP" : + "R7785RP"); printk(KERN_INFO "Board version: %d (revision %d), " "FPGA version: %d (revision %d)\n", @@ -173,9 +154,10 @@ static void __init r7780rp_setup(char **cmdline_p) } ctrl_outw(0x0000, PA_OBLED); /* Clear LED. */ -#ifndef CONFIG_SH_R7780MP - ctrl_outw(0x0001, PA_SDPOW); /* SD Power ON */ -#endif + + if (mach_is_r7780rp()) + ctrl_outw(0x0001, PA_SDPOW); /* SD Power ON */ + ctrl_outw(ctrl_inw(PA_IVDRCTL) | 0x01, PA_IVDRCTL); /* Si13112 */ pm_power_off = r7780rp_power_off; @@ -184,10 +166,10 @@ static void __init r7780rp_setup(char **cmdline_p) /* * The Machine Vector */ -struct sh_machine_vector mv_r7780rp __initmv = { - .mv_name = "Highlander R7780RP-1", - .mv_setup = r7780rp_setup, +struct sh_machine_vector mv_highlander __initmv = { + .mv_name = "Highlander", .mv_nr_irqs = 109, - .mv_init_irq = init_r7780rp_IRQ, + .mv_setup = highlander_setup, + .mv_init_irq = highlander_init_irq, }; -ALIAS_MV(r7780rp) +ALIAS_MV(highlander) diff --git a/arch/sh/configs/r7785rp_defconfig b/arch/sh/configs/r7785rp_defconfig new file mode 100644 index 00000000000..0f5ec649daf --- /dev/null +++ b/arch/sh/configs/r7785rp_defconfig @@ -0,0 +1,1334 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.21-rc3 +# Mon Mar 12 14:26:33 2007 +# +CONFIG_SUPERH=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +# CONFIG_GENERIC_TIME is not set +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +# CONFIG_IPC_NS is not set +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +CONFIG_BSD_PROCESS_ACCT=y +# CONFIG_BSD_PROCESS_ACCT_V3 is not set +# CONFIG_TASKSTATS is not set +# CONFIG_UTS_NS is not set +# CONFIG_AUDIT is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +# CONFIG_SYSFS_DEPRECATED is not set +# CONFIG_RELAY is not set +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +# CONFIG_SYSCTL_SYSCALL is not set +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_ALL=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +# CONFIG_FUTEX is not set +# CONFIG_EPOLL is not set +CONFIG_SHMEM=y +CONFIG_SLAB=y +CONFIG_VM_EVENT_COUNTERS=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +# CONFIG_SLOB is not set + +# +# Loadable module support +# +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y + +# +# Block layer +# +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +# CONFIG_IOSCHED_AS is not set +# CONFIG_IOSCHED_DEADLINE is not set +# CONFIG_IOSCHED_CFQ is not set +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +CONFIG_DEFAULT_NOOP=y +CONFIG_DEFAULT_IOSCHED="noop" + +# +# System type +# +# CONFIG_SH_SOLUTION_ENGINE is not set +# CONFIG_SH_7751_SOLUTION_ENGINE is not set +# CONFIG_SH_7300_SOLUTION_ENGINE is not set +# CONFIG_SH_7343_SOLUTION_ENGINE is not set +# CONFIG_SH_73180_SOLUTION_ENGINE is not set +# CONFIG_SH_7751_SYSTEMH is not set +# CONFIG_SH_HP6XX is not set +# CONFIG_SH_SATURN is not set +# CONFIG_SH_DREAMCAST is not set +# CONFIG_SH_MPC1211 is not set +# CONFIG_SH_SH03 is not set +# CONFIG_SH_SECUREEDGE5410 is not set +# CONFIG_SH_HS7751RVOIP is not set +# CONFIG_SH_7710VOIPGW is not set +# CONFIG_SH_RTS7751R2D is not set +CONFIG_SH_HIGHLANDER=y +# CONFIG_SH_EDOSK7705 is not set +# CONFIG_SH_SH4202_MICRODEV is not set +# CONFIG_SH_LANDISK is not set +# CONFIG_SH_TITAN is not set +# CONFIG_SH_SHMIN is not set +# CONFIG_SH_7206_SOLUTION_ENGINE is not set +# CONFIG_SH_7619_SOLUTION_ENGINE is not set +# CONFIG_SH_UNKNOWN is not set +# CONFIG_SH_R7780RP is not set +# CONFIG_SH_R7780MP is not set +CONFIG_SH_R7785RP=y + +# +# Processor selection +# +CONFIG_CPU_SH4=y +CONFIG_CPU_SH4A=y +CONFIG_CPU_SHX2=y + +# +# SH-2 Processor Support +# +# CONFIG_CPU_SUBTYPE_SH7604 is not set +# CONFIG_CPU_SUBTYPE_SH7619 is not set + +# +# SH-2A Processor Support +# +# CONFIG_CPU_SUBTYPE_SH7206 is not set + +# +# SH-3 Processor Support +# +# CONFIG_CPU_SUBTYPE_SH7300 is not set +# CONFIG_CPU_SUBTYPE_SH7705 is not set +# CONFIG_CPU_SUBTYPE_SH7706 is not set +# CONFIG_CPU_SUBTYPE_SH7707 is not set +# CONFIG_CPU_SUBTYPE_SH7708 is not set +# CONFIG_CPU_SUBTYPE_SH7709 is not set +# CONFIG_CPU_SUBTYPE_SH7710 is not set + +# +# SH-4 Processor Support +# +# CONFIG_CPU_SUBTYPE_SH7750 is not set +# CONFIG_CPU_SUBTYPE_SH7091 is not set +# CONFIG_CPU_SUBTYPE_SH7750R is not set +# CONFIG_CPU_SUBTYPE_SH7750S is not set +# CONFIG_CPU_SUBTYPE_SH7751 is not set +# CONFIG_CPU_SUBTYPE_SH7751R is not set +# CONFIG_CPU_SUBTYPE_SH7760 is not set +# CONFIG_CPU_SUBTYPE_SH4_202 is not set + +# +# ST40 Processor Support +# +# CONFIG_CPU_SUBTYPE_ST40STB1 is not set +# CONFIG_CPU_SUBTYPE_ST40GX1 is not set + +# +# SH-4A Processor Support +# +# CONFIG_CPU_SUBTYPE_SH7770 is not set +# CONFIG_CPU_SUBTYPE_SH7780 is not set +CONFIG_CPU_SUBTYPE_SH7785=y + +# +# SH4AL-DSP Processor Support +# +# CONFIG_CPU_SUBTYPE_SH73180 is not set +# CONFIG_CPU_SUBTYPE_SH7343 is not set +# CONFIG_CPU_SUBTYPE_SH7722 is not set + +# +# Memory management options +# +CONFIG_MMU=y +CONFIG_PAGE_OFFSET=0x80000000 +CONFIG_MEMORY_START=0x08000000 +CONFIG_MEMORY_SIZE=0x08000000 +CONFIG_32BIT=y +# CONFIG_X2TLB is not set +CONFIG_VSYSCALL=y +CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set +# CONFIG_PAGE_SIZE_64KB is not set +# CONFIG_HUGETLB_PAGE_SIZE_64K is not set +# CONFIG_HUGETLB_PAGE_SIZE_256K is not set +CONFIG_HUGETLB_PAGE_SIZE_1MB=y +# CONFIG_HUGETLB_PAGE_SIZE_4MB is not set +# CONFIG_HUGETLB_PAGE_SIZE_64MB is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=0 + +# +# Cache configuration +# +# CONFIG_SH_DIRECT_MAPPED is not set +# CONFIG_SH_WRITETHROUGH is not set +# CONFIG_SH_OCRAM is not set + +# +# Processor features +# +CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_CPU_BIG_ENDIAN is not set +CONFIG_SH_FPU=y +# CONFIG_SH_DSP is not set +CONFIG_SH_STORE_QUEUES=y +CONFIG_CPU_HAS_INTEVT=y +CONFIG_CPU_HAS_INTC2_IRQ=y +CONFIG_CPU_HAS_SR_RB=y +CONFIG_CPU_HAS_PTEA=y + +# +# Timer and clock configuration +# +CONFIG_SH_TMU=y +CONFIG_SH_TIMER_IRQ=28 +CONFIG_NO_IDLE_HZ=y +CONFIG_SH_PCLK_FREQ=50000000 + +# +# CPU Frequency scaling +# +# CONFIG_CPU_FREQ is not set + +# +# DMA support +# +# CONFIG_SH_DMA is not set + +# +# Companion Chips +# +# CONFIG_HD6446X_SERIES is not set + +# +# Additional SuperH Device Drivers +# +CONFIG_HEARTBEAT=y +CONFIG_PUSH_SWITCH=y + +# +# Kernel features +# +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +CONFIG_KEXEC=y +# CONFIG_SMP is not set +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set +CONFIG_PREEMPT=y +CONFIG_PREEMPT_BKL=y + +# +# Boot options +# +CONFIG_ZERO_PAGE_OFFSET=0x00001000 +CONFIG_BOOT_LINK_OFFSET=0x00800000 +# CONFIG_UBC_WAKEUP is not set +CONFIG_CMDLINE_BOOL=y +CONFIG_CMDLINE="console=ttySC0,115200 root=/dev/sda1" + +# +# Bus options +# +CONFIG_PCI=y +CONFIG_SH_PCIDMA_NONCOHERENT=y +CONFIG_PCI_AUTO=y +CONFIG_PCI_AUTO_UPDATE_RESOURCES=y +# CONFIG_PCI_DEBUG is not set + +# +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# PCI Hotplug Support +# +# CONFIG_HOTPLUG_PCI is not set + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_FLAT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options (EXPERIMENTAL) +# +# CONFIG_PM is not set + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +# CONFIG_NETDEBUG is not set +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_ASK_IP_FIB_HASH=y +# CONFIG_IP_FIB_TRIE is not set +CONFIG_IP_FIB_HASH=y +# CONFIG_IP_MULTIPLE_TABLES is not set +# CONFIG_IP_ROUTE_MULTIPATH is not set +# CONFIG_IP_ROUTE_VERBOSE is not set +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set + +# +# DCCP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_DCCP is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set + +# +# TIPC Configuration (EXPERIMENTAL) +# +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +CONFIG_BRIDGE=m +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +CONFIG_LLC=m +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_IEEE80211 is not set +CONFIG_WIRELESS_EXT=y + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=m +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set + +# +# Connector - unified userspace <-> kernelspace linker +# +# CONFIG_CONNECTOR is not set + +# +# Memory Technology Devices (MTD) +# +# CONFIG_MTD is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# +# CONFIG_PNPACPI is not set + +# +# Block devices +# +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SX8 is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=4096 +CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set + +# +# Misc devices +# +# CONFIG_SGI_IOC4 is not set +# CONFIG_TIFM_CORE is not set + +# +# ATA/ATAPI/MFM/RLL support +# +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +CONFIG_CHR_DEV_SG=m +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set + +# +# SCSI low-level drivers +# +# CONFIG_ISCSI_TCP is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC7XXX_OLD is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_DPT_I2O is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_FC is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_LPFC is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_DC390T is not set +# CONFIG_SCSI_NSP32 is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_SRP is not set + +# +# Serial ATA (prod) and Parallel ATA (experimental) drivers +# +CONFIG_ATA=y +# CONFIG_ATA_NONSTANDARD is not set +# CONFIG_SATA_AHCI is not set +# CONFIG_SATA_SVW is not set +# CONFIG_ATA_PIIX is not set +# CONFIG_SATA_MV is not set +# CONFIG_SATA_NV is not set +# CONFIG_PDC_ADMA is not set +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_PROMISE is not set +# CONFIG_SATA_SX4 is not set +CONFIG_SATA_SIL=y +# CONFIG_SATA_SIL24 is not set +# CONFIG_SATA_SIS is not set +# CONFIG_SATA_ULI is not set +# CONFIG_SATA_VIA is not set +# CONFIG_SATA_VITESSE is not set +# CONFIG_SATA_INIC162X is not set +# CONFIG_PATA_ALI is not set +# CONFIG_PATA_AMD is not set +# CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CS5520 is not set +# CONFIG_PATA_CS5530 is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +# CONFIG_ATA_GENERIC is not set +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_IT8213 is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_TRIFLEX is not set +# CONFIG_PATA_MARVELL is not set +# CONFIG_PATA_MPIIX is not set +# CONFIG_PATA_OLDPIIX is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_OPTI is not set +# CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RZ1000 is not set +# CONFIG_PATA_SC1200 is not set +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_SIL680 is not set +# CONFIG_PATA_SIS is not set +# CONFIG_PATA_VIA is not set +# CONFIG_PATA_WINBOND is not set +CONFIG_PATA_PLATFORM=y + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set +# CONFIG_FUSION_SPI is not set +# CONFIG_FUSION_FC is not set +# CONFIG_FUSION_SAS is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_IEEE1394 is not set + +# +# I2O device support +# +# CONFIG_I2O is not set + +# +# Network device support +# +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set + +# +# ARCnet devices +# +# CONFIG_ARCNET is not set + +# +# PHY device support +# +# CONFIG_PHYLIB is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_STNIC is not set +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_SMC91X is not set + +# +# Tulip family network device support +# +# CONFIG_NET_TULIP is not set +# CONFIG_HP100 is not set +# CONFIG_NET_PCI is not set + +# +# Ethernet (1000 Mbit) +# +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +# CONFIG_E1000 is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +CONFIG_R8169=y +# CONFIG_R8169_NAPI is not set +# CONFIG_SIS190 is not set +# CONFIG_SKGE is not set +# CONFIG_SKY2 is not set +# CONFIG_SK98LIN is not set +# CONFIG_TIGON3 is not set +# CONFIG_BNX2 is not set +# CONFIG_QLA3XXX is not set +# CONFIG_ATL1 is not set + +# +# Ethernet (10000 Mbit) +# +# CONFIG_CHELSIO_T1 is not set +# CONFIG_CHELSIO_T3 is not set +# CONFIG_IXGB is not set +# CONFIG_S2IO is not set +# CONFIG_MYRI10GE is not set +# CONFIG_NETXEN_NIC is not set + +# +# Token Ring devices +# +# CONFIG_TR is not set + +# +# Wireless LAN (non-hamradio) +# +CONFIG_NET_RADIO=y +# CONFIG_NET_WIRELESS_RTNETLINK is not set + +# +# Obsolete Wireless cards support (pre-802.11) +# +# CONFIG_STRIP is not set + +# +# Wireless 802.11b ISA/PCI cards support +# +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set +# CONFIG_HERMES is not set +# CONFIG_ATMEL is not set + +# +# Prism GT/Duette 802.11(a/b/g) PCI/Cardbus support +# +# CONFIG_PRISM54 is not set +# CONFIG_HOSTAP is not set +CONFIG_NET_WIRELESS=y + +# +# Wan interfaces +# +# CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NET_FC is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Telephony Support +# +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_TSDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +# CONFIG_SERIO_I8042 is not set +# CONFIG_SERIO_SERPORT is not set +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +# CONFIG_VT is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_SH_SCI=y +CONFIG_SERIAL_SH_SCI_NR_UARTS=6 +CONFIG_SERIAL_SH_SCI_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +CONFIG_HW_RANDOM=y +# CONFIG_GEN_RTC is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set +# CONFIG_DRM is not set +# CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# +# CONFIG_TCG_TPM is not set + +# +# I2C support +# +# CONFIG_I2C is not set + +# +# SPI support +# +# CONFIG_SPI is not set +# CONFIG_SPI_MASTER is not set + +# +# Dallas's 1-wire bus +# +# CONFIG_W1 is not set + +# +# Hardware Monitoring support +# +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_SENSORS_ABITUGURU is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set + +# +# Graphics support +# +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +# CONFIG_FB_CFB_FILLRECT is not set +# CONFIG_FB_CFB_COPYAREA is not set +# CONFIG_FB_CFB_IMAGEBLIT is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frambuffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +# CONFIG_FB_EPSON1355 is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_VIRTUAL is not set + +# +# Logo configuration +# +# CONFIG_LOGO is not set + +# +# Sound +# +CONFIG_SOUND=m + +# +# Advanced Linux Sound Architecture +# +# CONFIG_SND is not set + +# +# Open Sound System +# +CONFIG_SOUND_PRIME=m +# CONFIG_OBSOLETE_OSS is not set +# CONFIG_SOUND_BT878 is not set +# CONFIG_SOUND_ICH is not set +# CONFIG_SOUND_TRIDENT is not set +# CONFIG_SOUND_MSNDCLAS is not set +# CONFIG_SOUND_MSNDPIN is not set +# CONFIG_SOUND_VIA82CXXX is not set + +# +# HID Devices +# +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set + +# +# USB support +# +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARCH_HAS_EHCI=y +# CONFIG_USB is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# USB Gadget Support +# +# CONFIG_USB_GADGET is not set + +# +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# +# LED devices +# +# CONFIG_NEW_LEDS is not set + +# +# LED drivers +# + +# +# LED Triggers +# + +# +# InfiniBand support +# +# CONFIG_INFINIBAND is not set + +# +# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) +# + +# +# Real Time Clock +# +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set + +# +# RTC drivers +# +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_M48T86 is not set +CONFIG_RTC_DRV_SH=y +# CONFIG_RTC_DRV_TEST is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# DMA Engine support +# +# CONFIG_DMA_ENGINE is not set + +# +# DMA Clients +# + +# +# DMA Devices +# + +# +# Auxiliary Display support +# + +# +# Virtualization +# + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_XATTR=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_MINIX_FS=y +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +CONFIG_FUSE_FS=m + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +CONFIG_NTFS_FS=y +# CONFIG_NTFS_DEBUG is not set +CONFIG_NTFS_RW=y + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +CONFIG_HUGETLBFS=y +CONFIG_HUGETLB_PAGE=y +CONFIG_RAMFS=y +CONFIG_CONFIGFS_FS=m + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +CONFIG_NFS_V4=y +# CONFIG_NFS_DIRECTIO is not set +CONFIG_NFSD=y +CONFIG_NFSD_V3=y +# CONFIG_NFSD_V3_ACL is not set +CONFIG_NFSD_V4=y +CONFIG_NFSD_TCP=y +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_EXPORTFS=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_RPCSEC_GSS_KRB5=y +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +# CONFIG_9P_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y + +# +# Native Language Support +# +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +CONFIG_NLS_CODEPAGE_932=y +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set + +# +# Distributed Lock Manager +# +# CONFIG_DLM is not set + +# +# Profiling support +# +CONFIG_PROFILING=y +CONFIG_OPROFILE=m + +# +# Kernel hacking +# +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_MAGIC_SYSRQ=y +# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_DETECT_SOFTLOCKUP is not set +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_SLAB is not set +# CONFIG_DEBUG_PREEMPT is not set +CONFIG_DEBUG_SPINLOCK=y +CONFIG_DEBUG_MUTEXES=y +CONFIG_DEBUG_LOCK_ALLOC=y +# CONFIG_PROVE_LOCKING is not set +CONFIG_LOCKDEP=y +# CONFIG_DEBUG_LOCKDEP is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +CONFIG_DEBUG_LOCKING_API_SELFTESTS=y +CONFIG_STACKTRACE=y +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_LIST is not set +CONFIG_FRAME_POINTER=y +CONFIG_FORCED_INLINING=y +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_FAULT_INJECTION is not set +CONFIG_SH_STANDARD_BIOS=y +# CONFIG_EARLY_SCIF_CONSOLE is not set +CONFIG_EARLY_PRINTK=y +CONFIG_DEBUG_STACKOVERFLOW=y +CONFIG_DEBUG_STACK_USAGE=y +# CONFIG_4KSTACKS is not set +# CONFIG_SH_KGDB is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +CONFIG_CRYPTO=y +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_WP512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_GF128MUL is not set +CONFIG_CRYPTO_ECB=m +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_PCBC=m +# CONFIG_CRYPTO_LRW is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_TWOFISH is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Hardware crypto devices +# + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +CONFIG_CRC32=y +# CONFIG_LIBCRC32C is not set +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y diff --git a/arch/sh/drivers/Kconfig b/arch/sh/drivers/Kconfig index c54c758e624..420c6b2f33a 100644 --- a/arch/sh/drivers/Kconfig +++ b/arch/sh/drivers/Kconfig @@ -1,5 +1,15 @@ +source "arch/sh/drivers/dma/Kconfig" +source "arch/sh/cchips/Kconfig" + menu "Additional SuperH Device Drivers" +config HEARTBEAT + bool "Heartbeat LED" + help + Use the power-on LED on your machine as a load meter. The exact + behavior is platform-dependent, but normally the flash frequency is + a hyperbolic function of the 5-minute load average. + config PUSH_SWITCH tristate "Push switch support" help diff --git a/arch/sh/drivers/pci/Makefile b/arch/sh/drivers/pci/Makefile index cc8d0d0b142..8a7e7065193 100644 --- a/arch/sh/drivers/pci/Makefile +++ b/arch/sh/drivers/pci/Makefile @@ -8,12 +8,13 @@ obj-$(CONFIG_PCI_AUTO) += pci-auto.o obj-$(CONFIG_CPU_SUBTYPE_ST40STB1) += pci-st40.o obj-$(CONFIG_CPU_SUBTYPE_SH7751) += pci-sh7751.o ops-sh4.o obj-$(CONFIG_CPU_SUBTYPE_SH7780) += pci-sh7780.o ops-sh4.o +obj-$(CONFIG_CPU_SUBTYPE_SH7785) += pci-sh7780.o ops-sh4.o obj-$(CONFIG_SH_DREAMCAST) += ops-dreamcast.o fixups-dreamcast.o \ dma-dreamcast.o obj-$(CONFIG_SH_SECUREEDGE5410) += ops-snapgear.o obj-$(CONFIG_SH_RTS7751R2D) += ops-rts7751r2d.o fixups-rts7751r2d.o obj-$(CONFIG_SH_SH03) += ops-sh03.o fixups-sh03.o -obj-$(CONFIG_SH_R7780RP) += ops-r7780rp.o fixups-r7780rp.o +obj-$(CONFIG_SH_HIGHLANDER) += ops-r7780rp.o fixups-r7780rp.o obj-$(CONFIG_SH_TITAN) += ops-titan.o obj-$(CONFIG_SH_LANDISK) += ops-landisk.o diff --git a/arch/sh/drivers/pci/ops-r7780rp.c b/arch/sh/drivers/pci/ops-r7780rp.c index eeea1577e11..6f4fb38bafa 100644 --- a/arch/sh/drivers/pci/ops-r7780rp.c +++ b/arch/sh/drivers/pci/ops-r7780rp.c @@ -17,18 +17,35 @@ #include #include "pci-sh4.h" +static char r7780rp_irq_tab[] __initdata = { + 0, 1, 2, 3, +}; + +static char r7780mp_irq_tab[] __initdata = { + 65, 66, 67, 68, +}; + +static char r7785rp_irq_tab[][4] __initdata = { + { 65, 66, 67, 68 }, /* INT ABCD */ + { 66, 67, 68, 65 }, /* INT BCDA */ + { 67, 68, 65, 66 }, /* INT CDAB */ + { 68, 65, 66, 67 }, /* INT DABC */ + { 64, 64, 64, 64 }, /* PCI Host */ +}; + int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) { - switch (slot) { - case 0: return IRQ_PCISLOT1; /* PCI Interrupt #1 */ - case 1: return IRQ_PCISLOT2; /* PCI Interrupt #2 */ - case 2: return IRQ_PCISLOT3; /* PCI Interrupt #3 */ - case 3: return IRQ_PCISLOT4; /* PCI Interrupt E4 */ - default: - printk(KERN_ERR "PCI: Bad IRQ mapping " - "request for slot %d, func %d\n", slot, pin-1); - return -1; - } + if (mach_is_r7780rp()) + return r7780rp_irq_tab[slot]; + if (mach_is_r7780mp()) + return r7780mp_irq_tab[slot]; + if (mach_is_r7785rp()) + return r7785rp_irq_tab[slot][pin]; + + printk(KERN_ERR "PCI: Bad IRQ mapping " + "request for slot %d, func %d\n", slot, pin-1); + + return -1; } static struct resource sh7780_io_resource = { diff --git a/arch/sh/drivers/pci/pci-sh4.h b/arch/sh/drivers/pci/pci-sh4.h index 5a61d6041f2..1901c33cde6 100644 --- a/arch/sh/drivers/pci/pci-sh4.h +++ b/arch/sh/drivers/pci/pci-sh4.h @@ -1,7 +1,7 @@ #ifndef __PCI_SH4_H #define __PCI_SH4_H -#ifdef CONFIG_CPU_SUBTYPE_SH7780 +#if defined(CONFIG_CPU_SUBTYPE_SH7780) || defined(CONFIG_CPU_SUBTYPE_SH7785) #include "pci-sh7780.h" #else #include "pci-sh7751.h" diff --git a/arch/sh/drivers/pci/pci-sh7780.c b/arch/sh/drivers/pci/pci-sh7780.c index 602b644c35a..16b30a9e94b 100644 --- a/arch/sh/drivers/pci/pci-sh7780.c +++ b/arch/sh/drivers/pci/pci-sh7780.c @@ -48,7 +48,7 @@ static int __init sh7780_pci_init(void) { unsigned int id; - int ret; + int ret, match = 0; pr_debug("PCI: Starting intialization.\n"); @@ -56,8 +56,17 @@ static int __init sh7780_pci_init(void) /* check for SH7780/SH7780R hardware */ id = pci_read_reg(SH7780_PCIVID); - if ((id != ((SH7780_DEVICE_ID << 16) | SH7780_VENDOR_ID)) && - (id != ((SH7781_DEVICE_ID << 16) | SH7780_VENDOR_ID))) { + if ((id & 0xffff) == SH7780_VENDOR_ID) { + switch ((id >> 16) & 0xffff) { + case SH7780_DEVICE_ID: + case SH7781_DEVICE_ID: + case SH7785_DEVICE_ID: + match = 1; + break; + } + } + + if (unlikely(!match)) { printk(KERN_ERR "PCI: This is not an SH7780 (%x)\n", id); return -ENODEV; } @@ -138,7 +147,7 @@ int __init sh7780_pcic_init(struct sh4_pci_address_map *map) * DMA interrupts... */ -#ifdef CONFIG_SH_R7780RP +#ifdef CONFIG_SH_HIGHLANDER pci_fixup_pcic(); #endif diff --git a/arch/sh/drivers/pci/pci-sh7780.h b/arch/sh/drivers/pci/pci-sh7780.h index f02d2180a4b..bd44255509e 100644 --- a/arch/sh/drivers/pci/pci-sh7780.h +++ b/arch/sh/drivers/pci/pci-sh7780.h @@ -14,8 +14,9 @@ /* Platform Specific Values */ #define SH7780_VENDOR_ID 0x1912 -#define SH7780_DEVICE_ID 0x0002 #define SH7781_DEVICE_ID 0x0001 +#define SH7780_DEVICE_ID 0x0002 +#define SH7785_DEVICE_ID 0x0007 /* SH7780 Control Registers */ #define SH7780_PCI_VCR0 0xFE000000 diff --git a/arch/sh/kernel/cpu/irq/intc2.c b/arch/sh/kernel/cpu/irq/intc2.c index 74defe76a05..d8e22f4ff0f 100644 --- a/arch/sh/kernel/cpu/irq/intc2.c +++ b/arch/sh/kernel/cpu/irq/intc2.c @@ -18,7 +18,8 @@ #define INTC2_BASE 0xfe080000 #define INTC2_INTMSK (INTC2_BASE + 0x40) #define INTC2_INTMSKCLR (INTC2_BASE + 0x60) -#elif defined(CONFIG_CPU_SUBTYPE_SH7780) +#elif defined(CONFIG_CPU_SUBTYPE_SH7780) || \ + defined(CONFIG_CPU_SUBTYPE_SH7785) #define INTC2_BASE 0xffd40000 #define INTC2_INTMSK (INTC2_BASE + 0x38) #define INTC2_INTMSKCLR (INTC2_BASE + 0x3c) diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c index 58950de2696..8cd04904c77 100644 --- a/arch/sh/kernel/cpu/sh4/probe.c +++ b/arch/sh/kernel/cpu/sh4/probe.c @@ -124,6 +124,14 @@ int __init detect_cpu_and_cache_system(void) current_cpu_data.dcache.ways = 4; current_cpu_data.flags |= CPU_HAS_LLSC; break; + case 0x3004: + case 0x3007: + current_cpu_data.type = CPU_SH7785; + current_cpu_data.icache.ways = 4; + current_cpu_data.dcache.ways = 4; + current_cpu_data.flags |= CPU_HAS_FPU | CPU_HAS_PERF_COUNTER | + CPU_HAS_LLSC; + break; case 0x3008: if (prr == 0xa0) { current_cpu_data.type = CPU_SH7722; diff --git a/arch/sh/kernel/cpu/sh4a/Makefile b/arch/sh/kernel/cpu/sh4a/Makefile index a8f493f2f21..1efeda0e182 100644 --- a/arch/sh/kernel/cpu/sh4a/Makefile +++ b/arch/sh/kernel/cpu/sh4a/Makefile @@ -5,6 +5,7 @@ # CPU subtype setup obj-$(CONFIG_CPU_SUBTYPE_SH7770) += setup-sh7770.o obj-$(CONFIG_CPU_SUBTYPE_SH7780) += setup-sh7780.o +obj-$(CONFIG_CPU_SUBTYPE_SH7785) += setup-sh7785.o obj-$(CONFIG_CPU_SUBTYPE_SH73180) += setup-sh73180.o obj-$(CONFIG_CPU_SUBTYPE_SH7343) += setup-sh7343.o obj-$(CONFIG_CPU_SUBTYPE_SH7722) += setup-sh7722.o @@ -13,6 +14,7 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7722) += setup-sh7722.o clock-$(CONFIG_CPU_SUBTYPE_SH73180) := clock-sh73180.o clock-$(CONFIG_CPU_SUBTYPE_SH7770) := clock-sh7770.o clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o +clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7343.o clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7343.o diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c new file mode 100644 index 00000000000..805535aa505 --- /dev/null +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c @@ -0,0 +1,162 @@ +/* + * arch/sh/kernel/cpu/sh4a/clock-sh7785.c + * + * SH7785 support for the clock framework + * + * Copyright (C) 2007 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include +#include + +static int ifc_divisors[] = { 1, 2, 4, 6 }; +static int ufc_divisors[] = { 1, 1, 4, 6 }; +static int sfc_divisors[] = { 1, 1, 4, 6 }; +static int bfc_divisors[] = { 1, 1, 1, 1, 1, 12, 16, 18, + 24, 32, 36, 48, 1, 1, 1, 1 }; +static int mfc_divisors[] = { 1, 1, 4, 6 }; +static int pfc_divisors[] = { 1, 1, 1, 1, 1, 1, 1, 18, + 24, 32, 36, 48, 1, 1, 1, 1 }; + +static void master_clk_init(struct clk *clk) +{ + clk->rate *= 36; +} + +static struct clk_ops sh7785_master_clk_ops = { + .init = master_clk_init, +}; + +static void module_clk_recalc(struct clk *clk) +{ + int idx = (ctrl_inl(FRQMR1) & 0x000f); + clk->rate = clk->parent->rate / pfc_divisors[idx]; +} + +static struct clk_ops sh7785_module_clk_ops = { + .recalc = module_clk_recalc, +}; + +static void bus_clk_recalc(struct clk *clk) +{ + int idx = ((ctrl_inl(FRQMR1) >> 16) & 0x000f); + clk->rate = clk->parent->rate / bfc_divisors[idx]; +} + +static struct clk_ops sh7785_bus_clk_ops = { + .recalc = bus_clk_recalc, +}; + +static void cpu_clk_recalc(struct clk *clk) +{ + int idx = ((ctrl_inl(FRQMR1) >> 28) & 0x0003); + clk->rate = clk->parent->rate / ifc_divisors[idx]; +} + +static struct clk_ops sh7785_cpu_clk_ops = { + .recalc = cpu_clk_recalc, +}; + +static struct clk_ops *sh7785_clk_ops[] = { + &sh7785_master_clk_ops, + &sh7785_module_clk_ops, + &sh7785_bus_clk_ops, + &sh7785_cpu_clk_ops, +}; + +void __init arch_init_clk_ops(struct clk_ops **ops, int idx) +{ + if (idx < ARRAY_SIZE(sh7785_clk_ops)) + *ops = sh7785_clk_ops[idx]; +} + +static void shyway_clk_recalc(struct clk *clk) +{ + int idx = ((ctrl_inl(FRQMR1) >> 20) & 0x0003); + clk->rate = clk->parent->rate / sfc_divisors[idx]; +} + +static struct clk_ops sh7785_shyway_clk_ops = { + .recalc = shyway_clk_recalc, +}; + +static struct clk sh7785_shyway_clk = { + .name = "shyway_clk", + .flags = CLK_ALWAYS_ENABLED, + .ops = &sh7785_shyway_clk_ops, +}; + +static void ddr_clk_recalc(struct clk *clk) +{ + int idx = ((ctrl_inl(FRQMR1) >> 12) & 0x0003); + clk->rate = clk->parent->rate / mfc_divisors[idx]; +} + +static struct clk_ops sh7785_ddr_clk_ops = { + .recalc = ddr_clk_recalc, +}; + +static struct clk sh7785_ddr_clk = { + .name = "ddr_clk", + .flags = CLK_ALWAYS_ENABLED, + .ops = &sh7785_ddr_clk_ops, +}; + +static void ram_clk_recalc(struct clk *clk) +{ + int idx = ((ctrl_inl(FRQMR1) >> 24) & 0x0003); + clk->rate = clk->parent->rate / ufc_divisors[idx]; +} + +static struct clk_ops sh7785_ram_clk_ops = { + .recalc = ram_clk_recalc, +}; + +static struct clk sh7785_ram_clk = { + .name = "ram_clk", + .flags = CLK_ALWAYS_ENABLED, + .ops = &sh7785_ram_clk_ops, +}; + +/* + * Additional SH7785-specific on-chip clocks that aren't already part of the + * clock framework + */ +static struct clk *sh7785_onchip_clocks[] = { + &sh7785_shyway_clk, + &sh7785_ddr_clk, + &sh7785_ram_clk, +}; + +static int __init sh7785_clk_init(void) +{ + struct clk *clk = clk_get(NULL, "master_clk"); + int i; + + for (i = 0; i < ARRAY_SIZE(sh7785_onchip_clocks); i++) { + struct clk *clkp = sh7785_onchip_clocks[i]; + + clkp->parent = clk; + clk_register(clkp); + clk_enable(clkp); + } + + /* + * Now that we have the rest of the clocks registered, we need to + * force the parent clock to propagate so that these clocks will + * automatically figure out their rate. We cheat by handing the + * parent clock its current rate and forcing child propagation. + */ + clk_set_rate(clk, clk_get_rate(clk)); + + clk_put(clk); + + return 0; +} +arch_initcall(sh7785_clk_init); diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c new file mode 100644 index 00000000000..c9ae6592f09 --- /dev/null +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c @@ -0,0 +1,98 @@ +/* + * SH7785 Setup + * + * Copyright (C) 2007 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include + +static struct plat_sci_port sci_platform_data[] = { + { + .mapbase = 0xffea0000, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCIF, + .irqs = { 40, 41, 43, 42 }, + }, { + .mapbase = 0xffeb0000, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCIF, + .irqs = { 44, 45, 47, 46 }, + }, + + /* + * The rest of these all have multiplexed IRQs + */ + { + .mapbase = 0xffec0000, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCIF, + .irqs = { 60, 60, 60, 60 }, + }, { + .mapbase = 0xffed0000, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCIF, + .irqs = { 61, 61, 61, 61 }, + }, { + .mapbase = 0xffee0000, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCIF, + .irqs = { 62, 62, 62, 62 }, + }, { + .mapbase = 0xffef0000, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCIF, + .irqs = { 63, 63, 63, 63 }, + }, { + .flags = 0, + } +}; + +static struct platform_device sci_device = { + .name = "sh-sci", + .id = -1, + .dev = { + .platform_data = sci_platform_data, + }, +}; + +static struct platform_device *sh7785_devices[] __initdata = { + &sci_device, +}; + +static int __init sh7785_devices_setup(void) +{ + return platform_add_devices(sh7785_devices, + ARRAY_SIZE(sh7785_devices)); +} +__initcall(sh7785_devices_setup); + +static struct intc2_data intc2_irq_table[] = { + { 28, 0, 24, 0, 0, 2 }, /* TMU0 */ + + { 40, 8, 24, 0, 3, 3 }, /* SCIF0 ERI */ + { 41, 8, 24, 0, 3, 3 }, /* SCIF0 RXI */ + { 42, 8, 24, 0, 3, 3 }, /* SCIF0 BRI */ + { 43, 8, 24, 0, 3, 3 }, /* SCIF0 TXI */ + + { 76, 8, 16, 0, 4, 3 }, /* SCIF1 ERI */ + { 77, 8, 16, 0, 4, 3 }, /* SCIF1 RXI */ + { 78, 8, 16, 0, 4, 3 }, /* SCIF1 BRI */ + { 79, 8, 16, 0, 4, 3 }, /* SCIF1 TXI */ + + { 64, 0x14, 8, 0, 14, 2 }, /* PCIC0 */ + { 65, 0x14, 0, 0, 15, 2 }, /* PCIC1 */ + { 66, 0x18, 24, 0, 16, 2 }, /* PCIC2 */ + { 67, 0x18, 16, 0, 17, 2 }, /* PCIC3 */ + { 68, 0x18, 8, 0, 18, 2 }, /* PCIC4 */ +}; + +void __init init_IRQ_intc2(void) +{ + make_intc2_irq(intc2_irq_table, ARRAY_SIZE(intc2_irq_table)); +} diff --git a/arch/sh/kernel/timers/timer-tmu.c b/arch/sh/kernel/timers/timer-tmu.c index e060e71d078..ad1ede52fc9 100644 --- a/arch/sh/kernel/timers/timer-tmu.c +++ b/arch/sh/kernel/timers/timer-tmu.c @@ -148,7 +148,9 @@ static int tmu_timer_init(void) /* Start TMU0 */ tmu_timer_stop(); -#if !defined(CONFIG_CPU_SUBTYPE_SH7300) && !defined(CONFIG_CPU_SUBTYPE_SH7760) +#if !defined(CONFIG_CPU_SUBTYPE_SH7300) && \ + !defined(CONFIG_CPU_SUBTYPE_SH7760) && \ + !defined(CONFIG_CPU_SUBTYPE_SH7785) ctrl_outb(TMU_TOCR_INIT, TMU_TOCR); #endif diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types index 4fe0f94cbf4..5b1236c2cfe 100644 --- a/arch/sh/tools/mach-types +++ b/arch/sh/tools/mach-types @@ -26,6 +26,7 @@ SH03 SH_SH03 LANDISK SH_LANDISK R7780RP SH_R7780RP R7780MP SH_R7780MP +R7785RP SH_R7785RP TITAN SH_TITAN SHMIN SH_SHMIN 7710VOIPGW SH_7710VOIPGW diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c index 4b17f845f5c..94deebda6da 100644 --- a/drivers/serial/sh-sci.c +++ b/drivers/serial/sh-sci.c @@ -62,7 +62,7 @@ struct sci_port { unsigned int type; /* Port IRQs: ERI, RXI, TXI, BRI (optional) */ - unsigned int irqs[SCIx_NR_IRQS]; + unsigned int irqs[SCIx_NR_IRQS]; /* Port pin configuration */ void (*init_pins)(struct uart_port *port, @@ -351,7 +351,7 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) } else { #ifdef CONFIG_CPU_SUBTYPE_SH7343 /* Nothing */ -#elif defined(CONFIG_CPU_SUBTYPE_SH7780) +#elif defined(CONFIG_CPU_SUBTYPE_SH7780) || defined(CONFIG_CPU_SUBTYPE_SH7785) ctrl_outw(0x0080, SCSPTR0); /* Set RTS = 1 */ #else ctrl_outw(0x0080, SCSPTR2); /* Set RTS = 1 */ @@ -361,7 +361,9 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) } #endif -#if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780) +#if defined(CONFIG_CPU_SUBTYPE_SH7760) || \ + defined(CONFIG_CPU_SUBTYPE_SH7780) || \ + defined(CONFIG_CPU_SUBTYPE_SH7785) static inline int scif_txroom(struct uart_port *port) { return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0x7f); @@ -1368,9 +1370,19 @@ static int __devinit sci_probe(struct platform_device *dev) struct plat_sci_port *p = dev->dev.platform_data; int i; - for (i = 0; p && p->flags != 0 && i < SCI_NPORTS; p++, i++) { + for (i = 0; p && p->flags != 0; p++, i++) { struct sci_port *sciport = &sci_ports[i]; + /* Sanity check */ + if (unlikely(i == SCI_NPORTS)) { + dev_notice(&dev->dev, "Attempting to register port " + "%d when only %d are available.\n", + i+1, SCI_NPORTS); + dev_notice(&dev->dev, "Consider bumping " + "CONFIG_SERIAL_SH_SCI_NR_UARTS!\n"); + break; + } + sciport->port.mapbase = p->mapbase; /* diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h index 77f7d6351ab..854153a1d60 100644 --- a/drivers/serial/sh-sci.h +++ b/drivers/serial/sh-sci.h @@ -140,6 +140,16 @@ # define SCIF_ORER 0x0001 /* Overrun error bit */ # define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ # define SCIF_ONLY +#elif defined(CONFIG_CPU_SUBTYPE_SH7785) +# define SCSPTR0 0xffea0024 /* 16 bit SCIF */ +# define SCSPTR1 0xffeb0024 /* 16 bit SCIF */ +# define SCSPTR2 0xffec0024 /* 16 bit SCIF */ +# define SCSPTR3 0xffed0024 /* 16 bit SCIF */ +# define SCSPTR4 0xffee0024 /* 16 bit SCIF */ +# define SCSPTR5 0xffef0024 /* 16 bit SCIF */ +# define SCIF_OPER 0x0001 /* Overrun error bit */ +# define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ +# define SCIF_ONLY #elif defined(CONFIG_CPU_SUBTYPE_SH7206) # define SCSPTR0 0xfffe8020 /* 16 bit SCIF */ # define SCSPTR1 0xfffe8820 /* 16 bit SCIF */ @@ -163,7 +173,10 @@ #define SCI_CTRL_FLAGS_RIE 0x40 /* all */ #define SCI_CTRL_FLAGS_TE 0x20 /* all */ #define SCI_CTRL_FLAGS_RE 0x10 /* all */ -#if defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7751) || defined(CONFIG_CPU_SUBTYPE_SH7780) +#if defined(CONFIG_CPU_SUBTYPE_SH7750) || \ + defined(CONFIG_CPU_SUBTYPE_SH7751) || \ + defined(CONFIG_CPU_SUBTYPE_SH7780) || \ + defined(CONFIG_CPU_SUBTYPE_SH7785) #define SCI_CTRL_FLAGS_REIE 0x08 /* 7750 SCIF */ #else #define SCI_CTRL_FLAGS_REIE 0 @@ -385,7 +398,9 @@ SCIx_FNS(SCxTDR, 0x06, 8, 0x0c, 8, 0x06, 8, 0x0C, 8, 0x03, 8) SCIx_FNS(SCxSR, 0x08, 8, 0x10, 8, 0x08, 16, 0x10, 16, 0x04, 8) SCIx_FNS(SCxRDR, 0x0a, 8, 0x14, 8, 0x0A, 8, 0x14, 8, 0x05, 8) SCIF_FNS(SCFCR, 0x0c, 8, 0x18, 16) -#if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780) +#if defined(CONFIG_CPU_SUBTYPE_SH7760) || \ + defined(CONFIG_CPU_SUBTYPE_SH7780) || \ + defined(CONFIG_CPU_SUBTYPE_SH7785) SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16) SCIF_FNS(SCTFDR, 0x0e, 16, 0x1C, 16) SCIF_FNS(SCRFDR, 0x0e, 16, 0x20, 16) @@ -576,6 +591,23 @@ static inline int sci_rxd_in(struct uart_port *port) return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ return 1; } +#elif defined(CONFIG_CPU_SUBTYPE_SH7785) +static inline int sci_rxd_in(struct uart_port *port) +{ + if (port->mapbase == 0xffea0000) + return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ + if (port->mapbase == 0xffeb0000) + return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ + if (port->mapbase == 0xffec0000) + return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ + if (port->mapbase == 0xffed0000) + return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ + if (port->mapbase == 0xffee0000) + return ctrl_inw(SCSPTR4) & 0x0001 ? 1 : 0; /* SCIF */ + if (port->mapbase == 0xffef0000) + return ctrl_inw(SCSPTR5) & 0x0001 ? 1 : 0; /* SCIF */ + return 1; +} #elif defined(CONFIG_CPU_SUBTYPE_SH7206) static inline int sci_rxd_in(struct uart_port *port) { @@ -634,7 +666,9 @@ static inline int sci_rxd_in(struct uart_port *port) * -- Mitch Davis - 15 Jul 2000 */ -#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7780) +#if defined(CONFIG_CPU_SUBTYPE_SH7300) || \ + defined(CONFIG_CPU_SUBTYPE_SH7780) || \ + defined(CONFIG_CPU_SUBTYPE_SH7785) #define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1) #elif defined(CONFIG_CPU_SUBTYPE_SH7705) #define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1) diff --git a/include/asm-sh/cpu-sh4/freq.h b/include/asm-sh/cpu-sh4/freq.h index 602d061ca2d..99402547ed0 100644 --- a/include/asm-sh/cpu-sh4/freq.h +++ b/include/asm-sh/cpu-sh4/freq.h @@ -14,6 +14,10 @@ #define FRQCR 0xa4150000 #elif defined(CONFIG_CPU_SUBTYPE_SH7780) #define FRQCR 0xffc80000 +#elif defined(CONFIG_CPU_SUBTYPE_SH7785) +#define FRQCR0 0xffc80000 +#define FRQCR1 0xffc80004 +#define FRQMR1 0xffc80014 #else #define FRQCR 0xffc00000 #endif diff --git a/include/asm-sh/pci.h b/include/asm-sh/pci.h index 6ccc948fe21..b1f9a9e0231 100644 --- a/include/asm-sh/pci.h +++ b/include/asm-sh/pci.h @@ -35,7 +35,7 @@ extern struct pci_channel board_pci_channels[]; /* * I/O routine helpers */ -#ifdef CONFIG_CPU_SUBTYPE_SH7780 +#if defined(CONFIG_CPU_SUBTYPE_SH7780) || defined(CONFIG_CPU_SUBTYPE_SH7785) #define PCI_IO_AREA 0xFE400000 #define PCI_IO_SIZE 0x00400000 #else diff --git a/include/asm-sh/r7780rp.h b/include/asm-sh/r7780rp.h index c18f648a799..8c0721965a5 100644 --- a/include/asm-sh/r7780rp.h +++ b/include/asm-sh/r7780rp.h @@ -1,17 +1,11 @@ #ifndef __ASM_SH_RENESAS_R7780RP_H #define __ASM_SH_RENESAS_R7780RP_H -/* - * linux/include/asm-sh/r7780rp.h - * - * Copyright (C) 2000 Atom Create Engineering Co., Ltd. - * - * Renesas Solutions Highlander R7780RP support - */ - /* Box specific addresses. */ #if defined(CONFIG_SH_R7780MP) #define PA_BCR 0xa4000000 /* FPGA */ +#define PA_SDPOW (-1) + #define PA_IRLMSK (PA_BCR+0x0000) /* Interrupt Mask control */ #define PA_IRLMON (PA_BCR+0x0002) /* Interrupt Status control */ #define PA_IRLPRI1 (PA_BCR+0x0004) /* Interrupt Priorty 1 */ @@ -70,18 +64,12 @@ #define PA_POFF (PA_BCR+0x0800) /* System Power Off control */ #define PA_PMR (PA_BCR+0x0900) /* */ -#define PA_AX88796L 0xa4100400 /* AX88796L Area */ -#define PA_SC1602BSLB 0xa6000000 /* SC1602BSLB Area */ -#define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */ -#define AX88796L_IO_BASE 0x1000 /* AX88796L IO Base Address */ - #define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */ #define IRQ_PCISLOT1 65 /* PCI Slot #1 IRQ */ #define IRQ_PCISLOT2 66 /* PCI Slot #2 IRQ */ #define IRQ_PCISLOT3 67 /* PCI Slot #3 IRQ */ #define IRQ_PCISLOT4 68 /* PCI Slot #4 IRQ */ -// #define IRQ_CFINST 0 /* CF Card Insert IRQ */ #define IRQ_TP 2 /* Touch Panel IRQ */ #define IRQ_SCI1 3 /* SCI1 IRQ */ #define IRQ_SCI0 4 /* SCI0 IRQ */ @@ -95,7 +83,7 @@ #define IRQ_ONETH 13 /* On board Ethernet IRQ */ #define IRQ_PSW 14 /* Push Switch IRQ */ -#else /* R7780RP */ +#elif defined(CONFIG_SH_R7780RP) #define PA_BCR 0xa5000000 /* FPGA */ #define PA_IRLMSK (PA_BCR+0x0000) /* Interrupt Mask control */ @@ -163,7 +151,55 @@ #define IRQ_PSW 13 /* Push Switch IRQ */ #define IRQ_ZIGBEE 14 /* Ziggbee IO IRQ */ -#endif /* CONFIG_SH_R7780MP */ +#elif defined(CONFIG_SH_R7785RP) +#define PA_BCR 0xa4000000 /* FPGA */ +#define PA_SDPOW (-1) + +#define PA_PCISCR (PA_BCR+0x0000) +#define PA_IRLPRA (PA_BCR+0x0002) +#define PA_IRLPRB (PA_BCR+0x0004) +#define PA_IRLPRC (PA_BCR+0x0006) +#define PA_IRLPRD (PA_BCR+0x0008) +#define IRLCNTR1 (PA_BCR+0x0010) +#define PA_IRLPRE (PA_BCR+0x000a) +#define PA_IRLPRF (PA_BCR+0x000c) +#define PA_EXIRLCR (PA_BCR+0x000e) +#define PA_IRLMCR1 (PA_BCR+0x0010) +#define PA_IRLMCR2 (PA_BCR+0x0012) +#define PA_IRLSSR1 (PA_BCR+0x0014) +#define PA_IRLSSR2 (PA_BCR+0x0016) +#define PA_CFTCR (PA_BCR+0x0100) +#define PA_CFPCR (PA_BCR+0x0102) +#define PA_PCICR (PA_BCR+0x0110) +#define PA_IVDRCTL (PA_BCR+0x0112) +#define PA_IVDRSR (PA_BCR+0x0114) +#define PA_PDRSTCR (PA_BCR+0x0116) +#define PA_POFF (PA_BCR+0x0120) +#define PA_LCDCR (PA_BCR+0x0130) +#define PA_TPCR (PA_BCR+0x0140) +#define PA_TPCKCR (PA_BCR+0x0142) +#define PA_TPRSTR (PA_BCR+0x0144) +#define PA_TPXPDR (PA_BCR+0x0146) +#define PA_TPYPDR (PA_BCR+0x0148) +#define PA_GPIOPFR (PA_BCR+0x0150) +#define PA_GPIODR (PA_BCR+0x0152) +#define PA_OBLED (PA_BCR+0x0154) +#define PA_SWSR (PA_BCR+0x0156) +#define PA_VERREG (PA_BCR+0x0158) +#define PA_SMCR (PA_BCR+0x0200) +#define PA_SMSMADR (PA_BCR+0x0202) +#define PA_SMMR (PA_BCR+0x0204) +#define PA_SMSADR1 (PA_BCR+0x0206) +#define PA_SMSADR32 (PA_BCR+0x0244) +#define PA_SMTRDR1 (PA_BCR+0x0246) +#define PA_SMTRDR16 (PA_BCR+0x0264) +#define PA_CU3MDR (PA_BCR+0x0300) +#define PA_CU5MDR (PA_BCR+0x0302) +#define PA_MMSR (PA_BCR+0x0400) +#endif + +void make_r7780rp_irq(unsigned int irq); +void highlander_init_irq(void); #define __IO_PREFIX r7780rp #include -- cgit v1.2.3-70-g09d2 From 9465a54fa4a9da628091c372baa84120f8304587 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Tue, 27 Mar 2007 18:13:51 +0900 Subject: sh: MS7712SE01 board support. Support the SH7712 (SH3-DSP) Solution Engine reference board. Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Paul Mundt --- arch/sh/Kconfig.debug | 1 + arch/sh/boards/se/770x/io.c | 2 ++ arch/sh/boards/se/770x/irq.c | 27 ++++++++-------- arch/sh/boards/se/770x/setup.c | 4 ++- arch/sh/kernel/cpu/sh3/Makefile | 1 + arch/sh/kernel/cpu/sh3/probe.c | 3 ++ arch/sh/kernel/cpu/sh3/setup-sh7710.c | 60 +++++++++++++++++++++++++++++++++++ arch/sh/kernel/process.c | 3 +- arch/sh/kernel/setup.c | 1 + arch/sh/mm/Kconfig | 8 +++++ drivers/serial/sh-sci.c | 13 +++++++- drivers/serial/sh-sci.h | 43 ++++++++++++++++++------- include/asm-sh/cpu-sh3/mmu_context.h | 1 + include/asm-sh/processor.h | 2 +- include/asm-sh/se.h | 1 + 15 files changed, 142 insertions(+), 28 deletions(-) (limited to 'arch/sh/kernel/cpu') diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug index 931c620dbc2..be60def6f30 100644 --- a/arch/sh/Kconfig.debug +++ b/arch/sh/Kconfig.debug @@ -33,6 +33,7 @@ config EARLY_SCIF_CONSOLE_PORT default "0xffe00000" if CPU_SUBTYPE_SH7780 default "0xfffe9800" if CPU_SUBTYPE_SH7206 default "0xf8420000" if CPU_SUBTYPE_SH7619 + default "0xa4400000" if CPU_SUBTYPE_SH7712 default "0xffe80000" if CPU_SH4 config EARLY_PRINTK diff --git a/arch/sh/boards/se/770x/io.c b/arch/sh/boards/se/770x/io.c index 9941949331a..c4550473d4c 100644 --- a/arch/sh/boards/se/770x/io.c +++ b/arch/sh/boards/se/770x/io.c @@ -27,6 +27,8 @@ int sh_pcic_io_dummy; static inline volatile __u16 * port2adr(unsigned int port) { + if (port & 0xff000000) + return ( volatile __u16 *) port; if (port >= 0x2000) return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000)); else if (port >= 0x1000) diff --git a/arch/sh/boards/se/770x/irq.c b/arch/sh/boards/se/770x/irq.c index 307ca5da623..59cdffa1396 100644 --- a/arch/sh/boards/se/770x/irq.c +++ b/arch/sh/boards/se/770x/irq.c @@ -55,6 +55,17 @@ void make_se770x_irq(struct ipr_data *table, unsigned int nr_irqs) } static struct ipr_data se770x_ipr_map[] = { + /* + * Super I/O (Just mimic PC): + * 1: keyboard + * 3: serial 0 + * 4: serial 1 + * 5: printer + * 6: floppy + * 8: rtc + * 12: mouse + * 14: ide0 + */ #if defined(CONFIG_CPU_SUBTYPE_SH7705) /* This is default value */ { 0xf-0x2, 0, 8, 0x2 , BCR_ILCRA}, @@ -81,8 +92,10 @@ static struct ipr_data se770x_ipr_map[] = { { 4, 0, 4, 0x0f- 4 ,BCR_ILCRC}, { 3, 0, 0, 0x0f- 3 ,BCR_ILCRC}, { 1, 0, 12, 0x0f- 1 ,BCR_ILCRD}, +#if defined(CONFIG_STNIC) /* ST NIC */ { 10, 0, 4, 0x0f-10 ,BCR_ILCRD}, /* LAN */ +#endif /* MRSHPC IRQs setting */ { 0, 0, 12, 0x0f- 0 ,BCR_ILCRE}, /* PCIRQ3 */ { 11, 0, 8, 0x0f-11 ,BCR_ILCRE}, /* PCIRQ2 */ @@ -100,18 +113,6 @@ static struct ipr_data se770x_ipr_map[] = { */ void __init init_se_IRQ(void) { - /* - * Super I/O (Just mimic PC): - * 1: keyboard - * 3: serial 0 - * 4: serial 1 - * 5: printer - * 6: floppy - * 8: rtc - * 12: mouse - * 14: ide0 - */ -#if defined(CONFIG_CPU_SUBTYPE_SH7705) /* Disable all interrupts */ ctrl_outw(0, BCR_ILCRA); ctrl_outw(0, BCR_ILCRB); @@ -120,6 +121,6 @@ void __init init_se_IRQ(void) ctrl_outw(0, BCR_ILCRE); ctrl_outw(0, BCR_ILCRF); ctrl_outw(0, BCR_ILCRG); -#endif + make_se770x_irq(se770x_ipr_map, ARRAY_SIZE(se770x_ipr_map)); } diff --git a/arch/sh/boards/se/770x/setup.c b/arch/sh/boards/se/770x/setup.c index dab5510699a..f1c7c8d9fdd 100644 --- a/arch/sh/boards/se/770x/setup.c +++ b/arch/sh/boards/se/770x/setup.c @@ -117,7 +117,7 @@ static int __init se_devices_setup(void) { return platform_add_devices(se_devices, ARRAY_SIZE(se_devices)); } -__initcall(se_devices_setup); +device_initcall(se_devices_setup); /* * The Machine Vector @@ -133,6 +133,8 @@ struct sh_machine_vector mv_se __initmv = { .mv_nr_irqs = 61, #elif defined(CONFIG_CPU_SUBTYPE_SH7705) .mv_nr_irqs = 86, +#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) + .mv_nr_irqs = 104, #endif .mv_inb = se_inb, diff --git a/arch/sh/kernel/cpu/sh3/Makefile b/arch/sh/kernel/cpu/sh3/Makefile index 83905e4e438..09faa056cd4 100644 --- a/arch/sh/kernel/cpu/sh3/Makefile +++ b/arch/sh/kernel/cpu/sh3/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7708) += setup-sh7708.o obj-$(CONFIG_CPU_SUBTYPE_SH7709) += setup-sh7709.o obj-$(CONFIG_CPU_SUBTYPE_SH7300) += setup-sh7300.o obj-$(CONFIG_CPU_SUBTYPE_SH7710) += setup-sh7710.o +obj-$(CONFIG_CPU_SUBTYPE_SH7712) += setup-sh7710.o # Primary on-chip clocks (common) clock-$(CONFIG_CPU_SH3) := clock-sh3.o diff --git a/arch/sh/kernel/cpu/sh3/probe.c b/arch/sh/kernel/cpu/sh3/probe.c index 821b0ab7b52..647623b22ed 100644 --- a/arch/sh/kernel/cpu/sh3/probe.c +++ b/arch/sh/kernel/cpu/sh3/probe.c @@ -78,6 +78,9 @@ int __init detect_cpu_and_cache_system(void) #if defined(CONFIG_CPU_SUBTYPE_SH7710) current_cpu_data.type = CPU_SH7710; #endif +#if defined(CONFIG_CPU_SUBTYPE_SH7712) + current_cpu_data.type = CPU_SH7712; +#endif #if defined(CONFIG_CPU_SUBTYPE_SH7705) current_cpu_data.type = CPU_SH7705; diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c index 895f99ee6a9..51760a7e7f1 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c @@ -2,6 +2,7 @@ * SH7710 Setup * * Copyright (C) 2006 Paul Mundt + * Copyright (C) 2007 Nobuhiro Iwamatsu * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -19,6 +20,12 @@ static struct plat_sci_port sci_platform_data[] = { .type = PORT_SCIF, .irqs = { 52, 53, 55, 54 }, }, { + .mapbase = 0xa4420000, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCIF, + .irqs = { 56, 57, 59, 58 }, + }, { + .flags = 0, } }; @@ -41,3 +48,56 @@ static int __init sh7710_devices_setup(void) ARRAY_SIZE(sh7710_devices)); } __initcall(sh7710_devices_setup); + +static struct ipr_data sh7710_ipr_map[] = { + /* IRQ, IPR-idx, shift, priority */ + { 16, 0, 12, 2 }, /* TMU0 TUNI*/ + { 17, 0, 8, 2 }, /* TMU1 TUNI */ + { 18, 0, 4, 2 }, /* TMU2 TUNI */ + { 27, 1, 12, 2 }, /* WDT ITI */ + { 20, 0, 0, 2 }, /* RTC ATI (alarm) */ + { 21, 0, 0, 2 }, /* RTC PRI (period) */ + { 22, 0, 0, 2 }, /* RTC CUI (carry) */ + { 48, 4, 12, 7 }, /* DMAC DMTE0 */ + { 49, 4, 12, 7 }, /* DMAC DMTE1 */ + { 50, 4, 12, 7 }, /* DMAC DMTE2 */ + { 51, 4, 12, 7 }, /* DMAC DMTE3 */ + { 52, 4, 8, 3 }, /* SCIF0 ERI */ + { 53, 4, 8, 3 }, /* SCIF0 RXI */ + { 54, 4, 8, 3 }, /* SCIF0 BRI */ + { 55, 4, 8, 3 }, /* SCIF0 TXI */ + { 56, 4, 4, 3 }, /* SCIF1 ERI */ + { 57, 4, 4, 3 }, /* SCIF1 RXI */ + { 58, 4, 4, 3 }, /* SCIF1 BRI */ + { 59, 4, 4, 3 }, /* SCIF1 TXI */ + { 76, 5, 8, 7 }, /* DMAC DMTE4 */ + { 77, 5, 8, 7 }, /* DMAC DMTE5 */ + { 80, 6, 12, 5 }, /* EDMAC EINT0 */ + { 81, 6, 8, 5 }, /* EDMAC EINT1 */ + { 82, 6, 4, 5 }, /* EDMAC EINT2 */ +}; + +static unsigned long ipr_offsets[] = { + 0xA414FEE2 /* 0: IPRA */ +, 0xA414FEE4 /* 1: IPRB */ +, 0xA4140016 /* 2: IPRC */ +, 0xA4140018 /* 3: IPRD */ +, 0xA414001A /* 4: IPRE */ +, 0xA4080000 /* 5: IPRF */ +, 0xA4080002 /* 6: IPRG */ +, 0xA4080004 /* 7: IPRH */ +, 0xA4080006 /* 8: IPRI */ +}; + +/* given the IPR index return the address of the IPR register */ +unsigned int map_ipridx_to_addr(int idx) +{ + if (idx >= ARRAY_SIZE(ipr_offsets)) + return 0; + return ipr_offsets[idx]; +} + +void __init init_IRQ_ipr() +{ + make_ipr_irq(sh7710_ipr_map, ARRAY_SIZE(sh7710_ipr_map)); +} diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process.c index e7607366ac4..286c80388bf 100644 --- a/arch/sh/kernel/process.c +++ b/arch/sh/kernel/process.c @@ -299,7 +299,8 @@ static void ubc_set_tracing(int asid, unsigned long pc) ctrl_outl(0, UBC_BAMRA); if (current_cpu_data.type == CPU_SH7729 || - current_cpu_data.type == CPU_SH7710) { + current_cpu_data.type == CPU_SH7710 || + current_cpu_data.type == CPU_SH7712 ) { ctrl_outw(BBR_INST | BBR_READ | BBR_CPU, UBC_BBRA); ctrl_outl(BRCR_PCBA | BRCR_PCTE, UBC_BRCR); } else { diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c index f9649041976..4d6d8911519 100644 --- a/arch/sh/kernel/setup.c +++ b/arch/sh/kernel/setup.c @@ -377,6 +377,7 @@ static const char *cpu_name[] = { [CPU_SH7705] = "SH7705", [CPU_SH7706] = "SH7706", [CPU_SH7707] = "SH7707", [CPU_SH7708] = "SH7708", [CPU_SH7709] = "SH7709", [CPU_SH7710] = "SH7710", + [CPU_SH7712] = "SH7712", [CPU_SH7729] = "SH7729", [CPU_SH7750] = "SH7750", [CPU_SH7750S] = "SH7750S", [CPU_SH7750R] = "SH7750R", [CPU_SH7751] = "SH7751", [CPU_SH7751R] = "SH7751R", diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig index 6b0d28ac924..3cac22f50e1 100644 --- a/arch/sh/mm/Kconfig +++ b/arch/sh/mm/Kconfig @@ -101,9 +101,17 @@ config CPU_SUBTYPE_SH7709 config CPU_SUBTYPE_SH7710 bool "Support SH7710 processor" select CPU_SH3 + select CPU_HAS_IPR_IRQ help Select SH7710 if you have a SH3-DSP SH7710 CPU. +config CPU_SUBTYPE_SH7712 + bool "Support SH7712 processor" + select CPU_SH3 + select CPU_HAS_IPR_IRQ + help + Select SH7712 if you have a SH3-DSP SH7712 CPU. + comment "SH-4 Processor Support" config CPU_SUBTYPE_SH7750 diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c index 8f387219287..0a34fa9e073 100644 --- a/drivers/serial/sh-sci.c +++ b/drivers/serial/sh-sci.c @@ -284,12 +284,23 @@ static void sci_init_pins_irda(struct uart_port *port, unsigned int cflag) #endif #if defined(SCIF_ONLY) || defined(SCI_AND_SCIF) -#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710) +#if defined(CONFIG_CPU_SUBTYPE_SH7300) /* SH7300 doesn't use RTS/CTS */ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) { sci_out(port, SCFCR, 0); } +#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) +static void sci_init_pins_scif(struct uart_port* port, unsigned int cflag) +{ + unsigned int fcr_val = 0; + + set_sh771x_scif_pfc(port); + if (cflag & CRTSCTS) { + fcr_val |= SCFCR_MCE; + } + sci_out(port, SCFCR, fcr_val); +} #elif defined(CONFIG_CPU_SH3) /* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h index 854153a1d60..fb04fb5f984 100644 --- a/drivers/serial/sh-sci.h +++ b/drivers/serial/sh-sci.h @@ -73,9 +73,13 @@ # define SCPDR 0xA4050136 /* 16 bit SCIF */ # define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */ # define SCIF_ONLY -#elif defined(CONFIG_CPU_SUBTYPE_SH7710) +#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) # define SCSPTR0 0xA4400000 /* 16 bit SCIF */ -# define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */ +# define SCI_NPORTS 2 +# define SCIF_ORER 0x0001 /* overrun error bit */ +# define PACR 0xa4050100 +# define PBCR 0xa4050102 +# define SCSCR_INIT(port) 0x3B # define SCIF_ONLY #elif defined(CONFIG_CPU_SUBTYPE_SH73180) # define SCPDR 0xA4050138 /* 16 bit SCIF */ @@ -346,9 +350,15 @@ } #ifdef CONFIG_CPU_SH3 -#if defined(CONFIG_CPU_SUBTYPE_SH7300) || \ - defined(CONFIG_CPU_SUBTYPE_SH7705) || \ - defined(CONFIG_CPU_SUBTYPE_SH7710) +#if defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) +#define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size, sh4_sci_offset, sh4_sci_size, \ + sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size, \ + h8_sci_offset, h8_sci_size) \ + CPU_SCIx_FNS(name, sh4_sci_offset, sh4_sci_size, sh4_scif_offset, sh4_scif_size) +#define SCIF_FNS(name, sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size) \ + CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size) +#elif defined(CONFIG_CPU_SUBTYPE_SH7300) || \ + defined(CONFIG_CPU_SUBTYPE_SH7705) #define SCIF_FNS(name, scif_offset, scif_size) \ CPU_SCIF_FNS(name, scif_offset, scif_size) #else @@ -375,8 +385,8 @@ #endif #if defined(CONFIG_CPU_SUBTYPE_SH7300) || \ - defined(CONFIG_CPU_SUBTYPE_SH7705) || \ - defined(CONFIG_CPU_SUBTYPE_SH7710) + defined(CONFIG_CPU_SUBTYPE_SH7705) + SCIF_FNS(SCSMR, 0x00, 16) SCIF_FNS(SCBRR, 0x04, 8) SCIF_FNS(SCSCR, 0x08, 16) @@ -486,13 +496,24 @@ static inline int sci_rxd_in(struct uart_port *port) return ctrl_inb(SCPDR)&0x10 ? 1 : 0; /* SCIF */ return 1; } -#elif defined(CONFIG_CPU_SUBTYPE_SH7710) +#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) static inline int sci_rxd_in(struct uart_port *port) { - if (port->mapbase == SCSPTR0) - return ctrl_inw(SCSPTR0 + 0x10) & 0x01 ? 1 : 0; - return 1; + return sci_in(port,SCxSR)&0x0010 ? 1 : 0; +} +static inline void set_sh771x_scif_pfc(struct uart_port *port) +{ + if (port->mapbase == 0xA4400000){ + ctrl_outw(ctrl_inw(PACR)&0xffc0,PACR); + ctrl_outw(ctrl_inw(PBCR)&0x0fff,PBCR); + return; + } + if (port->mapbase == 0xA4410000){ + ctrl_outw(ctrl_inw(PBCR)&0xf003,PBCR); + return; + } } + #elif defined(CONFIG_CPU_SUBTYPE_SH7750) || \ defined(CONFIG_CPU_SUBTYPE_SH7751) || \ defined(CONFIG_CPU_SUBTYPE_SH4_202) diff --git a/include/asm-sh/cpu-sh3/mmu_context.h b/include/asm-sh/cpu-sh3/mmu_context.h index bccb7ddb438..4704e86dff5 100644 --- a/include/asm-sh/cpu-sh3/mmu_context.h +++ b/include/asm-sh/cpu-sh3/mmu_context.h @@ -32,6 +32,7 @@ defined(CONFIG_CPU_SUBTYPE_SH7706) || \ defined(CONFIG_CPU_SUBTYPE_SH7300) || \ defined(CONFIG_CPU_SUBTYPE_SH7705) || \ + defined(CONFIG_CPU_SUBTYPE_SH7712) || \ defined(CONFIG_CPU_SUBTYPE_SH7710) #define INTEVT 0xa4000000 /* INTEVTE2(0xa4000000) */ #else diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h index 3e46a7afe76..d42f68e724f 100644 --- a/include/asm-sh/processor.h +++ b/include/asm-sh/processor.h @@ -44,7 +44,7 @@ enum cpu_type { /* SH-3 types */ CPU_SH7705, CPU_SH7706, CPU_SH7707, CPU_SH7708, CPU_SH7708S, CPU_SH7708R, - CPU_SH7709, CPU_SH7709A, CPU_SH7710, + CPU_SH7709, CPU_SH7709A, CPU_SH7710, CPU_SH7712, CPU_SH7729, CPU_SH7300, /* SH-4 types */ diff --git a/include/asm-sh/se.h b/include/asm-sh/se.h index a1832154a3a..eeaf5c9124c 100644 --- a/include/asm-sh/se.h +++ b/include/asm-sh/se.h @@ -73,6 +73,7 @@ #else #define IRQ_STNIC 10 #endif +#define IRQ_CFCARD 7 #define __IO_PREFIX se #include -- cgit v1.2.3-70-g09d2 From 1929cb340b74904c130fdf3de3fe5bbedb68a5aa Mon Sep 17 00:00:00 2001 From: dmitry pervushin Date: Tue, 24 Apr 2007 13:39:09 +0900 Subject: sh: SH7722 clock framework support. This adds support for the SH7722 (MobileR) to the clock framework. Signed-off-by: dmitry pervushin Signed-off-by: Paul Mundt --- Documentation/sh/clk.txt | 32 ++ arch/sh/kernel/cpu/clock.c | 28 +- arch/sh/kernel/cpu/sh4/clock-sh4-202.c | 3 +- arch/sh/kernel/cpu/sh4a/Makefile | 2 +- arch/sh/kernel/cpu/sh4a/clock-sh7722.c | 600 +++++++++++++++++++++++++++++++++ include/asm-sh/clock.h | 32 +- include/asm-sh/cpu-sh4/freq.h | 4 + 7 files changed, 694 insertions(+), 7 deletions(-) create mode 100644 Documentation/sh/clk.txt create mode 100644 arch/sh/kernel/cpu/sh4a/clock-sh7722.c (limited to 'arch/sh/kernel/cpu') diff --git a/Documentation/sh/clk.txt b/Documentation/sh/clk.txt new file mode 100644 index 00000000000..9aef710e9a4 --- /dev/null +++ b/Documentation/sh/clk.txt @@ -0,0 +1,32 @@ +Clock framework on SuperH architecture + +The framework on SH extends existing API by the function clk_set_rate_ex, +which prototype is as follows: + + clk_set_rate_ex (struct clk *clk, unsigned long rate, int algo_id) + +The algo_id parameter is used to specify algorithm used to recalculate clocks, +adjanced to clock, specified as first argument. It is assumed that algo_id==0 +means no changes to adjanced clock + +Internally, the clk_set_rate_ex forwards request to clk->ops->set_rate method, +if it is present in ops structure. The method should set the clock rate and adjust +all needed clocks according to the passed algo_id. +Exact values for algo_id are machine-dependend. For the sh7722, the following +values are defined: + + NO_CHANGE = 0, + IUS_N1_N1, /* I:U = N:1, U:Sh = N:1 */ + IUS_322, /* I:U:Sh = 3:2:2 */ + IUS_522, /* I:U:Sh = 5:2:2 */ + IUS_N11, /* I:U:Sh = N:1:1 */ + SB_N1, /* Sh:B = N:1 */ + SB3_N1, /* Sh:B3 = N:1 */ + SB3_32, /* Sh:B3 = 3:2 */ + SB3_43, /* Sh:B3 = 4:3 */ + SB3_54, /* Sh:B3 = 5:4 */ + BP_N1, /* B:P = N:1 */ + IP_N1 /* I:P = N:1 */ + +Each of these constants means relation between clocks that can be set via the FRQCR +register diff --git a/arch/sh/kernel/cpu/clock.c b/arch/sh/kernel/cpu/clock.c index abb586b1256..2075f90d76c 100644 --- a/arch/sh/kernel/cpu/clock.c +++ b/arch/sh/kernel/cpu/clock.c @@ -98,13 +98,14 @@ int __clk_enable(struct clk *clk) if (clk->ops && clk->ops->init) clk->ops->init(clk); + kref_get(&clk->kref); + if (clk->flags & CLK_ALWAYS_ENABLED) return 0; if (likely(clk->ops && clk->ops->enable)) clk->ops->enable(clk); - kref_get(&clk->kref); return 0; } @@ -127,10 +128,15 @@ static void clk_kref_release(struct kref *kref) void __clk_disable(struct clk *clk) { + int count = kref_put(&clk->kref, clk_kref_release); + if (clk->flags & CLK_ALWAYS_ENABLED) return; - kref_put(&clk->kref, clk_kref_release); + if (!count) { /* count reaches zero, disable the clock */ + if (likely(clk->ops && clk->ops->disable)) + clk->ops->disable(clk); + } } void clk_disable(struct clk *clk) @@ -151,6 +157,15 @@ int clk_register(struct clk *clk) mutex_unlock(&clock_list_sem); + if (clk->flags & CLK_ALWAYS_ENABLED) { + pr_debug( "Clock '%s' is ALWAYS_ENABLED\n", clk->name); + if (clk->ops && clk->ops->init) + clk->ops->init(clk); + if (clk->ops && clk->ops->enable) + clk->ops->enable(clk); + pr_debug( "Enabled."); + } + return 0; } @@ -167,6 +182,11 @@ inline unsigned long clk_get_rate(struct clk *clk) } int clk_set_rate(struct clk *clk, unsigned long rate) +{ + return clk_set_rate_ex(clk, rate, 0); +} + +int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id) { int ret = -EOPNOTSUPP; @@ -174,7 +194,7 @@ int clk_set_rate(struct clk *clk, unsigned long rate) unsigned long flags; spin_lock_irqsave(&clock_lock, flags); - ret = clk->ops->set_rate(clk, rate); + ret = clk->ops->set_rate(clk, rate, algo_id); spin_unlock_irqrestore(&clock_lock, flags); } @@ -256,7 +276,6 @@ int __init clk_init(void) arch_init_clk_ops(&clk->ops, i); ret |= clk_register(clk); - clk_enable(clk); } /* Kick the child clocks.. */ @@ -298,3 +317,4 @@ EXPORT_SYMBOL_GPL(__clk_disable); EXPORT_SYMBOL_GPL(clk_get_rate); EXPORT_SYMBOL_GPL(clk_set_rate); EXPORT_SYMBOL_GPL(clk_recalc_rate); +EXPORT_SYMBOL_GPL(clk_set_rate_ex); diff --git a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c index fa2019aabd7..fcb2c41bc34 100644 --- a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c +++ b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c @@ -82,7 +82,8 @@ static void shoc_clk_init(struct clk *clk) for (i = 0; i < ARRAY_SIZE(frqcr3_divisors); i++) { int divisor = frqcr3_divisors[i]; - if (clk->ops->set_rate(clk, clk->parent->rate / divisor) == 0) + if (clk->ops->set_rate(clk, clk->parent->rate / + divisor, 0) == 0) break; } diff --git a/arch/sh/kernel/cpu/sh4a/Makefile b/arch/sh/kernel/cpu/sh4a/Makefile index 1efeda0e182..ab7422f8f82 100644 --- a/arch/sh/kernel/cpu/sh4a/Makefile +++ b/arch/sh/kernel/cpu/sh4a/Makefile @@ -16,6 +16,6 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7770) := clock-sh7770.o clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7343.o -clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7343.o +clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o obj-y += $(clock-y) diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c new file mode 100644 index 00000000000..29090035bc5 --- /dev/null +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c @@ -0,0 +1,600 @@ +/* + * arch/sh/kernel/cpu/sh4a/clock-sh7722.c + * + * SH7722 support for the clock framework + * + * Copyright (c) 2006-2007 Nomad Global Solutions Inc + * Based on code for sh7343 by Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include +#include +#include + +#define SH7722_PLL_FREQ (32000000/8) +#define N (-1) +#define NM (-2) +#define ROUND_NEAREST 0 +#define ROUND_DOWN -1 +#define ROUND_UP +1 + +static int adjust_algos[][3] = { + {}, /* NO_CHANGE */ + { NM, N, 1 }, /* N:1, N:1 */ + { 3, 2, 2 }, /* 3:2:2 */ + { 5, 2, 2 }, /* 5:2:2 */ + { N, 1, 1 }, /* N:1:1 */ + + { N, 1 }, /* N:1 */ + + { N, 1 }, /* N:1 */ + { 3, 2 }, + { 4, 3 }, + { 5, 4 }, + + { N, 1 } +}; + +static unsigned long adjust_pair_of_clocks(unsigned long r1, unsigned long r2, + int m1, int m2, int round_flag) +{ + unsigned long rem, div; + int the_one = 0; + + pr_debug( "Actual values: r1 = %ld\n", r1); + pr_debug( "...............r2 = %ld\n", r2); + + if (m1 == m2) { + r2 = r1; + pr_debug( "setting equal rates: r2 now %ld\n", r2); + } else if ((m2 == N && m1 == 1) || + (m2 == NM && m1 == N)) { /* N:1 or NM:N */ + pr_debug( "Setting rates as 1:N (N:N*M)\n"); + rem = r2 % r1; + pr_debug( "...remainder = %ld\n", rem); + if (rem) { + div = r2 / r1; + pr_debug( "...div = %ld\n", div); + switch (round_flag) { + case ROUND_NEAREST: + the_one = rem >= r1/2 ? 1 : 0; break; + case ROUND_UP: + the_one = 1; break; + case ROUND_DOWN: + the_one = 0; break; + } + + r2 = r1 * (div + the_one); + pr_debug( "...setting r2 to %ld\n", r2); + } + } else if ((m2 == 1 && m1 == N) || + (m2 == N && m1 == NM)) { /* 1:N or N:NM */ + pr_debug( "Setting rates as N:1 (N*M:N)\n"); + rem = r1 % r2; + pr_debug( "...remainder = %ld\n", rem); + if (rem) { + div = r1 / r2; + pr_debug( "...div = %ld\n", div); + switch (round_flag) { + case ROUND_NEAREST: + the_one = rem > r2/2 ? 1 : 0; break; + case ROUND_UP: + the_one = 0; break; + case ROUND_DOWN: + the_one = 1; break; + } + + r2 = r1 / (div + the_one); + pr_debug( "...setting r2 to %ld\n", r2); + } + } else { /* value:value */ + pr_debug( "Setting rates as %d:%d\n", m1, m2); + div = r1 / m1; + r2 = div * m2; + pr_debug( "...div = %ld\n", div); + pr_debug( "...setting r2 to %ld\n", r2); + } + + return r2; +} + +static void adjust_clocks(int originate, int *l, unsigned long v[], + int n_in_line) +{ + int x; + + pr_debug( "Go down from %d...\n", originate); + /* go up recalculation clocks */ + for (x = originate; x>0; x -- ) + v[x-1] = adjust_pair_of_clocks(v[x], v[x-1], + l[x], l[x-1], + ROUND_UP); + + pr_debug( "Go up from %d...\n", originate); + /* go down recalculation clocks */ + for (x = originate; xrate = CONFIG_SH_PCLK_FREQ * (1 + (frqcr >> 24 & 0xF)); +} + +static int master_clk_setrate(struct clk *clk, unsigned long rate, int id) +{ + int div = rate / SH7722_PLL_FREQ; + int master_divs[] = { 2, 3, 4, 6, 8, 16 }; + int index; + unsigned long frqcr; + + if (rate < SH7722_PLL_FREQ * 2) + return -EINVAL; + + for (index = 1; index < ARRAY_SIZE(master_divs); index++) + if (div >= master_divs[index - 1] && div < master_divs[index]) + break; + + if (index >= ARRAY_SIZE(master_divs)) + index = ARRAY_SIZE(master_divs); + div = master_divs[index - 1]; + + frqcr = ctrl_inl(FRQCR); + frqcr &= ~(0xF << 24); + frqcr |= ( (div-1) << 24); + ctrl_outl(frqcr, FRQCR); + + return 0; +} + +static struct clk_ops sh7722_master_clk_ops = { + .init = master_clk_init, + .recalc = master_clk_recalc, + .set_rate = master_clk_setrate, +}; + +struct frqcr_context { + unsigned mask; + unsigned shift; +}; + +struct frqcr_context sh7722_get_clk_context(const char *name) +{ + struct frqcr_context ctx = { 0, }; + + if (!strcmp(name, "peripheral_clk")) { + ctx.shift = 0; + ctx.mask = 0xF; + } else if (!strcmp(name, "sdram_clk")) { + ctx.shift = 4; + ctx.mask = 0xF; + } else if (!strcmp(name, "bus_clk")) { + ctx.shift = 8; + ctx.mask = 0xF; + } else if (!strcmp(name, "sh_clk")) { + ctx.shift = 12; + ctx.mask = 0xF; + } else if (!strcmp(name, "umem_clk")) { + ctx.shift = 16; + ctx.mask = 0xF; + } else if (!strcmp(name, "cpu_clk")) { + ctx.shift = 20; + ctx.mask = 7; + } + return ctx; +} + +/** + * sh7722_find_divisors - find divisor for setting rate + * + * All sh7722 clocks use the same set of multipliers/divisors. This function + * chooses correct divisor to set the rate of clock with parent clock that + * generates frequency of 'parent_rate' + * + * @parent_rate: rate of parent clock + * @rate: requested rate to be set + */ +static int sh7722_find_divisors(unsigned long parent_rate, unsigned rate) +{ + unsigned div2 = parent_rate * 2 / rate; + int index; + + if (rate > parent_rate) + return -EINVAL; + + for (index = 1; index < ARRAY_SIZE(divisors2); index++) { + if (div2 > divisors2[index] && div2 <= divisors2[index]) + break; + } + if (index >= ARRAY_SIZE(divisors2)) + index = ARRAY_SIZE(divisors2) - 1; + return divisors2[index]; +} + +static void sh7722_frqcr_recalc(struct clk *clk) +{ + struct frqcr_context ctx = sh7722_get_clk_context(clk->name); + unsigned long frqcr = ctrl_inl(FRQCR); + int index; + + index = (frqcr >> ctx.shift) & ctx.mask; + clk->rate = clk->parent->rate * 2 / divisors2[index]; +} + +static int sh7722_frqcr_set_rate(struct clk *clk, unsigned long rate, + int algo_id) +{ + struct frqcr_context ctx = sh7722_get_clk_context(clk->name); + unsigned long parent_rate = clk->parent->rate; + int div; + unsigned long frqcr; + int err = 0; + + /* pretty invalid */ + if (parent_rate < rate) + return -EINVAL; + + /* look for multiplier/divisor pair */ + div = sh7722_find_divisors(parent_rate, rate); + if (div<0) + return div; + + /* calculate new value of clock rate */ + clk->rate = parent_rate * 2 / div; + frqcr = ctrl_inl(FRQCR); + + /* FIXME: adjust as algo_id specifies */ + if (algo_id != NO_CHANGE) { + int originator; + char *algo_group_1[] = { "cpu_clk", "umem_clk", "sh_clk" }; + char *algo_group_2[] = { "sh_clk", "bus_clk" }; + char *algo_group_3[] = { "sh_clk", "sdram_clk" }; + char *algo_group_4[] = { "bus_clk", "peripheral_clk" }; + char *algo_group_5[] = { "cpu_clk", "peripheral_clk" }; + char **algo_current = NULL; + /* 3 is the maximum number of clocks in relation */ + struct clk *ck[3]; + unsigned long values[3]; /* the same comment as above */ + int part_length = -1; + int i; + + /* + * all the steps below only required if adjustion was + * requested + */ + if (algo_id == IUS_N1_N1 || + algo_id == IUS_322 || + algo_id == IUS_522 || + algo_id == IUS_N11) { + algo_current = algo_group_1; + part_length = 3; + } + if (algo_id == SB_N1) { + algo_current = algo_group_2; + part_length = 2; + } + if (algo_id == SB3_N1 || + algo_id == SB3_32 || + algo_id == SB3_43 || + algo_id == SB3_54) { + algo_current = algo_group_3; + part_length = 2; + } + if (algo_id == BP_N1) { + algo_current = algo_group_4; + part_length = 2; + } + if (algo_id == IP_N1) { + algo_current = algo_group_5; + part_length = 2; + } + if (!algo_current) + goto incorrect_algo_id; + + originator = -1; + for (i = 0; i < part_length; i ++ ) { + if (originator >= 0 && !strcmp(clk->name, + algo_current[i])) + originator = i; + ck[i] = clk_get(NULL, algo_current[i]); + values[i] = clk_get_rate(ck[i]); + } + + if (originator >= 0) + adjust_clocks(originator, adjust_algos[algo_id], + values, part_length); + + for (i = 0; i < part_length; i ++ ) { + struct frqcr_context part_ctx; + int part_div; + + if (likely(!err)) { + part_div = sh7722_find_divisors(parent_rate, + rate); + if (part_div > 0) { + part_ctx = sh7722_get_clk_context( + ck[i]->name); + frqcr &= ~(part_ctx.mask << + part_ctx.shift); + frqcr |= part_div << part_ctx.shift; + } else + err = part_div; + } + + ck[i]->ops->recalc(ck[i]); + clk_put(ck[i]); + } + } + + /* was there any error during recalculation ? If so, bail out.. */ + if (unlikely(err!=0)) + goto out_err; + + /* clear FRQCR bits */ + frqcr &= ~(ctx.mask << ctx.shift); + frqcr |= div << ctx.shift; + + /* ...and perform actual change */ + ctrl_outl(frqcr, FRQCR); + return 0; + +incorrect_algo_id: + return -EINVAL; +out_err: + return err; +} + +static struct clk_ops sh7722_frqcr_clk_ops = { + .recalc = sh7722_frqcr_recalc, + .set_rate = sh7722_frqcr_set_rate, +}; + +/* + * clock ops methods for SIU A/B and IrDA clock + * + */ +static int sh7722_siu_which(struct clk *clk) +{ + if (!strcmp(clk->name, "siu_a_clk")) + return 0; + if (!strcmp(clk->name, "siu_b_clk")) + return 1; + if (!strcmp(clk->name, "irda_clk")) + return 2; + return -EINVAL; +} + +static unsigned long sh7722_siu_regs[] = { + [0] = SCLKACR, + [1] = SCLKBCR, + [2] = IrDACLKCR, +}; + +static int sh7722_siu_start_stop(struct clk *clk, int enable) +{ + int siu = sh7722_siu_which(clk); + unsigned long r; + + if (siu < 0) + return siu; + BUG_ON(siu > 2); + r = ctrl_inl(sh7722_siu_regs[siu]); + if (enable) + ctrl_outl(r & ~(1 << 8), sh7722_siu_regs[siu]); + else + ctrl_outl(r | (1 << 8), sh7722_siu_regs[siu]); + return 0; +} + +static void sh7722_siu_enable(struct clk *clk) +{ + sh7722_siu_start_stop(clk, 1); +} + +static void sh7722_siu_disable(struct clk *clk) +{ + sh7722_siu_start_stop(clk, 0); +} + +static void sh7722_video_enable(struct clk *clk) +{ + unsigned long r; + + r = ctrl_inl(VCLKCR); + ctrl_outl( r & ~(1<<8), VCLKCR); +} + +static void sh7722_video_disable(struct clk *clk) +{ + unsigned long r; + + r = ctrl_inl(VCLKCR); + ctrl_outl( r | (1<<8), VCLKCR); +} + +static int sh7722_video_set_rate(struct clk *clk, unsigned long rate, + int algo_id) +{ + unsigned long r; + + r = ctrl_inl(VCLKCR); + r &= ~0x3F; + r |= ((clk->parent->rate / rate - 1) & 0x3F); + ctrl_outl(r, VCLKCR); + return 0; +} + +static void sh7722_video_recalc(struct clk *clk) +{ + unsigned long r; + + r = ctrl_inl(VCLKCR); + clk->rate = clk->parent->rate / ((r & 0x3F) + 1); +} + +static int sh7722_siu_set_rate(struct clk *clk, unsigned long rate, int algo_id) +{ + int siu = sh7722_siu_which(clk); + unsigned long r; + int div; + + if (siu < 0) + return siu; + BUG_ON(siu > 2); + r = ctrl_inl(sh7722_siu_regs[siu]); + div = sh7722_find_divisors(clk->parent->rate, rate); + if (div < 0) + return div; + r = (r & ~0xF) | div; + ctrl_outl(r, sh7722_siu_regs[siu]); + return 0; +} + +static void sh7722_siu_recalc(struct clk *clk) +{ + int siu = sh7722_siu_which(clk); + unsigned long r; + + if (siu < 0) + return /* siu */ ; + BUG_ON(siu > 1); + r = ctrl_inl(sh7722_siu_regs[siu]); + clk->rate = clk->parent->rate * 2 / divisors2[r & 0xF]; +} + +static struct clk_ops sh7722_siu_clk_ops = { + .recalc = sh7722_siu_recalc, + .set_rate = sh7722_siu_set_rate, + .enable = sh7722_siu_enable, + .disable = sh7722_siu_disable, +}; + +static struct clk_ops sh7722_video_clk_ops = { + .recalc = sh7722_video_recalc, + .set_rate = sh7722_video_set_rate, + .enable = sh7722_video_enable, + .disable = sh7722_video_disable, +}; +/* + * and at last, clock definitions themselves + */ +static struct clk sh7722_umem_clock = { + .name = "umem_clk", + .ops = &sh7722_frqcr_clk_ops, +}; + +static struct clk sh7722_sh_clock = { + .name = "sh_clk", + .ops = &sh7722_frqcr_clk_ops, +}; + +static struct clk sh7722_peripheral_clock = { + .name = "peripheral_clk", + .ops = &sh7722_frqcr_clk_ops, +}; + +static struct clk sh7722_sdram_clock = { + .name = "sdram_clk", + .ops = &sh7722_frqcr_clk_ops, +}; + +/* + * these three clocks - SIU A, SIU B, IrDA - share the same clk_ops + * methods of clk_ops determine which register they should access by + * examining clk->name field + */ +static struct clk sh7722_siu_a_clock = { + .name = "siu_a_clk", + .ops = &sh7722_siu_clk_ops, +}; + +static struct clk sh7722_siu_b_clock = { + .name = "siu_b_clk", + .ops = &sh7722_siu_clk_ops, +}; + +static struct clk sh7722_irda_clock = { + .name = "irda_clk", + .ops = &sh7722_siu_clk_ops, +}; + +static struct clk sh7722_video_clock = { + .name = "video_clk", + .ops = &sh7722_video_clk_ops, +}; + +static struct clk *sh7722_clocks[] = { + &sh7722_umem_clock, + &sh7722_sh_clock, + &sh7722_peripheral_clock, + &sh7722_sdram_clock, + &sh7722_siu_a_clock, + &sh7722_siu_b_clock, + &sh7722_irda_clock, + &sh7722_video_clock, +}; + +/* + * init in order: master, module, bus, cpu + */ +struct clk_ops *onchip_ops[] = { + &sh7722_master_clk_ops, + &sh7722_frqcr_clk_ops, + &sh7722_frqcr_clk_ops, + &sh7722_frqcr_clk_ops, +}; + +void __init +arch_init_clk_ops(struct clk_ops **ops, int type) +{ + BUG_ON(type < 0 || type > ARRAY_SIZE(onchip_ops)); + *ops = onchip_ops[type]; +} + +int __init sh7722_clock_init(void) +{ + struct clk *master; + int i; + + master = clk_get(NULL, "master_clk"); + for (i = 0; i < ARRAY_SIZE(sh7722_clocks); i++) { + pr_debug( "Registering clock '%s'\n", sh7722_clocks[i]->name); + sh7722_clocks[i]->parent = master; + clk_register(sh7722_clocks[i]); + } + clk_put(master); + return 0; +} +arch_initcall(sh7722_clock_init); diff --git a/include/asm-sh/clock.h b/include/asm-sh/clock.h index 1df92807f8c..a5d629f090d 100644 --- a/include/asm-sh/clock.h +++ b/include/asm-sh/clock.h @@ -13,7 +13,7 @@ struct clk_ops { void (*enable)(struct clk *clk); void (*disable)(struct clk *clk); void (*recalc)(struct clk *clk); - int (*set_rate)(struct clk *clk, unsigned long rate); + int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id); }; struct clk { @@ -50,4 +50,34 @@ void clk_unregister(struct clk *); int show_clocks(struct seq_file *m); +/* the exported API, in addition to clk_set_rate */ +/** + * clk_set_rate_ex - set the clock rate for a clock source, with additional parameter + * @clk: clock source + * @rate: desired clock rate in Hz + * @algo_id: algorithm id to be passed down to ops->set_rate + * + * Returns success (0) or negative errno. + */ +int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id); + +enum clk_sh_algo_id { + NO_CHANGE = 0, + + IUS_N1_N1, + IUS_322, + IUS_522, + IUS_N11, + + SB_N1, + + SB3_N1, + SB3_32, + SB3_43, + SB3_54, + + BP_N1, + + IP_N1, +}; #endif /* __ASM_SH_CLOCK_H */ diff --git a/include/asm-sh/cpu-sh4/freq.h b/include/asm-sh/cpu-sh4/freq.h index 99402547ed0..86564e7a26a 100644 --- a/include/asm-sh/cpu-sh4/freq.h +++ b/include/asm-sh/cpu-sh4/freq.h @@ -12,6 +12,10 @@ #if defined(CONFIG_CPU_SUBTYPE_SH73180) || defined(CONFIG_CPU_SUBTYPE_SH7722) #define FRQCR 0xa4150000 +#define VCLKCR 0xa4150004 +#define SCLKACR 0xa4150008 +#define SCLKBCR 0xa415000c +#define IrDACLKCR 0xa4150010 #elif defined(CONFIG_CPU_SUBTYPE_SH7780) #define FRQCR 0xffc80000 #elif defined(CONFIG_CPU_SUBTYPE_SH7785) -- cgit v1.2.3-70-g09d2 From 2a8ff4596cde3ec2a51980288ebb28a0d196d19a Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Thu, 26 Apr 2007 11:51:00 +0900 Subject: sh: Solution Engine SH7705 board and CPU updates. This fixes up SH7705 CPU support and the SE7705 board for some of the recent changes. Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Paul Mundt --- arch/sh/Kconfig.debug | 2 +- arch/sh/boards/se/770x/irq.c | 32 +++++----- arch/sh/boards/se/770x/setup.c | 2 +- arch/sh/configs/se7705_defconfig | 106 ++++++++++++++++++++++++++++------ arch/sh/kernel/cpu/irq/Makefile | 2 +- arch/sh/kernel/cpu/irq/pint.c | 56 +++++++++++++++++- arch/sh/kernel/cpu/sh3/setup-sh7705.c | 54 +++++++++++++++-- arch/sh/mm/Kconfig | 1 + include/asm-sh/se.h | 5 +- 9 files changed, 215 insertions(+), 45 deletions(-) (limited to 'arch/sh/kernel/cpu') diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug index be60def6f30..b56307294b6 100644 --- a/arch/sh/Kconfig.debug +++ b/arch/sh/Kconfig.debug @@ -33,7 +33,7 @@ config EARLY_SCIF_CONSOLE_PORT default "0xffe00000" if CPU_SUBTYPE_SH7780 default "0xfffe9800" if CPU_SUBTYPE_SH7206 default "0xf8420000" if CPU_SUBTYPE_SH7619 - default "0xa4400000" if CPU_SUBTYPE_SH7712 + default "0xa4400000" if CPU_SUBTYPE_SH7712 || CPU_SUBTYPE_SH7705 default "0xffe80000" if CPU_SH4 config EARLY_PRINTK diff --git a/arch/sh/boards/se/770x/irq.c b/arch/sh/boards/se/770x/irq.c index 59cdffa1396..c8eccff77a0 100644 --- a/arch/sh/boards/se/770x/irq.c +++ b/arch/sh/boards/se/770x/irq.c @@ -65,24 +65,24 @@ static struct ipr_data se770x_ipr_map[] = { * 8: rtc * 12: mouse * 14: ide0 - */ + */ #if defined(CONFIG_CPU_SUBTYPE_SH7705) /* This is default value */ - { 0xf-0x2, 0, 8, 0x2 , BCR_ILCRA}, - { 0xf-0xa, 0, 4, 0xa , BCR_ILCRA}, - { 0xf-0x5, 0, 0, 0x5 , BCR_ILCRB}, - { 0xf-0x8, 0, 4, 0x8 , BCR_ILCRC}, - { 0xf-0xc, 0, 0, 0xc , BCR_ILCRC}, - { 0xf-0xe, 0, 12, 0xe , BCR_ILCRD}, - { 0xf-0x3, 0, 4, 0x3 , BCR_ILCRD}, /* LAN */ - { 0xf-0xd, 0, 8, 0xd , BCR_ILCRE}, - { 0xf-0x9, 0, 4, 0x9 , BCR_ILCRE}, - { 0xf-0x1, 0, 0, 0x1 , BCR_ILCRE}, - { 0xf-0xf, 0, 12, 0xf , BCR_ILCRF}, - { 0xf-0xb, 0, 4, 0xb , BCR_ILCRF}, - { 0xf-0x7, 0, 12, 0x7 , BCR_ILCRG}, - { 0xf-0x6, 0, 8, 0x6 , BCR_ILCRG}, - { 0xf-0x4, 0, 4, 0x4 , BCR_ILCRG}, + { 13, 0, 8, 0x0f-13 ,BCR_ILCRA}, + { 5 , 0, 4, 0x0f- 5 ,BCR_ILCRA}, + { 10, 0, 0, 0x0f-10, BCR_ILCRB}, + { 7 , 0, 4, 0x0f- 7, BCR_ILCRC}, + { 3 , 0, 0, 0x0f- 3, BCR_ILCRC}, + { 1 , 0, 12, 0x0f- 1, BCR_ILCRD}, + { 12, 0, 4, 0x0f-12, BCR_ILCRD}, /* LAN */ + { 2 , 0, 8, 0x0f- 2, BCR_ILCRE}, /* PCIRQ2 */ + { 6 , 0, 4, 0x0f- 6, BCR_ILCRE}, /* PCIRQ1 */ + { 14, 0, 0, 0x0f-14, BCR_ILCRE}, /* PCIRQ0 */ + { 0 , 0, 12, 0x0f , BCR_ILCRF}, + { 4 , 0, 4, 0x0f- 4, BCR_ILCRF}, + { 8 , 0, 12, 0x0f- 8, BCR_ILCRG}, + { 9 , 0, 8, 0x0f- 9, BCR_ILCRG}, + { 11, 0, 4, 0x0f-11, BCR_ILCRG}, #else { 14, 0, 8, 0x0f-14 ,BCR_ILCRA}, { 12, 0, 4, 0x0f-12 ,BCR_ILCRA}, diff --git a/arch/sh/boards/se/770x/setup.c b/arch/sh/boards/se/770x/setup.c index f1c7c8d9fdd..17a2631de3b 100644 --- a/arch/sh/boards/se/770x/setup.c +++ b/arch/sh/boards/se/770x/setup.c @@ -76,7 +76,7 @@ static struct resource cf_ide_resources[] = { .flags = IORESOURCE_MEM, }, [2] = { - .start = 7, + .start = IRQ_CFCARD, .flags = IORESOURCE_IRQ, }, }; diff --git a/arch/sh/configs/se7705_defconfig b/arch/sh/configs/se7705_defconfig index 06ebd6ec0cd..87ae5c1f862 100644 --- a/arch/sh/configs/se7705_defconfig +++ b/arch/sh/configs/se7705_defconfig @@ -1,15 +1,21 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.18 -# Tue Oct 3 12:03:04 2006 +# Linux kernel version: 2.6.21-rc5 +# Thu Apr 26 09:16:31 2007 # CONFIG_SUPERH=y CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_BUG=y CONFIG_GENERIC_FIND_NEXT_BIT=y CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y CONFIG_GENERIC_CALIBRATE_DELAY=y +# CONFIG_GENERIC_TIME is not set +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" # @@ -33,7 +39,9 @@ CONFIG_LOCALVERSION_AUTO=y # CONFIG_UTS_NS is not set # CONFIG_AUDIT is not set # CONFIG_IKCONFIG is not set +CONFIG_SYSFS_DEPRECATED=y # CONFIG_RELAY is not set +CONFIG_BLK_DEV_INITRD=y CONFIG_INITRAMFS_SOURCE="" # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_SYSCTL=y @@ -91,27 +99,30 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" CONFIG_SOLUTION_ENGINE=y CONFIG_SH_SOLUTION_ENGINE=y # CONFIG_SH_7751_SOLUTION_ENGINE is not set +# CONFIG_SH_7780_SOLUTION_ENGINE is not set # CONFIG_SH_7300_SOLUTION_ENGINE is not set # CONFIG_SH_7343_SOLUTION_ENGINE is not set # CONFIG_SH_73180_SOLUTION_ENGINE is not set +# CONFIG_SH_7722_SOLUTION_ENGINE is not set # CONFIG_SH_7751_SYSTEMH is not set # CONFIG_SH_HP6XX is not set -# CONFIG_SH_EC3104 is not set # CONFIG_SH_SATURN is not set # CONFIG_SH_DREAMCAST is not set -# CONFIG_SH_BIGSUR is not set # CONFIG_SH_MPC1211 is not set # CONFIG_SH_SH03 is not set # CONFIG_SH_SECUREEDGE5410 is not set # CONFIG_SH_HS7751RVOIP is not set # CONFIG_SH_7710VOIPGW is not set # CONFIG_SH_RTS7751R2D is not set -# CONFIG_SH_R7780RP is not set +# CONFIG_SH_HIGHLANDER is not set # CONFIG_SH_EDOSK7705 is not set # CONFIG_SH_SH4202_MICRODEV is not set # CONFIG_SH_LANDISK is not set # CONFIG_SH_TITAN is not set # CONFIG_SH_SHMIN is not set +# CONFIG_SH_7206_SOLUTION_ENGINE is not set +# CONFIG_SH_7619_SOLUTION_ENGINE is not set +# CONFIG_SH_LBOX_RE2 is not set # CONFIG_SH_UNKNOWN is not set # @@ -123,6 +134,12 @@ CONFIG_CPU_SH3=y # SH-2 Processor Support # # CONFIG_CPU_SUBTYPE_SH7604 is not set +# CONFIG_CPU_SUBTYPE_SH7619 is not set + +# +# SH-2A Processor Support +# +# CONFIG_CPU_SUBTYPE_SH7206 is not set # # SH-3 Processor Support @@ -134,6 +151,7 @@ CONFIG_CPU_SUBTYPE_SH7705=y # CONFIG_CPU_SUBTYPE_SH7708 is not set # CONFIG_CPU_SUBTYPE_SH7709 is not set # CONFIG_CPU_SUBTYPE_SH7710 is not set +# CONFIG_CPU_SUBTYPE_SH7712 is not set # # SH-4 Processor Support @@ -158,12 +176,14 @@ CONFIG_CPU_SUBTYPE_SH7705=y # # CONFIG_CPU_SUBTYPE_SH7770 is not set # CONFIG_CPU_SUBTYPE_SH7780 is not set +# CONFIG_CPU_SUBTYPE_SH7785 is not set # # SH4AL-DSP Processor Support # # CONFIG_CPU_SUBTYPE_SH73180 is not set # CONFIG_CPU_SUBTYPE_SH7343 is not set +# CONFIG_CPU_SUBTYPE_SH7722 is not set # # Memory management options @@ -173,6 +193,11 @@ CONFIG_PAGE_OFFSET=0x80000000 CONFIG_MEMORY_START=0x0c000000 CONFIG_MEMORY_SIZE=0x02000000 CONFIG_VSYSCALL=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_POPULATES_NODE_MAP=y +CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set +# CONFIG_PAGE_SIZE_64KB is not set CONFIG_SELECT_MEMORY_MODEL=y CONFIG_FLATMEM_MANUAL=y # CONFIG_DISCONTIGMEM_MANUAL is not set @@ -182,6 +207,7 @@ CONFIG_FLAT_NODE_MEM_MAP=y # CONFIG_SPARSEMEM_STATIC is not set CONFIG_SPLIT_PTLOCK_CPUS=4 # CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=0 # # Cache configuration @@ -190,23 +216,31 @@ CONFIG_SH7705_CACHE_32KB=y # CONFIG_SH_DIRECT_MAPPED is not set # CONFIG_SH_WRITETHROUGH is not set # CONFIG_SH_OCRAM is not set -# CONFIG_CF_ENABLER is not set +CONFIG_CF_ENABLER=y +# CONFIG_CF_AREA5 is not set +CONFIG_CF_AREA6=y +# CONFIG_CF_AREA4 is not set +CONFIG_CF_BASE_ADDR=0xb8000000 # # Processor features # CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_CPU_BIG_ENDIAN is not set # CONFIG_SH_FPU_EMU is not set # CONFIG_SH_DSP is not set # CONFIG_SH_ADC is not set CONFIG_CPU_HAS_INTEVT=y CONFIG_CPU_HAS_PINT_IRQ=y +CONFIG_CPU_HAS_IPR_IRQ=y CONFIG_CPU_HAS_SR_RB=y # -# Timer support +# Timer and clock configuration # CONFIG_SH_TMU=y +CONFIG_SH_TIMER_IRQ=16 +# CONFIG_NO_IDLE_HZ is not set CONFIG_SH_PCLK_FREQ=33333333 # @@ -223,13 +257,19 @@ CONFIG_SH_PCLK_FREQ=33333333 # Companion Chips # # CONFIG_HD6446X_SERIES is not set + +# +# Additional SuperH Device Drivers +# CONFIG_HEARTBEAT=y +# CONFIG_PUSH_SWITCH is not set # # Kernel features # # CONFIG_HZ_100 is not set CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set # CONFIG_HZ_1000 is not set CONFIG_HZ=250 # CONFIG_KEXEC is not set @@ -287,6 +327,7 @@ CONFIG_UNIX=y CONFIG_XFRM=y # CONFIG_XFRM_USER is not set # CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set # CONFIG_NET_KEY is not set CONFIG_INET=y # CONFIG_IP_MULTICAST is not set @@ -307,11 +348,13 @@ CONFIG_IP_PNP_RARP=y # CONFIG_INET_TUNNEL is not set CONFIG_INET_XFRM_MODE_TRANSPORT=y CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y CONFIG_INET_DIAG=y CONFIG_INET_TCP_DIAG=y # CONFIG_TCP_CONG_ADVANCED is not set CONFIG_TCP_CONG_CUBIC=y CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set # CONFIG_IPV6 is not set # CONFIG_INET6_XFRM_TUNNEL is not set # CONFIG_INET6_TUNNEL is not set @@ -388,6 +431,7 @@ CONFIG_MTD_PARTITIONS=y # User Modules And Translation Layers # CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y CONFIG_MTD_BLOCK=y # CONFIG_FTL is not set # CONFIG_NFTL is not set @@ -461,6 +505,7 @@ CONFIG_MTD_CFI_UTIL=y # # Plug and Play support # +# CONFIG_PNPACPI is not set # # Block devices @@ -472,10 +517,13 @@ CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_BLK_DEV_RAM_SIZE=8192 CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 -CONFIG_BLK_DEV_INITRD=y # CONFIG_CDROM_PKTCDVD is not set # CONFIG_ATA_OVER_ETH is not set +# +# Misc devices +# + # # ATA/ATAPI/MFM/RLL support # @@ -649,17 +697,12 @@ CONFIG_HW_RANDOM=y # CONFIG_GEN_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set - -# -# Ftape, the floppy tape device driver -# # CONFIG_RAW_DRIVER is not set # # TPM devices # # CONFIG_TCG_TPM is not set -# CONFIG_TELCLOCK is not set # # I2C support @@ -675,6 +718,7 @@ CONFIG_HW_RANDOM=y # # Dallas's 1-wire bus # +# CONFIG_W1 is not set # # Hardware Monitoring support @@ -683,18 +727,19 @@ CONFIG_HWMON=y # CONFIG_HWMON_VID is not set # CONFIG_SENSORS_ABITUGURU is not set # CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_PC87427 is not set # CONFIG_SENSORS_VT1211 is not set # CONFIG_HWMON_DEBUG_CHIP is not set # -# Misc devices +# Multifunction device drivers # +# CONFIG_MFD_SM501 is not set # # Multimedia devices # # CONFIG_VIDEO_DEV is not set -CONFIG_VIDEO_V4L2=y # # Digital Video Broadcasting Devices @@ -704,7 +749,7 @@ CONFIG_VIDEO_V4L2=y # # Graphics support # -CONFIG_FIRMWARE_EDID=y +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set # CONFIG_FB is not set # @@ -712,6 +757,12 @@ CONFIG_FIRMWARE_EDID=y # # CONFIG_SOUND is not set +# +# HID Devices +# +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set + # # USB support # @@ -772,6 +823,14 @@ CONFIG_FIRMWARE_EDID=y # DMA Devices # +# +# Auxiliary Display support +# + +# +# Virtualization +# + # # File systems # @@ -779,10 +838,12 @@ CONFIG_EXT2_FS=y # CONFIG_EXT2_FS_XATTR is not set # CONFIG_EXT2_FS_XIP is not set # CONFIG_EXT3_FS is not set +# CONFIG_EXT4DEV_FS is not set # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set # CONFIG_FS_POSIX_ACL is not set # CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set # CONFIG_MINIX_FS is not set # CONFIG_ROMFS_FS is not set CONFIG_INOTIFY=y @@ -828,7 +889,6 @@ CONFIG_RAMFS=y # CONFIG_BEFS_FS is not set # CONFIG_BFS_FS is not set # CONFIG_EFS_FS is not set -# CONFIG_JFFS_FS is not set CONFIG_JFFS2_FS=y CONFIG_JFFS2_FS_DEBUG=0 CONFIG_JFFS2_FS_WRITEBUFFER=y @@ -877,6 +937,10 @@ CONFIG_MSDOS_PARTITION=y # # CONFIG_NLS is not set +# +# Distributed Lock Manager +# + # # Profiling support # @@ -885,15 +949,18 @@ CONFIG_MSDOS_PARTITION=y # # Kernel hacking # +CONFIG_TRACE_IRQFLAGS_SUPPORT=y # CONFIG_PRINTK_TIME is not set CONFIG_ENABLE_MUST_CHECK=y # CONFIG_MAGIC_SYSRQ is not set # CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_HEADERS_CHECK is not set # CONFIG_DEBUG_KERNEL is not set CONFIG_LOG_BUF_SHIFT=14 # CONFIG_DEBUG_BUGVERBOSE is not set # CONFIG_SH_STANDARD_BIOS is not set -# CONFIG_KGDB is not set +# CONFIG_EARLY_SCIF_CONSOLE is not set +# CONFIG_SH_KGDB is not set # # Security options @@ -908,6 +975,7 @@ CONFIG_LOG_BUF_SHIFT=14 # # Library routines # +CONFIG_BITREVERSE=y CONFIG_CRC_CCITT=y # CONFIG_CRC16 is not set CONFIG_CRC32=y @@ -915,3 +983,5 @@ CONFIG_CRC32=y CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y diff --git a/arch/sh/kernel/cpu/irq/Makefile b/arch/sh/kernel/cpu/irq/Makefile index 0049d217561..1c23308cfc2 100644 --- a/arch/sh/kernel/cpu/irq/Makefile +++ b/arch/sh/kernel/cpu/irq/Makefile @@ -4,6 +4,6 @@ obj-y += imask.o obj-$(CONFIG_CPU_HAS_IPR_IRQ) += ipr.o -obj-$(CONFIG_CPU_HAS_PINT_IRQ) += pint.o +obj-$(CONFIG_CPU_HAS_PINT_IRQ) += pint.o obj-$(CONFIG_CPU_HAS_MASKREG_IRQ) += maskreg.o obj-$(CONFIG_CPU_HAS_INTC2_IRQ) += intc2.o diff --git a/arch/sh/kernel/cpu/irq/pint.c b/arch/sh/kernel/cpu/irq/pint.c index f60007783a2..67602685df1 100644 --- a/arch/sh/kernel/cpu/irq/pint.c +++ b/arch/sh/kernel/cpu/irq/pint.c @@ -18,6 +18,58 @@ #include #include +#if defined(CONFIG_CPU_SUBTYPE_SH7705) +#define INTC_INTER 0xA4000014UL +#define INTC_IPRD 0xA4000018UL +#define INTC_ICR2 0xA4000012UL + +/* PFC */ +#define PORT_PACR 0xA4000100UL +#define PORT_PBCR 0xA4000102UL +#define PORT_PCCR 0xA4000104UL +#define PORT_PDCR 0xA4000106UL +#define PORT_PECR 0xA4000108UL +#define PORT_PFCR 0xA400010AUL +#define PORT_PGCR 0xA400010CUL +#define PORT_PHCR 0xA400010EUL +#define PORT_PJCR 0xA4000110UL +#define PORT_PKCR 0xA4000112UL +#define PORT_PLCR 0xA4000114UL +#define PORT_PMCR 0xA4000118UL +#define PORT_PNCR 0xA400011AUL +#define PORT_PECR2 0xA4050148UL +#define PORT_PFCR2 0xA405014AUL +#define PORT_PNCR2 0xA405015AUL + +/* I/O port */ +#define PORT_PADR 0xA4000120UL +#define PORT_PBDR 0xA4000122UL +#define PORT_PCDR 0xA4000124UL +#define PORT_PDDR 0xA4000126UL +#define PORT_PEDR 0xA4000128UL +#define PORT_PFDR 0xA400012AUL +#define PORT_PGDR 0xA400012CUL +#define PORT_PHDR 0xA400012EUL +#define PORT_PJDR 0xA4000130UL +#define PORT_PKDR 0xA4000132UL +#define PORT_PLDR 0xA4000134UL +#define PORT_PMDR 0xA4000138UL +#define PORT_PNDR 0xA400013AUL + +#define PINT0_IRQ 40 +#define PINT8_IRQ 41 +#define PINT_IRQ_BASE 86 + +#define PINT0_IPR_ADDR INTC_IPRD +#define PINT0_IPR_POS 3 +#define PINT0_PRIORITY 2 + +#define PINT8_IPR_ADDR INTC_IPRD +#define PINT8_IPR_POS 2 +#define PINT8_PRIORITY 2 + +#endif /* CONFIG_CPU_SUBTYPE_SH7705 */ + static unsigned char pint_map[256]; static unsigned long portcr_mask; @@ -126,7 +178,7 @@ int ipr_irq_demux(int irq) unsigned long creg, dreg, d, sav; if (irq == PINT0_IRQ) { -#if defined(CONFIG_CPU_SUBTYPE_SH7707) +#if defined(CONFIG_CPU_SUBTYPE_SH7705) || defined(CONFIG_CPU_SUBTYPE_SH7707) creg = PORT_PACR; dreg = PORT_PADR; #else @@ -144,7 +196,7 @@ int ipr_irq_demux(int irq) return PINT_IRQ_BASE + pint_map[d]; } else if (irq == PINT8_IRQ) { -#if defined(CONFIG_CPU_SUBTYPE_SH7707) +#if defined(CONFIG_CPU_SUBTYPE_SH7705) || defined(CONFIG_CPU_SUBTYPE_SH7707) creg = PORT_PBCR; dreg = PORT_PBDR; #else diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c index a8e41c5241f..1983fb7ad6e 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c @@ -2,6 +2,7 @@ * SH7705 Setup * * Copyright (C) 2006 Paul Mundt + * Copyright (C) 2007 Nobuhiro Iwamatsu * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -14,15 +15,15 @@ static struct plat_sci_port sci_platform_data[] = { { - .mapbase = 0xa4400000, + .mapbase = 0xa4410000, .flags = UPF_BOOT_AUTOCONF, .type = PORT_SCIF, - .irqs = { 52, 53, 55, 54 }, + .irqs = { 56, 57, 59 }, }, { - .mapbase = 0xa4410000, + .mapbase = 0xa4400000, .flags = UPF_BOOT_AUTOCONF, .type = PORT_SCIF, - .irqs = { 56, 57, 59, 58 }, + .irqs = { 52, 53, 55 }, }, { .flags = 0, } @@ -46,3 +47,48 @@ static int __init sh7705_devices_setup(void) ARRAY_SIZE(sh7705_devices)); } __initcall(sh7705_devices_setup); + +static struct ipr_data sh7705_ipr_map[] = { + /* IRQ, IPR-idx, shift, priority */ + { 16, 0, 12, 2 }, /* TMU0 TUNI*/ + { 17, 0, 8, 2 }, /* TMU1 TUNI */ + { 18, 0, 4, 2 }, /* TMU2 TUNI */ + { 27, 1, 12, 2 }, /* WDT ITI */ + { 20, 0, 0, 2 }, /* RTC ATI (alarm) */ + { 21, 0, 0, 2 }, /* RTC PRI (period) */ + { 22, 0, 0, 2 }, /* RTC CUI (carry) */ + { 48, 4, 12, 7 }, /* DMAC DMTE0 */ + { 49, 4, 12, 7 }, /* DMAC DMTE1 */ + { 50, 4, 12, 7 }, /* DMAC DMTE2 */ + { 51, 4, 12, 7 }, /* DMAC DMTE3 */ + { 52, 4, 8, 3 }, /* SCIF0 ERI */ + { 53, 4, 8, 3 }, /* SCIF0 RXI */ + { 55, 4, 8, 3 }, /* SCIF0 TXI */ + { 56, 4, 4, 3 }, /* SCIF1 ERI */ + { 57, 4, 4, 3 }, /* SCIF1 RXI */ + { 59, 4, 4, 3 }, /* SCIF1 TXI */ +}; + +static unsigned long ipr_offsets[] = { + 0xFFFFFEE2 /* 0: IPRA */ +, 0xFFFFFEE4 /* 1: IPRB */ +, 0xA4000016 /* 2: IPRC */ +, 0xA4000018 /* 3: IPRD */ +, 0xA400001A /* 4: IPRE */ +, 0xA4080000 /* 5: IPRF */ +, 0xA4080002 /* 6: IPRG */ +, 0xA4080004 /* 7: IPRH */ +}; + +/* given the IPR index return the address of the IPR register */ +unsigned int map_ipridx_to_addr(int idx) +{ + if (idx >= ARRAY_SIZE(ipr_offsets)) + return 0; + return ipr_offsets[idx]; +} + +void __init init_IRQ_ipr() +{ + make_ipr_irq(sh7705_ipr_map, ARRAY_SIZE(sh7705_ipr_map)); +} diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig index 5359f3dff93..12f3d394dc2 100644 --- a/arch/sh/mm/Kconfig +++ b/arch/sh/mm/Kconfig @@ -67,6 +67,7 @@ config CPU_SUBTYPE_SH7300 config CPU_SUBTYPE_SH7705 bool "Support SH7705 processor" select CPU_SH3 + select CPU_HAS_IPR_IRQ select CPU_HAS_PINT_IRQ config CPU_SUBTYPE_SH7706 diff --git a/include/asm-sh/se.h b/include/asm-sh/se.h index eeaf5c9124c..bd2596c014a 100644 --- a/include/asm-sh/se.h +++ b/include/asm-sh/se.h @@ -69,11 +69,12 @@ #define BCR_ILCRG (PA_BCR + 12) #if defined(CONFIG_CPU_SUBTYPE_SH7705) -#define IRQ_STNIC 12 +#define IRQ_STNIC 12 +#define IRQ_CFCARD 14 #else #define IRQ_STNIC 10 +#define IRQ_CFCARD 7 #endif -#define IRQ_CFCARD 7 #define __IO_PREFIX se #include -- cgit v1.2.3-70-g09d2 From db62e5bd297d1f325811c5495ad23de36db0fdd4 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Thu, 26 Apr 2007 12:17:20 +0900 Subject: sh: Move clock reporting to its own proc entry. Previously this was done in cpuinfo, but with the number of clocks growing, it makes more sense to place this in a different proc entry. Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/clock.c | 76 +++++++++++++++++++++++++++------------------- arch/sh/kernel/setup.c | 2 +- include/asm-sh/clock.h | 2 -- 3 files changed, 46 insertions(+), 34 deletions(-) (limited to 'arch/sh/kernel/cpu') diff --git a/arch/sh/kernel/cpu/clock.c b/arch/sh/kernel/cpu/clock.c index 2075f90d76c..014f318f5a0 100644 --- a/arch/sh/kernel/cpu/clock.c +++ b/arch/sh/kernel/cpu/clock.c @@ -1,7 +1,7 @@ /* * arch/sh/kernel/cpu/clock.c - SuperH clock framework * - * Copyright (C) 2005, 2006 Paul Mundt + * Copyright (C) 2005, 2006, 2007 Paul Mundt * * This clock framework is derived from the OMAP version by: * @@ -23,6 +23,7 @@ #include #include #include +#include #include #include @@ -108,6 +109,7 @@ int __clk_enable(struct clk *clk) return 0; } +EXPORT_SYMBOL_GPL(__clk_enable); int clk_enable(struct clk *clk) { @@ -120,6 +122,7 @@ int clk_enable(struct clk *clk) return ret; } +EXPORT_SYMBOL_GPL(clk_enable); static void clk_kref_release(struct kref *kref) { @@ -138,6 +141,7 @@ void __clk_disable(struct clk *clk) clk->ops->disable(clk); } } +EXPORT_SYMBOL_GPL(__clk_disable); void clk_disable(struct clk *clk) { @@ -147,6 +151,7 @@ void clk_disable(struct clk *clk) __clk_disable(clk); spin_unlock_irqrestore(&clock_lock, flags); } +EXPORT_SYMBOL_GPL(clk_disable); int clk_register(struct clk *clk) { @@ -168,6 +173,7 @@ int clk_register(struct clk *clk) return 0; } +EXPORT_SYMBOL_GPL(clk_register); void clk_unregister(struct clk *clk) { @@ -175,16 +181,19 @@ void clk_unregister(struct clk *clk) list_del(&clk->node); mutex_unlock(&clock_list_sem); } +EXPORT_SYMBOL_GPL(clk_unregister); -inline unsigned long clk_get_rate(struct clk *clk) +unsigned long clk_get_rate(struct clk *clk) { return clk->rate; } +EXPORT_SYMBOL_GPL(clk_get_rate); int clk_set_rate(struct clk *clk, unsigned long rate) { return clk_set_rate_ex(clk, rate, 0); } +EXPORT_SYMBOL_GPL(clk_set_rate); int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id) { @@ -203,6 +212,7 @@ int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id) return ret; } +EXPORT_SYMBOL_GPL(clk_set_rate_ex); void clk_recalc_rate(struct clk *clk) { @@ -217,6 +227,7 @@ void clk_recalc_rate(struct clk *clk) if (unlikely(clk->flags & CLK_RATE_PROPAGATES)) propagate_rate(clk); } +EXPORT_SYMBOL_GPL(clk_recalc_rate); /* * Returns a clock. Note that we first try to use device id on the bus @@ -253,18 +264,43 @@ found: return clk; } +EXPORT_SYMBOL_GPL(clk_get); void clk_put(struct clk *clk) { if (clk && !IS_ERR(clk)) module_put(clk->owner); } +EXPORT_SYMBOL_GPL(clk_put); void __init __attribute__ ((weak)) arch_init_clk_ops(struct clk_ops **ops, int type) { } +static int show_clocks(char *buf, char **start, off_t off, + int len, int *eof, void *data) +{ + struct clk *clk; + char *p = buf; + + list_for_each_entry_reverse(clk, &clock_list, node) { + unsigned long rate = clk_get_rate(clk); + + /* + * Don't bother listing dummy clocks with no ancestry + * that only support enable and disable ops. + */ + if (unlikely(!rate && !clk->parent)) + continue; + + p += sprintf(p, "%-12s\t: %ld.%02ldMHz\n", clk->name, + rate / 1000000, (rate % 1000000) / 10000); + } + + return p - buf; +} + int __init clk_init(void) { int i, ret = 0; @@ -285,36 +321,14 @@ int __init clk_init(void) return ret; } -int show_clocks(struct seq_file *m) +static int __init clk_proc_init(void) { - struct clk *clk; - - list_for_each_entry_reverse(clk, &clock_list, node) { - unsigned long rate = clk_get_rate(clk); - - /* - * Don't bother listing dummy clocks with no ancestry - * that only support enable and disable ops. - */ - if (unlikely(!rate && !clk->parent)) - continue; - - seq_printf(m, "%-12s\t: %ld.%02ldMHz\n", clk->name, - rate / 1000000, (rate % 1000000) / 10000); - } + struct proc_dir_entry *p; + p = create_proc_read_entry("clocks", S_IRUSR, NULL, + show_clocks, NULL); + if (unlikely(!p)) + return -EINVAL; return 0; } - -EXPORT_SYMBOL_GPL(clk_register); -EXPORT_SYMBOL_GPL(clk_unregister); -EXPORT_SYMBOL_GPL(clk_get); -EXPORT_SYMBOL_GPL(clk_put); -EXPORT_SYMBOL_GPL(clk_enable); -EXPORT_SYMBOL_GPL(clk_disable); -EXPORT_SYMBOL_GPL(__clk_enable); -EXPORT_SYMBOL_GPL(__clk_disable); -EXPORT_SYMBOL_GPL(clk_get_rate); -EXPORT_SYMBOL_GPL(clk_set_rate); -EXPORT_SYMBOL_GPL(clk_recalc_rate); -EXPORT_SYMBOL_GPL(clk_set_rate_ex); +subsys_initcall(clk_proc_init); diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c index 60cc2161438..cab91a7665d 100644 --- a/arch/sh/kernel/setup.c +++ b/arch/sh/kernel/setup.c @@ -501,7 +501,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) c->loops_per_jiffy/(500000/HZ), (c->loops_per_jiffy/(5000/HZ)) % 100); - return show_clocks(m); + return 0; } static void *c_start(struct seq_file *m, loff_t *pos) diff --git a/include/asm-sh/clock.h b/include/asm-sh/clock.h index a5d629f090d..386d797d86b 100644 --- a/include/asm-sh/clock.h +++ b/include/asm-sh/clock.h @@ -48,8 +48,6 @@ void clk_recalc_rate(struct clk *); int clk_register(struct clk *); void clk_unregister(struct clk *); -int show_clocks(struct seq_file *m); - /* the exported API, in addition to clk_set_rate */ /** * clk_set_rate_ex - set the clock rate for a clock source, with additional parameter -- cgit v1.2.3-70-g09d2 From 70fe4d87bf72053f78cf3d2e6cefa5d51a2c30af Mon Sep 17 00:00:00 2001 From: Takashi YOSHII Date: Tue, 1 May 2007 12:19:33 +0900 Subject: sh: Wire up more IRQs for SH7709. hp6xx requires some additional IRQs that aren't currently enabled in the SH7709 setup code. Wire them up. Signed-off-by: Takashi YOSHII Signed-off-by: Kristoffer Ericson Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/sh3/setup-sh7709.c | 29 +++++++++++++++++++---------- 1 file changed, 19 insertions(+), 10 deletions(-) (limited to 'arch/sh/kernel/cpu') diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7709.c b/arch/sh/kernel/cpu/sh3/setup-sh7709.c index dc9b211cf87..c7d7c35fc83 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh7709.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh7709.c @@ -48,24 +48,33 @@ static struct platform_device *sh7709_devices[] __initdata = { static int __init sh7709_devices_setup(void) { return platform_add_devices(sh7709_devices, - ARRAY_SIZE(sh7709_devices)); + ARRAY_SIZE(sh7709_devices)); } __initcall(sh7709_devices_setup); -#define IPRx(A,N) .addr=A, .shift=0*N*-1 +#define IPRx(A,N) .addr=A, .shift=N #define IPRA(N) IPRx(0xfffffee2UL,N) #define IPRB(N) IPRx(0xfffffee4UL,N) +#define IPRC(N) IPRx(0xa4000016UL,N) +#define IPRD(N) IPRx(0xa4000018UL,N) #define IPRE(N) IPRx(0xa400001aUL,N) static struct ipr_data sh7709_ipr_map[] = { - [16] = { IPRA(15-12), 2 }, /* TMU TUNI0 */ - [17] = { IPRA(11-8), 4 }, /* TMU TUNI1 */ - [22] = { IPRA(3-0), 2 }, /* RTC CUI */ - [23 ... 26] = { IPRB(7-4), 3 }, /* SCI */ - [27] = { IPRB(15-12), 2 }, /* WDT ITI */ - [48 ... 51] = { IPRE(15-12), 7 }, /* DMA */ - [52 ... 55] = { IPRE(11-8), 3 }, /* IRDA */ - [56 ... 59] = { IPRE(7-4), 3 }, /* SCIF */ + [16] = { IPRA(12), 2 }, /* TMU TUNI0 */ + [17] = { IPRA(8), 4 }, /* TMU TUNI1 */ + [18 ... 19] = { IPRA(4), 1 }, /* TMU TUNI1 */ + [20 ... 22] = { IPRA(0), 2 }, /* RTC CUI */ + [23 ... 26] = { IPRB(4), 3 }, /* SCI */ + [27] = { IPRB(12), 2 }, /* WDT ITI */ + [32] = { IPRC(0), 1 }, /* IRQ 0 */ + [33] = { IPRC(4), 1 }, /* IRQ 1 */ + [34] = { IPRC(8), 1 }, /* IRQ 2 APM */ + [35] = { IPRC(12), 1 }, /* IRQ 3 TOUCHSCREEN */ + [36] = { IPRD(0), 1 }, /* IRQ 4 */ + [37] = { IPRD(4), 1 }, /* IRQ 5 */ + [48 ... 51] = { IPRE(12), 7 }, /* DMA */ + [52 ... 55] = { IPRE(8), 3 }, /* IRDA */ + [56 ... 59] = { IPRE(4), 3 }, /* SCIF */ }; void __init init_IRQ_ipr() -- cgit v1.2.3-70-g09d2 From 39374aadcd0159b4744ab456f4efa100bea84bd4 Mon Sep 17 00:00:00 2001 From: Ryusuke Sakato Date: Mon, 7 May 2007 10:48:56 +0900 Subject: sh: R7785RP board updates. Some fixups for the R7785RP board. Gets iVDR working. Signed-off-by: Ryusuke Sakato Signed-off-by: Paul Mundt --- arch/sh/boards/renesas/r7780rp/setup.c | 4 ++-- arch/sh/drivers/pci/ops-r7780rp.c | 12 +----------- arch/sh/kernel/cpu/sh4a/setup-sh7785.c | 21 +++++++++++++-------- include/asm-sh/r7780rp.h | 7 +++++++ 4 files changed, 23 insertions(+), 21 deletions(-) (limited to 'arch/sh/kernel/cpu') diff --git a/arch/sh/boards/renesas/r7780rp/setup.c b/arch/sh/boards/renesas/r7780rp/setup.c index 6af0cc35ceb..0727ef92f2b 100644 --- a/arch/sh/boards/renesas/r7780rp/setup.c +++ b/arch/sh/boards/renesas/r7780rp/setup.c @@ -97,12 +97,12 @@ device_initcall(r7780rp_devices_setup); */ static void ivdr_clk_enable(struct clk *clk) { - ctrl_outw(ctrl_inw(PA_IVDRCTL) | (1 << 8), PA_IVDRCTL); + ctrl_outw(ctrl_inw(PA_IVDRCTL) | (1 << IVDR_CK_ON), PA_IVDRCTL); } static void ivdr_clk_disable(struct clk *clk) { - ctrl_outw(ctrl_inw(PA_IVDRCTL) & ~(1 << 8), PA_IVDRCTL); + ctrl_outw(ctrl_inw(PA_IVDRCTL) & ~(1 << IVDR_CK_ON), PA_IVDRCTL); } static struct clk_ops ivdr_clk_ops = { diff --git a/arch/sh/drivers/pci/ops-r7780rp.c b/arch/sh/drivers/pci/ops-r7780rp.c index 6f4fb38bafa..f2216081ab8 100644 --- a/arch/sh/drivers/pci/ops-r7780rp.c +++ b/arch/sh/drivers/pci/ops-r7780rp.c @@ -25,22 +25,12 @@ static char r7780mp_irq_tab[] __initdata = { 65, 66, 67, 68, }; -static char r7785rp_irq_tab[][4] __initdata = { - { 65, 66, 67, 68 }, /* INT ABCD */ - { 66, 67, 68, 65 }, /* INT BCDA */ - { 67, 68, 65, 66 }, /* INT CDAB */ - { 68, 65, 66, 67 }, /* INT DABC */ - { 64, 64, 64, 64 }, /* PCI Host */ -}; - int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) { if (mach_is_r7780rp()) return r7780rp_irq_tab[slot]; - if (mach_is_r7780mp()) + if (mach_is_r7780mp() || mach_is_r7785rp()) return r7780mp_irq_tab[slot]; - if (mach_is_r7785rp()) - return r7785rp_irq_tab[slot][pin]; printk(KERN_ERR "PCI: Bad IRQ mapping " "request for slot %d, func %d\n", slot, pin-1); diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c index c9ae6592f09..07b0de82cfe 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c @@ -75,21 +75,26 @@ __initcall(sh7785_devices_setup); static struct intc2_data intc2_irq_table[] = { { 28, 0, 24, 0, 0, 2 }, /* TMU0 */ - { 40, 8, 24, 0, 3, 3 }, /* SCIF0 ERI */ - { 41, 8, 24, 0, 3, 3 }, /* SCIF0 RXI */ - { 42, 8, 24, 0, 3, 3 }, /* SCIF0 BRI */ - { 43, 8, 24, 0, 3, 3 }, /* SCIF0 TXI */ + { 40, 8, 24, 0, 2, 3 }, /* SCIF0 ERI */ + { 41, 8, 24, 0, 2, 3 }, /* SCIF0 RXI */ + { 42, 8, 24, 0, 2, 3 }, /* SCIF0 BRI */ + { 43, 8, 24, 0, 2, 3 }, /* SCIF0 TXI */ - { 76, 8, 16, 0, 4, 3 }, /* SCIF1 ERI */ - { 77, 8, 16, 0, 4, 3 }, /* SCIF1 RXI */ - { 78, 8, 16, 0, 4, 3 }, /* SCIF1 BRI */ - { 79, 8, 16, 0, 4, 3 }, /* SCIF1 TXI */ + { 44, 8, 16, 0, 3, 3 }, /* SCIF1 ERI */ + { 45, 8, 16, 0, 3, 3 }, /* SCIF1 RXI */ + { 46, 8, 16, 0, 3, 3 }, /* SCIF1 BRI */ + { 47, 8, 16, 0, 3, 3 }, /* SCIF1 TXI */ { 64, 0x14, 8, 0, 14, 2 }, /* PCIC0 */ { 65, 0x14, 0, 0, 15, 2 }, /* PCIC1 */ { 66, 0x18, 24, 0, 16, 2 }, /* PCIC2 */ { 67, 0x18, 16, 0, 17, 2 }, /* PCIC3 */ { 68, 0x18, 8, 0, 18, 2 }, /* PCIC4 */ + + { 60, 8, 8, 0, 4, 3 }, /* SCIF2 ERI, RXI, BRI, TXI */ + { 60, 8, 0, 0, 5, 3 }, /* SCIF3 ERI, RXI, BRI, TXI */ + { 60, 12, 24, 0, 6, 3 }, /* SCIF4 ERI, RXI, BRI, TXI */ + { 60, 12, 16, 0, 7, 3 }, /* SCIF5 ERI, RXI, BRI, TXI */ }; void __init init_IRQ_intc2(void) diff --git a/include/asm-sh/r7780rp.h b/include/asm-sh/r7780rp.h index bb391e0979e..4083b594992 100644 --- a/include/asm-sh/r7780rp.h +++ b/include/asm-sh/r7780rp.h @@ -83,6 +83,8 @@ #define IRQ_ONETH 13 /* On board Ethernet IRQ */ #define IRQ_PSW 14 /* Push Switch IRQ */ +#define IVDR_CK_ON 8 /* iVDR Clock ON */ + #elif defined(CONFIG_SH_R7780RP) #define PA_POFF (-1) @@ -152,6 +154,8 @@ #define IRQ_PSW 13 /* Push Switch IRQ */ #define IRQ_ZIGBEE 14 /* Ziggbee IO IRQ */ +#define IVDR_CK_ON 8 /* iVDR Clock ON */ + #elif defined(CONFIG_SH_R7785RP) #define PA_BCR 0xa4000000 /* FPGA */ #define PA_SDPOW (-1) @@ -197,6 +201,9 @@ #define PA_CU3MDR (PA_BCR+0x0300) #define PA_CU5MDR (PA_BCR+0x0302) #define PA_MMSR (PA_BCR+0x0400) + +#define IVDR_CK_ON 4 /* iVDR Clock ON */ + #endif void make_r7780rp_irq(unsigned int irq); -- cgit v1.2.3-70-g09d2