From 067b226b9e8e20463e0937344c93101ac8d8d2b1 Mon Sep 17 00:00:00 2001 From: Pawel Osciak Date: Tue, 10 Aug 2010 18:02:38 -0700 Subject: s3c-fb: add support for display panning Supports all bpp modes. The PRTCON register is used to disable in-hardware updates of registers that store start and end addresses of framebuffer memory. This prevents display corruption in case we do not make it before VSYNC with updating them atomically. With this feature there is no need to wait for a VSYNC interrupt before each such update. Signed-off-by: Pawel Osciak Signed-off-by: Kyungmin Park Cc: InKi Dae Cc: Ben Dooks Cc: Marek Szyprowski Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/arm/plat-samsung/include/plat/regs-fb.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch') diff --git a/arch/arm/plat-samsung/include/plat/regs-fb.h b/arch/arm/plat-samsung/include/plat/regs-fb.h index ac10013959b..dbb6c0afef4 100644 --- a/arch/arm/plat-samsung/include/plat/regs-fb.h +++ b/arch/arm/plat-samsung/include/plat/regs-fb.h @@ -112,6 +112,13 @@ #define VIDCON2_ORGYCbCr (1 << 8) #define VIDCON2_YUVORDCrCb (1 << 7) +/* PRTCON (S3C6410, S5PC100) + * Might not be present in the S3C6410 documentation, + * but tests prove it's there almost for sure; shouldn't hurt in any case. + */ +#define PRTCON (0x0c) +#define PRTCON_PROTECT (1 << 11) + /* VIDTCON0 */ #define VIDTCON0_VBPDE_MASK (0xff << 24) -- cgit v1.2.3-70-g09d2