From 3d55c29fb24286f350f04021bef2dd799e25dd20 Mon Sep 17 00:00:00 2001 From: Laxman Dewangan Date: Tue, 24 Jul 2012 10:36:23 -0600 Subject: ARM: tegra: harmony: add regulator supply name and its input supply Name the regulator as per board schematics and adds its supply name info in regulator data. Add the always on fixed regulator to refer the battery supply. Use this fixed regulator for input supply of some of PMIC regulator This patch was originally part of a 2-patch series. Patch 2 got applied to the regulator tree as 7c7fac3 "regulator: tps6586x: add support for input supply" without this patch. This broke regulator support on Harmony. Signed-off-by: Laxman Dewangan [swarren: added dependency info to commit description] Signed-off-by: Stephen Warren Signed-off-by: Arnd Bergmann --- arch/arm/mach-tegra/board-harmony-power.c | 33 +++++++++++++++++++------------ 1 file changed, 20 insertions(+), 13 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-tegra/board-harmony-power.c b/arch/arm/mach-tegra/board-harmony-power.c index 44dcb2e869b..8fd387bf31f 100644 --- a/arch/arm/mach-tegra/board-harmony-power.c +++ b/arch/arm/mach-tegra/board-harmony-power.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -34,7 +35,9 @@ static struct regulator_consumer_supply tps658621_ldo0_supply[] = { }; static struct regulator_init_data ldo0_data = { + .supply_regulator = "vdd_sm2", .constraints = { + .name = "vdd_ldo0", .min_uV = 3300 * 1000, .max_uV = 3300 * 1000, .valid_modes_mask = (REGULATOR_MODE_NORMAL | @@ -48,9 +51,11 @@ static struct regulator_init_data ldo0_data = { .consumer_supplies = tps658621_ldo0_supply, }; -#define HARMONY_REGULATOR_INIT(_id, _minmv, _maxmv) \ +#define HARMONY_REGULATOR_INIT(_id, _name, _supply, _minmv, _maxmv) \ static struct regulator_init_data _id##_data = { \ + .supply_regulator = _supply, \ .constraints = { \ + .name = _name, \ .min_uV = (_minmv)*1000, \ .max_uV = (_maxmv)*1000, \ .valid_modes_mask = (REGULATOR_MODE_NORMAL | \ @@ -61,18 +66,18 @@ static struct regulator_init_data ldo0_data = { }, \ } -HARMONY_REGULATOR_INIT(sm0, 725, 1500); -HARMONY_REGULATOR_INIT(sm1, 725, 1500); -HARMONY_REGULATOR_INIT(sm2, 3000, 4550); -HARMONY_REGULATOR_INIT(ldo1, 725, 1500); -HARMONY_REGULATOR_INIT(ldo2, 725, 1500); -HARMONY_REGULATOR_INIT(ldo3, 1250, 3300); -HARMONY_REGULATOR_INIT(ldo4, 1700, 2475); -HARMONY_REGULATOR_INIT(ldo5, 1250, 3300); -HARMONY_REGULATOR_INIT(ldo6, 1250, 3300); -HARMONY_REGULATOR_INIT(ldo7, 1250, 3300); -HARMONY_REGULATOR_INIT(ldo8, 1250, 3300); -HARMONY_REGULATOR_INIT(ldo9, 1250, 3300); +HARMONY_REGULATOR_INIT(sm0, "vdd_sm0", "vdd_sys", 725, 1500); +HARMONY_REGULATOR_INIT(sm1, "vdd_sm1", "vdd_sys", 725, 1500); +HARMONY_REGULATOR_INIT(sm2, "vdd_sm2", "vdd_sys", 3000, 4550); +HARMONY_REGULATOR_INIT(ldo1, "vdd_ldo1", "vdd_sm2", 725, 1500); +HARMONY_REGULATOR_INIT(ldo2, "vdd_ldo2", "vdd_sm2", 725, 1500); +HARMONY_REGULATOR_INIT(ldo3, "vdd_ldo3", "vdd_sm2", 1250, 3300); +HARMONY_REGULATOR_INIT(ldo4, "vdd_ldo4", "vdd_sm2", 1700, 2475); +HARMONY_REGULATOR_INIT(ldo5, "vdd_ldo5", NULL, 1250, 3300); +HARMONY_REGULATOR_INIT(ldo6, "vdd_ldo6", "vdd_sm2", 1250, 3300); +HARMONY_REGULATOR_INIT(ldo7, "vdd_ldo7", "vdd_sm2", 1250, 3300); +HARMONY_REGULATOR_INIT(ldo8, "vdd_ldo8", "vdd_sm2", 1250, 3300); +HARMONY_REGULATOR_INIT(ldo9, "vdd_ldo9", "vdd_sm2", 1250, 3300); #define TPS_REG(_id, _data) \ { \ @@ -115,6 +120,8 @@ static struct i2c_board_info __initdata harmony_regulators[] = { int __init harmony_regulator_init(void) { if (machine_is_harmony()) { + regulator_register_always_on(0, "vdd_sys", + NULL, 0, 5000000); i2c_register_board_info(3, harmony_regulators, 1); } else { /* Harmony, booted using device tree */ struct device_node *np; -- cgit v1.2.3-70-g09d2 From 49121304a9831449a841ca0c77dc0ad8697e23c9 Mon Sep 17 00:00:00 2001 From: Pawel Moll Date: Wed, 25 Jul 2012 11:49:34 +0100 Subject: ARM: versatile: Don't use platform clock for Integrator & VE Due to automatic merge of a613163dff04cbfcb7d66b06ef4a5f65498ee59b "ARM: integrator: convert to common clock" and 56a34b03ff427046494db87f05fc810aaedd23a5 "ARM: versatile: Make plat-versatile clock optional" two platforms: Integrator and Versatile Express now select both COMMON_CLK and PLAT_VERSATILE_CLOCK which breaks building them. Fixed now. Signed-off-by: Pawel Moll Signed-off-by: Arnd Bergmann --- arch/arm/Kconfig | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index b25c9d3c379..9124ff75fe5 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -279,7 +279,6 @@ config ARCH_INTEGRATOR select ICST select GENERIC_CLOCKEVENTS select PLAT_VERSATILE - select PLAT_VERSATILE_CLOCK select PLAT_VERSATILE_FPGA_IRQ select NEED_MACH_IO_H select NEED_MACH_MEMORY_H @@ -336,7 +335,6 @@ config ARCH_VEXPRESS select ICST select NO_IOPORT select PLAT_VERSATILE - select PLAT_VERSATILE_CLOCK select PLAT_VERSATILE_CLCD select REGULATOR_FIXED_VOLTAGE if REGULATOR help -- cgit v1.2.3-70-g09d2 From f479db44d2e3d4a969897e1f5e331e5ed4ac4968 Mon Sep 17 00:00:00 2001 From: Andrew Lunn Date: Thu, 19 Jul 2012 08:58:08 +0200 Subject: ARM: Kirkwood: Ensure runit clock always ticks. Marvell engineers tell us: It seems that many units use the RUNIT clock. SPI, UART, NAND, TWSI, ... So it's not possible to clock gate it. Currently the SPI, NAND and TWSI driver will clk_prepaure_enable() this clk, but since we have no idea what ... is, and turning this clk off results in a hard lock, unconditionally enable runit. Signed-off-by: Andrew Lunn Tested-by: Simon Baatz --- arch/arm/mach-kirkwood/common.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c index f261cd24264..3de2d6df58e 100644 --- a/arch/arm/mach-kirkwood/common.c +++ b/arch/arm/mach-kirkwood/common.c @@ -241,6 +241,11 @@ void __init kirkwood_clk_init(void) orion_clkdev_add("0", "pcie", pex0); orion_clkdev_add("1", "pcie", pex1); orion_clkdev_add(NULL, "kirkwood-i2s", audio); + + /* Marvell says runit is used by SPI, UART, NAND, TWSI, ..., + * so should never be gated. + */ + clk_prepare_enable(runit); } /***************************************************************************** -- cgit v1.2.3-70-g09d2 From b5409430ffaef1ed282d20cab868ee692df6dbff Mon Sep 17 00:00:00 2001 From: Simon Baatz Date: Fri, 6 Jul 2012 20:42:38 +0200 Subject: ARM: Kirkwood: Fix PHY disable clk problems Commit 98d9986 (ARM: Kirkwood: Replace clock gating) and the fix 5fb2ce (ARM: Kirkwood: clk_register_gate_fn: add fn assignment) introduced a custom variant of clock gating which allows to define a function to be called before gating the clock off. This is used to disable the SATA and PCIe PHYs if the respective clocks are unused after initialization. However, of these two drivers, the SATA driver may be compiled as a module. The driver re-enables the clocks at module init but the PHYs stay disabled. Since the custom clock gating disabled the PHYs when gating the clock off, it should also re-enable them when enabling the clock gate. This is done by adding a second function that may be used to enable the PHYs. Signed-off-by: Simon Baatz Signed-off-by: Andrew Lunn --- arch/arm/mach-kirkwood/common.c | 65 +++++++++++++++++++++++++++++++---------- 1 file changed, 50 insertions(+), 15 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c index 3de2d6df58e..c9201539ffb 100644 --- a/arch/arm/mach-kirkwood/common.c +++ b/arch/arm/mach-kirkwood/common.c @@ -67,6 +67,14 @@ void __init kirkwood_map_io(void) * CLK tree ****************************************************************************/ +static void enable_sata0(void) +{ + /* Enable PLL and IVREF */ + writel(readl(SATA0_PHY_MODE_2) | 0xf, SATA0_PHY_MODE_2); + /* Enable PHY */ + writel(readl(SATA0_IF_CTRL) & ~0x200, SATA0_IF_CTRL); +} + static void disable_sata0(void) { /* Disable PLL and IVREF */ @@ -75,6 +83,14 @@ static void disable_sata0(void) writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL); } +static void enable_sata1(void) +{ + /* Enable PLL and IVREF */ + writel(readl(SATA1_PHY_MODE_2) | 0xf, SATA1_PHY_MODE_2); + /* Enable PHY */ + writel(readl(SATA1_IF_CTRL) & ~0x200, SATA1_IF_CTRL); +} + static void disable_sata1(void) { /* Disable PLL and IVREF */ @@ -107,23 +123,38 @@ static void disable_pcie1(void) } } -/* An extended version of the gated clk. This calls fn() before - * disabling the clock. We use this to turn off PHYs etc. */ +/* An extended version of the gated clk. This calls fn_en()/fn_dis + * before enabling/disabling the clock. We use this to turn on/off + * PHYs etc. */ struct clk_gate_fn { struct clk_gate gate; - void (*fn)(void); + void (*fn_en)(void); + void (*fn_dis)(void); }; #define to_clk_gate_fn(_gate) container_of(_gate, struct clk_gate_fn, gate) #define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw) +static int clk_gate_fn_enable(struct clk_hw *hw) +{ + struct clk_gate *gate = to_clk_gate(hw); + struct clk_gate_fn *gate_fn = to_clk_gate_fn(gate); + int ret; + + ret = clk_gate_ops.enable(hw); + if (!ret && gate_fn->fn_en) + gate_fn->fn_en(); + + return ret; +} + static void clk_gate_fn_disable(struct clk_hw *hw) { struct clk_gate *gate = to_clk_gate(hw); struct clk_gate_fn *gate_fn = to_clk_gate_fn(gate); - if (gate_fn->fn) - gate_fn->fn(); + if (gate_fn->fn_dis) + gate_fn->fn_dis(); clk_gate_ops.disable(hw); } @@ -135,7 +166,7 @@ static struct clk __init *clk_register_gate_fn(struct device *dev, const char *parent_name, unsigned long flags, void __iomem *reg, u8 bit_idx, u8 clk_gate_flags, spinlock_t *lock, - void (*fn)(void)) + void (*fn_en)(void), void (*fn_dis)(void)) { struct clk_gate_fn *gate_fn; struct clk *clk; @@ -159,11 +190,14 @@ static struct clk __init *clk_register_gate_fn(struct device *dev, gate_fn->gate.flags = clk_gate_flags; gate_fn->gate.lock = lock; gate_fn->gate.hw.init = &init; - gate_fn->fn = fn; + gate_fn->fn_en = fn_en; + gate_fn->fn_dis = fn_dis; - /* ops is the gate ops, but with our disable function */ - if (clk_gate_fn_ops.disable != clk_gate_fn_disable) { + /* ops is the gate ops, but with our enable/disable functions */ + if (clk_gate_fn_ops.enable != clk_gate_fn_enable || + clk_gate_fn_ops.disable != clk_gate_fn_disable) { clk_gate_fn_ops = clk_gate_ops; + clk_gate_fn_ops.enable = clk_gate_fn_enable; clk_gate_fn_ops.disable = clk_gate_fn_disable; } @@ -187,11 +221,12 @@ static struct clk __init *kirkwood_register_gate(const char *name, u8 bit_idx) static struct clk __init *kirkwood_register_gate_fn(const char *name, u8 bit_idx, - void (*fn)(void)) + void (*fn_en)(void), + void (*fn_dis)(void)) { return clk_register_gate_fn(NULL, name, "tclk", 0, (void __iomem *)CLOCK_GATING_CTRL, - bit_idx, 0, &gating_lock, fn); + bit_idx, 0, &gating_lock, fn_en, fn_dis); } static struct clk *ge0, *ge1; @@ -208,18 +243,18 @@ void __init kirkwood_clk_init(void) ge0 = kirkwood_register_gate("ge0", CGC_BIT_GE0); ge1 = kirkwood_register_gate("ge1", CGC_BIT_GE1); sata0 = kirkwood_register_gate_fn("sata0", CGC_BIT_SATA0, - disable_sata0); + enable_sata0, disable_sata0); sata1 = kirkwood_register_gate_fn("sata1", CGC_BIT_SATA1, - disable_sata1); + enable_sata1, disable_sata1); usb0 = kirkwood_register_gate("usb0", CGC_BIT_USB0); sdio = kirkwood_register_gate("sdio", CGC_BIT_SDIO); crypto = kirkwood_register_gate("crypto", CGC_BIT_CRYPTO); xor0 = kirkwood_register_gate("xor0", CGC_BIT_XOR0); xor1 = kirkwood_register_gate("xor1", CGC_BIT_XOR1); pex0 = kirkwood_register_gate_fn("pex0", CGC_BIT_PEX0, - disable_pcie0); + NULL, disable_pcie0); pex1 = kirkwood_register_gate_fn("pex1", CGC_BIT_PEX1, - disable_pcie1); + NULL, disable_pcie1); audio = kirkwood_register_gate("audio", CGC_BIT_AUDIO); kirkwood_register_gate("tdm", CGC_BIT_TDM); kirkwood_register_gate("tsu", CGC_BIT_TSU); -- cgit v1.2.3-70-g09d2 From 30e0f58035073c895a8d33e1521e412be73e02bc Mon Sep 17 00:00:00 2001 From: Hannes Reinecke Date: Tue, 12 Jun 2012 15:59:45 +0200 Subject: ARM: Dove: Fixup ge00 initialisation The last argument of orion_ge00_init() is actually the error interrupt, so we should be using the correct value here. Signed-off-by: Hannes Reinecke Signed-off-by: Andrew Lunn --- arch/arm/mach-dove/common.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c index 9493076fc59..4db5de54b6a 100644 --- a/arch/arm/mach-dove/common.c +++ b/arch/arm/mach-dove/common.c @@ -101,8 +101,8 @@ void __init dove_ehci1_init(void) ****************************************************************************/ void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data) { - orion_ge00_init(eth_data, - DOVE_GE00_PHYS_BASE, IRQ_DOVE_GE00_SUM, 0); + orion_ge00_init(eth_data, DOVE_GE00_PHYS_BASE, + IRQ_DOVE_GE00_SUM, IRQ_DOVE_GE00_ERR); } /***************************************************************************** -- cgit v1.2.3-70-g09d2 From 778435045a416da71f1757a80e37200a5ea5af70 Mon Sep 17 00:00:00 2001 From: Andrew Lunn Date: Wed, 18 Jul 2012 19:22:54 +0200 Subject: ARM: Kirkwood: Replace mrvl with marvell It has been decided to use marvell, not mrvl, in the compatibility property. Search & replace. Signed-off-by: Andrew Lunn --- Documentation/devicetree/bindings/mtd/orion-nand.txt | 4 ++-- arch/arm/boot/dts/kirkwood-dns320.dts | 2 +- arch/arm/boot/dts/kirkwood-dns325.dts | 2 +- arch/arm/boot/dts/kirkwood-dreamplug.dts | 2 +- arch/arm/boot/dts/kirkwood-ib62x0.dts | 2 +- arch/arm/boot/dts/kirkwood-iconnect.dts | 2 +- arch/arm/boot/dts/kirkwood.dtsi | 6 +++--- drivers/mtd/nand/orion_nand.c | 2 +- drivers/rtc/rtc-mv.c | 2 +- 9 files changed, 12 insertions(+), 12 deletions(-) (limited to 'arch') diff --git a/Documentation/devicetree/bindings/mtd/orion-nand.txt b/Documentation/devicetree/bindings/mtd/orion-nand.txt index b2356b7d2fa..2d6ab660e60 100644 --- a/Documentation/devicetree/bindings/mtd/orion-nand.txt +++ b/Documentation/devicetree/bindings/mtd/orion-nand.txt @@ -1,7 +1,7 @@ NAND support for Marvell Orion SoC platforms Required properties: -- compatible : "mrvl,orion-nand". +- compatible : "marvell,orion-nand". - reg : Base physical address of the NAND and length of memory mapped region @@ -24,7 +24,7 @@ nand@f4000000 { ale = <1>; bank-width = <1>; chip-delay = <25>; - compatible = "mrvl,orion-nand"; + compatible = "marvell,orion-nand"; reg = <0xf4000000 0x400>; partition@0 { diff --git a/arch/arm/boot/dts/kirkwood-dns320.dts b/arch/arm/boot/dts/kirkwood-dns320.dts index dc09a735b04..9a33077130e 100644 --- a/arch/arm/boot/dts/kirkwood-dns320.dts +++ b/arch/arm/boot/dts/kirkwood-dns320.dts @@ -4,7 +4,7 @@ / { model = "D-Link DNS-320 NAS (Rev A1)"; - compatible = "dlink,dns-320-a1", "dlink,dns-320", "dlink,dns-kirkwood", "mrvl,kirkwood-88f6281", "mrvl,kirkwood"; + compatible = "dlink,dns-320-a1", "dlink,dns-320", "dlink,dns-kirkwood", "marvell,kirkwood-88f6281", "marvell,kirkwood"; memory { device_type = "memory"; diff --git a/arch/arm/boot/dts/kirkwood-dns325.dts b/arch/arm/boot/dts/kirkwood-dns325.dts index c2a5562525d..16734c1b5df 100644 --- a/arch/arm/boot/dts/kirkwood-dns325.dts +++ b/arch/arm/boot/dts/kirkwood-dns325.dts @@ -4,7 +4,7 @@ / { model = "D-Link DNS-325 NAS (Rev A1)"; - compatible = "dlink,dns-325-a1", "dlink,dns-325", "dlink,dns-kirkwood", "mrvl,kirkwood-88f6281", "mrvl,kirkwood"; + compatible = "dlink,dns-325-a1", "dlink,dns-325", "dlink,dns-kirkwood", "marvell,kirkwood-88f6281", "marvell,kirkwood"; memory { device_type = "memory"; diff --git a/arch/arm/boot/dts/kirkwood-dreamplug.dts b/arch/arm/boot/dts/kirkwood-dreamplug.dts index a5376b84227..78b0f06a09a 100644 --- a/arch/arm/boot/dts/kirkwood-dreamplug.dts +++ b/arch/arm/boot/dts/kirkwood-dreamplug.dts @@ -4,7 +4,7 @@ / { model = "Globalscale Technologies Dreamplug"; - compatible = "globalscale,dreamplug-003-ds2001", "globalscale,dreamplug", "mrvl,kirkwood-88f6281", "mrvl,kirkwood"; + compatible = "globalscale,dreamplug-003-ds2001", "globalscale,dreamplug", "marvell,kirkwood-88f6281", "marvell,kirkwood"; memory { device_type = "memory"; diff --git a/arch/arm/boot/dts/kirkwood-ib62x0.dts b/arch/arm/boot/dts/kirkwood-ib62x0.dts index ada0f0c2308..f59dcf6dc45 100644 --- a/arch/arm/boot/dts/kirkwood-ib62x0.dts +++ b/arch/arm/boot/dts/kirkwood-ib62x0.dts @@ -4,7 +4,7 @@ / { model = "RaidSonic ICY BOX IB-NAS62x0 (Rev B)"; - compatible = "raidsonic,ib-nas6210-b", "raidsonic,ib-nas6220-b", "raidsonic,ib-nas6210", "raidsonic,ib-nas6220", "raidsonic,ib-nas62x0", "mrvl,kirkwood-88f6281", "mrvl,kirkwood"; + compatible = "raidsonic,ib-nas6210-b", "raidsonic,ib-nas6220-b", "raidsonic,ib-nas6210", "raidsonic,ib-nas6220", "raidsonic,ib-nas62x0", "marvell,kirkwood-88f6281", "marvell,kirkwood"; memory { device_type = "memory"; diff --git a/arch/arm/boot/dts/kirkwood-iconnect.dts b/arch/arm/boot/dts/kirkwood-iconnect.dts index 1ba75d4adec..026a1f82d81 100644 --- a/arch/arm/boot/dts/kirkwood-iconnect.dts +++ b/arch/arm/boot/dts/kirkwood-iconnect.dts @@ -4,7 +4,7 @@ / { model = "Iomega Iconnect"; - compatible = "iom,iconnect-1.1", "iom,iconnect", "mrvl,kirkwood-88f6281", "mrvl,kirkwood"; + compatible = "iom,iconnect-1.1", "iom,iconnect", "marvell,kirkwood-88f6281", "marvell,kirkwood"; memory { device_type = "memory"; diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi index 926528b81ba..f95dbc190ab 100644 --- a/arch/arm/boot/dts/kirkwood.dtsi +++ b/arch/arm/boot/dts/kirkwood.dtsi @@ -1,7 +1,7 @@ /include/ "skeleton.dtsi" / { - compatible = "mrvl,kirkwood"; + compatible = "marvell,kirkwood"; ocp@f1000000 { compatible = "simple-bus"; @@ -28,7 +28,7 @@ }; rtc@10300 { - compatible = "mrvl,kirkwood-rtc", "mrvl,orion-rtc"; + compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc"; reg = <0x10300 0x20>; interrupts = <53>; }; @@ -39,7 +39,7 @@ cle = <0>; ale = <1>; bank-width = <1>; - compatible = "mrvl,orion-nand"; + compatible = "marvell,orion-nand"; reg = <0x3000000 0x400>; chip-delay = <25>; /* set partition map and/or chip-delay in board dts */ diff --git a/drivers/mtd/nand/orion_nand.c b/drivers/mtd/nand/orion_nand.c index 9b8fd3d7716..fc5a868c436 100644 --- a/drivers/mtd/nand/orion_nand.c +++ b/drivers/mtd/nand/orion_nand.c @@ -218,7 +218,7 @@ static int __devexit orion_nand_remove(struct platform_device *pdev) #ifdef CONFIG_OF static struct of_device_id orion_nand_of_match_table[] = { - { .compatible = "mrvl,orion-nand", }, + { .compatible = "marvell,orion-nand", }, {}, }; #endif diff --git a/drivers/rtc/rtc-mv.c b/drivers/rtc/rtc-mv.c index b2185f4255a..ebc1649d45d 100644 --- a/drivers/rtc/rtc-mv.c +++ b/drivers/rtc/rtc-mv.c @@ -297,7 +297,7 @@ static int __exit mv_rtc_remove(struct platform_device *pdev) #ifdef CONFIG_OF static struct of_device_id rtc_mv_of_match_table[] = { - { .compatible = "mrvl,orion-rtc", }, + { .compatible = "marvell,orion-rtc", }, {} }; #endif -- cgit v1.2.3-70-g09d2 From 01ad8063a5db9ac8320f197577a34b423ba64eca Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Wed, 25 Jul 2012 14:02:44 -0600 Subject: ARM: dt: tegra trimslice: add vbus-gpio property On TrimSlice, Tegra's USB1 port may be routed to either an external micro USB port, or an internal USB->SATA bridge for SSD or HDD. This muxing is controlled by a GPIO. Whilst not strictly a VBUS GPIO, the TrimSlice board files caused this GPIO to be set appropriately to enable the SATA bridge by passing it as the VBUS GPIO to the USB driver. Echo this same configuration in device tree to enable the SATA bridge. An alternative might be to implement a full USB bus mux driver. However, that seems over-complex right now. Cc: # v3.5 (file is named tegra-trimslice.dts there) Signed-off-by: Stephen Warren Signed-off-by: Arnd Bergmann --- arch/arm/boot/dts/tegra20-trimslice.dts | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts index 9de5636023f..25d2d8ccb12 100644 --- a/arch/arm/boot/dts/tegra20-trimslice.dts +++ b/arch/arm/boot/dts/tegra20-trimslice.dts @@ -276,6 +276,7 @@ usb@c5000000 { status = "okay"; + nvidia,vbus-gpio = <&gpio 170 0>; /* gpio PV2 */ }; usb@c5004000 { -- cgit v1.2.3-70-g09d2 From a6a3dd1aed31ace7c827236c53d83f4e845dcff2 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Wed, 25 Jul 2012 14:02:43 -0600 Subject: ARM: dt: tegra trimslice: enable USB2 port This was accidentally disabled by commit 2a5fdc9 "ARM: dt: tegra: invert status=disable vs status=okay". Cc: # v3.5 (file is named tegra-trimslice.dts there) Signed-off-by: Stephen Warren Signed-off-by: Arnd Bergmann --- arch/arm/boot/dts/tegra20-trimslice.dts | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts index 25d2d8ccb12..27fb8a67ea4 100644 --- a/arch/arm/boot/dts/tegra20-trimslice.dts +++ b/arch/arm/boot/dts/tegra20-trimslice.dts @@ -280,6 +280,7 @@ }; usb@c5004000 { + status = "okay"; nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */ }; -- cgit v1.2.3-70-g09d2 From fa7c865ad999d6ca340bca471fab7f3a3e6ae011 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Fri, 13 Jul 2012 14:13:55 +0800 Subject: ARM: mxs: fix compile error caused by prom_update_property change MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The commit 475d009 (of: Improve prom_update_property() function) changed prom_update_property interface, and causes the compile error below. CC arch/arm/mach-mxs/mach-mxs.o arch/arm/mach-mxs/mach-mxs.c: In function ‘update_fec_mac_prop’: arch/arm/mach-mxs/mach-mxs.c:216:4: error: too many arguments to function ‘prom_update_property’ include/linux/of.h:263:12: note: declared here Update the caller update_fec_mac_prop to fix the error. Signed-off-by: Shawn Guo Signed-off-by: Olof Johansson --- arch/arm/mach-mxs/mach-mxs.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c index 648bdd05d38..8dabfe81d07 100644 --- a/arch/arm/mach-mxs/mach-mxs.c +++ b/arch/arm/mach-mxs/mach-mxs.c @@ -162,7 +162,7 @@ enum mac_oui { static void __init update_fec_mac_prop(enum mac_oui oui) { struct device_node *np, *from = NULL; - struct property *oldmac, *newmac; + struct property *newmac; const u32 *ocotp = mxs_get_ocotp(); u8 *macaddr; u32 val; @@ -208,11 +208,7 @@ static void __init update_fec_mac_prop(enum mac_oui oui) macaddr[4] = (val >> 8) & 0xff; macaddr[5] = (val >> 0) & 0xff; - oldmac = of_find_property(np, newmac->name, NULL); - if (oldmac) - prom_update_property(np, newmac, oldmac); - else - prom_add_property(np, newmac); + prom_update_property(np, newmac); } } -- cgit v1.2.3-70-g09d2