From 38307341af3a0be8ec5319756361b51ac29dffc7 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 9 Dec 2005 19:04:18 +0100 Subject: [PATCH] spufs: clear dsisr on CLASS1[Mf] exception Because of always clearing DSISR at spu class 1 interrupt handler, kernel may lose Class1[Mf] interrupt. Signed-off-by: Masato Noguchi Signed-off-by: Geoff Levand Signed-off-by: Arnd Bergmann Signed-off-by: Paul Mackerras --- arch/powerpc/platforms/cell/spu_base.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c index f9da79eb3db..3a5302151e0 100644 --- a/arch/powerpc/platforms/cell/spu_base.c +++ b/arch/powerpc/platforms/cell/spu_base.c @@ -240,7 +240,8 @@ spu_irq_class_1(int irq, void *data, struct pt_regs *regs) stat = in_be64(&spu->priv1->int_stat_class1_RW) & mask; dar = in_be64(&spu->priv1->mfc_dar_RW); dsisr = in_be64(&spu->priv1->mfc_dsisr_RW); - out_be64(&spu->priv1->mfc_dsisr_RW, 0UL); + if (stat & 2) /* mapping fault */ + out_be64(&spu->priv1->mfc_dsisr_RW, 0UL); out_be64(&spu->priv1->int_stat_class1_RW, stat); spin_unlock(&spu->register_lock); -- cgit v1.2.3-70-g09d2