From 4b46fbba607ef99f1aab3b77bfc1dc25464df5a6 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 1 Oct 2010 13:37:13 +0900 Subject: ARM: SAMSUNG: Add GPIO configuration for a range of pins Add s3c_gpio_cfgpin_range() to configure a range of pins to the given value. This is useful for a number of blocks where the pins are in order and saves multiple calls to s3c_gpio_cfgpin(). Signed-off-by: Ben Dooks Signed-off-by: Kukjin Kim --- arch/arm/plat-samsung/gpio-config.c | 15 +++++++++++++++ arch/arm/plat-samsung/include/plat/gpio-cfg.h | 13 +++++++++++++ 2 files changed, 28 insertions(+) (limited to 'arch') diff --git a/arch/arm/plat-samsung/gpio-config.c b/arch/arm/plat-samsung/gpio-config.c index e3d41eaed1f..fa180dcc41c 100644 --- a/arch/arm/plat-samsung/gpio-config.c +++ b/arch/arm/plat-samsung/gpio-config.c @@ -41,6 +41,21 @@ int s3c_gpio_cfgpin(unsigned int pin, unsigned int config) } EXPORT_SYMBOL(s3c_gpio_cfgpin); +int s3c_gpio_cfgpin_range(unsigned int start, unsigned int nr, + unsigned int cfg) +{ + int ret; + + for (; nr > 0; nr--, start++) { + ret = s3c_gpio_cfgpin(start, cfg); + if (ret != 0) + return ret; + } + + return 0; +} +EXPORT_SYMBOL_GPL(s3c_gpio_cfgpin_range); + unsigned s3c_gpio_getcfg(unsigned int pin) { struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin); diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h index 1c6b92947c5..6e117dc2709 100644 --- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h +++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h @@ -108,6 +108,19 @@ extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to); */ extern unsigned s3c_gpio_getcfg(unsigned int pin); +/** + * s3c_gpio_cfgpin_range() - Change the GPIO function for configuring pin range + * @start: The pin number to start at + * @nr: The number of pins to configure from @start. + * @cfg: The configuration for the pin's function + * + * Call s3c_gpio_cfgpin() for the @nr pins starting at @start. + * + * @sa s3c_gpio_cfgpin. + */ +extern int s3c_gpio_cfgpin_range(unsigned int start, unsigned int nr, + unsigned int cfg); + /* Define values for the pull-{up,down} available for each gpio pin. * * These values control the state of the weak pull-{up,down} resistors -- cgit v1.2.3-70-g09d2 From f5321760ce1d65fd69facc982b8523b19edf07a0 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Thu, 27 May 2010 14:57:27 +0900 Subject: ARM: S3C64XX: Change dev-audio.c to use S3C_GPIO_SFN() for special functions To aide in changing the gpio code, remove the use of pin-specific configs and move to using the S3C_GPIO_SFN() versions. Signed-off-by: Ben Dooks Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c64xx/dev-audio.c | 79 ++++++++++++++++++--------------------- 1 file changed, 37 insertions(+), 42 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-s3c64xx/dev-audio.c b/arch/arm/mach-s3c64xx/dev-audio.c index 9648fbc36ee..c9a44969e64 100644 --- a/arch/arm/mach-s3c64xx/dev-audio.c +++ b/arch/arm/mach-s3c64xx/dev-audio.c @@ -22,27 +22,22 @@ #include #include -#include -#include -#include -#include - static int s3c64xx_i2sv3_cfg_gpio(struct platform_device *pdev) { switch (pdev->id) { case 0: - s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_I2S0_CLK); - s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_I2S0_CDCLK); - s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_I2S0_LRCLK); - s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_I2S0_DI); - s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_I2S0_D0); + s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C_GPIO_SFN(3)); + s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C_GPIO_SFN(3)); + s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C_GPIO_SFN(3)); + s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C_GPIO_SFN(3)); + s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C_GPIO_SFN(3)); break; case 1: - s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_I2S1_CLK); - s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_I2S1_CDCLK); - s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_I2S1_LRCLK); - s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_I2S1_DI); - s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_I2S1_D0); + s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C_GPIO_SFN(3)); + s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C_GPIO_SFN(3)); + s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C_GPIO_SFN(3)); + s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C_GPIO_SFN(3)); + s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C_GPIO_SFN(3)); default: printk(KERN_DEBUG "Invalid I2S Controller number!"); return -EINVAL; @@ -53,13 +48,13 @@ static int s3c64xx_i2sv3_cfg_gpio(struct platform_device *pdev) static int s3c64xx_i2sv4_cfg_gpio(struct platform_device *pdev) { - s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C64XX_GPC4_I2S_V40_DO0); - s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C64XX_GPC5_I2S_V40_DO1); - s3c_gpio_cfgpin(S3C64XX_GPC(7), S3C64XX_GPC7_I2S_V40_DO2); - s3c_gpio_cfgpin(S3C64XX_GPH(6), S3C64XX_GPH6_I2S_V40_BCLK); - s3c_gpio_cfgpin(S3C64XX_GPH(7), S3C64XX_GPH7_I2S_V40_CDCLK); - s3c_gpio_cfgpin(S3C64XX_GPH(8), S3C64XX_GPH8_I2S_V40_LRCLK); - s3c_gpio_cfgpin(S3C64XX_GPH(9), S3C64XX_GPH9_I2S_V40_DI); + s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C_GPIO_SFN(5)); + s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C_GPIO_SFN(5)); + s3c_gpio_cfgpin(S3C64XX_GPC(7), S3C_GPIO_SFN(5)); + s3c_gpio_cfgpin(S3C64XX_GPH(6), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin(S3C64XX_GPH(7), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin(S3C64XX_GPH(8), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin(S3C64XX_GPH(9), S3C_GPIO_SFN(4)); return 0; } @@ -170,18 +165,18 @@ static int s3c64xx_pcm_cfg_gpio(struct platform_device *pdev) { switch (pdev->id) { case 0: - s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_PCM0_SCLK); - s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_PCM0_EXTCLK); - s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_PCM0_FSYNC); - s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_PCM0_SIN); - s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_PCM0_SOUT); + s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C_GPIO_SFN(2)); break; case 1: - s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_PCM1_SCLK); - s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_PCM1_EXTCLK); - s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_PCM1_FSYNC); - s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_PCM1_SIN); - s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_PCM1_SOUT); + s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C_GPIO_SFN(2)); break; default: printk(KERN_DEBUG "Invalid PCM Controller number!"); @@ -261,22 +256,22 @@ EXPORT_SYMBOL(s3c64xx_device_pcm1); static int s3c64xx_ac97_cfg_gpd(struct platform_device *pdev) { - s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_AC97_BITCLK); - s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_AC97_nRESET); - s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_AC97_SYNC); - s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_AC97_SDI); - s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_AC97_SDO); + s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C_GPIO_SFN(4)); return 0; } static int s3c64xx_ac97_cfg_gpe(struct platform_device *pdev) { - s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_AC97_BITCLK); - s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_AC97_nRESET); - s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_AC97_SYNC); - s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_AC97_SDI); - s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_AC97_SDO); + s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C_GPIO_SFN(4)); return 0; } -- cgit v1.2.3-70-g09d2 From 2618b555d2734df3c8ca71df319d318489318083 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Thu, 27 May 2010 15:54:06 +0900 Subject: ARM: S3C64XX: Change to using s3c_gpio_cfgpin_range() Change the code setting ranges of GPIO pins using s3c_gpio_cfgpin() to use the recently introduced s3c_gpio_cfgpin_range(). Signed-off-by: Ben Dooks Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c64xx/dev-audio.c | 53 +++++++++----------------------- arch/arm/mach-s3c64xx/setup-sdhci-gpio.c | 8 ++--- 2 files changed, 19 insertions(+), 42 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-s3c64xx/dev-audio.c b/arch/arm/mach-s3c64xx/dev-audio.c index c9a44969e64..e4bb02395d9 100644 --- a/arch/arm/mach-s3c64xx/dev-audio.c +++ b/arch/arm/mach-s3c64xx/dev-audio.c @@ -24,25 +24,22 @@ static int s3c64xx_i2sv3_cfg_gpio(struct platform_device *pdev) { + unsigned int base; + switch (pdev->id) { case 0: - s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C_GPIO_SFN(3)); + base = S3C64XX_GPD(0); break; case 1: - s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C_GPIO_SFN(3)); + base = S3C64XX_GPE(0); + break; default: printk(KERN_DEBUG "Invalid I2S Controller number!"); return -EINVAL; } + s3c_gpio_cfgpin_range(base, 5, S3C_GPIO_SFN(3)); + return 0; } @@ -51,10 +48,7 @@ static int s3c64xx_i2sv4_cfg_gpio(struct platform_device *pdev) s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C_GPIO_SFN(5)); s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C_GPIO_SFN(5)); s3c_gpio_cfgpin(S3C64XX_GPC(7), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S3C64XX_GPH(6), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S3C64XX_GPH(7), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S3C64XX_GPH(8), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S3C64XX_GPH(9), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin_range(S3C64XX_GPH(6), 4, S3C_GPIO_SFN(4)); return 0; } @@ -163,26 +157,21 @@ EXPORT_SYMBOL(s3c64xx_device_iisv4); static int s3c64xx_pcm_cfg_gpio(struct platform_device *pdev) { + unsigned int base; + switch (pdev->id) { case 0: - s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C_GPIO_SFN(2)); + base = S3C64XX_GPD(0); break; case 1: - s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C_GPIO_SFN(2)); + base = S3C64XX_GPE(0); break; default: printk(KERN_DEBUG "Invalid PCM Controller number!"); return -EINVAL; } + s3c_gpio_cfgpin_range(base, 5, S3C_GPIO_SFN(2)); return 0; } @@ -256,24 +245,12 @@ EXPORT_SYMBOL(s3c64xx_device_pcm1); static int s3c64xx_ac97_cfg_gpd(struct platform_device *pdev) { - s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C_GPIO_SFN(4)); - - return 0; + return s3c_gpio_cfgpin_range(S3C64XX_GPD(0), 5, S3C_GPIO_SFN(4)); } static int s3c64xx_ac97_cfg_gpe(struct platform_device *pdev) { - s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C_GPIO_SFN(4)); - - return 0; + return s3c_gpio_cfgpin_range(S3C64XX_GPE(0), 5, S3C_GPIO_SFN(4)); } static struct resource s3c64xx_ac97_resource[] = { diff --git a/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c b/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c index 32235959137..0655c7a9bd3 100644 --- a/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c +++ b/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c @@ -30,8 +30,8 @@ void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) end = S3C64XX_GPG(2 + width); /* Set all the necessary GPG pins to special-function 0 */ + s3c_gpio_cfgpin_range(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2)); for (gpio = S3C64XX_GPG(0); gpio < end; gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); } @@ -50,8 +50,8 @@ void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) end = S3C64XX_GPH(2 + width); /* Set all the necessary GPG pins to special-function 0 */ + s3c_gpio_cfgpin_range(S3C64XX_GPH(0), 2 + width, S3C_GPIO_SFN(2)); for (gpio = S3C64XX_GPH(0); gpio < end; gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); } @@ -69,14 +69,14 @@ void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) end = S3C64XX_GPH(6 + width); /* Set all the necessary GPH pins to special-function 1 */ + s3c_gpio_cfgpin_range(S3C64XX_GPH(6), width, S3C_GPIO_SFN(3)); for (gpio = S3C64XX_GPH(6); gpio < end; gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); } /* Set all the necessary GPC pins to special-function 1 */ + s3c_gpio_cfgpin_range(S3C64XX_GPC(4), 2, S3C_GPIO_SFN(3)); for (gpio = S3C64XX_GPC(4); gpio < S3C64XX_GPC(6); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); } } -- cgit v1.2.3-70-g09d2 From 699afb75de3e7a32a802513864c869f41868c3c8 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 1 Oct 2010 13:52:25 +0900 Subject: ARM: S5P6442: Change to using s3c_gpio_cfgpin_range() Change the code setting ranges of GPIO pins using s3c_gpio_cfgpin() to use the recently introduced s3c_gpio_cfgpin_range(). Signed-off-by: Ben Dooks [kgene.kim@samsung.com: fixed wrong change] Signed-off-by: Kukjin Kim --- arch/arm/mach-s5p6442/dev-audio.c | 30 ++++++++++-------------------- arch/arm/mach-s5p6442/dev-spi.c | 3 +-- 2 files changed, 11 insertions(+), 22 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-s5p6442/dev-audio.c b/arch/arm/mach-s5p6442/dev-audio.c index 7a4e34720b7..3462197ff35 100644 --- a/arch/arm/mach-s5p6442/dev-audio.c +++ b/arch/arm/mach-s5p6442/dev-audio.c @@ -21,22 +21,16 @@ static int s5p6442_cfg_i2s(struct platform_device *pdev) { + unsigned int base; + /* configure GPIO for i2s port */ switch (pdev->id) { case 1: - s3c_gpio_cfgpin(S5P6442_GPC1(0), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6442_GPC1(1), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6442_GPC1(2), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6442_GPC1(3), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6442_GPC1(4), S3C_GPIO_SFN(2)); + base = S5P6442_GPC1(0); break; case -1: - s3c_gpio_cfgpin(S5P6442_GPC0(0), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6442_GPC0(1), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6442_GPC0(2), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6442_GPC0(3), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6442_GPC0(4), S3C_GPIO_SFN(2)); + base = S5P6442_GPC0(0); break; default: @@ -44,6 +38,7 @@ static int s5p6442_cfg_i2s(struct platform_device *pdev) return -EINVAL; } + s3c_gpio_cfgpin_range(base, 5, S3C_GPIO_SFN(2)); return 0; } @@ -111,21 +106,15 @@ struct platform_device s5p6442_device_iis1 = { static int s5p6442_pcm_cfg_gpio(struct platform_device *pdev) { + unsigned int base; + switch (pdev->id) { case 0: - s3c_gpio_cfgpin(S5P6442_GPC0(0), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S5P6442_GPC0(1), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S5P6442_GPC0(2), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S5P6442_GPC0(3), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S5P6442_GPC0(4), S3C_GPIO_SFN(3)); + base = S5P6442_GPC0(0); break; case 1: - s3c_gpio_cfgpin(S5P6442_GPC1(0), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S5P6442_GPC1(1), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S5P6442_GPC1(2), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S5P6442_GPC1(3), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S5P6442_GPC1(4), S3C_GPIO_SFN(3)); + base = S5P6442_GPC1(0); break; default: @@ -133,6 +122,7 @@ static int s5p6442_pcm_cfg_gpio(struct platform_device *pdev) return -EINVAL; } + s3c_gpio_cfgpin_range(base, 5, S3C_GPIO_SFN(3)); return 0; } diff --git a/arch/arm/mach-s5p6442/dev-spi.c b/arch/arm/mach-s5p6442/dev-spi.c index e894651a88b..547c570f689 100644 --- a/arch/arm/mach-s5p6442/dev-spi.c +++ b/arch/arm/mach-s5p6442/dev-spi.c @@ -38,8 +38,7 @@ static int s5p6442_spi_cfg_gpio(struct platform_device *pdev) switch (pdev->id) { case 0: s3c_gpio_cfgpin(S5P6442_GPB(0), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6442_GPB(2), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6442_GPB(3), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5P6442_GPB(2), 2, S3C_GPIO_SFN(2)); s3c_gpio_setpull(S5P6442_GPB(0), S3C_GPIO_PULL_UP); s3c_gpio_setpull(S5P6442_GPB(2), S3C_GPIO_PULL_UP); s3c_gpio_setpull(S5P6442_GPB(3), S3C_GPIO_PULL_UP); -- cgit v1.2.3-70-g09d2 From af94e5771a1f5eab3cb7c222c12ec116cb358f62 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 1 Oct 2010 13:45:54 +0900 Subject: ARM: S5P64X0: Change to using s3c_gpio_cfgpin_range() Change the code setting ranges of GPIO pins using s3c_gpio_cfgpin() to use the recently introduced s3c_gpio_cfgpin_range(). Signed-off-by: Ben Dooks [kgene.kim@samsung.com: modified to s5p64x0 from s5p6440] Signed-off-by: Kukjin Kim --- arch/arm/mach-s5p64x0/dev-audio.c | 26 +++++++------------------- 1 file changed, 7 insertions(+), 19 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-s5p64x0/dev-audio.c b/arch/arm/mach-s5p64x0/dev-audio.c index fa097bd68ca..396bacc0a39 100644 --- a/arch/arm/mach-s5p64x0/dev-audio.c +++ b/arch/arm/mach-s5p64x0/dev-audio.c @@ -24,13 +24,8 @@ static int s5p6440_cfg_i2s(struct platform_device *pdev) /* configure GPIO for i2s port */ switch (pdev->id) { case -1: - s3c_gpio_cfgpin(S5P6440_GPR(4), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5P6440_GPR(5), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(5)); + s3c_gpio_cfgpin_range(S5P6440_GPR(4), 5, S3C_GPIO_SFN(5)); + s3c_gpio_cfgpin_range(S5P6440_GPR(13), 2, S3C_GPIO_SFN(5)); break; default: @@ -47,13 +42,9 @@ static int s5p6450_cfg_i2s(struct platform_device *pdev) switch (pdev->id) { case -1: s3c_gpio_cfgpin(S5P6450_GPB(4), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5P6450_GPR(4), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5P6450_GPR(5), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5P6450_GPR(6), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5P6450_GPR(7), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5P6450_GPR(8), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5P6450_GPR(13), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5P6450_GPR(14), S3C_GPIO_SFN(5)); + s3c_gpio_cfgpin_range(S5P6450_GPR(4), 5, S3C_GPIO_SFN(5)); + s3c_gpio_cfgpin_range(S5P6450_GPR(13), 2, S3C_GPIO_SFN(5)); + break; default: @@ -116,11 +107,8 @@ static int s5p6440_pcm_cfg_gpio(struct platform_device *pdev) { switch (pdev->id) { case 0: - s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5P6440_GPR(6), 3, S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5P6440_GPR(13), 2, S3C_GPIO_SFN(2)); break; default: -- cgit v1.2.3-70-g09d2 From d5e8123bbb34f61c80c79fc7c2c2bc5336aa1166 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Fri, 1 Oct 2010 15:46:36 +0900 Subject: ARM: S5P64X0: 2nd Change to using s3c_gpio_cfgpin_range() This patch changes the code setting ranges of GPIO pins in mach-s5p64x0 using s3c_gpio_cfgpin() to use the recently introduced s3c_gpio_cfgpin_range(). NOTE: This is for missed things from the previous patch. Signed-off-by: Kukjin Kim --- arch/arm/mach-s5p64x0/dev-spi.c | 24 ++++++++++++------------ arch/arm/mach-s5p64x0/setup-i2c0.c | 6 ++---- arch/arm/mach-s5p64x0/setup-i2c1.c | 6 ++---- 3 files changed, 16 insertions(+), 20 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-s5p64x0/dev-spi.c b/arch/arm/mach-s5p64x0/dev-spi.c index 5b69ec4c8af..be64fee2050 100644 --- a/arch/arm/mach-s5p64x0/dev-spi.c +++ b/arch/arm/mach-s5p64x0/dev-spi.c @@ -39,20 +39,18 @@ static char *s5p64x0_spi_src_clks[] = { */ static int s5p6440_spi_cfg_gpio(struct platform_device *pdev) { + unsigned int base; + switch (pdev->id) { case 0: - s3c_gpio_cfgpin(S5P6440_GPC(0), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6440_GPC(1), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6440_GPC(2), S3C_GPIO_SFN(2)); + base = S5P6440_GPC(0); s3c_gpio_setpull(S5P6440_GPC(0), S3C_GPIO_PULL_UP); s3c_gpio_setpull(S5P6440_GPC(1), S3C_GPIO_PULL_UP); s3c_gpio_setpull(S5P6440_GPC(2), S3C_GPIO_PULL_UP); break; case 1: - s3c_gpio_cfgpin(S5P6440_GPC(4), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6440_GPC(5), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6440_GPC(6), S3C_GPIO_SFN(2)); + base = S5P6440_GPC(4); s3c_gpio_setpull(S5P6440_GPC(4), S3C_GPIO_PULL_UP); s3c_gpio_setpull(S5P6440_GPC(5), S3C_GPIO_PULL_UP); s3c_gpio_setpull(S5P6440_GPC(6), S3C_GPIO_PULL_UP); @@ -63,25 +61,25 @@ static int s5p6440_spi_cfg_gpio(struct platform_device *pdev) return -EINVAL; } + s3c_gpio_cfgpin_range(base, 3, S3C_GPIO_SFN(2)); + return 0; } static int s5p6450_spi_cfg_gpio(struct platform_device *pdev) { + unsigned int base; + switch (pdev->id) { case 0: - s3c_gpio_cfgpin(S5P6450_GPC(0), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6450_GPC(1), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6450_GPC(2), S3C_GPIO_SFN(2)); + base = S5P6450_GPC(0); s3c_gpio_setpull(S5P6450_GPC(0), S3C_GPIO_PULL_UP); s3c_gpio_setpull(S5P6450_GPC(1), S3C_GPIO_PULL_UP); s3c_gpio_setpull(S5P6450_GPC(2), S3C_GPIO_PULL_UP); break; case 1: - s3c_gpio_cfgpin(S5P6450_GPC(4), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6450_GPC(5), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6450_GPC(6), S3C_GPIO_SFN(2)); + base = S5P6450_GPC(4); s3c_gpio_setpull(S5P6450_GPC(4), S3C_GPIO_PULL_UP); s3c_gpio_setpull(S5P6450_GPC(5), S3C_GPIO_PULL_UP); s3c_gpio_setpull(S5P6450_GPC(6), S3C_GPIO_PULL_UP); @@ -92,6 +90,8 @@ static int s5p6450_spi_cfg_gpio(struct platform_device *pdev) return -EINVAL; } + s3c_gpio_cfgpin_range(base, 3, S3C_GPIO_SFN(2)); + return 0; } diff --git a/arch/arm/mach-s5p64x0/setup-i2c0.c b/arch/arm/mach-s5p64x0/setup-i2c0.c index dc4cc65a501..75ef9e51b20 100644 --- a/arch/arm/mach-s5p64x0/setup-i2c0.c +++ b/arch/arm/mach-s5p64x0/setup-i2c0.c @@ -25,17 +25,15 @@ struct platform_device; /* don't need the contents */ void s5p6440_i2c0_cfg_gpio(struct platform_device *dev) { - s3c_gpio_cfgpin(S5P6440_GPB(5), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5P6440_GPB(5), 2, S3C_GPIO_SFN(2)); s3c_gpio_setpull(S5P6440_GPB(5), S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(S5P6440_GPB(6), S3C_GPIO_SFN(2)); s3c_gpio_setpull(S5P6440_GPB(6), S3C_GPIO_PULL_UP); } void s5p6450_i2c0_cfg_gpio(struct platform_device *dev) { - s3c_gpio_cfgpin(S5P6450_GPB(5), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5P6450_GPB(5), 2, S3C_GPIO_SFN(2)); s3c_gpio_setpull(S5P6450_GPB(5), S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(S5P6450_GPB(6), S3C_GPIO_SFN(2)); s3c_gpio_setpull(S5P6450_GPB(6), S3C_GPIO_PULL_UP); } diff --git a/arch/arm/mach-s5p64x0/setup-i2c1.c b/arch/arm/mach-s5p64x0/setup-i2c1.c index 2edd7912f8e..5d5dd3c4edb 100644 --- a/arch/arm/mach-s5p64x0/setup-i2c1.c +++ b/arch/arm/mach-s5p64x0/setup-i2c1.c @@ -25,17 +25,15 @@ struct platform_device; /* don't need the contents */ void s5p6440_i2c1_cfg_gpio(struct platform_device *dev) { - s3c_gpio_cfgpin(S5P6440_GPR(9), S3C_GPIO_SFN(6)); + s3c_gpio_cfgpin_range(S5P6440_GPR(9), 2, S3C_GPIO_SFN(6)); s3c_gpio_setpull(S5P6440_GPR(9), S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(S5P6440_GPR(10), S3C_GPIO_SFN(6)); s3c_gpio_setpull(S5P6440_GPR(10), S3C_GPIO_PULL_UP); } void s5p6450_i2c1_cfg_gpio(struct platform_device *dev) { - s3c_gpio_cfgpin(S5P6450_GPR(9), S3C_GPIO_SFN(6)); + s3c_gpio_cfgpin_range(S5P6450_GPR(9), 2, S3C_GPIO_SFN(6)); s3c_gpio_setpull(S5P6450_GPR(9), S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(S5P6450_GPR(10), S3C_GPIO_SFN(6)); s3c_gpio_setpull(S5P6450_GPR(10), S3C_GPIO_PULL_UP); } -- cgit v1.2.3-70-g09d2 From ce8f9abd62e3c9fb21d6cea96a07f42ed5e008ce Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 1 Oct 2010 14:20:55 +0900 Subject: ARM: S5PC100: Change to using s3c_gpio_cfgpin_range() Change the code setting ranges of GPIO pins using s3c_gpio_cfgpin() to use the recently introduced s3c_gpio_cfgpin_range(). Signed-off-by: Ben Dooks [kgene.kim@samsung.com: Fixed wrong change] Signed-off-by: Kukjin Kim --- arch/arm/mach-s5pc100/dev-audio.c | 32 +++++--------------------------- arch/arm/mach-s5pc100/dev-spi.c | 11 +++-------- arch/arm/mach-s5pc100/setup-sdhci-gpio.c | 15 ++++++--------- 3 files changed, 14 insertions(+), 44 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-s5pc100/dev-audio.c b/arch/arm/mach-s5pc100/dev-audio.c index a699ed6acc2..7f6d01e74b8 100644 --- a/arch/arm/mach-s5pc100/dev-audio.c +++ b/arch/arm/mach-s5pc100/dev-audio.c @@ -24,19 +24,11 @@ static int s5pc100_cfg_i2s(struct platform_device *pdev) /* configure GPIO for i2s port */ switch (pdev->id) { case 1: - s3c_gpio_cfgpin(S5PC100_GPC(0), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PC100_GPC(1), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PC100_GPC(2), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PC100_GPC(3), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PC100_GPC(4), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5PC100_GPC(0), 5, S3C_GPIO_SFN(2)); break; case 2: - s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S5PC100_GPG3(1), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S5PC100_GPG3(2), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S5PC100_GPG3(3), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S5PC100_GPG3(4), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin_range(S5PC100_GPG3(0), 5, S3C_GPIO_SFN(4)); break; case -1: /* Dedicated pins */ @@ -144,19 +136,11 @@ static int s5pc100_pcm_cfg_gpio(struct platform_device *pdev) { switch (pdev->id) { case 0: - s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5PC100_GPG3(1), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5PC100_GPG3(2), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5PC100_GPG3(3), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5PC100_GPG3(4), S3C_GPIO_SFN(5)); + s3c_gpio_cfgpin_range(S5PC100_GPG3(0), 5, S3C_GPIO_SFN(5)); break; case 1: - s3c_gpio_cfgpin(S5PC100_GPC(0), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S5PC100_GPC(1), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S5PC100_GPC(2), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S5PC100_GPC(3), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S5PC100_GPC(4), S3C_GPIO_SFN(3)); + s3c_gpio_cfgpin_range(S5PC100_GPC(0), 5, S3C_GPIO_SFN(3)); break; default: @@ -231,13 +215,7 @@ struct platform_device s5pc100_device_pcm1 = { static int s5pc100_ac97_cfg_gpio(struct platform_device *pdev) { - s3c_gpio_cfgpin(S5PC100_GPC(0), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S5PC100_GPC(1), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S5PC100_GPC(2), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S5PC100_GPC(3), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S5PC100_GPC(4), S3C_GPIO_SFN(4)); - - return 0; + return s3c_gpio_cfgpin_range(S5PC100_GPC(0), 5, S3C_GPIO_SFN(4)); } static struct resource s5pc100_ac97_resource[] = { diff --git a/arch/arm/mach-s5pc100/dev-spi.c b/arch/arm/mach-s5pc100/dev-spi.c index a0ef7c302c1..c1c5aed0791 100644 --- a/arch/arm/mach-s5pc100/dev-spi.c +++ b/arch/arm/mach-s5pc100/dev-spi.c @@ -38,18 +38,14 @@ static int s5pc100_spi_cfg_gpio(struct platform_device *pdev) { switch (pdev->id) { case 0: - s3c_gpio_cfgpin(S5PC100_GPB(0), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PC100_GPB(1), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PC100_GPB(2), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5PC100_GPB(0), 3, S3C_GPIO_SFN(2)); s3c_gpio_setpull(S5PC100_GPB(0), S3C_GPIO_PULL_UP); s3c_gpio_setpull(S5PC100_GPB(1), S3C_GPIO_PULL_UP); s3c_gpio_setpull(S5PC100_GPB(2), S3C_GPIO_PULL_UP); break; case 1: - s3c_gpio_cfgpin(S5PC100_GPB(4), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PC100_GPB(5), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PC100_GPB(6), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5PC100_GPB(4), 3, S3C_GPIO_SFN(2)); s3c_gpio_setpull(S5PC100_GPB(4), S3C_GPIO_PULL_UP); s3c_gpio_setpull(S5PC100_GPB(5), S3C_GPIO_PULL_UP); s3c_gpio_setpull(S5PC100_GPB(6), S3C_GPIO_PULL_UP); @@ -57,8 +53,7 @@ static int s5pc100_spi_cfg_gpio(struct platform_device *pdev) case 2: s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S5PC100_GPG3(2), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S5PC100_GPG3(3), S3C_GPIO_SFN(3)); + s3c_gpio_cfgpin_range(S5PC100_GPB(2), 2, S3C_GPIO_SFN(3)); s3c_gpio_setpull(S5PC100_GPG3(0), S3C_GPIO_PULL_UP); s3c_gpio_setpull(S5PC100_GPG3(2), S3C_GPIO_PULL_UP); s3c_gpio_setpull(S5PC100_GPG3(3), S3C_GPIO_PULL_UP); diff --git a/arch/arm/mach-s5pc100/setup-sdhci-gpio.c b/arch/arm/mach-s5pc100/setup-sdhci-gpio.c index dc7208c639e..79b031f5f43 100644 --- a/arch/arm/mach-s5pc100/setup-sdhci-gpio.c +++ b/arch/arm/mach-s5pc100/setup-sdhci-gpio.c @@ -37,10 +37,9 @@ void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) end = S5PC100_GPG0(2 + num); /* Set all the necessary GPG0/GPG1 pins to special-function 0 */ - for (gpio = S5PC100_GPG0(0); gpio < end; gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5PC100_GPG0(0), 2 + num, S3C_GPIO_SFN(2)); + for (gpio = S5PC100_GPG0(0); gpio < end; gpio++) s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } if (width == 8) { for (gpio = S5PC100_GPG1(0); gpio <= S5PC100_GPG1(1); gpio++) { @@ -64,10 +63,9 @@ void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) end = S5PC100_GPG2(2 + width); /* Set all the necessary GPG2 pins to special-function 2 */ - for (gpio = S5PC100_GPG2(0); gpio < end; gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5PC100_GPG2(0), 2 + width, S3C_GPIO_SFN(2)); + for (gpio = S5PC100_GPG2(0); gpio < end; gpio++) s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S5PC100_GPG2(6), S3C_GPIO_PULL_UP); @@ -84,10 +82,9 @@ void s5pc100_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) end = S5PC100_GPG3(2 + width); /* Set all the necessary GPG3 pins to special-function 2 */ - for (gpio = S5PC100_GPG3(0); gpio < end; gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5PC100_GPG3(0), 2 + width, S3C_GPIO_SFN(2)); + for (gpio = S5PC100_GPG3(0); gpio < end; gpio++) s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S5PC100_GPG3(6), S3C_GPIO_PULL_UP); -- cgit v1.2.3-70-g09d2 From 64c5bd841b5789e118f358b684090585f14be6cf Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 1 Oct 2010 14:27:31 +0900 Subject: ARM: S5PV210: Change to using s3c_gpio_cfgpin_range() Change the code setting ranges of GPIO pins using s3c_gpio_cfgpin() to use the recently introduced s3c_gpio_cfgpin_range(). Signed-off-by: Ben Dooks [kgene.kim@samsung.com: coding-style fixes] Signed-off-by: Kukjin Kim --- arch/arm/mach-s5pv210/dev-audio.c | 46 +++++---------------------- arch/arm/mach-s5pv210/setup-sdhci-gpio.c | 53 +++++++++++++------------------- 2 files changed, 29 insertions(+), 70 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-s5pv210/dev-audio.c b/arch/arm/mach-s5pv210/dev-audio.c index 21dc6cf955c..b274b6be7bd 100644 --- a/arch/arm/mach-s5pv210/dev-audio.c +++ b/arch/arm/mach-s5pv210/dev-audio.c @@ -24,29 +24,15 @@ static int s5pv210_cfg_i2s(struct platform_device *pdev) /* configure GPIO for i2s port */ switch (pdev->id) { case 1: - s3c_gpio_cfgpin(S5PV210_GPC0(0), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PV210_GPC0(1), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PV210_GPC0(2), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PV210_GPC0(3), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PV210_GPC0(4), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5PV210_GPC0(0), 5, S3C_GPIO_SFN(2)); break; case 2: - s3c_gpio_cfgpin(S5PV210_GPC1(0), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S5PV210_GPC1(1), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S5PV210_GPC1(2), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S5PV210_GPC1(3), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S5PV210_GPC1(4), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin_range(S5PV210_GPC1(0), 5, S3C_GPIO_SFN(4)); break; case -1: - s3c_gpio_cfgpin(S5PV210_GPI(0), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PV210_GPI(1), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PV210_GPI(2), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PV210_GPI(3), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PV210_GPI(4), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PV210_GPI(5), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PV210_GPI(6), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5PV210_GPI(0), 7, S3C_GPIO_SFN(2)); break; default: @@ -151,25 +137,13 @@ static int s5pv210_pcm_cfg_gpio(struct platform_device *pdev) { switch (pdev->id) { case 0: - s3c_gpio_cfgpin(S5PV210_GPI(0), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S5PV210_GPI(1), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S5PV210_GPI(2), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S5PV210_GPI(3), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S5PV210_GPI(4), S3C_GPIO_SFN(3)); + s3c_gpio_cfgpin_range(S5PV210_GPI(0), 5, S3C_GPIO_SFN(3)); break; case 1: - s3c_gpio_cfgpin(S5PV210_GPC0(0), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S5PV210_GPC0(1), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S5PV210_GPC0(2), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S5PV210_GPC0(3), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S5PV210_GPC0(4), S3C_GPIO_SFN(3)); + s3c_gpio_cfgpin_range(S5PV210_GPC0(0), 5, S3C_GPIO_SFN(3)); break; case 2: - s3c_gpio_cfgpin(S5PV210_GPC1(0), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PV210_GPC1(1), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PV210_GPC1(2), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PV210_GPC1(3), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PV210_GPC1(4), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5PV210_GPC1(0), 5, S3C_GPIO_SFN(2)); break; default: printk(KERN_DEBUG "Invalid PCM Controller number!"); @@ -271,13 +245,7 @@ struct platform_device s5pv210_device_pcm2 = { static int s5pv210_ac97_cfg_gpio(struct platform_device *pdev) { - s3c_gpio_cfgpin(S5PV210_GPC0(0), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S5PV210_GPC0(1), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S5PV210_GPC0(2), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S5PV210_GPC0(3), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S5PV210_GPC0(4), S3C_GPIO_SFN(4)); - - return 0; + return s3c_gpio_cfgpin_range(S5PV210_GPC0(0), 5, S3C_GPIO_SFN(4)); } static struct resource s5pv210_ac97_resource[] = { diff --git a/arch/arm/mach-s5pv210/setup-sdhci-gpio.c b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c index b18587b1ec5..706427837d8 100644 --- a/arch/arm/mach-s5pv210/setup-sdhci-gpio.c +++ b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c @@ -29,23 +29,21 @@ void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) unsigned int gpio; /* Set all the necessary GPG0/GPG1 pins to special-function 2 */ - for (gpio = S5PV210_GPG0(0); gpio < S5PV210_GPG0(2); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5PV210_GPG0(0), 2, S3C_GPIO_SFN(2)); + for (gpio = S5PV210_GPG0(0); gpio < S5PV210_GPG0(2); gpio++) s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } + switch (width) { case 8: /* GPG1[3:6] special-funtion 3 */ - for (gpio = S5PV210_GPG1(3); gpio <= S5PV210_GPG1(6); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); + s3c_gpio_cfgpin_range(S5PV210_GPG1(3), 4, S3C_GPIO_SFN(3)); + for (gpio = S5PV210_GPG1(3); gpio <= S5PV210_GPG1(6); gpio++) s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } case 4: /* GPG0[3:6] special-funtion 2 */ - for (gpio = S5PV210_GPG0(3); gpio <= S5PV210_GPG0(6); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5PV210_GPG0(3), 4, S3C_GPIO_SFN(2)); + for (gpio = S5PV210_GPG0(3); gpio <= S5PV210_GPG0(6); gpio++) s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } default: break; } @@ -62,16 +60,14 @@ void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) unsigned int gpio; /* Set all the necessary GPG1[0:1] pins to special-function 2 */ - for (gpio = S5PV210_GPG1(0); gpio < S5PV210_GPG1(2); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5PV210_GPG1(0), 2, S3C_GPIO_SFN(2)); + for (gpio = S5PV210_GPG1(0); gpio < S5PV210_GPG1(2); gpio++) s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } /* Data pin GPG1[3:6] to special-function 2 */ - for (gpio = S5PV210_GPG1(3); gpio <= S5PV210_GPG1(6); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5PV210_GPG1(3), 4, S3C_GPIO_SFN(2)); + for (gpio = S5PV210_GPG1(3); gpio <= S5PV210_GPG1(6); gpio++) s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S5PV210_GPG1(2), S3C_GPIO_PULL_UP); @@ -85,24 +81,21 @@ void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) unsigned int gpio; /* Set all the necessary GPG2[0:1] pins to special-function 2 */ - for (gpio = S5PV210_GPG2(0); gpio < S5PV210_GPG2(2); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5PV210_GPG2(0), 2, S3C_GPIO_SFN(2)); + for (gpio = S5PV210_GPG2(0); gpio < S5PV210_GPG2(2); gpio++) s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } switch (width) { case 8: /* Data pin GPG3[3:6] to special-function 3 */ - for (gpio = S5PV210_GPG3(3); gpio <= S5PV210_GPG3(6); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); + s3c_gpio_cfgpin_range(S5PV210_GPG3(3), 4, S3C_GPIO_SFN(3)); + for (gpio = S5PV210_GPG3(3); gpio <= S5PV210_GPG3(6); gpio++) s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } case 4: /* Data pin GPG2[3:6] to special-function 2 */ - for (gpio = S5PV210_GPG2(3); gpio <= S5PV210_GPG2(6); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5PV210_GPG2(3), 4, S3C_GPIO_SFN(2)); + for (gpio = S5PV210_GPG2(3); gpio <= S5PV210_GPG2(6); gpio++) s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } default: break; } @@ -118,17 +111,15 @@ void s5pv210_setup_sdhci3_cfg_gpio(struct platform_device *dev, int width) struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; unsigned int gpio; - /* Set all the necessary GPG3[0:2] pins to special-function 2 */ - for (gpio = S5PV210_GPG3(0); gpio < S5PV210_GPG3(2); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); + /* Set all the necessary GPG3[0:1] pins to special-function 2 */ + s3c_gpio_cfgpin_range(S5PV210_GPG3(0), 2, S3C_GPIO_SFN(2)); + for (gpio = S5PV210_GPG3(0); gpio < S5PV210_GPG3(2); gpio++) s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } /* Data pin GPG3[3:6] to special-function 2 */ - for (gpio = S5PV210_GPG3(3); gpio <= S5PV210_GPG3(6); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5PV210_GPG3(3), 4, S3C_GPIO_SFN(2)); + for (gpio = S5PV210_GPG3(3); gpio <= S5PV210_GPG3(6); gpio++) s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S5PV210_GPG3(2), S3C_GPIO_PULL_UP); -- cgit v1.2.3-70-g09d2 From ce5d3ac1f57b7a4ff28c57ebef709b8f9fd30fab Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Fri, 1 Oct 2010 16:05:07 +0900 Subject: ARM: S5PV310: Change to using s3c_gpio_cfgpin_range() This patch changes the code setting ranges of GPIO pins in mach-s5pv310 using s3c_gpio_cfgpin() to use the recently introduced s3c_gpio_cfgpin_range(). Signed-off-by: Kukjin Kim --- arch/arm/mach-s5pv310/setup-i2c0.c | 3 +-- arch/arm/mach-s5pv310/setup-i2c1.c | 3 +-- arch/arm/mach-s5pv310/setup-i2c2.c | 3 +-- 3 files changed, 3 insertions(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-s5pv310/setup-i2c0.c b/arch/arm/mach-s5pv310/setup-i2c0.c index 43671280738..17c54c89e73 100644 --- a/arch/arm/mach-s5pv310/setup-i2c0.c +++ b/arch/arm/mach-s5pv310/setup-i2c0.c @@ -21,8 +21,7 @@ struct platform_device; /* don't need the contents */ void s3c_i2c0_cfg_gpio(struct platform_device *dev) { - s3c_gpio_cfgpin(S5PV310_GPD1(0), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5PV310_GPD1(0), 2, S3C_GPIO_SFN(2)); s3c_gpio_setpull(S5PV310_GPD1(0), S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(S5PV310_GPD1(1), S3C_GPIO_SFN(2)); s3c_gpio_setpull(S5PV310_GPD1(1), S3C_GPIO_PULL_UP); } diff --git a/arch/arm/mach-s5pv310/setup-i2c1.c b/arch/arm/mach-s5pv310/setup-i2c1.c index 1ecd5bc35b5..1740c9f0371 100644 --- a/arch/arm/mach-s5pv310/setup-i2c1.c +++ b/arch/arm/mach-s5pv310/setup-i2c1.c @@ -18,8 +18,7 @@ struct platform_device; /* don't need the contents */ void s3c_i2c1_cfg_gpio(struct platform_device *dev) { - s3c_gpio_cfgpin(S5PV310_GPD1(2), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5PV310_GPD1(2), 2, S3C_GPIO_SFN(2)); s3c_gpio_setpull(S5PV310_GPD1(2), S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(S5PV310_GPD1(3), S3C_GPIO_SFN(2)); s3c_gpio_setpull(S5PV310_GPD1(3), S3C_GPIO_PULL_UP); } diff --git a/arch/arm/mach-s5pv310/setup-i2c2.c b/arch/arm/mach-s5pv310/setup-i2c2.c index 4c0d8def660..860f77beec5 100644 --- a/arch/arm/mach-s5pv310/setup-i2c2.c +++ b/arch/arm/mach-s5pv310/setup-i2c2.c @@ -18,8 +18,7 @@ struct platform_device; /* don't need the contents */ void s3c_i2c2_cfg_gpio(struct platform_device *dev) { - s3c_gpio_cfgpin(S5PV310_GPA0(6), S3C_GPIO_SFN(3)); + s3c_gpio_cfgpin_range(S5PV310_GPA0(6), 2, S3C_GPIO_SFN(3)); s3c_gpio_setpull(S5PV310_GPA0(6), S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(S5PV310_GPA0(7), S3C_GPIO_SFN(3)); s3c_gpio_setpull(S5PV310_GPA0(7), S3C_GPIO_PULL_UP); } -- cgit v1.2.3-70-g09d2 From 5459148b098e3bbdc24376f1865045189a80a0af Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 1 Oct 2010 16:34:34 +0900 Subject: ARM: SAMSUNG: Add s3c_gpio_cfgall_range() function Add a function to configure a range of GPIOs function and pull in one go, mainly for the SDHCI and framebuffer helpers which tend to do this. Signed-off-by: Ben Dooks [kgene.kim@samsung.com: Fix small comments] Signed-off-by: Kukjin Kim --- arch/arm/plat-samsung/gpio-config.c | 16 ++++++++++++++++ arch/arm/plat-samsung/include/plat/gpio-cfg.h | 19 +++++++++++++++++++ 2 files changed, 35 insertions(+) (limited to 'arch') diff --git a/arch/arm/plat-samsung/gpio-config.c b/arch/arm/plat-samsung/gpio-config.c index fa180dcc41c..8a372110a85 100644 --- a/arch/arm/plat-samsung/gpio-config.c +++ b/arch/arm/plat-samsung/gpio-config.c @@ -56,6 +56,22 @@ int s3c_gpio_cfgpin_range(unsigned int start, unsigned int nr, } EXPORT_SYMBOL_GPL(s3c_gpio_cfgpin_range); +int s3c_gpio_cfgall_range(unsigned int start, unsigned int nr, + unsigned int cfg, s3c_gpio_pull_t pull) +{ + int ret; + + for (; nr > 0; nr--, start++) { + s3c_gpio_setpull(start, pull); + ret = s3c_gpio_cfgpin(start, cfg); + if (ret != 0) + return ret; + } + + return 0; +} +EXPORT_SYMBOL_GPL(s3c_gpio_cfgall_range); + unsigned s3c_gpio_getcfg(unsigned int pin) { struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin); diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h index 6e117dc2709..c84defd2950 100644 --- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h +++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h @@ -153,6 +153,25 @@ extern int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull); */ extern s3c_gpio_pull_t s3c_gpio_getpull(unsigned int pin); +/* configure `all` aspects of an gpio */ + +/** + * s3c_gpio_cfgall_range() - configure range of gpio functtion and pull. + * @start: The gpio number to start at. + * @nr: The number of gpio to configure from @start. + * @cfg: The configuration to use + * @pull: The pull setting to use. + * + * Run s3c_gpio_cfgpin() and s3c_gpio_setpull() over the gpio range starting + * @gpio and running for @size. + * + * @sa s3c_gpio_cfgpin + * @sa s3c_gpio_setpull + * @sa s3c_gpio_cfgpin_range + */ +extern int s3c_gpio_cfgall_range(unsigned int start, unsigned int nr, + unsigned int cfg, s3c_gpio_pull_t pull); + /* Define values for the drvstr available for each gpio pin. * * These values control the value of the output signal driver strength, -- cgit v1.2.3-70-g09d2 From dab30d7f80d7a81ac736c590a81249d2fd323c62 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 1 Oct 2010 16:39:15 +0900 Subject: ARM: S3C64XX: Change to using s3c_gpio_cfgall_range() Change the code setting a range of GPIO pins' configuration and pull state to use the recently introduced s3c_gpio_cfgall_range(). Mop up a few missed s3c_gpio_cfgpin_range() changes. Signed-off-by: Ben Dooks [kgene.kim@samsung.com: Fix small comments] Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c64xx/setup-fb-24bpp.c | 14 +++------- arch/arm/mach-s3c64xx/setup-sdhci-gpio.c | 45 +++++++++----------------------- 2 files changed, 16 insertions(+), 43 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c index 000736877df..3b0dd124d49 100644 --- a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c +++ b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c @@ -23,15 +23,9 @@ extern void s3c64xx_fb_gpio_setup_24bpp(void) { - unsigned int gpio; + s3c_gpio_cfgall_range(S3C64XX_GPI(0), 16, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); - for (gpio = S3C64XX_GPI(0); gpio <= S3C64XX_GPI(15); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } - - for (gpio = S3C64XX_GPJ(0); gpio <= S3C64XX_GPJ(11); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } + s3c_gpio_cfgall_range(S3C64XX_GPJ(0), 12, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); } diff --git a/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c b/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c index 0655c7a9bd3..4262f78a93c 100644 --- a/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c +++ b/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c @@ -24,16 +24,10 @@ void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) { struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; - unsigned int gpio; - unsigned int end; - end = S3C64XX_GPG(2 + width); - - /* Set all the necessary GPG pins to special-function 0 */ - s3c_gpio_cfgpin_range(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2)); - for (gpio = S3C64XX_GPG(0); gpio < end; gpio++) { - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } + /* Set all the necessary GPG pins to special-function 2 */ + s3c_gpio_cfgall_range(S3C64XX_GPG(0), 2 + width, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); @@ -44,16 +38,10 @@ void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) { struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; - unsigned int gpio; - unsigned int end; - end = S3C64XX_GPH(2 + width); - - /* Set all the necessary GPG pins to special-function 0 */ - s3c_gpio_cfgpin_range(S3C64XX_GPH(0), 2 + width, S3C_GPIO_SFN(2)); - for (gpio = S3C64XX_GPH(0); gpio < end; gpio++) { - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } + /* Set all the necessary GPH pins to special-function 2 */ + s3c_gpio_cfgall_range(S3C64XX_GPH(0), 2 + width, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); @@ -63,20 +51,11 @@ void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) { - unsigned int gpio; - unsigned int end; + /* Set all the necessary GPH pins to special-function 3 */ + s3c_gpio_cfgall_range(S3C64XX_GPH(6), width, + S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE); - end = S3C64XX_GPH(6 + width); - - /* Set all the necessary GPH pins to special-function 1 */ - s3c_gpio_cfgpin_range(S3C64XX_GPH(6), width, S3C_GPIO_SFN(3)); - for (gpio = S3C64XX_GPH(6); gpio < end; gpio++) { - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } - - /* Set all the necessary GPC pins to special-function 1 */ - s3c_gpio_cfgpin_range(S3C64XX_GPC(4), 2, S3C_GPIO_SFN(3)); - for (gpio = S3C64XX_GPC(4); gpio < S3C64XX_GPC(6); gpio++) { - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } + /* Set all the necessary GPC pins to special-function 3 */ + s3c_gpio_cfgall_range(S3C64XX_GPC(4), 2, + S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE); } -- cgit v1.2.3-70-g09d2 From 7008147256eebdc30329bec95ebdf99a96684f79 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Fri, 1 Oct 2010 19:37:09 +0900 Subject: ARM: S5P6442: Change to using s3c_gpio_cfgall_range() Change the code setting a range of GPIO pins' configuration and pull state to use the recently introduced s3c_gpio_cfgall_range(). Signed-off-by: Kukjin Kim --- arch/arm/mach-s5p6442/dev-spi.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-s5p6442/dev-spi.c b/arch/arm/mach-s5p6442/dev-spi.c index 547c570f689..cce8c247070 100644 --- a/arch/arm/mach-s5p6442/dev-spi.c +++ b/arch/arm/mach-s5p6442/dev-spi.c @@ -38,10 +38,9 @@ static int s5p6442_spi_cfg_gpio(struct platform_device *pdev) switch (pdev->id) { case 0: s3c_gpio_cfgpin(S5P6442_GPB(0), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin_range(S5P6442_GPB(2), 2, S3C_GPIO_SFN(2)); s3c_gpio_setpull(S5P6442_GPB(0), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5P6442_GPB(2), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5P6442_GPB(3), S3C_GPIO_PULL_UP); + s3c_gpio_cfgall_range(S5P6442_GPB(2), 2, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); break; default: -- cgit v1.2.3-70-g09d2 From f90715f9f07abcfff3b994a0f5b7edf7a78a5aec Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Fri, 1 Oct 2010 18:39:38 +0900 Subject: ARM: S5P64X0: Change to using s3c_gpio_cfgall_range() Change the code setting a range of GPIO pins' configuration and pull state to use the recently introduced s3c_gpio_cfgall_range(). Mop up a few missed s3c_gpio_cfgpin_range() changes. Signed-off-by: Kukjin Kim --- arch/arm/mach-s5p64x0/dev-spi.c | 18 ++++-------------- arch/arm/mach-s5p64x0/setup-i2c0.c | 10 ++++------ 2 files changed, 8 insertions(+), 20 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-s5p64x0/dev-spi.c b/arch/arm/mach-s5p64x0/dev-spi.c index be64fee2050..e78ee18c76e 100644 --- a/arch/arm/mach-s5p64x0/dev-spi.c +++ b/arch/arm/mach-s5p64x0/dev-spi.c @@ -44,16 +44,10 @@ static int s5p6440_spi_cfg_gpio(struct platform_device *pdev) switch (pdev->id) { case 0: base = S5P6440_GPC(0); - s3c_gpio_setpull(S5P6440_GPC(0), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5P6440_GPC(1), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5P6440_GPC(2), S3C_GPIO_PULL_UP); break; case 1: base = S5P6440_GPC(4); - s3c_gpio_setpull(S5P6440_GPC(4), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5P6440_GPC(5), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5P6440_GPC(6), S3C_GPIO_PULL_UP); break; default: @@ -61,7 +55,8 @@ static int s5p6440_spi_cfg_gpio(struct platform_device *pdev) return -EINVAL; } - s3c_gpio_cfgpin_range(base, 3, S3C_GPIO_SFN(2)); + s3c_gpio_cfgall_range(base, 3, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); return 0; } @@ -73,16 +68,10 @@ static int s5p6450_spi_cfg_gpio(struct platform_device *pdev) switch (pdev->id) { case 0: base = S5P6450_GPC(0); - s3c_gpio_setpull(S5P6450_GPC(0), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5P6450_GPC(1), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5P6450_GPC(2), S3C_GPIO_PULL_UP); break; case 1: base = S5P6450_GPC(4); - s3c_gpio_setpull(S5P6450_GPC(4), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5P6450_GPC(5), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5P6450_GPC(6), S3C_GPIO_PULL_UP); break; default: @@ -90,7 +79,8 @@ static int s5p6450_spi_cfg_gpio(struct platform_device *pdev) return -EINVAL; } - s3c_gpio_cfgpin_range(base, 3, S3C_GPIO_SFN(2)); + s3c_gpio_cfgall_range(base, 3, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); return 0; } diff --git a/arch/arm/mach-s5p64x0/setup-i2c0.c b/arch/arm/mach-s5p64x0/setup-i2c0.c index 75ef9e51b20..46b463917c5 100644 --- a/arch/arm/mach-s5p64x0/setup-i2c0.c +++ b/arch/arm/mach-s5p64x0/setup-i2c0.c @@ -25,16 +25,14 @@ struct platform_device; /* don't need the contents */ void s5p6440_i2c0_cfg_gpio(struct platform_device *dev) { - s3c_gpio_cfgpin_range(S5P6440_GPB(5), 2, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5P6440_GPB(5), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5P6440_GPB(6), S3C_GPIO_PULL_UP); + s3c_gpio_cfgall_range(S5P6440_GPB(5), 2, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); } void s5p6450_i2c0_cfg_gpio(struct platform_device *dev) { - s3c_gpio_cfgpin_range(S5P6450_GPB(5), 2, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5P6450_GPB(5), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5P6450_GPB(6), S3C_GPIO_PULL_UP); + s3c_gpio_cfgall_range(S5P6450_GPB(5), 2, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); } void s3c_i2c0_cfg_gpio(struct platform_device *dev) { } -- cgit v1.2.3-70-g09d2 From a40af06655f97d88fc1b0fcc9b5f2a5c06a27a4a Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 1 Oct 2010 16:49:11 +0900 Subject: ARM: S5PC100: Change to using s3c_gpio_cfgall_range() Change the code setting a range of GPIO pins' configuration and pull state to use the recently introduced s3c_gpio_cfgall_range(). Mop up a few missed s3c_gpio_cfgpin_range() changes. Signed-off-by: Ben Dooks Signed-off-by: Kukjin Kim --- arch/arm/mach-s5pc100/setup-fb-24bpp.c | 30 ++++++++------------------ arch/arm/mach-s5pc100/setup-sdhci-gpio.c | 36 ++++++++------------------------ 2 files changed, 18 insertions(+), 48 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-s5pc100/setup-fb-24bpp.c b/arch/arm/mach-s5pc100/setup-fb-24bpp.c index 6eba6cb8e2f..5a882d46c3f 100644 --- a/arch/arm/mach-s5pc100/setup-fb-24bpp.c +++ b/arch/arm/mach-s5pc100/setup-fb-24bpp.c @@ -22,27 +22,15 @@ #define DISR_OFFSET 0x7008 -void s5pc100_fb_gpio_setup_24bpp(void) +static void s5pc100_fb_setgpios(unsigned int base, unsigned int nr) { - unsigned int gpio = 0; - - for (gpio = S5PC100_GPF0(0); gpio <= S5PC100_GPF0(7); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } - - for (gpio = S5PC100_GPF1(0); gpio <= S5PC100_GPF1(7); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } - - for (gpio = S5PC100_GPF2(0); gpio <= S5PC100_GPF2(7); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } + s3c_gpio_cfgall_range(base, nr, S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); +} - for (gpio = S5PC100_GPF3(0); gpio <= S5PC100_GPF3(3); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } +void s5pc100_fb_gpio_setup_24bpp(void) +{ + s5pc100_fb_setgpios(S5PC100_GPF0(0), 8); + s5pc100_fb_setgpios(S5PC100_GPF1(0), 8); + s5pc100_fb_setgpios(S5PC100_GPF2(0), 8); + s5pc100_fb_setgpios(S5PC100_GPF3(0), 4); } diff --git a/arch/arm/mach-s5pc100/setup-sdhci-gpio.c b/arch/arm/mach-s5pc100/setup-sdhci-gpio.c index 79b031f5f43..a8d22a7b158 100644 --- a/arch/arm/mach-s5pc100/setup-sdhci-gpio.c +++ b/arch/arm/mach-s5pc100/setup-sdhci-gpio.c @@ -25,8 +25,6 @@ void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) { struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; - unsigned int gpio; - unsigned int end; unsigned int num; num = width; @@ -34,19 +32,13 @@ void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) if (width == 8) num = width - 2; - end = S5PC100_GPG0(2 + num); - /* Set all the necessary GPG0/GPG1 pins to special-function 0 */ - s3c_gpio_cfgpin_range(S5PC100_GPG0(0), 2 + num, S3C_GPIO_SFN(2)); - for (gpio = S5PC100_GPG0(0); gpio < end; gpio++) - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); + s3c_gpio_cfgall_range(S5PC100_GPG0(0), 2 + num, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); - if (width == 8) { - for (gpio = S5PC100_GPG1(0); gpio <= S5PC100_GPG1(1); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } - } + if (width == 8) + s3c_gpio_cfgall_range(S5PC100_GPG1(0), 2, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S5PC100_GPG1(2), S3C_GPIO_PULL_UP); @@ -57,15 +49,10 @@ void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) { struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; - unsigned int gpio; - unsigned int end; - - end = S5PC100_GPG2(2 + width); /* Set all the necessary GPG2 pins to special-function 2 */ - s3c_gpio_cfgpin_range(S5PC100_GPG2(0), 2 + width, S3C_GPIO_SFN(2)); - for (gpio = S5PC100_GPG2(0); gpio < end; gpio++) - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); + s3c_gpio_cfgall_range(S5PC100_GPG2(0), 2 + width, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S5PC100_GPG2(6), S3C_GPIO_PULL_UP); @@ -76,15 +63,10 @@ void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) void s5pc100_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) { struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; - unsigned int gpio; - unsigned int end; - - end = S5PC100_GPG3(2 + width); /* Set all the necessary GPG3 pins to special-function 2 */ - s3c_gpio_cfgpin_range(S5PC100_GPG3(0), 2 + width, S3C_GPIO_SFN(2)); - for (gpio = S5PC100_GPG3(0); gpio < end; gpio++) - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); + s3c_gpio_cfgall_range(S5PC100_GPG3(0), 2 + width, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S5PC100_GPG3(6), S3C_GPIO_PULL_UP); -- cgit v1.2.3-70-g09d2 From 53134a740e3b9ce3c04e853e231a624bd4260480 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Thu, 27 May 2010 17:02:32 +0900 Subject: ARM: S5PV210: Change to using s3c_gpio_cfgall_range() Change the code setting a range of GPIO pins' configuration and pull state to use the recently introduced s3c_gpio_cfgall_range(). Mop up a few missed s3c_gpio_cfgpin_range() changes. Signed-off-by: Ben Dooks Signed-off-by: Kukjin Kim --- arch/arm/mach-s5pv210/setup-fb-24bpp.c | 34 +++++++------------- arch/arm/mach-s5pv210/setup-sdhci-gpio.c | 54 ++++++++++++-------------------- 2 files changed, 31 insertions(+), 57 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-s5pv210/setup-fb-24bpp.c b/arch/arm/mach-s5pv210/setup-fb-24bpp.c index 928cf1f125f..a33fe96191d 100644 --- a/arch/arm/mach-s5pv210/setup-fb-24bpp.c +++ b/arch/arm/mach-s5pv210/setup-fb-24bpp.c @@ -21,33 +21,21 @@ #include #include -void s5pv210_fb_gpio_setup_24bpp(void) +static void s5pv210_fb_cfg_gpios(unsigned int base, unsigned int nr) { - unsigned int gpio = 0; - - for (gpio = S5PV210_GPF0(0); gpio <= S5PV210_GPF0(7); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); - } + s3c_gpio_cfgall_range(base, nr, S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); - for (gpio = S5PV210_GPF1(0); gpio <= S5PV210_GPF1(7); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); - } + for (; nr > 0; nr--, base++) + s5p_gpio_set_drvstr(base, S5P_GPIO_DRVSTR_LV4); +} - for (gpio = S5PV210_GPF2(0); gpio <= S5PV210_GPF2(7); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); - } - for (gpio = S5PV210_GPF3(0); gpio <= S5PV210_GPF3(3); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); - } +void s5pv210_fb_gpio_setup_24bpp(void) +{ + s5pv210_fb_cfg_gpios(S5PV210_GPF0(0), 8); + s5pv210_fb_cfg_gpios(S5PV210_GPF1(0), 8); + s5pv210_fb_cfg_gpios(S5PV210_GPF2(0), 8); + s5pv210_fb_cfg_gpios(S5PV210_GPF3(0), 4); /* Set DISPLAY_CONTROL register for Display path selection. * diff --git a/arch/arm/mach-s5pv210/setup-sdhci-gpio.c b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c index 706427837d8..f5499aeb2b6 100644 --- a/arch/arm/mach-s5pv210/setup-sdhci-gpio.c +++ b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c @@ -26,24 +26,20 @@ void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) { struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; - unsigned int gpio; /* Set all the necessary GPG0/GPG1 pins to special-function 2 */ - s3c_gpio_cfgpin_range(S5PV210_GPG0(0), 2, S3C_GPIO_SFN(2)); - for (gpio = S5PV210_GPG0(0); gpio < S5PV210_GPG0(2); gpio++) - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); + s3c_gpio_cfgall_range(S5PV210_GPG0(0), 2, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); switch (width) { case 8: /* GPG1[3:6] special-funtion 3 */ - s3c_gpio_cfgpin_range(S5PV210_GPG1(3), 4, S3C_GPIO_SFN(3)); - for (gpio = S5PV210_GPG1(3); gpio <= S5PV210_GPG1(6); gpio++) - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); + s3c_gpio_cfgall_range(S5PV210_GPG1(3), 4, + S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE); case 4: /* GPG0[3:6] special-funtion 2 */ - s3c_gpio_cfgpin_range(S5PV210_GPG0(3), 4, S3C_GPIO_SFN(2)); - for (gpio = S5PV210_GPG0(3); gpio <= S5PV210_GPG0(6); gpio++) - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); + s3c_gpio_cfgall_range(S5PV210_GPG0(3), 4, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); default: break; } @@ -57,17 +53,14 @@ void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) { struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; - unsigned int gpio; /* Set all the necessary GPG1[0:1] pins to special-function 2 */ - s3c_gpio_cfgpin_range(S5PV210_GPG1(0), 2, S3C_GPIO_SFN(2)); - for (gpio = S5PV210_GPG1(0); gpio < S5PV210_GPG1(2); gpio++) - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); + s3c_gpio_cfgall_range(S5PV210_GPG1(0), 2, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); /* Data pin GPG1[3:6] to special-function 2 */ - s3c_gpio_cfgpin_range(S5PV210_GPG1(3), 4, S3C_GPIO_SFN(2)); - for (gpio = S5PV210_GPG1(3); gpio <= S5PV210_GPG1(6); gpio++) - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); + s3c_gpio_cfgall_range(S5PV210_GPG1(3), 4, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S5PV210_GPG1(2), S3C_GPIO_PULL_UP); @@ -78,24 +71,20 @@ void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) { struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; - unsigned int gpio; /* Set all the necessary GPG2[0:1] pins to special-function 2 */ - s3c_gpio_cfgpin_range(S5PV210_GPG2(0), 2, S3C_GPIO_SFN(2)); - for (gpio = S5PV210_GPG2(0); gpio < S5PV210_GPG2(2); gpio++) - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); + s3c_gpio_cfgall_range(S5PV210_GPG2(0), 2, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); switch (width) { case 8: /* Data pin GPG3[3:6] to special-function 3 */ - s3c_gpio_cfgpin_range(S5PV210_GPG3(3), 4, S3C_GPIO_SFN(3)); - for (gpio = S5PV210_GPG3(3); gpio <= S5PV210_GPG3(6); gpio++) - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); + s3c_gpio_cfgall_range(S5PV210_GPG3(3), 4, + S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE); case 4: /* Data pin GPG2[3:6] to special-function 2 */ - s3c_gpio_cfgpin_range(S5PV210_GPG2(3), 4, S3C_GPIO_SFN(2)); - for (gpio = S5PV210_GPG2(3); gpio <= S5PV210_GPG2(6); gpio++) - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); + s3c_gpio_cfgall_range(S5PV210_GPG2(3), 4, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); default: break; } @@ -109,17 +98,14 @@ void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) void s5pv210_setup_sdhci3_cfg_gpio(struct platform_device *dev, int width) { struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; - unsigned int gpio; /* Set all the necessary GPG3[0:1] pins to special-function 2 */ - s3c_gpio_cfgpin_range(S5PV210_GPG3(0), 2, S3C_GPIO_SFN(2)); - for (gpio = S5PV210_GPG3(0); gpio < S5PV210_GPG3(2); gpio++) - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); + s3c_gpio_cfgall_range(S5PV210_GPG3(0), 2, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); /* Data pin GPG3[3:6] to special-function 2 */ - s3c_gpio_cfgpin_range(S5PV210_GPG3(3), 4, S3C_GPIO_SFN(2)); - for (gpio = S5PV210_GPG3(3); gpio <= S5PV210_GPG3(6); gpio++) - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); + s3c_gpio_cfgall_range(S5PV210_GPG3(3), 4, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S5PV210_GPG3(2), S3C_GPIO_PULL_UP); -- cgit v1.2.3-70-g09d2 From 861004657e7a5d29a1e1fd1c58967b4e6c0438b4 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Fri, 1 Oct 2010 19:32:27 +0900 Subject: ARM: S5PV310: Change to using s3c_gpio_cfgall_range() Change the code setting a range of GPIO pins' configuration and pull state to use the recently introduced s3c_gpio_cfgall_range(). Signed-off-by: Kukjin Kim --- arch/arm/mach-s5pv310/setup-i2c0.c | 5 ++--- arch/arm/mach-s5pv310/setup-i2c1.c | 5 ++--- arch/arm/mach-s5pv310/setup-i2c2.c | 5 ++--- 3 files changed, 6 insertions(+), 9 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-s5pv310/setup-i2c0.c b/arch/arm/mach-s5pv310/setup-i2c0.c index 17c54c89e73..f47f8f3152e 100644 --- a/arch/arm/mach-s5pv310/setup-i2c0.c +++ b/arch/arm/mach-s5pv310/setup-i2c0.c @@ -21,7 +21,6 @@ struct platform_device; /* don't need the contents */ void s3c_i2c0_cfg_gpio(struct platform_device *dev) { - s3c_gpio_cfgpin_range(S5PV310_GPD1(0), 2, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5PV310_GPD1(0), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5PV310_GPD1(1), S3C_GPIO_PULL_UP); + s3c_gpio_cfgall_range(S5PV310_GPD1(0), 2, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); } diff --git a/arch/arm/mach-s5pv310/setup-i2c1.c b/arch/arm/mach-s5pv310/setup-i2c1.c index 1740c9f0371..9d07e4e2f14 100644 --- a/arch/arm/mach-s5pv310/setup-i2c1.c +++ b/arch/arm/mach-s5pv310/setup-i2c1.c @@ -18,7 +18,6 @@ struct platform_device; /* don't need the contents */ void s3c_i2c1_cfg_gpio(struct platform_device *dev) { - s3c_gpio_cfgpin_range(S5PV310_GPD1(2), 2, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5PV310_GPD1(2), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5PV310_GPD1(3), S3C_GPIO_PULL_UP); + s3c_gpio_cfgall_range(S5PV310_GPD1(2), 2, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); } diff --git a/arch/arm/mach-s5pv310/setup-i2c2.c b/arch/arm/mach-s5pv310/setup-i2c2.c index 860f77beec5..4163b1233da 100644 --- a/arch/arm/mach-s5pv310/setup-i2c2.c +++ b/arch/arm/mach-s5pv310/setup-i2c2.c @@ -18,7 +18,6 @@ struct platform_device; /* don't need the contents */ void s3c_i2c2_cfg_gpio(struct platform_device *dev) { - s3c_gpio_cfgpin_range(S5PV310_GPA0(6), 2, S3C_GPIO_SFN(3)); - s3c_gpio_setpull(S5PV310_GPA0(6), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5PV310_GPA0(7), S3C_GPIO_PULL_UP); + s3c_gpio_cfgall_range(S5PV310_GPA0(6), 2, + S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP); } -- cgit v1.2.3-70-g09d2 From aef698a72fbb8ba97cff1abb1fdb035c791bd106 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Fri, 1 Oct 2010 20:47:21 +0900 Subject: ARM: S3C64XX: 2nd Change to using s3c_gpio_cfgall_range() This patch changes the code setting range of GPIO pins' configuration and pull state to use the recently introduced s3c_gpio_cfgpin_range(). NOTE: This is for missed things from the previous patch. Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c64xx/setup-ide.c | 10 +++------- arch/arm/mach-s3c64xx/setup-keypad.c | 17 ++++------------- 2 files changed, 7 insertions(+), 20 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-s3c64xx/setup-ide.c b/arch/arm/mach-s3c64xx/setup-ide.c index c12c315f33b..de645e99ba9 100644 --- a/arch/arm/mach-s3c64xx/setup-ide.c +++ b/arch/arm/mach-s3c64xx/setup-ide.c @@ -21,7 +21,6 @@ void s3c64xx_ide_setup_gpio(void) { u32 reg; - u32 gpio = 0; reg = readl(S3C_MEM_SYS_CFG) & (~0x3f); @@ -32,15 +31,12 @@ void s3c64xx_ide_setup_gpio(void) s3c_gpio_cfgpin(S3C64XX_GPB(4), S3C_GPIO_SFN(4)); /* Set XhiDATA[15:0] pins as CF Data[15:0] */ - for (gpio = S3C64XX_GPK(0); gpio <= S3C64XX_GPK(15); gpio++) - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(5)); + s3c_gpio_cfgpin_range(S3C64XX_GPK(0), 16, S3C_GPIO_SFN(5)); /* Set XhiADDR[2:0] pins as CF ADDR[2:0] */ - for (gpio = S3C64XX_GPL(0); gpio <= S3C64XX_GPL(2); gpio++) - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(6)); + s3c_gpio_cfgpin_range(S3C64XX_GPL(0), 3, S3C_GPIO_SFN(6)); /* Set Xhi ctrl pins as CF ctrl pins(IORDY, IOWR, IORD, CE[0:1]) */ s3c_gpio_cfgpin(S3C64XX_GPM(5), S3C_GPIO_SFN(1)); - for (gpio = S3C64XX_GPM(0); gpio <= S3C64XX_GPM(4); gpio++) - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(6)); + s3c_gpio_cfgpin_range(S3C64XX_GPM(0), 5, S3C_GPIO_SFN(6)); } diff --git a/arch/arm/mach-s3c64xx/setup-keypad.c b/arch/arm/mach-s3c64xx/setup-keypad.c index abc34e4e1a9..cc9b09c335f 100644 --- a/arch/arm/mach-s3c64xx/setup-keypad.c +++ b/arch/arm/mach-s3c64xx/setup-keypad.c @@ -15,20 +15,11 @@ void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols) { - unsigned int gpio; - unsigned int end; - /* Set all the necessary GPK pins to special-function 3: KP_ROW[x] */ - end = S3C64XX_GPK(8 + rows); - for (gpio = S3C64XX_GPK(8); gpio < end; gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } + s3c_gpio_cfgall_range(S3C64XX_GPK(8), 8 + rows, + S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE); /* Set all the necessary GPL pins to special-function 3: KP_COL[x] */ - end = S3C64XX_GPL(0 + cols); - for (gpio = S3C64XX_GPL(0); gpio < end; gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } + s3c_gpio_cfgall_range(S3C64XX_GPL(0), cols, + S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE); } -- cgit v1.2.3-70-g09d2 From 54bce6c73dcd6d150d917e954154521de116e17b Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Fri, 1 Oct 2010 19:38:26 +0900 Subject: ARM: S5P64X0: 2nd Change to using s3c_gpio_cfgall_range() This patch changes the code setting range of GPIO pins' configuration and pull state to use the recently introduced s3c_gpio_cfgpin_range(). NOTE: This is for missed things from the previous patch. Signed-off-by: Kukjin Kim --- arch/arm/mach-s5p64x0/setup-i2c1.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-s5p64x0/setup-i2c1.c b/arch/arm/mach-s5p64x0/setup-i2c1.c index 5d5dd3c4edb..6ad3b986021 100644 --- a/arch/arm/mach-s5p64x0/setup-i2c1.c +++ b/arch/arm/mach-s5p64x0/setup-i2c1.c @@ -25,16 +25,14 @@ struct platform_device; /* don't need the contents */ void s5p6440_i2c1_cfg_gpio(struct platform_device *dev) { - s3c_gpio_cfgpin_range(S5P6440_GPR(9), 2, S3C_GPIO_SFN(6)); - s3c_gpio_setpull(S5P6440_GPR(9), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5P6440_GPR(10), S3C_GPIO_PULL_UP); + s3c_gpio_cfgall_range(S5P6440_GPR(9), 2, + S3C_GPIO_SFN(6), S3C_GPIO_PULL_UP); } void s5p6450_i2c1_cfg_gpio(struct platform_device *dev) { - s3c_gpio_cfgpin_range(S5P6450_GPR(9), 2, S3C_GPIO_SFN(6)); - s3c_gpio_setpull(S5P6450_GPR(9), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5P6450_GPR(10), S3C_GPIO_PULL_UP); + s3c_gpio_cfgall_range(S5P6450_GPR(9), 2, + S3C_GPIO_SFN(6), S3C_GPIO_PULL_UP); } void s3c_i2c1_cfg_gpio(struct platform_device *dev) { } -- cgit v1.2.3-70-g09d2 From e27ecd7306992fbe58ab03f20aa3452a8b40499a Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Fri, 1 Oct 2010 20:50:20 +0900 Subject: ARM: S5PC100: 2nd Change to using s3c_gpio_cfgall_range() This patch changes the code setting range of GPIO pins' configuration and pull state to use the recently introduced s3c_gpio_cfgpin_range(). NOTE: This is for missed things from the previous patch. Signed-off-by: Kukjin Kim --- arch/arm/mach-s5pc100/dev-spi.c | 17 ++++++--------- arch/arm/mach-s5pc100/setup-i2c0.c | 6 ++---- arch/arm/mach-s5pc100/setup-i2c1.c | 6 ++---- arch/arm/mach-s5pc100/setup-ide.c | 42 +++++++++++++----------------------- arch/arm/mach-s5pc100/setup-keypad.c | 17 ++++----------- 5 files changed, 29 insertions(+), 59 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-s5pc100/dev-spi.c b/arch/arm/mach-s5pc100/dev-spi.c index c1c5aed0791..57b19794d9b 100644 --- a/arch/arm/mach-s5pc100/dev-spi.c +++ b/arch/arm/mach-s5pc100/dev-spi.c @@ -38,25 +38,20 @@ static int s5pc100_spi_cfg_gpio(struct platform_device *pdev) { switch (pdev->id) { case 0: - s3c_gpio_cfgpin_range(S5PC100_GPB(0), 3, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5PC100_GPB(0), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5PC100_GPB(1), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5PC100_GPB(2), S3C_GPIO_PULL_UP); + s3c_gpio_cfgall_range(S5PC100_GPB(0), 3, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); break; case 1: - s3c_gpio_cfgpin_range(S5PC100_GPB(4), 3, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5PC100_GPB(4), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5PC100_GPB(5), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5PC100_GPB(6), S3C_GPIO_PULL_UP); + s3c_gpio_cfgall_range(S5PC100_GPB(4), 3, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); break; case 2: s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin_range(S5PC100_GPB(2), 2, S3C_GPIO_SFN(3)); s3c_gpio_setpull(S5PC100_GPG3(0), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5PC100_GPG3(2), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5PC100_GPG3(3), S3C_GPIO_PULL_UP); + s3c_gpio_cfgall_range(S5PC100_GPB(2), 2, + S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP); break; default: diff --git a/arch/arm/mach-s5pc100/setup-i2c0.c b/arch/arm/mach-s5pc100/setup-i2c0.c index dd3174e6ecc..eaef7a3bda4 100644 --- a/arch/arm/mach-s5pc100/setup-i2c0.c +++ b/arch/arm/mach-s5pc100/setup-i2c0.c @@ -23,8 +23,6 @@ struct platform_device; /* don't need the contents */ void s3c_i2c0_cfg_gpio(struct platform_device *dev) { - s3c_gpio_cfgpin(S5PC100_GPD(3), S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5PC100_GPD(3), S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(S5PC100_GPD(4), S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5PC100_GPD(4), S3C_GPIO_PULL_UP); + s3c_gpio_cfgall_range(S5PC100_GPD(3), 2, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); } diff --git a/arch/arm/mach-s5pc100/setup-i2c1.c b/arch/arm/mach-s5pc100/setup-i2c1.c index d1fec26b69e..aaff74a90de 100644 --- a/arch/arm/mach-s5pc100/setup-i2c1.c +++ b/arch/arm/mach-s5pc100/setup-i2c1.c @@ -23,8 +23,6 @@ struct platform_device; /* don't need the contents */ void s3c_i2c1_cfg_gpio(struct platform_device *dev) { - s3c_gpio_cfgpin(S5PC100_GPD(5), S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5PC100_GPD(5), S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(S5PC100_GPD(6), S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5PC100_GPD(6), S3C_GPIO_PULL_UP); + s3c_gpio_cfgall_range(S5PC100_GPD(5), 2, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); } diff --git a/arch/arm/mach-s5pc100/setup-ide.c b/arch/arm/mach-s5pc100/setup-ide.c index 83575671fb5..d8b0d0eac13 100644 --- a/arch/arm/mach-s5pc100/setup-ide.c +++ b/arch/arm/mach-s5pc100/setup-ide.c @@ -17,52 +17,40 @@ #include #include +static void s5pc100_ide_cfg_gpios(unsigned int base, unsigned int nr) +{ + s3c_gpio_cfgall_range(base, nr, S3C_GPIO_SFN(4), S3C_GPIO_PULL_NONE); + + for (; nr > 0; nr--, base++) + s5p_gpio_set_drvstr(base, S5P_GPIO_DRVSTR_LV4); +} + void s5pc100_ide_setup_gpio(void) { u32 reg; - u32 gpio = 0; /* Independent CF interface, CF chip select configuration */ reg = readl(S5PC100_MEM_SYS_CFG) & (~0x3f); writel(reg | MEM_SYS_CFG_EBI_FIX_PRI_CFCON, S5PC100_MEM_SYS_CFG); /* CF_Add[0 - 2], CF_IORDY, CF_INTRQ, CF_DMARQ, CF_DMARST, CF_DMACK */ - for (gpio = S5PC100_GPJ0(0); gpio <= S5PC100_GPJ0(7); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); - } + s5pc100_ide_cfg_gpios(S5PC100_GPJ0(0), 8); /*CF_Data[0 - 7] */ - for (gpio = S5PC100_GPJ2(0); gpio <= S5PC100_GPJ2(7); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); - } + s5pc100_ide_cfg_gpios(S5PC100_GPJ2(0), 8); /* CF_Data[8 - 15] */ - for (gpio = S5PC100_GPJ3(0); gpio <= S5PC100_GPJ3(7); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); - } + s5pc100_ide_cfg_gpios(S5PC100_GPJ3(0), 8); /* CF_CS0, CF_CS1, CF_IORD, CF_IOWR */ - for (gpio = S5PC100_GPJ4(0); gpio <= S5PC100_GPJ4(3); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); - } + s5pc100_ide_cfg_gpios(S5PC100_GPJ4(0), 4); /* EBI_OE, EBI_WE */ - for (gpio = S5PC100_GPK0(6); gpio <= S5PC100_GPK0(7); gpio++) - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0)); + s3c_gpio_cfgpin_range(S5PC100_GPK0(6), 2, S3C_GPIO_SFN(0)); /* CF_OE, CF_WE */ - for (gpio = S5PC100_GPK1(6); gpio <= S5PC100_GPK1(7); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } + s3c_gpio_cfgall_range(S5PC100_GPK1(6), 8, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); /* CF_CD */ s3c_gpio_cfgpin(S5PC100_GPK3(5), S3C_GPIO_SFN(2)); diff --git a/arch/arm/mach-s5pc100/setup-keypad.c b/arch/arm/mach-s5pc100/setup-keypad.c index d0837a72a58..966b49f0e28 100644 --- a/arch/arm/mach-s5pc100/setup-keypad.c +++ b/arch/arm/mach-s5pc100/setup-keypad.c @@ -15,20 +15,11 @@ void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols) { - unsigned int gpio; - unsigned int end; - /* Set all the necessary GPH3 pins to special-function 3: KP_ROW[x] */ - end = S5PC100_GPH3(rows); - for (gpio = S5PC100_GPH3(0); gpio < end; gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } + s3c_gpio_cfgall_range(S5PC100_GPH3(0), rows, + S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE); /* Set all the necessary GPH2 pins to special-function 3: KP_COL[x] */ - end = S5PC100_GPH2(cols); - for (gpio = S5PC100_GPH2(0); gpio < end; gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } + s3c_gpio_cfgall_range(S5PC100_GPH2(0), cols, + S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE); } -- cgit v1.2.3-70-g09d2 From 818ac8c134250c2f57425d1e3b3a0e19636b5506 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Fri, 1 Oct 2010 20:54:56 +0900 Subject: ARM: S5PV210: 2nd Change to using s3c_gpio_cfgall_range() This patch changes the code setting range of GPIO pins' configuration and pull state to use the recently introduced s3c_gpio_cfgpin_range(). NOTE: This is for missed things from the previous patch. Signed-off-by: Kukjin Kim --- arch/arm/mach-s5pv210/dev-spi.c | 19 ++++++-------- arch/arm/mach-s5pv210/setup-i2c0.c | 6 ++--- arch/arm/mach-s5pv210/setup-i2c1.c | 6 ++--- arch/arm/mach-s5pv210/setup-i2c2.c | 6 ++--- arch/arm/mach-s5pv210/setup-ide.c | 49 ++++++++++++++---------------------- arch/arm/mach-s5pv210/setup-keypad.c | 16 +++--------- 6 files changed, 36 insertions(+), 66 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-s5pv210/dev-spi.c b/arch/arm/mach-s5pv210/dev-spi.c index 826cdbc43e2..e3249a47e3b 100644 --- a/arch/arm/mach-s5pv210/dev-spi.c +++ b/arch/arm/mach-s5pv210/dev-spi.c @@ -35,23 +35,15 @@ static char *spi_src_clks[] = { */ static int s5pv210_spi_cfg_gpio(struct platform_device *pdev) { + unsigned int base; + switch (pdev->id) { case 0: - s3c_gpio_cfgpin(S5PV210_GPB(0), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PV210_GPB(1), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PV210_GPB(2), S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5PV210_GPB(0), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5PV210_GPB(1), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5PV210_GPB(2), S3C_GPIO_PULL_UP); + base = S5PV210_GPB(0); break; case 1: - s3c_gpio_cfgpin(S5PV210_GPB(4), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PV210_GPB(5), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5PV210_GPB(6), S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5PV210_GPB(4), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5PV210_GPB(5), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5PV210_GPB(6), S3C_GPIO_PULL_UP); + base = S5PV210_GPB(4); break; default: @@ -59,6 +51,9 @@ static int s5pv210_spi_cfg_gpio(struct platform_device *pdev) return -EINVAL; } + s3c_gpio_cfgall_range(base, 3, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); + return 0; } diff --git a/arch/arm/mach-s5pv210/setup-i2c0.c b/arch/arm/mach-s5pv210/setup-i2c0.c index d38f7cb7e66..0f1cc3a1c1e 100644 --- a/arch/arm/mach-s5pv210/setup-i2c0.c +++ b/arch/arm/mach-s5pv210/setup-i2c0.c @@ -23,8 +23,6 @@ struct platform_device; /* don't need the contents */ void s3c_i2c0_cfg_gpio(struct platform_device *dev) { - s3c_gpio_cfgpin(S5PV210_GPD1(0), S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5PV210_GPD1(0), S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(S5PV210_GPD1(1), S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5PV210_GPD1(1), S3C_GPIO_PULL_UP); + s3c_gpio_cfgall_range(S5PV210_GPD1(0), 2, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); } diff --git a/arch/arm/mach-s5pv210/setup-i2c1.c b/arch/arm/mach-s5pv210/setup-i2c1.c index 148bb7857d8..f61365a34c5 100644 --- a/arch/arm/mach-s5pv210/setup-i2c1.c +++ b/arch/arm/mach-s5pv210/setup-i2c1.c @@ -23,8 +23,6 @@ struct platform_device; /* don't need the contents */ void s3c_i2c1_cfg_gpio(struct platform_device *dev) { - s3c_gpio_cfgpin(S5PV210_GPD1(2), S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5PV210_GPD1(2), S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(S5PV210_GPD1(3), S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5PV210_GPD1(3), S3C_GPIO_PULL_UP); + s3c_gpio_cfgall_range(S5PV210_GPD1(2), 2, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); } diff --git a/arch/arm/mach-s5pv210/setup-i2c2.c b/arch/arm/mach-s5pv210/setup-i2c2.c index 2396cb8c373..2f91b5cefbc 100644 --- a/arch/arm/mach-s5pv210/setup-i2c2.c +++ b/arch/arm/mach-s5pv210/setup-i2c2.c @@ -23,8 +23,6 @@ struct platform_device; /* don't need the contents */ void s3c_i2c2_cfg_gpio(struct platform_device *dev) { - s3c_gpio_cfgpin(S5PV210_GPD1(4), S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5PV210_GPD1(4), S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(S5PV210_GPD1(5), S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5PV210_GPD1(5), S3C_GPIO_PULL_UP); + s3c_gpio_cfgall_range(S5PV210_GPD1(4), 2, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); } diff --git a/arch/arm/mach-s5pv210/setup-ide.c b/arch/arm/mach-s5pv210/setup-ide.c index b558b1cc8d6..d7cd10f9230 100644 --- a/arch/arm/mach-s5pv210/setup-ide.c +++ b/arch/arm/mach-s5pv210/setup-ide.c @@ -15,36 +15,25 @@ #include +static void s5pv210_ide_cfg_gpios(unsigned int base, unsigned int nr) +{ + s3c_gpio_cfgall_range(base, nr, S3C_GPIO_SFN(4), S3C_GPIO_PULL_NONE); + + for (; nr > 0; nr--, base++) + s5p_gpio_set_drvstr(base, S5P_GPIO_DRVSTR_LV4); +} + void s5pv210_ide_setup_gpio(void) { - unsigned int gpio = 0; - - for (gpio = S5PV210_GPJ0(0); gpio <= S5PV210_GPJ0(7); gpio++) { - /* CF_Add[0 - 2], CF_IORDY, CF_INTRQ, CF_DMARQ, CF_DMARST, - CF_DMACK */ - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); - } - - for (gpio = S5PV210_GPJ2(0); gpio <= S5PV210_GPJ2(7); gpio++) { - /*CF_Data[0 - 7] */ - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); - } - - for (gpio = S5PV210_GPJ3(0); gpio <= S5PV210_GPJ3(7); gpio++) { - /* CF_Data[8 - 15] */ - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); - } - - for (gpio = S5PV210_GPJ4(0); gpio <= S5PV210_GPJ4(3); gpio++) { - /* CF_CS0, CF_CS1, CF_IORD, CF_IOWR */ - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); - } + /* CF_Add[0 - 2], CF_IORDY, CF_INTRQ, CF_DMARQ, CF_DMARST, CF_DMACK */ + s5pv210_ide_cfg_gpios(S5PV210_GPJ0(0), 8); + + /* CF_Data[0 - 7] */ + s5pv210_ide_cfg_gpios(S5PV210_GPJ2(0), 8); + + /* CF_Data[8 - 15] */ + s5pv210_ide_cfg_gpios(S5PV210_GPJ3(0), 8); + + /* CF_CS0, CF_CS1, CF_IORD, CF_IOWR */ + s5pv210_ide_cfg_gpios(S5PV210_GPJ4(0), 4); } diff --git a/arch/arm/mach-s5pv210/setup-keypad.c b/arch/arm/mach-s5pv210/setup-keypad.c index 37b2790aafc..cb3f409f022 100644 --- a/arch/arm/mach-s5pv210/setup-keypad.c +++ b/arch/arm/mach-s5pv210/setup-keypad.c @@ -16,19 +16,11 @@ void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols) { - unsigned int gpio, end; - /* Set all the necessary GPH3 pins to special-function 3: KP_ROW[x] */ - end = S5PV210_GPH3(rows); - for (gpio = S5PV210_GPH3(0); gpio < end; gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } + s3c_gpio_cfgall_range(S5PV210_GPH3(0), rows, + S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE); /* Set all the necessary GPH2 pins to special-function 3: KP_COL[x] */ - end = S5PV210_GPH2(cols); - for (gpio = S5PV210_GPH2(0); gpio < end; gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } + s3c_gpio_cfgall_range(S5PV210_GPH2(0), cols, + S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE); } -- cgit v1.2.3-70-g09d2 From e594ea3e48579fb1908eea4dc70184e3ba74cb9d Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 1 Oct 2010 19:07:28 +0900 Subject: ARM: SAMSUNG: Add s3c_gpio_cfgrange_nopull() helper A number of the SDHCI code configure a GPIO to a special function and remove any pull-up, so add s3c_gpio_cfgrange_nopull() as a wrapper to the s3c_gpio_cfgall_range() to make the code that calls it fit on one line. Signed-off-by: Ben Dooks Signed-off-by: Kukjin Kim --- arch/arm/plat-samsung/include/plat/gpio-cfg.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch') diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h index c84defd2950..f684901b4b7 100644 --- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h +++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h @@ -172,6 +172,12 @@ extern s3c_gpio_pull_t s3c_gpio_getpull(unsigned int pin); extern int s3c_gpio_cfgall_range(unsigned int start, unsigned int nr, unsigned int cfg, s3c_gpio_pull_t pull); +static inline int s3c_gpio_cfgrange_nopull(unsigned int pin, unsigned int size, + unsigned int cfg) +{ + return s3c_gpio_cfgall_range(pin, size, cfg, S3C_GPIO_PULL_NONE); +} + /* Define values for the drvstr available for each gpio pin. * * These values control the value of the output signal driver strength, -- cgit v1.2.3-70-g09d2 From 2a1309b493ba6f42e9931a785c4eca7275bc2357 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Thu, 27 May 2010 17:25:45 +0900 Subject: ARM: S3C64XX: Change to using s3c_gpio_cfgrange_nopull() Change code setting special-function and no pull-up to use the s3c_gpio_cfgrange_nopull() wrapper. Signed-off-by: Ben Dooks Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c64xx/setup-sdhci-gpio.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c b/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c index 4262f78a93c..6eac071afae 100644 --- a/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c +++ b/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c @@ -26,8 +26,7 @@ void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; /* Set all the necessary GPG pins to special-function 2 */ - s3c_gpio_cfgall_range(S3C64XX_GPG(0), 2 + width, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2)); if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); @@ -40,8 +39,7 @@ void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; /* Set all the necessary GPH pins to special-function 2 */ - s3c_gpio_cfgall_range(S3C64XX_GPH(0), 2 + width, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S3C64XX_GPH(0), 2 + width, S3C_GPIO_SFN(2)); if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); @@ -52,10 +50,8 @@ void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) { /* Set all the necessary GPH pins to special-function 3 */ - s3c_gpio_cfgall_range(S3C64XX_GPH(6), width, - S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S3C64XX_GPH(6), width, S3C_GPIO_SFN(3)); /* Set all the necessary GPC pins to special-function 3 */ - s3c_gpio_cfgall_range(S3C64XX_GPC(4), 2, - S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S3C64XX_GPC(4), 2, S3C_GPIO_SFN(3)); } -- cgit v1.2.3-70-g09d2 From 8f89d5b3b14ba588f744ba394b6c7f00f4dcd49a Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Thu, 27 May 2010 17:25:46 +0900 Subject: ARM: S5PC100: Change to using s3c_gpio_cfgrange_nopull() Change code setting special-function and no pull-up to use the s3c_gpio_cfgrange_nopull() wrapper. Signed-off-by: Ben Dooks Signed-off-by: Kukjin Kim --- arch/arm/mach-s5pc100/setup-sdhci-gpio.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-s5pc100/setup-sdhci-gpio.c b/arch/arm/mach-s5pc100/setup-sdhci-gpio.c index a8d22a7b158..03c02d04c68 100644 --- a/arch/arm/mach-s5pc100/setup-sdhci-gpio.c +++ b/arch/arm/mach-s5pc100/setup-sdhci-gpio.c @@ -33,12 +33,10 @@ void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) num = width - 2; /* Set all the necessary GPG0/GPG1 pins to special-function 0 */ - s3c_gpio_cfgall_range(S5PC100_GPG0(0), 2 + num, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S5PC100_GPG0(0), 2 + num, S3C_GPIO_SFN(2)); if (width == 8) - s3c_gpio_cfgall_range(S5PC100_GPG1(0), 2, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S5PC100_GPG1(0), 2, S3C_GPIO_SFN(2)); if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S5PC100_GPG1(2), S3C_GPIO_PULL_UP); @@ -51,8 +49,7 @@ void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; /* Set all the necessary GPG2 pins to special-function 2 */ - s3c_gpio_cfgall_range(S5PC100_GPG2(0), 2 + width, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S5PC100_GPG2(0), 2 + width, S3C_GPIO_SFN(2)); if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S5PC100_GPG2(6), S3C_GPIO_PULL_UP); @@ -65,8 +62,7 @@ void s5pc100_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; /* Set all the necessary GPG3 pins to special-function 2 */ - s3c_gpio_cfgall_range(S5PC100_GPG3(0), 2 + width, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S5PC100_GPG3(0), 2 + width, S3C_GPIO_SFN(2)); if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S5PC100_GPG3(6), S3C_GPIO_PULL_UP); -- cgit v1.2.3-70-g09d2 From 5a350da428daace38b0762b63d42f4b441e8bad4 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Thu, 27 May 2010 17:25:47 +0900 Subject: ARM: S5PV210: Change to using s3c_gpio_cfgrange_nopull() Change code setting special-function and no pull-up to use the s3c_gpio_cfgrange_nopull() wrapper. Signed-off-by: Ben Dooks Signed-off-by: Kukjin Kim --- arch/arm/mach-s5pv210/setup-sdhci-gpio.c | 21 +++++++-------------- 1 file changed, 7 insertions(+), 14 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-s5pv210/setup-sdhci-gpio.c b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c index f5499aeb2b6..927d58850fc 100644 --- a/arch/arm/mach-s5pv210/setup-sdhci-gpio.c +++ b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c @@ -34,12 +34,10 @@ void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) switch (width) { case 8: /* GPG1[3:6] special-funtion 3 */ - s3c_gpio_cfgall_range(S5PV210_GPG1(3), 4, - S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S5PV210_GPG1(3), 4, S3C_GPIO_SFN(3)); case 4: /* GPG0[3:6] special-funtion 2 */ - s3c_gpio_cfgall_range(S5PV210_GPG0(3), 4, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S5PV210_GPG0(3), 4, S3C_GPIO_SFN(2)); default: break; } @@ -55,12 +53,10 @@ void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; /* Set all the necessary GPG1[0:1] pins to special-function 2 */ - s3c_gpio_cfgall_range(S5PV210_GPG1(0), 2, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S5PV210_GPG1(0), 2, S3C_GPIO_SFN(2)); /* Data pin GPG1[3:6] to special-function 2 */ - s3c_gpio_cfgall_range(S5PV210_GPG1(3), 4, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S5PV210_GPG1(3), 4, S3C_GPIO_SFN(2)); if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S5PV210_GPG1(2), S3C_GPIO_PULL_UP); @@ -73,18 +69,15 @@ void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; /* Set all the necessary GPG2[0:1] pins to special-function 2 */ - s3c_gpio_cfgall_range(S5PV210_GPG2(0), 2, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S5PV210_GPG2(0), 2, S3C_GPIO_SFN(2)); switch (width) { case 8: /* Data pin GPG3[3:6] to special-function 3 */ - s3c_gpio_cfgall_range(S5PV210_GPG3(3), 4, - S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S5PV210_GPG3(3), 4, S3C_GPIO_SFN(3)); case 4: /* Data pin GPG2[3:6] to special-function 2 */ - s3c_gpio_cfgall_range(S5PV210_GPG2(3), 4, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S5PV210_GPG2(3), 4, S3C_GPIO_SFN(2)); default: break; } -- cgit v1.2.3-70-g09d2 From 3e9b7261502e78e351fc6a61a9b7241433c779c4 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Fri, 1 Oct 2010 20:20:37 +0900 Subject: ARM: S3C64XX: 2nd Change to using s3c_gpio_cfgrange_nopull() This patch changes code setting special-function and no pull-up to use the s3c_gpio_cfgrange_nopull() wrapper. NOTE: This is for missed things from the previous patch. Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c64xx/setup-fb-24bpp.c | 7 ++----- arch/arm/mach-s3c64xx/setup-keypad.c | 6 ++---- 2 files changed, 4 insertions(+), 9 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c index 3b0dd124d49..8f3091182f9 100644 --- a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c +++ b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c @@ -23,9 +23,6 @@ extern void s3c64xx_fb_gpio_setup_24bpp(void) { - s3c_gpio_cfgall_range(S3C64XX_GPI(0), 16, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); - - s3c_gpio_cfgall_range(S3C64XX_GPJ(0), 12, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S3C64XX_GPI(0), 16, S3C_GPIO_SFN(2)); + s3c_gpio_cfgrange_nopull(S3C64XX_GPJ(0), 12, S3C_GPIO_SFN(2)); } diff --git a/arch/arm/mach-s3c64xx/setup-keypad.c b/arch/arm/mach-s3c64xx/setup-keypad.c index cc9b09c335f..d1fd7228ee7 100644 --- a/arch/arm/mach-s3c64xx/setup-keypad.c +++ b/arch/arm/mach-s3c64xx/setup-keypad.c @@ -16,10 +16,8 @@ void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols) { /* Set all the necessary GPK pins to special-function 3: KP_ROW[x] */ - s3c_gpio_cfgall_range(S3C64XX_GPK(8), 8 + rows, - S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S3C64XX_GPK(8), 8 + rows, S3C_GPIO_SFN(3)); /* Set all the necessary GPL pins to special-function 3: KP_COL[x] */ - s3c_gpio_cfgall_range(S3C64XX_GPL(0), cols, - S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S3C64XX_GPL(0), cols, S3C_GPIO_SFN(3)); } -- cgit v1.2.3-70-g09d2 From 20dbc43dd33a35ee24b6892d980c5e6107a27d32 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Fri, 1 Oct 2010 20:10:33 +0900 Subject: ARM: S5PC100: 2nd Change to using s3c_gpio_cfgrange_nopull() This patch changes code setting special-function and no pull-up to use the s3c_gpio_cfgrange_nopull() wrapper. NOTE: This is for missed things from the previous patch. Signed-off-by: Kukjin Kim --- arch/arm/mach-s5pc100/setup-fb-24bpp.c | 2 +- arch/arm/mach-s5pc100/setup-ide.c | 5 ++--- arch/arm/mach-s5pc100/setup-keypad.c | 6 ++---- 3 files changed, 5 insertions(+), 8 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-s5pc100/setup-fb-24bpp.c b/arch/arm/mach-s5pc100/setup-fb-24bpp.c index 5a882d46c3f..d31c0f3fe22 100644 --- a/arch/arm/mach-s5pc100/setup-fb-24bpp.c +++ b/arch/arm/mach-s5pc100/setup-fb-24bpp.c @@ -24,7 +24,7 @@ static void s5pc100_fb_setgpios(unsigned int base, unsigned int nr) { - s3c_gpio_cfgall_range(base, nr, S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(base, nr, S3C_GPIO_SFN(2)); } void s5pc100_fb_gpio_setup_24bpp(void) diff --git a/arch/arm/mach-s5pc100/setup-ide.c b/arch/arm/mach-s5pc100/setup-ide.c index d8b0d0eac13..223aae04446 100644 --- a/arch/arm/mach-s5pc100/setup-ide.c +++ b/arch/arm/mach-s5pc100/setup-ide.c @@ -19,7 +19,7 @@ static void s5pc100_ide_cfg_gpios(unsigned int base, unsigned int nr) { - s3c_gpio_cfgall_range(base, nr, S3C_GPIO_SFN(4), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(base, nr, S3C_GPIO_SFN(4)); for (; nr > 0; nr--, base++) s5p_gpio_set_drvstr(base, S5P_GPIO_DRVSTR_LV4); @@ -49,8 +49,7 @@ void s5pc100_ide_setup_gpio(void) s3c_gpio_cfgpin_range(S5PC100_GPK0(6), 2, S3C_GPIO_SFN(0)); /* CF_OE, CF_WE */ - s3c_gpio_cfgall_range(S5PC100_GPK1(6), 8, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S5PC100_GPK1(6), 8, S3C_GPIO_SFN(2)); /* CF_CD */ s3c_gpio_cfgpin(S5PC100_GPK3(5), S3C_GPIO_SFN(2)); diff --git a/arch/arm/mach-s5pc100/setup-keypad.c b/arch/arm/mach-s5pc100/setup-keypad.c index 966b49f0e28..ada377f0c20 100644 --- a/arch/arm/mach-s5pc100/setup-keypad.c +++ b/arch/arm/mach-s5pc100/setup-keypad.c @@ -16,10 +16,8 @@ void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols) { /* Set all the necessary GPH3 pins to special-function 3: KP_ROW[x] */ - s3c_gpio_cfgall_range(S5PC100_GPH3(0), rows, - S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S5PC100_GPH3(0), rows, S3C_GPIO_SFN(3)); /* Set all the necessary GPH2 pins to special-function 3: KP_COL[x] */ - s3c_gpio_cfgall_range(S5PC100_GPH2(0), cols, - S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S5PC100_GPH2(0), cols, S3C_GPIO_SFN(3)); } -- cgit v1.2.3-70-g09d2 From a7aac9d5b037be16d4ef5b1701b83774706daf53 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Fri, 1 Oct 2010 20:12:24 +0900 Subject: ARM: S5PV210: 2nd Change to using s3c_gpio_cfgrange_nopull() This patch changes code setting special-function and no pull-up to use the s3c_gpio_cfgrange_nopull() wrapper. NOTE: This is for missed things from the previous patch. Signed-off-by: Kukjin Kim --- arch/arm/mach-s5pv210/setup-fb-24bpp.c | 2 +- arch/arm/mach-s5pv210/setup-ide.c | 2 +- arch/arm/mach-s5pv210/setup-keypad.c | 6 ++---- arch/arm/mach-s5pv210/setup-sdhci-gpio.c | 9 +++------ 4 files changed, 7 insertions(+), 12 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-s5pv210/setup-fb-24bpp.c b/arch/arm/mach-s5pv210/setup-fb-24bpp.c index a33fe96191d..e932ebfac56 100644 --- a/arch/arm/mach-s5pv210/setup-fb-24bpp.c +++ b/arch/arm/mach-s5pv210/setup-fb-24bpp.c @@ -23,7 +23,7 @@ static void s5pv210_fb_cfg_gpios(unsigned int base, unsigned int nr) { - s3c_gpio_cfgall_range(base, nr, S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(base, nr, S3C_GPIO_SFN(2)); for (; nr > 0; nr--, base++) s5p_gpio_set_drvstr(base, S5P_GPIO_DRVSTR_LV4); diff --git a/arch/arm/mach-s5pv210/setup-ide.c b/arch/arm/mach-s5pv210/setup-ide.c index d7cd10f9230..ea123d546bd 100644 --- a/arch/arm/mach-s5pv210/setup-ide.c +++ b/arch/arm/mach-s5pv210/setup-ide.c @@ -17,7 +17,7 @@ static void s5pv210_ide_cfg_gpios(unsigned int base, unsigned int nr) { - s3c_gpio_cfgall_range(base, nr, S3C_GPIO_SFN(4), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(base, nr, S3C_GPIO_SFN(4)); for (; nr > 0; nr--, base++) s5p_gpio_set_drvstr(base, S5P_GPIO_DRVSTR_LV4); diff --git a/arch/arm/mach-s5pv210/setup-keypad.c b/arch/arm/mach-s5pv210/setup-keypad.c index cb3f409f022..c56420a52f4 100644 --- a/arch/arm/mach-s5pv210/setup-keypad.c +++ b/arch/arm/mach-s5pv210/setup-keypad.c @@ -17,10 +17,8 @@ void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols) { /* Set all the necessary GPH3 pins to special-function 3: KP_ROW[x] */ - s3c_gpio_cfgall_range(S5PV210_GPH3(0), rows, - S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S5PV210_GPH3(0), rows, S3C_GPIO_SFN(3)); /* Set all the necessary GPH2 pins to special-function 3: KP_COL[x] */ - s3c_gpio_cfgall_range(S5PV210_GPH2(0), cols, - S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S5PV210_GPH2(0), cols, S3C_GPIO_SFN(3)); } diff --git a/arch/arm/mach-s5pv210/setup-sdhci-gpio.c b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c index 927d58850fc..746777d56df 100644 --- a/arch/arm/mach-s5pv210/setup-sdhci-gpio.c +++ b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c @@ -28,8 +28,7 @@ void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; /* Set all the necessary GPG0/GPG1 pins to special-function 2 */ - s3c_gpio_cfgall_range(S5PV210_GPG0(0), 2, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S5PV210_GPG0(0), 2, S3C_GPIO_SFN(2)); switch (width) { case 8: @@ -93,12 +92,10 @@ void s5pv210_setup_sdhci3_cfg_gpio(struct platform_device *dev, int width) struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; /* Set all the necessary GPG3[0:1] pins to special-function 2 */ - s3c_gpio_cfgall_range(S5PV210_GPG3(0), 2, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S5PV210_GPG3(0), 2, S3C_GPIO_SFN(2)); /* Data pin GPG3[3:6] to special-function 2 */ - s3c_gpio_cfgall_range(S5PV210_GPG3(3), 4, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S5PV210_GPG3(3), 4, S3C_GPIO_SFN(2)); if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S5PV210_GPG3(2), S3C_GPIO_PULL_UP); -- cgit v1.2.3-70-g09d2 From dff2126c548d54b040997257407a69a6cdf7a5b6 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Thu, 14 Oct 2010 07:53:12 +0900 Subject: ARM: S3C64XX: Fix special function for IISv4 port When converting to use s3c_gpio_cfgpin_range() the function for the IISv4 block appears to have been typoed as 4 (the keypad) rather than 5 as it should be. Signed-off-by: Mark Brown Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c64xx/dev-audio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-s3c64xx/dev-audio.c b/arch/arm/mach-s3c64xx/dev-audio.c index e4bb02395d9..4a5c682a372 100644 --- a/arch/arm/mach-s3c64xx/dev-audio.c +++ b/arch/arm/mach-s3c64xx/dev-audio.c @@ -48,7 +48,7 @@ static int s3c64xx_i2sv4_cfg_gpio(struct platform_device *pdev) s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C_GPIO_SFN(5)); s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C_GPIO_SFN(5)); s3c_gpio_cfgpin(S3C64XX_GPC(7), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin_range(S3C64XX_GPH(6), 4, S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin_range(S3C64XX_GPH(6), 4, S3C_GPIO_SFN(5)); return 0; } -- cgit v1.2.3-70-g09d2