From 308964caeebc45eb7723c87818076f61fa1a2e1b Mon Sep 17 00:00:00 2001 From: Loc Ho Date: Wed, 26 Jun 2013 11:56:09 -0600 Subject: clk: Add APM X-Gene SoC clock driver clk: Add APM X-Gene SoC clock driver for reference, PLL, and device clocks. Signed-off-by: Loc Ho Signed-off-by: Kumar Sankaran Signed-off-by: Vinayak Kale Signed-off-by: Feng Kan Signed-off-by: Mike Turquette --- drivers/clk/Kconfig | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'drivers/clk/Kconfig') diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index 279407a3639..dd37f91289d 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -93,6 +93,13 @@ config CLK_PPC_CORENET This adds the clock driver support for Freescale PowerPC corenet platforms using common clock framework. +config COMMON_CLK_XGENE + bool "Clock driver for APM XGene SoC" + default y + depends on ARM64 + ---help--- + Sypport for the APM X-Gene SoC reference, PLL, and device clocks. + endmenu source "drivers/clk/mvebu/Kconfig" -- cgit v1.2.3-70-g09d2 From 6cfc229d6f967041b5e1ee56a5bb87a500f31311 Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar Date: Wed, 25 Sep 2013 21:18:15 -0400 Subject: clk: keystone: Build Keystone clock drivers Now build the keystone common clock drivers. The build is made conditional based on COMMON_CLK_KEYSTONE Signed-off-by: Santosh Shilimkar Signed-off-by: Mike Turquette --- drivers/clk/Kconfig | 7 +++++++ drivers/clk/Makefile | 1 + drivers/clk/keystone/Makefile | 1 + 3 files changed, 9 insertions(+) create mode 100644 drivers/clk/keystone/Makefile (limited to 'drivers/clk/Kconfig') diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index dd37f91289d..5c51115081b 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -100,6 +100,13 @@ config COMMON_CLK_XGENE ---help--- Sypport for the APM X-Gene SoC reference, PLL, and device clocks. +config COMMON_CLK_KEYSTONE + tristate "Clock drivers for Keystone based SOCs" + depends on ARCH_KEYSTONE && OF + ---help--- + Supports clock drivers for Keystone based SOCs. These SOCs have local + a power sleep control module that gate the clock to the IPs and PLLs. + endmenu source "drivers/clk/mvebu/Kconfig" diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 270f3fd2fbc..df33820b45e 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -33,6 +33,7 @@ obj-$(CONFIG_ARCH_ZYNQ) += zynq/ obj-$(CONFIG_ARCH_TEGRA) += tegra/ obj-$(CONFIG_PLAT_SAMSUNG) += samsung/ obj-$(CONFIG_COMMON_CLK_XGENE) += clk-xgene.o +obj-$(CONFIG_COMMON_CLK_KEYSTONE) += keystone/ obj-$(CONFIG_X86) += x86/ diff --git a/drivers/clk/keystone/Makefile b/drivers/clk/keystone/Makefile new file mode 100644 index 00000000000..0477cf63f13 --- /dev/null +++ b/drivers/clk/keystone/Makefile @@ -0,0 +1 @@ +obj-y += pll.o gate.o -- cgit v1.2.3-70-g09d2