From 27cb1c2083373a44130d50d4d2fb64cf7eff2d90 Mon Sep 17 00:00:00 2001 From: Boris BREZILLON Date: Wed, 7 May 2014 18:00:08 +0200 Subject: clk: at91: rework main clk implementation AT91 main clk is a clk multiplexer and not a simple fixed rate clk as currently implemented. In some SoCs (sam9x5, sama5, sam9g45 families) this multiplexer can choose among 2 sources: an internal RC oscillator circuit and an oscillator using an external crystal. In other Socs (sam9260, rm9200 families) the multiplexer source is hardcoded to the external crystal oscillator. Signed-off-by: Boris BREZILLON Acked-by: Mike Turquette Signed-off-by: Nicolas Ferre --- drivers/clk/at91/pmc.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'drivers/clk/at91/pmc.c') diff --git a/drivers/clk/at91/pmc.c b/drivers/clk/at91/pmc.c index 6a61477a57e..dc5fdde98e1 100644 --- a/drivers/clk/at91/pmc.c +++ b/drivers/clk/at91/pmc.c @@ -230,10 +230,22 @@ out_free_pmc: static const struct of_device_id pmc_clk_ids[] __initconst = { /* Main clock */ + { + .compatible = "atmel,at91rm9200-clk-main-osc", + .data = of_at91rm9200_clk_main_osc_setup, + }, + { + .compatible = "atmel,at91sam9x5-clk-main-rc-osc", + .data = of_at91sam9x5_clk_main_rc_osc_setup, + }, { .compatible = "atmel,at91rm9200-clk-main", .data = of_at91rm9200_clk_main_setup, }, + { + .compatible = "atmel,at91sam9x5-clk-main", + .data = of_at91sam9x5_clk_main_setup, + }, /* PLL clocks */ { .compatible = "atmel,at91rm9200-clk-pll", -- cgit v1.2.3-70-g09d2