From 5bb9d26700c3db54d5a4346c3b6621b8889f3813 Mon Sep 17 00:00:00 2001 From: Peter De Schrijver Date: Mon, 2 Sep 2013 18:43:56 +0300 Subject: clk: tegra: Add TEGRA_PERIPH_NO_DIV flag This flag indicates the peripheral clock does not have a divider. It will simplify the initialization tables and avoids some very similar code. Signed-off-by: Peter De Schrijver --- drivers/clk/tegra/clk.h | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/clk/tegra/clk.h') diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h index 997357ef059..a8267208471 100644 --- a/drivers/clk/tegra/clk.h +++ b/drivers/clk/tegra/clk.h @@ -397,6 +397,7 @@ struct tegra_clk_periph_gate { #define TEGRA_PERIPH_MANUAL_RESET BIT(1) #define TEGRA_PERIPH_ON_APB BIT(2) #define TEGRA_PERIPH_WAR_1005168 BIT(3) +#define TEGRA_PERIPH_NO_DIV BIT(4) void tegra_periph_reset(struct tegra_clk_periph_gate *gate, bool assert); extern const struct clk_ops tegra_clk_periph_gate_ops; -- cgit v1.2.3-70-g09d2