From 415ac2e240f7f3e1b609f34ba7aa1c340589fdb1 Mon Sep 17 00:00:00 2001 From: Thomas Abraham Date: Sat, 9 Mar 2013 17:10:31 +0900 Subject: clocksource: mct: use fin_pll clock as the tick clock source for mct With the migration of Exynos4 clocks to use common clock framework, the old styled 'xtal' clock is not used anymore. Instead, the clock 'fin_pll' is used as the tick clock for mct controller. Signed-off-by: Thomas Abraham Signed-off-by: Kukjin Kim --- drivers/clocksource/exynos_mct.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'drivers/clocksource/exynos_mct.c') diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c index 545c98976e9..f817c540126 100644 --- a/drivers/clocksource/exynos_mct.c +++ b/drivers/clocksource/exynos_mct.c @@ -479,10 +479,13 @@ static struct local_timer_ops exynos4_mct_tick_ops __cpuinitdata = { static void __init exynos4_timer_resources(struct device_node *np) { - struct clk *mct_clk; - mct_clk = clk_get(NULL, "xtal"); + struct clk *tick_clk; - clk_rate = clk_get_rate(mct_clk); + tick_clk = np ? of_clk_get_by_name(np, "fin_pll") : + clk_get(NULL, "fin_pll"); + if (IS_ERR(tick_clk)) + panic("%s: unable to determine tick clock rate\n", __func__); + clk_rate = clk_get_rate(tick_clk); reg_base = np ? of_iomap(np, 0) : S5P_VA_SYSTIMER; if (!reg_base) -- cgit v1.2.3-70-g09d2