From 489bccea6334514a8e13436f10d0a274777bf17a Mon Sep 17 00:00:00 2001 From: Mattias Wallin Date: Fri, 27 May 2011 10:30:12 +0200 Subject: clocksource: add DBX500 PRCMU Timer support This patch adds the DBX500 PRCMU Timer driver as a clocksource and as sched_clock. Cc: Thomas Gleixner Signed-off-by: Mattias Wallin Signed-off-by: Jonas Aaberg Signed-off-by: Linus Walleij --- drivers/clocksource/Kconfig | 15 +++++ drivers/clocksource/Makefile | 1 + drivers/clocksource/clksrc-dbx500-prcmu.c | 104 ++++++++++++++++++++++++++++++ 3 files changed, 120 insertions(+) create mode 100644 drivers/clocksource/clksrc-dbx500-prcmu.c (limited to 'drivers/clocksource') diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 34e9c4f8892..999d6a03e43 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -15,3 +15,18 @@ config CLKSRC_MMIO config DW_APB_TIMER bool + +config CLKSRC_DBX500_PRCMU + bool "Clocksource PRCMU Timer" + depends on UX500_SOC_DB5500 || UX500_SOC_DB8500 + default y + help + Use the always on PRCMU Timer as clocksource + +config CLKSRC_DBX500_PRCMU_SCHED_CLOCK + bool "Clocksource PRCMU Timer sched_clock" + depends on (CLKSRC_DBX500_PRCMU && !NOMADIK_MTU_SCHED_CLOCK) + select HAVE_SCHED_CLOCK + default y + help + Use the always on PRCMU Timer as sched_clock diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index 85ad1646a7b..8d81a1d3265 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile @@ -9,3 +9,4 @@ obj-$(CONFIG_SH_TIMER_TMU) += sh_tmu.o obj-$(CONFIG_CLKBLD_I8253) += i8253.o obj-$(CONFIG_CLKSRC_MMIO) += mmio.o obj-$(CONFIG_DW_APB_TIMER) += dw_apb_timer.o +obj-$(CONFIG_CLKSRC_DBX500_PRCMU) += clksrc-dbx500-prcmu.o \ No newline at end of file diff --git a/drivers/clocksource/clksrc-dbx500-prcmu.c b/drivers/clocksource/clksrc-dbx500-prcmu.c new file mode 100644 index 00000000000..0ac5093a053 --- /dev/null +++ b/drivers/clocksource/clksrc-dbx500-prcmu.c @@ -0,0 +1,104 @@ +/* + * Copyright (C) ST-Ericsson SA 2011 + * + * License Terms: GNU General Public License v2 + * Author: Mattias Wallin for ST-Ericsson + * Author: Sundar Iyer for ST-Ericsson + * sched_clock implementation is based on: + * plat-nomadik/timer.c Linus Walleij + * + * DBx500-PRCMU Timer + * The PRCMU has 5 timers which are available in a always-on + * power domain. We use the Timer 4 for our always-on clock + * source on DB8500 and Timer 3 on DB5500. + */ +#include +#include + +#include + +#include +#include + +#define RATE_32K 32768 + +#define TIMER_MODE_CONTINOUS 0x1 +#define TIMER_DOWNCOUNT_VAL 0xffffffff + +#define PRCMU_TIMER_REF 0 +#define PRCMU_TIMER_DOWNCOUNT 0x4 +#define PRCMU_TIMER_MODE 0x8 + +#define SCHED_CLOCK_MIN_WRAP 131072 /* 2^32 / 32768 */ + +void __iomem *clksrc_dbx500_timer_base; + +static cycle_t clksrc_dbx500_prcmu_read(struct clocksource *cs) +{ + u32 count, count2; + + do { + count = readl(clksrc_dbx500_timer_base + + PRCMU_TIMER_DOWNCOUNT); + count2 = readl(clksrc_dbx500_timer_base + + PRCMU_TIMER_DOWNCOUNT); + } while (count2 != count); + + /* Negate because the timer is a decrementing counter */ + return ~count; +} + +static struct clocksource clocksource_dbx500_prcmu = { + .name = "dbx500-prcmu-timer", + .rating = 300, + .read = clksrc_dbx500_prcmu_read, + .shift = 10, + .mask = CLOCKSOURCE_MASK(32), + .flags = CLOCK_SOURCE_IS_CONTINUOUS, +}; + +#ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK +static DEFINE_CLOCK_DATA(cd); + +unsigned long long notrace sched_clock(void) +{ + u32 cyc; + + if (unlikely(!clksrc_dbx500_timer_base)) + return 0; + + cyc = clksrc_dbx500_prcmu_read(&clocksource_dbx500_prcmu); + + return cyc_to_sched_clock(&cd, cyc, (u32)~0); +} + +static void notrace clksrc_dbx500_prcmu_update_sched_clock(void) +{ + u32 cyc = clksrc_dbx500_prcmu_read(&clocksource_dbx500_prcmu); + update_sched_clock(&cd, cyc, (u32)~0); +} +#endif + +void __init clksrc_dbx500_prcmu_init(void) +{ + /* + * The A9 sub system expects the timer to be configured as + * a continous looping timer. + * The PRCMU should configure it but if it for some reason + * don't we do it here. + */ + if (readl(clksrc_dbx500_timer_base + PRCMU_TIMER_MODE) != + TIMER_MODE_CONTINOUS) { + writel(TIMER_MODE_CONTINOUS, + clksrc_dbx500_timer_base + PRCMU_TIMER_MODE); + writel(TIMER_DOWNCOUNT_VAL, + clksrc_dbx500_timer_base + PRCMU_TIMER_REF); + } +#ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK + init_sched_clock(&cd, clksrc_dbx500_prcmu_update_sched_clock, + 32, RATE_32K); +#endif + clocksource_calc_mult_shift(&clocksource_dbx500_prcmu, + RATE_32K, SCHED_CLOCK_MIN_WRAP); + clocksource_register(&clocksource_dbx500_prcmu); +} -- cgit v1.2.3-70-g09d2 From b1e3be0647fec81887e55edbda0c56c0445f7b53 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Mon, 3 Oct 2011 09:30:20 +0200 Subject: clocksource: fixup ux500 build problems Based on a patch from Arnd Bergmann this fixes up the build problem of assigning a non-existing global when the ux500 PRCMU timer is not linked in by passing its base address to the init function. We also add a missing inclusion and staticize the dummy function. Cc: Arnd Bergmann Signed-off-by: Linus Walleij --- arch/arm/mach-ux500/timer.c | 9 ++++++--- drivers/clocksource/clksrc-dbx500-prcmu.c | 6 ++++-- include/linux/clksrc-dbx500-prcmu.h | 6 ++---- 3 files changed, 12 insertions(+), 9 deletions(-) (limited to 'drivers/clocksource') diff --git a/arch/arm/mach-ux500/timer.c b/arch/arm/mach-ux500/timer.c index 08c55a53cb8..aea467d04ff 100644 --- a/arch/arm/mach-ux500/timer.c +++ b/arch/arm/mach-ux500/timer.c @@ -5,6 +5,7 @@ * Author: Mattias Wallin for ST-Ericsson */ #include +#include #include #include @@ -16,18 +17,20 @@ static void __init ux500_timer_init(void) { + void __iomem *prcmu_timer_base; + if (cpu_is_u5500()) { #ifdef CONFIG_LOCAL_TIMERS twd_base = __io_address(U5500_TWD_BASE); #endif mtu_base = __io_address(U5500_MTU0_BASE); - clksrc_dbx500_timer_base = __io_address(U5500_PRCMU_TIMER_3_BASE); + prcmu_timer_base = __io_address(U5500_PRCMU_TIMER_3_BASE); } else if (cpu_is_u8500()) { #ifdef CONFIG_LOCAL_TIMERS twd_base = __io_address(U8500_TWD_BASE); #endif mtu_base = __io_address(U8500_MTU0_BASE); - clksrc_dbx500_timer_base = __io_address(U8500_PRCMU_TIMER_4_BASE); + prcmu_timer_base = __io_address(U8500_PRCMU_TIMER_4_BASE); } else { ux500_unknown_soc(); } @@ -50,7 +53,7 @@ static void __init ux500_timer_init(void) */ nmdk_timer_init(); - clksrc_dbx500_prcmu_init(); + clksrc_dbx500_prcmu_init(prcmu_timer_base); } static void ux500_timer_reset(void) diff --git a/drivers/clocksource/clksrc-dbx500-prcmu.c b/drivers/clocksource/clksrc-dbx500-prcmu.c index 0ac5093a053..59feefe0e3e 100644 --- a/drivers/clocksource/clksrc-dbx500-prcmu.c +++ b/drivers/clocksource/clksrc-dbx500-prcmu.c @@ -31,7 +31,7 @@ #define SCHED_CLOCK_MIN_WRAP 131072 /* 2^32 / 32768 */ -void __iomem *clksrc_dbx500_timer_base; +static void __iomem *clksrc_dbx500_timer_base; static cycle_t clksrc_dbx500_prcmu_read(struct clocksource *cs) { @@ -79,8 +79,10 @@ static void notrace clksrc_dbx500_prcmu_update_sched_clock(void) } #endif -void __init clksrc_dbx500_prcmu_init(void) +void __init clksrc_dbx500_prcmu_init(void __iomem *base) { + clksrc_dbx500_timer_base = base; + /* * The A9 sub system expects the timer to be configured as * a continous looping timer. diff --git a/include/linux/clksrc-dbx500-prcmu.h b/include/linux/clksrc-dbx500-prcmu.h index d1e95042408..4fb8119c49e 100644 --- a/include/linux/clksrc-dbx500-prcmu.h +++ b/include/linux/clksrc-dbx500-prcmu.h @@ -11,12 +11,10 @@ #include #include -extern void __iomem *clksrc_dbx500_timer_base; - #ifdef CONFIG_CLKSRC_DBX500_PRCMU -void __init clksrc_dbx500_prcmu_init(void); +void __init clksrc_dbx500_prcmu_init(void __iomem *base); #else -void __init clksrc_dbx500_prcmu_init(void) {} +static inline void __init clksrc_dbx500_prcmu_init(void __iomem *base) {} #endif #endif -- cgit v1.2.3-70-g09d2