From f30f37def4c72e5df8d949022b806e5a4e99bbcb Mon Sep 17 00:00:00 2001 From: Michel Dänzer Date: Thu, 8 Oct 2009 10:44:09 +0200 Subject: drm/radeon/kms: Update memory bandwidth requirements in mode_set_base hook. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The hook may change the number of bytes per pixel being scanned out, which affects the CRTC memory bandwidth requirements. E.g. booting in 8bpp and then running X in 32bpp would result in the bandwidth requirements being underestimated for the latter and consequently in CRTC FIFO underruns causing visible artifacts with 3D intensive workloads. ATOM changes only compile-tested. Signed-off-by: Michel Dänzer Signed-off-by: Dave Airlie --- drivers/gpu/drm/radeon/atombios_crtc.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/drm/radeon/atombios_crtc.c') diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index 14fa9701aeb..38a87cc6eb1 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c @@ -563,6 +563,10 @@ int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y, radeon_fb = to_radeon_framebuffer(old_fb); radeon_gem_object_unpin(radeon_fb->obj); } + + /* Bytes per pixel may have changed */ + radeon_bandwidth_update(rdev); + return 0; } @@ -701,7 +705,6 @@ int atombios_crtc_mode_set(struct drm_crtc *crtc, } atombios_overscan_setup(crtc, mode, adjusted_mode); atombios_scaler_setup(crtc); - radeon_bandwidth_update(rdev); return 0; } -- cgit v1.2.3-70-g09d2