From ed29f894970065402e988088a19698f252b80144 Mon Sep 17 00:00:00 2001
From: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
Date: Sat, 22 Jun 2013 05:46:34 -0300
Subject: [media] media: i2c: ths8200: support asynchronous probing
This patch supports both synchronous and asynchronous
ths8200 subdevice probing.
Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/ths8200.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/ths8200.c b/drivers/media/i2c/ths8200.c
index a24f90c5261..cc1339a9746 100644
--- a/drivers/media/i2c/ths8200.c
+++ b/drivers/media/i2c/ths8200.c
@@ -21,6 +21,7 @@
#include <linux/module.h>
#include <linux/v4l2-dv-timings.h>
+#include <media/v4l2-async.h>
#include <media/v4l2-device.h>
#include "ths8200_regs.h"
@@ -500,6 +501,7 @@ static int ths8200_probe(struct i2c_client *client,
{
struct ths8200_state *state;
struct v4l2_subdev *sd;
+ int error;
/* Check if the adapter supports the needed features */
if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
@@ -517,6 +519,10 @@ static int ths8200_probe(struct i2c_client *client,
ths8200_core_init(sd);
+ error = v4l2_async_register_subdev(&state->sd);
+ if (error)
+ return error;
+
v4l2_info(sd, "%s found @ 0x%x (%s)\n", client->name,
client->addr << 1, client->adapter->name);
@@ -526,12 +532,13 @@ static int ths8200_probe(struct i2c_client *client,
static int ths8200_remove(struct i2c_client *client)
{
struct v4l2_subdev *sd = i2c_get_clientdata(client);
+ struct ths8200_state *decoder = to_state(sd);
v4l2_dbg(1, debug, sd, "%s removed @ 0x%x (%s)\n", client->name,
client->addr << 1, client->adapter->name);
ths8200_s_power(sd, false);
-
+ v4l2_async_unregister_subdev(&decoder->sd);
v4l2_device_unregister_subdev(sd);
return 0;
--
cgit v1.2.3-70-g09d2
From 0fb0f8f5ed9ff1419cd59834e4d1e95d19fb2eef Mon Sep 17 00:00:00 2001
From: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
Date: Sat, 22 Jun 2013 05:46:35 -0300
Subject: [media] media: i2c: ths8200: add OF support
add OF support for the ths8200 driver.
Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
.../devicetree/bindings/media/i2c/ths8200.txt | 19 +++++++++++++++++++
drivers/media/i2c/ths8200.c | 9 +++++++++
2 files changed, 28 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/i2c/ths8200.txt
(limited to 'drivers/media/i2c')
diff --git a/Documentation/devicetree/bindings/media/i2c/ths8200.txt b/Documentation/devicetree/bindings/media/i2c/ths8200.txt
new file mode 100644
index 00000000000..285f6ae7dfa
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/i2c/ths8200.txt
@@ -0,0 +1,19 @@
+* Texas Instruments THS8200 video encoder
+
+The ths8200 device is a digital to analog converter used in DVD players, video
+recorders, set-top boxes.
+
+Required Properties :
+- compatible : value must be "ti,ths8200"
+
+Example:
+
+ i2c0@1c22000 {
+ ...
+ ...
+ ths8200@5c {
+ compatible = "ti,ths8200";
+ reg = <0x5c>;
+ };
+ ...
+ };
diff --git a/drivers/media/i2c/ths8200.c b/drivers/media/i2c/ths8200.c
index cc1339a9746..8a29810d155 100644
--- a/drivers/media/i2c/ths8200.c
+++ b/drivers/media/i2c/ths8200.c
@@ -550,10 +550,19 @@ static struct i2c_device_id ths8200_id[] = {
};
MODULE_DEVICE_TABLE(i2c, ths8200_id);
+#if IS_ENABLED(CONFIG_OF)
+static const struct of_device_id ths8200_of_match[] = {
+ { .compatible = "ti,ths8200", },
+ { /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, ths8200_of_match);
+#endif
+
static struct i2c_driver ths8200_driver = {
.driver = {
.owner = THIS_MODULE,
.name = "ths8200",
+ .of_match_table = of_match_ptr(ths8200_of_match),
},
.probe = ths8200_probe,
.remove = ths8200_remove,
--
cgit v1.2.3-70-g09d2
From 6555cfc5e7f8080a76edc2f556c709770fc1db57 Mon Sep 17 00:00:00 2001
From: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
Date: Sat, 22 Jun 2013 06:07:37 -0300
Subject: [media] media: i2c: adv7343: add support for asynchronous probing
Both synchronous and asynchronous adv7343 subdevice probing is supported by
this patch.
Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/adv7343.c | 15 +++++++++++----
1 file changed, 11 insertions(+), 4 deletions(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/adv7343.c b/drivers/media/i2c/adv7343.c
index 7606218ec4a..8080c2cf102 100644
--- a/drivers/media/i2c/adv7343.c
+++ b/drivers/media/i2c/adv7343.c
@@ -27,6 +27,7 @@
#include <linux/uaccess.h>
#include <media/adv7343.h>
+#include <media/v4l2-async.h>
#include <media/v4l2-device.h>
#include <media/v4l2-ctrls.h>
@@ -445,16 +446,21 @@ static int adv7343_probe(struct i2c_client *client,
ADV7343_GAIN_DEF);
state->sd.ctrl_handler = &state->hdl;
if (state->hdl.error) {
- int err = state->hdl.error;
-
- v4l2_ctrl_handler_free(&state->hdl);
- return err;
+ err = state->hdl.error;
+ goto done;
}
v4l2_ctrl_handler_setup(&state->hdl);
err = adv7343_initialize(&state->sd);
if (err)
+ goto done;
+
+ err = v4l2_async_register_subdev(&state->sd);
+
+done:
+ if (err < 0)
v4l2_ctrl_handler_free(&state->hdl);
+
return err;
}
@@ -463,6 +469,7 @@ static int adv7343_remove(struct i2c_client *client)
struct v4l2_subdev *sd = i2c_get_clientdata(client);
struct adv7343_state *state = to_state(sd);
+ v4l2_async_unregister_subdev(&state->sd);
v4l2_device_unregister_subdev(sd);
v4l2_ctrl_handler_free(&state->hdl);
--
cgit v1.2.3-70-g09d2
From 25ba2c802f0c675bc846cc5d0adcaba5b76e6c1f Mon Sep 17 00:00:00 2001
From: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
Date: Sat, 22 Jun 2013 13:44:14 -0300
Subject: [media] media: i2c: tvp7002: add support for asynchronous probing
Both synchronous and asynchronous tvp7002 subdevice probing
is supported by this patch.
Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/tvp7002.c | 6 ++++++
1 file changed, 6 insertions(+)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/tvp7002.c b/drivers/media/i2c/tvp7002.c
index a4e49483de6..f6b1f3fe260 100644
--- a/drivers/media/i2c/tvp7002.c
+++ b/drivers/media/i2c/tvp7002.c
@@ -31,6 +31,7 @@
#include <linux/module.h>
#include <linux/v4l2-dv-timings.h>
#include <media/tvp7002.h>
+#include <media/v4l2-async.h>
#include <media/v4l2-device.h>
#include <media/v4l2-common.h>
#include <media/v4l2-ctrls.h>
@@ -1039,6 +1040,10 @@ static int tvp7002_probe(struct i2c_client *c, const struct i2c_device_id *id)
}
v4l2_ctrl_handler_setup(&device->hdl);
+ error = v4l2_async_register_subdev(&device->sd);
+ if (error)
+ goto error;
+
return 0;
error:
@@ -1063,6 +1068,7 @@ static int tvp7002_remove(struct i2c_client *c)
v4l2_dbg(1, debug, sd, "Removing tvp7002 adapter"
"on address 0x%x\n", c->addr);
+ v4l2_async_unregister_subdev(&device->sd);
#if defined(CONFIG_MEDIA_CONTROLLER)
media_entity_cleanup(&device->sd.entity);
#endif
--
cgit v1.2.3-70-g09d2
From 8f23acb52b168282dd818a48fb3d011ed4200978 Mon Sep 17 00:00:00 2001
From: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
Date: Mon, 24 Jun 2013 11:51:39 -0300
Subject: [media] media: i2c: tvp514x: add support for asynchronous probing
Both synchronous and asynchronous tvp514x subdevice probing
is supported by this patch.
This patch also fixes the error path by calling
media_entity_cleanup() on failure in probe when
CONFIG_MEDIA_CONTROLLER is enabled.
Signed-off-by: Prabhakar Lad <prabhakar.csengg@gmail.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/tvp514x.c | 20 ++++++++++++++------
1 file changed, 14 insertions(+), 6 deletions(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/tvp514x.c b/drivers/media/i2c/tvp514x.c
index 9c6d66a9868..91f3dd4cda1 100644
--- a/drivers/media/i2c/tvp514x.c
+++ b/drivers/media/i2c/tvp514x.c
@@ -36,6 +36,7 @@
#include <linux/module.h>
#include <linux/v4l2-mediabus.h>
+#include <media/v4l2-async.h>
#include <media/v4l2-device.h>
#include <media/v4l2-common.h>
#include <media/v4l2-mediabus.h>
@@ -1175,16 +1176,22 @@ tvp514x_probe(struct i2c_client *client, const struct i2c_device_id *id)
sd->ctrl_handler = &decoder->hdl;
if (decoder->hdl.error) {
ret = decoder->hdl.error;
-
- v4l2_ctrl_handler_free(&decoder->hdl);
- return ret;
+ goto done;
}
v4l2_ctrl_handler_setup(&decoder->hdl);
- v4l2_info(sd, "%s decoder driver registered !!\n", sd->name);
-
- return 0;
+ ret = v4l2_async_register_subdev(&decoder->sd);
+ if (!ret)
+ v4l2_info(sd, "%s decoder driver registered !!\n", sd->name);
+done:
+ if (ret < 0) {
+ v4l2_ctrl_handler_free(&decoder->hdl);
+#if defined(CONFIG_MEDIA_CONTROLLER)
+ media_entity_cleanup(&decoder->sd.entity);
+#endif
+ }
+ return ret;
}
/**
@@ -1199,6 +1206,7 @@ static int tvp514x_remove(struct i2c_client *client)
struct v4l2_subdev *sd = i2c_get_clientdata(client);
struct tvp514x_decoder *decoder = to_decoder(sd);
+ v4l2_async_unregister_subdev(&decoder->sd);
v4l2_device_unregister_subdev(sd);
#if defined(CONFIG_MEDIA_CONTROLLER)
media_entity_cleanup(&decoder->sd.entity);
--
cgit v1.2.3-70-g09d2
From 5e95814ff3f2a6ea7d76e822bbc3b0c0b94495a4 Mon Sep 17 00:00:00 2001
From: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
Date: Sat, 20 Jul 2013 02:21:05 -0300
Subject: [media] media: i2c: adv7343: make the platform data members as array
This patch makes the platform data members as array wherever
possible, so as this makes easier while collecting the data
in DT case and read the entire array at once.
This patch also makes appropriate changes to board-da850-evm.c
Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
arch/arm/mach-davinci/board-da850-evm.c | 6 ++----
drivers/media/i2c/adv7343.c | 28 ++++++++++++++--------------
include/media/adv7343.h | 20 ++++----------------
3 files changed, 20 insertions(+), 34 deletions(-)
(limited to 'drivers/media/i2c')
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index bea6793a7ed..9f09f45835f 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -1249,12 +1249,10 @@ static struct vpif_capture_config da850_vpif_capture_config = {
static struct adv7343_platform_data adv7343_pdata = {
.mode_config = {
- .dac_3 = 1,
- .dac_2 = 1,
- .dac_1 = 1,
+ .dac = { 1, 1, 1 },
},
.sd_config = {
- .sd_dac_out1 = 1,
+ .sd_dac_out = { 1 },
},
};
diff --git a/drivers/media/i2c/adv7343.c b/drivers/media/i2c/adv7343.c
index 8080c2cf102..f0238fb3e3e 100644
--- a/drivers/media/i2c/adv7343.c
+++ b/drivers/media/i2c/adv7343.c
@@ -227,12 +227,12 @@ static int adv7343_setoutput(struct v4l2_subdev *sd, u32 output_type)
else
val = state->pdata->mode_config.sleep_mode << 0 |
state->pdata->mode_config.pll_control << 1 |
- state->pdata->mode_config.dac_3 << 2 |
- state->pdata->mode_config.dac_2 << 3 |
- state->pdata->mode_config.dac_1 << 4 |
- state->pdata->mode_config.dac_6 << 5 |
- state->pdata->mode_config.dac_5 << 6 |
- state->pdata->mode_config.dac_4 << 7;
+ state->pdata->mode_config.dac[2] << 2 |
+ state->pdata->mode_config.dac[1] << 3 |
+ state->pdata->mode_config.dac[0] << 4 |
+ state->pdata->mode_config.dac[5] << 5 |
+ state->pdata->mode_config.dac[4] << 6 |
+ state->pdata->mode_config.dac[3] << 7;
err = adv7343_write(sd, ADV7343_POWER_MODE_REG, val);
if (err < 0)
@@ -251,15 +251,15 @@ static int adv7343_setoutput(struct v4l2_subdev *sd, u32 output_type)
/* configure SD DAC Output 2 and SD DAC Output 1 bit to zero */
val = state->reg82 & (SD_DAC_1_DI & SD_DAC_2_DI);
- if (state->pdata && state->pdata->sd_config.sd_dac_out1)
- val = val | (state->pdata->sd_config.sd_dac_out1 << 1);
- else if (state->pdata && !state->pdata->sd_config.sd_dac_out1)
- val = val & ~(state->pdata->sd_config.sd_dac_out1 << 1);
+ if (state->pdata && state->pdata->sd_config.sd_dac_out[0])
+ val = val | (state->pdata->sd_config.sd_dac_out[0] << 1);
+ else if (state->pdata && !state->pdata->sd_config.sd_dac_out[0])
+ val = val & ~(state->pdata->sd_config.sd_dac_out[0] << 1);
- if (state->pdata && state->pdata->sd_config.sd_dac_out2)
- val = val | (state->pdata->sd_config.sd_dac_out2 << 2);
- else if (state->pdata && !state->pdata->sd_config.sd_dac_out2)
- val = val & ~(state->pdata->sd_config.sd_dac_out2 << 2);
+ if (state->pdata && state->pdata->sd_config.sd_dac_out[1])
+ val = val | (state->pdata->sd_config.sd_dac_out[1] << 2);
+ else if (state->pdata && !state->pdata->sd_config.sd_dac_out[1])
+ val = val & ~(state->pdata->sd_config.sd_dac_out[1] << 2);
err = adv7343_write(sd, ADV7343_SD_MODE_REG2, val);
if (err < 0)
diff --git a/include/media/adv7343.h b/include/media/adv7343.h
index 944757be49b..e4142b1ef8c 100644
--- a/include/media/adv7343.h
+++ b/include/media/adv7343.h
@@ -28,12 +28,7 @@
* @pll_control: PLL and oversampling control. This control allows internal
* PLL 1 circuit to be powered down and the oversampling to be
* switched off.
- * @dac_1: power on/off DAC 1.
- * @dac_2: power on/off DAC 2.
- * @dac_3: power on/off DAC 3.
- * @dac_4: power on/off DAC 4.
- * @dac_5: power on/off DAC 5.
- * @dac_6: power on/off DAC 6.
+ * @dac: array to configure power on/off DAC's 1..6
*
* Power mode register (Register 0x0), for more info refer REGISTER MAP ACCESS
* section of datasheet[1], table 17 page no 30.
@@ -43,23 +38,16 @@
struct adv7343_power_mode {
bool sleep_mode;
bool pll_control;
- bool dac_1;
- bool dac_2;
- bool dac_3;
- bool dac_4;
- bool dac_5;
- bool dac_6;
+ u32 dac[6];
};
/**
* struct adv7343_sd_config - SD Only Output Configuration.
- * @sd_dac_out1: Configure SD DAC Output 1.
- * @sd_dac_out2: Configure SD DAC Output 2.
+ * @sd_dac_out: array configuring SD DAC Outputs 1 and 2
*/
struct adv7343_sd_config {
/* SD only Output Configuration */
- bool sd_dac_out1;
- bool sd_dac_out2;
+ u32 sd_dac_out[2];
};
/**
--
cgit v1.2.3-70-g09d2
From 187d42d6da62aa3eb3d76866584382625f141b3c Mon Sep 17 00:00:00 2001
From: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
Date: Sat, 20 Jul 2013 02:21:06 -0300
Subject: [media] media: i2c: adv7343: add OF support
add OF support for the adv7343 driver.
Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
.../devicetree/bindings/media/i2c/adv7343.txt | 48 ++++++++++++++++++++++
drivers/media/i2c/adv7343.c | 46 ++++++++++++++++++++-
2 files changed, 93 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/media/i2c/adv7343.txt
(limited to 'drivers/media/i2c')
diff --git a/Documentation/devicetree/bindings/media/i2c/adv7343.txt b/Documentation/devicetree/bindings/media/i2c/adv7343.txt
new file mode 100644
index 00000000000..5653bc2428b
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/i2c/adv7343.txt
@@ -0,0 +1,48 @@
+* Analog Devices adv7343 video encoder
+
+The ADV7343 are high speed, digital-to-analog video encoders in a 64-lead LQFP
+package. Six high speed, 3.3 V, 11-bit video DACs provide support for composite
+(CVBS), S-Video (Y-C), and component (YPrPb/RGB) analog outputs in standard
+definition (SD), enhanced definition (ED), or high definition (HD) video
+formats.
+
+Required Properties :
+- compatible: Must be "adi,adv7343"
+
+Optional Properties :
+- adi,power-mode-sleep-mode: on enable the current consumption is reduced to
+ micro ampere level. All DACs and the internal PLL
+ circuit are disabled.
+- adi,power-mode-pll-ctrl: PLL and oversampling control. This control allows
+ internal PLL 1 circuit to be powered down and the
+ oversampling to be switched off.
+- ad,adv7343-power-mode-dac: array configuring the power on/off DAC's 1..6,
+ 0 = OFF and 1 = ON, Default value when this
+ property is not specified is <0 0 0 0 0 0>.
+- ad,adv7343-sd-config-dac-out: array configure SD DAC Output's 1 and 2, 0 = OFF
+ and 1 = ON, Default value when this property is
+ not specified is <0 0>.
+
+Example:
+
+i2c0@1c22000 {
+ ...
+ ...
+
+ adv7343@2a {
+ compatible = "adi,adv7343";
+ reg = <0x2a>;
+
+ port {
+ adv7343_1: endpoint {
+ adi,power-mode-sleep-mode;
+ adi,power-mode-pll-ctrl;
+ /* Use DAC1..3, DAC6 */
+ adi,dac-enable = <1 1 1 0 0 1>;
+ /* Use SD DAC output 1 */
+ adi,sd-dac-enable = <1 0>;
+ };
+ };
+ };
+ ...
+};
diff --git a/drivers/media/i2c/adv7343.c b/drivers/media/i2c/adv7343.c
index f0238fb3e3e..aeb56c53e39 100644
--- a/drivers/media/i2c/adv7343.c
+++ b/drivers/media/i2c/adv7343.c
@@ -30,6 +30,7 @@
#include <media/v4l2-async.h>
#include <media/v4l2-device.h>
#include <media/v4l2-ctrls.h>
+#include <media/v4l2-of.h>
#include "adv7343_regs.h"
@@ -399,6 +400,40 @@ static int adv7343_initialize(struct v4l2_subdev *sd)
return err;
}
+static struct adv7343_platform_data *
+adv7343_get_pdata(struct i2c_client *client)
+{
+ struct adv7343_platform_data *pdata;
+ struct device_node *np;
+
+ if (!IS_ENABLED(CONFIG_OF) || !client->dev.of_node)
+ return client->dev.platform_data;
+
+ np = v4l2_of_get_next_endpoint(client->dev.of_node, NULL);
+ if (!np)
+ return NULL;
+
+ pdata = devm_kzalloc(&client->dev, sizeof(*pdata), GFP_KERNEL);
+ if (!pdata)
+ goto done;
+
+ pdata->mode_config.sleep_mode =
+ of_property_read_bool(np, "adi,power-mode-sleep-mode");
+
+ pdata->mode_config.pll_control =
+ of_property_read_bool(np, "adi,power-mode-pll-ctrl");
+
+ of_property_read_u32_array(np, "adi,dac-enable",
+ pdata->mode_config.dac, 6);
+
+ of_property_read_u32_array(np, "adi,sd-dac-enable",
+ pdata->sd_config.sd_dac_out, 2);
+
+done:
+ of_node_put(np);
+ return pdata;
+}
+
static int adv7343_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
@@ -417,7 +452,7 @@ static int adv7343_probe(struct i2c_client *client,
return -ENOMEM;
/* Copy board specific information here */
- state->pdata = client->dev.platform_data;
+ state->pdata = adv7343_get_pdata(client);
state->reg00 = 0x80;
state->reg01 = 0x00;
@@ -483,8 +518,17 @@ static const struct i2c_device_id adv7343_id[] = {
MODULE_DEVICE_TABLE(i2c, adv7343_id);
+#if IS_ENABLED(CONFIG_OF)
+static const struct of_device_id adv7343_of_match[] = {
+ {.compatible = "adi,adv7343", },
+ { /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, adv7343_of_match);
+#endif
+
static struct i2c_driver adv7343_driver = {
.driver = {
+ .of_match_table = of_match_ptr(adv7343_of_match),
.owner = THIS_MODULE,
.name = "adv7343",
},
--
cgit v1.2.3-70-g09d2
From 2fa8de191cd96658b881b5425e59d10d3d48281e Mon Sep 17 00:00:00 2001
From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Date: Mon, 15 Jul 2013 15:12:21 -0300
Subject: [media] ml86v7667: override default field interlace order
ML86V7667 always transmits top field first for both PAL and NTSC -- that makes
application incorrectly treat interlaced fields when relying on the standard.
Hence we must set V4L2_FIELD_INTERLACED_TB format explicitly.
[Sergei: added a comment.]
Reported-by: Katsuya MATSUBARA <matsu@igel.co.jp>
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Tested-by: Katsuya MATSUBARA <matsu@igel.co.jp>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/ml86v7667.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/ml86v7667.c b/drivers/media/i2c/ml86v7667.c
index efdc873e58d..dd1e6c9347f 100644
--- a/drivers/media/i2c/ml86v7667.c
+++ b/drivers/media/i2c/ml86v7667.c
@@ -209,7 +209,8 @@ static int ml86v7667_mbus_fmt(struct v4l2_subdev *sd,
fmt->code = V4L2_MBUS_FMT_YUYV8_2X8;
fmt->colorspace = V4L2_COLORSPACE_SMPTE170M;
- fmt->field = V4L2_FIELD_INTERLACED;
+ /* The top field is always transferred first by the chip */
+ fmt->field = V4L2_FIELD_INTERLACED_TB;
fmt->width = 720;
fmt->height = priv->std & V4L2_STD_525_60 ? 480 : 576;
--
cgit v1.2.3-70-g09d2
From 2576415846bcbad3c0a6885fc44f950837106364 Mon Sep 17 00:00:00 2001
From: Hans Verkuil <hans.verkuil@cisco.com>
Date: Mon, 29 Jul 2013 08:40:56 -0300
Subject: [media] v4l2: move dv-timings related code to v4l2-dv-timings.c
v4l2-common.c contained a bunch of dv-timings related functions.
Move that to the new v4l2-dv-timings.c which is a more appropriate
place for them.
There aren't many drivers that do HDTV, so it is a good idea to separate
common code related to that into a module of its own.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Acked-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/ad9389b.c | 1 +
drivers/media/i2c/adv7604.c | 1 +
drivers/media/i2c/ths8200.c | 1 +
drivers/media/usb/hdpvr/hdpvr-video.c | 1 +
drivers/media/v4l2-core/v4l2-common.c | 357 -----------------------------
drivers/media/v4l2-core/v4l2-dv-timings.c | 358 +++++++++++++++++++++++++++++-
include/media/v4l2-common.h | 13 --
include/media/v4l2-dv-timings.h | 59 +++++
8 files changed, 420 insertions(+), 371 deletions(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/ad9389b.c b/drivers/media/i2c/ad9389b.c
index ba4364dfae6..2fa8d7286ce 100644
--- a/drivers/media/i2c/ad9389b.c
+++ b/drivers/media/i2c/ad9389b.c
@@ -33,6 +33,7 @@
#include <linux/v4l2-dv-timings.h>
#include <media/v4l2-device.h>
#include <media/v4l2-common.h>
+#include <media/v4l2-dv-timings.h>
#include <media/v4l2-ctrls.h>
#include <media/ad9389b.h>
diff --git a/drivers/media/i2c/adv7604.c b/drivers/media/i2c/adv7604.c
index 1d675b58fd7..181a6c35933 100644
--- a/drivers/media/i2c/adv7604.c
+++ b/drivers/media/i2c/adv7604.c
@@ -38,6 +38,7 @@
#include <linux/v4l2-dv-timings.h>
#include <media/v4l2-device.h>
#include <media/v4l2-ctrls.h>
+#include <media/v4l2-dv-timings.h>
#include <media/adv7604.h>
static int debug;
diff --git a/drivers/media/i2c/ths8200.c b/drivers/media/i2c/ths8200.c
index 8a29810d155..aef7c0e7cd6 100644
--- a/drivers/media/i2c/ths8200.c
+++ b/drivers/media/i2c/ths8200.c
@@ -21,6 +21,7 @@
#include <linux/module.h>
#include <linux/v4l2-dv-timings.h>
+#include <media/v4l2-dv-timings.h>
#include <media/v4l2-async.h>
#include <media/v4l2-device.h>
diff --git a/drivers/media/usb/hdpvr/hdpvr-video.c b/drivers/media/usb/hdpvr/hdpvr-video.c
index 4f8567aa99d..9c67b6e127e 100644
--- a/drivers/media/usb/hdpvr/hdpvr-video.c
+++ b/drivers/media/usb/hdpvr/hdpvr-video.c
@@ -24,6 +24,7 @@
#include <linux/v4l2-dv-timings.h>
#include <media/v4l2-dev.h>
#include <media/v4l2-common.h>
+#include <media/v4l2-dv-timings.h>
#include <media/v4l2-ioctl.h>
#include <media/v4l2-event.h>
#include "hdpvr.h"
diff --git a/drivers/media/v4l2-core/v4l2-common.c b/drivers/media/v4l2-core/v4l2-common.c
index a95e5e23403..037d7a55aa8 100644
--- a/drivers/media/v4l2-core/v4l2-common.c
+++ b/drivers/media/v4l2-core/v4l2-common.c
@@ -495,363 +495,6 @@ void v4l_bound_align_image(u32 *w, unsigned int wmin, unsigned int wmax,
}
EXPORT_SYMBOL_GPL(v4l_bound_align_image);
-/**
- * v4l_match_dv_timings - check if two timings match
- * @t1 - compare this v4l2_dv_timings struct...
- * @t2 - with this struct.
- * @pclock_delta - the allowed pixelclock deviation.
- *
- * Compare t1 with t2 with a given margin of error for the pixelclock.
- */
-bool v4l_match_dv_timings(const struct v4l2_dv_timings *t1,
- const struct v4l2_dv_timings *t2,
- unsigned pclock_delta)
-{
- if (t1->type != t2->type || t1->type != V4L2_DV_BT_656_1120)
- return false;
- if (t1->bt.width == t2->bt.width &&
- t1->bt.height == t2->bt.height &&
- t1->bt.interlaced == t2->bt.interlaced &&
- t1->bt.polarities == t2->bt.polarities &&
- t1->bt.pixelclock >= t2->bt.pixelclock - pclock_delta &&
- t1->bt.pixelclock <= t2->bt.pixelclock + pclock_delta &&
- t1->bt.hfrontporch == t2->bt.hfrontporch &&
- t1->bt.vfrontporch == t2->bt.vfrontporch &&
- t1->bt.vsync == t2->bt.vsync &&
- t1->bt.vbackporch == t2->bt.vbackporch &&
- (!t1->bt.interlaced ||
- (t1->bt.il_vfrontporch == t2->bt.il_vfrontporch &&
- t1->bt.il_vsync == t2->bt.il_vsync &&
- t1->bt.il_vbackporch == t2->bt.il_vbackporch)))
- return true;
- return false;
-}
-EXPORT_SYMBOL_GPL(v4l_match_dv_timings);
-
-/*
- * CVT defines
- * Based on Coordinated Video Timings Standard
- * version 1.1 September 10, 2003
- */
-
-#define CVT_PXL_CLK_GRAN 250000 /* pixel clock granularity */
-
-/* Normal blanking */
-#define CVT_MIN_V_BPORCH 7 /* lines */
-#define CVT_MIN_V_PORCH_RND 3 /* lines */
-#define CVT_MIN_VSYNC_BP 550 /* min time of vsync + back porch (us) */
-
-/* Normal blanking for CVT uses GTF to calculate horizontal blanking */
-#define CVT_CELL_GRAN 8 /* character cell granularity */
-#define CVT_M 600 /* blanking formula gradient */
-#define CVT_C 40 /* blanking formula offset */
-#define CVT_K 128 /* blanking formula scaling factor */
-#define CVT_J 20 /* blanking formula scaling factor */
-#define CVT_C_PRIME (((CVT_C - CVT_J) * CVT_K / 256) + CVT_J)
-#define CVT_M_PRIME (CVT_K * CVT_M / 256)
-
-/* Reduced Blanking */
-#define CVT_RB_MIN_V_BPORCH 7 /* lines */
-#define CVT_RB_V_FPORCH 3 /* lines */
-#define CVT_RB_MIN_V_BLANK 460 /* us */
-#define CVT_RB_H_SYNC 32 /* pixels */
-#define CVT_RB_H_BPORCH 80 /* pixels */
-#define CVT_RB_H_BLANK 160 /* pixels */
-
-/** v4l2_detect_cvt - detect if the given timings follow the CVT standard
- * @frame_height - the total height of the frame (including blanking) in lines.
- * @hfreq - the horizontal frequency in Hz.
- * @vsync - the height of the vertical sync in lines.
- * @polarities - the horizontal and vertical polarities (same as struct
- * v4l2_bt_timings polarities).
- * @fmt - the resulting timings.
- *
- * This function will attempt to detect if the given values correspond to a
- * valid CVT format. If so, then it will return true, and fmt will be filled
- * in with the found CVT timings.
- */
-bool v4l2_detect_cvt(unsigned frame_height, unsigned hfreq, unsigned vsync,
- u32 polarities, struct v4l2_dv_timings *fmt)
-{
- int v_fp, v_bp, h_fp, h_bp, hsync;
- int frame_width, image_height, image_width;
- bool reduced_blanking;
- unsigned pix_clk;
-
- if (vsync < 4 || vsync > 7)
- return false;
-
- if (polarities == V4L2_DV_VSYNC_POS_POL)
- reduced_blanking = false;
- else if (polarities == V4L2_DV_HSYNC_POS_POL)
- reduced_blanking = true;
- else
- return false;
-
- /* Vertical */
- if (reduced_blanking) {
- v_fp = CVT_RB_V_FPORCH;
- v_bp = (CVT_RB_MIN_V_BLANK * hfreq + 999999) / 1000000;
- v_bp -= vsync + v_fp;
-
- if (v_bp < CVT_RB_MIN_V_BPORCH)
- v_bp = CVT_RB_MIN_V_BPORCH;
- } else {
- v_fp = CVT_MIN_V_PORCH_RND;
- v_bp = (CVT_MIN_VSYNC_BP * hfreq + 999999) / 1000000 - vsync;
-
- if (v_bp < CVT_MIN_V_BPORCH)
- v_bp = CVT_MIN_V_BPORCH;
- }
- image_height = (frame_height - v_fp - vsync - v_bp + 1) & ~0x1;
-
- /* Aspect ratio based on vsync */
- switch (vsync) {
- case 4:
- image_width = (image_height * 4) / 3;
- break;
- case 5:
- image_width = (image_height * 16) / 9;
- break;
- case 6:
- image_width = (image_height * 16) / 10;
- break;
- case 7:
- /* special case */
- if (image_height == 1024)
- image_width = (image_height * 5) / 4;
- else if (image_height == 768)
- image_width = (image_height * 15) / 9;
- else
- return false;
- break;
- default:
- return false;
- }
-
- image_width = image_width & ~7;
-
- /* Horizontal */
- if (reduced_blanking) {
- pix_clk = (image_width + CVT_RB_H_BLANK) * hfreq;
- pix_clk = (pix_clk / CVT_PXL_CLK_GRAN) * CVT_PXL_CLK_GRAN;
-
- h_bp = CVT_RB_H_BPORCH;
- hsync = CVT_RB_H_SYNC;
- h_fp = CVT_RB_H_BLANK - h_bp - hsync;
-
- frame_width = image_width + CVT_RB_H_BLANK;
- } else {
- int h_blank;
- unsigned ideal_duty_cycle = CVT_C_PRIME - (CVT_M_PRIME * 1000) / hfreq;
-
- h_blank = (image_width * ideal_duty_cycle + (100 - ideal_duty_cycle) / 2) /
- (100 - ideal_duty_cycle);
- h_blank = h_blank - h_blank % (2 * CVT_CELL_GRAN);
-
- if (h_blank * 100 / image_width < 20) {
- h_blank = image_width / 5;
- h_blank = (h_blank + 0x7) & ~0x7;
- }
-
- pix_clk = (image_width + h_blank) * hfreq;
- pix_clk = (pix_clk / CVT_PXL_CLK_GRAN) * CVT_PXL_CLK_GRAN;
-
- h_bp = h_blank / 2;
- frame_width = image_width + h_blank;
-
- hsync = (frame_width * 8 + 50) / 100;
- hsync = hsync - hsync % CVT_CELL_GRAN;
- h_fp = h_blank - hsync - h_bp;
- }
-
- fmt->bt.polarities = polarities;
- fmt->bt.width = image_width;
- fmt->bt.height = image_height;
- fmt->bt.hfrontporch = h_fp;
- fmt->bt.vfrontporch = v_fp;
- fmt->bt.hsync = hsync;
- fmt->bt.vsync = vsync;
- fmt->bt.hbackporch = frame_width - image_width - h_fp - hsync;
- fmt->bt.vbackporch = frame_height - image_height - v_fp - vsync;
- fmt->bt.pixelclock = pix_clk;
- fmt->bt.standards = V4L2_DV_BT_STD_CVT;
- if (reduced_blanking)
- fmt->bt.flags |= V4L2_DV_FL_REDUCED_BLANKING;
- return true;
-}
-EXPORT_SYMBOL_GPL(v4l2_detect_cvt);
-
-/*
- * GTF defines
- * Based on Generalized Timing Formula Standard
- * Version 1.1 September 2, 1999
- */
-
-#define GTF_PXL_CLK_GRAN 250000 /* pixel clock granularity */
-
-#define GTF_MIN_VSYNC_BP 550 /* min time of vsync + back porch (us) */
-#define GTF_V_FP 1 /* vertical front porch (lines) */
-#define GTF_CELL_GRAN 8 /* character cell granularity */
-
-/* Default */
-#define GTF_D_M 600 /* blanking formula gradient */
-#define GTF_D_C 40 /* blanking formula offset */
-#define GTF_D_K 128 /* blanking formula scaling factor */
-#define GTF_D_J 20 /* blanking formula scaling factor */
-#define GTF_D_C_PRIME ((((GTF_D_C - GTF_D_J) * GTF_D_K) / 256) + GTF_D_J)
-#define GTF_D_M_PRIME ((GTF_D_K * GTF_D_M) / 256)
-
-/* Secondary */
-#define GTF_S_M 3600 /* blanking formula gradient */
-#define GTF_S_C 40 /* blanking formula offset */
-#define GTF_S_K 128 /* blanking formula scaling factor */
-#define GTF_S_J 35 /* blanking formula scaling factor */
-#define GTF_S_C_PRIME ((((GTF_S_C - GTF_S_J) * GTF_S_K) / 256) + GTF_S_J)
-#define GTF_S_M_PRIME ((GTF_S_K * GTF_S_M) / 256)
-
-/** v4l2_detect_gtf - detect if the given timings follow the GTF standard
- * @frame_height - the total height of the frame (including blanking) in lines.
- * @hfreq - the horizontal frequency in Hz.
- * @vsync - the height of the vertical sync in lines.
- * @polarities - the horizontal and vertical polarities (same as struct
- * v4l2_bt_timings polarities).
- * @aspect - preferred aspect ratio. GTF has no method of determining the
- * aspect ratio in order to derive the image width from the
- * image height, so it has to be passed explicitly. Usually
- * the native screen aspect ratio is used for this. If it
- * is not filled in correctly, then 16:9 will be assumed.
- * @fmt - the resulting timings.
- *
- * This function will attempt to detect if the given values correspond to a
- * valid GTF format. If so, then it will return true, and fmt will be filled
- * in with the found GTF timings.
- */
-bool v4l2_detect_gtf(unsigned frame_height,
- unsigned hfreq,
- unsigned vsync,
- u32 polarities,
- struct v4l2_fract aspect,
- struct v4l2_dv_timings *fmt)
-{
- int pix_clk;
- int v_fp, v_bp, h_fp, hsync;
- int frame_width, image_height, image_width;
- bool default_gtf;
- int h_blank;
-
- if (vsync != 3)
- return false;
-
- if (polarities == V4L2_DV_VSYNC_POS_POL)
- default_gtf = true;
- else if (polarities == V4L2_DV_HSYNC_POS_POL)
- default_gtf = false;
- else
- return false;
-
- /* Vertical */
- v_fp = GTF_V_FP;
- v_bp = (GTF_MIN_VSYNC_BP * hfreq + 999999) / 1000000 - vsync;
- image_height = (frame_height - v_fp - vsync - v_bp + 1) & ~0x1;
-
- if (aspect.numerator == 0 || aspect.denominator == 0) {
- aspect.numerator = 16;
- aspect.denominator = 9;
- }
- image_width = ((image_height * aspect.numerator) / aspect.denominator);
-
- /* Horizontal */
- if (default_gtf)
- h_blank = ((image_width * GTF_D_C_PRIME * hfreq) -
- (image_width * GTF_D_M_PRIME * 1000) +
- (hfreq * (100 - GTF_D_C_PRIME) + GTF_D_M_PRIME * 1000) / 2) /
- (hfreq * (100 - GTF_D_C_PRIME) + GTF_D_M_PRIME * 1000);
- else
- h_blank = ((image_width * GTF_S_C_PRIME * hfreq) -
- (image_width * GTF_S_M_PRIME * 1000) +
- (hfreq * (100 - GTF_S_C_PRIME) + GTF_S_M_PRIME * 1000) / 2) /
- (hfreq * (100 - GTF_S_C_PRIME) + GTF_S_M_PRIME * 1000);
-
- h_blank = h_blank - h_blank % (2 * GTF_CELL_GRAN);
- frame_width = image_width + h_blank;
-
- pix_clk = (image_width + h_blank) * hfreq;
- pix_clk = pix_clk / GTF_PXL_CLK_GRAN * GTF_PXL_CLK_GRAN;
-
- hsync = (frame_width * 8 + 50) / 100;
- hsync = hsync - hsync % GTF_CELL_GRAN;
-
- h_fp = h_blank / 2 - hsync;
-
- fmt->bt.polarities = polarities;
- fmt->bt.width = image_width;
- fmt->bt.height = image_height;
- fmt->bt.hfrontporch = h_fp;
- fmt->bt.vfrontporch = v_fp;
- fmt->bt.hsync = hsync;
- fmt->bt.vsync = vsync;
- fmt->bt.hbackporch = frame_width - image_width - h_fp - hsync;
- fmt->bt.vbackporch = frame_height - image_height - v_fp - vsync;
- fmt->bt.pixelclock = pix_clk;
- fmt->bt.standards = V4L2_DV_BT_STD_GTF;
- if (!default_gtf)
- fmt->bt.flags |= V4L2_DV_FL_REDUCED_BLANKING;
- return true;
-}
-EXPORT_SYMBOL_GPL(v4l2_detect_gtf);
-
-/** v4l2_calc_aspect_ratio - calculate the aspect ratio based on bytes
- * 0x15 and 0x16 from the EDID.
- * @hor_landscape - byte 0x15 from the EDID.
- * @vert_portrait - byte 0x16 from the EDID.
- *
- * Determines the aspect ratio from the EDID.
- * See VESA Enhanced EDID standard, release A, rev 2, section 3.6.2:
- * "Horizontal and Vertical Screen Size or Aspect Ratio"
- */
-struct v4l2_fract v4l2_calc_aspect_ratio(u8 hor_landscape, u8 vert_portrait)
-{
- struct v4l2_fract aspect = { 16, 9 };
- u32 tmp;
- u8 ratio;
-
- /* Nothing filled in, fallback to 16:9 */
- if (!hor_landscape && !vert_portrait)
- return aspect;
- /* Both filled in, so they are interpreted as the screen size in cm */
- if (hor_landscape && vert_portrait) {
- aspect.numerator = hor_landscape;
- aspect.denominator = vert_portrait;
- return aspect;
- }
- /* Only one is filled in, so interpret them as a ratio:
- (val + 99) / 100 */
- ratio = hor_landscape | vert_portrait;
- /* Change some rounded values into the exact aspect ratio */
- if (ratio == 79) {
- aspect.numerator = 16;
- aspect.denominator = 9;
- } else if (ratio == 34) {
- aspect.numerator = 4;
- aspect.numerator = 3;
- } else if (ratio == 68) {
- aspect.numerator = 15;
- aspect.numerator = 9;
- } else {
- aspect.numerator = hor_landscape + 99;
- aspect.denominator = 100;
- }
- if (hor_landscape)
- return aspect;
- /* The aspect ratio is for portrait, so swap numerator and denominator */
- tmp = aspect.denominator;
- aspect.denominator = aspect.numerator;
- aspect.numerator = tmp;
- return aspect;
-}
-EXPORT_SYMBOL_GPL(v4l2_calc_aspect_ratio);
-
const struct v4l2_frmsize_discrete *v4l2_find_nearest_format(
const struct v4l2_discrete_probe *probe,
s32 width, s32 height)
diff --git a/drivers/media/v4l2-core/v4l2-dv-timings.c b/drivers/media/v4l2-core/v4l2-dv-timings.c
index 58279467a7a..f20b316f7d0 100644
--- a/drivers/media/v4l2-core/v4l2-dv-timings.c
+++ b/drivers/media/v4l2-core/v4l2-dv-timings.c
@@ -24,7 +24,6 @@
#include <linux/errno.h>
#include <linux/videodev2.h>
#include <linux/v4l2-dv-timings.h>
-#include <media/v4l2-common.h>
#include <media/v4l2-dv-timings.h>
static const struct v4l2_dv_timings timings[] = {
@@ -190,3 +189,360 @@ bool v4l2_find_dv_timings_cap(struct v4l2_dv_timings *t,
return false;
}
EXPORT_SYMBOL_GPL(v4l2_find_dv_timings_cap);
+
+/**
+ * v4l_match_dv_timings - check if two timings match
+ * @t1 - compare this v4l2_dv_timings struct...
+ * @t2 - with this struct.
+ * @pclock_delta - the allowed pixelclock deviation.
+ *
+ * Compare t1 with t2 with a given margin of error for the pixelclock.
+ */
+bool v4l_match_dv_timings(const struct v4l2_dv_timings *t1,
+ const struct v4l2_dv_timings *t2,
+ unsigned pclock_delta)
+{
+ if (t1->type != t2->type || t1->type != V4L2_DV_BT_656_1120)
+ return false;
+ if (t1->bt.width == t2->bt.width &&
+ t1->bt.height == t2->bt.height &&
+ t1->bt.interlaced == t2->bt.interlaced &&
+ t1->bt.polarities == t2->bt.polarities &&
+ t1->bt.pixelclock >= t2->bt.pixelclock - pclock_delta &&
+ t1->bt.pixelclock <= t2->bt.pixelclock + pclock_delta &&
+ t1->bt.hfrontporch == t2->bt.hfrontporch &&
+ t1->bt.vfrontporch == t2->bt.vfrontporch &&
+ t1->bt.vsync == t2->bt.vsync &&
+ t1->bt.vbackporch == t2->bt.vbackporch &&
+ (!t1->bt.interlaced ||
+ (t1->bt.il_vfrontporch == t2->bt.il_vfrontporch &&
+ t1->bt.il_vsync == t2->bt.il_vsync &&
+ t1->bt.il_vbackporch == t2->bt.il_vbackporch)))
+ return true;
+ return false;
+}
+EXPORT_SYMBOL_GPL(v4l_match_dv_timings);
+
+/*
+ * CVT defines
+ * Based on Coordinated Video Timings Standard
+ * version 1.1 September 10, 2003
+ */
+
+#define CVT_PXL_CLK_GRAN 250000 /* pixel clock granularity */
+
+/* Normal blanking */
+#define CVT_MIN_V_BPORCH 7 /* lines */
+#define CVT_MIN_V_PORCH_RND 3 /* lines */
+#define CVT_MIN_VSYNC_BP 550 /* min time of vsync + back porch (us) */
+
+/* Normal blanking for CVT uses GTF to calculate horizontal blanking */
+#define CVT_CELL_GRAN 8 /* character cell granularity */
+#define CVT_M 600 /* blanking formula gradient */
+#define CVT_C 40 /* blanking formula offset */
+#define CVT_K 128 /* blanking formula scaling factor */
+#define CVT_J 20 /* blanking formula scaling factor */
+#define CVT_C_PRIME (((CVT_C - CVT_J) * CVT_K / 256) + CVT_J)
+#define CVT_M_PRIME (CVT_K * CVT_M / 256)
+
+/* Reduced Blanking */
+#define CVT_RB_MIN_V_BPORCH 7 /* lines */
+#define CVT_RB_V_FPORCH 3 /* lines */
+#define CVT_RB_MIN_V_BLANK 460 /* us */
+#define CVT_RB_H_SYNC 32 /* pixels */
+#define CVT_RB_H_BPORCH 80 /* pixels */
+#define CVT_RB_H_BLANK 160 /* pixels */
+
+/** v4l2_detect_cvt - detect if the given timings follow the CVT standard
+ * @frame_height - the total height of the frame (including blanking) in lines.
+ * @hfreq - the horizontal frequency in Hz.
+ * @vsync - the height of the vertical sync in lines.
+ * @polarities - the horizontal and vertical polarities (same as struct
+ * v4l2_bt_timings polarities).
+ * @fmt - the resulting timings.
+ *
+ * This function will attempt to detect if the given values correspond to a
+ * valid CVT format. If so, then it will return true, and fmt will be filled
+ * in with the found CVT timings.
+ */
+bool v4l2_detect_cvt(unsigned frame_height, unsigned hfreq, unsigned vsync,
+ u32 polarities, struct v4l2_dv_timings *fmt)
+{
+ int v_fp, v_bp, h_fp, h_bp, hsync;
+ int frame_width, image_height, image_width;
+ bool reduced_blanking;
+ unsigned pix_clk;
+
+ if (vsync < 4 || vsync > 7)
+ return false;
+
+ if (polarities == V4L2_DV_VSYNC_POS_POL)
+ reduced_blanking = false;
+ else if (polarities == V4L2_DV_HSYNC_POS_POL)
+ reduced_blanking = true;
+ else
+ return false;
+
+ /* Vertical */
+ if (reduced_blanking) {
+ v_fp = CVT_RB_V_FPORCH;
+ v_bp = (CVT_RB_MIN_V_BLANK * hfreq + 999999) / 1000000;
+ v_bp -= vsync + v_fp;
+
+ if (v_bp < CVT_RB_MIN_V_BPORCH)
+ v_bp = CVT_RB_MIN_V_BPORCH;
+ } else {
+ v_fp = CVT_MIN_V_PORCH_RND;
+ v_bp = (CVT_MIN_VSYNC_BP * hfreq + 999999) / 1000000 - vsync;
+
+ if (v_bp < CVT_MIN_V_BPORCH)
+ v_bp = CVT_MIN_V_BPORCH;
+ }
+ image_height = (frame_height - v_fp - vsync - v_bp + 1) & ~0x1;
+
+ /* Aspect ratio based on vsync */
+ switch (vsync) {
+ case 4:
+ image_width = (image_height * 4) / 3;
+ break;
+ case 5:
+ image_width = (image_height * 16) / 9;
+ break;
+ case 6:
+ image_width = (image_height * 16) / 10;
+ break;
+ case 7:
+ /* special case */
+ if (image_height == 1024)
+ image_width = (image_height * 5) / 4;
+ else if (image_height == 768)
+ image_width = (image_height * 15) / 9;
+ else
+ return false;
+ break;
+ default:
+ return false;
+ }
+
+ image_width = image_width & ~7;
+
+ /* Horizontal */
+ if (reduced_blanking) {
+ pix_clk = (image_width + CVT_RB_H_BLANK) * hfreq;
+ pix_clk = (pix_clk / CVT_PXL_CLK_GRAN) * CVT_PXL_CLK_GRAN;
+
+ h_bp = CVT_RB_H_BPORCH;
+ hsync = CVT_RB_H_SYNC;
+ h_fp = CVT_RB_H_BLANK - h_bp - hsync;
+
+ frame_width = image_width + CVT_RB_H_BLANK;
+ } else {
+ int h_blank;
+ unsigned ideal_duty_cycle = CVT_C_PRIME - (CVT_M_PRIME * 1000) / hfreq;
+
+ h_blank = (image_width * ideal_duty_cycle + (100 - ideal_duty_cycle) / 2) /
+ (100 - ideal_duty_cycle);
+ h_blank = h_blank - h_blank % (2 * CVT_CELL_GRAN);
+
+ if (h_blank * 100 / image_width < 20) {
+ h_blank = image_width / 5;
+ h_blank = (h_blank + 0x7) & ~0x7;
+ }
+
+ pix_clk = (image_width + h_blank) * hfreq;
+ pix_clk = (pix_clk / CVT_PXL_CLK_GRAN) * CVT_PXL_CLK_GRAN;
+
+ h_bp = h_blank / 2;
+ frame_width = image_width + h_blank;
+
+ hsync = (frame_width * 8 + 50) / 100;
+ hsync = hsync - hsync % CVT_CELL_GRAN;
+ h_fp = h_blank - hsync - h_bp;
+ }
+
+ fmt->bt.polarities = polarities;
+ fmt->bt.width = image_width;
+ fmt->bt.height = image_height;
+ fmt->bt.hfrontporch = h_fp;
+ fmt->bt.vfrontporch = v_fp;
+ fmt->bt.hsync = hsync;
+ fmt->bt.vsync = vsync;
+ fmt->bt.hbackporch = frame_width - image_width - h_fp - hsync;
+ fmt->bt.vbackporch = frame_height - image_height - v_fp - vsync;
+ fmt->bt.pixelclock = pix_clk;
+ fmt->bt.standards = V4L2_DV_BT_STD_CVT;
+ if (reduced_blanking)
+ fmt->bt.flags |= V4L2_DV_FL_REDUCED_BLANKING;
+ return true;
+}
+EXPORT_SYMBOL_GPL(v4l2_detect_cvt);
+
+/*
+ * GTF defines
+ * Based on Generalized Timing Formula Standard
+ * Version 1.1 September 2, 1999
+ */
+
+#define GTF_PXL_CLK_GRAN 250000 /* pixel clock granularity */
+
+#define GTF_MIN_VSYNC_BP 550 /* min time of vsync + back porch (us) */
+#define GTF_V_FP 1 /* vertical front porch (lines) */
+#define GTF_CELL_GRAN 8 /* character cell granularity */
+
+/* Default */
+#define GTF_D_M 600 /* blanking formula gradient */
+#define GTF_D_C 40 /* blanking formula offset */
+#define GTF_D_K 128 /* blanking formula scaling factor */
+#define GTF_D_J 20 /* blanking formula scaling factor */
+#define GTF_D_C_PRIME ((((GTF_D_C - GTF_D_J) * GTF_D_K) / 256) + GTF_D_J)
+#define GTF_D_M_PRIME ((GTF_D_K * GTF_D_M) / 256)
+
+/* Secondary */
+#define GTF_S_M 3600 /* blanking formula gradient */
+#define GTF_S_C 40 /* blanking formula offset */
+#define GTF_S_K 128 /* blanking formula scaling factor */
+#define GTF_S_J 35 /* blanking formula scaling factor */
+#define GTF_S_C_PRIME ((((GTF_S_C - GTF_S_J) * GTF_S_K) / 256) + GTF_S_J)
+#define GTF_S_M_PRIME ((GTF_S_K * GTF_S_M) / 256)
+
+/** v4l2_detect_gtf - detect if the given timings follow the GTF standard
+ * @frame_height - the total height of the frame (including blanking) in lines.
+ * @hfreq - the horizontal frequency in Hz.
+ * @vsync - the height of the vertical sync in lines.
+ * @polarities - the horizontal and vertical polarities (same as struct
+ * v4l2_bt_timings polarities).
+ * @aspect - preferred aspect ratio. GTF has no method of determining the
+ * aspect ratio in order to derive the image width from the
+ * image height, so it has to be passed explicitly. Usually
+ * the native screen aspect ratio is used for this. If it
+ * is not filled in correctly, then 16:9 will be assumed.
+ * @fmt - the resulting timings.
+ *
+ * This function will attempt to detect if the given values correspond to a
+ * valid GTF format. If so, then it will return true, and fmt will be filled
+ * in with the found GTF timings.
+ */
+bool v4l2_detect_gtf(unsigned frame_height,
+ unsigned hfreq,
+ unsigned vsync,
+ u32 polarities,
+ struct v4l2_fract aspect,
+ struct v4l2_dv_timings *fmt)
+{
+ int pix_clk;
+ int v_fp, v_bp, h_fp, hsync;
+ int frame_width, image_height, image_width;
+ bool default_gtf;
+ int h_blank;
+
+ if (vsync != 3)
+ return false;
+
+ if (polarities == V4L2_DV_VSYNC_POS_POL)
+ default_gtf = true;
+ else if (polarities == V4L2_DV_HSYNC_POS_POL)
+ default_gtf = false;
+ else
+ return false;
+
+ /* Vertical */
+ v_fp = GTF_V_FP;
+ v_bp = (GTF_MIN_VSYNC_BP * hfreq + 999999) / 1000000 - vsync;
+ image_height = (frame_height - v_fp - vsync - v_bp + 1) & ~0x1;
+
+ if (aspect.numerator == 0 || aspect.denominator == 0) {
+ aspect.numerator = 16;
+ aspect.denominator = 9;
+ }
+ image_width = ((image_height * aspect.numerator) / aspect.denominator);
+
+ /* Horizontal */
+ if (default_gtf)
+ h_blank = ((image_width * GTF_D_C_PRIME * hfreq) -
+ (image_width * GTF_D_M_PRIME * 1000) +
+ (hfreq * (100 - GTF_D_C_PRIME) + GTF_D_M_PRIME * 1000) / 2) /
+ (hfreq * (100 - GTF_D_C_PRIME) + GTF_D_M_PRIME * 1000);
+ else
+ h_blank = ((image_width * GTF_S_C_PRIME * hfreq) -
+ (image_width * GTF_S_M_PRIME * 1000) +
+ (hfreq * (100 - GTF_S_C_PRIME) + GTF_S_M_PRIME * 1000) / 2) /
+ (hfreq * (100 - GTF_S_C_PRIME) + GTF_S_M_PRIME * 1000);
+
+ h_blank = h_blank - h_blank % (2 * GTF_CELL_GRAN);
+ frame_width = image_width + h_blank;
+
+ pix_clk = (image_width + h_blank) * hfreq;
+ pix_clk = pix_clk / GTF_PXL_CLK_GRAN * GTF_PXL_CLK_GRAN;
+
+ hsync = (frame_width * 8 + 50) / 100;
+ hsync = hsync - hsync % GTF_CELL_GRAN;
+
+ h_fp = h_blank / 2 - hsync;
+
+ fmt->bt.polarities = polarities;
+ fmt->bt.width = image_width;
+ fmt->bt.height = image_height;
+ fmt->bt.hfrontporch = h_fp;
+ fmt->bt.vfrontporch = v_fp;
+ fmt->bt.hsync = hsync;
+ fmt->bt.vsync = vsync;
+ fmt->bt.hbackporch = frame_width - image_width - h_fp - hsync;
+ fmt->bt.vbackporch = frame_height - image_height - v_fp - vsync;
+ fmt->bt.pixelclock = pix_clk;
+ fmt->bt.standards = V4L2_DV_BT_STD_GTF;
+ if (!default_gtf)
+ fmt->bt.flags |= V4L2_DV_FL_REDUCED_BLANKING;
+ return true;
+}
+EXPORT_SYMBOL_GPL(v4l2_detect_gtf);
+
+/** v4l2_calc_aspect_ratio - calculate the aspect ratio based on bytes
+ * 0x15 and 0x16 from the EDID.
+ * @hor_landscape - byte 0x15 from the EDID.
+ * @vert_portrait - byte 0x16 from the EDID.
+ *
+ * Determines the aspect ratio from the EDID.
+ * See VESA Enhanced EDID standard, release A, rev 2, section 3.6.2:
+ * "Horizontal and Vertical Screen Size or Aspect Ratio"
+ */
+struct v4l2_fract v4l2_calc_aspect_ratio(u8 hor_landscape, u8 vert_portrait)
+{
+ struct v4l2_fract aspect = { 16, 9 };
+ u32 tmp;
+ u8 ratio;
+
+ /* Nothing filled in, fallback to 16:9 */
+ if (!hor_landscape && !vert_portrait)
+ return aspect;
+ /* Both filled in, so they are interpreted as the screen size in cm */
+ if (hor_landscape && vert_portrait) {
+ aspect.numerator = hor_landscape;
+ aspect.denominator = vert_portrait;
+ return aspect;
+ }
+ /* Only one is filled in, so interpret them as a ratio:
+ (val + 99) / 100 */
+ ratio = hor_landscape | vert_portrait;
+ /* Change some rounded values into the exact aspect ratio */
+ if (ratio == 79) {
+ aspect.numerator = 16;
+ aspect.denominator = 9;
+ } else if (ratio == 34) {
+ aspect.numerator = 4;
+ aspect.numerator = 3;
+ } else if (ratio == 68) {
+ aspect.numerator = 15;
+ aspect.numerator = 9;
+ } else {
+ aspect.numerator = hor_landscape + 99;
+ aspect.denominator = 100;
+ }
+ if (hor_landscape)
+ return aspect;
+ /* The aspect ratio is for portrait, so swap numerator and denominator */
+ tmp = aspect.denominator;
+ aspect.denominator = aspect.numerator;
+ aspect.numerator = tmp;
+ return aspect;
+}
+EXPORT_SYMBOL_GPL(v4l2_calc_aspect_ratio);
diff --git a/include/media/v4l2-common.h b/include/media/v4l2-common.h
index 015ff82da73..0e1d01056f1 100644
--- a/include/media/v4l2-common.h
+++ b/include/media/v4l2-common.h
@@ -201,19 +201,6 @@ const struct v4l2_frmsize_discrete *v4l2_find_nearest_format(
const struct v4l2_discrete_probe *probe,
s32 width, s32 height);
-bool v4l_match_dv_timings(const struct v4l2_dv_timings *t1,
- const struct v4l2_dv_timings *t2,
- unsigned pclock_delta);
-
-bool v4l2_detect_cvt(unsigned frame_height, unsigned hfreq, unsigned vsync,
- u32 polarities, struct v4l2_dv_timings *fmt);
-
-bool v4l2_detect_gtf(unsigned frame_height, unsigned hfreq, unsigned vsync,
- u32 polarities, struct v4l2_fract aspect,
- struct v4l2_dv_timings *fmt);
-
-struct v4l2_fract v4l2_calc_aspect_ratio(u8 hor_landscape, u8 vert_portrait);
-
void v4l2_get_timestamp(struct timeval *tv);
#endif /* V4L2_COMMON_H_ */
diff --git a/include/media/v4l2-dv-timings.h b/include/media/v4l2-dv-timings.h
index 41075fa02a9..4c7bb549165 100644
--- a/include/media/v4l2-dv-timings.h
+++ b/include/media/v4l2-dv-timings.h
@@ -64,4 +64,63 @@ bool v4l2_find_dv_timings_cap(struct v4l2_dv_timings *t,
const struct v4l2_dv_timings_cap *cap,
unsigned pclock_delta);
+/** v4l_match_dv_timings() - do two timings match?
+ * @measured: the measured timings data.
+ * @standard: the timings according to the standard.
+ * @pclock_delta: maximum delta in Hz between standard->pixelclock and
+ * the measured timings.
+ *
+ * Returns true if the two timings match, returns false otherwise.
+ */
+bool v4l_match_dv_timings(const struct v4l2_dv_timings *measured,
+ const struct v4l2_dv_timings *standard,
+ unsigned pclock_delta);
+
+/** v4l2_detect_cvt - detect if the given timings follow the CVT standard
+ * @frame_height - the total height of the frame (including blanking) in lines.
+ * @hfreq - the horizontal frequency in Hz.
+ * @vsync - the height of the vertical sync in lines.
+ * @polarities - the horizontal and vertical polarities (same as struct
+ * v4l2_bt_timings polarities).
+ * @fmt - the resulting timings.
+ *
+ * This function will attempt to detect if the given values correspond to a
+ * valid CVT format. If so, then it will return true, and fmt will be filled
+ * in with the found CVT timings.
+ */
+bool v4l2_detect_cvt(unsigned frame_height, unsigned hfreq, unsigned vsync,
+ u32 polarities, struct v4l2_dv_timings *fmt);
+
+/** v4l2_detect_gtf - detect if the given timings follow the GTF standard
+ * @frame_height - the total height of the frame (including blanking) in lines.
+ * @hfreq - the horizontal frequency in Hz.
+ * @vsync - the height of the vertical sync in lines.
+ * @polarities - the horizontal and vertical polarities (same as struct
+ * v4l2_bt_timings polarities).
+ * @aspect - preferred aspect ratio. GTF has no method of determining the
+ * aspect ratio in order to derive the image width from the
+ * image height, so it has to be passed explicitly. Usually
+ * the native screen aspect ratio is used for this. If it
+ * is not filled in correctly, then 16:9 will be assumed.
+ * @fmt - the resulting timings.
+ *
+ * This function will attempt to detect if the given values correspond to a
+ * valid GTF format. If so, then it will return true, and fmt will be filled
+ * in with the found GTF timings.
+ */
+bool v4l2_detect_gtf(unsigned frame_height, unsigned hfreq, unsigned vsync,
+ u32 polarities, struct v4l2_fract aspect,
+ struct v4l2_dv_timings *fmt);
+
+/** v4l2_calc_aspect_ratio - calculate the aspect ratio based on bytes
+ * 0x15 and 0x16 from the EDID.
+ * @hor_landscape - byte 0x15 from the EDID.
+ * @vert_portrait - byte 0x16 from the EDID.
+ *
+ * Determines the aspect ratio from the EDID.
+ * See VESA Enhanced EDID standard, release A, rev 2, section 3.6.2:
+ * "Horizontal and Vertical Screen Size or Aspect Ratio"
+ */
+struct v4l2_fract v4l2_calc_aspect_ratio(u8 hor_landscape, u8 vert_portrait);
+
#endif
--
cgit v1.2.3-70-g09d2
From eacf8f9aa80e2231af43b589cfc18c054e417220 Mon Sep 17 00:00:00 2001
From: Hans Verkuil <hans.verkuil@cisco.com>
Date: Mon, 29 Jul 2013 08:40:59 -0300
Subject: [media] v4l2: use new V4L2_DV_BT_BLANKING/FRAME defines
Use the new defines to calculate the full blanking and frame sizes.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Acked-by: Scott Jiang <scott.jiang.linux@gmail.com>
Acked-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/ad9389b.c | 6 ++----
drivers/media/i2c/adv7604.c | 8 ++++----
drivers/media/i2c/ths7303.c | 6 ++----
drivers/media/i2c/ths8200.c | 8 ++++----
drivers/media/platform/blackfin/bfin_capture.c | 9 ++-------
drivers/media/usb/hdpvr/hdpvr-video.c | 6 ++----
6 files changed, 16 insertions(+), 27 deletions(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/ad9389b.c b/drivers/media/i2c/ad9389b.c
index 2fa8d7286ce..5295234deb5 100644
--- a/drivers/media/i2c/ad9389b.c
+++ b/drivers/media/i2c/ad9389b.c
@@ -445,10 +445,8 @@ static int ad9389b_log_status(struct v4l2_subdev *sd)
}
if (state->dv_timings.type == V4L2_DV_BT_656_1120) {
struct v4l2_bt_timings *bt = bt = &state->dv_timings.bt;
- u32 frame_width = bt->width + bt->hfrontporch +
- bt->hsync + bt->hbackporch;
- u32 frame_height = bt->height + bt->vfrontporch +
- bt->vsync + bt->vbackporch;
+ u32 frame_width = V4L2_DV_BT_FRAME_WIDTH(bt);
+ u32 frame_height = V4L2_DV_BT_FRAME_HEIGHT(bt);
u32 frame_size = frame_width * frame_height;
v4l2_info(sd, "timings: %ux%u%s%u (%ux%u). Pix freq. = %u Hz. Polarities = 0x%x\n",
diff --git a/drivers/media/i2c/adv7604.c b/drivers/media/i2c/adv7604.c
index 181a6c35933..3ec7ec0911c 100644
--- a/drivers/media/i2c/adv7604.c
+++ b/drivers/media/i2c/adv7604.c
@@ -261,22 +261,22 @@ static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
static inline unsigned hblanking(const struct v4l2_bt_timings *t)
{
- return t->hfrontporch + t->hsync + t->hbackporch;
+ return V4L2_DV_BT_BLANKING_WIDTH(t);
}
static inline unsigned htotal(const struct v4l2_bt_timings *t)
{
- return t->width + t->hfrontporch + t->hsync + t->hbackporch;
+ return V4L2_DV_BT_FRAME_WIDTH(t);
}
static inline unsigned vblanking(const struct v4l2_bt_timings *t)
{
- return t->vfrontporch + t->vsync + t->vbackporch;
+ return V4L2_DV_BT_BLANKING_HEIGHT(t);
}
static inline unsigned vtotal(const struct v4l2_bt_timings *t)
{
- return t->height + t->vfrontporch + t->vsync + t->vbackporch;
+ return V4L2_DV_BT_FRAME_HEIGHT(t);
}
/* ----------------------------------------------------------------------- */
diff --git a/drivers/media/i2c/ths7303.c b/drivers/media/i2c/ths7303.c
index 0a2dacbd7a6..42276d93624 100644
--- a/drivers/media/i2c/ths7303.c
+++ b/drivers/media/i2c/ths7303.c
@@ -291,10 +291,8 @@ static int ths7303_log_status(struct v4l2_subdev *sd)
struct v4l2_bt_timings *bt = bt = &state->bt;
u32 frame_width, frame_height;
- frame_width = bt->width + bt->hfrontporch +
- bt->hsync + bt->hbackporch;
- frame_height = bt->height + bt->vfrontporch +
- bt->vsync + bt->vbackporch;
+ frame_width = V4L2_DV_BT_FRAME_WIDTH(bt);
+ frame_height = V4L2_DV_BT_FRAME_HEIGHT(bt);
v4l2_info(sd,
"timings: %dx%d%s%d (%dx%d). Pix freq. = %d Hz. Polarities = 0x%x\n",
bt->width, bt->height, bt->interlaced ? "i" : "p",
diff --git a/drivers/media/i2c/ths8200.c b/drivers/media/i2c/ths8200.c
index aef7c0e7cd6..28932e9c1f0 100644
--- a/drivers/media/i2c/ths8200.c
+++ b/drivers/media/i2c/ths8200.c
@@ -65,22 +65,22 @@ static inline struct ths8200_state *to_state(struct v4l2_subdev *sd)
static inline unsigned hblanking(const struct v4l2_bt_timings *t)
{
- return t->hfrontporch + t->hsync + t->hbackporch;
+ return V4L2_DV_BT_BLANKING_WIDTH(t);
}
static inline unsigned htotal(const struct v4l2_bt_timings *t)
{
- return t->width + t->hfrontporch + t->hsync + t->hbackporch;
+ return V4L2_DV_BT_FRAME_WIDTH(t);
}
static inline unsigned vblanking(const struct v4l2_bt_timings *t)
{
- return t->vfrontporch + t->vsync + t->vbackporch;
+ return V4L2_DV_BT_BLANKING_HEIGHT(t);
}
static inline unsigned vtotal(const struct v4l2_bt_timings *t)
{
- return t->height + t->vfrontporch + t->vsync + t->vbackporch;
+ return V4L2_DV_BT_FRAME_HEIGHT(t);
}
static int ths8200_read(struct v4l2_subdev *sd, u8 reg)
diff --git a/drivers/media/platform/blackfin/bfin_capture.c b/drivers/media/platform/blackfin/bfin_capture.c
index 7f838c681ce..4c110597709 100644
--- a/drivers/media/platform/blackfin/bfin_capture.c
+++ b/drivers/media/platform/blackfin/bfin_capture.c
@@ -388,13 +388,8 @@ static int bcap_start_streaming(struct vb2_queue *vq, unsigned int count)
params.hdelay = bt->hsync + bt->hbackporch;
params.vdelay = bt->vsync + bt->vbackporch;
- params.line = bt->hfrontporch + bt->hsync
- + bt->hbackporch + bt->width;
- params.frame = bt->vfrontporch + bt->vsync
- + bt->vbackporch + bt->height;
- if (bt->interlaced)
- params.frame += bt->il_vfrontporch + bt->il_vsync
- + bt->il_vbackporch;
+ params.line = V4L2_DV_BT_FRAME_WIDTH(bt);
+ params.frame = V4L2_DV_BT_FRAME_HEIGHT(bt);
} else if (bcap_dev->cfg->inputs[bcap_dev->cur_input].capabilities
& V4L2_IN_CAP_STD) {
params.hdelay = 0;
diff --git a/drivers/media/usb/hdpvr/hdpvr-video.c b/drivers/media/usb/hdpvr/hdpvr-video.c
index 9c67b6e127e..e68245a7f3a 100644
--- a/drivers/media/usb/hdpvr/hdpvr-video.c
+++ b/drivers/media/usb/hdpvr/hdpvr-video.c
@@ -690,10 +690,8 @@ static int vidioc_query_dv_timings(struct file *file, void *_fh,
unsigned vsize;
unsigned fps;
- hsize = bt->hfrontporch + bt->hsync + bt->hbackporch + bt->width;
- vsize = bt->vfrontporch + bt->vsync + bt->vbackporch +
- bt->il_vfrontporch + bt->il_vsync + bt->il_vbackporch +
- bt->height;
+ hsize = V4L2_DV_BT_FRAME_WIDTH(bt);
+ vsize = V4L2_DV_BT_FRAME_HEIGHT(bt);
fps = (unsigned)bt->pixelclock / (hsize * vsize);
if (bt->width != vid_info.width ||
bt->height != vid_info.height ||
--
cgit v1.2.3-70-g09d2
From 041649048149b3e4afa56428e6d1b081b9dd49f5 Mon Sep 17 00:00:00 2001
From: Hans Verkuil <hans.verkuil@cisco.com>
Date: Mon, 29 Jul 2013 08:41:01 -0300
Subject: [media] ths8200/ad9389b: use new dv_timings helpers
Simplify the code by using the new dv_timings helpers.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/ad9389b.c | 108 +++++++-------------------------------------
drivers/media/i2c/ths8200.c | 55 ++++++----------------
2 files changed, 31 insertions(+), 132 deletions(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/ad9389b.c b/drivers/media/i2c/ad9389b.c
index 5295234deb5..7e68d8f9676 100644
--- a/drivers/media/i2c/ad9389b.c
+++ b/drivers/media/i2c/ad9389b.c
@@ -635,95 +635,34 @@ static int ad9389b_s_stream(struct v4l2_subdev *sd, int enable)
return 0;
}
-static const struct v4l2_dv_timings ad9389b_timings[] = {
- V4L2_DV_BT_CEA_720X480P59_94,
- V4L2_DV_BT_CEA_720X576P50,
- V4L2_DV_BT_CEA_1280X720P24,
- V4L2_DV_BT_CEA_1280X720P25,
- V4L2_DV_BT_CEA_1280X720P30,
- V4L2_DV_BT_CEA_1280X720P50,
- V4L2_DV_BT_CEA_1280X720P60,
- V4L2_DV_BT_CEA_1920X1080P24,
- V4L2_DV_BT_CEA_1920X1080P25,
- V4L2_DV_BT_CEA_1920X1080P30,
- V4L2_DV_BT_CEA_1920X1080P50,
- V4L2_DV_BT_CEA_1920X1080P60,
-
- V4L2_DV_BT_DMT_640X350P85,
- V4L2_DV_BT_DMT_640X400P85,
- V4L2_DV_BT_DMT_720X400P85,
- V4L2_DV_BT_DMT_640X480P60,
- V4L2_DV_BT_DMT_640X480P72,
- V4L2_DV_BT_DMT_640X480P75,
- V4L2_DV_BT_DMT_640X480P85,
- V4L2_DV_BT_DMT_800X600P56,
- V4L2_DV_BT_DMT_800X600P60,
- V4L2_DV_BT_DMT_800X600P72,
- V4L2_DV_BT_DMT_800X600P75,
- V4L2_DV_BT_DMT_800X600P85,
- V4L2_DV_BT_DMT_848X480P60,
- V4L2_DV_BT_DMT_1024X768P60,
- V4L2_DV_BT_DMT_1024X768P70,
- V4L2_DV_BT_DMT_1024X768P75,
- V4L2_DV_BT_DMT_1024X768P85,
- V4L2_DV_BT_DMT_1152X864P75,
- V4L2_DV_BT_DMT_1280X768P60_RB,
- V4L2_DV_BT_DMT_1280X768P60,
- V4L2_DV_BT_DMT_1280X768P75,
- V4L2_DV_BT_DMT_1280X768P85,
- V4L2_DV_BT_DMT_1280X800P60_RB,
- V4L2_DV_BT_DMT_1280X800P60,
- V4L2_DV_BT_DMT_1280X800P75,
- V4L2_DV_BT_DMT_1280X800P85,
- V4L2_DV_BT_DMT_1280X960P60,
- V4L2_DV_BT_DMT_1280X960P85,
- V4L2_DV_BT_DMT_1280X1024P60,
- V4L2_DV_BT_DMT_1280X1024P75,
- V4L2_DV_BT_DMT_1280X1024P85,
- V4L2_DV_BT_DMT_1360X768P60,
- V4L2_DV_BT_DMT_1400X1050P60_RB,
- V4L2_DV_BT_DMT_1400X1050P60,
- V4L2_DV_BT_DMT_1400X1050P75,
- V4L2_DV_BT_DMT_1400X1050P85,
- V4L2_DV_BT_DMT_1440X900P60_RB,
- V4L2_DV_BT_DMT_1440X900P60,
- V4L2_DV_BT_DMT_1600X1200P60,
- V4L2_DV_BT_DMT_1680X1050P60_RB,
- V4L2_DV_BT_DMT_1680X1050P60,
- V4L2_DV_BT_DMT_1792X1344P60,
- V4L2_DV_BT_DMT_1856X1392P60,
- V4L2_DV_BT_DMT_1920X1200P60_RB,
- V4L2_DV_BT_DMT_1366X768P60,
- V4L2_DV_BT_DMT_1920X1080P60,
- {},
+static const struct v4l2_dv_timings_cap ad9389b_timings_cap = {
+ .type = V4L2_DV_BT_656_1120,
+ .bt = {
+ .max_width = 1920,
+ .max_height = 1200,
+ .min_pixelclock = 27000000,
+ .max_pixelclock = 170000000,
+ .standards = V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
+ V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
+ .capabilities = V4L2_DV_BT_CAP_PROGRESSIVE |
+ V4L2_DV_BT_CAP_REDUCED_BLANKING | V4L2_DV_BT_CAP_CUSTOM,
+ },
};
static int ad9389b_s_dv_timings(struct v4l2_subdev *sd,
struct v4l2_dv_timings *timings)
{
struct ad9389b_state *state = get_ad9389b_state(sd);
- int i;
v4l2_dbg(1, debug, sd, "%s:\n", __func__);
/* quick sanity check */
- if (timings->type != V4L2_DV_BT_656_1120)
- return -EINVAL;
-
- if (timings->bt.interlaced)
- return -EINVAL;
- if (timings->bt.pixelclock < 27000000 ||
- timings->bt.pixelclock > 170000000)
+ if (!v4l2_dv_valid_timings(timings, &ad9389b_timings_cap))
return -EINVAL;
/* Fill the optional fields .standards and .flags in struct v4l2_dv_timings
- if the format is listed in ad9389b_timings[] */
- for (i = 0; ad9389b_timings[i].bt.width; i++) {
- if (v4l_match_dv_timings(timings, &ad9389b_timings[i], 0)) {
- *timings = ad9389b_timings[i];
- break;
- }
- }
+ if the format is one of the CEA or DMT timings. */
+ v4l2_find_dv_timings_cap(timings, &ad9389b_timings_cap, 0);
timings->bt.flags &= ~V4L2_DV_FL_REDUCED_FPS;
@@ -761,26 +700,13 @@ static int ad9389b_g_dv_timings(struct v4l2_subdev *sd,
static int ad9389b_enum_dv_timings(struct v4l2_subdev *sd,
struct v4l2_enum_dv_timings *timings)
{
- if (timings->index >= ARRAY_SIZE(ad9389b_timings))
- return -EINVAL;
-
- memset(timings->reserved, 0, sizeof(timings->reserved));
- timings->timings = ad9389b_timings[timings->index];
- return 0;
+ return v4l2_enum_dv_timings_cap(timings, &ad9389b_timings_cap);
}
static int ad9389b_dv_timings_cap(struct v4l2_subdev *sd,
struct v4l2_dv_timings_cap *cap)
{
- cap->type = V4L2_DV_BT_656_1120;
- cap->bt.max_width = 1920;
- cap->bt.max_height = 1200;
- cap->bt.min_pixelclock = 27000000;
- cap->bt.max_pixelclock = 170000000;
- cap->bt.standards = V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
- V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT;
- cap->bt.capabilities = V4L2_DV_BT_CAP_PROGRESSIVE |
- V4L2_DV_BT_CAP_REDUCED_BLANKING | V4L2_DV_BT_CAP_CUSTOM;
+ *cap = ad9389b_timings_cap;
return 0;
}
diff --git a/drivers/media/i2c/ths8200.c b/drivers/media/i2c/ths8200.c
index 28932e9c1f0..7a60a8fda5d 100644
--- a/drivers/media/i2c/ths8200.c
+++ b/drivers/media/i2c/ths8200.c
@@ -44,18 +44,16 @@ struct ths8200_state {
struct v4l2_dv_timings dv_timings;
};
-static const struct v4l2_dv_timings ths8200_timings[] = {
- V4L2_DV_BT_CEA_720X480P59_94,
- V4L2_DV_BT_CEA_1280X720P24,
- V4L2_DV_BT_CEA_1280X720P25,
- V4L2_DV_BT_CEA_1280X720P30,
- V4L2_DV_BT_CEA_1280X720P50,
- V4L2_DV_BT_CEA_1280X720P60,
- V4L2_DV_BT_CEA_1920X1080P24,
- V4L2_DV_BT_CEA_1920X1080P25,
- V4L2_DV_BT_CEA_1920X1080P30,
- V4L2_DV_BT_CEA_1920X1080P50,
- V4L2_DV_BT_CEA_1920X1080P60,
+static const struct v4l2_dv_timings_cap ths8200_timings_cap = {
+ .type = V4L2_DV_BT_656_1120,
+ .bt = {
+ .max_width = 1920,
+ .max_height = 1080,
+ .min_pixelclock = 27000000,
+ .max_pixelclock = 148500000,
+ .standards = V4L2_DV_BT_STD_CEA861,
+ .capabilities = V4L2_DV_BT_CAP_PROGRESSIVE,
+ },
};
static inline struct ths8200_state *to_state(struct v4l2_subdev *sd)
@@ -411,25 +409,13 @@ static int ths8200_s_dv_timings(struct v4l2_subdev *sd,
struct v4l2_dv_timings *timings)
{
struct ths8200_state *state = to_state(sd);
- int i;
v4l2_dbg(1, debug, sd, "%s:\n", __func__);
- if (timings->type != V4L2_DV_BT_656_1120)
+ if (!v4l2_dv_valid_timings(timings, &ths8200_timings_cap))
return -EINVAL;
- /* TODO Support interlaced formats */
- if (timings->bt.interlaced) {
- v4l2_dbg(1, debug, sd, "TODO Support interlaced formats\n");
- return -EINVAL;
- }
-
- for (i = 0; i < ARRAY_SIZE(ths8200_timings); i++) {
- if (v4l_match_dv_timings(&ths8200_timings[i], timings, 10))
- break;
- }
-
- if (i == ARRAY_SIZE(ths8200_timings)) {
+ if (!v4l2_find_dv_timings_cap(timings, &ths8200_timings_cap, 10)) {
v4l2_dbg(1, debug, sd, "Unsupported format\n");
return -EINVAL;
}
@@ -459,26 +445,13 @@ static int ths8200_g_dv_timings(struct v4l2_subdev *sd,
static int ths8200_enum_dv_timings(struct v4l2_subdev *sd,
struct v4l2_enum_dv_timings *timings)
{
- /* Check requested format index is within range */
- if (timings->index >= ARRAY_SIZE(ths8200_timings))
- return -EINVAL;
-
- timings->timings = ths8200_timings[timings->index];
-
- return 0;
+ return v4l2_enum_dv_timings_cap(timings, &ths8200_timings_cap);
}
static int ths8200_dv_timings_cap(struct v4l2_subdev *sd,
struct v4l2_dv_timings_cap *cap)
{
- cap->type = V4L2_DV_BT_656_1120;
- cap->bt.max_width = 1920;
- cap->bt.max_height = 1080;
- cap->bt.min_pixelclock = 27000000;
- cap->bt.max_pixelclock = 148500000;
- cap->bt.standards = V4L2_DV_BT_STD_CEA861;
- cap->bt.capabilities = V4L2_DV_BT_CAP_PROGRESSIVE;
-
+ *cap = ths8200_timings_cap;
return 0;
}
--
cgit v1.2.3-70-g09d2
From 8b77dfdd8c5838939251cf135ea8363dff108e28 Mon Sep 17 00:00:00 2001
From: Jon Arne Jørgensen <jonarne@jonarne.no>
Date: Sat, 3 Aug 2013 09:19:35 -0300
Subject: [media] saa7115: Fix saa711x_set_v4lstd for gm7113c
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
saa711x_set_v4lstd would toggle several bits that should not be touched
when changing std. This patch fixes this.
Signed-off-by: Jon Arne Jørgensen <jonarne@jonarne.no>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/saa7115.c | 37 +++++++++++++------------------------
drivers/media/i2c/saa711x_regs.h | 4 ++++
2 files changed, 17 insertions(+), 24 deletions(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/saa7115.c b/drivers/media/i2c/saa7115.c
index 7fd766ec64c..41408ddda79 100644
--- a/drivers/media/i2c/saa7115.c
+++ b/drivers/media/i2c/saa7115.c
@@ -462,24 +462,6 @@ static const unsigned char saa7115_cfg_50hz_video[] = {
/* ============== SAA7715 VIDEO templates (end) ======= */
-/* ============== GM7113C VIDEO templates ============= */
-static const unsigned char gm7113c_cfg_60hz_video[] = {
- R_08_SYNC_CNTL, 0x68, /* 0xBO: auto detection, 0x68 = NTSC */
- R_0E_CHROMA_CNTL_1, 0x07, /* video autodetection is on */
-
- 0x00, 0x00
-};
-
-static const unsigned char gm7113c_cfg_50hz_video[] = {
- R_08_SYNC_CNTL, 0x28, /* 0x28 = PAL */
- R_0E_CHROMA_CNTL_1, 0x07,
-
- 0x00, 0x00
-};
-
-/* ============== GM7113C VIDEO templates (end) ======= */
-
-
static const unsigned char saa7115_cfg_vbi_on[] = {
R_80_GLOBAL_CNTL_1, 0x00, /* reset tasks */
R_88_POWER_SAVE_ADC_PORT_CNTL, 0xd0, /* reset scaler */
@@ -964,17 +946,24 @@ static void saa711x_set_v4lstd(struct v4l2_subdev *sd, v4l2_std_id std)
// This works for NTSC-M, SECAM-L and the 50Hz PAL variants.
if (std & V4L2_STD_525_60) {
v4l2_dbg(1, debug, sd, "decoder set standard 60 Hz\n");
- if (state->ident == GM7113C)
- saa711x_writeregs(sd, gm7113c_cfg_60hz_video);
- else
+ if (state->ident == GM7113C) {
+ u8 reg = saa711x_read(sd, R_08_SYNC_CNTL);
+ reg &= ~(SAA7113_R_08_FSEL | SAA7113_R_08_AUFD);
+ reg |= SAA7113_R_08_FSEL;
+ saa711x_write(sd, R_08_SYNC_CNTL, reg);
+ } else {
saa711x_writeregs(sd, saa7115_cfg_60hz_video);
+ }
saa711x_set_size(sd, 720, 480);
} else {
v4l2_dbg(1, debug, sd, "decoder set standard 50 Hz\n");
- if (state->ident == GM7113C)
- saa711x_writeregs(sd, gm7113c_cfg_50hz_video);
- else
+ if (state->ident == GM7113C) {
+ u8 reg = saa711x_read(sd, R_08_SYNC_CNTL);
+ reg &= ~(SAA7113_R_08_FSEL | SAA7113_R_08_AUFD);
+ saa711x_write(sd, R_08_SYNC_CNTL, reg);
+ } else {
saa711x_writeregs(sd, saa7115_cfg_50hz_video);
+ }
saa711x_set_size(sd, 720, 576);
}
diff --git a/drivers/media/i2c/saa711x_regs.h b/drivers/media/i2c/saa711x_regs.h
index 4e5f2eb0a2c..70c56d19ea0 100644
--- a/drivers/media/i2c/saa711x_regs.h
+++ b/drivers/media/i2c/saa711x_regs.h
@@ -201,6 +201,10 @@
#define R_FB_PULSE_C_POS_MSB 0xfb
#define R_FF_S_PLL_MAX_PHASE_ERR_THRESH_NUM_LINES 0xff
+/* SAA7113 bit-masks */
+#define SAA7113_R_08_FSEL 0x40
+#define SAA7113_R_08_AUFD 0x80
+
#if 0
/* Those structs will be used in the future for debug purposes */
struct saa711x_reg_descr {
--
cgit v1.2.3-70-g09d2
From b9798bc160968107c82e119f2a59de25f6e70291 Mon Sep 17 00:00:00 2001
From: Jon Arne Jørgensen <jonarne@jonarne.no>
Date: Sat, 3 Aug 2013 09:19:36 -0300
Subject: [media] saa7115: Do not load saa7115_init_misc for gm7113c
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Most of the registers changed in saa7115_init_misc table are out of range
for the gm7113c chip.
The only register that's within range, don't need to be changed here.
Signed-off-by: Jon Arne Jørgensen <jonarne@jonarne.no>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/saa7115.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/saa7115.c b/drivers/media/i2c/saa7115.c
index 41408ddda79..17a464d4e52 100644
--- a/drivers/media/i2c/saa7115.c
+++ b/drivers/media/i2c/saa7115.c
@@ -1769,7 +1769,7 @@ static int saa711x_probe(struct i2c_client *client,
state->crystal_freq = SAA7115_FREQ_32_11_MHZ;
saa711x_writeregs(sd, saa7115_init_auto_input);
}
- if (state->ident > SAA7111A)
+ if (state->ident > SAA7111A && state->ident != GM7113C)
saa711x_writeregs(sd, saa7115_init_misc);
saa711x_set_v4lstd(sd, V4L2_STD_NTSC);
v4l2_ctrl_handler_setup(hdl);
--
cgit v1.2.3-70-g09d2
From 2ccf12afe6da2145085056cebaae2149899f4f8c Mon Sep 17 00:00:00 2001
From: Jon Arne Jørgensen <jonarne@jonarne.no>
Date: Sat, 3 Aug 2013 09:19:37 -0300
Subject: [media] saa7115: Implement i2c_board_info.platform_data
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This patch implements i2c_board_info.platform_data, and some options to
override the default initialization table for the GM7113C and SAA7113
chips.
Signed-off-by: Jon Arne Jørgensen <jonarne@jonarne.no>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/saa7115.c | 128 ++++++++++++++++++++++++++++++++++++---
drivers/media/i2c/saa711x_regs.h | 15 +++++
include/media/saa7115.h | 64 ++++++++++++++++++++
3 files changed, 198 insertions(+), 9 deletions(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/saa7115.c b/drivers/media/i2c/saa7115.c
index 17a464d4e52..5cc48f751b3 100644
--- a/drivers/media/i2c/saa7115.c
+++ b/drivers/media/i2c/saa7115.c
@@ -225,19 +225,59 @@ static const unsigned char saa7111_init[] = {
0x00, 0x00
};
-/* SAA7113/GM7113C init codes
- * It's important that R_14... R_17 == 0x00
- * for the gm7113c chip to deliver stable video
- */
+/* This table has one illegal value, and some values that are not
+ correct according to the datasheet initialization table.
+
+ If you need a table with legal/default values tell the driver in
+ i2c_board_info.platform_data, and you will get the gm7113c_init
+ table instead. */
+
+/* SAA7113 Init codes */
static const unsigned char saa7113_init[] = {
R_01_INC_DELAY, 0x08,
R_02_INPUT_CNTL_1, 0xc2,
R_03_INPUT_CNTL_2, 0x30,
R_04_INPUT_CNTL_3, 0x00,
R_05_INPUT_CNTL_4, 0x00,
- R_06_H_SYNC_START, 0x89,
+ R_06_H_SYNC_START, 0x89, /* Illegal value -119,
+ * min. value = -108 (0x94) */
+ R_07_H_SYNC_STOP, 0x0d,
+ R_08_SYNC_CNTL, 0x88, /* Not datasheet default.
+ * HTC = VTR mode, should be 0x98 */
+ R_09_LUMA_CNTL, 0x01,
+ R_0A_LUMA_BRIGHT_CNTL, 0x80,
+ R_0B_LUMA_CONTRAST_CNTL, 0x47,
+ R_0C_CHROMA_SAT_CNTL, 0x40,
+ R_0D_CHROMA_HUE_CNTL, 0x00,
+ R_0E_CHROMA_CNTL_1, 0x01,
+ R_0F_CHROMA_GAIN_CNTL, 0x2a,
+ R_10_CHROMA_CNTL_2, 0x08, /* Not datsheet default.
+ * VRLN enabled, should be 0x00 */
+ R_11_MODE_DELAY_CNTL, 0x0c,
+ R_12_RT_SIGNAL_CNTL, 0x07, /* Not datasheet default,
+ * should be 0x01 */
+ R_13_RT_X_PORT_OUT_CNTL, 0x00,
+ R_14_ANAL_ADC_COMPAT_CNTL, 0x00,
+ R_15_VGATE_START_FID_CHG, 0x00,
+ R_16_VGATE_STOP, 0x00,
+ R_17_MISC_VGATE_CONF_AND_MSB, 0x00,
+
+ 0x00, 0x00
+};
+
+/* GM7113C is a clone of the SAA7113 chip
+ This init table is copied out of the saa7113 datasheet.
+ In R_08 we enable "Automatic Field Detection" [AUFD],
+ this is disabled when saa711x_set_v4lstd is called. */
+static const unsigned char gm7113c_init[] = {
+ R_01_INC_DELAY, 0x08,
+ R_02_INPUT_CNTL_1, 0xc0,
+ R_03_INPUT_CNTL_2, 0x33,
+ R_04_INPUT_CNTL_3, 0x00,
+ R_05_INPUT_CNTL_4, 0x00,
+ R_06_H_SYNC_START, 0xe9,
R_07_H_SYNC_STOP, 0x0d,
- R_08_SYNC_CNTL, 0x88,
+ R_08_SYNC_CNTL, 0x98,
R_09_LUMA_CNTL, 0x01,
R_0A_LUMA_BRIGHT_CNTL, 0x80,
R_0B_LUMA_CONTRAST_CNTL, 0x47,
@@ -245,9 +285,9 @@ static const unsigned char saa7113_init[] = {
R_0D_CHROMA_HUE_CNTL, 0x00,
R_0E_CHROMA_CNTL_1, 0x01,
R_0F_CHROMA_GAIN_CNTL, 0x2a,
- R_10_CHROMA_CNTL_2, 0x08,
+ R_10_CHROMA_CNTL_2, 0x00,
R_11_MODE_DELAY_CNTL, 0x0c,
- R_12_RT_SIGNAL_CNTL, 0x07,
+ R_12_RT_SIGNAL_CNTL, 0x01,
R_13_RT_X_PORT_OUT_CNTL, 0x00,
R_14_ANAL_ADC_COMPAT_CNTL, 0x00,
R_15_VGATE_START_FID_CHG, 0x00,
@@ -1585,6 +1625,65 @@ static const struct v4l2_subdev_ops saa711x_ops = {
/* ----------------------------------------------------------------------- */
+static void saa711x_write_platform_data(struct saa711x_state *state,
+ struct saa7115_platform_data *data)
+{
+ struct v4l2_subdev *sd = &state->sd;
+ u8 work;
+
+ if (state->ident != GM7113C &&
+ state->ident != SAA7113)
+ return;
+
+ if (data->saa7113_r08_htc) {
+ work = saa711x_read(sd, R_08_SYNC_CNTL);
+ work &= ~SAA7113_R_08_HTC_MASK;
+ work |= ((*data->saa7113_r08_htc) << SAA7113_R_08_HTC_OFFSET);
+ saa711x_write(sd, R_08_SYNC_CNTL, work);
+ }
+
+ if (data->saa7113_r10_vrln) {
+ work = saa711x_read(sd, R_10_CHROMA_CNTL_2);
+ work &= ~SAA7113_R_10_VRLN_MASK;
+ if (*data->saa7113_r10_vrln)
+ work |= (1 << SAA7113_R_10_VRLN_OFFSET);
+ saa711x_write(sd, R_10_CHROMA_CNTL_2, work);
+ }
+
+ if (data->saa7113_r10_ofts) {
+ work = saa711x_read(sd, R_10_CHROMA_CNTL_2);
+ work &= ~SAA7113_R_10_OFTS_MASK;
+ work |= (*data->saa7113_r10_ofts << SAA7113_R_10_OFTS_OFFSET);
+ saa711x_write(sd, R_10_CHROMA_CNTL_2, work);
+ }
+
+ if (data->saa7113_r12_rts0) {
+ work = saa711x_read(sd, R_12_RT_SIGNAL_CNTL);
+ work &= ~SAA7113_R_12_RTS0_MASK;
+ work |= (*data->saa7113_r12_rts0 << SAA7113_R_12_RTS0_OFFSET);
+
+ /* According to the datasheet,
+ * SAA7113_RTS_DOT_IN should only be used on RTS1 */
+ WARN_ON(*data->saa7113_r12_rts0 == SAA7113_RTS_DOT_IN);
+ saa711x_write(sd, R_12_RT_SIGNAL_CNTL, work);
+ }
+
+ if (data->saa7113_r12_rts1) {
+ work = saa711x_read(sd, R_12_RT_SIGNAL_CNTL);
+ work &= ~SAA7113_R_12_RTS1_MASK;
+ work |= (*data->saa7113_r12_rts1 << SAA7113_R_12_RTS1_OFFSET);
+ saa711x_write(sd, R_12_RT_SIGNAL_CNTL, work);
+ }
+
+ if (data->saa7113_r13_adlsb) {
+ work = saa711x_read(sd, R_13_RT_X_PORT_OUT_CNTL);
+ work &= ~SAA7113_R_13_ADLSB_MASK;
+ if (*data->saa7113_r13_adlsb)
+ work |= (1 << SAA7113_R_13_ADLSB_OFFSET);
+ saa711x_write(sd, R_13_RT_X_PORT_OUT_CNTL, work);
+ }
+}
+
/**
* saa711x_detect_chip - Detects the saa711x (or clone) variant
* @client: I2C client structure.
@@ -1693,6 +1792,7 @@ static int saa711x_probe(struct i2c_client *client,
struct saa711x_state *state;
struct v4l2_subdev *sd;
struct v4l2_ctrl_handler *hdl;
+ struct saa7115_platform_data *pdata;
int ident;
char name[CHIP_VER_SIZE + 1];
@@ -1756,14 +1856,20 @@ static int saa711x_probe(struct i2c_client *client,
/* init to 60hz/48khz */
state->crystal_freq = SAA7115_FREQ_24_576_MHZ;
+ pdata = client->dev.platform_data;
switch (state->ident) {
case SAA7111:
case SAA7111A:
saa711x_writeregs(sd, saa7111_init);
break;
case GM7113C:
+ saa711x_writeregs(sd, gm7113c_init);
+ break;
case SAA7113:
- saa711x_writeregs(sd, saa7113_init);
+ if (pdata && pdata->saa7113_force_gm7113c_init)
+ saa711x_writeregs(sd, gm7113c_init);
+ else
+ saa711x_writeregs(sd, saa7113_init);
break;
default:
state->crystal_freq = SAA7115_FREQ_32_11_MHZ;
@@ -1771,6 +1877,10 @@ static int saa711x_probe(struct i2c_client *client,
}
if (state->ident > SAA7111A && state->ident != GM7113C)
saa711x_writeregs(sd, saa7115_init_misc);
+
+ if (pdata)
+ saa711x_write_platform_data(state, pdata);
+
saa711x_set_v4lstd(sd, V4L2_STD_NTSC);
v4l2_ctrl_handler_setup(hdl);
diff --git a/drivers/media/i2c/saa711x_regs.h b/drivers/media/i2c/saa711x_regs.h
index 70c56d19ea0..730ca90b30a 100644
--- a/drivers/media/i2c/saa711x_regs.h
+++ b/drivers/media/i2c/saa711x_regs.h
@@ -202,9 +202,24 @@
#define R_FF_S_PLL_MAX_PHASE_ERR_THRESH_NUM_LINES 0xff
/* SAA7113 bit-masks */
+#define SAA7113_R_08_HTC_OFFSET 3
+#define SAA7113_R_08_HTC_MASK (0x3 << SAA7113_R_08_HTC_OFFSET)
#define SAA7113_R_08_FSEL 0x40
#define SAA7113_R_08_AUFD 0x80
+#define SAA7113_R_10_VRLN_OFFSET 3
+#define SAA7113_R_10_VRLN_MASK (0x1 << SAA7113_R_10_VRLN_OFFSET)
+#define SAA7113_R_10_OFTS_OFFSET 6
+#define SAA7113_R_10_OFTS_MASK (0x3 << SAA7113_R_10_OFTS_OFFSET)
+
+#define SAA7113_R_12_RTS0_OFFSET 0
+#define SAA7113_R_12_RTS0_MASK (0xf << SAA7113_R_12_RTS0_OFFSET)
+#define SAA7113_R_12_RTS1_OFFSET 4
+#define SAA7113_R_12_RTS1_MASK (0xf << SAA7113_R_12_RTS1_OFFSET)
+
+#define SAA7113_R_13_ADLSB_OFFSET 7
+#define SAA7113_R_13_ADLSB_MASK (0x1 << SAA7113_R_13_ADLSB_OFFSET)
+
#if 0
/* Those structs will be used in the future for debug purposes */
struct saa711x_reg_descr {
diff --git a/include/media/saa7115.h b/include/media/saa7115.h
index 407918625c8..e8d512a7592 100644
--- a/include/media/saa7115.h
+++ b/include/media/saa7115.h
@@ -64,5 +64,69 @@
#define SAA7115_FREQ_FL_APLL (1 << 2) /* SA 3A[3], APLL, SAA7114/5 only */
#define SAA7115_FREQ_FL_DOUBLE_ASCLK (1 << 3) /* SA 39, LRDIV, SAA7114/5 only */
+/* ===== SAA7113 Config enums ===== */
+
+/* Register 0x08 "Horizontal time constant" [Bit 3..4]:
+ * Should be set to "Fast Locking Mode" according to the datasheet,
+ * and that is the default setting in the gm7113c_init table.
+ * saa7113_init sets this value to "VTR Mode". */
+enum saa7113_r08_htc {
+ SAA7113_HTC_TV_MODE = 0x00,
+ SAA7113_HTC_VTR_MODE, /* Default for saa7113_init */
+ SAA7113_HTC_FAST_LOCKING_MODE = 0x03 /* Default for gm7113c_init */
+};
+
+/* Register 0x10 "Output format selection" [Bit 6..7]:
+ * Defaults to ITU_656 as specified in datasheet. */
+enum saa7113_r10_ofts {
+ SAA7113_OFTS_ITU_656 = 0x0, /* Default */
+ SAA7113_OFTS_VFLAG_BY_VREF,
+ SAA7113_OFTS_VFLAG_BY_DATA_TYPE
+};
+
+/* Register 0x12 "Output control" [Bit 0..3 Or Bit 4..7]:
+ * This is used to select what data is output on the RTS0 and RTS1 pins.
+ * RTS1 [Bit 4..7] Defaults to DOT_IN. (This value can not be set for RTS0)
+ * RTS0 [Bit 0..3] Defaults to VIPB in gm7113c_init as specified
+ * in the datasheet, but is set to HREF_HS in the saa7113_init table. */
+enum saa7113_r12_rts {
+ SAA7113_RTS_DOT_IN = 0, /* OBS: Only for RTS1 (Default RTS1) */
+ SAA7113_RTS_VIPB, /* Default RTS0 For gm7113c_init */
+ SAA7113_RTS_GPSW,
+ SAA7115_RTS_HL,
+ SAA7113_RTS_VL,
+ SAA7113_RTS_DL,
+ SAA7113_RTS_PLIN,
+ SAA7113_RTS_HREF_HS, /* Default RTS0 For saa7113_init */
+ SAA7113_RTS_HS,
+ SAA7113_RTS_HQ,
+ SAA7113_RTS_ODD,
+ SAA7113_RTS_VS,
+ SAA7113_RTS_V123,
+ SAA7113_RTS_VGATE,
+ SAA7113_RTS_VREF,
+ SAA7113_RTS_FID
+};
+
+struct saa7115_platform_data {
+ /* saa7113 only: Force the use of the gm7113c_init table,
+ * instead of the old saa7113_init table. */
+ bool saa7113_force_gm7113c_init;
+
+ /* SAA7113/GM7113C Specific configurations */
+ enum saa7113_r08_htc *saa7113_r08_htc; /* [R_08 - Bit 3..4] */
+
+ bool *saa7113_r10_vrln; /* [R_10 - Bit 3]
+ Disabled for gm7113c_init
+ Enabled for saa7113c_init */
+ enum saa7113_r10_ofts *saa7113_r10_ofts; /* [R_10 - Bit 6..7] */
+
+ enum saa7113_r12_rts *saa7113_r12_rts0; /* [R_12 - Bit 0..3] */
+ enum saa7113_r12_rts *saa7113_r12_rts1; /* [R_12 - Bit 4..7] */
+
+ bool *saa7113_r13_adlsb; /* [R_13 - Bit 7]
+ Default disabled */
+};
+
#endif
--
cgit v1.2.3-70-g09d2
From 04074f1fdfe9eefc51bded7f45fafd8cc5d3779c Mon Sep 17 00:00:00 2001
From: Mauro Carvalho Chehab <m.chehab@samsung.com>
Date: Sun, 18 Aug 2013 08:35:36 -0300
Subject: [media] saa7115: make multi-line comments compliant with CodingStyle
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
changeset 2ccf12a did a crappy job when added multi-line comment lines,
violating CodingStyle.
Change the comments added there to fulfill CodingStyle, and document
the platform_data using Documentation/kernel-doc-nano-HOWTO.txt.
Cc: Jon Arne Jørgensen <jonarne@jonarne.no>
Cc: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/saa7115.c | 24 +++++++++++++---------
include/media/saa7115.h | 49 +++++++++++++++++++++++++++------------------
2 files changed, 43 insertions(+), 30 deletions(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/saa7115.c b/drivers/media/i2c/saa7115.c
index 5cc48f751b3..637d0263452 100644
--- a/drivers/media/i2c/saa7115.c
+++ b/drivers/media/i2c/saa7115.c
@@ -225,12 +225,14 @@ static const unsigned char saa7111_init[] = {
0x00, 0x00
};
-/* This table has one illegal value, and some values that are not
- correct according to the datasheet initialization table.
-
- If you need a table with legal/default values tell the driver in
- i2c_board_info.platform_data, and you will get the gm7113c_init
- table instead. */
+/*
+ * This table has one illegal value, and some values that are not
+ * correct according to the datasheet initialization table.
+ *
+ * If you need a table with legal/default values tell the driver in
+ * i2c_board_info.platform_data, and you will get the gm7113c_init
+ * table instead.
+ */
/* SAA7113 Init codes */
static const unsigned char saa7113_init[] = {
@@ -265,10 +267,12 @@ static const unsigned char saa7113_init[] = {
0x00, 0x00
};
-/* GM7113C is a clone of the SAA7113 chip
- This init table is copied out of the saa7113 datasheet.
- In R_08 we enable "Automatic Field Detection" [AUFD],
- this is disabled when saa711x_set_v4lstd is called. */
+/*
+ * GM7113C is a clone of the SAA7113 chip
+ * This init table is copied out of the saa7113 datasheet.
+ * In R_08 we enable "Automatic Field Detection" [AUFD],
+ * this is disabled when saa711x_set_v4lstd is called.
+ */
static const unsigned char gm7113c_init[] = {
R_01_INC_DELAY, 0x08,
R_02_INPUT_CNTL_1, 0xc0,
diff --git a/include/media/saa7115.h b/include/media/saa7115.h
index e8d512a7592..76911e71de1 100644
--- a/include/media/saa7115.h
+++ b/include/media/saa7115.h
@@ -47,9 +47,11 @@
#define SAA7111_FMT_YUV411 0xc0
/* config flags */
-/* Register 0x85 should set bit 0 to 0 (it's 1 by default). This bit
+/*
+ * Register 0x85 should set bit 0 to 0 (it's 1 by default). This bit
* controls the IDQ signal polarity which is set to 'inverted' if the bit
- * it 1 and to 'default' if it is 0. */
+ * it 1 and to 'default' if it is 0.
+ */
#define SAA7115_IDQ_IS_DEFAULT (1 << 0)
/* s_crystal_freq values and flags */
@@ -84,11 +86,13 @@ enum saa7113_r10_ofts {
SAA7113_OFTS_VFLAG_BY_DATA_TYPE
};
-/* Register 0x12 "Output control" [Bit 0..3 Or Bit 4..7]:
+/*
+ * Register 0x12 "Output control" [Bit 0..3 Or Bit 4..7]:
* This is used to select what data is output on the RTS0 and RTS1 pins.
* RTS1 [Bit 4..7] Defaults to DOT_IN. (This value can not be set for RTS0)
* RTS0 [Bit 0..3] Defaults to VIPB in gm7113c_init as specified
- * in the datasheet, but is set to HREF_HS in the saa7113_init table. */
+ * in the datasheet, but is set to HREF_HS in the saa7113_init table.
+ */
enum saa7113_r12_rts {
SAA7113_RTS_DOT_IN = 0, /* OBS: Only for RTS1 (Default RTS1) */
SAA7113_RTS_VIPB, /* Default RTS0 For gm7113c_init */
@@ -108,24 +112,29 @@ enum saa7113_r12_rts {
SAA7113_RTS_FID
};
+/**
+ * struct saa7115_platform_data - Allow overriding default initialization
+ *
+ * @saa7113_force_gm7113c_init: Force the use of the gm7113c_init table
+ * instead of saa7113_init table
+ * (saa7113 only)
+ * @saa7113_r08_htc: [R_08 - Bit 3..4]
+ * @saa7113_r10_vrln: [R_10 - Bit 3]
+ * default: Disabled for gm7113c_init
+ * Enabled for saa7113c_init
+ * @saa7113_r10_ofts: [R_10 - Bit 6..7]
+ * @saa7113_r12_rts0: [R_12 - Bit 0..3]
+ * @saa7113_r12_rts1: [R_12 - Bit 4..7]
+ * @saa7113_r13_adlsb: [R_13 - Bit 7] - default: disabled
+ */
struct saa7115_platform_data {
- /* saa7113 only: Force the use of the gm7113c_init table,
- * instead of the old saa7113_init table. */
bool saa7113_force_gm7113c_init;
-
- /* SAA7113/GM7113C Specific configurations */
- enum saa7113_r08_htc *saa7113_r08_htc; /* [R_08 - Bit 3..4] */
-
- bool *saa7113_r10_vrln; /* [R_10 - Bit 3]
- Disabled for gm7113c_init
- Enabled for saa7113c_init */
- enum saa7113_r10_ofts *saa7113_r10_ofts; /* [R_10 - Bit 6..7] */
-
- enum saa7113_r12_rts *saa7113_r12_rts0; /* [R_12 - Bit 0..3] */
- enum saa7113_r12_rts *saa7113_r12_rts1; /* [R_12 - Bit 4..7] */
-
- bool *saa7113_r13_adlsb; /* [R_13 - Bit 7]
- Default disabled */
+ enum saa7113_r08_htc *saa7113_r08_htc;
+ bool *saa7113_r10_vrln;
+ enum saa7113_r10_ofts *saa7113_r10_ofts;
+ enum saa7113_r12_rts *saa7113_r12_rts0;
+ enum saa7113_r12_rts *saa7113_r12_rts1;
+ bool *saa7113_r13_adlsb;
};
#endif
--
cgit v1.2.3-70-g09d2
From 3d238885dbfd5359cd0c12fad858e8638f17bfc6 Mon Sep 17 00:00:00 2001
From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Date: Tue, 30 Jul 2013 03:34:06 -0300
Subject: [media] V4L2: mt9t031: don't Oops if asynchronous probing is
attempted
The mt9t031 driver hasn't yet been updated to support asynchronous
subdevice probing. If such a probing is attempted, the driver is allowed
to fail, but it shouldn't Oops. This patch fixes such a potential NULL
pointer dereference.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/soc_camera/mt9t031.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/soc_camera/mt9t031.c b/drivers/media/i2c/soc_camera/mt9t031.c
index 47d18d0bafe..ee7bb0ffcec 100644
--- a/drivers/media/i2c/soc_camera/mt9t031.c
+++ b/drivers/media/i2c/soc_camera/mt9t031.c
@@ -594,9 +594,12 @@ static int mt9t031_s_power(struct v4l2_subdev *sd, int on)
ret = soc_camera_power_on(&client->dev, ssdd, mt9t031->clk);
if (ret < 0)
return ret;
- vdev->dev.type = &mt9t031_dev_type;
+ if (vdev)
+ /* Not needed during probing, when vdev isn't available yet */
+ vdev->dev.type = &mt9t031_dev_type;
} else {
- vdev->dev.type = NULL;
+ if (vdev)
+ vdev->dev.type = NULL;
soc_camera_power_off(&client->dev, ssdd, mt9t031->clk);
}
--
cgit v1.2.3-70-g09d2
From ef6672ea35b5bb64ab42e18c1a1ffc717c31588a Mon Sep 17 00:00:00 2001
From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Date: Tue, 30 Jul 2013 04:35:18 -0300
Subject: [media] V4L2: mt9m111: switch to asynchronous subdevice probing
Convert the mt9m111 driver to asynchronous subdevice probing. Synchronous
probing is also still possible.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/soc_camera/mt9m111.c | 38 +++++++++++++++++++++++-----------
1 file changed, 26 insertions(+), 12 deletions(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/soc_camera/mt9m111.c b/drivers/media/i2c/soc_camera/mt9m111.c
index de3605df47c..6f4056668bb 100644
--- a/drivers/media/i2c/soc_camera/mt9m111.c
+++ b/drivers/media/i2c/soc_camera/mt9m111.c
@@ -946,6 +946,10 @@ static int mt9m111_probe(struct i2c_client *client,
if (!mt9m111)
return -ENOMEM;
+ mt9m111->clk = v4l2_clk_get(&client->dev, "mclk");
+ if (IS_ERR(mt9m111->clk))
+ return -EPROBE_DEFER;
+
/* Default HIGHPOWER context */
mt9m111->ctx = &context_b;
@@ -963,8 +967,10 @@ static int mt9m111_probe(struct i2c_client *client,
&mt9m111_ctrl_ops, V4L2_CID_EXPOSURE_AUTO, 1, 0,
V4L2_EXPOSURE_AUTO);
mt9m111->subdev.ctrl_handler = &mt9m111->hdl;
- if (mt9m111->hdl.error)
- return mt9m111->hdl.error;
+ if (mt9m111->hdl.error) {
+ ret = mt9m111->hdl.error;
+ goto out_clkput;
+ }
/* Second stage probe - when a capture adapter is there */
mt9m111->rect.left = MT9M111_MIN_DARK_COLS;
@@ -975,18 +981,25 @@ static int mt9m111_probe(struct i2c_client *client,
mt9m111->lastpage = -1;
mutex_init(&mt9m111->power_lock);
- mt9m111->clk = v4l2_clk_get(&client->dev, "mclk");
- if (IS_ERR(mt9m111->clk)) {
- ret = PTR_ERR(mt9m111->clk);
- goto eclkget;
- }
+ ret = soc_camera_power_init(&client->dev, ssdd);
+ if (ret < 0)
+ goto out_hdlfree;
ret = mt9m111_video_probe(client);
- if (ret) {
- v4l2_clk_put(mt9m111->clk);
-eclkget:
- v4l2_ctrl_handler_free(&mt9m111->hdl);
- }
+ if (ret < 0)
+ goto out_hdlfree;
+
+ mt9m111->subdev.dev = &client->dev;
+ ret = v4l2_async_register_subdev(&mt9m111->subdev);
+ if (ret < 0)
+ goto out_hdlfree;
+
+ return 0;
+
+out_hdlfree:
+ v4l2_ctrl_handler_free(&mt9m111->hdl);
+out_clkput:
+ v4l2_clk_put(mt9m111->clk);
return ret;
}
@@ -995,6 +1008,7 @@ static int mt9m111_remove(struct i2c_client *client)
{
struct mt9m111 *mt9m111 = to_mt9m111(client);
+ v4l2_async_unregister_subdev(&mt9m111->subdev);
v4l2_clk_put(mt9m111->clk);
v4l2_device_unregister_subdev(&mt9m111->subdev);
v4l2_ctrl_handler_free(&mt9m111->hdl);
--
cgit v1.2.3-70-g09d2
From 3dbc9964b926c4ab4340df902efdb40bfe769811 Mon Sep 17 00:00:00 2001
From: Andrzej Hajda <a.hajda@samsung.com>
Date: Wed, 24 Jul 2013 10:57:32 -0300
Subject: [media] V4L: s5c73m3: Add format propagation for TRY formats
Resolution set on ISP pad of S5C73M3-OIF subdev should be
propagated to source pad for TRY and ACTIVE formats.
The patch adds missing propagation for TRY format.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/s5c73m3/s5c73m3-core.c | 5 +++++
1 file changed, 5 insertions(+)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/s5c73m3/s5c73m3-core.c b/drivers/media/i2c/s5c73m3/s5c73m3-core.c
index 825ea86d982..b76ec0e7e68 100644
--- a/drivers/media/i2c/s5c73m3/s5c73m3-core.c
+++ b/drivers/media/i2c/s5c73m3/s5c73m3-core.c
@@ -1111,6 +1111,11 @@ static int s5c73m3_oif_set_fmt(struct v4l2_subdev *sd,
if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
mf = v4l2_subdev_get_try_format(fh, fmt->pad);
*mf = fmt->format;
+ if (fmt->pad == OIF_ISP_PAD) {
+ mf = v4l2_subdev_get_try_format(fh, OIF_SOURCE_PAD);
+ mf->width = fmt->format.width;
+ mf->height = fmt->format.height;
+ }
} else {
switch (fmt->pad) {
case OIF_ISP_PAD:
--
cgit v1.2.3-70-g09d2
From 3300a8fd48976e7126cf078de95f52d59e413bb0 Mon Sep 17 00:00:00 2001
From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Date: Fri, 5 Jul 2013 07:16:02 -0300
Subject: [media] mt9v032: Use the common clock framework
Configure the device external clock using the common clock framework
instead of a board code callback function.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/mt9v032.c | 17 +++++++++++------
include/media/mt9v032.h | 4 ----
2 files changed, 11 insertions(+), 10 deletions(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/mt9v032.c b/drivers/media/i2c/mt9v032.c
index 60c6f673956..2c50effaa33 100644
--- a/drivers/media/i2c/mt9v032.c
+++ b/drivers/media/i2c/mt9v032.c
@@ -12,6 +12,7 @@
* published by the Free Software Foundation.
*/
+#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/log2.h>
@@ -135,6 +136,8 @@ struct mt9v032 {
struct mutex power_lock;
int power_count;
+ struct clk *clk;
+
struct mt9v032_platform_data *pdata;
u32 sysclk;
@@ -219,10 +222,9 @@ static int mt9v032_power_on(struct mt9v032 *mt9v032)
struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
int ret;
- if (mt9v032->pdata->set_clock) {
- mt9v032->pdata->set_clock(&mt9v032->subdev, mt9v032->sysclk);
- udelay(1);
- }
+ clk_set_rate(mt9v032->clk, mt9v032->sysclk);
+ clk_prepare_enable(mt9v032->clk);
+ udelay(1);
/* Reset the chip and stop data read out */
ret = mt9v032_write(client, MT9V032_RESET, 1);
@@ -238,8 +240,7 @@ static int mt9v032_power_on(struct mt9v032 *mt9v032)
static void mt9v032_power_off(struct mt9v032 *mt9v032)
{
- if (mt9v032->pdata->set_clock)
- mt9v032->pdata->set_clock(&mt9v032->subdev, 0);
+ clk_disable_unprepare(mt9v032->clk);
}
static int __mt9v032_set_power(struct mt9v032 *mt9v032, bool on)
@@ -748,6 +749,10 @@ static int mt9v032_probe(struct i2c_client *client,
if (!mt9v032)
return -ENOMEM;
+ mt9v032->clk = devm_clk_get(&client->dev, NULL);
+ if (IS_ERR(mt9v032->clk))
+ return PTR_ERR(mt9v032->clk);
+
mutex_init(&mt9v032->power_lock);
mt9v032->pdata = pdata;
diff --git a/include/media/mt9v032.h b/include/media/mt9v032.h
index 78fd39eac21..12175a63c5b 100644
--- a/include/media/mt9v032.h
+++ b/include/media/mt9v032.h
@@ -1,13 +1,9 @@
#ifndef _MEDIA_MT9V032_H
#define _MEDIA_MT9V032_H
-struct v4l2_subdev;
-
struct mt9v032_platform_data {
unsigned int clk_pol:1;
- void (*set_clock)(struct v4l2_subdev *subdev, unsigned int rate);
-
const s64 *link_freqs;
s64 link_def_freq;
};
--
cgit v1.2.3-70-g09d2
From 7be5c289818cd5a968b35cdaa1e82985a930b5a8 Mon Sep 17 00:00:00 2001
From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Date: Sat, 10 Aug 2013 14:49:45 -0300
Subject: [media] smiapp: re-use clamp_t instead of min(..., max(...))
clamp_t does the job to put a variable into the given range.
clamp_t -> clamp as agreed with Andy.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Sakari Ailus <sakari.ailus@iki.fi>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/smiapp/smiapp-core.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/smiapp/smiapp-core.c b/drivers/media/i2c/smiapp/smiapp-core.c
index 7ac7580f85c..4d7ba548b93 100644
--- a/drivers/media/i2c/smiapp/smiapp-core.c
+++ b/drivers/media/i2c/smiapp/smiapp-core.c
@@ -1835,12 +1835,12 @@ static void smiapp_set_compose_scaler(struct v4l2_subdev *subdev,
* sensor->limits[SMIAPP_LIMIT_SCALER_N_MIN]
/ sensor->limits[SMIAPP_LIMIT_MIN_X_OUTPUT_SIZE];
- a = min(sensor->limits[SMIAPP_LIMIT_SCALER_M_MAX],
- max(a, sensor->limits[SMIAPP_LIMIT_SCALER_M_MIN]));
- b = min(sensor->limits[SMIAPP_LIMIT_SCALER_M_MAX],
- max(b, sensor->limits[SMIAPP_LIMIT_SCALER_M_MIN]));
- max_m = min(sensor->limits[SMIAPP_LIMIT_SCALER_M_MAX],
- max(max_m, sensor->limits[SMIAPP_LIMIT_SCALER_M_MIN]));
+ a = clamp(a, sensor->limits[SMIAPP_LIMIT_SCALER_M_MIN],
+ sensor->limits[SMIAPP_LIMIT_SCALER_M_MAX]);
+ b = clamp(b, sensor->limits[SMIAPP_LIMIT_SCALER_M_MIN],
+ sensor->limits[SMIAPP_LIMIT_SCALER_M_MAX]);
+ max_m = clamp(max_m, sensor->limits[SMIAPP_LIMIT_SCALER_M_MIN],
+ sensor->limits[SMIAPP_LIMIT_SCALER_M_MAX]);
dev_dbg(&client->dev, "scaling: a %d b %d max_m %d\n", a, b, max_m);
--
cgit v1.2.3-70-g09d2
From 367da7a31804ee76ebce5bc8706fcda507008ac3 Mon Sep 17 00:00:00 2001
From: Sakari Ailus <sakari.ailus@iki.fi>
Date: Sat, 10 Aug 2013 14:49:46 -0300
Subject: [media] smiapp-pll: Add a few comments to PLL calculation
The PLL calculation heuristics is rather complicated and and is often
difficult to understand to its original author.
Signed-off-by: Sakari Ailus <sakari.ailus@iki.fi>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/smiapp-pll.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/smiapp-pll.c b/drivers/media/i2c/smiapp-pll.c
index d8d5da7c52d..2335529b195 100644
--- a/drivers/media/i2c/smiapp-pll.c
+++ b/drivers/media/i2c/smiapp-pll.c
@@ -87,6 +87,17 @@ static void print_pll(struct device *dev, struct smiapp_pll *pll)
dev_dbg(dev, "vt_pix_clk_freq_hz \t%d\n", pll->vt_pix_clk_freq_hz);
}
+/*
+ * Heuristically guess the PLL tree for a given common multiplier and
+ * divisor. Begin with the operational timing and continue to video
+ * timing once operational timing has been verified.
+ *
+ * @mul is the PLL multiplier and @div is the common divisor
+ * (pre_pll_clk_div and op_sys_clk_div combined). The final PLL
+ * multiplier will be a multiple of @mul.
+ *
+ * @return Zero on success, error code on error.
+ */
static int __smiapp_pll_calculate(struct device *dev,
const struct smiapp_pll_limits *limits,
struct smiapp_pll *pll, uint32_t mul,
@@ -95,6 +106,12 @@ static int __smiapp_pll_calculate(struct device *dev,
uint32_t sys_div;
uint32_t best_pix_div = INT_MAX >> 1;
uint32_t vt_op_binning_div;
+ /*
+ * Higher multipliers (and divisors) are often required than
+ * necessitated by the external clock and the output clocks.
+ * There are limits for all values in the clock tree. These
+ * are the minimum and maximum multiplier for mul.
+ */
uint32_t more_mul_min, more_mul_max;
uint32_t more_mul_factor;
uint32_t min_vt_div, max_vt_div, vt_div;
--
cgit v1.2.3-70-g09d2
From d0aae0048aef36065de953878422c475f53230d0 Mon Sep 17 00:00:00 2001
From: Sakari Ailus <sakari.ailus@iki.fi>
Date: Sat, 10 Aug 2013 14:49:47 -0300
Subject: [media] smiapp: Prepare and unprepare clocks correctly
Prepare clocks before enabling and unprepare after disabling them.
Signed-off-by: Sakari Ailus <sakari.ailus@iki.fi>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/smiapp/smiapp-core.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/smiapp/smiapp-core.c b/drivers/media/i2c/smiapp/smiapp-core.c
index 4d7ba548b93..7de9892fb6c 100644
--- a/drivers/media/i2c/smiapp/smiapp-core.c
+++ b/drivers/media/i2c/smiapp/smiapp-core.c
@@ -1122,9 +1122,9 @@ static int smiapp_power_on(struct smiapp_sensor *sensor)
rval = sensor->platform_data->set_xclk(
&sensor->src->sd, sensor->platform_data->ext_clk);
else
- rval = clk_enable(sensor->ext_clk);
+ rval = clk_prepare_enable(sensor->ext_clk);
if (rval < 0) {
- dev_dbg(&client->dev, "failed to set xclk\n");
+ dev_dbg(&client->dev, "failed to enable xclk\n");
goto out_xclk_fail;
}
usleep_range(1000, 1000);
@@ -1244,7 +1244,7 @@ out_cci_addr_fail:
if (sensor->platform_data->set_xclk)
sensor->platform_data->set_xclk(&sensor->src->sd, 0);
else
- clk_disable(sensor->ext_clk);
+ clk_disable_unprepare(sensor->ext_clk);
out_xclk_fail:
regulator_disable(sensor->vana);
@@ -1270,7 +1270,7 @@ static void smiapp_power_off(struct smiapp_sensor *sensor)
if (sensor->platform_data->set_xclk)
sensor->platform_data->set_xclk(&sensor->src->sd, 0);
else
- clk_disable(sensor->ext_clk);
+ clk_disable_unprepare(sensor->ext_clk);
usleep_range(5000, 5000);
regulator_disable(sensor->vana);
sensor->streaming = 0;
@@ -2839,7 +2839,7 @@ static int smiapp_remove(struct i2c_client *client)
if (sensor->platform_data->set_xclk)
sensor->platform_data->set_xclk(&sensor->src->sd, 0);
else
- clk_disable(sensor->ext_clk);
+ clk_disable_unprepare(sensor->ext_clk);
sensor->power_count = 0;
}
--
cgit v1.2.3-70-g09d2
From a354177f058541b7212230feb2c0da7c464e9b9d Mon Sep 17 00:00:00 2001
From: Sakari Ailus <sakari.ailus@iki.fi>
Date: Sat, 10 Aug 2013 14:49:48 -0300
Subject: [media] smiapp: Call the clock "ext_clk"
As the clock framework makes it possible to assign a device specific name to
the clocks, remove the ability to use a named clock in the driver.
Signed-off-by: Sakari Ailus <sakari.ailus@iki.fi>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/smiapp/smiapp-core.c | 9 +++------
include/media/smiapp.h | 1 -
2 files changed, 3 insertions(+), 7 deletions(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/smiapp/smiapp-core.c b/drivers/media/i2c/smiapp/smiapp-core.c
index 7de9892fb6c..ae66d91bf71 100644
--- a/drivers/media/i2c/smiapp/smiapp-core.c
+++ b/drivers/media/i2c/smiapp/smiapp-core.c
@@ -2363,11 +2363,9 @@ static int smiapp_registered(struct v4l2_subdev *subdev)
}
if (!sensor->platform_data->set_xclk) {
- sensor->ext_clk = devm_clk_get(&client->dev,
- sensor->platform_data->ext_clk_name);
+ sensor->ext_clk = devm_clk_get(&client->dev, "ext_clk");
if (IS_ERR(sensor->ext_clk)) {
- dev_err(&client->dev, "could not get clock %s\n",
- sensor->platform_data->ext_clk_name);
+ dev_err(&client->dev, "could not get clock\n");
return -ENODEV;
}
@@ -2375,8 +2373,7 @@ static int smiapp_registered(struct v4l2_subdev *subdev)
sensor->platform_data->ext_clk);
if (rval < 0) {
dev_err(&client->dev,
- "unable to set clock %s freq to %u\n",
- sensor->platform_data->ext_clk_name,
+ "unable to set clock freq to %u\n",
sensor->platform_data->ext_clk);
return -ENODEV;
}
diff --git a/include/media/smiapp.h b/include/media/smiapp.h
index 07f96a89e18..0b8f124a630 100644
--- a/include/media/smiapp.h
+++ b/include/media/smiapp.h
@@ -77,7 +77,6 @@ struct smiapp_platform_data {
struct smiapp_flash_strobe_parms *strobe_setup;
int (*set_xclk)(struct v4l2_subdev *sd, int hz);
- char *ext_clk_name;
int xshutdown; /* gpio or SMIAPP_NO_XSHUTDOWN */
};
--
cgit v1.2.3-70-g09d2
From c0d9644fa01892653bc9e31ef4296e78f8d8c1ca Mon Sep 17 00:00:00 2001
From: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
Date: Sun, 11 Aug 2013 02:25:21 -0300
Subject: [media] media: i2c: tvp7002: add OF support
add OF support for the tvp7002 driver.
Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
.../devicetree/bindings/media/i2c/tvp7002.txt | 53 +++++++++++++++++
drivers/media/i2c/tvp7002.c | 67 +++++++++++++++++++---
2 files changed, 113 insertions(+), 7 deletions(-)
create mode 100644 Documentation/devicetree/bindings/media/i2c/tvp7002.txt
(limited to 'drivers/media/i2c')
diff --git a/Documentation/devicetree/bindings/media/i2c/tvp7002.txt b/Documentation/devicetree/bindings/media/i2c/tvp7002.txt
new file mode 100644
index 00000000000..5f28b5d9abc
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/i2c/tvp7002.txt
@@ -0,0 +1,53 @@
+* Texas Instruments TV7002 video decoder
+
+The TVP7002 device supports digitizing of video and graphics signal in RGB and
+YPbPr color space.
+
+Required Properties :
+- compatible : Must be "ti,tvp7002"
+
+Optional Properties:
+- hsync-active: HSYNC Polarity configuration for the bus. Default value when
+ this property is not specified is <0>.
+
+- vsync-active: VSYNC Polarity configuration for the bus. Default value when
+ this property is not specified is <0>.
+
+- pclk-sample: Clock polarity of the bus. Default value when this property is
+ not specified is <0>.
+
+- sync-on-green-active: Active state of Sync-on-green signal property of the
+ endpoint.
+ 0 = Normal Operation (Active Low, Default)
+ 1 = Inverted operation
+
+- field-even-active: Active-high Field ID output polarity control of the bus.
+ Under normal operation, the field ID output is set to logic 1 for an odd field
+ (field 1) and set to logic 0 for an even field (field 0).
+ 0 = Normal Operation (Active Low, Default)
+ 1 = FID output polarity inverted
+
+For further reading of port node refer Documentation/devicetree/bindings/media/
+video-interfaces.txt.
+
+Example:
+
+ i2c0@1c22000 {
+ ...
+ ...
+ tvp7002@5c {
+ compatible = "ti,tvp7002";
+ reg = <0x5c>;
+
+ port {
+ tvp7002_1: endpoint {
+ hsync-active = <1>;
+ vsync-active = <1>;
+ pclk-sample = <0>;
+ sync-on-green-active = <1>;
+ field-even-active = <0>;
+ };
+ };
+ };
+ ...
+ };
diff --git a/drivers/media/i2c/tvp7002.c b/drivers/media/i2c/tvp7002.c
index f6b1f3fe260..24a08fa7e32 100644
--- a/drivers/media/i2c/tvp7002.c
+++ b/drivers/media/i2c/tvp7002.c
@@ -35,6 +35,8 @@
#include <media/v4l2-device.h>
#include <media/v4l2-common.h>
#include <media/v4l2-ctrls.h>
+#include <media/v4l2-of.h>
+
#include "tvp7002_reg.h"
MODULE_DESCRIPTION("TI TVP7002 Video and Graphics Digitizer driver");
@@ -943,6 +945,48 @@ static const struct v4l2_subdev_ops tvp7002_ops = {
.pad = &tvp7002_pad_ops,
};
+static struct tvp7002_config *
+tvp7002_get_pdata(struct i2c_client *client)
+{
+ struct v4l2_of_endpoint bus_cfg;
+ struct tvp7002_config *pdata;
+ struct device_node *endpoint;
+ unsigned int flags;
+
+ if (!IS_ENABLED(CONFIG_OF) || !client->dev.of_node)
+ return client->dev.platform_data;
+
+ endpoint = v4l2_of_get_next_endpoint(client->dev.of_node, NULL);
+ if (!endpoint)
+ return NULL;
+
+ pdata = devm_kzalloc(&client->dev, sizeof(*pdata), GFP_KERNEL);
+ if (!pdata)
+ goto done;
+
+ v4l2_of_parse_endpoint(endpoint, &bus_cfg);
+ flags = bus_cfg.bus.parallel.flags;
+
+ if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
+ pdata->hs_polarity = 1;
+
+ if (flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH)
+ pdata->vs_polarity = 1;
+
+ if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
+ pdata->clk_polarity = 1;
+
+ if (flags & V4L2_MBUS_FIELD_EVEN_HIGH)
+ pdata->fid_polarity = 1;
+
+ if (flags & V4L2_MBUS_VIDEO_SOG_ACTIVE_HIGH)
+ pdata->sog_polarity = 1;
+
+done:
+ of_node_put(endpoint);
+ return pdata;
+}
+
/*
* tvp7002_probe - Probe a TVP7002 device
* @c: ptr to i2c_client struct
@@ -954,32 +998,32 @@ static const struct v4l2_subdev_ops tvp7002_ops = {
*/
static int tvp7002_probe(struct i2c_client *c, const struct i2c_device_id *id)
{
+ struct tvp7002_config *pdata = tvp7002_get_pdata(c);
struct v4l2_subdev *sd;
struct tvp7002 *device;
struct v4l2_dv_timings timings;
int polarity_a;
int polarity_b;
u8 revision;
-
int error;
+ if (pdata == NULL) {
+ dev_err(&c->dev, "No platform data\n");
+ return -EINVAL;
+ }
+
/* Check if the adapter supports the needed features */
if (!i2c_check_functionality(c->adapter,
I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
return -EIO;
- if (!c->dev.platform_data) {
- v4l_err(c, "No platform data!!\n");
- return -ENODEV;
- }
-
device = devm_kzalloc(&c->dev, sizeof(struct tvp7002), GFP_KERNEL);
if (!device)
return -ENOMEM;
sd = &device->sd;
- device->pdata = c->dev.platform_data;
+ device->pdata = pdata;
device->current_timings = tvp7002_timings;
/* Tell v4l2 the device is ready */
@@ -1084,9 +1128,18 @@ static const struct i2c_device_id tvp7002_id[] = {
};
MODULE_DEVICE_TABLE(i2c, tvp7002_id);
+#if IS_ENABLED(CONFIG_OF)
+static const struct of_device_id tvp7002_of_match[] = {
+ { .compatible = "ti,tvp7002", },
+ { /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, tvp7002_of_match);
+#endif
+
/* I2C driver data */
static struct i2c_driver tvp7002_driver = {
.driver = {
+ .of_match_table = of_match_ptr(tvp7002_of_match),
.owner = THIS_MODULE,
.name = TVP7002_MODULE_NAME,
},
--
cgit v1.2.3-70-g09d2
From 25a64ac95055d87e2e7b86ba3b9a81e91cb55a39 Mon Sep 17 00:00:00 2001
From: Mats Randgaard <matrandg@cisco.com>
Date: Wed, 14 Aug 2013 07:58:45 -0300
Subject: [media] adv7604: debounce "format change" notifications
The bridge driver is only notified when the input status has changed
since the previous interrupt.
Signed-off-by: Mats Randgaard <matrandg@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/adv7604.c | 20 +++++++++++++++++---
1 file changed, 17 insertions(+), 3 deletions(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/adv7604.c b/drivers/media/i2c/adv7604.c
index 3ec7ec0911c..d093092988f 100644
--- a/drivers/media/i2c/adv7604.c
+++ b/drivers/media/i2c/adv7604.c
@@ -77,6 +77,7 @@ struct adv7604_state {
struct delayed_work delayed_work_enable_hotplug;
bool connector_hdmi;
bool restart_stdi_once;
+ u32 prev_input_status;
/* i2c clients */
struct i2c_client *i2c_avlink;
@@ -1535,6 +1536,7 @@ static int adv7604_isr(struct v4l2_subdev *sd, u32 status, bool *handled)
{
struct adv7604_state *state = to_state(sd);
u8 fmt_change, fmt_change_digital, tx_5v;
+ u32 input_status;
/* format change */
fmt_change = io_read(sd, 0x43) & 0x98;
@@ -1545,9 +1547,18 @@ static int adv7604_isr(struct v4l2_subdev *sd, u32 status, bool *handled)
io_write(sd, 0x6c, fmt_change_digital);
if (fmt_change || fmt_change_digital) {
v4l2_dbg(1, debug, sd,
- "%s: ADV7604_FMT_CHANGE, fmt_change = 0x%x, fmt_change_digital = 0x%x\n",
+ "%s: fmt_change = 0x%x, fmt_change_digital = 0x%x\n",
__func__, fmt_change, fmt_change_digital);
- v4l2_subdev_notify(sd, ADV7604_FMT_CHANGE, NULL);
+
+ adv7604_g_input_status(sd, &input_status);
+ if (input_status != state->prev_input_status) {
+ v4l2_dbg(1, debug, sd,
+ "%s: input_status = 0x%x, prev_input_status = 0x%x\n",
+ __func__, input_status, state->prev_input_status);
+ state->prev_input_status = input_status;
+ v4l2_subdev_notify(sd, ADV7604_FMT_CHANGE, NULL);
+ }
+
if (handled)
*handled = true;
}
@@ -1953,6 +1964,10 @@ static int adv7604_probe(struct i2c_client *client,
return -ENOMEM;
}
+ /* initialize variables */
+ state->restart_stdi_once = true;
+ state->prev_input_status = ~0;
+
/* platform data */
if (!pdata) {
v4l_err(client, "No platform data!\n");
@@ -2036,7 +2051,6 @@ static int adv7604_probe(struct i2c_client *client,
v4l2_err(sd, "failed to create all i2c clients\n");
goto err_i2c;
}
- state->restart_stdi_once = true;
/* work queues */
state->work_queues = create_singlethread_workqueue(client->name);
--
cgit v1.2.3-70-g09d2
From bb88f325a4685de821d4de352c987bc30bd4ebca Mon Sep 17 00:00:00 2001
From: Martin Bugge <marbugge@cisco.com>
Date: Wed, 14 Aug 2013 08:52:46 -0300
Subject: [media] adv7604: pixel-clock depends on deep-color-mode
The frequency calculation has to take deep-color mode into account.
While we're at it, also log the deep-color mode in log_status.
Signed-off-by: Martin Bugge <marbugge@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/adv7604.c | 28 +++++++++++++++++++++++++---
1 file changed, 25 insertions(+), 3 deletions(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/adv7604.c b/drivers/media/i2c/adv7604.c
index d093092988f..6ffe25a5b34 100644
--- a/drivers/media/i2c/adv7604.c
+++ b/drivers/media/i2c/adv7604.c
@@ -992,6 +992,11 @@ static inline bool no_lock_tmds(struct v4l2_subdev *sd)
return (io_read(sd, 0x6a) & 0xe0) != 0xe0;
}
+static inline bool is_hdmi(struct v4l2_subdev *sd)
+{
+ return hdmi_read(sd, 0x05) & 0x80;
+}
+
static inline bool no_lock_sspd(struct v4l2_subdev *sd)
{
/* TODO channel 2 */
@@ -1244,12 +1249,21 @@ static int adv7604_query_dv_timings(struct v4l2_subdev *sd,
V4L2_DV_INTERLACED : V4L2_DV_PROGRESSIVE;
if (DIGITAL_INPUT) {
+ uint32_t freq;
+
timings->type = V4L2_DV_BT_656_1120;
bt->width = (hdmi_read(sd, 0x07) & 0x0f) * 256 + hdmi_read(sd, 0x08);
bt->height = (hdmi_read(sd, 0x09) & 0x0f) * 256 + hdmi_read(sd, 0x0a);
- bt->pixelclock = (hdmi_read(sd, 0x06) * 1000000) +
+ freq = (hdmi_read(sd, 0x06) * 1000000) +
((hdmi_read(sd, 0x3b) & 0x30) >> 4) * 250000;
+ if (is_hdmi(sd)) {
+ /* adjust for deep color mode */
+ unsigned bits_per_channel = ((hdmi_read(sd, 0x0b) & 0x60) >> 4) + 8;
+
+ freq = freq * 8 / bits_per_channel;
+ }
+ bt->pixelclock = freq;
bt->hfrontporch = (hdmi_read(sd, 0x20) & 0x03) * 256 +
hdmi_read(sd, 0x21);
bt->hsync = (hdmi_read(sd, 0x22) & 0x03) * 256 +
@@ -1637,7 +1651,7 @@ static void print_avi_infoframe(struct v4l2_subdev *sd)
u8 avi_len;
u8 avi_ver;
- if (!(hdmi_read(sd, 0x05) & 0x80)) {
+ if (!is_hdmi(sd)) {
v4l2_info(sd, "receive DVI-D signal (AVI infoframe not supported)\n");
return;
}
@@ -1698,6 +1712,12 @@ static int adv7604_log_status(struct v4l2_subdev *sd)
"RGB limited range (16-235)",
"RGB full range (0-255)",
};
+ char *deep_color_mode_txt[4] = {
+ "8-bits per channel",
+ "10-bits per channel",
+ "12-bits per channel",
+ "16-bits per channel (not supported)"
+ };
v4l2_info(sd, "-----Chip status-----\n");
v4l2_info(sd, "Chip power: %s\n", no_power(sd) ? "off" : "on");
@@ -1756,7 +1776,9 @@ static int adv7604_log_status(struct v4l2_subdev *sd)
v4l2_info(sd, "-----HDMI status-----\n");
v4l2_info(sd, "HDCP encrypted content: %s\n",
hdmi_read(sd, 0x05) & 0x40 ? "true" : "false");
-
+ if (is_hdmi(sd))
+ v4l2_info(sd, "deep color mode: %s\n",
+ deep_color_mode_txt[(hdmi_read(sd, 0x0b) >> 5) & 0x3]);
print_avi_infoframe(sd);
}
--
cgit v1.2.3-70-g09d2
From 76eb2d30140d6a7072b7faf33b109c5a4e82ee4a Mon Sep 17 00:00:00 2001
From: Mats Randgaard <matrandg@cisco.com>
Date: Wed, 14 Aug 2013 08:56:57 -0300
Subject: [media] adv7604: improve log_status for HDMI/DVI-D signals
Don't log if there is no signal.
If there is a signal, then also log HDCP and audio status.
Signed-off-by: Mats Randgaard <matrandg@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/adv7604.c | 44 +++++++++++++++++++++++++++++++++++---------
1 file changed, 35 insertions(+), 9 deletions(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/adv7604.c b/drivers/media/i2c/adv7604.c
index 6ffe25a5b34..34fcdf3c52e 100644
--- a/drivers/media/i2c/adv7604.c
+++ b/drivers/media/i2c/adv7604.c
@@ -1758,6 +1758,9 @@ static int adv7604_log_status(struct v4l2_subdev *sd)
adv7604_print_timings(sd, &timings, "Detected format:", true);
adv7604_print_timings(sd, &state->timings, "Configured format:", true);
+ if (no_signal(sd))
+ return 0;
+
v4l2_info(sd, "-----Color space-----\n");
v4l2_info(sd, "RGB quantization range ctrl: %s\n",
rgb_quantization_range_txt[state->rgb_quantization_range]);
@@ -1767,18 +1770,41 @@ static int adv7604_log_status(struct v4l2_subdev *sd)
(reg_io_0x02 & 0x02) ? "RGB" : "YCbCr",
(reg_io_0x02 & 0x04) ? "(16-235)" : "(0-255)",
((reg_io_0x02 & 0x04) ^ (reg_io_0x02 & 0x01)) ?
- "enabled" : "disabled");
+ "enabled" : "disabled");
v4l2_info(sd, "Color space conversion: %s\n",
csc_coeff_sel_rb[cp_read(sd, 0xfc) >> 4]);
- /* Digital video */
- if (DIGITAL_INPUT) {
- v4l2_info(sd, "-----HDMI status-----\n");
- v4l2_info(sd, "HDCP encrypted content: %s\n",
- hdmi_read(sd, 0x05) & 0x40 ? "true" : "false");
- if (is_hdmi(sd))
- v4l2_info(sd, "deep color mode: %s\n",
- deep_color_mode_txt[(hdmi_read(sd, 0x0b) >> 5) & 0x3]);
+ if (!DIGITAL_INPUT)
+ return 0;
+
+ v4l2_info(sd, "-----%s status-----\n", is_hdmi(sd) ? "HDMI" : "DVI-D");
+ v4l2_info(sd, "HDCP encrypted content: %s\n", (hdmi_read(sd, 0x05) & 0x40) ? "true" : "false");
+ v4l2_info(sd, "HDCP keys read: %s%s\n",
+ (hdmi_read(sd, 0x04) & 0x20) ? "yes" : "no",
+ (hdmi_read(sd, 0x04) & 0x10) ? "ERROR" : "");
+ if (!is_hdmi(sd)) {
+ bool audio_pll_locked = hdmi_read(sd, 0x04) & 0x01;
+ bool audio_sample_packet_detect = hdmi_read(sd, 0x18) & 0x01;
+ bool audio_mute = io_read(sd, 0x65) & 0x40;
+
+ v4l2_info(sd, "Audio: pll %s, samples %s, %s\n",
+ audio_pll_locked ? "locked" : "not locked",
+ audio_sample_packet_detect ? "detected" : "not detected",
+ audio_mute ? "muted" : "enabled");
+ if (audio_pll_locked && audio_sample_packet_detect) {
+ v4l2_info(sd, "Audio format: %s\n",
+ (hdmi_read(sd, 0x07) & 0x20) ? "multi-channel" : "stereo");
+ }
+ v4l2_info(sd, "Audio CTS: %u\n", (hdmi_read(sd, 0x5b) << 12) +
+ (hdmi_read(sd, 0x5c) << 8) +
+ (hdmi_read(sd, 0x5d) & 0xf0));
+ v4l2_info(sd, "Audio N: %u\n", ((hdmi_read(sd, 0x5d) & 0x0f) << 16) +
+ (hdmi_read(sd, 0x5e) << 8) +
+ hdmi_read(sd, 0x5f));
+ v4l2_info(sd, "AV Mute: %s\n", (hdmi_read(sd, 0x04) & 0x40) ? "on" : "off");
+
+ v4l2_info(sd, "Deep color mode: %s\n", deep_color_mode_txt[(hdmi_read(sd, 0x0b) & 0x60) >> 5]);
+
print_avi_infoframe(sd);
}
--
cgit v1.2.3-70-g09d2
From 70028fe646e63dd01070d1aaf304bbbc80e4a90a Mon Sep 17 00:00:00 2001
From: Mats Randgaard <matrandg@cisco.com>
Date: Wed, 14 Aug 2013 08:59:44 -0300
Subject: [media] adv7604: print flags and standards in timing information
Signed-off-by: Mats Randgaard <matrandg@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/adv7604.c | 41 ++++++++++++++++++++++++++++-------------
1 file changed, 28 insertions(+), 13 deletions(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/adv7604.c b/drivers/media/i2c/adv7604.c
index 34fcdf3c52e..e732c9bcf0e 100644
--- a/drivers/media/i2c/adv7604.c
+++ b/drivers/media/i2c/adv7604.c
@@ -1052,7 +1052,8 @@ static int adv7604_g_input_status(struct v4l2_subdev *sd, u32 *status)
/* ----------------------------------------------------------------------- */
static void adv7604_print_timings(struct v4l2_subdev *sd,
- struct v4l2_dv_timings *timings, const char *txt, bool detailed)
+ struct v4l2_dv_timings *timings,
+ const char *txt, bool detailed)
{
struct v4l2_bt_timings *bt = &timings->bt;
u32 htot, vtot;
@@ -1069,18 +1070,32 @@ static void adv7604_print_timings(struct v4l2_subdev *sd,
(htot * vtot)) : 0,
htot, vtot);
- if (detailed) {
- v4l2_info(sd, " horizontal: fp = %d, %ssync = %d, bp = %d\n",
- bt->hfrontporch,
- (bt->polarities & V4L2_DV_HSYNC_POS_POL) ? "+" : "-",
- bt->hsync, bt->hbackporch);
- v4l2_info(sd, " vertical: fp = %d, %ssync = %d, bp = %d\n",
- bt->vfrontporch,
- (bt->polarities & V4L2_DV_VSYNC_POS_POL) ? "+" : "-",
- bt->vsync, bt->vbackporch);
- v4l2_info(sd, " pixelclock: %lld, flags: 0x%x, standards: 0x%x\n",
- bt->pixelclock, bt->flags, bt->standards);
- }
+ if (!detailed)
+ return;
+
+ v4l2_info(sd, " horizontal: fp = %d, %ssync = %d, bp = %d\n",
+ bt->hfrontporch,
+ (bt->polarities & V4L2_DV_HSYNC_POS_POL) ? "+" : "-",
+ bt->hsync, bt->hbackporch);
+ v4l2_info(sd, " vertical: fp = %d, %ssync = %d, bp = %d\n",
+ bt->vfrontporch,
+ (bt->polarities & V4L2_DV_VSYNC_POS_POL) ? "+" : "-",
+ bt->vsync, bt->vbackporch);
+ v4l2_info(sd, " pixelclock: %lld\n", bt->pixelclock);
+ v4l2_info(sd, " flags (0x%x):%s%s%s%s\n", bt->flags,
+ (bt->flags & V4L2_DV_FL_REDUCED_BLANKING) ?
+ " Reduced blanking," : "",
+ (bt->flags & V4L2_DV_FL_CAN_REDUCE_FPS) ?
+ " Can reduce FPS," : "",
+ (bt->flags & V4L2_DV_FL_REDUCED_FPS) ?
+ " Reduced FPS," : "",
+ (bt->flags & V4L2_DV_FL_HALF_LINE) ?
+ " Half line," : "");
+ v4l2_info(sd, " standards (0x%x):%s%s%s%s\n", bt->standards,
+ (bt->standards & V4L2_DV_BT_STD_CEA861) ? " CEA," : "",
+ (bt->standards & V4L2_DV_BT_STD_DMT) ? " DMT," : "",
+ (bt->standards & V4L2_DV_BT_STD_CVT) ? " CVT" : "",
+ (bt->standards & V4L2_DV_BT_STD_GTF) ? " GTF" : "");
}
struct stdi_readback {
--
cgit v1.2.3-70-g09d2
From 7be4f888112eeebd7ce33bca49b3a1df1fd52295 Mon Sep 17 00:00:00 2001
From: Mats Randgaard <matrandg@cisco.com>
Date: Wed, 14 Aug 2013 09:23:48 -0300
Subject: [media] ad9389b: no monitor if EDID is wrong
state->have_monitor is set to false if the EDID that is read from
the monitor has too many segments or wrong CRC.
Signed-off-by: Mats Randgaard <matrandg@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/ad9389b.c | 3 +++
1 file changed, 3 insertions(+)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/ad9389b.c b/drivers/media/i2c/ad9389b.c
index 7e68d8f9676..52384e83cde 100644
--- a/drivers/media/i2c/ad9389b.c
+++ b/drivers/media/i2c/ad9389b.c
@@ -1019,6 +1019,7 @@ static bool ad9389b_check_edid_status(struct v4l2_subdev *sd)
segment = ad9389b_rd(sd, 0xc4);
if (segment >= EDID_MAX_SEGM) {
v4l2_err(sd, "edid segment number too big\n");
+ state->have_monitor = false;
return false;
}
v4l2_dbg(1, debug, sd, "%s: got segment %d\n", __func__, segment);
@@ -1032,6 +1033,8 @@ static bool ad9389b_check_edid_status(struct v4l2_subdev *sd)
}
if (!edid_segment_verify_crc(sd, segment)) {
/* edid crc error, force reread of edid segment */
+ v4l2_err(sd, "%s: edid crc error\n", __func__);
+ state->have_monitor = false;
ad9389b_s_power(sd, false);
ad9389b_s_power(sd, true);
return false;
--
cgit v1.2.3-70-g09d2
From 15edc1ccdb29fe7cd55d329948c134c090a88b64 Mon Sep 17 00:00:00 2001
From: Martin Bugge <marbugge@cisco.com>
Date: Wed, 14 Aug 2013 09:24:33 -0300
Subject: [media] ad9389b: trigger edid re-read by power-cycle chip
Signed-off-by: Martin Bugge <marbugge@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/ad9389b.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/ad9389b.c b/drivers/media/i2c/ad9389b.c
index 52384e83cde..545aabbdae6 100644
--- a/drivers/media/i2c/ad9389b.c
+++ b/drivers/media/i2c/ad9389b.c
@@ -855,8 +855,10 @@ static void ad9389b_edid_handler(struct work_struct *work)
* (DVI connectors are particularly prone to this problem). */
if (state->edid.read_retries) {
state->edid.read_retries--;
- /* EDID read failed, trigger a retry */
- ad9389b_wr(sd, 0xc9, 0xf);
+ v4l2_dbg(1, debug, sd, "%s: edid read failed\n", __func__);
+ state->have_monitor = false;
+ ad9389b_s_power(sd, false);
+ ad9389b_s_power(sd, true);
queue_delayed_work(state->work_queue,
&state->edid_handler, EDID_DELAY);
return;
@@ -1019,7 +1021,6 @@ static bool ad9389b_check_edid_status(struct v4l2_subdev *sd)
segment = ad9389b_rd(sd, 0xc4);
if (segment >= EDID_MAX_SEGM) {
v4l2_err(sd, "edid segment number too big\n");
- state->have_monitor = false;
return false;
}
v4l2_dbg(1, debug, sd, "%s: got segment %d\n", __func__, segment);
--
cgit v1.2.3-70-g09d2
From 350a1815ded7debd6053da22cd75379c95c8ca4e Mon Sep 17 00:00:00 2001
From: Martin Bugge <marbugge@cisco.com>
Date: Wed, 14 Aug 2013 09:25:48 -0300
Subject: [media] adv7604: corrected edid crc-calculation
Signed-off-by: Martin Bugge <marbugge@cisco.com>
Reviewed-by: Mats Randgaard <matrandg@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/ad9389b.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/ad9389b.c b/drivers/media/i2c/ad9389b.c
index 545aabbdae6..d78fd3d634a 100644
--- a/drivers/media/i2c/ad9389b.c
+++ b/drivers/media/i2c/ad9389b.c
@@ -983,12 +983,12 @@ static void ad9389b_check_monitor_present_status(struct v4l2_subdev *sd)
static bool edid_block_verify_crc(u8 *edid_block)
{
- int i;
u8 sum = 0;
+ int i;
- for (i = 0; i < 127; i++)
- sum += *(edid_block + i);
- return ((255 - sum + 1) == edid_block[127]);
+ for (i = 0; i < 128; i++)
+ sum += edid_block[i];
+ return sum == 0;
}
static bool edid_segment_verify_crc(struct v4l2_subdev *sd, u32 segment)
--
cgit v1.2.3-70-g09d2
From f3b33ede51903e6cc211d9f0bdecc65646b71f17 Mon Sep 17 00:00:00 2001
From: Mats Randgaard <matrandg@cisco.com>
Date: Wed, 14 Aug 2013 09:26:28 -0300
Subject: [media] ad9389b: change initial register configuration in
ad9389b_setup()
- register 0x17: CSC scaling factor was set to +/- 2.0. This register
is set by ad9389b_csc_conversion_mode() to the right value.
- register 0x3b: bits for pixel repetition and CSC was set to zero,
but that is the default value.
Signed-off-by: Mats Randgaard <matrandg@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/ad9389b.c | 8 +++-----
1 file changed, 3 insertions(+), 5 deletions(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/ad9389b.c b/drivers/media/i2c/ad9389b.c
index d78fd3d634a..92cdb25c73f 100644
--- a/drivers/media/i2c/ad9389b.c
+++ b/drivers/media/i2c/ad9389b.c
@@ -894,11 +894,9 @@ static void ad9389b_setup(struct v4l2_subdev *sd)
ad9389b_wr_and_or(sd, 0x15, 0xf1, 0x0);
/* Output format: RGB 4:4:4 */
ad9389b_wr_and_or(sd, 0x16, 0x3f, 0x0);
- /* CSC fixed point: +/-2, 1st order interpolation 4:2:2 -> 4:4:4 up
- conversion, Aspect ratio: 16:9 */
- ad9389b_wr_and_or(sd, 0x17, 0xe1, 0x0e);
- /* Disable pixel repetition and CSC */
- ad9389b_wr_and_or(sd, 0x3b, 0x9e, 0x0);
+ /* 1st order interpolation 4:2:2 -> 4:4:4 up conversion,
+ Aspect ratio: 16:9 */
+ ad9389b_wr_and_or(sd, 0x17, 0xf9, 0x06);
/* Output format: RGB 4:4:4, Active Format Information is valid. */
ad9389b_wr_and_or(sd, 0x45, 0xc7, 0x08);
/* Underscanned */
--
cgit v1.2.3-70-g09d2
From 11d034c8b60c3eebc2a12f5e99a200f55a786230 Mon Sep 17 00:00:00 2001
From: Hans Verkuil <hans.verkuil@cisco.com>
Date: Thu, 15 Aug 2013 08:05:59 -0300
Subject: [media] ad9389b/adv7604/ths8200: use new v4l2_print_dv_timings helper
These three drivers all have code to log the dv_timings contents. Replace
that code with the new helper function.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/ad9389b.c | 17 +++----------
drivers/media/i2c/adv7604.c | 61 ++++++---------------------------------------
drivers/media/i2c/ths8200.c | 38 ++--------------------------
3 files changed, 14 insertions(+), 102 deletions(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/ad9389b.c b/drivers/media/i2c/ad9389b.c
index 92cdb25c73f..1c6d352acfa 100644
--- a/drivers/media/i2c/ad9389b.c
+++ b/drivers/media/i2c/ad9389b.c
@@ -443,20 +443,11 @@ static int ad9389b_log_status(struct v4l2_subdev *sd)
vic_detect, vic_sent);
}
}
- if (state->dv_timings.type == V4L2_DV_BT_656_1120) {
- struct v4l2_bt_timings *bt = bt = &state->dv_timings.bt;
- u32 frame_width = V4L2_DV_BT_FRAME_WIDTH(bt);
- u32 frame_height = V4L2_DV_BT_FRAME_HEIGHT(bt);
- u32 frame_size = frame_width * frame_height;
-
- v4l2_info(sd, "timings: %ux%u%s%u (%ux%u). Pix freq. = %u Hz. Polarities = 0x%x\n",
- bt->width, bt->height, bt->interlaced ? "i" : "p",
- frame_size > 0 ? (unsigned)bt->pixelclock / frame_size : 0,
- frame_width, frame_height,
- (unsigned)bt->pixelclock, bt->polarities);
- } else {
+ if (state->dv_timings.type == V4L2_DV_BT_656_1120)
+ v4l2_print_dv_timings(sd->name, "timings: ",
+ &state->dv_timings, false);
+ else
v4l2_info(sd, "no timings set\n");
- }
return 0;
}
diff --git a/drivers/media/i2c/adv7604.c b/drivers/media/i2c/adv7604.c
index e732c9bcf0e..ba8602c06d6 100644
--- a/drivers/media/i2c/adv7604.c
+++ b/drivers/media/i2c/adv7604.c
@@ -1051,53 +1051,6 @@ static int adv7604_g_input_status(struct v4l2_subdev *sd, u32 *status)
/* ----------------------------------------------------------------------- */
-static void adv7604_print_timings(struct v4l2_subdev *sd,
- struct v4l2_dv_timings *timings,
- const char *txt, bool detailed)
-{
- struct v4l2_bt_timings *bt = &timings->bt;
- u32 htot, vtot;
-
- if (timings->type != V4L2_DV_BT_656_1120)
- return;
-
- htot = htotal(bt);
- vtot = vtotal(bt);
-
- v4l2_info(sd, "%s %dx%d%s%d (%dx%d)",
- txt, bt->width, bt->height, bt->interlaced ? "i" : "p",
- (htot * vtot) > 0 ? ((u32)bt->pixelclock /
- (htot * vtot)) : 0,
- htot, vtot);
-
- if (!detailed)
- return;
-
- v4l2_info(sd, " horizontal: fp = %d, %ssync = %d, bp = %d\n",
- bt->hfrontporch,
- (bt->polarities & V4L2_DV_HSYNC_POS_POL) ? "+" : "-",
- bt->hsync, bt->hbackporch);
- v4l2_info(sd, " vertical: fp = %d, %ssync = %d, bp = %d\n",
- bt->vfrontporch,
- (bt->polarities & V4L2_DV_VSYNC_POS_POL) ? "+" : "-",
- bt->vsync, bt->vbackporch);
- v4l2_info(sd, " pixelclock: %lld\n", bt->pixelclock);
- v4l2_info(sd, " flags (0x%x):%s%s%s%s\n", bt->flags,
- (bt->flags & V4L2_DV_FL_REDUCED_BLANKING) ?
- " Reduced blanking," : "",
- (bt->flags & V4L2_DV_FL_CAN_REDUCE_FPS) ?
- " Can reduce FPS," : "",
- (bt->flags & V4L2_DV_FL_REDUCED_FPS) ?
- " Reduced FPS," : "",
- (bt->flags & V4L2_DV_FL_HALF_LINE) ?
- " Half line," : "");
- v4l2_info(sd, " standards (0x%x):%s%s%s%s\n", bt->standards,
- (bt->standards & V4L2_DV_BT_STD_CEA861) ? " CEA," : "",
- (bt->standards & V4L2_DV_BT_STD_DMT) ? " DMT," : "",
- (bt->standards & V4L2_DV_BT_STD_CVT) ? " CVT" : "",
- (bt->standards & V4L2_DV_BT_STD_GTF) ? " GTF" : "");
-}
-
struct stdi_readback {
u16 bl, lcf, lcvs;
u8 hs_pol, vs_pol;
@@ -1360,8 +1313,8 @@ found:
}
if (debug > 1)
- adv7604_print_timings(sd, timings,
- "adv7604_query_dv_timings:", true);
+ v4l2_print_dv_timings(sd->name, "adv7604_query_dv_timings: ",
+ timings, true);
return 0;
}
@@ -1403,8 +1356,8 @@ static int adv7604_s_dv_timings(struct v4l2_subdev *sd,
if (debug > 1)
- adv7604_print_timings(sd, timings,
- "adv7604_s_dv_timings:", true);
+ v4l2_print_dv_timings(sd->name, "adv7604_s_dv_timings: ",
+ timings, true);
return 0;
}
@@ -1770,8 +1723,10 @@ static int adv7604_log_status(struct v4l2_subdev *sd)
if (adv7604_query_dv_timings(sd, &timings))
v4l2_info(sd, "No video detected\n");
else
- adv7604_print_timings(sd, &timings, "Detected format:", true);
- adv7604_print_timings(sd, &state->timings, "Configured format:", true);
+ v4l2_print_dv_timings(sd->name, "Detected format: ",
+ &timings, true);
+ v4l2_print_dv_timings(sd->name, "Configured format: ",
+ &state->timings, true);
if (no_signal(sd))
return 0;
diff --git a/drivers/media/i2c/ths8200.c b/drivers/media/i2c/ths8200.c
index 7a60a8fda5d..49041e577e1 100644
--- a/drivers/media/i2c/ths8200.c
+++ b/drivers/media/i2c/ths8200.c
@@ -133,39 +133,6 @@ static int ths8200_s_register(struct v4l2_subdev *sd,
}
#endif
-static void ths8200_print_timings(struct v4l2_subdev *sd,
- struct v4l2_dv_timings *timings,
- const char *txt, bool detailed)
-{
- struct v4l2_bt_timings *bt = &timings->bt;
- u32 htot, vtot;
-
- if (timings->type != V4L2_DV_BT_656_1120)
- return;
-
- htot = htotal(bt);
- vtot = vtotal(bt);
-
- v4l2_info(sd, "%s %dx%d%s%d (%dx%d)",
- txt, bt->width, bt->height, bt->interlaced ? "i" : "p",
- (htot * vtot) > 0 ? ((u32)bt->pixelclock / (htot * vtot)) : 0,
- htot, vtot);
-
- if (detailed) {
- v4l2_info(sd, " horizontal: fp = %d, %ssync = %d, bp = %d\n",
- bt->hfrontporch,
- (bt->polarities & V4L2_DV_HSYNC_POS_POL) ? "+" : "-",
- bt->hsync, bt->hbackporch);
- v4l2_info(sd, " vertical: fp = %d, %ssync = %d, bp = %d\n",
- bt->vfrontporch,
- (bt->polarities & V4L2_DV_VSYNC_POS_POL) ? "+" : "-",
- bt->vsync, bt->vbackporch);
- v4l2_info(sd,
- " pixelclock: %lld, flags: 0x%x, standards: 0x%x\n",
- bt->pixelclock, bt->flags, bt->standards);
- }
-}
-
static int ths8200_log_status(struct v4l2_subdev *sd)
{
struct ths8200_state *state = to_state(sd);
@@ -182,9 +149,8 @@ static int ths8200_log_status(struct v4l2_subdev *sd)
ths8200_read(sd, THS8200_DTG2_PIXEL_CNT_LSB),
(ths8200_read(sd, THS8200_DTG2_LINE_CNT_MSB) & 0x07) * 256 +
ths8200_read(sd, THS8200_DTG2_LINE_CNT_LSB));
- ths8200_print_timings(sd, &state->dv_timings,
- "Configured format:", true);
-
+ v4l2_print_dv_timings(sd->name, "Configured format:",
+ &state->dv_timings, true);
return 0;
}
--
cgit v1.2.3-70-g09d2
From ef1ed8f5d366a035e532456bd747d34e5cb01ee5 Mon Sep 17 00:00:00 2001
From: Hans Verkuil <hans.verkuil@cisco.com>
Date: Thu, 15 Aug 2013 08:28:47 -0300
Subject: [media] v4l2-dv-timings: rename v4l_match_dv_timings to
v4l2_match_dv_timings
It's the only function in v4l2-dv-timings.c with the v4l prefix instead
of v4l2. Make it consistent with the other functions.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/adv7604.c | 4 ++--
drivers/media/platform/s5p-tv/hdmi_drv.c | 2 +-
drivers/media/usb/hdpvr/hdpvr-video.c | 2 +-
drivers/media/v4l2-core/v4l2-dv-timings.c | 12 ++++++------
include/media/v4l2-dv-timings.h | 8 ++++----
5 files changed, 14 insertions(+), 14 deletions(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/adv7604.c b/drivers/media/i2c/adv7604.c
index ba8602c06d6..a1a9d1e805f 100644
--- a/drivers/media/i2c/adv7604.c
+++ b/drivers/media/i2c/adv7604.c
@@ -763,7 +763,7 @@ static int find_and_set_predefined_video_timings(struct v4l2_subdev *sd,
int i;
for (i = 0; predef_vid_timings[i].timings.bt.width; i++) {
- if (!v4l_match_dv_timings(timings, &predef_vid_timings[i].timings,
+ if (!v4l2_match_dv_timings(timings, &predef_vid_timings[i].timings,
DIGITAL_INPUT ? 250000 : 1000000))
continue;
io_write(sd, 0x00, predef_vid_timings[i].vid_std); /* video std */
@@ -1183,7 +1183,7 @@ static void adv7604_fill_optional_dv_timings_fields(struct v4l2_subdev *sd,
int i;
for (i = 0; adv7604_timings[i].bt.width; i++) {
- if (v4l_match_dv_timings(timings, &adv7604_timings[i],
+ if (v4l2_match_dv_timings(timings, &adv7604_timings[i],
DIGITAL_INPUT ? 250000 : 1000000)) {
*timings = adv7604_timings[i];
break;
diff --git a/drivers/media/platform/s5p-tv/hdmi_drv.c b/drivers/media/platform/s5p-tv/hdmi_drv.c
index 1b34c362985..4ad9374913d 100644
--- a/drivers/media/platform/s5p-tv/hdmi_drv.c
+++ b/drivers/media/platform/s5p-tv/hdmi_drv.c
@@ -625,7 +625,7 @@ static int hdmi_s_dv_timings(struct v4l2_subdev *sd,
int i;
for (i = 0; i < ARRAY_SIZE(hdmi_timings); i++)
- if (v4l_match_dv_timings(&hdmi_timings[i].dv_timings,
+ if (v4l2_match_dv_timings(&hdmi_timings[i].dv_timings,
timings, 0))
break;
if (i == ARRAY_SIZE(hdmi_timings)) {
diff --git a/drivers/media/usb/hdpvr/hdpvr-video.c b/drivers/media/usb/hdpvr/hdpvr-video.c
index e68245a7f3a..0500c4175d5 100644
--- a/drivers/media/usb/hdpvr/hdpvr-video.c
+++ b/drivers/media/usb/hdpvr/hdpvr-video.c
@@ -642,7 +642,7 @@ static int vidioc_s_dv_timings(struct file *file, void *_fh,
if (dev->status != STATUS_IDLE)
return -EBUSY;
for (i = 0; i < ARRAY_SIZE(hdpvr_dv_timings); i++)
- if (v4l_match_dv_timings(timings, hdpvr_dv_timings + i, 0))
+ if (v4l2_match_dv_timings(timings, hdpvr_dv_timings + i, 0))
break;
if (i == ARRAY_SIZE(hdpvr_dv_timings))
return -EINVAL;
diff --git a/drivers/media/v4l2-core/v4l2-dv-timings.c b/drivers/media/v4l2-core/v4l2-dv-timings.c
index 917e58ce1f1..1a9d393307a 100644
--- a/drivers/media/v4l2-core/v4l2-dv-timings.c
+++ b/drivers/media/v4l2-core/v4l2-dv-timings.c
@@ -181,7 +181,7 @@ bool v4l2_find_dv_timings_cap(struct v4l2_dv_timings *t,
for (i = 0; i < ARRAY_SIZE(timings); i++) {
if (v4l2_dv_valid_timings(timings + i, cap) &&
- v4l_match_dv_timings(t, timings + i, pclock_delta)) {
+ v4l2_match_dv_timings(t, timings + i, pclock_delta)) {
*t = timings[i];
return true;
}
@@ -191,16 +191,16 @@ bool v4l2_find_dv_timings_cap(struct v4l2_dv_timings *t,
EXPORT_SYMBOL_GPL(v4l2_find_dv_timings_cap);
/**
- * v4l_match_dv_timings - check if two timings match
+ * v4l2_match_dv_timings - check if two timings match
* @t1 - compare this v4l2_dv_timings struct...
* @t2 - with this struct.
* @pclock_delta - the allowed pixelclock deviation.
*
* Compare t1 with t2 with a given margin of error for the pixelclock.
*/
-bool v4l_match_dv_timings(const struct v4l2_dv_timings *t1,
- const struct v4l2_dv_timings *t2,
- unsigned pclock_delta)
+bool v4l2_match_dv_timings(const struct v4l2_dv_timings *t1,
+ const struct v4l2_dv_timings *t2,
+ unsigned pclock_delta)
{
if (t1->type != t2->type || t1->type != V4L2_DV_BT_656_1120)
return false;
@@ -221,7 +221,7 @@ bool v4l_match_dv_timings(const struct v4l2_dv_timings *t1,
return true;
return false;
}
-EXPORT_SYMBOL_GPL(v4l_match_dv_timings);
+EXPORT_SYMBOL_GPL(v4l2_match_dv_timings);
void v4l2_print_dv_timings(const char *dev_prefix, const char *prefix,
const struct v4l2_dv_timings *t, bool detailed)
diff --git a/include/media/v4l2-dv-timings.h b/include/media/v4l2-dv-timings.h
index 696e5c2fd17..43f6b67af1c 100644
--- a/include/media/v4l2-dv-timings.h
+++ b/include/media/v4l2-dv-timings.h
@@ -64,7 +64,7 @@ bool v4l2_find_dv_timings_cap(struct v4l2_dv_timings *t,
const struct v4l2_dv_timings_cap *cap,
unsigned pclock_delta);
-/** v4l_match_dv_timings() - do two timings match?
+/** v4l2_match_dv_timings() - do two timings match?
* @measured: the measured timings data.
* @standard: the timings according to the standard.
* @pclock_delta: maximum delta in Hz between standard->pixelclock and
@@ -72,9 +72,9 @@ bool v4l2_find_dv_timings_cap(struct v4l2_dv_timings *t,
*
* Returns true if the two timings match, returns false otherwise.
*/
-bool v4l_match_dv_timings(const struct v4l2_dv_timings *measured,
- const struct v4l2_dv_timings *standard,
- unsigned pclock_delta);
+bool v4l2_match_dv_timings(const struct v4l2_dv_timings *measured,
+ const struct v4l2_dv_timings *standard,
+ unsigned pclock_delta);
/** v4l2_print_dv_timings() - log the contents of a dv_timings struct
* @dev_prefix:device prefix for each log line.
--
cgit v1.2.3-70-g09d2
From fe9c2564d80d633d08a2d69fe38598c06a0ddfb2 Mon Sep 17 00:00:00 2001
From: Hans Verkuil <hans.verkuil@cisco.com>
Date: Mon, 19 Aug 2013 08:07:26 -0300
Subject: [media] adv7604/ad9389b/ths8200: decrease min_pixelclock to 25MHz
The CEA-861 standard allows for the 640x480 format at 25.175 MHz.
Ensure that that's allowed according to the struct v4l2_bt_timings_cap.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/ad9389b.c | 2 +-
drivers/media/i2c/adv7604.c | 2 +-
drivers/media/i2c/ths8200.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/ad9389b.c b/drivers/media/i2c/ad9389b.c
index 1c6d352acfa..bb74fb6b35c 100644
--- a/drivers/media/i2c/ad9389b.c
+++ b/drivers/media/i2c/ad9389b.c
@@ -631,7 +631,7 @@ static const struct v4l2_dv_timings_cap ad9389b_timings_cap = {
.bt = {
.max_width = 1920,
.max_height = 1200,
- .min_pixelclock = 27000000,
+ .min_pixelclock = 25000000,
.max_pixelclock = 170000000,
.standards = V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
diff --git a/drivers/media/i2c/adv7604.c b/drivers/media/i2c/adv7604.c
index a1a9d1e805f..5b54ba1465e 100644
--- a/drivers/media/i2c/adv7604.c
+++ b/drivers/media/i2c/adv7604.c
@@ -1162,7 +1162,7 @@ static int adv7604_dv_timings_cap(struct v4l2_subdev *sd,
cap->type = V4L2_DV_BT_656_1120;
cap->bt.max_width = 1920;
cap->bt.max_height = 1200;
- cap->bt.min_pixelclock = 27000000;
+ cap->bt.min_pixelclock = 25000000;
if (DIGITAL_INPUT)
cap->bt.max_pixelclock = 225000000;
else
diff --git a/drivers/media/i2c/ths8200.c b/drivers/media/i2c/ths8200.c
index 49041e577e1..580bd1b179f 100644
--- a/drivers/media/i2c/ths8200.c
+++ b/drivers/media/i2c/ths8200.c
@@ -49,7 +49,7 @@ static const struct v4l2_dv_timings_cap ths8200_timings_cap = {
.bt = {
.max_width = 1920,
.max_height = 1080,
- .min_pixelclock = 27000000,
+ .min_pixelclock = 25000000,
.max_pixelclock = 148500000,
.standards = V4L2_DV_BT_STD_CEA861,
.capabilities = V4L2_DV_BT_CAP_PROGRESSIVE,
--
cgit v1.2.3-70-g09d2
From 70b654945bacd27622ef1c424f054ae04de597e0 Mon Sep 17 00:00:00 2001
From: Hans Verkuil <hans.verkuil@cisco.com>
Date: Mon, 19 Aug 2013 10:23:33 -0300
Subject: [media] v4l2-dv-timings: rename v4l2_dv_valid_timings to
v4l2_valid_dv_timings
All other functions follow the v4l2_<foo>_dv_timings pattern, do the same for
this function.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/ad9389b.c | 2 +-
drivers/media/i2c/ths8200.c | 2 +-
drivers/media/v4l2-core/v4l2-dv-timings.c | 10 +++++-----
include/media/v4l2-dv-timings.h | 4 ++--
4 files changed, 9 insertions(+), 9 deletions(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/ad9389b.c b/drivers/media/i2c/ad9389b.c
index bb74fb6b35c..fc608516fc4 100644
--- a/drivers/media/i2c/ad9389b.c
+++ b/drivers/media/i2c/ad9389b.c
@@ -648,7 +648,7 @@ static int ad9389b_s_dv_timings(struct v4l2_subdev *sd,
v4l2_dbg(1, debug, sd, "%s:\n", __func__);
/* quick sanity check */
- if (!v4l2_dv_valid_timings(timings, &ad9389b_timings_cap))
+ if (!v4l2_valid_dv_timings(timings, &ad9389b_timings_cap))
return -EINVAL;
/* Fill the optional fields .standards and .flags in struct v4l2_dv_timings
diff --git a/drivers/media/i2c/ths8200.c b/drivers/media/i2c/ths8200.c
index 580bd1b179f..6abf0fb3607 100644
--- a/drivers/media/i2c/ths8200.c
+++ b/drivers/media/i2c/ths8200.c
@@ -378,7 +378,7 @@ static int ths8200_s_dv_timings(struct v4l2_subdev *sd,
v4l2_dbg(1, debug, sd, "%s:\n", __func__);
- if (!v4l2_dv_valid_timings(timings, &ths8200_timings_cap))
+ if (!v4l2_valid_dv_timings(timings, &ths8200_timings_cap))
return -EINVAL;
if (!v4l2_find_dv_timings_cap(timings, &ths8200_timings_cap, 10)) {
diff --git a/drivers/media/v4l2-core/v4l2-dv-timings.c b/drivers/media/v4l2-core/v4l2-dv-timings.c
index f515997a734..a77f2014588 100644
--- a/drivers/media/v4l2-core/v4l2-dv-timings.c
+++ b/drivers/media/v4l2-core/v4l2-dv-timings.c
@@ -131,7 +131,7 @@ const struct v4l2_dv_timings v4l2_dv_timings_presets[] = {
};
EXPORT_SYMBOL_GPL(v4l2_dv_timings_presets);
-bool v4l2_dv_valid_timings(const struct v4l2_dv_timings *t,
+bool v4l2_valid_dv_timings(const struct v4l2_dv_timings *t,
const struct v4l2_dv_timings_cap *dvcap)
{
const struct v4l2_bt_timings *bt = &t->bt;
@@ -153,7 +153,7 @@ bool v4l2_dv_valid_timings(const struct v4l2_dv_timings *t,
return false;
return true;
}
-EXPORT_SYMBOL_GPL(v4l2_dv_valid_timings);
+EXPORT_SYMBOL_GPL(v4l2_valid_dv_timings);
int v4l2_enum_dv_timings_cap(struct v4l2_enum_dv_timings *t,
const struct v4l2_dv_timings_cap *cap)
@@ -162,7 +162,7 @@ int v4l2_enum_dv_timings_cap(struct v4l2_enum_dv_timings *t,
memset(t->reserved, 0, sizeof(t->reserved));
for (i = idx = 0; v4l2_dv_timings_presets[i].bt.width; i++) {
- if (v4l2_dv_valid_timings(v4l2_dv_timings_presets + i, cap) &&
+ if (v4l2_valid_dv_timings(v4l2_dv_timings_presets + i, cap) &&
idx++ == t->index) {
t->timings = v4l2_dv_timings_presets[i];
return 0;
@@ -178,11 +178,11 @@ bool v4l2_find_dv_timings_cap(struct v4l2_dv_timings *t,
{
int i;
- if (!v4l2_dv_valid_timings(t, cap))
+ if (!v4l2_valid_dv_timings(t, cap))
return false;
for (i = 0; i < v4l2_dv_timings_presets[i].bt.width; i++) {
- if (v4l2_dv_valid_timings(v4l2_dv_timings_presets + i, cap) &&
+ if (v4l2_valid_dv_timings(v4l2_dv_timings_presets + i, cap) &&
v4l2_match_dv_timings(t, v4l2_dv_timings_presets + i, pclock_delta)) {
*t = v4l2_dv_timings_presets[i];
return true;
diff --git a/include/media/v4l2-dv-timings.h b/include/media/v4l2-dv-timings.h
index 0fe310b8bc8..bd59df8125c 100644
--- a/include/media/v4l2-dv-timings.h
+++ b/include/media/v4l2-dv-timings.h
@@ -27,14 +27,14 @@
*/
extern const struct v4l2_dv_timings v4l2_dv_timings_presets[];
-/** v4l2_dv_valid_timings() - are these timings valid?
+/** v4l2_valid_dv_timings() - are these timings valid?
* @t: the v4l2_dv_timings struct.
* @cap: the v4l2_dv_timings_cap capabilities.
*
* Returns true if the given dv_timings struct is supported by the
* hardware capabilities, returns false otherwise.
*/
-bool v4l2_dv_valid_timings(const struct v4l2_dv_timings *t,
+bool v4l2_valid_dv_timings(const struct v4l2_dv_timings *t,
const struct v4l2_dv_timings_cap *cap);
/** v4l2_enum_dv_timings_cap() - Helper function to enumerate possible DV timings based on capabilities
--
cgit v1.2.3-70-g09d2
From b8f0fff4279a1b85fa4b6d7d8b538c254edcb4a1 Mon Sep 17 00:00:00 2001
From: Hans Verkuil <hans.verkuil@cisco.com>
Date: Mon, 19 Aug 2013 11:21:50 -0300
Subject: [media] v4l2-dv-timings: add callback to handle exceptions
In most cases the v4l2_bt_timings_cap struct has all the information
necessary to determine valid timings, but occasionally there are exceptions.
Add a callback function to be able to test for those exceptions.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/ad9389b.c | 7 ++++---
drivers/media/i2c/ths8200.c | 9 +++++---
drivers/media/v4l2-core/v4l2-dv-timings.c | 25 +++++++++++++++--------
include/media/v4l2-dv-timings.h | 34 +++++++++++++++++++++++++------
4 files changed, 55 insertions(+), 20 deletions(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/ad9389b.c b/drivers/media/i2c/ad9389b.c
index fc608516fc4..83697860297 100644
--- a/drivers/media/i2c/ad9389b.c
+++ b/drivers/media/i2c/ad9389b.c
@@ -648,12 +648,12 @@ static int ad9389b_s_dv_timings(struct v4l2_subdev *sd,
v4l2_dbg(1, debug, sd, "%s:\n", __func__);
/* quick sanity check */
- if (!v4l2_valid_dv_timings(timings, &ad9389b_timings_cap))
+ if (!v4l2_valid_dv_timings(timings, &ad9389b_timings_cap, NULL, NULL))
return -EINVAL;
/* Fill the optional fields .standards and .flags in struct v4l2_dv_timings
if the format is one of the CEA or DMT timings. */
- v4l2_find_dv_timings_cap(timings, &ad9389b_timings_cap, 0);
+ v4l2_find_dv_timings_cap(timings, &ad9389b_timings_cap, 0, NULL, NULL);
timings->bt.flags &= ~V4L2_DV_FL_REDUCED_FPS;
@@ -691,7 +691,8 @@ static int ad9389b_g_dv_timings(struct v4l2_subdev *sd,
static int ad9389b_enum_dv_timings(struct v4l2_subdev *sd,
struct v4l2_enum_dv_timings *timings)
{
- return v4l2_enum_dv_timings_cap(timings, &ad9389b_timings_cap);
+ return v4l2_enum_dv_timings_cap(timings, &ad9389b_timings_cap,
+ NULL, NULL);
}
static int ad9389b_dv_timings_cap(struct v4l2_subdev *sd,
diff --git a/drivers/media/i2c/ths8200.c b/drivers/media/i2c/ths8200.c
index 6abf0fb3607..a58a8f663ff 100644
--- a/drivers/media/i2c/ths8200.c
+++ b/drivers/media/i2c/ths8200.c
@@ -378,10 +378,12 @@ static int ths8200_s_dv_timings(struct v4l2_subdev *sd,
v4l2_dbg(1, debug, sd, "%s:\n", __func__);
- if (!v4l2_valid_dv_timings(timings, &ths8200_timings_cap))
+ if (!v4l2_valid_dv_timings(timings, &ths8200_timings_cap,
+ NULL, NULL))
return -EINVAL;
- if (!v4l2_find_dv_timings_cap(timings, &ths8200_timings_cap, 10)) {
+ if (!v4l2_find_dv_timings_cap(timings, &ths8200_timings_cap, 10,
+ NULL, NULL)) {
v4l2_dbg(1, debug, sd, "Unsupported format\n");
return -EINVAL;
}
@@ -411,7 +413,8 @@ static int ths8200_g_dv_timings(struct v4l2_subdev *sd,
static int ths8200_enum_dv_timings(struct v4l2_subdev *sd,
struct v4l2_enum_dv_timings *timings)
{
- return v4l2_enum_dv_timings_cap(timings, &ths8200_timings_cap);
+ return v4l2_enum_dv_timings_cap(timings, &ths8200_timings_cap,
+ NULL, NULL);
}
static int ths8200_dv_timings_cap(struct v4l2_subdev *sd,
diff --git a/drivers/media/v4l2-core/v4l2-dv-timings.c b/drivers/media/v4l2-core/v4l2-dv-timings.c
index a77f2014588..ee52b9f4a94 100644
--- a/drivers/media/v4l2-core/v4l2-dv-timings.c
+++ b/drivers/media/v4l2-core/v4l2-dv-timings.c
@@ -132,7 +132,9 @@ const struct v4l2_dv_timings v4l2_dv_timings_presets[] = {
EXPORT_SYMBOL_GPL(v4l2_dv_timings_presets);
bool v4l2_valid_dv_timings(const struct v4l2_dv_timings *t,
- const struct v4l2_dv_timings_cap *dvcap)
+ const struct v4l2_dv_timings_cap *dvcap,
+ v4l2_check_dv_timings_fnc fnc,
+ void *fnc_handle)
{
const struct v4l2_bt_timings *bt = &t->bt;
const struct v4l2_bt_timings_cap *cap = &dvcap->bt;
@@ -151,18 +153,21 @@ bool v4l2_valid_dv_timings(const struct v4l2_dv_timings *t,
(bt->interlaced && !(caps & V4L2_DV_BT_CAP_INTERLACED)) ||
(!bt->interlaced && !(caps & V4L2_DV_BT_CAP_PROGRESSIVE)))
return false;
- return true;
+ return fnc == NULL || fnc(t, fnc_handle);
}
EXPORT_SYMBOL_GPL(v4l2_valid_dv_timings);
int v4l2_enum_dv_timings_cap(struct v4l2_enum_dv_timings *t,
- const struct v4l2_dv_timings_cap *cap)
+ const struct v4l2_dv_timings_cap *cap,
+ v4l2_check_dv_timings_fnc fnc,
+ void *fnc_handle)
{
u32 i, idx;
memset(t->reserved, 0, sizeof(t->reserved));
for (i = idx = 0; v4l2_dv_timings_presets[i].bt.width; i++) {
- if (v4l2_valid_dv_timings(v4l2_dv_timings_presets + i, cap) &&
+ if (v4l2_valid_dv_timings(v4l2_dv_timings_presets + i, cap,
+ fnc, fnc_handle) &&
idx++ == t->index) {
t->timings = v4l2_dv_timings_presets[i];
return 0;
@@ -174,16 +179,20 @@ EXPORT_SYMBOL_GPL(v4l2_enum_dv_timings_cap);
bool v4l2_find_dv_timings_cap(struct v4l2_dv_timings *t,
const struct v4l2_dv_timings_cap *cap,
- unsigned pclock_delta)
+ unsigned pclock_delta,
+ v4l2_check_dv_timings_fnc fnc,
+ void *fnc_handle)
{
int i;
- if (!v4l2_valid_dv_timings(t, cap))
+ if (!v4l2_valid_dv_timings(t, cap, fnc, fnc_handle))
return false;
for (i = 0; i < v4l2_dv_timings_presets[i].bt.width; i++) {
- if (v4l2_valid_dv_timings(v4l2_dv_timings_presets + i, cap) &&
- v4l2_match_dv_timings(t, v4l2_dv_timings_presets + i, pclock_delta)) {
+ if (v4l2_valid_dv_timings(v4l2_dv_timings_presets + i, cap,
+ fnc, fnc_handle) &&
+ v4l2_match_dv_timings(t, v4l2_dv_timings_presets + i,
+ pclock_delta)) {
*t = v4l2_dv_timings_presets[i];
return true;
}
diff --git a/include/media/v4l2-dv-timings.h b/include/media/v4l2-dv-timings.h
index bd59df8125c..4becc671639 100644
--- a/include/media/v4l2-dv-timings.h
+++ b/include/media/v4l2-dv-timings.h
@@ -27,46 +27,68 @@
*/
extern const struct v4l2_dv_timings v4l2_dv_timings_presets[];
+/** v4l2_check_dv_timings_fnc - timings check callback
+ * @t: the v4l2_dv_timings struct.
+ * @handle: a handle from the driver.
+ *
+ * Returns true if the given timings are valid.
+ */
+typedef bool v4l2_check_dv_timings_fnc(const struct v4l2_dv_timings *t, void *handle);
+
/** v4l2_valid_dv_timings() - are these timings valid?
* @t: the v4l2_dv_timings struct.
* @cap: the v4l2_dv_timings_cap capabilities.
+ * @fnc: callback to check if this timing is OK. May be NULL.
+ * @fnc_handle: a handle that is passed on to @fnc.
*
* Returns true if the given dv_timings struct is supported by the
- * hardware capabilities, returns false otherwise.
+ * hardware capabilities and the callback function (if non-NULL), returns
+ * false otherwise.
*/
bool v4l2_valid_dv_timings(const struct v4l2_dv_timings *t,
- const struct v4l2_dv_timings_cap *cap);
+ const struct v4l2_dv_timings_cap *cap,
+ v4l2_check_dv_timings_fnc fnc,
+ void *fnc_handle);
/** v4l2_enum_dv_timings_cap() - Helper function to enumerate possible DV timings based on capabilities
* @t: the v4l2_enum_dv_timings struct.
* @cap: the v4l2_dv_timings_cap capabilities.
+ * @fnc: callback to check if this timing is OK. May be NULL.
+ * @fnc_handle: a handle that is passed on to @fnc.
*
* This enumerates dv_timings using the full list of possible CEA-861 and DMT
* timings, filtering out any timings that are not supported based on the
- * hardware capabilities.
+ * hardware capabilities and the callback function (if non-NULL).
*
* If a valid timing for the given index is found, it will fill in @t and
* return 0, otherwise it returns -EINVAL.
*/
int v4l2_enum_dv_timings_cap(struct v4l2_enum_dv_timings *t,
- const struct v4l2_dv_timings_cap *cap);
+ const struct v4l2_dv_timings_cap *cap,
+ v4l2_check_dv_timings_fnc fnc,
+ void *fnc_handle);
/** v4l2_find_dv_timings_cap() - Find the closest timings struct
* @t: the v4l2_enum_dv_timings struct.
* @cap: the v4l2_dv_timings_cap capabilities.
* @pclock_delta: maximum delta between t->pixelclock and the timing struct
* under consideration.
+ * @fnc: callback to check if a given timings struct is OK. May be NULL.
+ * @fnc_handle: a handle that is passed on to @fnc.
*
* This function tries to map the given timings to an entry in the
* full list of possible CEA-861 and DMT timings, filtering out any timings
- * that are not supported based on the hardware capabilities.
+ * that are not supported based on the hardware capabilities and the callback
+ * function (if non-NULL).
*
* On success it will fill in @t with the found timings and it returns true.
* On failure it will return false.
*/
bool v4l2_find_dv_timings_cap(struct v4l2_dv_timings *t,
const struct v4l2_dv_timings_cap *cap,
- unsigned pclock_delta);
+ unsigned pclock_delta,
+ v4l2_check_dv_timings_fnc fnc,
+ void *fnc_handle);
/** v4l2_match_dv_timings() - do two timings match?
* @measured: the measured timings data.
--
cgit v1.2.3-70-g09d2
From 8c0eadb88bc67cee8b83e08f5743bd7c378efdd9 Mon Sep 17 00:00:00 2001
From: Hans Verkuil <hans.verkuil@cisco.com>
Date: Thu, 22 Aug 2013 06:11:17 -0300
Subject: [media] adv7604: set is_private only after successfully creating all
controls
is_private was set right after creating each control, but the control pointer
might be NULL in case of an error. Set it after all controls were successfully
created, since that guarantees that all control pointers are non-NULL.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/adv7604.c | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/adv7604.c b/drivers/media/i2c/adv7604.c
index 5b54ba1465e..fbfdd2fc2a3 100644
--- a/drivers/media/i2c/adv7604.c
+++ b/drivers/media/i2c/adv7604.c
@@ -2021,29 +2021,30 @@ static int adv7604_probe(struct i2c_client *client,
/* private controls */
state->detect_tx_5v_ctrl = v4l2_ctrl_new_std(hdl, NULL,
V4L2_CID_DV_RX_POWER_PRESENT, 0, 1, 0, 0);
- state->detect_tx_5v_ctrl->is_private = true;
state->rgb_quantization_range_ctrl =
v4l2_ctrl_new_std_menu(hdl, &adv7604_ctrl_ops,
V4L2_CID_DV_RX_RGB_RANGE, V4L2_DV_RGB_RANGE_FULL,
0, V4L2_DV_RGB_RANGE_AUTO);
- state->rgb_quantization_range_ctrl->is_private = true;
/* custom controls */
state->analog_sampling_phase_ctrl =
v4l2_ctrl_new_custom(hdl, &adv7604_ctrl_analog_sampling_phase, NULL);
- state->analog_sampling_phase_ctrl->is_private = true;
state->free_run_color_manual_ctrl =
v4l2_ctrl_new_custom(hdl, &adv7604_ctrl_free_run_color_manual, NULL);
- state->free_run_color_manual_ctrl->is_private = true;
state->free_run_color_ctrl =
v4l2_ctrl_new_custom(hdl, &adv7604_ctrl_free_run_color, NULL);
- state->free_run_color_ctrl->is_private = true;
sd->ctrl_handler = hdl;
if (hdl->error) {
err = hdl->error;
goto err_hdl;
}
+ state->detect_tx_5v_ctrl->is_private = true;
+ state->rgb_quantization_range_ctrl->is_private = true;
+ state->analog_sampling_phase_ctrl->is_private = true;
+ state->free_run_color_manual_ctrl->is_private = true;
+ state->free_run_color_ctrl->is_private = true;
+
if (adv7604_s_detect_tx_5v_ctrl(sd)) {
err = -ENODEV;
goto err_hdl;
--
cgit v1.2.3-70-g09d2
From 265d3b55ffdb5e9cf74fd85e2a841b04a82f3355 Mon Sep 17 00:00:00 2001
From: Hans Verkuil <hans.verkuil@cisco.com>
Date: Thu, 22 Aug 2013 06:15:31 -0300
Subject: [media] ad9389b: set is_private only after successfully creating all
controls
is_private was set right after creating each control, but the control pointer
might be NULL in case of an error. Set it after all controls were successfully
created, since that guarantees that all control pointers are non-NULL.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/ad9389b.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/ad9389b.c b/drivers/media/i2c/ad9389b.c
index 83697860297..bb0c99d7a4f 100644
--- a/drivers/media/i2c/ad9389b.c
+++ b/drivers/media/i2c/ad9389b.c
@@ -1109,27 +1109,27 @@ static int ad9389b_probe(struct i2c_client *client, const struct i2c_device_id *
state->hdmi_mode_ctrl = v4l2_ctrl_new_std_menu(hdl, &ad9389b_ctrl_ops,
V4L2_CID_DV_TX_MODE, V4L2_DV_TX_MODE_HDMI,
0, V4L2_DV_TX_MODE_DVI_D);
- state->hdmi_mode_ctrl->is_private = true;
state->hotplug_ctrl = v4l2_ctrl_new_std(hdl, NULL,
V4L2_CID_DV_TX_HOTPLUG, 0, 1, 0, 0);
- state->hotplug_ctrl->is_private = true;
state->rx_sense_ctrl = v4l2_ctrl_new_std(hdl, NULL,
V4L2_CID_DV_TX_RXSENSE, 0, 1, 0, 0);
- state->rx_sense_ctrl->is_private = true;
state->have_edid0_ctrl = v4l2_ctrl_new_std(hdl, NULL,
V4L2_CID_DV_TX_EDID_PRESENT, 0, 1, 0, 0);
- state->have_edid0_ctrl->is_private = true;
state->rgb_quantization_range_ctrl =
v4l2_ctrl_new_std_menu(hdl, &ad9389b_ctrl_ops,
V4L2_CID_DV_TX_RGB_RANGE, V4L2_DV_RGB_RANGE_FULL,
0, V4L2_DV_RGB_RANGE_AUTO);
- state->rgb_quantization_range_ctrl->is_private = true;
sd->ctrl_handler = hdl;
if (hdl->error) {
err = hdl->error;
goto err_hdl;
}
+ state->hdmi_mode_ctrl->is_private = true;
+ state->hotplug_ctrl->is_private = true;
+ state->rx_sense_ctrl->is_private = true;
+ state->have_edid0_ctrl->is_private = true;
+ state->rgb_quantization_range_ctrl->is_private = true;
state->pad.flags = MEDIA_PAD_FL_SINK;
err = media_entity_init(&sd->entity, 1, &state->pad, 0);
--
cgit v1.2.3-70-g09d2
From 174e60adf4bfb849672b3b2afdd3cfd6e65d1d3d Mon Sep 17 00:00:00 2001
From: Dan Carpenter <dan.carpenter@oracle.com>
Date: Fri, 23 Aug 2013 05:33:06 -0300
Subject: [media] s5k6aa: off by one in s5k6aa_enum_frame_interval()
The check is off by one so we could read one space past the end of the
array.
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/s5k6aa.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/s5k6aa.c b/drivers/media/i2c/s5k6aa.c
index 789c02a6ca1..629a5cdadd3 100644
--- a/drivers/media/i2c/s5k6aa.c
+++ b/drivers/media/i2c/s5k6aa.c
@@ -1003,7 +1003,7 @@ static int s5k6aa_enum_frame_interval(struct v4l2_subdev *sd,
const struct s5k6aa_interval *fi;
int ret = 0;
- if (fie->index > ARRAY_SIZE(s5k6aa_intervals))
+ if (fie->index >= ARRAY_SIZE(s5k6aa_intervals))
return -EINVAL;
v4l_bound_align_image(&fie->width, S5K6AA_WIN_WIDTH_MIN,
--
cgit v1.2.3-70-g09d2
From 6a4760ed50e4908cfd597be0d840a0cb990aff7a Mon Sep 17 00:00:00 2001
From: Dan Carpenter <dan.carpenter@oracle.com>
Date: Fri, 23 Aug 2013 05:33:48 -0300
Subject: [media] ov9650: off by one in ov965x_enum_frame_sizes()
The ">" should be ">=" otherwise we read one space beyond the end of the
array.
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/ov9650.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/ov9650.c b/drivers/media/i2c/ov9650.c
index 1dbb8118a28..4da90c621f7 100644
--- a/drivers/media/i2c/ov9650.c
+++ b/drivers/media/i2c/ov9650.c
@@ -1083,7 +1083,7 @@ static int ov965x_enum_frame_sizes(struct v4l2_subdev *sd,
{
int i = ARRAY_SIZE(ov965x_formats);
- if (fse->index > ARRAY_SIZE(ov965x_framesizes))
+ if (fse->index >= ARRAY_SIZE(ov965x_framesizes))
return -EINVAL;
while (--i)
--
cgit v1.2.3-70-g09d2
From a89bcd4c6c2023615a89001b5a11b0bb77eb9491 Mon Sep 17 00:00:00 2001
From: Hans Verkuil <hans.verkuil@cisco.com>
Date: Thu, 22 Aug 2013 06:14:22 -0300
Subject: [media] adv7842: add new video decoder driver
This is a Analog Devices Component/Graphics/SD Digitizer with 2:1
Multiplexed HDMI Receiver.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/Kconfig | 12 +
drivers/media/i2c/Makefile | 1 +
drivers/media/i2c/adv7842.c | 2946 +++++++++++++++++++++++++++++++++++++++++++
include/media/adv7842.h | 226 ++++
4 files changed, 3185 insertions(+)
create mode 100644 drivers/media/i2c/adv7842.c
create mode 100644 include/media/adv7842.h
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig
index b2cd8ca51af..847b7113f70 100644
--- a/drivers/media/i2c/Kconfig
+++ b/drivers/media/i2c/Kconfig
@@ -206,6 +206,18 @@ config VIDEO_ADV7604
To compile this driver as a module, choose M here: the
module will be called adv7604.
+config VIDEO_ADV7842
+ tristate "Analog Devices ADV7842 decoder"
+ depends on VIDEO_V4L2 && I2C && VIDEO_V4L2_SUBDEV_API
+ ---help---
+ Support for the Analog Devices ADV7842 video decoder.
+
+ This is a Analog Devices Component/Graphics/SD Digitizer
+ with 2:1 Multiplexed HDMI Receiver.
+
+ To compile this driver as a module, choose M here: the
+ module will be called adv7842.
+
config VIDEO_BT819
tristate "BT819A VideoStream decoder"
depends on VIDEO_V4L2 && I2C
diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile
index dc20653bb5a..b4cf972703d 100644
--- a/drivers/media/i2c/Makefile
+++ b/drivers/media/i2c/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_VIDEO_ADV7183) += adv7183.o
obj-$(CONFIG_VIDEO_ADV7343) += adv7343.o
obj-$(CONFIG_VIDEO_ADV7393) += adv7393.o
obj-$(CONFIG_VIDEO_ADV7604) += adv7604.o
+obj-$(CONFIG_VIDEO_ADV7842) += adv7842.o
obj-$(CONFIG_VIDEO_AD9389B) += ad9389b.o
obj-$(CONFIG_VIDEO_VPX3220) += vpx3220.o
obj-$(CONFIG_VIDEO_VS6624) += vs6624.o
diff --git a/drivers/media/i2c/adv7842.c b/drivers/media/i2c/adv7842.c
new file mode 100644
index 00000000000..d1748901337
--- /dev/null
+++ b/drivers/media/i2c/adv7842.c
@@ -0,0 +1,2946 @@
+/*
+ * adv7842 - Analog Devices ADV7842 video decoder driver
+ *
+ * Copyright 2013 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
+ *
+ * This program is free software; you may redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ */
+
+/*
+ * References (c = chapter, p = page):
+ * REF_01 - Analog devices, ADV7842, Register Settings Recommendations,
+ * Revision 2.5, June 2010
+ * REF_02 - Analog devices, Register map documentation, Documentation of
+ * the register maps, Software manual, Rev. F, June 2010
+ */
+
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/i2c.h>
+#include <linux/delay.h>
+#include <linux/videodev2.h>
+#include <linux/workqueue.h>
+#include <linux/v4l2-dv-timings.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-ctrls.h>
+#include <media/v4l2-dv-timings.h>
+#include <media/adv7842.h>
+
+static int debug;
+module_param(debug, int, 0644);
+MODULE_PARM_DESC(debug, "debug level (0-2)");
+
+MODULE_DESCRIPTION("Analog Devices ADV7842 video decoder driver");
+MODULE_AUTHOR("Hans Verkuil <hans.verkuil@cisco.com>");
+MODULE_AUTHOR("Martin Bugge <marbugge@cisco.com>");
+MODULE_LICENSE("GPL");
+
+/* ADV7842 system clock frequency */
+#define ADV7842_fsc (28636360)
+
+/*
+**********************************************************************
+*
+* Arrays with configuration parameters for the ADV7842
+*
+**********************************************************************
+*/
+
+struct adv7842_state {
+ struct v4l2_subdev sd;
+ struct media_pad pad;
+ struct v4l2_ctrl_handler hdl;
+ enum adv7842_mode mode;
+ struct v4l2_dv_timings timings;
+ enum adv7842_vid_std_select vid_std_select;
+ v4l2_std_id norm;
+ struct {
+ u8 edid[256];
+ u32 present;
+ } hdmi_edid;
+ struct {
+ u8 edid[256];
+ u32 present;
+ } vga_edid;
+ struct v4l2_fract aspect_ratio;
+ u32 rgb_quantization_range;
+ bool is_cea_format;
+ struct workqueue_struct *work_queues;
+ struct delayed_work delayed_work_enable_hotplug;
+ bool connector_hdmi;
+ bool hdmi_port_a;
+
+ /* i2c clients */
+ struct i2c_client *i2c_sdp_io;
+ struct i2c_client *i2c_sdp;
+ struct i2c_client *i2c_cp;
+ struct i2c_client *i2c_vdp;
+ struct i2c_client *i2c_afe;
+ struct i2c_client *i2c_hdmi;
+ struct i2c_client *i2c_repeater;
+ struct i2c_client *i2c_edid;
+ struct i2c_client *i2c_infoframe;
+ struct i2c_client *i2c_cec;
+ struct i2c_client *i2c_avlink;
+
+ /* controls */
+ struct v4l2_ctrl *detect_tx_5v_ctrl;
+ struct v4l2_ctrl *analog_sampling_phase_ctrl;
+ struct v4l2_ctrl *free_run_color_ctrl_manual;
+ struct v4l2_ctrl *free_run_color_ctrl;
+ struct v4l2_ctrl *rgb_quantization_range_ctrl;
+};
+
+/* Unsupported timings. This device cannot support 720p30. */
+static const struct v4l2_dv_timings adv7842_timings_exceptions[] = {
+ V4L2_DV_BT_CEA_1280X720P30,
+ { }
+};
+
+static bool adv7842_check_dv_timings(const struct v4l2_dv_timings *t, void *hdl)
+{
+ int i;
+
+ for (i = 0; adv7842_timings_exceptions[i].bt.width; i++)
+ if (v4l2_match_dv_timings(t, adv7842_timings_exceptions + i, 0))
+ return false;
+ return true;
+}
+
+struct adv7842_video_standards {
+ struct v4l2_dv_timings timings;
+ u8 vid_std;
+ u8 v_freq;
+};
+
+/* sorted by number of lines */
+static const struct adv7842_video_standards adv7842_prim_mode_comp[] = {
+ /* { V4L2_DV_BT_CEA_720X480P59_94, 0x0a, 0x00 }, TODO flickering */
+ { V4L2_DV_BT_CEA_720X576P50, 0x0b, 0x00 },
+ { V4L2_DV_BT_CEA_1280X720P50, 0x19, 0x01 },
+ { V4L2_DV_BT_CEA_1280X720P60, 0x19, 0x00 },
+ { V4L2_DV_BT_CEA_1920X1080P24, 0x1e, 0x04 },
+ { V4L2_DV_BT_CEA_1920X1080P25, 0x1e, 0x03 },
+ { V4L2_DV_BT_CEA_1920X1080P30, 0x1e, 0x02 },
+ { V4L2_DV_BT_CEA_1920X1080P50, 0x1e, 0x01 },
+ { V4L2_DV_BT_CEA_1920X1080P60, 0x1e, 0x00 },
+ /* TODO add 1920x1080P60_RB (CVT timing) */
+ { },
+};
+
+/* sorted by number of lines */
+static const struct adv7842_video_standards adv7842_prim_mode_gr[] = {
+ { V4L2_DV_BT_DMT_640X480P60, 0x08, 0x00 },
+ { V4L2_DV_BT_DMT_640X480P72, 0x09, 0x00 },
+ { V4L2_DV_BT_DMT_640X480P75, 0x0a, 0x00 },
+ { V4L2_DV_BT_DMT_640X480P85, 0x0b, 0x00 },
+ { V4L2_DV_BT_DMT_800X600P56, 0x00, 0x00 },
+ { V4L2_DV_BT_DMT_800X600P60, 0x01, 0x00 },
+ { V4L2_DV_BT_DMT_800X600P72, 0x02, 0x00 },
+ { V4L2_DV_BT_DMT_800X600P75, 0x03, 0x00 },
+ { V4L2_DV_BT_DMT_800X600P85, 0x04, 0x00 },
+ { V4L2_DV_BT_DMT_1024X768P60, 0x0c, 0x00 },
+ { V4L2_DV_BT_DMT_1024X768P70, 0x0d, 0x00 },
+ { V4L2_DV_BT_DMT_1024X768P75, 0x0e, 0x00 },
+ { V4L2_DV_BT_DMT_1024X768P85, 0x0f, 0x00 },
+ { V4L2_DV_BT_DMT_1280X1024P60, 0x05, 0x00 },
+ { V4L2_DV_BT_DMT_1280X1024P75, 0x06, 0x00 },
+ { V4L2_DV_BT_DMT_1360X768P60, 0x12, 0x00 },
+ { V4L2_DV_BT_DMT_1366X768P60, 0x13, 0x00 },
+ { V4L2_DV_BT_DMT_1400X1050P60, 0x14, 0x00 },
+ { V4L2_DV_BT_DMT_1400X1050P75, 0x15, 0x00 },
+ { V4L2_DV_BT_DMT_1600X1200P60, 0x16, 0x00 }, /* TODO not tested */
+ /* TODO add 1600X1200P60_RB (not a DMT timing) */
+ { V4L2_DV_BT_DMT_1680X1050P60, 0x18, 0x00 },
+ { V4L2_DV_BT_DMT_1920X1200P60_RB, 0x19, 0x00 }, /* TODO not tested */
+ { },
+};
+
+/* sorted by number of lines */
+static const struct adv7842_video_standards adv7842_prim_mode_hdmi_comp[] = {
+ { V4L2_DV_BT_CEA_720X480P59_94, 0x0a, 0x00 },
+ { V4L2_DV_BT_CEA_720X576P50, 0x0b, 0x00 },
+ { V4L2_DV_BT_CEA_1280X720P50, 0x13, 0x01 },
+ { V4L2_DV_BT_CEA_1280X720P60, 0x13, 0x00 },
+ { V4L2_DV_BT_CEA_1920X1080P24, 0x1e, 0x04 },
+ { V4L2_DV_BT_CEA_1920X1080P25, 0x1e, 0x03 },
+ { V4L2_DV_BT_CEA_1920X1080P30, 0x1e, 0x02 },
+ { V4L2_DV_BT_CEA_1920X1080P50, 0x1e, 0x01 },
+ { V4L2_DV_BT_CEA_1920X1080P60, 0x1e, 0x00 },
+ { },
+};
+
+/* sorted by number of lines */
+static const struct adv7842_video_standards adv7842_prim_mode_hdmi_gr[] = {
+ { V4L2_DV_BT_DMT_640X480P60, 0x08, 0x00 },
+ { V4L2_DV_BT_DMT_640X480P72, 0x09, 0x00 },
+ { V4L2_DV_BT_DMT_640X480P75, 0x0a, 0x00 },
+ { V4L2_DV_BT_DMT_640X480P85, 0x0b, 0x00 },
+ { V4L2_DV_BT_DMT_800X600P56, 0x00, 0x00 },
+ { V4L2_DV_BT_DMT_800X600P60, 0x01, 0x00 },
+ { V4L2_DV_BT_DMT_800X600P72, 0x02, 0x00 },
+ { V4L2_DV_BT_DMT_800X600P75, 0x03, 0x00 },
+ { V4L2_DV_BT_DMT_800X600P85, 0x04, 0x00 },
+ { V4L2_DV_BT_DMT_1024X768P60, 0x0c, 0x00 },
+ { V4L2_DV_BT_DMT_1024X768P70, 0x0d, 0x00 },
+ { V4L2_DV_BT_DMT_1024X768P75, 0x0e, 0x00 },
+ { V4L2_DV_BT_DMT_1024X768P85, 0x0f, 0x00 },
+ { V4L2_DV_BT_DMT_1280X1024P60, 0x05, 0x00 },
+ { V4L2_DV_BT_DMT_1280X1024P75, 0x06, 0x00 },
+ { },
+};
+
+/* ----------------------------------------------------------------------- */
+
+static inline struct adv7842_state *to_state(struct v4l2_subdev *sd)
+{
+ return container_of(sd, struct adv7842_state, sd);
+}
+
+static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
+{
+ return &container_of(ctrl->handler, struct adv7842_state, hdl)->sd;
+}
+
+static inline unsigned hblanking(const struct v4l2_bt_timings *t)
+{
+ return V4L2_DV_BT_BLANKING_WIDTH(t);
+}
+
+static inline unsigned htotal(const struct v4l2_bt_timings *t)
+{
+ return V4L2_DV_BT_FRAME_WIDTH(t);
+}
+
+static inline unsigned vblanking(const struct v4l2_bt_timings *t)
+{
+ return V4L2_DV_BT_BLANKING_HEIGHT(t);
+}
+
+static inline unsigned vtotal(const struct v4l2_bt_timings *t)
+{
+ return V4L2_DV_BT_FRAME_HEIGHT(t);
+}
+
+
+/* ----------------------------------------------------------------------- */
+
+static s32 adv_smbus_read_byte_data_check(struct i2c_client *client,
+ u8 command, bool check)
+{
+ union i2c_smbus_data data;
+
+ if (!i2c_smbus_xfer(client->adapter, client->addr, client->flags,
+ I2C_SMBUS_READ, command,
+ I2C_SMBUS_BYTE_DATA, &data))
+ return data.byte;
+ if (check)
+ v4l_err(client, "error reading %02x, %02x\n",
+ client->addr, command);
+ return -EIO;
+}
+
+static s32 adv_smbus_read_byte_data(struct i2c_client *client, u8 command)
+{
+ int i;
+
+ for (i = 0; i < 3; i++) {
+ int ret = adv_smbus_read_byte_data_check(client, command, true);
+
+ if (ret >= 0) {
+ if (i)
+ v4l_err(client, "read ok after %d retries\n", i);
+ return ret;
+ }
+ }
+ v4l_err(client, "read failed\n");
+ return -EIO;
+}
+
+static s32 adv_smbus_write_byte_data(struct i2c_client *client,
+ u8 command, u8 value)
+{
+ union i2c_smbus_data data;
+ int err;
+ int i;
+
+ data.byte = value;
+ for (i = 0; i < 3; i++) {
+ err = i2c_smbus_xfer(client->adapter, client->addr,
+ client->flags,
+ I2C_SMBUS_WRITE, command,
+ I2C_SMBUS_BYTE_DATA, &data);
+ if (!err)
+ break;
+ }
+ if (err < 0)
+ v4l_err(client, "error writing %02x, %02x, %02x\n",
+ client->addr, command, value);
+ return err;
+}
+
+static void adv_smbus_write_byte_no_check(struct i2c_client *client,
+ u8 command, u8 value)
+{
+ union i2c_smbus_data data;
+ data.byte = value;
+
+ i2c_smbus_xfer(client->adapter, client->addr,
+ client->flags,
+ I2C_SMBUS_WRITE, command,
+ I2C_SMBUS_BYTE_DATA, &data);
+}
+
+static s32 adv_smbus_write_i2c_block_data(struct i2c_client *client,
+ u8 command, unsigned length, const u8 *values)
+{
+ union i2c_smbus_data data;
+
+ if (length > I2C_SMBUS_BLOCK_MAX)
+ length = I2C_SMBUS_BLOCK_MAX;
+ data.block[0] = length;
+ memcpy(data.block + 1, values, length);
+ return i2c_smbus_xfer(client->adapter, client->addr, client->flags,
+ I2C_SMBUS_WRITE, command,
+ I2C_SMBUS_I2C_BLOCK_DATA, &data);
+}
+
+/* ----------------------------------------------------------------------- */
+
+static inline int io_read(struct v4l2_subdev *sd, u8 reg)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+
+ return adv_smbus_read_byte_data(client, reg);
+}
+
+static inline int io_write(struct v4l2_subdev *sd, u8 reg, u8 val)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+
+ return adv_smbus_write_byte_data(client, reg, val);
+}
+
+static inline int io_write_and_or(struct v4l2_subdev *sd, u8 reg, u8 mask, u8 val)
+{
+ return io_write(sd, reg, (io_read(sd, reg) & mask) | val);
+}
+
+static inline int avlink_read(struct v4l2_subdev *sd, u8 reg)
+{
+ struct adv7842_state *state = to_state(sd);
+
+ return adv_smbus_read_byte_data(state->i2c_avlink, reg);
+}
+
+static inline int avlink_write(struct v4l2_subdev *sd, u8 reg, u8 val)
+{
+ struct adv7842_state *state = to_state(sd);
+
+ return adv_smbus_write_byte_data(state->i2c_avlink, reg, val);
+}
+
+static inline int cec_read(struct v4l2_subdev *sd, u8 reg)
+{
+ struct adv7842_state *state = to_state(sd);
+
+ return adv_smbus_read_byte_data(state->i2c_cec, reg);
+}
+
+static inline int cec_write(struct v4l2_subdev *sd, u8 reg, u8 val)
+{
+ struct adv7842_state *state = to_state(sd);
+
+ return adv_smbus_write_byte_data(state->i2c_cec, reg, val);
+}
+
+static inline int cec_write_and_or(struct v4l2_subdev *sd, u8 reg, u8 mask, u8 val)
+{
+ return cec_write(sd, reg, (cec_read(sd, reg) & mask) | val);
+}
+
+static inline int infoframe_read(struct v4l2_subdev *sd, u8 reg)
+{
+ struct adv7842_state *state = to_state(sd);
+
+ return adv_smbus_read_byte_data(state->i2c_infoframe, reg);
+}
+
+static inline int infoframe_write(struct v4l2_subdev *sd, u8 reg, u8 val)
+{
+ struct adv7842_state *state = to_state(sd);
+
+ return adv_smbus_write_byte_data(state->i2c_infoframe, reg, val);
+}
+
+static inline int sdp_io_read(struct v4l2_subdev *sd, u8 reg)
+{
+ struct adv7842_state *state = to_state(sd);
+
+ return adv_smbus_read_byte_data(state->i2c_sdp_io, reg);
+}
+
+static inline int sdp_io_write(struct v4l2_subdev *sd, u8 reg, u8 val)
+{
+ struct adv7842_state *state = to_state(sd);
+
+ return adv_smbus_write_byte_data(state->i2c_sdp_io, reg, val);
+}
+
+static inline int sdp_io_write_and_or(struct v4l2_subdev *sd, u8 reg, u8 mask, u8 val)
+{
+ return sdp_io_write(sd, reg, (sdp_io_read(sd, reg) & mask) | val);
+}
+
+static inline int sdp_read(struct v4l2_subdev *sd, u8 reg)
+{
+ struct adv7842_state *state = to_state(sd);
+
+ return adv_smbus_read_byte_data(state->i2c_sdp, reg);
+}
+
+static inline int sdp_write(struct v4l2_subdev *sd, u8 reg, u8 val)
+{
+ struct adv7842_state *state = to_state(sd);
+
+ return adv_smbus_write_byte_data(state->i2c_sdp, reg, val);
+}
+
+static inline int sdp_write_and_or(struct v4l2_subdev *sd, u8 reg, u8 mask, u8 val)
+{
+ return sdp_write(sd, reg, (sdp_read(sd, reg) & mask) | val);
+}
+
+static inline int afe_read(struct v4l2_subdev *sd, u8 reg)
+{
+ struct adv7842_state *state = to_state(sd);
+
+ return adv_smbus_read_byte_data(state->i2c_afe, reg);
+}
+
+static inline int afe_write(struct v4l2_subdev *sd, u8 reg, u8 val)
+{
+ struct adv7842_state *state = to_state(sd);
+
+ return adv_smbus_write_byte_data(state->i2c_afe, reg, val);
+}
+
+static inline int afe_write_and_or(struct v4l2_subdev *sd, u8 reg, u8 mask, u8 val)
+{
+ return afe_write(sd, reg, (afe_read(sd, reg) & mask) | val);
+}
+
+static inline int rep_read(struct v4l2_subdev *sd, u8 reg)
+{
+ struct adv7842_state *state = to_state(sd);
+
+ return adv_smbus_read_byte_data(state->i2c_repeater, reg);
+}
+
+static inline int rep_write(struct v4l2_subdev *sd, u8 reg, u8 val)
+{
+ struct adv7842_state *state = to_state(sd);
+
+ return adv_smbus_write_byte_data(state->i2c_repeater, reg, val);
+}
+
+static inline int rep_write_and_or(struct v4l2_subdev *sd, u8 reg, u8 mask, u8 val)
+{
+ return rep_write(sd, reg, (rep_read(sd, reg) & mask) | val);
+}
+
+static inline int edid_read(struct v4l2_subdev *sd, u8 reg)
+{
+ struct adv7842_state *state = to_state(sd);
+
+ return adv_smbus_read_byte_data(state->i2c_edid, reg);
+}
+
+static inline int edid_write(struct v4l2_subdev *sd, u8 reg, u8 val)
+{
+ struct adv7842_state *state = to_state(sd);
+
+ return adv_smbus_write_byte_data(state->i2c_edid, reg, val);
+}
+
+static inline int hdmi_read(struct v4l2_subdev *sd, u8 reg)
+{
+ struct adv7842_state *state = to_state(sd);
+
+ return adv_smbus_read_byte_data(state->i2c_hdmi, reg);
+}
+
+static inline int hdmi_write(struct v4l2_subdev *sd, u8 reg, u8 val)
+{
+ struct adv7842_state *state = to_state(sd);
+
+ return adv_smbus_write_byte_data(state->i2c_hdmi, reg, val);
+}
+
+static inline int cp_read(struct v4l2_subdev *sd, u8 reg)
+{
+ struct adv7842_state *state = to_state(sd);
+
+ return adv_smbus_read_byte_data(state->i2c_cp, reg);
+}
+
+static inline int cp_write(struct v4l2_subdev *sd, u8 reg, u8 val)
+{
+ struct adv7842_state *state = to_state(sd);
+
+ return adv_smbus_write_byte_data(state->i2c_cp, reg, val);
+}
+
+static inline int cp_write_and_or(struct v4l2_subdev *sd, u8 reg, u8 mask, u8 val)
+{
+ return cp_write(sd, reg, (cp_read(sd, reg) & mask) | val);
+}
+
+static inline int vdp_read(struct v4l2_subdev *sd, u8 reg)
+{
+ struct adv7842_state *state = to_state(sd);
+
+ return adv_smbus_read_byte_data(state->i2c_vdp, reg);
+}
+
+static inline int vdp_write(struct v4l2_subdev *sd, u8 reg, u8 val)
+{
+ struct adv7842_state *state = to_state(sd);
+
+ return adv_smbus_write_byte_data(state->i2c_vdp, reg, val);
+}
+
+static void main_reset(struct v4l2_subdev *sd)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+
+ v4l2_dbg(1, debug, sd, "%s:\n", __func__);
+
+ adv_smbus_write_byte_no_check(client, 0xff, 0x80);
+
+ mdelay(2);
+}
+
+/* ----------------------------------------------------------------------- */
+
+static inline bool is_digital_input(struct v4l2_subdev *sd)
+{
+ struct adv7842_state *state = to_state(sd);
+
+ return state->mode == ADV7842_MODE_HDMI;
+}
+
+static const struct v4l2_dv_timings_cap adv7842_timings_cap_analog = {
+ .type = V4L2_DV_BT_656_1120,
+ .bt = {
+ .max_width = 1920,
+ .max_height = 1200,
+ .min_pixelclock = 25000000,
+ .max_pixelclock = 170000000,
+ .standards = V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
+ V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
+ .capabilities = V4L2_DV_BT_CAP_PROGRESSIVE |
+ V4L2_DV_BT_CAP_REDUCED_BLANKING | V4L2_DV_BT_CAP_CUSTOM,
+ },
+};
+
+static const struct v4l2_dv_timings_cap adv7842_timings_cap_digital = {
+ .type = V4L2_DV_BT_656_1120,
+ .bt = {
+ .max_width = 1920,
+ .max_height = 1200,
+ .min_pixelclock = 25000000,
+ .max_pixelclock = 225000000,
+ .standards = V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
+ V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
+ .capabilities = V4L2_DV_BT_CAP_PROGRESSIVE |
+ V4L2_DV_BT_CAP_REDUCED_BLANKING | V4L2_DV_BT_CAP_CUSTOM,
+ },
+};
+
+static inline const struct v4l2_dv_timings_cap *
+adv7842_get_dv_timings_cap(struct v4l2_subdev *sd)
+{
+ return is_digital_input(sd) ? &adv7842_timings_cap_digital :
+ &adv7842_timings_cap_analog;
+}
+
+/* ----------------------------------------------------------------------- */
+
+static void adv7842_delayed_work_enable_hotplug(struct work_struct *work)
+{
+ struct delayed_work *dwork = to_delayed_work(work);
+ struct adv7842_state *state = container_of(dwork,
+ struct adv7842_state, delayed_work_enable_hotplug);
+ struct v4l2_subdev *sd = &state->sd;
+ int present = state->hdmi_edid.present;
+ u8 mask = 0;
+
+ v4l2_dbg(2, debug, sd, "%s: enable hotplug on ports: 0x%x\n",
+ __func__, present);
+
+ if (present & 0x1)
+ mask |= 0x20; /* port A */
+ if (present & 0x2)
+ mask |= 0x10; /* port B */
+ io_write_and_or(sd, 0x20, 0xcf, mask);
+}
+
+static int edid_write_vga_segment(struct v4l2_subdev *sd)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ struct adv7842_state *state = to_state(sd);
+ const u8 *val = state->vga_edid.edid;
+ int err = 0;
+ int i;
+
+ v4l2_dbg(2, debug, sd, "%s: write EDID on VGA port\n", __func__);
+
+ /* HPA disable on port A and B */
+ io_write_and_or(sd, 0x20, 0xcf, 0x00);
+
+ /* Disable I2C access to internal EDID ram from VGA DDC port */
+ rep_write_and_or(sd, 0x7f, 0x7f, 0x00);
+
+ /* edid segment pointer '1' for VGA port */
+ rep_write_and_or(sd, 0x77, 0xef, 0x10);
+
+ for (i = 0; !err && i < 256; i += I2C_SMBUS_BLOCK_MAX)
+ err = adv_smbus_write_i2c_block_data(state->i2c_edid, i,
+ I2C_SMBUS_BLOCK_MAX, val + i);
+ if (err)
+ return err;
+
+ /* Calculates the checksums and enables I2C access
+ * to internal EDID ram from VGA DDC port.
+ */
+ rep_write_and_or(sd, 0x7f, 0x7f, 0x80);
+
+ for (i = 0; i < 1000; i++) {
+ if (rep_read(sd, 0x79) & 0x20)
+ break;
+ mdelay(1);
+ }
+ if (i == 1000) {
+ v4l_err(client, "error enabling edid on VGA port\n");
+ return -EIO;
+ }
+
+ /* enable hotplug after 200 ms */
+ queue_delayed_work(state->work_queues,
+ &state->delayed_work_enable_hotplug, HZ / 5);
+
+ return 0;
+}
+
+static int edid_spa_location(const u8 *edid)
+{
+ u8 d;
+
+ /*
+ * TODO, improve and update for other CEA extensions
+ * currently only for 1 segment (256 bytes),
+ * i.e. 1 extension block and CEA revision 3.
+ */
+ if ((edid[0x7e] != 1) ||
+ (edid[0x80] != 0x02) ||
+ (edid[0x81] != 0x03)) {
+ return -EINVAL;
+ }
+ /*
+ * search Vendor Specific Data Block (tag 3)
+ */
+ d = edid[0x82] & 0x7f;
+ if (d > 4) {
+ int i = 0x84;
+ int end = 0x80 + d;
+ do {
+ u8 tag = edid[i]>>5;
+ u8 len = edid[i] & 0x1f;
+
+ if ((tag == 3) && (len >= 5))
+ return i + 4;
+ i += len + 1;
+ } while (i < end);
+ }
+ return -EINVAL;
+}
+
+static int edid_write_hdmi_segment(struct v4l2_subdev *sd, u8 port)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ struct adv7842_state *state = to_state(sd);
+ const u8 *val = state->hdmi_edid.edid;
+ u8 cur_mask = rep_read(sd, 0x77) & 0x0c;
+ u8 mask = port == 0 ? 0x4 : 0x8;
+ int spa_loc = edid_spa_location(val);
+ int err = 0;
+ int i;
+
+ v4l2_dbg(2, debug, sd, "%s: write EDID on port %d (spa at 0x%x)\n",
+ __func__, port, spa_loc);
+
+ /* HPA disable on port A and B */
+ io_write_and_or(sd, 0x20, 0xcf, 0x00);
+
+ /* Disable I2C access to internal EDID ram from HDMI DDC ports */
+ rep_write_and_or(sd, 0x77, 0xf3, 0x00);
+
+ /* edid segment pointer '0' for HDMI ports */
+ rep_write_and_or(sd, 0x77, 0xef, 0x00);
+
+ for (i = 0; !err && i < 256; i += I2C_SMBUS_BLOCK_MAX)
+ err = adv_smbus_write_i2c_block_data(state->i2c_edid, i,
+ I2C_SMBUS_BLOCK_MAX, val + i);
+ if (err)
+ return err;
+
+ if (spa_loc > 0) {
+ if (port == 0) {
+ /* port A SPA */
+ rep_write(sd, 0x72, val[spa_loc]);
+ rep_write(sd, 0x73, val[spa_loc + 1]);
+ } else {
+ /* port B SPA */
+ rep_write(sd, 0x74, val[spa_loc]);
+ rep_write(sd, 0x75, val[spa_loc + 1]);
+ }
+ rep_write(sd, 0x76, spa_loc);
+ } else {
+ /* default register values for SPA */
+ if (port == 0) {
+ /* port A SPA */
+ rep_write(sd, 0x72, 0);
+ rep_write(sd, 0x73, 0);
+ } else {
+ /* port B SPA */
+ rep_write(sd, 0x74, 0);
+ rep_write(sd, 0x75, 0);
+ }
+ rep_write(sd, 0x76, 0xc0);
+ }
+ rep_write_and_or(sd, 0x77, 0xbf, 0x00);
+
+ /* Calculates the checksums and enables I2C access to internal
+ * EDID ram from HDMI DDC ports
+ */
+ rep_write_and_or(sd, 0x77, 0xf3, mask | cur_mask);
+
+ for (i = 0; i < 1000; i++) {
+ if (rep_read(sd, 0x7d) & mask)
+ break;
+ mdelay(1);
+ }
+ if (i == 1000) {
+ v4l_err(client, "error enabling edid on port %d\n", port);
+ return -EIO;
+ }
+
+ /* enable hotplug after 200 ms */
+ queue_delayed_work(state->work_queues,
+ &state->delayed_work_enable_hotplug, HZ / 5);
+
+ return 0;
+}
+
+/* ----------------------------------------------------------------------- */
+
+#ifdef CONFIG_VIDEO_ADV_DEBUG
+static void adv7842_inv_register(struct v4l2_subdev *sd)
+{
+ v4l2_info(sd, "0x000-0x0ff: IO Map\n");
+ v4l2_info(sd, "0x100-0x1ff: AVLink Map\n");
+ v4l2_info(sd, "0x200-0x2ff: CEC Map\n");
+ v4l2_info(sd, "0x300-0x3ff: InfoFrame Map\n");
+ v4l2_info(sd, "0x400-0x4ff: SDP_IO Map\n");
+ v4l2_info(sd, "0x500-0x5ff: SDP Map\n");
+ v4l2_info(sd, "0x600-0x6ff: AFE Map\n");
+ v4l2_info(sd, "0x700-0x7ff: Repeater Map\n");
+ v4l2_info(sd, "0x800-0x8ff: EDID Map\n");
+ v4l2_info(sd, "0x900-0x9ff: HDMI Map\n");
+ v4l2_info(sd, "0xa00-0xaff: CP Map\n");
+ v4l2_info(sd, "0xb00-0xbff: VDP Map\n");
+}
+
+static int adv7842_g_register(struct v4l2_subdev *sd,
+ struct v4l2_dbg_register *reg)
+{
+ reg->size = 1;
+ switch (reg->reg >> 8) {
+ case 0:
+ reg->val = io_read(sd, reg->reg & 0xff);
+ break;
+ case 1:
+ reg->val = avlink_read(sd, reg->reg & 0xff);
+ break;
+ case 2:
+ reg->val = cec_read(sd, reg->reg & 0xff);
+ break;
+ case 3:
+ reg->val = infoframe_read(sd, reg->reg & 0xff);
+ break;
+ case 4:
+ reg->val = sdp_io_read(sd, reg->reg & 0xff);
+ break;
+ case 5:
+ reg->val = sdp_read(sd, reg->reg & 0xff);
+ break;
+ case 6:
+ reg->val = afe_read(sd, reg->reg & 0xff);
+ break;
+ case 7:
+ reg->val = rep_read(sd, reg->reg & 0xff);
+ break;
+ case 8:
+ reg->val = edid_read(sd, reg->reg & 0xff);
+ break;
+ case 9:
+ reg->val = hdmi_read(sd, reg->reg & 0xff);
+ break;
+ case 0xa:
+ reg->val = cp_read(sd, reg->reg & 0xff);
+ break;
+ case 0xb:
+ reg->val = vdp_read(sd, reg->reg & 0xff);
+ break;
+ default:
+ v4l2_info(sd, "Register %03llx not supported\n", reg->reg);
+ adv7842_inv_register(sd);
+ break;
+ }
+ return 0;
+}
+
+static int adv7842_s_register(struct v4l2_subdev *sd,
+ const struct v4l2_dbg_register *reg)
+{
+ u8 val = reg->val & 0xff;
+
+ switch (reg->reg >> 8) {
+ case 0:
+ io_write(sd, reg->reg & 0xff, val);
+ break;
+ case 1:
+ avlink_write(sd, reg->reg & 0xff, val);
+ break;
+ case 2:
+ cec_write(sd, reg->reg & 0xff, val);
+ break;
+ case 3:
+ infoframe_write(sd, reg->reg & 0xff, val);
+ break;
+ case 4:
+ sdp_io_write(sd, reg->reg & 0xff, val);
+ break;
+ case 5:
+ sdp_write(sd, reg->reg & 0xff, val);
+ break;
+ case 6:
+ afe_write(sd, reg->reg & 0xff, val);
+ break;
+ case 7:
+ rep_write(sd, reg->reg & 0xff, val);
+ break;
+ case 8:
+ edid_write(sd, reg->reg & 0xff, val);
+ break;
+ case 9:
+ hdmi_write(sd, reg->reg & 0xff, val);
+ break;
+ case 0xa:
+ cp_write(sd, reg->reg & 0xff, val);
+ break;
+ case 0xb:
+ vdp_write(sd, reg->reg & 0xff, val);
+ break;
+ default:
+ v4l2_info(sd, "Register %03llx not supported\n", reg->reg);
+ adv7842_inv_register(sd);
+ break;
+ }
+ return 0;
+}
+#endif
+
+static int adv7842_s_detect_tx_5v_ctrl(struct v4l2_subdev *sd)
+{
+ struct adv7842_state *state = to_state(sd);
+ int prev = v4l2_ctrl_g_ctrl(state->detect_tx_5v_ctrl);
+ u8 reg_io_6f = io_read(sd, 0x6f);
+ int val = 0;
+
+ if (reg_io_6f & 0x02)
+ val |= 1; /* port A */
+ if (reg_io_6f & 0x01)
+ val |= 2; /* port B */
+
+ v4l2_dbg(1, debug, sd, "%s: 0x%x -> 0x%x\n", __func__, prev, val);
+
+ if (val != prev)
+ return v4l2_ctrl_s_ctrl(state->detect_tx_5v_ctrl, val);
+ return 0;
+}
+
+static int find_and_set_predefined_video_timings(struct v4l2_subdev *sd,
+ u8 prim_mode,
+ const struct adv7842_video_standards *predef_vid_timings,
+ const struct v4l2_dv_timings *timings)
+{
+ int i;
+
+ for (i = 0; predef_vid_timings[i].timings.bt.width; i++) {
+ if (!v4l2_match_dv_timings(timings, &predef_vid_timings[i].timings,
+ is_digital_input(sd) ? 250000 : 1000000))
+ continue;
+ /* video std */
+ io_write(sd, 0x00, predef_vid_timings[i].vid_std);
+ /* v_freq and prim mode */
+ io_write(sd, 0x01, (predef_vid_timings[i].v_freq << 4) + prim_mode);
+ return 0;
+ }
+
+ return -1;
+}
+
+static int configure_predefined_video_timings(struct v4l2_subdev *sd,
+ struct v4l2_dv_timings *timings)
+{
+ struct adv7842_state *state = to_state(sd);
+ int err;
+
+ v4l2_dbg(1, debug, sd, "%s\n", __func__);
+
+ /* reset to default values */
+ io_write(sd, 0x16, 0x43);
+ io_write(sd, 0x17, 0x5a);
+ /* disable embedded syncs for auto graphics mode */
+ cp_write_and_or(sd, 0x81, 0xef, 0x00);
+ cp_write(sd, 0x26, 0x00);
+ cp_write(sd, 0x27, 0x00);
+ cp_write(sd, 0x28, 0x00);
+ cp_write(sd, 0x29, 0x00);
+ cp_write(sd, 0x8f, 0x00);
+ cp_write(sd, 0x90, 0x00);
+ cp_write(sd, 0xa5, 0x00);
+ cp_write(sd, 0xa6, 0x00);
+ cp_write(sd, 0xa7, 0x00);
+ cp_write(sd, 0xab, 0x00);
+ cp_write(sd, 0xac, 0x00);
+
+ switch (state->mode) {
+ case ADV7842_MODE_COMP:
+ case ADV7842_MODE_RGB:
+ err = find_and_set_predefined_video_timings(sd,
+ 0x01, adv7842_prim_mode_comp, timings);
+ if (err)
+ err = find_and_set_predefined_video_timings(sd,
+ 0x02, adv7842_prim_mode_gr, timings);
+ break;
+ case ADV7842_MODE_HDMI:
+ err = find_and_set_predefined_video_timings(sd,
+ 0x05, adv7842_prim_mode_hdmi_comp, timings);
+ if (err)
+ err = find_and_set_predefined_video_timings(sd,
+ 0x06, adv7842_prim_mode_hdmi_gr, timings);
+ break;
+ default:
+ v4l2_dbg(2, debug, sd, "%s: Unknown mode %d\n",
+ __func__, state->mode);
+ err = -1;
+ break;
+ }
+
+
+ return err;
+}
+
+static void configure_custom_video_timings(struct v4l2_subdev *sd,
+ const struct v4l2_bt_timings *bt)
+{
+ struct adv7842_state *state = to_state(sd);
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ u32 width = htotal(bt);
+ u32 height = vtotal(bt);
+ u16 cp_start_sav = bt->hsync + bt->hbackporch - 4;
+ u16 cp_start_eav = width - bt->hfrontporch;
+ u16 cp_start_vbi = height - bt->vfrontporch + 1;
+ u16 cp_end_vbi = bt->vsync + bt->vbackporch + 1;
+ u16 ch1_fr_ll = (((u32)bt->pixelclock / 100) > 0) ?
+ ((width * (ADV7842_fsc / 100)) / ((u32)bt->pixelclock / 100)) : 0;
+ const u8 pll[2] = {
+ 0xc0 | ((width >> 8) & 0x1f),
+ width & 0xff
+ };
+
+ v4l2_dbg(2, debug, sd, "%s\n", __func__);
+
+ switch (state->mode) {
+ case ADV7842_MODE_COMP:
+ case ADV7842_MODE_RGB:
+ /* auto graphics */
+ io_write(sd, 0x00, 0x07); /* video std */
+ io_write(sd, 0x01, 0x02); /* prim mode */
+ /* enable embedded syncs for auto graphics mode */
+ cp_write_and_or(sd, 0x81, 0xef, 0x10);
+
+ /* Should only be set in auto-graphics mode [REF_02, p. 91-92] */
+ /* setup PLL_DIV_MAN_EN and PLL_DIV_RATIO */
+ /* IO-map reg. 0x16 and 0x17 should be written in sequence */
+ if (adv_smbus_write_i2c_block_data(client, 0x16, 2, pll)) {
+ v4l2_err(sd, "writing to reg 0x16 and 0x17 failed\n");
+ break;
+ }
+
+ /* active video - horizontal timing */
+ cp_write(sd, 0x26, (cp_start_sav >> 8) & 0xf);
+ cp_write(sd, 0x27, (cp_start_sav & 0xff));
+ cp_write(sd, 0x28, (cp_start_eav >> 8) & 0xf);
+ cp_write(sd, 0x29, (cp_start_eav & 0xff));
+
+ /* active video - vertical timing */
+ cp_write(sd, 0xa5, (cp_start_vbi >> 4) & 0xff);
+ cp_write(sd, 0xa6, ((cp_start_vbi & 0xf) << 4) |
+ ((cp_end_vbi >> 8) & 0xf));
+ cp_write(sd, 0xa7, cp_end_vbi & 0xff);
+ break;
+ case ADV7842_MODE_HDMI:
+ /* set default prim_mode/vid_std for HDMI
+ accoring to [REF_03, c. 4.2] */
+ io_write(sd, 0x00, 0x02); /* video std */
+ io_write(sd, 0x01, 0x06); /* prim mode */
+ break;
+ default:
+ v4l2_dbg(2, debug, sd, "%s: Unknown mode %d\n",
+ __func__, state->mode);
+ break;
+ }
+
+ cp_write(sd, 0x8f, (ch1_fr_ll >> 8) & 0x7);
+ cp_write(sd, 0x90, ch1_fr_ll & 0xff);
+ cp_write(sd, 0xab, (height >> 4) & 0xff);
+ cp_write(sd, 0xac, (height & 0x0f) << 4);
+}
+
+static void set_rgb_quantization_range(struct v4l2_subdev *sd)
+{
+ struct adv7842_state *state = to_state(sd);
+
+ switch (state->rgb_quantization_range) {
+ case V4L2_DV_RGB_RANGE_AUTO:
+ /* automatic */
+ if (is_digital_input(sd) && !(hdmi_read(sd, 0x05) & 0x80)) {
+ /* receiving DVI-D signal */
+
+ /* ADV7842 selects RGB limited range regardless of
+ input format (CE/IT) in automatic mode */
+ if (state->timings.bt.standards & V4L2_DV_BT_STD_CEA861) {
+ /* RGB limited range (16-235) */
+ io_write_and_or(sd, 0x02, 0x0f, 0x00);
+
+ } else {
+ /* RGB full range (0-255) */
+ io_write_and_or(sd, 0x02, 0x0f, 0x10);
+ }
+ } else {
+ /* receiving HDMI or analog signal, set automode */
+ io_write_and_or(sd, 0x02, 0x0f, 0xf0);
+ }
+ break;
+ case V4L2_DV_RGB_RANGE_LIMITED:
+ /* RGB limited range (16-235) */
+ io_write_and_or(sd, 0x02, 0x0f, 0x00);
+ break;
+ case V4L2_DV_RGB_RANGE_FULL:
+ /* RGB full range (0-255) */
+ io_write_and_or(sd, 0x02, 0x0f, 0x10);
+ break;
+ }
+}
+
+static int adv7842_s_ctrl(struct v4l2_ctrl *ctrl)
+{
+ struct v4l2_subdev *sd = to_sd(ctrl);
+ struct adv7842_state *state = to_state(sd);
+
+ /* TODO SDP ctrls
+ contrast/brightness/hue/free run is acting a bit strange,
+ not sure if sdp csc is correct.
+ */
+ switch (ctrl->id) {
+ /* standard ctrls */
+ case V4L2_CID_BRIGHTNESS:
+ cp_write(sd, 0x3c, ctrl->val);
+ sdp_write(sd, 0x14, ctrl->val);
+ /* ignore lsb sdp 0x17[3:2] */
+ return 0;
+ case V4L2_CID_CONTRAST:
+ cp_write(sd, 0x3a, ctrl->val);
+ sdp_write(sd, 0x13, ctrl->val);
+ /* ignore lsb sdp 0x17[1:0] */
+ return 0;
+ case V4L2_CID_SATURATION:
+ cp_write(sd, 0x3b, ctrl->val);
+ sdp_write(sd, 0x15, ctrl->val);
+ /* ignore lsb sdp 0x17[5:4] */
+ return 0;
+ case V4L2_CID_HUE:
+ cp_write(sd, 0x3d, ctrl->val);
+ sdp_write(sd, 0x16, ctrl->val);
+ /* ignore lsb sdp 0x17[7:6] */
+ return 0;
+ /* custom ctrls */
+ case V4L2_CID_ADV_RX_ANALOG_SAMPLING_PHASE:
+ afe_write(sd, 0xc8, ctrl->val);
+ return 0;
+ case V4L2_CID_ADV_RX_FREE_RUN_COLOR_MANUAL:
+ cp_write_and_or(sd, 0xbf, ~0x04, (ctrl->val << 2));
+ sdp_write_and_or(sd, 0xdd, ~0x04, (ctrl->val << 2));
+ return 0;
+ case V4L2_CID_ADV_RX_FREE_RUN_COLOR: {
+ u8 R = (ctrl->val & 0xff0000) >> 16;
+ u8 G = (ctrl->val & 0x00ff00) >> 8;
+ u8 B = (ctrl->val & 0x0000ff);
+ /* RGB -> YUV, numerical approximation */
+ int Y = 66 * R + 129 * G + 25 * B;
+ int U = -38 * R - 74 * G + 112 * B;
+ int V = 112 * R - 94 * G - 18 * B;
+
+ /* Scale down to 8 bits with rounding */
+ Y = (Y + 128) >> 8;
+ U = (U + 128) >> 8;
+ V = (V + 128) >> 8;
+ /* make U,V positive */
+ Y += 16;
+ U += 128;
+ V += 128;
+
+ v4l2_dbg(1, debug, sd, "R %x, G %x, B %x\n", R, G, B);
+ v4l2_dbg(1, debug, sd, "Y %x, U %x, V %x\n", Y, U, V);
+
+ /* CP */
+ cp_write(sd, 0xc1, R);
+ cp_write(sd, 0xc0, G);
+ cp_write(sd, 0xc2, B);
+ /* SDP */
+ sdp_write(sd, 0xde, Y);
+ sdp_write(sd, 0xdf, (V & 0xf0) | ((U >> 4) & 0x0f));
+ return 0;
+ }
+ case V4L2_CID_DV_RX_RGB_RANGE:
+ state->rgb_quantization_range = ctrl->val;
+ set_rgb_quantization_range(sd);
+ return 0;
+ }
+ return -EINVAL;
+}
+
+static inline bool no_power(struct v4l2_subdev *sd)
+{
+ return io_read(sd, 0x0c) & 0x24;
+}
+
+static inline bool no_cp_signal(struct v4l2_subdev *sd)
+{
+ return ((cp_read(sd, 0xb5) & 0xd0) != 0xd0) || !(cp_read(sd, 0xb1) & 0x80);
+}
+
+static inline bool is_hdmi(struct v4l2_subdev *sd)
+{
+ return hdmi_read(sd, 0x05) & 0x80;
+}
+
+static int adv7842_g_input_status(struct v4l2_subdev *sd, u32 *status)
+{
+ struct adv7842_state *state = to_state(sd);
+
+ *status = 0;
+
+ if (io_read(sd, 0x0c) & 0x24)
+ *status |= V4L2_IN_ST_NO_POWER;
+
+ if (state->mode == ADV7842_MODE_SDP) {
+ /* status from SDP block */
+ if (!(sdp_read(sd, 0x5A) & 0x01))
+ *status |= V4L2_IN_ST_NO_SIGNAL;
+
+ v4l2_dbg(1, debug, sd, "%s: SDP status = 0x%x\n",
+ __func__, *status);
+ return 0;
+ }
+ /* status from CP block */
+ if ((cp_read(sd, 0xb5) & 0xd0) != 0xd0 ||
+ !(cp_read(sd, 0xb1) & 0x80))
+ /* TODO channel 2 */
+ *status |= V4L2_IN_ST_NO_SIGNAL;
+
+ if (is_digital_input(sd) && ((io_read(sd, 0x74) & 0x03) != 0x03))
+ *status |= V4L2_IN_ST_NO_SIGNAL;
+
+ v4l2_dbg(1, debug, sd, "%s: CP status = 0x%x\n",
+ __func__, *status);
+
+ return 0;
+}
+
+struct stdi_readback {
+ u16 bl, lcf, lcvs;
+ u8 hs_pol, vs_pol;
+ bool interlaced;
+};
+
+static int stdi2dv_timings(struct v4l2_subdev *sd,
+ struct stdi_readback *stdi,
+ struct v4l2_dv_timings *timings)
+{
+ struct adv7842_state *state = to_state(sd);
+ u32 hfreq = (ADV7842_fsc * 8) / stdi->bl;
+ u32 pix_clk;
+ int i;
+
+ for (i = 0; v4l2_dv_timings_presets[i].bt.width; i++) {
+ const struct v4l2_bt_timings *bt = &v4l2_dv_timings_presets[i].bt;
+
+ if (!v4l2_valid_dv_timings(&v4l2_dv_timings_presets[i],
+ adv7842_get_dv_timings_cap(sd),
+ adv7842_check_dv_timings, NULL))
+ continue;
+ if (vtotal(bt) != stdi->lcf + 1)
+ continue;
+ if (bt->vsync != stdi->lcvs)
+ continue;
+
+ pix_clk = hfreq * htotal(bt);
+
+ if ((pix_clk < bt->pixelclock + 1000000) &&
+ (pix_clk > bt->pixelclock - 1000000)) {
+ *timings = v4l2_dv_timings_presets[i];
+ return 0;
+ }
+ }
+
+ if (v4l2_detect_cvt(stdi->lcf + 1, hfreq, stdi->lcvs,
+ (stdi->hs_pol == '+' ? V4L2_DV_HSYNC_POS_POL : 0) |
+ (stdi->vs_pol == '+' ? V4L2_DV_VSYNC_POS_POL : 0),
+ timings))
+ return 0;
+ if (v4l2_detect_gtf(stdi->lcf + 1, hfreq, stdi->lcvs,
+ (stdi->hs_pol == '+' ? V4L2_DV_HSYNC_POS_POL : 0) |
+ (stdi->vs_pol == '+' ? V4L2_DV_VSYNC_POS_POL : 0),
+ state->aspect_ratio, timings))
+ return 0;
+
+ v4l2_dbg(2, debug, sd,
+ "%s: No format candidate found for lcvs = %d, lcf=%d, bl = %d, %chsync, %cvsync\n",
+ __func__, stdi->lcvs, stdi->lcf, stdi->bl,
+ stdi->hs_pol, stdi->vs_pol);
+ return -1;
+}
+
+static int read_stdi(struct v4l2_subdev *sd, struct stdi_readback *stdi)
+{
+ u32 status;
+
+ adv7842_g_input_status(sd, &status);
+ if (status & V4L2_IN_ST_NO_SIGNAL) {
+ v4l2_dbg(2, debug, sd, "%s: no signal\n", __func__);
+ return -ENOLINK;
+ }
+
+ stdi->bl = ((cp_read(sd, 0xb1) & 0x3f) << 8) | cp_read(sd, 0xb2);
+ stdi->lcf = ((cp_read(sd, 0xb3) & 0x7) << 8) | cp_read(sd, 0xb4);
+ stdi->lcvs = cp_read(sd, 0xb3) >> 3;
+
+ if ((cp_read(sd, 0xb5) & 0x80) && ((cp_read(sd, 0xb5) & 0x03) == 0x01)) {
+ stdi->hs_pol = ((cp_read(sd, 0xb5) & 0x10) ?
+ ((cp_read(sd, 0xb5) & 0x08) ? '+' : '-') : 'x');
+ stdi->vs_pol = ((cp_read(sd, 0xb5) & 0x40) ?
+ ((cp_read(sd, 0xb5) & 0x20) ? '+' : '-') : 'x');
+ } else {
+ stdi->hs_pol = 'x';
+ stdi->vs_pol = 'x';
+ }
+ stdi->interlaced = (cp_read(sd, 0xb1) & 0x40) ? true : false;
+
+ if (stdi->lcf < 239 || stdi->bl < 8 || stdi->bl == 0x3fff) {
+ v4l2_dbg(2, debug, sd, "%s: invalid signal\n", __func__);
+ return -ENOLINK;
+ }
+
+ v4l2_dbg(2, debug, sd,
+ "%s: lcf (frame height - 1) = %d, bl = %d, lcvs (vsync) = %d, %chsync, %cvsync, %s\n",
+ __func__, stdi->lcf, stdi->bl, stdi->lcvs,
+ stdi->hs_pol, stdi->vs_pol,
+ stdi->interlaced ? "interlaced" : "progressive");
+
+ return 0;
+}
+
+static int adv7842_enum_dv_timings(struct v4l2_subdev *sd,
+ struct v4l2_enum_dv_timings *timings)
+{
+ return v4l2_enum_dv_timings_cap(timings,
+ adv7842_get_dv_timings_cap(sd), adv7842_check_dv_timings, NULL);
+}
+
+static int adv7842_dv_timings_cap(struct v4l2_subdev *sd,
+ struct v4l2_dv_timings_cap *cap)
+{
+ *cap = *adv7842_get_dv_timings_cap(sd);
+ return 0;
+}
+
+/* Fill the optional fields .standards and .flags in struct v4l2_dv_timings
+ if the format is listed in adv7604_timings[] */
+static void adv7842_fill_optional_dv_timings_fields(struct v4l2_subdev *sd,
+ struct v4l2_dv_timings *timings)
+{
+ v4l2_find_dv_timings_cap(timings, adv7842_get_dv_timings_cap(sd),
+ is_digital_input(sd) ? 250000 : 1000000,
+ adv7842_check_dv_timings, NULL);
+}
+
+static int adv7842_query_dv_timings(struct v4l2_subdev *sd,
+ struct v4l2_dv_timings *timings)
+{
+ struct adv7842_state *state = to_state(sd);
+ struct v4l2_bt_timings *bt = &timings->bt;
+ struct stdi_readback stdi = { 0 };
+
+ /* SDP block */
+ if (state->mode == ADV7842_MODE_SDP)
+ return -ENODATA;
+
+ /* read STDI */
+ if (read_stdi(sd, &stdi)) {
+ v4l2_dbg(1, debug, sd, "%s: no valid signal\n", __func__);
+ return -ENOLINK;
+ }
+ bt->interlaced = stdi.interlaced ?
+ V4L2_DV_INTERLACED : V4L2_DV_PROGRESSIVE;
+ bt->polarities = ((hdmi_read(sd, 0x05) & 0x10) ? V4L2_DV_VSYNC_POS_POL : 0) |
+ ((hdmi_read(sd, 0x05) & 0x20) ? V4L2_DV_HSYNC_POS_POL : 0);
+ bt->vsync = stdi.lcvs;
+
+ if (is_digital_input(sd)) {
+ bool lock = hdmi_read(sd, 0x04) & 0x02;
+ bool interlaced = hdmi_read(sd, 0x0b) & 0x20;
+ unsigned w = (hdmi_read(sd, 0x07) & 0x1f) * 256 + hdmi_read(sd, 0x08);
+ unsigned h = (hdmi_read(sd, 0x09) & 0x1f) * 256 + hdmi_read(sd, 0x0a);
+ unsigned w_total = (hdmi_read(sd, 0x1e) & 0x3f) * 256 +
+ hdmi_read(sd, 0x1f);
+ unsigned h_total = ((hdmi_read(sd, 0x26) & 0x3f) * 256 +
+ hdmi_read(sd, 0x27)) / 2;
+ unsigned freq = (((hdmi_read(sd, 0x51) << 1) +
+ (hdmi_read(sd, 0x52) >> 7)) * 1000000) +
+ ((hdmi_read(sd, 0x52) & 0x7f) * 1000000) / 128;
+ int i;
+
+ if (is_hdmi(sd)) {
+ /* adjust for deep color mode */
+ freq = freq * 8 / (((hdmi_read(sd, 0x0b) & 0xc0)>>6) * 2 + 8);
+ }
+
+ /* No lock? */
+ if (!lock) {
+ v4l2_dbg(1, debug, sd, "%s: no lock on TMDS signal\n", __func__);
+ return -ENOLCK;
+ }
+ /* Interlaced? */
+ if (interlaced) {
+ v4l2_dbg(1, debug, sd, "%s: interlaced video not supported\n", __func__);
+ return -ERANGE;
+ }
+
+ for (i = 0; v4l2_dv_timings_presets[i].bt.width; i++) {
+ const struct v4l2_bt_timings *bt = &v4l2_dv_timings_presets[i].bt;
+
+ if (!v4l2_valid_dv_timings(&v4l2_dv_timings_presets[i],
+ adv7842_get_dv_timings_cap(sd),
+ adv7842_check_dv_timings, NULL))
+ continue;
+ if (w_total != htotal(bt) || h_total != vtotal(bt))
+ continue;
+
+ if (w != bt->width || h != bt->height)
+ continue;
+
+ if (abs(freq - bt->pixelclock) > 1000000)
+ continue;
+ *timings = v4l2_dv_timings_presets[i];
+ return 0;
+ }
+
+ timings->type = V4L2_DV_BT_656_1120;
+
+ bt->width = w;
+ bt->height = h;
+ bt->interlaced = (hdmi_read(sd, 0x0b) & 0x20) ?
+ V4L2_DV_INTERLACED : V4L2_DV_PROGRESSIVE;
+ bt->polarities = ((hdmi_read(sd, 0x05) & 0x10) ?
+ V4L2_DV_VSYNC_POS_POL : 0) | ((hdmi_read(sd, 0x05) & 0x20) ?
+ V4L2_DV_HSYNC_POS_POL : 0);
+ bt->pixelclock = (((hdmi_read(sd, 0x51) << 1) +
+ (hdmi_read(sd, 0x52) >> 7)) * 1000000) +
+ ((hdmi_read(sd, 0x52) & 0x7f) * 1000000) / 128;
+ bt->hfrontporch = (hdmi_read(sd, 0x20) & 0x1f) * 256 +
+ hdmi_read(sd, 0x21);
+ bt->hsync = (hdmi_read(sd, 0x22) & 0x1f) * 256 +
+ hdmi_read(sd, 0x23);
+ bt->hbackporch = (hdmi_read(sd, 0x24) & 0x1f) * 256 +
+ hdmi_read(sd, 0x25);
+ bt->vfrontporch = ((hdmi_read(sd, 0x2a) & 0x3f) * 256 +
+ hdmi_read(sd, 0x2b)) / 2;
+ bt->il_vfrontporch = ((hdmi_read(sd, 0x2c) & 0x3f) * 256 +
+ hdmi_read(sd, 0x2d)) / 2;
+ bt->vsync = ((hdmi_read(sd, 0x2e) & 0x3f) * 256 +
+ hdmi_read(sd, 0x2f)) / 2;
+ bt->il_vsync = ((hdmi_read(sd, 0x30) & 0x3f) * 256 +
+ hdmi_read(sd, 0x31)) / 2;
+ bt->vbackporch = ((hdmi_read(sd, 0x32) & 0x3f) * 256 +
+ hdmi_read(sd, 0x33)) / 2;
+ bt->il_vbackporch = ((hdmi_read(sd, 0x34) & 0x3f) * 256 +
+ hdmi_read(sd, 0x35)) / 2;
+
+ bt->standards = 0;
+ bt->flags = 0;
+ } else {
+ /* Interlaced? */
+ if (stdi.interlaced) {
+ v4l2_dbg(1, debug, sd, "%s: interlaced video not supported\n", __func__);
+ return -ERANGE;
+ }
+
+ if (stdi2dv_timings(sd, &stdi, timings)) {
+ v4l2_dbg(1, debug, sd, "%s: format not supported\n", __func__);
+ return -ERANGE;
+ }
+ }
+
+ if (debug > 1)
+ v4l2_print_dv_timings(sd->name, "adv7842_query_dv_timings: ",
+ timings, true);
+ return 0;
+}
+
+static int adv7842_s_dv_timings(struct v4l2_subdev *sd,
+ struct v4l2_dv_timings *timings)
+{
+ struct adv7842_state *state = to_state(sd);
+ struct v4l2_bt_timings *bt;
+ int err;
+
+ if (state->mode == ADV7842_MODE_SDP)
+ return -ENODATA;
+
+ bt = &timings->bt;
+
+ if (!v4l2_valid_dv_timings(timings, adv7842_get_dv_timings_cap(sd),
+ adv7842_check_dv_timings, NULL))
+ return -ERANGE;
+
+ adv7842_fill_optional_dv_timings_fields(sd, timings);
+
+ state->timings = *timings;
+
+ cp_write(sd, 0x91, bt->interlaced ? 0x50 : 0x10);
+
+ /* Use prim_mode and vid_std when available */
+ err = configure_predefined_video_timings(sd, timings);
+ if (err) {
+ /* custom settings when the video format
+ does not have prim_mode/vid_std */
+ configure_custom_video_timings(sd, bt);
+ }
+
+ set_rgb_quantization_range(sd);
+
+
+ if (debug > 1)
+ v4l2_print_dv_timings(sd->name, "adv7842_s_dv_timings: ",
+ timings, true);
+ return 0;
+}
+
+static int adv7842_g_dv_timings(struct v4l2_subdev *sd,
+ struct v4l2_dv_timings *timings)
+{
+ struct adv7842_state *state = to_state(sd);
+
+ if (state->mode == ADV7842_MODE_SDP)
+ return -ENODATA;
+ *timings = state->timings;
+ return 0;
+}
+
+static void enable_input(struct v4l2_subdev *sd)
+{
+ struct adv7842_state *state = to_state(sd);
+ switch (state->mode) {
+ case ADV7842_MODE_SDP:
+ case ADV7842_MODE_COMP:
+ case ADV7842_MODE_RGB:
+ /* enable */
+ io_write(sd, 0x15, 0xb0); /* Disable Tristate of Pins (no audio) */
+ break;
+ case ADV7842_MODE_HDMI:
+ /* enable */
+ hdmi_write(sd, 0x1a, 0x0a); /* Unmute audio */
+ hdmi_write(sd, 0x01, 0x00); /* Enable HDMI clock terminators */
+ io_write(sd, 0x15, 0xa0); /* Disable Tristate of Pins */
+ break;
+ default:
+ v4l2_dbg(2, debug, sd, "%s: Unknown mode %d\n",
+ __func__, state->mode);
+ break;
+ }
+}
+
+static void disable_input(struct v4l2_subdev *sd)
+{
+ /* disable */
+ io_write(sd, 0x15, 0xbe); /* Tristate all outputs from video core */
+ hdmi_write(sd, 0x1a, 0x1a); /* Mute audio */
+ hdmi_write(sd, 0x01, 0x78); /* Disable HDMI clock terminators */
+}
+
+static void sdp_csc_coeff(struct v4l2_subdev *sd,
+ const struct adv7842_sdp_csc_coeff *c)
+{
+ /* csc auto/manual */
+ sdp_io_write_and_or(sd, 0xe0, 0xbf, c->manual ? 0x00 : 0x40);
+
+ if (!c->manual)
+ return;
+
+ /* csc scaling */
+ sdp_io_write_and_or(sd, 0xe0, 0x7f, c->scaling == 2 ? 0x80 : 0x00);
+
+ /* A coeff */
+ sdp_io_write_and_or(sd, 0xe0, 0xe0, c->A1 >> 8);
+ sdp_io_write(sd, 0xe1, c->A1);
+ sdp_io_write_and_or(sd, 0xe2, 0xe0, c->A2 >> 8);
+ sdp_io_write(sd, 0xe3, c->A2);
+ sdp_io_write_and_or(sd, 0xe4, 0xe0, c->A3 >> 8);
+ sdp_io_write(sd, 0xe5, c->A3);
+
+ /* A scale */
+ sdp_io_write_and_or(sd, 0xe6, 0x80, c->A4 >> 8);
+ sdp_io_write(sd, 0xe7, c->A4);
+
+ /* B coeff */
+ sdp_io_write_and_or(sd, 0xe8, 0xe0, c->B1 >> 8);
+ sdp_io_write(sd, 0xe9, c->B1);
+ sdp_io_write_and_or(sd, 0xea, 0xe0, c->B2 >> 8);
+ sdp_io_write(sd, 0xeb, c->B2);
+ sdp_io_write_and_or(sd, 0xec, 0xe0, c->B3 >> 8);
+ sdp_io_write(sd, 0xed, c->B3);
+
+ /* B scale */
+ sdp_io_write_and_or(sd, 0xee, 0x80, c->B4 >> 8);
+ sdp_io_write(sd, 0xef, c->B4);
+
+ /* C coeff */
+ sdp_io_write_and_or(sd, 0xf0, 0xe0, c->C1 >> 8);
+ sdp_io_write(sd, 0xf1, c->C1);
+ sdp_io_write_and_or(sd, 0xf2, 0xe0, c->C2 >> 8);
+ sdp_io_write(sd, 0xf3, c->C2);
+ sdp_io_write_and_or(sd, 0xf4, 0xe0, c->C3 >> 8);
+ sdp_io_write(sd, 0xf5, c->C3);
+
+ /* C scale */
+ sdp_io_write_and_or(sd, 0xf6, 0x80, c->C4 >> 8);
+ sdp_io_write(sd, 0xf7, c->C4);
+}
+
+static void select_input(struct v4l2_subdev *sd,
+ enum adv7842_vid_std_select vid_std_select)
+{
+ struct adv7842_state *state = to_state(sd);
+
+ switch (state->mode) {
+ case ADV7842_MODE_SDP:
+ io_write(sd, 0x00, vid_std_select); /* video std: CVBS or YC mode */
+ io_write(sd, 0x01, 0); /* prim mode */
+ /* enable embedded syncs for auto graphics mode */
+ cp_write_and_or(sd, 0x81, 0xef, 0x10);
+
+ afe_write(sd, 0x00, 0x00); /* power up ADC */
+ afe_write(sd, 0xc8, 0x00); /* phase control */
+
+ io_write(sd, 0x19, 0x83); /* LLC DLL phase */
+ io_write(sd, 0x33, 0x40); /* LLC DLL enable */
+
+ io_write(sd, 0xdd, 0x90); /* Manual 2x output clock */
+ /* script says register 0xde, which don't exist in manual */
+
+ /* Manual analog input muxing mode, CVBS (6.4)*/
+ afe_write_and_or(sd, 0x02, 0x7f, 0x80);
+ if (vid_std_select == ADV7842_SDP_VID_STD_CVBS_SD_4x1) {
+ afe_write(sd, 0x03, 0xa0); /* ADC0 to AIN10 (CVBS), ADC1 N/C*/
+ afe_write(sd, 0x04, 0x00); /* ADC2 N/C,ADC3 N/C*/
+ } else {
+ afe_write(sd, 0x03, 0xa0); /* ADC0 to AIN10 (CVBS), ADC1 N/C*/
+ afe_write(sd, 0x04, 0xc0); /* ADC2 to AIN12, ADC3 N/C*/
+ }
+ afe_write(sd, 0x0c, 0x1f); /* ADI recommend write */
+ afe_write(sd, 0x12, 0x63); /* ADI recommend write */
+
+ sdp_io_write(sd, 0xb2, 0x60); /* Disable AV codes */
+ sdp_io_write(sd, 0xc8, 0xe3); /* Disable Ancillary data */
+
+ /* SDP recommended settings */
+ sdp_write(sd, 0x00, 0x3F); /* Autodetect PAL NTSC (not SECAM) */
+ sdp_write(sd, 0x01, 0x00); /* Pedestal Off */
+
+ sdp_write(sd, 0x03, 0xE4); /* Manual VCR Gain Luma 0x40B */
+ sdp_write(sd, 0x04, 0x0B); /* Manual Luma setting */
+ sdp_write(sd, 0x05, 0xC3); /* Manual Chroma setting 0x3FE */
+ sdp_write(sd, 0x06, 0xFE); /* Manual Chroma setting */
+ sdp_write(sd, 0x12, 0x0D); /* Frame TBC,I_P, 3D comb enabled */
+ sdp_write(sd, 0xA7, 0x00); /* ADI Recommended Write */
+ sdp_io_write(sd, 0xB0, 0x00); /* Disable H and v blanking */
+
+ /* deinterlacer enabled and 3D comb */
+ sdp_write_and_or(sd, 0x12, 0xf6, 0x09);
+
+ sdp_write(sd, 0xdd, 0x08); /* free run auto */
+
+ break;
+
+ case ADV7842_MODE_COMP:
+ case ADV7842_MODE_RGB:
+ /* Automatic analog input muxing mode */
+ afe_write_and_or(sd, 0x02, 0x7f, 0x00);
+ /* set mode and select free run resolution */
+ io_write(sd, 0x00, vid_std_select); /* video std */
+ io_write(sd, 0x01, 0x02); /* prim mode */
+ cp_write_and_or(sd, 0x81, 0xef, 0x10); /* enable embedded syncs
+ for auto graphics mode */
+
+ afe_write(sd, 0x00, 0x00); /* power up ADC */
+ afe_write(sd, 0xc8, 0x00); /* phase control */
+
+ /* set ADI recommended settings for digitizer */
+ /* "ADV7842 Register Settings Recommendations
+ * (rev. 1.8, November 2010)" p. 9. */
+ afe_write(sd, 0x0c, 0x1f); /* ADC Range improvement */
+ afe_write(sd, 0x12, 0x63); /* ADC Range improvement */
+
+ /* set to default gain for RGB */
+ cp_write(sd, 0x73, 0x10);
+ cp_write(sd, 0x74, 0x04);
+ cp_write(sd, 0x75, 0x01);
+ cp_write(sd, 0x76, 0x00);
+
+ cp_write(sd, 0x3e, 0x04); /* CP core pre-gain control */
+ cp_write(sd, 0xc3, 0x39); /* CP coast control. Graphics mode */
+ cp_write(sd, 0x40, 0x5c); /* CP core pre-gain control. Graphics mode */
+ break;
+
+ case ADV7842_MODE_HDMI:
+ /* Automatic analog input muxing mode */
+ afe_write_and_or(sd, 0x02, 0x7f, 0x00);
+ /* set mode and select free run resolution */
+ if (state->hdmi_port_a)
+ hdmi_write(sd, 0x00, 0x02); /* select port A */
+ else
+ hdmi_write(sd, 0x00, 0x03); /* select port B */
+ io_write(sd, 0x00, vid_std_select); /* video std */
+ io_write(sd, 0x01, 5); /* prim mode */
+ cp_write_and_or(sd, 0x81, 0xef, 0x00); /* disable embedded syncs
+ for auto graphics mode */
+
+ /* set ADI recommended settings for HDMI: */
+ /* "ADV7842 Register Settings Recommendations
+ * (rev. 1.8, November 2010)" p. 3. */
+ hdmi_write(sd, 0xc0, 0x00);
+ hdmi_write(sd, 0x0d, 0x34); /* ADI recommended write */
+ hdmi_write(sd, 0x3d, 0x10); /* ADI recommended write */
+ hdmi_write(sd, 0x44, 0x85); /* TMDS PLL optimization */
+ hdmi_write(sd, 0x46, 0x1f); /* ADI recommended write */
+ hdmi_write(sd, 0x57, 0xb6); /* TMDS PLL optimization */
+ hdmi_write(sd, 0x58, 0x03); /* TMDS PLL optimization */
+ hdmi_write(sd, 0x60, 0x88); /* TMDS PLL optimization */
+ hdmi_write(sd, 0x61, 0x88); /* TMDS PLL optimization */
+ hdmi_write(sd, 0x6c, 0x18); /* Disable ISRC clearing bit,
+ Improve robustness */
+ hdmi_write(sd, 0x75, 0x10); /* DDC drive strength */
+ hdmi_write(sd, 0x85, 0x1f); /* equaliser */
+ hdmi_write(sd, 0x87, 0x70); /* ADI recommended write */
+ hdmi_write(sd, 0x89, 0x04); /* equaliser */
+ hdmi_write(sd, 0x8a, 0x1e); /* equaliser */
+ hdmi_write(sd, 0x93, 0x04); /* equaliser */
+ hdmi_write(sd, 0x94, 0x1e); /* equaliser */
+ hdmi_write(sd, 0x99, 0xa1); /* ADI recommended write */
+ hdmi_write(sd, 0x9b, 0x09); /* ADI recommended write */
+ hdmi_write(sd, 0x9d, 0x02); /* equaliser */
+
+ afe_write(sd, 0x00, 0xff); /* power down ADC */
+ afe_write(sd, 0xc8, 0x40); /* phase control */
+
+ /* set to default gain for HDMI */
+ cp_write(sd, 0x73, 0x10);
+ cp_write(sd, 0x74, 0x04);
+ cp_write(sd, 0x75, 0x01);
+ cp_write(sd, 0x76, 0x00);
+
+ /* reset ADI recommended settings for digitizer */
+ /* "ADV7842 Register Settings Recommendations
+ * (rev. 2.5, June 2010)" p. 17. */
+ afe_write(sd, 0x12, 0xfb); /* ADC noise shaping filter controls */
+ afe_write(sd, 0x0c, 0x0d); /* CP core gain controls */
+ cp_write(sd, 0x3e, 0x80); /* CP core pre-gain control,
+ enable color control */
+ /* CP coast control */
+ cp_write(sd, 0xc3, 0x33); /* Component mode */
+
+ /* color space conversion, autodetect color space */
+ io_write_and_or(sd, 0x02, 0x0f, 0xf0);
+ break;
+
+ default:
+ v4l2_dbg(2, debug, sd, "%s: Unknown mode %d\n",
+ __func__, state->mode);
+ break;
+ }
+}
+
+static int adv7842_s_routing(struct v4l2_subdev *sd,
+ u32 input, u32 output, u32 config)
+{
+ struct adv7842_state *state = to_state(sd);
+
+ v4l2_dbg(2, debug, sd, "%s: input %d\n", __func__, input);
+
+ switch (input) {
+ case ADV7842_SELECT_HDMI_PORT_A:
+ /* TODO select HDMI_COMP or HDMI_GR */
+ state->mode = ADV7842_MODE_HDMI;
+ state->vid_std_select = ADV7842_HDMI_COMP_VID_STD_HD_1250P;
+ state->hdmi_port_a = true;
+ break;
+ case ADV7842_SELECT_HDMI_PORT_B:
+ /* TODO select HDMI_COMP or HDMI_GR */
+ state->mode = ADV7842_MODE_HDMI;
+ state->vid_std_select = ADV7842_HDMI_COMP_VID_STD_HD_1250P;
+ state->hdmi_port_a = false;
+ break;
+ case ADV7842_SELECT_VGA_COMP:
+ v4l2_info(sd, "%s: VGA component: todo\n", __func__);
+ case ADV7842_SELECT_VGA_RGB:
+ state->mode = ADV7842_MODE_RGB;
+ state->vid_std_select = ADV7842_RGB_VID_STD_AUTO_GRAPH_MODE;
+ break;
+ case ADV7842_SELECT_SDP_CVBS:
+ state->mode = ADV7842_MODE_SDP;
+ state->vid_std_select = ADV7842_SDP_VID_STD_CVBS_SD_4x1;
+ break;
+ case ADV7842_SELECT_SDP_YC:
+ state->mode = ADV7842_MODE_SDP;
+ state->vid_std_select = ADV7842_SDP_VID_STD_YC_SD4_x1;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ disable_input(sd);
+ select_input(sd, state->vid_std_select);
+ enable_input(sd);
+
+ v4l2_subdev_notify(sd, ADV7842_FMT_CHANGE, NULL);
+
+ return 0;
+}
+
+static int adv7842_enum_mbus_fmt(struct v4l2_subdev *sd, unsigned int index,
+ enum v4l2_mbus_pixelcode *code)
+{
+ if (index)
+ return -EINVAL;
+ /* Good enough for now */
+ *code = V4L2_MBUS_FMT_FIXED;
+ return 0;
+}
+
+static int adv7842_g_mbus_fmt(struct v4l2_subdev *sd,
+ struct v4l2_mbus_framefmt *fmt)
+{
+ struct adv7842_state *state = to_state(sd);
+
+ fmt->width = state->timings.bt.width;
+ fmt->height = state->timings.bt.height;
+ fmt->code = V4L2_MBUS_FMT_FIXED;
+ fmt->field = V4L2_FIELD_NONE;
+
+ if (state->mode == ADV7842_MODE_SDP) {
+ /* SPD block */
+ if (!(sdp_read(sd, 0x5A) & 0x01))
+ return -EINVAL;
+ fmt->width = 720;
+ /* valid signal */
+ if (state->norm & V4L2_STD_525_60)
+ fmt->height = 480;
+ else
+ fmt->height = 576;
+ fmt->colorspace = V4L2_COLORSPACE_SMPTE170M;
+ return 0;
+ }
+
+ if (state->timings.bt.standards & V4L2_DV_BT_STD_CEA861) {
+ fmt->colorspace = (state->timings.bt.height <= 576) ?
+ V4L2_COLORSPACE_SMPTE170M : V4L2_COLORSPACE_REC709;
+ }
+ return 0;
+}
+
+static void adv7842_irq_enable(struct v4l2_subdev *sd, bool enable)
+{
+ if (enable) {
+ /* Enable SSPD, STDI and CP locked/unlocked interrupts */
+ io_write(sd, 0x46, 0x9c);
+ /* ESDP_50HZ_DET interrupt */
+ io_write(sd, 0x5a, 0x10);
+ /* Enable CABLE_DET_A/B_ST (+5v) interrupt */
+ io_write(sd, 0x73, 0x03);
+ /* Enable V_LOCKED and DE_REGEN_LCK interrupts */
+ io_write(sd, 0x78, 0x03);
+ /* Enable SDP Standard Detection Change and SDP Video Detected */
+ io_write(sd, 0xa0, 0x09);
+ } else {
+ io_write(sd, 0x46, 0x0);
+ io_write(sd, 0x5a, 0x0);
+ io_write(sd, 0x73, 0x0);
+ io_write(sd, 0x78, 0x0);
+ io_write(sd, 0xa0, 0x0);
+ }
+}
+
+static int adv7842_isr(struct v4l2_subdev *sd, u32 status, bool *handled)
+{
+ struct adv7842_state *state = to_state(sd);
+ u8 fmt_change_cp, fmt_change_digital, fmt_change_sdp;
+ u8 irq_status[5];
+ u8 irq_cfg = io_read(sd, 0x40);
+
+ /* disable irq-pin output */
+ io_write(sd, 0x40, irq_cfg | 0x3);
+
+ /* read status */
+ irq_status[0] = io_read(sd, 0x43);
+ irq_status[1] = io_read(sd, 0x57);
+ irq_status[2] = io_read(sd, 0x70);
+ irq_status[3] = io_read(sd, 0x75);
+ irq_status[4] = io_read(sd, 0x9d);
+
+ /* and clear */
+ if (irq_status[0])
+ io_write(sd, 0x44, irq_status[0]);
+ if (irq_status[1])
+ io_write(sd, 0x58, irq_status[1]);
+ if (irq_status[2])
+ io_write(sd, 0x71, irq_status[2]);
+ if (irq_status[3])
+ io_write(sd, 0x76, irq_status[3]);
+ if (irq_status[4])
+ io_write(sd, 0x9e, irq_status[4]);
+
+ v4l2_dbg(1, debug, sd, "%s: irq %x, %x, %x, %x, %x\n", __func__,
+ irq_status[0], irq_status[1], irq_status[2],
+ irq_status[3], irq_status[4]);
+
+ /* format change CP */
+ fmt_change_cp = irq_status[0] & 0x9c;
+
+ /* format change SDP */
+ if (state->mode == ADV7842_MODE_SDP)
+ fmt_change_sdp = (irq_status[1] & 0x30) | (irq_status[4] & 0x09);
+ else
+ fmt_change_sdp = 0;
+
+ /* digital format CP */
+ if (is_digital_input(sd))
+ fmt_change_digital = irq_status[3] & 0x03;
+ else
+ fmt_change_digital = 0;
+
+ /* notify */
+ if (fmt_change_cp || fmt_change_digital || fmt_change_sdp) {
+ v4l2_dbg(1, debug, sd,
+ "%s: fmt_change_cp = 0x%x, fmt_change_digital = 0x%x, fmt_change_sdp = 0x%x\n",
+ __func__, fmt_change_cp, fmt_change_digital,
+ fmt_change_sdp);
+ v4l2_subdev_notify(sd, ADV7842_FMT_CHANGE, NULL);
+ }
+
+ /* 5v cable detect */
+ if (irq_status[2])
+ adv7842_s_detect_tx_5v_ctrl(sd);
+
+ if (handled)
+ *handled = true;
+
+ /* re-enable irq-pin output */
+ io_write(sd, 0x40, irq_cfg);
+
+ return 0;
+}
+
+static int adv7842_set_edid(struct v4l2_subdev *sd, struct v4l2_subdev_edid *e)
+{
+ struct adv7842_state *state = to_state(sd);
+ int err = 0;
+
+ if (e->pad > 2)
+ return -EINVAL;
+ if (e->start_block != 0)
+ return -EINVAL;
+ if (e->blocks > 2)
+ return -E2BIG;
+ if (!e->edid)
+ return -EINVAL;
+
+ /* todo, per edid */
+ state->aspect_ratio = v4l2_calc_aspect_ratio(e->edid[0x15],
+ e->edid[0x16]);
+
+ if (e->pad == 2) {
+ memset(&state->vga_edid.edid, 0, 256);
+ state->vga_edid.present = e->blocks ? 0x1 : 0x0;
+ memcpy(&state->vga_edid.edid, e->edid, 128 * e->blocks);
+ err = edid_write_vga_segment(sd);
+ } else {
+ u32 mask = 0x1<<e->pad;
+ memset(&state->hdmi_edid.edid, 0, 256);
+ if (e->blocks)
+ state->hdmi_edid.present |= mask;
+ else
+ state->hdmi_edid.present &= ~mask;
+ memcpy(&state->hdmi_edid.edid, e->edid, 128*e->blocks);
+ err = edid_write_hdmi_segment(sd, e->pad);
+ }
+ if (err < 0)
+ v4l2_err(sd, "error %d writing edid on port %d\n", err, e->pad);
+ return err;
+}
+
+/*********** avi info frame CEA-861-E **************/
+/* TODO move to common library */
+
+struct avi_info_frame {
+ uint8_t f17;
+ uint8_t y10;
+ uint8_t a0;
+ uint8_t b10;
+ uint8_t s10;
+ uint8_t c10;
+ uint8_t m10;
+ uint8_t r3210;
+ uint8_t itc;
+ uint8_t ec210;
+ uint8_t q10;
+ uint8_t sc10;
+ uint8_t f47;
+ uint8_t vic;
+ uint8_t yq10;
+ uint8_t cn10;
+ uint8_t pr3210;
+ uint16_t etb;
+ uint16_t sbb;
+ uint16_t elb;
+ uint16_t srb;
+};
+
+static const char *y10_txt[4] = {
+ "RGB",
+ "YCbCr 4:2:2",
+ "YCbCr 4:4:4",
+ "Future",
+};
+
+static const char *c10_txt[4] = {
+ "No Data",
+ "SMPTE 170M",
+ "ITU-R 709",
+ "Extended Colorimetry information valied",
+};
+
+static const char *itc_txt[2] = {
+ "No Data",
+ "IT content",
+};
+
+static const char *ec210_txt[8] = {
+ "xvYCC601",
+ "xvYCC709",
+ "sYCC601",
+ "AdobeYCC601",
+ "AdobeRGB",
+ "5 reserved",
+ "6 reserved",
+ "7 reserved",
+};
+
+static const char *q10_txt[4] = {
+ "Default",
+ "Limited Range",
+ "Full Range",
+ "Reserved",
+};
+
+static void parse_avi_infoframe(struct v4l2_subdev *sd, uint8_t *buf,
+ struct avi_info_frame *avi)
+{
+ avi->f17 = (buf[1] >> 7) & 0x1;
+ avi->y10 = (buf[1] >> 5) & 0x3;
+ avi->a0 = (buf[1] >> 4) & 0x1;
+ avi->b10 = (buf[1] >> 2) & 0x3;
+ avi->s10 = buf[1] & 0x3;
+ avi->c10 = (buf[2] >> 6) & 0x3;
+ avi->m10 = (buf[2] >> 4) & 0x3;
+ avi->r3210 = buf[2] & 0xf;
+ avi->itc = (buf[3] >> 7) & 0x1;
+ avi->ec210 = (buf[3] >> 4) & 0x7;
+ avi->q10 = (buf[3] >> 2) & 0x3;
+ avi->sc10 = buf[3] & 0x3;
+ avi->f47 = (buf[4] >> 7) & 0x1;
+ avi->vic = buf[4] & 0x7f;
+ avi->yq10 = (buf[5] >> 6) & 0x3;
+ avi->cn10 = (buf[5] >> 4) & 0x3;
+ avi->pr3210 = buf[5] & 0xf;
+ avi->etb = buf[6] + 256*buf[7];
+ avi->sbb = buf[8] + 256*buf[9];
+ avi->elb = buf[10] + 256*buf[11];
+ avi->srb = buf[12] + 256*buf[13];
+}
+
+static void print_avi_infoframe(struct v4l2_subdev *sd)
+{
+ int i;
+ uint8_t buf[14];
+ uint8_t avi_inf_len;
+ struct avi_info_frame avi;
+
+ if (!(hdmi_read(sd, 0x05) & 0x80)) {
+ v4l2_info(sd, "receive DVI-D signal (AVI infoframe not supported)\n");
+ return;
+ }
+ if (!(io_read(sd, 0x60) & 0x01)) {
+ v4l2_info(sd, "AVI infoframe not received\n");
+ return;
+ }
+
+ if (io_read(sd, 0x88) & 0x10) {
+ /* Note: the ADV7842 calculated incorrect checksums for InfoFrames
+ with a length of 14 or 15. See the ADV7842 Register Settings
+ Recommendations document for more details. */
+ v4l2_info(sd, "AVI infoframe checksum error\n");
+ return;
+ }
+
+ avi_inf_len = infoframe_read(sd, 0xe2);
+ v4l2_info(sd, "AVI infoframe version %d (%d byte)\n",
+ infoframe_read(sd, 0xe1), avi_inf_len);
+
+ if (infoframe_read(sd, 0xe1) != 0x02)
+ return;
+
+ for (i = 0; i < 14; i++)
+ buf[i] = infoframe_read(sd, i);
+
+ v4l2_info(sd, "\t%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
+ buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6], buf[7],
+ buf[8], buf[9], buf[10], buf[11], buf[12], buf[13]);
+
+ parse_avi_infoframe(sd, buf, &avi);
+
+ if (avi.vic)
+ v4l2_info(sd, "\tVIC: %d\n", avi.vic);
+ if (avi.itc)
+ v4l2_info(sd, "\t%s\n", itc_txt[avi.itc]);
+
+ if (avi.y10)
+ v4l2_info(sd, "\t%s %s\n", y10_txt[avi.y10], !avi.c10 ? "" :
+ (avi.c10 == 0x3 ? ec210_txt[avi.ec210] : c10_txt[avi.c10]));
+ else
+ v4l2_info(sd, "\t%s %s\n", y10_txt[avi.y10], q10_txt[avi.q10]);
+}
+
+static const char * const prim_mode_txt[] = {
+ "SDP",
+ "Component",
+ "Graphics",
+ "Reserved",
+ "CVBS & HDMI AUDIO",
+ "HDMI-Comp",
+ "HDMI-GR",
+ "Reserved",
+ "Reserved",
+ "Reserved",
+ "Reserved",
+ "Reserved",
+ "Reserved",
+ "Reserved",
+ "Reserved",
+ "Reserved",
+};
+
+static int adv7842_sdp_log_status(struct v4l2_subdev *sd)
+{
+ /* SDP (Standard definition processor) block */
+ uint8_t sdp_signal_detected = sdp_read(sd, 0x5A) & 0x01;
+
+ v4l2_info(sd, "Chip powered %s\n", no_power(sd) ? "off" : "on");
+ v4l2_info(sd, "Prim-mode = 0x%x, video std = 0x%x\n",
+ io_read(sd, 0x01) & 0x0f, io_read(sd, 0x00) & 0x3f);
+
+ v4l2_info(sd, "SDP: free run: %s\n",
+ (sdp_read(sd, 0x56) & 0x01) ? "on" : "off");
+ v4l2_info(sd, "SDP: %s\n", sdp_signal_detected ?
+ "valid SD/PR signal detected" : "invalid/no signal");
+ if (sdp_signal_detected) {
+ static const char * const sdp_std_txt[] = {
+ "NTSC-M/J",
+ "1?",
+ "NTSC-443",
+ "60HzSECAM",
+ "PAL-M",
+ "5?",
+ "PAL-60",
+ "7?", "8?", "9?", "a?", "b?",
+ "PAL-CombN",
+ "d?",
+ "PAL-BGHID",
+ "SECAM"
+ };
+ v4l2_info(sd, "SDP: standard %s\n",
+ sdp_std_txt[sdp_read(sd, 0x52) & 0x0f]);
+ v4l2_info(sd, "SDP: %s\n",
+ (sdp_read(sd, 0x59) & 0x08) ? "50Hz" : "60Hz");
+ v4l2_info(sd, "SDP: %s\n",
+ (sdp_read(sd, 0x57) & 0x08) ? "Interlaced" : "Progressive");
+ v4l2_info(sd, "SDP: deinterlacer %s\n",
+ (sdp_read(sd, 0x12) & 0x08) ? "enabled" : "disabled");
+ v4l2_info(sd, "SDP: csc %s mode\n",
+ (sdp_io_read(sd, 0xe0) & 0x40) ? "auto" : "manual");
+ }
+ return 0;
+}
+
+static int adv7842_cp_log_status(struct v4l2_subdev *sd)
+{
+ /* CP block */
+ struct adv7842_state *state = to_state(sd);
+ struct v4l2_dv_timings timings;
+ uint8_t reg_io_0x02 = io_read(sd, 0x02);
+ uint8_t reg_io_0x21 = io_read(sd, 0x21);
+ uint8_t reg_rep_0x77 = rep_read(sd, 0x77);
+ uint8_t reg_rep_0x7d = rep_read(sd, 0x7d);
+ bool audio_pll_locked = hdmi_read(sd, 0x04) & 0x01;
+ bool audio_sample_packet_detect = hdmi_read(sd, 0x18) & 0x01;
+ bool audio_mute = io_read(sd, 0x65) & 0x40;
+
+ static const char * const csc_coeff_sel_rb[16] = {
+ "bypassed", "YPbPr601 -> RGB", "reserved", "YPbPr709 -> RGB",
+ "reserved", "RGB -> YPbPr601", "reserved", "RGB -> YPbPr709",
+ "reserved", "YPbPr709 -> YPbPr601", "YPbPr601 -> YPbPr709",
+ "reserved", "reserved", "reserved", "reserved", "manual"
+ };
+ static const char * const input_color_space_txt[16] = {
+ "RGB limited range (16-235)", "RGB full range (0-255)",
+ "YCbCr Bt.601 (16-235)", "YCbCr Bt.709 (16-235)",
+ "XvYCC Bt.601", "XvYCC Bt.709",
+ "YCbCr Bt.601 (0-255)", "YCbCr Bt.709 (0-255)",
+ "invalid", "invalid", "invalid", "invalid", "invalid",
+ "invalid", "invalid", "automatic"
+ };
+ static const char * const rgb_quantization_range_txt[] = {
+ "Automatic",
+ "RGB limited range (16-235)",
+ "RGB full range (0-255)",
+ };
+ static const char * const deep_color_mode_txt[4] = {
+ "8-bits per channel",
+ "10-bits per channel",
+ "12-bits per channel",
+ "16-bits per channel (not supported)"
+ };
+
+ v4l2_info(sd, "-----Chip status-----\n");
+ v4l2_info(sd, "Chip power: %s\n", no_power(sd) ? "off" : "on");
+ v4l2_info(sd, "Connector type: %s\n", state->connector_hdmi ?
+ "HDMI" : (is_digital_input(sd) ? "DVI-D" : "DVI-A"));
+ v4l2_info(sd, "HDMI/DVI-D port selected: %s\n",
+ state->hdmi_port_a ? "A" : "B");
+ v4l2_info(sd, "EDID A %s, B %s\n",
+ ((reg_rep_0x7d & 0x04) && (reg_rep_0x77 & 0x04)) ?
+ "enabled" : "disabled",
+ ((reg_rep_0x7d & 0x08) && (reg_rep_0x77 & 0x08)) ?
+ "enabled" : "disabled");
+ v4l2_info(sd, "HPD A %s, B %s\n",
+ reg_io_0x21 & 0x02 ? "enabled" : "disabled",
+ reg_io_0x21 & 0x01 ? "enabled" : "disabled");
+ v4l2_info(sd, "CEC %s\n", !!(cec_read(sd, 0x2a) & 0x01) ?
+ "enabled" : "disabled");
+
+ v4l2_info(sd, "-----Signal status-----\n");
+ if (state->hdmi_port_a) {
+ v4l2_info(sd, "Cable detected (+5V power): %s\n",
+ io_read(sd, 0x6f) & 0x02 ? "true" : "false");
+ v4l2_info(sd, "TMDS signal detected: %s\n",
+ (io_read(sd, 0x6a) & 0x02) ? "true" : "false");
+ v4l2_info(sd, "TMDS signal locked: %s\n",
+ (io_read(sd, 0x6a) & 0x20) ? "true" : "false");
+ } else {
+ v4l2_info(sd, "Cable detected (+5V power):%s\n",
+ io_read(sd, 0x6f) & 0x01 ? "true" : "false");
+ v4l2_info(sd, "TMDS signal detected: %s\n",
+ (io_read(sd, 0x6a) & 0x01) ? "true" : "false");
+ v4l2_info(sd, "TMDS signal locked: %s\n",
+ (io_read(sd, 0x6a) & 0x10) ? "true" : "false");
+ }
+ v4l2_info(sd, "CP free run: %s\n",
+ (!!(cp_read(sd, 0xff) & 0x10) ? "on" : "off"));
+ v4l2_info(sd, "Prim-mode = 0x%x, video std = 0x%x, v_freq = 0x%x\n",
+ io_read(sd, 0x01) & 0x0f, io_read(sd, 0x00) & 0x3f,
+ (io_read(sd, 0x01) & 0x70) >> 4);
+
+ v4l2_info(sd, "-----Video Timings-----\n");
+ if (no_cp_signal(sd)) {
+ v4l2_info(sd, "STDI: not locked\n");
+ } else {
+ uint32_t bl = ((cp_read(sd, 0xb1) & 0x3f) << 8) | cp_read(sd, 0xb2);
+ uint32_t lcf = ((cp_read(sd, 0xb3) & 0x7) << 8) | cp_read(sd, 0xb4);
+ uint32_t lcvs = cp_read(sd, 0xb3) >> 3;
+ uint32_t fcl = ((cp_read(sd, 0xb8) & 0x1f) << 8) | cp_read(sd, 0xb9);
+ char hs_pol = ((cp_read(sd, 0xb5) & 0x10) ?
+ ((cp_read(sd, 0xb5) & 0x08) ? '+' : '-') : 'x');
+ char vs_pol = ((cp_read(sd, 0xb5) & 0x40) ?
+ ((cp_read(sd, 0xb5) & 0x20) ? '+' : '-') : 'x');
+ v4l2_info(sd,
+ "STDI: lcf (frame height - 1) = %d, bl = %d, lcvs (vsync) = %d, fcl = %d, %s, %chsync, %cvsync\n",
+ lcf, bl, lcvs, fcl,
+ (cp_read(sd, 0xb1) & 0x40) ?
+ "interlaced" : "progressive",
+ hs_pol, vs_pol);
+ }
+ if (adv7842_query_dv_timings(sd, &timings))
+ v4l2_info(sd, "No video detected\n");
+ else
+ v4l2_print_dv_timings(sd->name, "Detected format: ",
+ &timings, true);
+ v4l2_print_dv_timings(sd->name, "Configured format: ",
+ &state->timings, true);
+
+ if (no_cp_signal(sd))
+ return 0;
+
+ v4l2_info(sd, "-----Color space-----\n");
+ v4l2_info(sd, "RGB quantization range ctrl: %s\n",
+ rgb_quantization_range_txt[state->rgb_quantization_range]);
+ v4l2_info(sd, "Input color space: %s\n",
+ input_color_space_txt[reg_io_0x02 >> 4]);
+ v4l2_info(sd, "Output color space: %s %s, saturator %s\n",
+ (reg_io_0x02 & 0x02) ? "RGB" : "YCbCr",
+ (reg_io_0x02 & 0x04) ? "(16-235)" : "(0-255)",
+ ((reg_io_0x02 & 0x04) ^ (reg_io_0x02 & 0x01)) ?
+ "enabled" : "disabled");
+ v4l2_info(sd, "Color space conversion: %s\n",
+ csc_coeff_sel_rb[cp_read(sd, 0xf4) >> 4]);
+
+ if (!is_digital_input(sd))
+ return 0;
+
+ v4l2_info(sd, "-----%s status-----\n", is_hdmi(sd) ? "HDMI" : "DVI-D");
+ v4l2_info(sd, "HDCP encrypted content: %s\n",
+ (hdmi_read(sd, 0x05) & 0x40) ? "true" : "false");
+ v4l2_info(sd, "HDCP keys read: %s%s\n",
+ (hdmi_read(sd, 0x04) & 0x20) ? "yes" : "no",
+ (hdmi_read(sd, 0x04) & 0x10) ? "ERROR" : "");
+ if (!is_hdmi(sd))
+ return 0;
+
+ v4l2_info(sd, "Audio: pll %s, samples %s, %s\n",
+ audio_pll_locked ? "locked" : "not locked",
+ audio_sample_packet_detect ? "detected" : "not detected",
+ audio_mute ? "muted" : "enabled");
+ if (audio_pll_locked && audio_sample_packet_detect) {
+ v4l2_info(sd, "Audio format: %s\n",
+ (hdmi_read(sd, 0x07) & 0x40) ? "multi-channel" : "stereo");
+ }
+ v4l2_info(sd, "Audio CTS: %u\n", (hdmi_read(sd, 0x5b) << 12) +
+ (hdmi_read(sd, 0x5c) << 8) +
+ (hdmi_read(sd, 0x5d) & 0xf0));
+ v4l2_info(sd, "Audio N: %u\n", ((hdmi_read(sd, 0x5d) & 0x0f) << 16) +
+ (hdmi_read(sd, 0x5e) << 8) +
+ hdmi_read(sd, 0x5f));
+ v4l2_info(sd, "AV Mute: %s\n",
+ (hdmi_read(sd, 0x04) & 0x40) ? "on" : "off");
+ v4l2_info(sd, "Deep color mode: %s\n",
+ deep_color_mode_txt[hdmi_read(sd, 0x0b) >> 6]);
+
+ print_avi_infoframe(sd);
+ return 0;
+}
+
+static int adv7842_log_status(struct v4l2_subdev *sd)
+{
+ struct adv7842_state *state = to_state(sd);
+
+ if (state->mode == ADV7842_MODE_SDP)
+ return adv7842_sdp_log_status(sd);
+ return adv7842_cp_log_status(sd);
+}
+
+static int adv7842_querystd(struct v4l2_subdev *sd, v4l2_std_id *std)
+{
+ struct adv7842_state *state = to_state(sd);
+
+ v4l2_dbg(1, debug, sd, "%s:\n", __func__);
+
+ if (state->mode != ADV7842_MODE_SDP)
+ return -ENODATA;
+
+ if (!(sdp_read(sd, 0x5A) & 0x01)) {
+ *std = 0;
+ v4l2_dbg(1, debug, sd, "%s: no valid signal\n", __func__);
+ return 0;
+ }
+
+ switch (sdp_read(sd, 0x52) & 0x0f) {
+ case 0:
+ /* NTSC-M/J */
+ *std &= V4L2_STD_NTSC;
+ break;
+ case 2:
+ /* NTSC-443 */
+ *std &= V4L2_STD_NTSC_443;
+ break;
+ case 3:
+ /* 60HzSECAM */
+ *std &= V4L2_STD_SECAM;
+ break;
+ case 4:
+ /* PAL-M */
+ *std &= V4L2_STD_PAL_M;
+ break;
+ case 6:
+ /* PAL-60 */
+ *std &= V4L2_STD_PAL_60;
+ break;
+ case 0xc:
+ /* PAL-CombN */
+ *std &= V4L2_STD_PAL_Nc;
+ break;
+ case 0xe:
+ /* PAL-BGHID */
+ *std &= V4L2_STD_PAL;
+ break;
+ case 0xf:
+ /* SECAM */
+ *std &= V4L2_STD_SECAM;
+ break;
+ default:
+ *std &= V4L2_STD_ALL;
+ break;
+ }
+ return 0;
+}
+
+static int adv7842_s_std(struct v4l2_subdev *sd, v4l2_std_id norm)
+{
+ struct adv7842_state *state = to_state(sd);
+
+ v4l2_dbg(1, debug, sd, "%s:\n", __func__);
+
+ if (state->mode != ADV7842_MODE_SDP)
+ return -ENODATA;
+
+ if (norm & V4L2_STD_ALL) {
+ state->norm = norm;
+ return 0;
+ }
+ return -EINVAL;
+}
+
+static int adv7842_g_std(struct v4l2_subdev *sd, v4l2_std_id *norm)
+{
+ struct adv7842_state *state = to_state(sd);
+
+ v4l2_dbg(1, debug, sd, "%s:\n", __func__);
+
+ if (state->mode != ADV7842_MODE_SDP)
+ return -ENODATA;
+
+ *norm = state->norm;
+ return 0;
+}
+
+/* ----------------------------------------------------------------------- */
+
+static int adv7842_core_init(struct v4l2_subdev *sd,
+ const struct adv7842_platform_data *pdata)
+{
+ hdmi_write(sd, 0x48,
+ (pdata->disable_pwrdnb ? 0x80 : 0) |
+ (pdata->disable_cable_det_rst ? 0x40 : 0));
+
+ disable_input(sd);
+
+ /* power */
+ io_write(sd, 0x0c, 0x42); /* Power up part and power down VDP */
+ io_write(sd, 0x15, 0x80); /* Power up pads */
+
+ /* video format */
+ io_write(sd, 0x02,
+ pdata->inp_color_space << 4 |
+ pdata->alt_gamma << 3 |
+ pdata->op_656_range << 2 |
+ pdata->rgb_out << 1 |
+ pdata->alt_data_sat << 0);
+ io_write(sd, 0x03, pdata->op_format_sel);
+ io_write_and_or(sd, 0x04, 0x1f, pdata->op_ch_sel << 5);
+ io_write_and_or(sd, 0x05, 0xf0, pdata->blank_data << 3 |
+ pdata->insert_av_codes << 2 |
+ pdata->replicate_av_codes << 1 |
+ pdata->invert_cbcr << 0);
+
+ /* Drive strength */
+ io_write_and_or(sd, 0x14, 0xc0, pdata->drive_strength.data<<4 |
+ pdata->drive_strength.clock<<2 |
+ pdata->drive_strength.sync);
+
+ /* HDMI free run */
+ cp_write(sd, 0xba, (pdata->hdmi_free_run_mode << 1) | 0x01);
+
+ /* TODO from platform data */
+ cp_write(sd, 0x69, 0x14); /* Enable CP CSC */
+ io_write(sd, 0x06, 0xa6); /* positive VS and HS and DE */
+ cp_write(sd, 0xf3, 0xdc); /* Low threshold to enter/exit free run mode */
+ afe_write(sd, 0xb5, 0x01); /* Setting MCLK to 256Fs */
+
+ afe_write(sd, 0x02, pdata->ain_sel); /* Select analog input muxing mode */
+ io_write_and_or(sd, 0x30, ~(1 << 4), pdata->output_bus_lsb_to_msb << 4);
+
+ sdp_csc_coeff(sd, &pdata->sdp_csc_coeff);
+
+ if (pdata->sdp_io_sync.adjust) {
+ const struct adv7842_sdp_io_sync_adjustment *s = &pdata->sdp_io_sync;
+ sdp_io_write(sd, 0x94, (s->hs_beg>>8) & 0xf);
+ sdp_io_write(sd, 0x95, s->hs_beg & 0xff);
+ sdp_io_write(sd, 0x96, (s->hs_width>>8) & 0xf);
+ sdp_io_write(sd, 0x97, s->hs_width & 0xff);
+ sdp_io_write(sd, 0x98, (s->de_beg>>8) & 0xf);
+ sdp_io_write(sd, 0x99, s->de_beg & 0xff);
+ sdp_io_write(sd, 0x9a, (s->de_end>>8) & 0xf);
+ sdp_io_write(sd, 0x9b, s->de_end & 0xff);
+ }
+
+ /* todo, improve settings for sdram */
+ if (pdata->sd_ram_size >= 128) {
+ sdp_write(sd, 0x12, 0x0d); /* Frame TBC,3D comb enabled */
+ if (pdata->sd_ram_ddr) {
+ /* SDP setup for the AD eval board */
+ sdp_io_write(sd, 0x6f, 0x00); /* DDR mode */
+ sdp_io_write(sd, 0x75, 0x0a); /* 128 MB memory size */
+ sdp_io_write(sd, 0x7a, 0xa5); /* Timing Adjustment */
+ sdp_io_write(sd, 0x7b, 0x8f); /* Timing Adjustment */
+ sdp_io_write(sd, 0x60, 0x01); /* SDRAM reset */
+ } else {
+ sdp_io_write(sd, 0x75, 0x0a); /* 64 MB memory size ?*/
+ sdp_io_write(sd, 0x74, 0x00); /* must be zero for sdr sdram */
+ sdp_io_write(sd, 0x79, 0x33); /* CAS latency to 3,
+ depends on memory */
+ sdp_io_write(sd, 0x6f, 0x01); /* SDR mode */
+ sdp_io_write(sd, 0x7a, 0xa5); /* Timing Adjustment */
+ sdp_io_write(sd, 0x7b, 0x8f); /* Timing Adjustment */
+ sdp_io_write(sd, 0x60, 0x01); /* SDRAM reset */
+ }
+ } else {
+ /*
+ * Manual UG-214, rev 0 is bit confusing on this bit
+ * but a '1' disables any signal if the Ram is active.
+ */
+ sdp_io_write(sd, 0x29, 0x10); /* Tristate memory interface */
+ }
+
+ select_input(sd, pdata->vid_std_select);
+
+ enable_input(sd);
+
+ /* disable I2C access to internal EDID ram from HDMI DDC ports */
+ rep_write_and_or(sd, 0x77, 0xf3, 0x00);
+
+ hdmi_write(sd, 0x69, 0xa3); /* HPA manual */
+ /* HPA disable on port A and B */
+ io_write_and_or(sd, 0x20, 0xcf, 0x00);
+
+ /* LLC */
+ /* Set phase to 16. TODO: get this from platform_data */
+ io_write(sd, 0x19, 0x90);
+ io_write(sd, 0x33, 0x40);
+
+ /* interrupts */
+ io_write(sd, 0x40, 0xe2); /* Configure INT1 */
+
+ adv7842_irq_enable(sd, true);
+
+ return v4l2_ctrl_handler_setup(sd->ctrl_handler);
+}
+
+/* ----------------------------------------------------------------------- */
+
+static int adv7842_ddr_ram_test(struct v4l2_subdev *sd)
+{
+ /*
+ * From ADV784x external Memory test.pdf
+ *
+ * Reset must just been performed before running test.
+ * Recommended to reset after test.
+ */
+ int i;
+ int pass = 0;
+ int fail = 0;
+ int complete = 0;
+
+ io_write(sd, 0x00, 0x01); /* Program SDP 4x1 */
+ io_write(sd, 0x01, 0x00); /* Program SDP mode */
+ afe_write(sd, 0x80, 0x92); /* SDP Recommeneded Write */
+ afe_write(sd, 0x9B, 0x01); /* SDP Recommeneded Write ADV7844ES1 */
+ afe_write(sd, 0x9C, 0x60); /* SDP Recommeneded Write ADV7844ES1 */
+ afe_write(sd, 0x9E, 0x02); /* SDP Recommeneded Write ADV7844ES1 */
+ afe_write(sd, 0xA0, 0x0B); /* SDP Recommeneded Write ADV7844ES1 */
+ afe_write(sd, 0xC3, 0x02); /* Memory BIST Initialisation */
+ io_write(sd, 0x0C, 0x40); /* Power up ADV7844 */
+ io_write(sd, 0x15, 0xBA); /* Enable outputs */
+ sdp_write(sd, 0x12, 0x00); /* Disable 3D comb, Frame TBC & 3DNR */
+ io_write(sd, 0xFF, 0x04); /* Reset memory controller */
+
+ mdelay(5);
+
+ sdp_write(sd, 0x12, 0x00); /* Disable 3D Comb, Frame TBC & 3DNR */
+ sdp_io_write(sd, 0x2A, 0x01); /* Memory BIST Initialisation */
+ sdp_io_write(sd, 0x7c, 0x19); /* Memory BIST Initialisation */
+ sdp_io_write(sd, 0x80, 0x87); /* Memory BIST Initialisation */
+ sdp_io_write(sd, 0x81, 0x4a); /* Memory BIST Initialisation */
+ sdp_io_write(sd, 0x82, 0x2c); /* Memory BIST Initialisation */
+ sdp_io_write(sd, 0x83, 0x0e); /* Memory BIST Initialisation */
+ sdp_io_write(sd, 0x84, 0x94); /* Memory BIST Initialisation */
+ sdp_io_write(sd, 0x85, 0x62); /* Memory BIST Initialisation */
+ sdp_io_write(sd, 0x7d, 0x00); /* Memory BIST Initialisation */
+ sdp_io_write(sd, 0x7e, 0x1a); /* Memory BIST Initialisation */
+
+ mdelay(5);
+
+ sdp_io_write(sd, 0xd9, 0xd5); /* Enable BIST Test */
+ sdp_write(sd, 0x12, 0x05); /* Enable FRAME TBC & 3D COMB */
+
+ mdelay(20);
+
+ for (i = 0; i < 10; i++) {
+ u8 result = sdp_io_read(sd, 0xdb);
+ if (result & 0x10) {
+ complete++;
+ if (result & 0x20)
+ fail++;
+ else
+ pass++;
+ }
+ mdelay(20);
+ }
+
+ v4l2_dbg(1, debug, sd,
+ "Ram Test: completed %d of %d: pass %d, fail %d\n",
+ complete, i, pass, fail);
+
+ if (!complete || fail)
+ return -EIO;
+ return 0;
+}
+
+static void adv7842_rewrite_i2c_addresses(struct v4l2_subdev *sd,
+ struct adv7842_platform_data *pdata)
+{
+ io_write(sd, 0xf1, pdata->i2c_sdp << 1);
+ io_write(sd, 0xf2, pdata->i2c_sdp_io << 1);
+ io_write(sd, 0xf3, pdata->i2c_avlink << 1);
+ io_write(sd, 0xf4, pdata->i2c_cec << 1);
+ io_write(sd, 0xf5, pdata->i2c_infoframe << 1);
+
+ io_write(sd, 0xf8, pdata->i2c_afe << 1);
+ io_write(sd, 0xf9, pdata->i2c_repeater << 1);
+ io_write(sd, 0xfa, pdata->i2c_edid << 1);
+ io_write(sd, 0xfb, pdata->i2c_hdmi << 1);
+
+ io_write(sd, 0xfd, pdata->i2c_cp << 1);
+ io_write(sd, 0xfe, pdata->i2c_vdp << 1);
+}
+
+static int adv7842_command_ram_test(struct v4l2_subdev *sd)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ struct adv7842_state *state = to_state(sd);
+ struct adv7842_platform_data *pdata = client->dev.platform_data;
+ int ret = 0;
+
+ if (!pdata)
+ return -ENODEV;
+
+ if (!pdata->sd_ram_size || !pdata->sd_ram_ddr) {
+ v4l2_info(sd, "no sdram or no ddr sdram\n");
+ return -EINVAL;
+ }
+
+ main_reset(sd);
+
+ adv7842_rewrite_i2c_addresses(sd, pdata);
+
+ /* run ram test */
+ ret = adv7842_ddr_ram_test(sd);
+
+ main_reset(sd);
+
+ adv7842_rewrite_i2c_addresses(sd, pdata);
+
+ /* and re-init chip and state */
+ adv7842_core_init(sd, pdata);
+
+ disable_input(sd);
+
+ select_input(sd, state->vid_std_select);
+
+ enable_input(sd);
+
+ adv7842_s_dv_timings(sd, &state->timings);
+
+ edid_write_vga_segment(sd);
+ edid_write_hdmi_segment(sd, 0);
+ edid_write_hdmi_segment(sd, 1);
+
+ return ret;
+}
+
+static long adv7842_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
+{
+ switch (cmd) {
+ case ADV7842_CMD_RAM_TEST:
+ return adv7842_command_ram_test(sd);
+ }
+ return -ENOTTY;
+}
+
+/* ----------------------------------------------------------------------- */
+
+static const struct v4l2_ctrl_ops adv7842_ctrl_ops = {
+ .s_ctrl = adv7842_s_ctrl,
+};
+
+static const struct v4l2_subdev_core_ops adv7842_core_ops = {
+ .log_status = adv7842_log_status,
+ .g_std = adv7842_g_std,
+ .s_std = adv7842_s_std,
+ .ioctl = adv7842_ioctl,
+ .interrupt_service_routine = adv7842_isr,
+#ifdef CONFIG_VIDEO_ADV_DEBUG
+ .g_register = adv7842_g_register,
+ .s_register = adv7842_s_register,
+#endif
+};
+
+static const struct v4l2_subdev_video_ops adv7842_video_ops = {
+ .s_routing = adv7842_s_routing,
+ .querystd = adv7842_querystd,
+ .g_input_status = adv7842_g_input_status,
+ .s_dv_timings = adv7842_s_dv_timings,
+ .g_dv_timings = adv7842_g_dv_timings,
+ .query_dv_timings = adv7842_query_dv_timings,
+ .enum_dv_timings = adv7842_enum_dv_timings,
+ .dv_timings_cap = adv7842_dv_timings_cap,
+ .enum_mbus_fmt = adv7842_enum_mbus_fmt,
+ .g_mbus_fmt = adv7842_g_mbus_fmt,
+ .try_mbus_fmt = adv7842_g_mbus_fmt,
+ .s_mbus_fmt = adv7842_g_mbus_fmt,
+};
+
+static const struct v4l2_subdev_pad_ops adv7842_pad_ops = {
+ .set_edid = adv7842_set_edid,
+};
+
+static const struct v4l2_subdev_ops adv7842_ops = {
+ .core = &adv7842_core_ops,
+ .video = &adv7842_video_ops,
+ .pad = &adv7842_pad_ops,
+};
+
+/* -------------------------- custom ctrls ---------------------------------- */
+
+static const struct v4l2_ctrl_config adv7842_ctrl_analog_sampling_phase = {
+ .ops = &adv7842_ctrl_ops,
+ .id = V4L2_CID_ADV_RX_ANALOG_SAMPLING_PHASE,
+ .name = "Analog Sampling Phase",
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .min = 0,
+ .max = 0x1f,
+ .step = 1,
+ .def = 0,
+};
+
+static const struct v4l2_ctrl_config adv7842_ctrl_free_run_color_manual = {
+ .ops = &adv7842_ctrl_ops,
+ .id = V4L2_CID_ADV_RX_FREE_RUN_COLOR_MANUAL,
+ .name = "Free Running Color, Manual",
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .max = 1,
+ .step = 1,
+ .def = 1,
+};
+
+static const struct v4l2_ctrl_config adv7842_ctrl_free_run_color = {
+ .ops = &adv7842_ctrl_ops,
+ .id = V4L2_CID_ADV_RX_FREE_RUN_COLOR,
+ .name = "Free Running Color",
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .max = 0xffffff,
+ .step = 0x1,
+};
+
+
+static void adv7842_unregister_clients(struct adv7842_state *state)
+{
+ if (state->i2c_avlink)
+ i2c_unregister_device(state->i2c_avlink);
+ if (state->i2c_cec)
+ i2c_unregister_device(state->i2c_cec);
+ if (state->i2c_infoframe)
+ i2c_unregister_device(state->i2c_infoframe);
+ if (state->i2c_sdp_io)
+ i2c_unregister_device(state->i2c_sdp_io);
+ if (state->i2c_sdp)
+ i2c_unregister_device(state->i2c_sdp);
+ if (state->i2c_afe)
+ i2c_unregister_device(state->i2c_afe);
+ if (state->i2c_repeater)
+ i2c_unregister_device(state->i2c_repeater);
+ if (state->i2c_edid)
+ i2c_unregister_device(state->i2c_edid);
+ if (state->i2c_hdmi)
+ i2c_unregister_device(state->i2c_hdmi);
+ if (state->i2c_cp)
+ i2c_unregister_device(state->i2c_cp);
+ if (state->i2c_vdp)
+ i2c_unregister_device(state->i2c_vdp);
+}
+
+static struct i2c_client *adv7842_dummy_client(struct v4l2_subdev *sd,
+ u8 addr, u8 io_reg)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+
+ io_write(sd, io_reg, addr << 1);
+ return i2c_new_dummy(client->adapter, io_read(sd, io_reg) >> 1);
+}
+
+static int adv7842_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct adv7842_state *state;
+ struct adv7842_platform_data *pdata = client->dev.platform_data;
+ struct v4l2_ctrl_handler *hdl;
+ struct v4l2_subdev *sd;
+ u16 rev;
+ int err;
+
+ /* Check if the adapter supports the needed features */
+ if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
+ return -EIO;
+
+ v4l_dbg(1, debug, client, "detecting adv7842 client on address 0x%x\n",
+ client->addr << 1);
+
+ if (!pdata) {
+ v4l_err(client, "No platform data!\n");
+ return -ENODEV;
+ }
+
+ state = devm_kzalloc(&client->dev, sizeof(struct adv7842_state), GFP_KERNEL);
+ if (!state) {
+ v4l_err(client, "Could not allocate adv7842_state memory!\n");
+ return -ENOMEM;
+ }
+
+ sd = &state->sd;
+ v4l2_i2c_subdev_init(sd, client, &adv7842_ops);
+ sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
+ state->connector_hdmi = pdata->connector_hdmi;
+ state->mode = pdata->mode;
+
+ state->hdmi_port_a = true;
+
+ /* i2c access to adv7842? */
+ rev = adv_smbus_read_byte_data_check(client, 0xea, false) << 8 |
+ adv_smbus_read_byte_data_check(client, 0xeb, false);
+ if (rev != 0x2012) {
+ v4l2_info(sd, "got rev=0x%04x on first read attempt\n", rev);
+ rev = adv_smbus_read_byte_data_check(client, 0xea, false) << 8 |
+ adv_smbus_read_byte_data_check(client, 0xeb, false);
+ }
+ if (rev != 0x2012) {
+ v4l2_info(sd, "not an adv7842 on address 0x%x (rev=0x%04x)\n",
+ client->addr << 1, rev);
+ return -ENODEV;
+ }
+
+ if (pdata->chip_reset)
+ main_reset(sd);
+
+ /* control handlers */
+ hdl = &state->hdl;
+ v4l2_ctrl_handler_init(hdl, 6);
+
+ /* add in ascending ID order */
+ v4l2_ctrl_new_std(hdl, &adv7842_ctrl_ops,
+ V4L2_CID_BRIGHTNESS, -128, 127, 1, 0);
+ v4l2_ctrl_new_std(hdl, &adv7842_ctrl_ops,
+ V4L2_CID_CONTRAST, 0, 255, 1, 128);
+ v4l2_ctrl_new_std(hdl, &adv7842_ctrl_ops,
+ V4L2_CID_SATURATION, 0, 255, 1, 128);
+ v4l2_ctrl_new_std(hdl, &adv7842_ctrl_ops,
+ V4L2_CID_HUE, 0, 128, 1, 0);
+
+ /* custom controls */
+ state->detect_tx_5v_ctrl = v4l2_ctrl_new_std(hdl, NULL,
+ V4L2_CID_DV_RX_POWER_PRESENT, 0, 3, 0, 0);
+ state->analog_sampling_phase_ctrl = v4l2_ctrl_new_custom(hdl,
+ &adv7842_ctrl_analog_sampling_phase, NULL);
+ state->free_run_color_ctrl_manual = v4l2_ctrl_new_custom(hdl,
+ &adv7842_ctrl_free_run_color_manual, NULL);
+ state->free_run_color_ctrl = v4l2_ctrl_new_custom(hdl,
+ &adv7842_ctrl_free_run_color, NULL);
+ state->rgb_quantization_range_ctrl =
+ v4l2_ctrl_new_std_menu(hdl, &adv7842_ctrl_ops,
+ V4L2_CID_DV_RX_RGB_RANGE, V4L2_DV_RGB_RANGE_FULL,
+ 0, V4L2_DV_RGB_RANGE_AUTO);
+ sd->ctrl_handler = hdl;
+ if (hdl->error) {
+ err = hdl->error;
+ goto err_hdl;
+ }
+ state->detect_tx_5v_ctrl->is_private = true;
+ state->rgb_quantization_range_ctrl->is_private = true;
+ state->analog_sampling_phase_ctrl->is_private = true;
+ state->free_run_color_ctrl_manual->is_private = true;
+ state->free_run_color_ctrl->is_private = true;
+
+ if (adv7842_s_detect_tx_5v_ctrl(sd)) {
+ err = -ENODEV;
+ goto err_hdl;
+ }
+
+ state->i2c_avlink = adv7842_dummy_client(sd, pdata->i2c_avlink, 0xf3);
+ state->i2c_cec = adv7842_dummy_client(sd, pdata->i2c_cec, 0xf4);
+ state->i2c_infoframe = adv7842_dummy_client(sd, pdata->i2c_infoframe, 0xf5);
+ state->i2c_sdp_io = adv7842_dummy_client(sd, pdata->i2c_sdp_io, 0xf2);
+ state->i2c_sdp = adv7842_dummy_client(sd, pdata->i2c_sdp, 0xf1);
+ state->i2c_afe = adv7842_dummy_client(sd, pdata->i2c_afe, 0xf8);
+ state->i2c_repeater = adv7842_dummy_client(sd, pdata->i2c_repeater, 0xf9);
+ state->i2c_edid = adv7842_dummy_client(sd, pdata->i2c_edid, 0xfa);
+ state->i2c_hdmi = adv7842_dummy_client(sd, pdata->i2c_hdmi, 0xfb);
+ state->i2c_cp = adv7842_dummy_client(sd, pdata->i2c_cp, 0xfd);
+ state->i2c_vdp = adv7842_dummy_client(sd, pdata->i2c_vdp, 0xfe);
+ if (!state->i2c_avlink || !state->i2c_cec || !state->i2c_infoframe ||
+ !state->i2c_sdp_io || !state->i2c_sdp || !state->i2c_afe ||
+ !state->i2c_repeater || !state->i2c_edid || !state->i2c_hdmi ||
+ !state->i2c_cp || !state->i2c_vdp) {
+ err = -ENOMEM;
+ v4l2_err(sd, "failed to create all i2c clients\n");
+ goto err_i2c;
+ }
+
+ /* work queues */
+ state->work_queues = create_singlethread_workqueue(client->name);
+ if (!state->work_queues) {
+ v4l2_err(sd, "Could not create work queue\n");
+ err = -ENOMEM;
+ goto err_i2c;
+ }
+
+ INIT_DELAYED_WORK(&state->delayed_work_enable_hotplug,
+ adv7842_delayed_work_enable_hotplug);
+
+ state->pad.flags = MEDIA_PAD_FL_SOURCE;
+ err = media_entity_init(&sd->entity, 1, &state->pad, 0);
+ if (err)
+ goto err_work_queues;
+
+ err = adv7842_core_init(sd, pdata);
+ if (err)
+ goto err_entity;
+
+ v4l2_info(sd, "%s found @ 0x%x (%s)\n", client->name,
+ client->addr << 1, client->adapter->name);
+ return 0;
+
+err_entity:
+ media_entity_cleanup(&sd->entity);
+err_work_queues:
+ cancel_delayed_work(&state->delayed_work_enable_hotplug);
+ destroy_workqueue(state->work_queues);
+err_i2c:
+ adv7842_unregister_clients(state);
+err_hdl:
+ v4l2_ctrl_handler_free(hdl);
+ return err;
+}
+
+/* ----------------------------------------------------------------------- */
+
+static int adv7842_remove(struct i2c_client *client)
+{
+ struct v4l2_subdev *sd = i2c_get_clientdata(client);
+ struct adv7842_state *state = to_state(sd);
+
+ adv7842_irq_enable(sd, false);
+
+ cancel_delayed_work(&state->delayed_work_enable_hotplug);
+ destroy_workqueue(state->work_queues);
+ v4l2_device_unregister_subdev(sd);
+ media_entity_cleanup(&sd->entity);
+ adv7842_unregister_clients(to_state(sd));
+ v4l2_ctrl_handler_free(sd->ctrl_handler);
+ return 0;
+}
+
+/* ----------------------------------------------------------------------- */
+
+static struct i2c_device_id adv7842_id[] = {
+ { "adv7842", 0 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, adv7842_id);
+
+/* ----------------------------------------------------------------------- */
+
+static struct i2c_driver adv7842_driver = {
+ .driver = {
+ .owner = THIS_MODULE,
+ .name = "adv7842",
+ },
+ .probe = adv7842_probe,
+ .remove = adv7842_remove,
+ .id_table = adv7842_id,
+};
+
+module_i2c_driver(adv7842_driver);
diff --git a/include/media/adv7842.h b/include/media/adv7842.h
new file mode 100644
index 00000000000..c02201d1c09
--- /dev/null
+++ b/include/media/adv7842.h
@@ -0,0 +1,226 @@
+/*
+ * adv7842 - Analog Devices ADV7842 video decoder driver
+ *
+ * Copyright 2013 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
+ *
+ * This program is free software; you may redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ */
+
+#ifndef _ADV7842_
+#define _ADV7842_
+
+/* Analog input muxing modes (AFE register 0x02, [2:0]) */
+enum adv7842_ain_sel {
+ ADV7842_AIN1_2_3_NC_SYNC_1_2 = 0,
+ ADV7842_AIN4_5_6_NC_SYNC_2_1 = 1,
+ ADV7842_AIN7_8_9_NC_SYNC_3_1 = 2,
+ ADV7842_AIN10_11_12_NC_SYNC_4_1 = 3,
+ ADV7842_AIN9_4_5_6_SYNC_2_1 = 4,
+};
+
+/* Bus rotation and reordering (IO register 0x04, [7:5]) */
+enum adv7842_op_ch_sel {
+ ADV7842_OP_CH_SEL_GBR = 0,
+ ADV7842_OP_CH_SEL_GRB = 1,
+ ADV7842_OP_CH_SEL_BGR = 2,
+ ADV7842_OP_CH_SEL_RGB = 3,
+ ADV7842_OP_CH_SEL_BRG = 4,
+ ADV7842_OP_CH_SEL_RBG = 5,
+};
+
+/* Mode of operation */
+enum adv7842_mode {
+ ADV7842_MODE_SDP,
+ ADV7842_MODE_COMP,
+ ADV7842_MODE_RGB,
+ ADV7842_MODE_HDMI
+};
+
+/* Video standard select (IO register 0x00, [5:0]) */
+enum adv7842_vid_std_select {
+ /* SDP */
+ ADV7842_SDP_VID_STD_CVBS_SD_4x1 = 0x01,
+ ADV7842_SDP_VID_STD_YC_SD4_x1 = 0x09,
+ /* RGB */
+ ADV7842_RGB_VID_STD_AUTO_GRAPH_MODE = 0x07,
+ /* HDMI GR */
+ ADV7842_HDMI_GR_VID_STD_AUTO_GRAPH_MODE = 0x02,
+ /* HDMI COMP */
+ ADV7842_HDMI_COMP_VID_STD_HD_1250P = 0x1e,
+};
+
+/* Input Color Space (IO register 0x02, [7:4]) */
+enum adv7842_inp_color_space {
+ ADV7842_INP_COLOR_SPACE_LIM_RGB = 0,
+ ADV7842_INP_COLOR_SPACE_FULL_RGB = 1,
+ ADV7842_INP_COLOR_SPACE_LIM_YCbCr_601 = 2,
+ ADV7842_INP_COLOR_SPACE_LIM_YCbCr_709 = 3,
+ ADV7842_INP_COLOR_SPACE_XVYCC_601 = 4,
+ ADV7842_INP_COLOR_SPACE_XVYCC_709 = 5,
+ ADV7842_INP_COLOR_SPACE_FULL_YCbCr_601 = 6,
+ ADV7842_INP_COLOR_SPACE_FULL_YCbCr_709 = 7,
+ ADV7842_INP_COLOR_SPACE_AUTO = 0xf,
+};
+
+/* Select output format (IO register 0x03, [7:0]) */
+enum adv7842_op_format_sel {
+ ADV7842_OP_FORMAT_SEL_SDR_ITU656_8 = 0x00,
+ ADV7842_OP_FORMAT_SEL_SDR_ITU656_10 = 0x01,
+ ADV7842_OP_FORMAT_SEL_SDR_ITU656_12_MODE0 = 0x02,
+ ADV7842_OP_FORMAT_SEL_SDR_ITU656_12_MODE1 = 0x06,
+ ADV7842_OP_FORMAT_SEL_SDR_ITU656_12_MODE2 = 0x0a,
+ ADV7842_OP_FORMAT_SEL_DDR_422_8 = 0x20,
+ ADV7842_OP_FORMAT_SEL_DDR_422_10 = 0x21,
+ ADV7842_OP_FORMAT_SEL_DDR_422_12_MODE0 = 0x22,
+ ADV7842_OP_FORMAT_SEL_DDR_422_12_MODE1 = 0x23,
+ ADV7842_OP_FORMAT_SEL_DDR_422_12_MODE2 = 0x24,
+ ADV7842_OP_FORMAT_SEL_SDR_444_24 = 0x40,
+ ADV7842_OP_FORMAT_SEL_SDR_444_30 = 0x41,
+ ADV7842_OP_FORMAT_SEL_SDR_444_36_MODE0 = 0x42,
+ ADV7842_OP_FORMAT_SEL_DDR_444_24 = 0x60,
+ ADV7842_OP_FORMAT_SEL_DDR_444_30 = 0x61,
+ ADV7842_OP_FORMAT_SEL_DDR_444_36 = 0x62,
+ ADV7842_OP_FORMAT_SEL_SDR_ITU656_16 = 0x80,
+ ADV7842_OP_FORMAT_SEL_SDR_ITU656_20 = 0x81,
+ ADV7842_OP_FORMAT_SEL_SDR_ITU656_24_MODE0 = 0x82,
+ ADV7842_OP_FORMAT_SEL_SDR_ITU656_24_MODE1 = 0x86,
+ ADV7842_OP_FORMAT_SEL_SDR_ITU656_24_MODE2 = 0x8a,
+};
+
+enum adv7842_select_input {
+ ADV7842_SELECT_HDMI_PORT_A,
+ ADV7842_SELECT_HDMI_PORT_B,
+ ADV7842_SELECT_VGA_RGB,
+ ADV7842_SELECT_VGA_COMP,
+ ADV7842_SELECT_SDP_CVBS,
+ ADV7842_SELECT_SDP_YC,
+};
+
+struct adv7842_sdp_csc_coeff {
+ bool manual;
+ uint16_t scaling;
+ uint16_t A1;
+ uint16_t A2;
+ uint16_t A3;
+ uint16_t A4;
+ uint16_t B1;
+ uint16_t B2;
+ uint16_t B3;
+ uint16_t B4;
+ uint16_t C1;
+ uint16_t C2;
+ uint16_t C3;
+ uint16_t C4;
+};
+
+struct adv7842_sdp_io_sync_adjustment {
+ bool adjust;
+ uint16_t hs_beg;
+ uint16_t hs_width;
+ uint16_t de_beg;
+ uint16_t de_end;
+};
+
+/* Platform dependent definition */
+struct adv7842_platform_data {
+ /* connector - HDMI or DVI? */
+ unsigned connector_hdmi:1;
+
+ /* chip reset during probe */
+ unsigned chip_reset:1;
+
+ /* DIS_PWRDNB: 1 if the PWRDNB pin is unused and unconnected */
+ unsigned disable_pwrdnb:1;
+
+ /* DIS_CABLE_DET_RST: 1 if the 5V pins are unused and unconnected */
+ unsigned disable_cable_det_rst:1;
+
+ /* Analog input muxing mode */
+ enum adv7842_ain_sel ain_sel;
+
+ /* Bus rotation and reordering */
+ enum adv7842_op_ch_sel op_ch_sel;
+
+ /* Default mode */
+ enum adv7842_mode mode;
+
+ /* Video standard */
+ enum adv7842_vid_std_select vid_std_select;
+
+ /* Input Color Space */
+ enum adv7842_inp_color_space inp_color_space;
+
+ /* Select output format */
+ enum adv7842_op_format_sel op_format_sel;
+
+ /* IO register 0x02 */
+ unsigned alt_gamma:1;
+ unsigned op_656_range:1;
+ unsigned rgb_out:1;
+ unsigned alt_data_sat:1;
+
+ /* IO register 0x05 */
+ unsigned blank_data:1;
+ unsigned insert_av_codes:1;
+ unsigned replicate_av_codes:1;
+ unsigned invert_cbcr:1;
+
+ /* IO register 0x30 */
+ unsigned output_bus_lsb_to_msb:1;
+
+ /* IO register 0x14 */
+ struct {
+ unsigned data:2;
+ unsigned clock:2;
+ unsigned sync:2;
+ } drive_strength;
+
+ /* External RAM for 3-D comb or frame synchronizer */
+ unsigned sd_ram_size; /* ram size in MB */
+ unsigned sd_ram_ddr:1; /* ddr or sdr sdram */
+
+ /* Free run */
+ unsigned hdmi_free_run_mode;
+
+ struct adv7842_sdp_csc_coeff sdp_csc_coeff;
+
+ struct adv7842_sdp_io_sync_adjustment sdp_io_sync;
+
+ /* i2c addresses */
+ u8 i2c_sdp_io;
+ u8 i2c_sdp;
+ u8 i2c_cp;
+ u8 i2c_vdp;
+ u8 i2c_afe;
+ u8 i2c_hdmi;
+ u8 i2c_repeater;
+ u8 i2c_edid;
+ u8 i2c_infoframe;
+ u8 i2c_cec;
+ u8 i2c_avlink;
+};
+
+#define V4L2_CID_ADV_RX_ANALOG_SAMPLING_PHASE (V4L2_CID_DV_CLASS_BASE + 0x1000)
+#define V4L2_CID_ADV_RX_FREE_RUN_COLOR_MANUAL (V4L2_CID_DV_CLASS_BASE + 0x1001)
+#define V4L2_CID_ADV_RX_FREE_RUN_COLOR (V4L2_CID_DV_CLASS_BASE + 0x1002)
+
+/* notify events */
+#define ADV7842_FMT_CHANGE 1
+
+/* custom ioctl, used to test the external RAM that's used by the
+ * deinterlacer. */
+#define ADV7842_CMD_RAM_TEST _IO('V', BASE_VIDIOC_PRIVATE)
+
+#endif
--
cgit v1.2.3-70-g09d2
From 5a544cce2177fe361ba539db9ddaf1eff4e73f81 Mon Sep 17 00:00:00 2001
From: Hans Verkuil <hans.verkuil@cisco.com>
Date: Fri, 23 Aug 2013 09:12:36 -0300
Subject: [media] adv7511: add new video encoder
This is an Analog Devices HDMI transmitter.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/Kconfig | 11 +
drivers/media/i2c/Makefile | 1 +
drivers/media/i2c/adv7511.c | 1198 +++++++++++++++++++++++++++++++++++++++++++
include/media/adv7511.h | 48 ++
4 files changed, 1258 insertions(+)
create mode 100644 drivers/media/i2c/adv7511.c
create mode 100644 include/media/adv7511.h
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig
index 847b7113f70..d18be19c96c 100644
--- a/drivers/media/i2c/Kconfig
+++ b/drivers/media/i2c/Kconfig
@@ -429,6 +429,17 @@ config VIDEO_ADV7393
To compile this driver as a module, choose M here: the
module will be called adv7393.
+config VIDEO_ADV7511
+ tristate "Analog Devices ADV7511 encoder"
+ depends on VIDEO_V4L2 && I2C && VIDEO_V4L2_SUBDEV_API
+ ---help---
+ Support for the Analog Devices ADV7511 video encoder.
+
+ This is a Analog Devices HDMI transmitter.
+
+ To compile this driver as a module, choose M here: the
+ module will be called adv7511.
+
config VIDEO_AD9389B
tristate "Analog Devices AD9389B encoder"
depends on VIDEO_V4L2 && I2C && VIDEO_V4L2_SUBDEV_API
diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile
index b4cf972703d..9f462df77b4 100644
--- a/drivers/media/i2c/Makefile
+++ b/drivers/media/i2c/Makefile
@@ -28,6 +28,7 @@ obj-$(CONFIG_VIDEO_ADV7393) += adv7393.o
obj-$(CONFIG_VIDEO_ADV7604) += adv7604.o
obj-$(CONFIG_VIDEO_ADV7842) += adv7842.o
obj-$(CONFIG_VIDEO_AD9389B) += ad9389b.o
+obj-$(CONFIG_VIDEO_ADV7511) += adv7511.o
obj-$(CONFIG_VIDEO_VPX3220) += vpx3220.o
obj-$(CONFIG_VIDEO_VS6624) += vs6624.o
obj-$(CONFIG_VIDEO_BT819) += bt819.o
diff --git a/drivers/media/i2c/adv7511.c b/drivers/media/i2c/adv7511.c
new file mode 100644
index 00000000000..7a576097471
--- /dev/null
+++ b/drivers/media/i2c/adv7511.c
@@ -0,0 +1,1198 @@
+/*
+ * Analog Devices ADV7511 HDMI Transmitter Device Driver
+ *
+ * Copyright 2013 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
+ *
+ * This program is free software; you may redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/i2c.h>
+#include <linux/delay.h>
+#include <linux/videodev2.h>
+#include <linux/gpio.h>
+#include <linux/workqueue.h>
+#include <linux/v4l2-dv-timings.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-common.h>
+#include <media/v4l2-ctrls.h>
+#include <media/v4l2-dv-timings.h>
+#include <media/adv7511.h>
+
+static int debug;
+module_param(debug, int, 0644);
+MODULE_PARM_DESC(debug, "debug level (0-2)");
+
+MODULE_DESCRIPTION("Analog Devices ADV7511 HDMI Transmitter Device Driver");
+MODULE_AUTHOR("Hans Verkuil");
+MODULE_LICENSE("GPL");
+
+#define MASK_ADV7511_EDID_RDY_INT 0x04
+#define MASK_ADV7511_MSEN_INT 0x40
+#define MASK_ADV7511_HPD_INT 0x80
+
+#define MASK_ADV7511_HPD_DETECT 0x40
+#define MASK_ADV7511_MSEN_DETECT 0x20
+#define MASK_ADV7511_EDID_RDY 0x10
+
+#define EDID_MAX_RETRIES (8)
+#define EDID_DELAY 250
+#define EDID_MAX_SEGM 8
+
+#define ADV7511_MAX_WIDTH 1920
+#define ADV7511_MAX_HEIGHT 1200
+#define ADV7511_MIN_PIXELCLOCK 20000000
+#define ADV7511_MAX_PIXELCLOCK 225000000
+
+/*
+**********************************************************************
+*
+* Arrays with configuration parameters for the ADV7511
+*
+**********************************************************************
+*/
+
+struct i2c_reg_value {
+ unsigned char reg;
+ unsigned char value;
+};
+
+struct adv7511_state_edid {
+ /* total number of blocks */
+ u32 blocks;
+ /* Number of segments read */
+ u32 segments;
+ uint8_t data[EDID_MAX_SEGM * 256];
+ /* Number of EDID read retries left */
+ unsigned read_retries;
+ bool complete;
+};
+
+struct adv7511_state {
+ struct adv7511_platform_data pdata;
+ struct v4l2_subdev sd;
+ struct media_pad pad;
+ struct v4l2_ctrl_handler hdl;
+ int chip_revision;
+ uint8_t i2c_edid_addr;
+ uint8_t i2c_cec_addr;
+ /* Is the adv7511 powered on? */
+ bool power_on;
+ /* Did we receive hotplug and rx-sense signals? */
+ bool have_monitor;
+ /* timings from s_dv_timings */
+ struct v4l2_dv_timings dv_timings;
+ /* controls */
+ struct v4l2_ctrl *hdmi_mode_ctrl;
+ struct v4l2_ctrl *hotplug_ctrl;
+ struct v4l2_ctrl *rx_sense_ctrl;
+ struct v4l2_ctrl *have_edid0_ctrl;
+ struct v4l2_ctrl *rgb_quantization_range_ctrl;
+ struct i2c_client *i2c_edid;
+ struct adv7511_state_edid edid;
+ /* Running counter of the number of detected EDIDs (for debugging) */
+ unsigned edid_detect_counter;
+ struct workqueue_struct *work_queue;
+ struct delayed_work edid_handler; /* work entry */
+};
+
+static void adv7511_check_monitor_present_status(struct v4l2_subdev *sd);
+static bool adv7511_check_edid_status(struct v4l2_subdev *sd);
+static void adv7511_setup(struct v4l2_subdev *sd);
+static int adv7511_s_i2s_clock_freq(struct v4l2_subdev *sd, u32 freq);
+static int adv7511_s_clock_freq(struct v4l2_subdev *sd, u32 freq);
+
+
+static const struct v4l2_dv_timings_cap adv7511_timings_cap = {
+ .type = V4L2_DV_BT_656_1120,
+ .bt = {
+ .max_width = ADV7511_MAX_WIDTH,
+ .max_height = ADV7511_MAX_HEIGHT,
+ .min_pixelclock = ADV7511_MIN_PIXELCLOCK,
+ .max_pixelclock = ADV7511_MAX_PIXELCLOCK,
+ .standards = V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
+ V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
+ .capabilities = V4L2_DV_BT_CAP_PROGRESSIVE |
+ V4L2_DV_BT_CAP_REDUCED_BLANKING | V4L2_DV_BT_CAP_CUSTOM,
+ },
+};
+
+static inline struct adv7511_state *get_adv7511_state(struct v4l2_subdev *sd)
+{
+ return container_of(sd, struct adv7511_state, sd);
+}
+
+static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
+{
+ return &container_of(ctrl->handler, struct adv7511_state, hdl)->sd;
+}
+
+/* ------------------------ I2C ----------------------------------------------- */
+
+static s32 adv_smbus_read_byte_data_check(struct i2c_client *client,
+ u8 command, bool check)
+{
+ union i2c_smbus_data data;
+
+ if (!i2c_smbus_xfer(client->adapter, client->addr, client->flags,
+ I2C_SMBUS_READ, command,
+ I2C_SMBUS_BYTE_DATA, &data))
+ return data.byte;
+ if (check)
+ v4l_err(client, "error reading %02x, %02x\n",
+ client->addr, command);
+ return -1;
+}
+
+static s32 adv_smbus_read_byte_data(struct i2c_client *client, u8 command)
+{
+ int i;
+ for (i = 0; i < 3; i++) {
+ int ret = adv_smbus_read_byte_data_check(client, command, true);
+ if (ret >= 0) {
+ if (i)
+ v4l_err(client, "read ok after %d retries\n", i);
+ return ret;
+ }
+ }
+ v4l_err(client, "read failed\n");
+ return -1;
+}
+
+static int adv7511_rd(struct v4l2_subdev *sd, u8 reg)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+
+ return adv_smbus_read_byte_data(client, reg);
+}
+
+static int adv7511_wr(struct v4l2_subdev *sd, u8 reg, u8 val)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ int ret;
+ int i;
+
+ for (i = 0; i < 3; i++) {
+ ret = i2c_smbus_write_byte_data(client, reg, val);
+ if (ret == 0)
+ return 0;
+ }
+ v4l2_err(sd, "%s: i2c write error\n", __func__);
+ return ret;
+}
+
+/* To set specific bits in the register, a clear-mask is given (to be AND-ed),
+ and then the value-mask (to be OR-ed). */
+static inline void adv7511_wr_and_or(struct v4l2_subdev *sd, u8 reg, uint8_t clr_mask, uint8_t val_mask)
+{
+ adv7511_wr(sd, reg, (adv7511_rd(sd, reg) & clr_mask) | val_mask);
+}
+
+static int adv_smbus_read_i2c_block_data(struct i2c_client *client,
+ u8 command, unsigned length, u8 *values)
+{
+ union i2c_smbus_data data;
+ int ret;
+
+ if (length > I2C_SMBUS_BLOCK_MAX)
+ length = I2C_SMBUS_BLOCK_MAX;
+ data.block[0] = length;
+
+ ret = i2c_smbus_xfer(client->adapter, client->addr, client->flags,
+ I2C_SMBUS_READ, command,
+ I2C_SMBUS_I2C_BLOCK_DATA, &data);
+ memcpy(values, data.block + 1, length);
+ return ret;
+}
+
+static inline void adv7511_edid_rd(struct v4l2_subdev *sd, uint16_t len, uint8_t *buf)
+{
+ struct adv7511_state *state = get_adv7511_state(sd);
+ int i;
+ int err = 0;
+
+ v4l2_dbg(1, debug, sd, "%s:\n", __func__);
+
+ for (i = 0; !err && i < len; i += I2C_SMBUS_BLOCK_MAX)
+ err = adv_smbus_read_i2c_block_data(state->i2c_edid, i,
+ I2C_SMBUS_BLOCK_MAX, buf + i);
+ if (err)
+ v4l2_err(sd, "%s: i2c read error\n", __func__);
+}
+
+static inline bool adv7511_have_hotplug(struct v4l2_subdev *sd)
+{
+ return adv7511_rd(sd, 0x42) & MASK_ADV7511_HPD_DETECT;
+}
+
+static inline bool adv7511_have_rx_sense(struct v4l2_subdev *sd)
+{
+ return adv7511_rd(sd, 0x42) & MASK_ADV7511_MSEN_DETECT;
+}
+
+static void adv7511_csc_conversion_mode(struct v4l2_subdev *sd, uint8_t mode)
+{
+ adv7511_wr_and_or(sd, 0x18, 0x9f, (mode & 0x3)<<5);
+}
+
+static void adv7511_csc_coeff(struct v4l2_subdev *sd,
+ u16 A1, u16 A2, u16 A3, u16 A4,
+ u16 B1, u16 B2, u16 B3, u16 B4,
+ u16 C1, u16 C2, u16 C3, u16 C4)
+{
+ /* A */
+ adv7511_wr_and_or(sd, 0x18, 0xe0, A1>>8);
+ adv7511_wr(sd, 0x19, A1);
+ adv7511_wr_and_or(sd, 0x1A, 0xe0, A2>>8);
+ adv7511_wr(sd, 0x1B, A2);
+ adv7511_wr_and_or(sd, 0x1c, 0xe0, A3>>8);
+ adv7511_wr(sd, 0x1d, A3);
+ adv7511_wr_and_or(sd, 0x1e, 0xe0, A4>>8);
+ adv7511_wr(sd, 0x1f, A4);
+
+ /* B */
+ adv7511_wr_and_or(sd, 0x20, 0xe0, B1>>8);
+ adv7511_wr(sd, 0x21, B1);
+ adv7511_wr_and_or(sd, 0x22, 0xe0, B2>>8);
+ adv7511_wr(sd, 0x23, B2);
+ adv7511_wr_and_or(sd, 0x24, 0xe0, B3>>8);
+ adv7511_wr(sd, 0x25, B3);
+ adv7511_wr_and_or(sd, 0x26, 0xe0, B4>>8);
+ adv7511_wr(sd, 0x27, B4);
+
+ /* C */
+ adv7511_wr_and_or(sd, 0x28, 0xe0, C1>>8);
+ adv7511_wr(sd, 0x29, C1);
+ adv7511_wr_and_or(sd, 0x2A, 0xe0, C2>>8);
+ adv7511_wr(sd, 0x2B, C2);
+ adv7511_wr_and_or(sd, 0x2C, 0xe0, C3>>8);
+ adv7511_wr(sd, 0x2D, C3);
+ adv7511_wr_and_or(sd, 0x2E, 0xe0, C4>>8);
+ adv7511_wr(sd, 0x2F, C4);
+}
+
+static void adv7511_csc_rgb_full2limit(struct v4l2_subdev *sd, bool enable)
+{
+ if (enable) {
+ uint8_t csc_mode = 0;
+ adv7511_csc_conversion_mode(sd, csc_mode);
+ adv7511_csc_coeff(sd,
+ 4096-564, 0, 0, 256,
+ 0, 4096-564, 0, 256,
+ 0, 0, 4096-564, 256);
+ /* enable CSC */
+ adv7511_wr_and_or(sd, 0x18, 0x7f, 0x80);
+ /* AVI infoframe: Limited range RGB (16-235) */
+ adv7511_wr_and_or(sd, 0x57, 0xf3, 0x04);
+ } else {
+ /* disable CSC */
+ adv7511_wr_and_or(sd, 0x18, 0x7f, 0x0);
+ /* AVI infoframe: Full range RGB (0-255) */
+ adv7511_wr_and_or(sd, 0x57, 0xf3, 0x08);
+ }
+}
+
+static void adv7511_set_IT_content_AVI_InfoFrame(struct v4l2_subdev *sd)
+{
+ struct adv7511_state *state = get_adv7511_state(sd);
+ if (state->dv_timings.bt.standards & V4L2_DV_BT_STD_CEA861) {
+ /* CEA format, not IT */
+ adv7511_wr_and_or(sd, 0x57, 0x7f, 0x00);
+ } else {
+ /* IT format */
+ adv7511_wr_and_or(sd, 0x57, 0x7f, 0x80);
+ }
+}
+
+static int adv7511_set_rgb_quantization_mode(struct v4l2_subdev *sd, struct v4l2_ctrl *ctrl)
+{
+ switch (ctrl->val) {
+ default:
+ return -EINVAL;
+ break;
+ case V4L2_DV_RGB_RANGE_AUTO: {
+ /* automatic */
+ struct adv7511_state *state = get_adv7511_state(sd);
+
+ if (state->dv_timings.bt.standards & V4L2_DV_BT_STD_CEA861) {
+ /* cea format, RGB limited range (16-235) */
+ adv7511_csc_rgb_full2limit(sd, true);
+ } else {
+ /* not cea format, RGB full range (0-255) */
+ adv7511_csc_rgb_full2limit(sd, false);
+ }
+ }
+ break;
+ case V4L2_DV_RGB_RANGE_LIMITED:
+ /* RGB limited range (16-235) */
+ adv7511_csc_rgb_full2limit(sd, true);
+ break;
+ case V4L2_DV_RGB_RANGE_FULL:
+ /* RGB full range (0-255) */
+ adv7511_csc_rgb_full2limit(sd, false);
+ break;
+ }
+ return 0;
+}
+
+/* ------------------------------ CTRL OPS ------------------------------ */
+
+static int adv7511_s_ctrl(struct v4l2_ctrl *ctrl)
+{
+ struct v4l2_subdev *sd = to_sd(ctrl);
+ struct adv7511_state *state = get_adv7511_state(sd);
+
+ v4l2_dbg(1, debug, sd, "%s: ctrl id: %d, ctrl->val %d\n", __func__, ctrl->id, ctrl->val);
+
+ if (state->hdmi_mode_ctrl == ctrl) {
+ /* Set HDMI or DVI-D */
+ adv7511_wr_and_or(sd, 0xaf, 0xfd, ctrl->val == V4L2_DV_TX_MODE_HDMI ? 0x02 : 0x00);
+ return 0;
+ }
+ if (state->rgb_quantization_range_ctrl == ctrl)
+ return adv7511_set_rgb_quantization_mode(sd, ctrl);
+
+ return -EINVAL;
+}
+
+static const struct v4l2_ctrl_ops adv7511_ctrl_ops = {
+ .s_ctrl = adv7511_s_ctrl,
+};
+
+/* ---------------------------- CORE OPS ------------------------------------------- */
+
+#ifdef CONFIG_VIDEO_ADV_DEBUG
+static void adv7511_inv_register(struct v4l2_subdev *sd)
+{
+ v4l2_info(sd, "0x000-0x0ff: Main Map\n");
+}
+
+static int adv7511_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
+{
+ reg->size = 1;
+ switch (reg->reg >> 8) {
+ case 0:
+ reg->val = adv7511_rd(sd, reg->reg & 0xff);
+ break;
+ default:
+ v4l2_info(sd, "Register %03llx not supported\n", reg->reg);
+ adv7511_inv_register(sd);
+ break;
+ }
+ return 0;
+}
+
+static int adv7511_s_register(struct v4l2_subdev *sd, const struct v4l2_dbg_register *reg)
+{
+ switch (reg->reg >> 8) {
+ case 0:
+ adv7511_wr(sd, reg->reg & 0xff, reg->val & 0xff);
+ break;
+ default:
+ v4l2_info(sd, "Register %03llx not supported\n", reg->reg);
+ adv7511_inv_register(sd);
+ break;
+ }
+ return 0;
+}
+#endif
+
+static int adv7511_log_status(struct v4l2_subdev *sd)
+{
+ struct adv7511_state *state = get_adv7511_state(sd);
+ struct adv7511_state_edid *edid = &state->edid;
+
+ static const char * const states[] = {
+ "in reset",
+ "reading EDID",
+ "idle",
+ "initializing HDCP",
+ "HDCP enabled",
+ "initializing HDCP repeater",
+ "6", "7", "8", "9", "A", "B", "C", "D", "E", "F"
+ };
+ static const char * const errors[] = {
+ "no error",
+ "bad receiver BKSV",
+ "Ri mismatch",
+ "Pj mismatch",
+ "i2c error",
+ "timed out",
+ "max repeater cascade exceeded",
+ "hash check failed",
+ "too many devices",
+ "9", "A", "B", "C", "D", "E", "F"
+ };
+
+ v4l2_info(sd, "power %s\n", state->power_on ? "on" : "off");
+ v4l2_info(sd, "%s hotplug, %s Rx Sense, %s EDID (%d block(s))\n",
+ (adv7511_rd(sd, 0x42) & MASK_ADV7511_HPD_DETECT) ? "detected" : "no",
+ (adv7511_rd(sd, 0x42) & MASK_ADV7511_MSEN_DETECT) ? "detected" : "no",
+ edid->segments ? "found" : "no",
+ edid->blocks);
+ v4l2_info(sd, "%s output %s\n",
+ (adv7511_rd(sd, 0xaf) & 0x02) ?
+ "HDMI" : "DVI-D",
+ (adv7511_rd(sd, 0xa1) & 0x3c) ?
+ "disabled" : "enabled");
+ v4l2_info(sd, "state: %s, error: %s, detect count: %u, msk/irq: %02x/%02x\n",
+ states[adv7511_rd(sd, 0xc8) & 0xf],
+ errors[adv7511_rd(sd, 0xc8) >> 4], state->edid_detect_counter,
+ adv7511_rd(sd, 0x94), adv7511_rd(sd, 0x96));
+ v4l2_info(sd, "RGB quantization: %s range\n", adv7511_rd(sd, 0x18) & 0x80 ? "limited" : "full");
+ if (state->dv_timings.type == V4L2_DV_BT_656_1120)
+ v4l2_print_dv_timings(sd->name, "timings: ",
+ &state->dv_timings, false);
+ else
+ v4l2_info(sd, "no timings set\n");
+ v4l2_info(sd, "i2c edid addr: 0x%x\n", state->i2c_edid_addr);
+ v4l2_info(sd, "i2c cec addr: 0x%x\n", state->i2c_cec_addr);
+ return 0;
+}
+
+/* Power up/down adv7511 */
+static int adv7511_s_power(struct v4l2_subdev *sd, int on)
+{
+ struct adv7511_state *state = get_adv7511_state(sd);
+ const int retries = 20;
+ int i;
+
+ v4l2_dbg(1, debug, sd, "%s: power %s\n", __func__, on ? "on" : "off");
+
+ state->power_on = on;
+
+ if (!on) {
+ /* Power down */
+ adv7511_wr_and_or(sd, 0x41, 0xbf, 0x40);
+ return true;
+ }
+
+ /* Power up */
+ /* The adv7511 does not always come up immediately.
+ Retry multiple times. */
+ for (i = 0; i < retries; i++) {
+ adv7511_wr_and_or(sd, 0x41, 0xbf, 0x0);
+ if ((adv7511_rd(sd, 0x41) & 0x40) == 0)
+ break;
+ adv7511_wr_and_or(sd, 0x41, 0xbf, 0x40);
+ msleep(10);
+ }
+ if (i == retries) {
+ v4l2_dbg(1, debug, sd, "%s: failed to powerup the adv7511!\n", __func__);
+ adv7511_s_power(sd, 0);
+ return false;
+ }
+ if (i > 1)
+ v4l2_dbg(1, debug, sd, "%s: needed %d retries to powerup the adv7511\n", __func__, i);
+
+ /* Reserved registers that must be set */
+ adv7511_wr(sd, 0x98, 0x03);
+ adv7511_wr_and_or(sd, 0x9a, 0xfe, 0x70);
+ adv7511_wr(sd, 0x9c, 0x30);
+ adv7511_wr_and_or(sd, 0x9d, 0xfc, 0x01);
+ adv7511_wr(sd, 0xa2, 0xa4);
+ adv7511_wr(sd, 0xa3, 0xa4);
+ adv7511_wr(sd, 0xe0, 0xd0);
+ adv7511_wr(sd, 0xf9, 0x00);
+
+ adv7511_wr(sd, 0x43, state->i2c_edid_addr);
+
+ /* Set number of attempts to read the EDID */
+ adv7511_wr(sd, 0xc9, 0xf);
+ return true;
+}
+
+/* Enable interrupts */
+static void adv7511_set_isr(struct v4l2_subdev *sd, bool enable)
+{
+ uint8_t irqs = MASK_ADV7511_HPD_INT | MASK_ADV7511_MSEN_INT;
+ uint8_t irqs_rd;
+ int retries = 100;
+
+ v4l2_dbg(2, debug, sd, "%s: %s\n", __func__, enable ? "enable" : "disable");
+
+ /* The datasheet says that the EDID ready interrupt should be
+ disabled if there is no hotplug. */
+ if (!enable)
+ irqs = 0;
+ else if (adv7511_have_hotplug(sd))
+ irqs |= MASK_ADV7511_EDID_RDY_INT;
+
+ /*
+ * This i2c write can fail (approx. 1 in 1000 writes). But it
+ * is essential that this register is correct, so retry it
+ * multiple times.
+ *
+ * Note that the i2c write does not report an error, but the readback
+ * clearly shows the wrong value.
+ */
+ do {
+ adv7511_wr(sd, 0x94, irqs);
+ irqs_rd = adv7511_rd(sd, 0x94);
+ } while (retries-- && irqs_rd != irqs);
+
+ if (irqs_rd == irqs)
+ return;
+ v4l2_err(sd, "Could not set interrupts: hw failure?\n");
+}
+
+/* Interrupt handler */
+static int adv7511_isr(struct v4l2_subdev *sd, u32 status, bool *handled)
+{
+ uint8_t irq_status;
+
+ /* disable interrupts to prevent a race condition */
+ adv7511_set_isr(sd, false);
+ irq_status = adv7511_rd(sd, 0x96);
+ /* clear detected interrupts */
+ adv7511_wr(sd, 0x96, irq_status);
+
+ v4l2_dbg(1, debug, sd, "%s: irq 0x%x\n", __func__, irq_status);
+
+ if (irq_status & (MASK_ADV7511_HPD_INT | MASK_ADV7511_MSEN_INT))
+ adv7511_check_monitor_present_status(sd);
+ if (irq_status & MASK_ADV7511_EDID_RDY_INT)
+ adv7511_check_edid_status(sd);
+
+ /* enable interrupts */
+ adv7511_set_isr(sd, true);
+
+ if (handled)
+ *handled = true;
+ return 0;
+}
+
+static int adv7511_get_edid(struct v4l2_subdev *sd, struct v4l2_subdev_edid *edid)
+{
+ struct adv7511_state *state = get_adv7511_state(sd);
+
+ if (edid->pad != 0)
+ return -EINVAL;
+ if ((edid->blocks == 0) || (edid->blocks > 256))
+ return -EINVAL;
+ if (!edid->edid)
+ return -EINVAL;
+ if (!state->edid.segments) {
+ v4l2_dbg(1, debug, sd, "EDID segment 0 not found\n");
+ return -ENODATA;
+ }
+ if (edid->start_block >= state->edid.segments * 2)
+ return -E2BIG;
+ if ((edid->blocks + edid->start_block) >= state->edid.segments * 2)
+ edid->blocks = state->edid.segments * 2 - edid->start_block;
+
+ memcpy(edid->edid, &state->edid.data[edid->start_block * 128],
+ 128 * edid->blocks);
+ return 0;
+}
+
+static const struct v4l2_subdev_pad_ops adv7511_pad_ops = {
+ .get_edid = adv7511_get_edid,
+};
+
+static const struct v4l2_subdev_core_ops adv7511_core_ops = {
+ .log_status = adv7511_log_status,
+#ifdef CONFIG_VIDEO_ADV_DEBUG
+ .g_register = adv7511_g_register,
+ .s_register = adv7511_s_register,
+#endif
+ .s_power = adv7511_s_power,
+ .interrupt_service_routine = adv7511_isr,
+};
+
+/* ------------------------------ VIDEO OPS ------------------------------ */
+
+/* Enable/disable adv7511 output */
+static int adv7511_s_stream(struct v4l2_subdev *sd, int enable)
+{
+ struct adv7511_state *state = get_adv7511_state(sd);
+
+ v4l2_dbg(1, debug, sd, "%s: %sable\n", __func__, (enable ? "en" : "dis"));
+ adv7511_wr_and_or(sd, 0xa1, ~0x3c, (enable ? 0 : 0x3c));
+ if (enable) {
+ adv7511_check_monitor_present_status(sd);
+ } else {
+ adv7511_s_power(sd, 0);
+ state->have_monitor = false;
+ }
+ return 0;
+}
+
+static int adv7511_s_dv_timings(struct v4l2_subdev *sd,
+ struct v4l2_dv_timings *timings)
+{
+ struct adv7511_state *state = get_adv7511_state(sd);
+
+ v4l2_dbg(1, debug, sd, "%s:\n", __func__);
+
+ /* quick sanity check */
+ if (!v4l2_valid_dv_timings(timings, &adv7511_timings_cap, NULL, NULL))
+ return -EINVAL;
+
+ /* Fill the optional fields .standards and .flags in struct v4l2_dv_timings
+ if the format is one of the CEA or DMT timings. */
+ v4l2_find_dv_timings_cap(timings, &adv7511_timings_cap, 0, NULL, NULL);
+
+ timings->bt.flags &= ~V4L2_DV_FL_REDUCED_FPS;
+
+ /* save timings */
+ state->dv_timings = *timings;
+
+ /* update quantization range based on new dv_timings */
+ adv7511_set_rgb_quantization_mode(sd, state->rgb_quantization_range_ctrl);
+
+ /* update AVI infoframe */
+ adv7511_set_IT_content_AVI_InfoFrame(sd);
+
+ return 0;
+}
+
+static int adv7511_g_dv_timings(struct v4l2_subdev *sd,
+ struct v4l2_dv_timings *timings)
+{
+ struct adv7511_state *state = get_adv7511_state(sd);
+
+ v4l2_dbg(1, debug, sd, "%s:\n", __func__);
+
+ if (!timings)
+ return -EINVAL;
+
+ *timings = state->dv_timings;
+
+ return 0;
+}
+
+static int adv7511_enum_dv_timings(struct v4l2_subdev *sd,
+ struct v4l2_enum_dv_timings *timings)
+{
+ return v4l2_enum_dv_timings_cap(timings, &adv7511_timings_cap, NULL, NULL);
+}
+
+static int adv7511_dv_timings_cap(struct v4l2_subdev *sd,
+ struct v4l2_dv_timings_cap *cap)
+{
+ *cap = adv7511_timings_cap;
+ return 0;
+}
+
+static const struct v4l2_subdev_video_ops adv7511_video_ops = {
+ .s_stream = adv7511_s_stream,
+ .s_dv_timings = adv7511_s_dv_timings,
+ .g_dv_timings = adv7511_g_dv_timings,
+ .enum_dv_timings = adv7511_enum_dv_timings,
+ .dv_timings_cap = adv7511_dv_timings_cap,
+};
+
+/* ------------------------------ AUDIO OPS ------------------------------ */
+static int adv7511_s_audio_stream(struct v4l2_subdev *sd, int enable)
+{
+ v4l2_dbg(1, debug, sd, "%s: %sable\n", __func__, (enable ? "en" : "dis"));
+
+ if (enable)
+ adv7511_wr_and_or(sd, 0x4b, 0x3f, 0x80);
+ else
+ adv7511_wr_and_or(sd, 0x4b, 0x3f, 0x40);
+
+ return 0;
+}
+
+static int adv7511_s_clock_freq(struct v4l2_subdev *sd, u32 freq)
+{
+ u32 N;
+
+ switch (freq) {
+ case 32000: N = 4096; break;
+ case 44100: N = 6272; break;
+ case 48000: N = 6144; break;
+ case 88200: N = 12544; break;
+ case 96000: N = 12288; break;
+ case 176400: N = 25088; break;
+ case 192000: N = 24576; break;
+ default:
+ return -EINVAL;
+ }
+
+ /* Set N (used with CTS to regenerate the audio clock) */
+ adv7511_wr(sd, 0x01, (N >> 16) & 0xf);
+ adv7511_wr(sd, 0x02, (N >> 8) & 0xff);
+ adv7511_wr(sd, 0x03, N & 0xff);
+
+ return 0;
+}
+
+static int adv7511_s_i2s_clock_freq(struct v4l2_subdev *sd, u32 freq)
+{
+ u32 i2s_sf;
+
+ switch (freq) {
+ case 32000: i2s_sf = 0x30; break;
+ case 44100: i2s_sf = 0x00; break;
+ case 48000: i2s_sf = 0x20; break;
+ case 88200: i2s_sf = 0x80; break;
+ case 96000: i2s_sf = 0xa0; break;
+ case 176400: i2s_sf = 0xc0; break;
+ case 192000: i2s_sf = 0xe0; break;
+ default:
+ return -EINVAL;
+ }
+
+ /* Set sampling frequency for I2S audio to 48 kHz */
+ adv7511_wr_and_or(sd, 0x15, 0xf, i2s_sf);
+
+ return 0;
+}
+
+static int adv7511_s_routing(struct v4l2_subdev *sd, u32 input, u32 output, u32 config)
+{
+ /* Only 2 channels in use for application */
+ adv7511_wr_and_or(sd, 0x73, 0xf8, 0x1);
+ /* Speaker mapping */
+ adv7511_wr(sd, 0x76, 0x00);
+
+ /* 16 bit audio word length */
+ adv7511_wr_and_or(sd, 0x14, 0xf0, 0x02);
+
+ return 0;
+}
+
+static const struct v4l2_subdev_audio_ops adv7511_audio_ops = {
+ .s_stream = adv7511_s_audio_stream,
+ .s_clock_freq = adv7511_s_clock_freq,
+ .s_i2s_clock_freq = adv7511_s_i2s_clock_freq,
+ .s_routing = adv7511_s_routing,
+};
+
+/* --------------------- SUBDEV OPS --------------------------------------- */
+
+static const struct v4l2_subdev_ops adv7511_ops = {
+ .core = &adv7511_core_ops,
+ .pad = &adv7511_pad_ops,
+ .video = &adv7511_video_ops,
+ .audio = &adv7511_audio_ops,
+};
+
+/* ----------------------------------------------------------------------- */
+static void adv7511_dbg_dump_edid(int lvl, int debug, struct v4l2_subdev *sd, int segment, uint8_t *buf)
+{
+ if (debug >= lvl) {
+ int i, j;
+ v4l2_dbg(lvl, debug, sd, "edid segment %d\n", segment);
+ for (i = 0; i < 256; i += 16) {
+ u8 b[128];
+ u8 *bp = b;
+ if (i == 128)
+ v4l2_dbg(lvl, debug, sd, "\n");
+ for (j = i; j < i + 16; j++) {
+ sprintf(bp, "0x%02x, ", buf[j]);
+ bp += 6;
+ }
+ bp[0] = '\0';
+ v4l2_dbg(lvl, debug, sd, "%s\n", b);
+ }
+ }
+}
+
+static void adv7511_edid_handler(struct work_struct *work)
+{
+ struct delayed_work *dwork = to_delayed_work(work);
+ struct adv7511_state *state = container_of(dwork, struct adv7511_state, edid_handler);
+ struct v4l2_subdev *sd = &state->sd;
+ struct adv7511_edid_detect ed;
+
+ v4l2_dbg(1, debug, sd, "%s:\n", __func__);
+
+ if (adv7511_check_edid_status(sd)) {
+ /* Return if we received the EDID. */
+ return;
+ }
+
+ if (adv7511_have_hotplug(sd)) {
+ /* We must retry reading the EDID several times, it is possible
+ * that initially the EDID couldn't be read due to i2c errors
+ * (DVI connectors are particularly prone to this problem). */
+ if (state->edid.read_retries) {
+ state->edid.read_retries--;
+ v4l2_dbg(1, debug, sd, "%s: edid read failed\n", __func__);
+ state->have_monitor = false;
+ adv7511_s_power(sd, false);
+ adv7511_s_power(sd, true);
+ queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY);
+ return;
+ }
+ }
+
+ /* We failed to read the EDID, so send an event for this. */
+ ed.present = false;
+ ed.segment = adv7511_rd(sd, 0xc4);
+ v4l2_subdev_notify(sd, ADV7511_EDID_DETECT, (void *)&ed);
+ v4l2_dbg(1, debug, sd, "%s: no edid found\n", __func__);
+}
+
+static void adv7511_audio_setup(struct v4l2_subdev *sd)
+{
+ v4l2_dbg(1, debug, sd, "%s\n", __func__);
+
+ adv7511_s_i2s_clock_freq(sd, 48000);
+ adv7511_s_clock_freq(sd, 48000);
+ adv7511_s_routing(sd, 0, 0, 0);
+}
+
+/* Configure hdmi transmitter. */
+static void adv7511_setup(struct v4l2_subdev *sd)
+{
+ struct adv7511_state *state = get_adv7511_state(sd);
+ v4l2_dbg(1, debug, sd, "%s\n", __func__);
+
+ /* Input format: RGB 4:4:4 */
+ adv7511_wr_and_or(sd, 0x15, 0xf0, 0x0);
+ /* Output format: RGB 4:4:4 */
+ adv7511_wr_and_or(sd, 0x16, 0x7f, 0x0);
+ /* 1st order interpolation 4:2:2 -> 4:4:4 up conversion, Aspect ratio: 16:9 */
+ adv7511_wr_and_or(sd, 0x17, 0xf9, 0x06);
+ /* Disable pixel repetition */
+ adv7511_wr_and_or(sd, 0x3b, 0x9f, 0x0);
+ /* Disable CSC */
+ adv7511_wr_and_or(sd, 0x18, 0x7f, 0x0);
+ /* Output format: RGB 4:4:4, Active Format Information is valid,
+ * underscanned */
+ adv7511_wr_and_or(sd, 0x55, 0x9c, 0x12);
+ /* AVI Info frame packet enable, Audio Info frame disable */
+ adv7511_wr_and_or(sd, 0x44, 0xe7, 0x10);
+ /* Colorimetry, Active format aspect ratio: same as picure. */
+ adv7511_wr(sd, 0x56, 0xa8);
+ /* No encryption */
+ adv7511_wr_and_or(sd, 0xaf, 0xed, 0x0);
+
+ /* Positive clk edge capture for input video clock */
+ adv7511_wr_and_or(sd, 0xba, 0x1f, 0x60);
+
+ adv7511_audio_setup(sd);
+
+ v4l2_ctrl_handler_setup(&state->hdl);
+}
+
+static void adv7511_notify_monitor_detect(struct v4l2_subdev *sd)
+{
+ struct adv7511_monitor_detect mdt;
+ struct adv7511_state *state = get_adv7511_state(sd);
+
+ mdt.present = state->have_monitor;
+ v4l2_subdev_notify(sd, ADV7511_MONITOR_DETECT, (void *)&mdt);
+}
+
+static void adv7511_check_monitor_present_status(struct v4l2_subdev *sd)
+{
+ struct adv7511_state *state = get_adv7511_state(sd);
+ /* read hotplug and rx-sense state */
+ uint8_t status = adv7511_rd(sd, 0x42);
+
+ v4l2_dbg(1, debug, sd, "%s: status: 0x%x%s%s\n",
+ __func__,
+ status,
+ status & MASK_ADV7511_HPD_DETECT ? ", hotplug" : "",
+ status & MASK_ADV7511_MSEN_DETECT ? ", rx-sense" : "");
+
+ /* update read only ctrls */
+ v4l2_ctrl_s_ctrl(state->hotplug_ctrl, adv7511_have_hotplug(sd) ? 0x1 : 0x0);
+ v4l2_ctrl_s_ctrl(state->rx_sense_ctrl, adv7511_have_rx_sense(sd) ? 0x1 : 0x0);
+ v4l2_ctrl_s_ctrl(state->have_edid0_ctrl, state->edid.segments ? 0x1 : 0x0);
+
+ if ((status & MASK_ADV7511_HPD_DETECT) && ((status & MASK_ADV7511_MSEN_DETECT) || state->edid.segments)) {
+ v4l2_dbg(1, debug, sd, "%s: hotplug and (rx-sense or edid)\n", __func__);
+ if (!state->have_monitor) {
+ v4l2_dbg(1, debug, sd, "%s: monitor detected\n", __func__);
+ state->have_monitor = true;
+ adv7511_set_isr(sd, true);
+ if (!adv7511_s_power(sd, true)) {
+ v4l2_dbg(1, debug, sd, "%s: monitor detected, powerup failed\n", __func__);
+ return;
+ }
+ adv7511_setup(sd);
+ adv7511_notify_monitor_detect(sd);
+ state->edid.read_retries = EDID_MAX_RETRIES;
+ queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY);
+ }
+ } else if (status & MASK_ADV7511_HPD_DETECT) {
+ v4l2_dbg(1, debug, sd, "%s: hotplug detected\n", __func__);
+ state->edid.read_retries = EDID_MAX_RETRIES;
+ queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY);
+ } else if (!(status & MASK_ADV7511_HPD_DETECT)) {
+ v4l2_dbg(1, debug, sd, "%s: hotplug not detected\n", __func__);
+ if (state->have_monitor) {
+ v4l2_dbg(1, debug, sd, "%s: monitor not detected\n", __func__);
+ state->have_monitor = false;
+ adv7511_notify_monitor_detect(sd);
+ }
+ adv7511_s_power(sd, false);
+ memset(&state->edid, 0, sizeof(struct adv7511_state_edid));
+ }
+}
+
+static bool edid_block_verify_crc(uint8_t *edid_block)
+{
+ int i;
+ uint8_t sum = 0;
+
+ for (i = 0; i < 128; i++)
+ sum += *(edid_block + i);
+ return (sum == 0);
+}
+
+static bool edid_segment_verify_crc(struct v4l2_subdev *sd, u32 segment)
+{
+ struct adv7511_state *state = get_adv7511_state(sd);
+ u32 blocks = state->edid.blocks;
+ uint8_t *data = state->edid.data;
+
+ if (edid_block_verify_crc(&data[segment * 256])) {
+ if ((segment + 1) * 2 <= blocks)
+ return edid_block_verify_crc(&data[segment * 256 + 128]);
+ return true;
+ }
+ return false;
+}
+
+static bool adv7511_check_edid_status(struct v4l2_subdev *sd)
+{
+ struct adv7511_state *state = get_adv7511_state(sd);
+ uint8_t edidRdy = adv7511_rd(sd, 0xc5);
+
+ v4l2_dbg(1, debug, sd, "%s: edid ready (retries: %d)\n",
+ __func__, EDID_MAX_RETRIES - state->edid.read_retries);
+
+ if (state->edid.complete)
+ return true;
+
+ if (edidRdy & MASK_ADV7511_EDID_RDY) {
+ int segment = adv7511_rd(sd, 0xc4);
+ struct adv7511_edid_detect ed;
+
+ if (segment >= EDID_MAX_SEGM) {
+ v4l2_err(sd, "edid segment number too big\n");
+ return false;
+ }
+ v4l2_dbg(1, debug, sd, "%s: got segment %d\n", __func__, segment);
+ adv7511_edid_rd(sd, 256, &state->edid.data[segment * 256]);
+ adv7511_dbg_dump_edid(2, debug, sd, segment, &state->edid.data[segment * 256]);
+ if (segment == 0) {
+ state->edid.blocks = state->edid.data[0x7e] + 1;
+ v4l2_dbg(1, debug, sd, "%s: %d blocks in total\n", __func__, state->edid.blocks);
+ }
+ if (!edid_segment_verify_crc(sd, segment)) {
+ /* edid crc error, force reread of edid segment */
+ v4l2_dbg(1, debug, sd, "%s: edid crc error\n", __func__);
+ state->have_monitor = false;
+ adv7511_s_power(sd, false);
+ adv7511_s_power(sd, true);
+ return false;
+ }
+ /* one more segment read ok */
+ state->edid.segments = segment + 1;
+ if (((state->edid.data[0x7e] >> 1) + 1) > state->edid.segments) {
+ /* Request next EDID segment */
+ v4l2_dbg(1, debug, sd, "%s: request segment %d\n", __func__, state->edid.segments);
+ adv7511_wr(sd, 0xc9, 0xf);
+ adv7511_wr(sd, 0xc4, state->edid.segments);
+ state->edid.read_retries = EDID_MAX_RETRIES;
+ queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY);
+ return false;
+ }
+
+ v4l2_dbg(1, debug, sd, "%s: edid complete with %d segment(s)\n", __func__, state->edid.segments);
+ state->edid.complete = true;
+
+ /* report when we have all segments
+ but report only for segment 0
+ */
+ ed.present = true;
+ ed.segment = 0;
+ state->edid_detect_counter++;
+ v4l2_ctrl_s_ctrl(state->have_edid0_ctrl, state->edid.segments ? 0x1 : 0x0);
+ v4l2_subdev_notify(sd, ADV7511_EDID_DETECT, (void *)&ed);
+ return ed.present;
+ }
+
+ return false;
+}
+
+/* ----------------------------------------------------------------------- */
+/* Setup ADV7511 */
+static void adv7511_init_setup(struct v4l2_subdev *sd)
+{
+ struct adv7511_state *state = get_adv7511_state(sd);
+ struct adv7511_state_edid *edid = &state->edid;
+
+ v4l2_dbg(1, debug, sd, "%s\n", __func__);
+
+ /* clear all interrupts */
+ adv7511_wr(sd, 0x96, 0xff);
+ memset(edid, 0, sizeof(struct adv7511_state_edid));
+ state->have_monitor = false;
+ adv7511_set_isr(sd, false);
+ adv7511_s_stream(sd, false);
+ adv7511_s_audio_stream(sd, false);
+}
+
+static int adv7511_probe(struct i2c_client *client, const struct i2c_device_id *id)
+{
+ struct adv7511_state *state;
+ struct adv7511_platform_data *pdata = client->dev.platform_data;
+ struct v4l2_ctrl_handler *hdl;
+ struct v4l2_subdev *sd;
+ u8 chip_id[2];
+ int err = -EIO;
+
+ /* Check if the adapter supports the needed features */
+ if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
+ return -EIO;
+
+ state = devm_kzalloc(&client->dev, sizeof(struct adv7511_state), GFP_KERNEL);
+ if (!state)
+ return -ENOMEM;
+
+ /* Platform data */
+ if (!pdata) {
+ v4l_err(client, "No platform data!\n");
+ return -ENODEV;
+ }
+ memcpy(&state->pdata, pdata, sizeof(state->pdata));
+
+ sd = &state->sd;
+
+ v4l2_dbg(1, debug, sd, "detecting adv7511 client on address 0x%x\n",
+ client->addr << 1);
+
+ v4l2_i2c_subdev_init(sd, client, &adv7511_ops);
+
+ hdl = &state->hdl;
+ v4l2_ctrl_handler_init(hdl, 10);
+ /* add in ascending ID order */
+ state->hdmi_mode_ctrl = v4l2_ctrl_new_std_menu(hdl, &adv7511_ctrl_ops,
+ V4L2_CID_DV_TX_MODE, V4L2_DV_TX_MODE_HDMI,
+ 0, V4L2_DV_TX_MODE_DVI_D);
+ state->hotplug_ctrl = v4l2_ctrl_new_std(hdl, NULL,
+ V4L2_CID_DV_TX_HOTPLUG, 0, 1, 0, 0);
+ state->rx_sense_ctrl = v4l2_ctrl_new_std(hdl, NULL,
+ V4L2_CID_DV_TX_RXSENSE, 0, 1, 0, 0);
+ state->have_edid0_ctrl = v4l2_ctrl_new_std(hdl, NULL,
+ V4L2_CID_DV_TX_EDID_PRESENT, 0, 1, 0, 0);
+ state->rgb_quantization_range_ctrl =
+ v4l2_ctrl_new_std_menu(hdl, &adv7511_ctrl_ops,
+ V4L2_CID_DV_TX_RGB_RANGE, V4L2_DV_RGB_RANGE_FULL,
+ 0, V4L2_DV_RGB_RANGE_AUTO);
+ sd->ctrl_handler = hdl;
+ if (hdl->error) {
+ err = hdl->error;
+ goto err_hdl;
+ }
+ state->hdmi_mode_ctrl->is_private = true;
+ state->hotplug_ctrl->is_private = true;
+ state->rx_sense_ctrl->is_private = true;
+ state->have_edid0_ctrl->is_private = true;
+ state->rgb_quantization_range_ctrl->is_private = true;
+
+ state->pad.flags = MEDIA_PAD_FL_SINK;
+ err = media_entity_init(&sd->entity, 1, &state->pad, 0);
+ if (err)
+ goto err_hdl;
+
+ /* EDID and CEC i2c addr */
+ state->i2c_edid_addr = state->pdata.i2c_edid << 1;
+ state->i2c_cec_addr = state->pdata.i2c_cec << 1;
+
+ state->chip_revision = adv7511_rd(sd, 0x0);
+ chip_id[0] = adv7511_rd(sd, 0xf5);
+ chip_id[1] = adv7511_rd(sd, 0xf6);
+ if (chip_id[0] != 0x75 || chip_id[1] != 0x11) {
+ v4l2_err(sd, "chip_id != 0x7511, read 0x%02x%02x\n", chip_id[0], chip_id[1]);
+ err = -EIO;
+ goto err_entity;
+ }
+
+ state->i2c_edid = i2c_new_dummy(client->adapter, state->i2c_edid_addr >> 1);
+ if (state->i2c_edid == NULL) {
+ v4l2_err(sd, "failed to register edid i2c client\n");
+ goto err_entity;
+ }
+
+ adv7511_wr(sd, 0xe2, 0x01); /* power down cec section */
+ state->work_queue = create_singlethread_workqueue(sd->name);
+ if (state->work_queue == NULL) {
+ v4l2_err(sd, "could not create workqueue\n");
+ goto err_unreg_cec;
+ }
+
+ INIT_DELAYED_WORK(&state->edid_handler, adv7511_edid_handler);
+
+ adv7511_init_setup(sd);
+ adv7511_set_isr(sd, true);
+ adv7511_check_monitor_present_status(sd);
+
+ v4l2_info(sd, "%s found @ 0x%x (%s)\n", client->name,
+ client->addr << 1, client->adapter->name);
+ return 0;
+
+err_unreg_cec:
+ i2c_unregister_device(state->i2c_edid);
+err_entity:
+ media_entity_cleanup(&sd->entity);
+err_hdl:
+ v4l2_ctrl_handler_free(&state->hdl);
+ return err;
+}
+
+/* ----------------------------------------------------------------------- */
+
+static int adv7511_remove(struct i2c_client *client)
+{
+ struct v4l2_subdev *sd = i2c_get_clientdata(client);
+ struct adv7511_state *state = get_adv7511_state(sd);
+
+ state->chip_revision = -1;
+
+ v4l2_dbg(1, debug, sd, "%s removed @ 0x%x (%s)\n", client->name,
+ client->addr << 1, client->adapter->name);
+
+ adv7511_init_setup(sd);
+ cancel_delayed_work(&state->edid_handler);
+ i2c_unregister_device(state->i2c_edid);
+ destroy_workqueue(state->work_queue);
+ v4l2_device_unregister_subdev(sd);
+ media_entity_cleanup(&sd->entity);
+ v4l2_ctrl_handler_free(sd->ctrl_handler);
+ return 0;
+}
+
+/* ----------------------------------------------------------------------- */
+
+static struct i2c_device_id adv7511_id[] = {
+ { "adv7511", 0 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, adv7511_id);
+
+static struct i2c_driver adv7511_driver = {
+ .driver = {
+ .owner = THIS_MODULE,
+ .name = "adv7511",
+ },
+ .probe = adv7511_probe,
+ .remove = adv7511_remove,
+ .id_table = adv7511_id,
+};
+
+module_i2c_driver(adv7511_driver);
diff --git a/include/media/adv7511.h b/include/media/adv7511.h
new file mode 100644
index 00000000000..bb78bed9a5b
--- /dev/null
+++ b/include/media/adv7511.h
@@ -0,0 +1,48 @@
+/*
+ * Analog Devices ADV7511 HDMI Transmitter Device Driver
+ *
+ * Copyright 2013 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
+ *
+ * This program is free software; you may redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef ADV7511_H
+#define ADV7511_H
+
+/* notify events */
+#define ADV7511_MONITOR_DETECT 0
+#define ADV7511_EDID_DETECT 1
+
+
+struct adv7511_monitor_detect {
+ int present;
+};
+
+struct adv7511_edid_detect {
+ int present;
+ int segment;
+};
+
+struct adv7511_cec_arg {
+ void *arg;
+ u32 f_flags;
+};
+
+struct adv7511_platform_data {
+ uint8_t i2c_edid;
+ uint8_t i2c_cec;
+ uint32_t cec_clk;
+};
+
+#endif
--
cgit v1.2.3-70-g09d2
From 037f4e6b6be47dcfb3f4e78e5c6abe7da92da1dd Mon Sep 17 00:00:00 2001
From: Hans Verkuil <hans.verkuil@cisco.com>
Date: Sun, 30 Jun 2013 04:40:32 -0300
Subject: [media] ml86v7667: fix compile warning: 'ret' set but not used
media_build/v4l/ml86v7667.c: In function 'ml86v7667_s_ctrl':
media_build/v4l/ml86v7667.c:120:6: warning: variable 'ret' set but not used [-Wunused-but-set-variable]
int ret;
^
And indeed, ret is set but not used. Let's actually return the error
code.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
---
drivers/media/i2c/ml86v7667.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
(limited to 'drivers/media/i2c')
diff --git a/drivers/media/i2c/ml86v7667.c b/drivers/media/i2c/ml86v7667.c
index dd1e6c9347f..a9110d8bbbc 100644
--- a/drivers/media/i2c/ml86v7667.c
+++ b/drivers/media/i2c/ml86v7667.c
@@ -117,7 +117,7 @@ static int ml86v7667_s_ctrl(struct v4l2_ctrl *ctrl)
{
struct v4l2_subdev *sd = to_sd(ctrl);
struct i2c_client *client = v4l2_get_subdevdata(sd);
- int ret;
+ int ret = -EINVAL;
switch (ctrl->id) {
case V4L2_CID_BRIGHTNESS:
@@ -157,7 +157,7 @@ static int ml86v7667_s_ctrl(struct v4l2_ctrl *ctrl)
break;
}
- return 0;
+ return ret;
}
static int ml86v7667_querystd(struct v4l2_subdev *sd, v4l2_std_id *std)
--
cgit v1.2.3-70-g09d2