From 1a4ccc2d460f252853dfa2fb38b4ea881916713d Mon Sep 17 00:00:00 2001 From: FUJITA Tomonori Date: Thu, 1 Apr 2010 16:56:57 +0000 Subject: bnx2: use the dma state API instead of the pci equivalents The DMA API is preferred. Signed-off-by: FUJITA Tomonori Signed-off-by: David S. Miller --- drivers/net/bnx2.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers/net/bnx2.h') diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h index cd4b0e4637a..ab34a5d86f8 100644 --- a/drivers/net/bnx2.h +++ b/drivers/net/bnx2.h @@ -6551,17 +6551,17 @@ struct l2_fhdr { struct sw_bd { struct sk_buff *skb; - DECLARE_PCI_UNMAP_ADDR(mapping) + DEFINE_DMA_UNMAP_ADDR(mapping); }; struct sw_pg { struct page *page; - DECLARE_PCI_UNMAP_ADDR(mapping) + DEFINE_DMA_UNMAP_ADDR(mapping); }; struct sw_tx_bd { struct sk_buff *skb; - DECLARE_PCI_UNMAP_ADDR(mapping) + DEFINE_DMA_UNMAP_ADDR(mapping); unsigned short is_gso; unsigned short nr_frags; }; -- cgit v1.2.3-70-g09d2 From a33fa66bcf365ffe5b79d1ae1d3582cc261ae56e Mon Sep 17 00:00:00 2001 From: Michael Chan Date: Thu, 6 May 2010 08:58:13 +0000 Subject: bnx2: Add prefetches to rx path. Add prefetches of the skb and the next rx descriptor to speed up rx path. Use prefetchw() for the skb [suggested by Eric Dumazet]. The rx descriptor is in skb->data which is mapped for streaming mode DMA. Eric Dumazet pointed out that we should not prefetch the data before dma_sync. So we prefetch only if dma_sync is no_op on the system. Signed-off-by: Michael Chan Signed-off-by: David S. Miller --- drivers/net/bnx2.c | 16 +++++++++++++--- drivers/net/bnx2.h | 1 + 2 files changed, 14 insertions(+), 3 deletions(-) (limited to 'drivers/net/bnx2.h') diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c index 320526b9b46..667f4196dc2 100644 --- a/drivers/net/bnx2.c +++ b/drivers/net/bnx2.c @@ -2719,6 +2719,7 @@ bnx2_alloc_rx_skb(struct bnx2 *bp, struct bnx2_rx_ring_info *rxr, u16 index) } rx_buf->skb = skb; + rx_buf->desc = (struct l2_fhdr *) skb->data; dma_unmap_addr_set(rx_buf, mapping, mapping); rxbd->rx_bd_haddr_hi = (u64) mapping >> 32; @@ -2941,6 +2942,7 @@ bnx2_reuse_rx_skb(struct bnx2 *bp, struct bnx2_rx_ring_info *rxr, rxr->rx_prod_bseq += bp->rx_buf_use_size; prod_rx_buf->skb = skb; + prod_rx_buf->desc = (struct l2_fhdr *) skb->data; if (cons == prod) return; @@ -3074,6 +3076,7 @@ bnx2_rx_int(struct bnx2 *bp, struct bnx2_napi *bnapi, int budget) u16 hw_cons, sw_cons, sw_ring_cons, sw_prod, sw_ring_prod; struct l2_fhdr *rx_hdr; int rx_pkt = 0, pg_ring_used = 0; + struct pci_dev *pdev = bp->pdev; hw_cons = bnx2_get_hw_rx_cons(bnapi); sw_cons = rxr->rx_cons; @@ -3086,7 +3089,7 @@ bnx2_rx_int(struct bnx2 *bp, struct bnx2_napi *bnapi, int budget) while (sw_cons != hw_cons) { unsigned int len, hdr_len; u32 status; - struct sw_bd *rx_buf; + struct sw_bd *rx_buf, *next_rx_buf; struct sk_buff *skb; dma_addr_t dma_addr; u16 vtag = 0; @@ -3097,7 +3100,14 @@ bnx2_rx_int(struct bnx2 *bp, struct bnx2_napi *bnapi, int budget) rx_buf = &rxr->rx_buf_ring[sw_ring_cons]; skb = rx_buf->skb; + prefetchw(skb); + if (!get_dma_ops(&pdev->dev)->sync_single_for_cpu) { + next_rx_buf = + &rxr->rx_buf_ring[ + RX_RING_IDX(NEXT_RX_BD(sw_cons))]; + prefetch(next_rx_buf->desc); + } rx_buf->skb = NULL; dma_addr = dma_unmap_addr(rx_buf, mapping); @@ -3106,7 +3116,7 @@ bnx2_rx_int(struct bnx2 *bp, struct bnx2_napi *bnapi, int budget) BNX2_RX_OFFSET + BNX2_RX_COPY_THRESH, PCI_DMA_FROMDEVICE); - rx_hdr = (struct l2_fhdr *) skb->data; + rx_hdr = rx_buf->desc; len = rx_hdr->l2_fhdr_pkt_len; status = rx_hdr->l2_fhdr_status; @@ -5764,7 +5774,7 @@ bnx2_run_loopback(struct bnx2 *bp, int loopback_mode) rx_buf = &rxr->rx_buf_ring[rx_start_idx]; rx_skb = rx_buf->skb; - rx_hdr = (struct l2_fhdr *) rx_skb->data; + rx_hdr = rx_buf->desc; skb_reserve(rx_skb, BNX2_RX_OFFSET); pci_dma_sync_single_for_cpu(bp->pdev, diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h index ab34a5d86f8..dd35bd0b7e0 100644 --- a/drivers/net/bnx2.h +++ b/drivers/net/bnx2.h @@ -6551,6 +6551,7 @@ struct l2_fhdr { struct sw_bd { struct sk_buff *skb; + struct l2_fhdr *desc; DEFINE_DMA_UNMAP_ADDR(mapping); }; -- cgit v1.2.3-70-g09d2 From b98eba52784fbd4a96241c5395c2c8d99fdb9433 Mon Sep 17 00:00:00 2001 From: Eddie Wai Date: Mon, 17 May 2010 17:32:56 -0700 Subject: bnx2: Fix register printouts during NETEV_WATCHDOG. Dump the correct MCP registers and add EMAC_RX_STATUS register during NETDEV_WATCHDOG for debugging. Signed-off-by: Eddie Wai Signed-off-by: Benjamin Li Signed-off-by: Michael Chan Signed-off-by: David S. Miller --- drivers/net/bnx2.c | 15 ++++++++++++--- drivers/net/bnx2.h | 2 ++ 2 files changed, 14 insertions(+), 3 deletions(-) (limited to 'drivers/net/bnx2.h') diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c index 667f4196dc2..c281218f6d5 100644 --- a/drivers/net/bnx2.c +++ b/drivers/net/bnx2.c @@ -6301,14 +6301,23 @@ static void bnx2_dump_state(struct bnx2 *bp) { struct net_device *dev = bp->dev; + u32 mcp_p0, mcp_p1; netdev_err(dev, "DEBUG: intr_sem[%x]\n", atomic_read(&bp->intr_sem)); - netdev_err(dev, "DEBUG: EMAC_TX_STATUS[%08x] RPM_MGMT_PKT_CTRL[%08x]\n", + netdev_err(dev, "DEBUG: EMAC_TX_STATUS[%08x] EMAC_RX_STATUS[%08x]\n", REG_RD(bp, BNX2_EMAC_TX_STATUS), + REG_RD(bp, BNX2_EMAC_RX_STATUS)); + netdev_err(dev, "DEBUG: RPM_MGMT_PKT_CTRL[%08x]\n", REG_RD(bp, BNX2_RPM_MGMT_PKT_CTRL)); + if (CHIP_NUM(bp) == CHIP_NUM_5709) { + mcp_p0 = BNX2_MCP_STATE_P0; + mcp_p1 = BNX2_MCP_STATE_P1; + } else { + mcp_p0 = BNX2_MCP_STATE_P0_5708; + mcp_p1 = BNX2_MCP_STATE_P1_5708; + } netdev_err(dev, "DEBUG: MCP_STATE_P0[%08x] MCP_STATE_P1[%08x]\n", - bnx2_reg_rd_ind(bp, BNX2_MCP_STATE_P0), - bnx2_reg_rd_ind(bp, BNX2_MCP_STATE_P1)); + bnx2_reg_rd_ind(bp, mcp_p0), bnx2_reg_rd_ind(bp, mcp_p1)); netdev_err(dev, "DEBUG: HC_STATS_INTERRUPT_STATUS[%08x]\n", REG_RD(bp, BNX2_HC_STATS_INTERRUPT_STATUS)); if (bp->flags & BNX2_FLAG_USING_MSIX) diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h index dd35bd0b7e0..ddaa3fc9987 100644 --- a/drivers/net/bnx2.h +++ b/drivers/net/bnx2.h @@ -6347,6 +6347,8 @@ struct l2_fhdr { #define BNX2_MCP_SCRATCH 0x00160000 #define BNX2_MCP_STATE_P1 0x0016f9c8 #define BNX2_MCP_STATE_P0 0x0016fdc8 +#define BNX2_MCP_STATE_P1_5708 0x001699c8 +#define BNX2_MCP_STATE_P0_5708 0x00169dc8 #define BNX2_SHM_HDR_SIGNATURE BNX2_MCP_SCRATCH #define BNX2_SHM_HDR_SIGNATURE_SIG_MASK 0xffff0000 -- cgit v1.2.3-70-g09d2