From af99a7507469d4fa6dd4d8d633e093b1ff7aff6e Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Tue, 21 May 2013 00:56:13 +0900 Subject: pinctrl: Add pinctrl-s3c24xx driver The s3c24xx pins follow a similar pattern as the other Samsung SoCs and can therefore reuse the already introduced infrastructure. The s3c24xx SoCs have one design oddity in that the first 4 external interrupts do not reside in the eint pending register but in the main interrupt controller instead. We solve this by forwarding the external interrupt from the main controller into the irq domain of the pin bank. The masking/acking of these interrupts is handled in the same way. Furthermore the S3C2412/2413 SoCs contain another oddity in that they keep the same 4 eints in the main interrupt controller and eintpend register and requiring ack operations to happen in both. This is solved by using different compatible properties for the wakeup eint node which set a property accordingly. Signed-off-by: Heiko Stuebner Reviewed-by: Tomasz Figa Reviewed-by: Sylwester Nawrocki Acked-by: Linus Walleij Signed-off-by: Kukjin Kim --- drivers/pinctrl/Kconfig | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'drivers/pinctrl/Kconfig') diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 8f669243814..526a5d04c21 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -216,6 +216,11 @@ config PINCTRL_EXYNOS5440 select PINMUX select PINCONF +config PINCTRL_S3C24XX + bool "Samsung S3C24XX SoC pinctrl driver" + depends on ARCH_S3C24XX + select PINCTRL_SAMSUNG + config PINCTRL_S3C64XX bool "Samsung S3C64XX SoC pinctrl driver" depends on ARCH_S3C64XX -- cgit v1.2.3-70-g09d2