From a6affbd5ccbb45e03168996bae4a4d0abb780874 Mon Sep 17 00:00:00 2001 From: "nagalakshmi.nandigama@lsi.com" Date: Thu, 1 Dec 2011 07:52:49 +0530 Subject: [SCSI] mpt2sas: MPI next revision header update 1)Removed Power Management Control option for PCIe link. 2)Added RAID Action for performing a compatibility check. Added product-specific range to RAID Action values. 3)Added PhysicalPort field to SAS Device Status Change Event data. 4)Added SpinupFlags field containing a Disable Spin-up bit to the SpinupGroupParameters fields of SAS IO Unit Page 4. Signed-off-by: Nagalakshmi Nandigama Signed-off-by: James Bottomley --- drivers/scsi/mpt2sas/mpi/mpi2_ioc.h | 23 +++++++++++++---------- 1 file changed, 13 insertions(+), 10 deletions(-) (limited to 'drivers/scsi/mpt2sas/mpi/mpi2_ioc.h') diff --git a/drivers/scsi/mpt2sas/mpi/mpi2_ioc.h b/drivers/scsi/mpt2sas/mpi/mpi2_ioc.h index 7b53be83e7e..9a925c07a9e 100644 --- a/drivers/scsi/mpt2sas/mpi/mpi2_ioc.h +++ b/drivers/scsi/mpt2sas/mpi/mpi2_ioc.h @@ -6,7 +6,7 @@ * Title: MPI IOC, Port, Event, FW Download, and FW Upload messages * Creation Date: October 11, 2006 * - * mpi2_ioc.h Version: 02.00.18 + * mpi2_ioc.h Version: 02.00.19 * * Version History * --------------- @@ -114,6 +114,9 @@ * MPI2_EXT_IMAGE_TYPE_MIN_PRODUCT_SPECIFIC and * MPI2_EXT_IMAGE_TYPE_MAX_PRODUCT_SPECIFIC defines. * Deprecated MPI2_EXT_IMAGE_TYPE_MAX define. + * 08-24-11 02.00.19 Added PhysicalPort field to + * MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE structure. + * Marked MPI2_PM_CONTROL_FEATURE_PCIE_LINK as obsolete. * -------------------------------------------------------------------------- */ @@ -582,7 +585,7 @@ typedef struct _MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE { U16 TaskTag; /* 0x00 */ U8 ReasonCode; /* 0x02 */ - U8 Reserved1; /* 0x03 */ + U8 PhysicalPort; /* 0x03 */ U8 ASC; /* 0x04 */ U8 ASCQ; /* 0x05 */ U16 DevHandle; /* 0x06 */ @@ -1574,7 +1577,7 @@ typedef struct _MPI2_PWR_MGMT_CONTROL_REQUEST { /* defines for the Feature field */ #define MPI2_PM_CONTROL_FEATURE_DA_PHY_POWER_COND (0x01) #define MPI2_PM_CONTROL_FEATURE_PORT_WIDTH_MODULATION (0x02) -#define MPI2_PM_CONTROL_FEATURE_PCIE_LINK (0x03) +#define MPI2_PM_CONTROL_FEATURE_PCIE_LINK (0x03) /* obsolete */ #define MPI2_PM_CONTROL_FEATURE_IOC_SPEED (0x04) #define MPI2_PM_CONTROL_FEATURE_MIN_PRODUCT_SPECIFIC (0x80) #define MPI2_PM_CONTROL_FEATURE_MAX_PRODUCT_SPECIFIC (0xFF) @@ -1603,14 +1606,14 @@ typedef struct _MPI2_PWR_MGMT_CONTROL_REQUEST { /* parameter usage for the MPI2_PM_CONTROL_FEATURE_PCIE_LINK Feature */ /* Parameter1 indicates desired PCIe link speed using these defines */ -#define MPI2_PM_CONTROL_PARAM1_PCIE_2_5_GBPS (0x00) -#define MPI2_PM_CONTROL_PARAM1_PCIE_5_0_GBPS (0x01) -#define MPI2_PM_CONTROL_PARAM1_PCIE_8_0_GBPS (0x02) +#define MPI2_PM_CONTROL_PARAM1_PCIE_2_5_GBPS (0x00) /* obsolete */ +#define MPI2_PM_CONTROL_PARAM1_PCIE_5_0_GBPS (0x01) /* obsolete */ +#define MPI2_PM_CONTROL_PARAM1_PCIE_8_0_GBPS (0x02) /* obsolete */ /* Parameter2 indicates desired PCIe link width using these defines */ -#define MPI2_PM_CONTROL_PARAM2_WIDTH_X1 (0x01) -#define MPI2_PM_CONTROL_PARAM2_WIDTH_X2 (0x02) -#define MPI2_PM_CONTROL_PARAM2_WIDTH_X4 (0x04) -#define MPI2_PM_CONTROL_PARAM2_WIDTH_X8 (0x08) +#define MPI2_PM_CONTROL_PARAM2_WIDTH_X1 (0x01) /* obsolete */ +#define MPI2_PM_CONTROL_PARAM2_WIDTH_X2 (0x02) /* obsolete */ +#define MPI2_PM_CONTROL_PARAM2_WIDTH_X4 (0x04) /* obsolete */ +#define MPI2_PM_CONTROL_PARAM2_WIDTH_X8 (0x08) /* obsolete */ /* Parameter3 and Parameter4 are reserved */ /* parameter usage for the MPI2_PM_CONTROL_FEATURE_IOC_SPEED Feature */ -- cgit v1.2.3-70-g09d2