From b6100992e31e61a2f252acb8df1f65c01f0b626d Mon Sep 17 00:00:00 2001 From: Sonic Zhang Date: Wed, 27 Oct 2010 04:16:47 -0400 Subject: serial: bfin_5xx: always include DMA headers On Blackfin systems, peripherals that have optional DMA support always route their interrupts through the corresponding DMA channel -- even when DMA is not being used. So in PIO mode, we still need to request the DMA channel (so interrupts are delivered) which means we need to always include the DMA header for the DMA defines/functions. Signed-off-by: Sonic Zhang Signed-off-by: Mike Frysinger Signed-off-by: Greg Kroah-Hartman --- drivers/serial/bfin_5xx.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) (limited to 'drivers/serial') diff --git a/drivers/serial/bfin_5xx.c b/drivers/serial/bfin_5xx.c index 351cc03578e..c8ca3b43487 100644 --- a/drivers/serial/bfin_5xx.c +++ b/drivers/serial/bfin_5xx.c @@ -23,6 +23,7 @@ #include #include #include +#include #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \ defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE) @@ -33,12 +34,10 @@ #include #include -#ifdef CONFIG_SERIAL_BFIN_DMA -#include +#include #include #include #include -#endif #ifdef CONFIG_SERIAL_BFIN_MODULE # undef CONFIG_EARLY_PRINTK @@ -688,6 +687,13 @@ static int bfin_serial_startup(struct uart_port *port) # ifdef CONFIG_BF54x { + /* + * UART2 and UART3 on BF548 share interrupt PINs and DMA + * controllers with SPORT2 and SPORT3. UART rx and tx + * interrupts are generated in PIO mode only when configure + * their peripheral mapping registers properly, which means + * request corresponding DMA channels in PIO mode as well. + */ unsigned uart_dma_ch_rx, uart_dma_ch_tx; switch (uart->port.irq) { -- cgit v1.2.3-70-g09d2