From 91565c4068042b3d8e37e64e393ca105476419bd Mon Sep 17 00:00:00 2001 From: Grant Likely Date: Thu, 14 Oct 2010 08:54:55 -0600 Subject: spi/xilinx: Eliminate pdata references from common code. The current code has the OF binding modifying the platform_data pointer which it must not do, and the common code doesn't really need to use a pdata pointer. This patch eliminates the platform_data references from the common part of the driver in preparation for merging the OF and non-OF versions. Signed-off-by: Grant Likely Tested-by: Michal Simek --- drivers/spi/xilinx_spi.c | 14 ++++---------- drivers/spi/xilinx_spi.h | 2 +- drivers/spi/xilinx_spi_of.c | 17 ++++------------- drivers/spi/xilinx_spi_pltfm.c | 4 +++- 4 files changed, 12 insertions(+), 25 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c index 80f2db5bcfd..efb28ba4a4e 100644 --- a/drivers/spi/xilinx_spi.c +++ b/drivers/spi/xilinx_spi.c @@ -351,18 +351,12 @@ static irqreturn_t xilinx_spi_irq(int irq, void *dev_id) } struct spi_master *xilinx_spi_init(struct device *dev, struct resource *mem, - u32 irq, s16 bus_num) + u32 irq, s16 bus_num, int num_cs, int little_endian, int bits_per_word) { struct spi_master *master; struct xilinx_spi *xspi; - struct xspi_platform_data *pdata = dev->platform_data; int ret; - if (!pdata) { - dev_err(dev, "No platform data attached\n"); - return NULL; - } - master = spi_alloc_master(dev, sizeof(struct xilinx_spi)); if (!master) return NULL; @@ -389,21 +383,21 @@ struct spi_master *xilinx_spi_init(struct device *dev, struct resource *mem, } master->bus_num = bus_num; - master->num_chipselect = pdata->num_chipselect; + master->num_chipselect = num_cs; #ifdef CONFIG_OF master->dev.of_node = dev->of_node; #endif xspi->mem = *mem; xspi->irq = irq; - if (pdata->little_endian) { + if (little_endian) { xspi->read_fn = xspi_read32; xspi->write_fn = xspi_write32; } else { xspi->read_fn = xspi_read32_be; xspi->write_fn = xspi_write32_be; } - xspi->bits_per_word = pdata->bits_per_word; + xspi->bits_per_word = bits_per_word; if (xspi->bits_per_word == 8) { xspi->tx_fn = xspi_tx8; xspi->rx_fn = xspi_rx8; diff --git a/drivers/spi/xilinx_spi.h b/drivers/spi/xilinx_spi.h index d211accf68d..d710a33f569 100644 --- a/drivers/spi/xilinx_spi.h +++ b/drivers/spi/xilinx_spi.h @@ -26,7 +26,7 @@ #define XILINX_SPI_NAME "xilinx_spi" struct spi_master *xilinx_spi_init(struct device *dev, struct resource *mem, - u32 irq, s16 bus_num); + u32 irq, s16 bus_num, int num_cs, int little_endian, int bits_per_word); void xilinx_spi_deinit(struct spi_master *master); #endif diff --git a/drivers/spi/xilinx_spi_of.c b/drivers/spi/xilinx_spi_of.c index b66c2dbf20a..c2d8ade87a3 100644 --- a/drivers/spi/xilinx_spi_of.c +++ b/drivers/spi/xilinx_spi_of.c @@ -42,12 +42,11 @@ static int __devinit xilinx_spi_of_probe(struct platform_device *ofdev, const struct of_device_id *match) { struct spi_master *master; - struct xspi_platform_data *pdata; struct resource r_mem; struct resource r_irq; int rc = 0; const u32 *prop; - int len; + int len, num_cs; rc = of_address_to_resource(ofdev->dev.of_node, 0, &r_mem); if (rc) { @@ -61,21 +60,15 @@ static int __devinit xilinx_spi_of_probe(struct platform_device *ofdev, return -ENODEV; } - ofdev->dev.platform_data = - kzalloc(sizeof(struct xspi_platform_data), GFP_KERNEL); - pdata = ofdev->dev.platform_data; - if (!pdata) - return -ENOMEM; - /* number of slave select bits is required */ prop = of_get_property(ofdev->dev.of_node, "xlnx,num-ss-bits", &len); if (!prop || len < sizeof(*prop)) { dev_warn(&ofdev->dev, "no 'xlnx,num-ss-bits' property\n"); return -EINVAL; } - pdata->num_chipselect = *prop; - pdata->bits_per_word = 8; - master = xilinx_spi_init(&ofdev->dev, &r_mem, r_irq.start, -1); + num_cs = __be32_to_cpup(prop); + master = xilinx_spi_init(&ofdev->dev, &r_mem, r_irq.start, -1, + num_cs, 0, 8); if (!master) return -ENODEV; @@ -88,8 +81,6 @@ static int __devexit xilinx_spi_remove(struct platform_device *ofdev) { xilinx_spi_deinit(dev_get_drvdata(&ofdev->dev)); dev_set_drvdata(&ofdev->dev, 0); - kfree(ofdev->dev.platform_data); - ofdev->dev.platform_data = NULL; return 0; } diff --git a/drivers/spi/xilinx_spi_pltfm.c b/drivers/spi/xilinx_spi_pltfm.c index 24debac646a..a16722acafe 100644 --- a/drivers/spi/xilinx_spi_pltfm.c +++ b/drivers/spi/xilinx_spi_pltfm.c @@ -54,7 +54,9 @@ static int __devinit xilinx_spi_probe(struct platform_device *dev) if (irq < 0) return -ENXIO; - master = xilinx_spi_init(&dev->dev, r, irq, dev->id); + master = xilinx_spi_init(&dev->dev, r, irq, dev->id, + pdata->num_chipselect, pdata->little_endian, + pdata->bits_per_word); if (!master) return -ENODEV; -- cgit v1.2.3-70-g09d2 From 8fd8821b62397f8ddb7bfb23c3246a22770ab2ee Mon Sep 17 00:00:00 2001 From: Grant Likely Date: Thu, 14 Oct 2010 09:04:29 -0600 Subject: spi/xilinx: fold platform_driver support into main body This patch merges the platform driver support into the main body of xilinx_spi.c in preparation for merging the OF and non-OF support code. Signed-off-by: Grant Likely Tested-by: Michal Simek --- drivers/spi/Kconfig | 7 --- drivers/spi/Makefile | 1 - drivers/spi/xilinx_spi.c | 79 ++++++++++++++++++++++++++++--- drivers/spi/xilinx_spi_pltfm.c | 104 ----------------------------------------- 4 files changed, 73 insertions(+), 118 deletions(-) delete mode 100644 drivers/spi/xilinx_spi_pltfm.c (limited to 'drivers/spi') diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 78f9fd02c1b..58ad21c700d 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -368,13 +368,6 @@ config SPI_XILINX_OF help This is the OF driver for the SPI controller IP from the Xilinx EDK. -config SPI_XILINX_PLTFM - tristate "Xilinx SPI controller platform device" - depends on SPI_XILINX - help - This is the platform driver for the SPI controller IP - from the Xilinx EDK. - config SPI_NUC900 tristate "Nuvoton NUC900 series SPI" depends on ARCH_W90X900 && EXPERIMENTAL diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 8bc1a5abac1..0d03159b566 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -44,7 +44,6 @@ obj-$(CONFIG_SPI_TOPCLIFF_PCH) += spi_topcliff_pch.o obj-$(CONFIG_SPI_TXX9) += spi_txx9.o obj-$(CONFIG_SPI_XILINX) += xilinx_spi.o obj-$(CONFIG_SPI_XILINX_OF) += xilinx_spi_of.o -obj-$(CONFIG_SPI_XILINX_PLTFM) += xilinx_spi_pltfm.o obj-$(CONFIG_SPI_SH_SCI) += spi_sh_sci.o obj-$(CONFIG_SPI_SH_MSIOF) += spi_sh_msiof.o obj-$(CONFIG_SPI_STMP3XXX) += spi_stmp.o diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c index efb28ba4a4e..bb3b520df9d 100644 --- a/drivers/spi/xilinx_spi.c +++ b/drivers/spi/xilinx_spi.c @@ -1,20 +1,22 @@ /* - * xilinx_spi.c - * * Xilinx SPI controller driver (master mode only) * * Author: MontaVista Software, Inc. * source@mvista.com * - * 2002-2007 (c) MontaVista Software, Inc. This file is licensed under the - * terms of the GNU General Public License version 2. This program is licensed - * "as is" without any warranty of any kind, whether express or implied. + * Copyright (c) 2010 Secret Lab Technologies, Ltd. + * Copyright (c) 2009 Intel Corporation + * 2002-2007 (c) MontaVista Software, Inc. + + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. */ #include #include #include - +#include #include #include #include @@ -456,6 +458,71 @@ void xilinx_spi_deinit(struct spi_master *master) } EXPORT_SYMBOL(xilinx_spi_deinit); +static int __devinit xilinx_spi_probe(struct platform_device *dev) +{ + struct xspi_platform_data *pdata; + struct resource *r; + int irq; + struct spi_master *master; + u8 i; + + pdata = dev->dev.platform_data; + if (!pdata) + return -ENODEV; + + r = platform_get_resource(dev, IORESOURCE_MEM, 0); + if (!r) + return -ENODEV; + + irq = platform_get_irq(dev, 0); + if (irq < 0) + return -ENXIO; + + master = xilinx_spi_init(&dev->dev, r, irq, dev->id, + pdata->num_chipselect, pdata->little_endian, + pdata->bits_per_word); + if (!master) + return -ENODEV; + + for (i = 0; i < pdata->num_devices; i++) + spi_new_device(master, pdata->devices + i); + + platform_set_drvdata(dev, master); + return 0; +} + +static int __devexit xilinx_spi_remove(struct platform_device *dev) +{ + xilinx_spi_deinit(platform_get_drvdata(dev)); + platform_set_drvdata(dev, 0); + + return 0; +} + +/* work with hotplug and coldplug */ +MODULE_ALIAS("platform:" XILINX_SPI_NAME); + +static struct platform_driver xilinx_spi_driver = { + .probe = xilinx_spi_probe, + .remove = __devexit_p(xilinx_spi_remove), + .driver = { + .name = XILINX_SPI_NAME, + .owner = THIS_MODULE, + }, +}; + +static int __init xilinx_spi_pltfm_init(void) +{ + return platform_driver_register(&xilinx_spi_driver); +} +module_init(xilinx_spi_pltfm_init); + +static void __exit xilinx_spi_pltfm_exit(void) +{ + platform_driver_unregister(&xilinx_spi_driver); +} +module_exit(xilinx_spi_pltfm_exit); + MODULE_AUTHOR("MontaVista Software, Inc. "); MODULE_DESCRIPTION("Xilinx SPI driver"); MODULE_LICENSE("GPL"); diff --git a/drivers/spi/xilinx_spi_pltfm.c b/drivers/spi/xilinx_spi_pltfm.c deleted file mode 100644 index a16722acafe..00000000000 --- a/drivers/spi/xilinx_spi_pltfm.c +++ /dev/null @@ -1,104 +0,0 @@ -/* - * Support for Xilinx SPI platform devices - * Copyright (c) 2009 Intel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -/* Supports: - * Xilinx SPI devices as platform devices - * - * Inspired by xilinx_spi.c, 2002-2007 (c) MontaVista Software, Inc. - */ - -#include -#include -#include -#include -#include - -#include -#include -#include - -#include "xilinx_spi.h" - -static int __devinit xilinx_spi_probe(struct platform_device *dev) -{ - struct xspi_platform_data *pdata; - struct resource *r; - int irq; - struct spi_master *master; - u8 i; - - pdata = dev->dev.platform_data; - if (!pdata) - return -ENODEV; - - r = platform_get_resource(dev, IORESOURCE_MEM, 0); - if (!r) - return -ENODEV; - - irq = platform_get_irq(dev, 0); - if (irq < 0) - return -ENXIO; - - master = xilinx_spi_init(&dev->dev, r, irq, dev->id, - pdata->num_chipselect, pdata->little_endian, - pdata->bits_per_word); - if (!master) - return -ENODEV; - - for (i = 0; i < pdata->num_devices; i++) - spi_new_device(master, pdata->devices + i); - - platform_set_drvdata(dev, master); - return 0; -} - -static int __devexit xilinx_spi_remove(struct platform_device *dev) -{ - xilinx_spi_deinit(platform_get_drvdata(dev)); - platform_set_drvdata(dev, 0); - - return 0; -} - -/* work with hotplug and coldplug */ -MODULE_ALIAS("platform:" XILINX_SPI_NAME); - -static struct platform_driver xilinx_spi_driver = { - .probe = xilinx_spi_probe, - .remove = __devexit_p(xilinx_spi_remove), - .driver = { - .name = XILINX_SPI_NAME, - .owner = THIS_MODULE, - }, -}; - -static int __init xilinx_spi_pltfm_init(void) -{ - return platform_driver_register(&xilinx_spi_driver); -} -module_init(xilinx_spi_pltfm_init); - -static void __exit xilinx_spi_pltfm_exit(void) -{ - platform_driver_unregister(&xilinx_spi_driver); -} -module_exit(xilinx_spi_pltfm_exit); - -MODULE_AUTHOR("Mocean Laboratories "); -MODULE_DESCRIPTION("Xilinx SPI platform driver"); -MODULE_LICENSE("GPL v2"); -- cgit v1.2.3-70-g09d2 From eae6cb31d890e2860f9ce1b8ba73c27b6005af68 Mon Sep 17 00:00:00 2001 From: Grant Likely Date: Thu, 14 Oct 2010 09:32:53 -0600 Subject: spi/xilinx: merge OF support code into main driver Now that the of_platform_bus_type has been merged with the platform bus type, a single platform driver can handle both OF and non-OF use cases. This patch merges the OF support into the platform driver. Signed-off-by: Grant Likely Tested-by: Michal Simek --- drivers/spi/Kconfig | 7 --- drivers/spi/Makefile | 1 - drivers/spi/xilinx_spi.c | 56 ++++++++++++++++---- drivers/spi/xilinx_spi.h | 32 ------------ drivers/spi/xilinx_spi_of.c | 124 -------------------------------------------- 5 files changed, 45 insertions(+), 175 deletions(-) delete mode 100644 drivers/spi/xilinx_spi.h delete mode 100644 drivers/spi/xilinx_spi_of.c (limited to 'drivers/spi') diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 58ad21c700d..665d03d4e02 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -353,7 +353,6 @@ config SPI_XILINX tristate "Xilinx SPI controller common module" depends on HAS_IOMEM && EXPERIMENTAL select SPI_BITBANG - select SPI_XILINX_OF if (XILINX_VIRTEX || MICROBLAZE) help This exposes the SPI controller IP from the Xilinx EDK. @@ -362,12 +361,6 @@ config SPI_XILINX Or for the DS570, see "XPS Serial Peripheral Interface (SPI) (v2.00b)" -config SPI_XILINX_OF - tristate "Xilinx SPI controller OF device" - depends on SPI_XILINX && (XILINX_VIRTEX || MICROBLAZE) - help - This is the OF driver for the SPI controller IP from the Xilinx EDK. - config SPI_NUC900 tristate "Nuvoton NUC900 series SPI" depends on ARCH_W90X900 && EXPERIMENTAL diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 0d03159b566..02dad4ae412 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -43,7 +43,6 @@ obj-$(CONFIG_SPI_TEGRA) += spi_tegra.o obj-$(CONFIG_SPI_TOPCLIFF_PCH) += spi_topcliff_pch.o obj-$(CONFIG_SPI_TXX9) += spi_txx9.o obj-$(CONFIG_SPI_XILINX) += xilinx_spi.o -obj-$(CONFIG_SPI_XILINX_OF) += xilinx_spi_of.o obj-$(CONFIG_SPI_SH_SCI) += spi_sh_sci.o obj-$(CONFIG_SPI_SH_MSIOF) += spi_sh_msiof.o obj-$(CONFIG_SPI_STMP3XXX) += spi_stmp.o diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c index bb3b520df9d..7adaef62a99 100644 --- a/drivers/spi/xilinx_spi.c +++ b/drivers/spi/xilinx_spi.c @@ -16,13 +16,12 @@ #include #include #include +#include #include #include #include -#include - -#include "xilinx_spi.h" #include +#include #define XILINX_SPI_NAME "xilinx_spi" @@ -352,6 +351,15 @@ static irqreturn_t xilinx_spi_irq(int irq, void *dev_id) return IRQ_HANDLED; } +#ifdef CONFIG_OF +static const struct of_device_id xilinx_spi_of_match[] = { + { .compatible = "xlnx,xps-spi-2.00.a", }, + { .compatible = "xlnx,xps-spi-2.00.b", }, + {} +}; +MODULE_DEVICE_TABLE(of, xilinx_spi_of_match); +#endif + struct spi_master *xilinx_spi_init(struct device *dev, struct resource *mem, u32 irq, s16 bus_num, int num_cs, int little_endian, int bits_per_word) { @@ -462,13 +470,35 @@ static int __devinit xilinx_spi_probe(struct platform_device *dev) { struct xspi_platform_data *pdata; struct resource *r; - int irq; + int irq, num_cs = 0, little_endian = 0, bits_per_word = 8; struct spi_master *master; u8 i; pdata = dev->dev.platform_data; - if (!pdata) - return -ENODEV; + if (pdata) { + num_cs = pdata->num_chipselect; + little_endian = pdata->little_endian; + bits_per_word = pdata->bits_per_word; + } + +#ifdef CONFIG_OF + if (dev->dev.of_node) { + const __be32 *prop; + int len; + + /* number of slave select bits is required */ + prop = of_get_property(dev->dev.of_node, "xlnx,num-ss-bits", + &len); + if (prop && len >= sizeof(*prop)) + num_cs = __be32_to_cpup(prop); + } +#endif + + if (!num_cs) { + dev_err(&dev->dev, "Missing slave select configuration data\n"); + return -EINVAL; + } + r = platform_get_resource(dev, IORESOURCE_MEM, 0); if (!r) @@ -478,14 +508,15 @@ static int __devinit xilinx_spi_probe(struct platform_device *dev) if (irq < 0) return -ENXIO; - master = xilinx_spi_init(&dev->dev, r, irq, dev->id, - pdata->num_chipselect, pdata->little_endian, - pdata->bits_per_word); + master = xilinx_spi_init(&dev->dev, r, irq, dev->id, num_cs, + little_endian, bits_per_word); if (!master) return -ENODEV; - for (i = 0; i < pdata->num_devices; i++) - spi_new_device(master, pdata->devices + i); + if (pdata) { + for (i = 0; i < pdata->num_devices; i++) + spi_new_device(master, pdata->devices + i); + } platform_set_drvdata(dev, master); return 0; @@ -508,6 +539,9 @@ static struct platform_driver xilinx_spi_driver = { .driver = { .name = XILINX_SPI_NAME, .owner = THIS_MODULE, +#ifdef CONFIG_OF + .of_match_table = xilinx_spi_of_match, +#endif }, }; diff --git a/drivers/spi/xilinx_spi.h b/drivers/spi/xilinx_spi.h deleted file mode 100644 index d710a33f569..00000000000 --- a/drivers/spi/xilinx_spi.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Xilinx SPI device driver API and platform data header file - * - * Copyright (c) 2009 Intel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef _XILINX_SPI_H_ -#define _XILINX_SPI_H_ - -#include -#include - -#define XILINX_SPI_NAME "xilinx_spi" - -struct spi_master *xilinx_spi_init(struct device *dev, struct resource *mem, - u32 irq, s16 bus_num, int num_cs, int little_endian, int bits_per_word); - -void xilinx_spi_deinit(struct spi_master *master); -#endif diff --git a/drivers/spi/xilinx_spi_of.c b/drivers/spi/xilinx_spi_of.c deleted file mode 100644 index c2d8ade87a3..00000000000 --- a/drivers/spi/xilinx_spi_of.c +++ /dev/null @@ -1,124 +0,0 @@ -/* - * Xilinx SPI OF device driver - * - * Copyright (c) 2009 Intel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -/* Supports: - * Xilinx SPI devices as OF devices - * - * Inspired by xilinx_spi.c, 2002-2007 (c) MontaVista Software, Inc. - */ - -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include "xilinx_spi.h" - - -static int __devinit xilinx_spi_of_probe(struct platform_device *ofdev, - const struct of_device_id *match) -{ - struct spi_master *master; - struct resource r_mem; - struct resource r_irq; - int rc = 0; - const u32 *prop; - int len, num_cs; - - rc = of_address_to_resource(ofdev->dev.of_node, 0, &r_mem); - if (rc) { - dev_warn(&ofdev->dev, "invalid address\n"); - return rc; - } - - rc = of_irq_to_resource(ofdev->dev.of_node, 0, &r_irq); - if (rc == NO_IRQ) { - dev_warn(&ofdev->dev, "no IRQ found\n"); - return -ENODEV; - } - - /* number of slave select bits is required */ - prop = of_get_property(ofdev->dev.of_node, "xlnx,num-ss-bits", &len); - if (!prop || len < sizeof(*prop)) { - dev_warn(&ofdev->dev, "no 'xlnx,num-ss-bits' property\n"); - return -EINVAL; - } - num_cs = __be32_to_cpup(prop); - master = xilinx_spi_init(&ofdev->dev, &r_mem, r_irq.start, -1, - num_cs, 0, 8); - if (!master) - return -ENODEV; - - dev_set_drvdata(&ofdev->dev, master); - - return 0; -} - -static int __devexit xilinx_spi_remove(struct platform_device *ofdev) -{ - xilinx_spi_deinit(dev_get_drvdata(&ofdev->dev)); - dev_set_drvdata(&ofdev->dev, 0); - return 0; -} - -static int __exit xilinx_spi_of_remove(struct platform_device *op) -{ - return xilinx_spi_remove(op); -} - -static const struct of_device_id xilinx_spi_of_match[] = { - { .compatible = "xlnx,xps-spi-2.00.a", }, - { .compatible = "xlnx,xps-spi-2.00.b", }, - {} -}; - -MODULE_DEVICE_TABLE(of, xilinx_spi_of_match); - -static struct of_platform_driver xilinx_spi_of_driver = { - .probe = xilinx_spi_of_probe, - .remove = __exit_p(xilinx_spi_of_remove), - .driver = { - .name = "xilinx-xps-spi", - .owner = THIS_MODULE, - .of_match_table = xilinx_spi_of_match, - }, -}; - -static int __init xilinx_spi_of_init(void) -{ - return of_register_platform_driver(&xilinx_spi_of_driver); -} -module_init(xilinx_spi_of_init); - -static void __exit xilinx_spi_of_exit(void) -{ - of_unregister_platform_driver(&xilinx_spi_of_driver); -} -module_exit(xilinx_spi_of_exit); - -MODULE_AUTHOR("Mocean Laboratories "); -MODULE_DESCRIPTION("Xilinx SPI platform driver"); -MODULE_LICENSE("GPL v2"); -- cgit v1.2.3-70-g09d2 From bc3f67a3e1b20756d4bfa5886a6b8fd0c068e6a4 Mon Sep 17 00:00:00 2001 From: Joe Perches Date: Sun, 14 Nov 2010 19:04:47 -0800 Subject: drivers/spi: Remove unnecessary semicolons Signed-off-by: Joe Perches Signed-off-by: Grant Likely --- drivers/spi/amba-pl022.c | 2 +- drivers/spi/spi_nuc900.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/amba-pl022.c b/drivers/spi/amba-pl022.c index fb3d1b31772..2e506319b60 100644 --- a/drivers/spi/amba-pl022.c +++ b/drivers/spi/amba-pl022.c @@ -956,7 +956,7 @@ static int configure_dma(struct pl022 *pl022) tx_conf.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; break; case WRITING_U32: - tx_conf.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;; + tx_conf.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; break; } diff --git a/drivers/spi/spi_nuc900.c b/drivers/spi/spi_nuc900.c index dff63be0d0a..d5be18b3078 100644 --- a/drivers/spi/spi_nuc900.c +++ b/drivers/spi/spi_nuc900.c @@ -449,7 +449,7 @@ err_iomap: release_mem_region(hw->res->start, resource_size(hw->res)); kfree(hw->ioarea); err_pdata: - spi_master_put(hw->master);; + spi_master_put(hw->master); err_nomem: return err; -- cgit v1.2.3-70-g09d2 From 3b740b10e9424f7ffb9baab1e6a3ff361cbf8ce3 Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Fri, 3 Sep 2010 14:50:07 +0530 Subject: spi: davinci: fix checkpatch errors Fix the following checkpatch error: WARNING: unnecessary whitespace before a quoted newline + dev_info(&pdev->dev, "Controller at 0x%p \n", davinci_spi->base); Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index b85090caf7c..6b047622521 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -1184,7 +1184,7 @@ static int davinci_spi_probe(struct platform_device *pdev) if (ret) goto free_clk; - dev_info(&pdev->dev, "Controller at 0x%p \n", davinci_spi->base); + dev_info(&pdev->dev, "Controller at 0x%p\n", davinci_spi->base); if (!pdata->poll_mode) dev_info(&pdev->dev, "Operating in interrupt mode" -- cgit v1.2.3-70-g09d2 From 778e261ed678c3654386fc38bc6c50353ce04cc7 Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Fri, 3 Sep 2010 15:15:06 +0530 Subject: spi: davinci: whitespace cleanup Cleanup unnecessary white space from various parts of the file. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 22 ++++++++++------------ 1 file changed, 10 insertions(+), 12 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 6b047622521..2fa5bec807c 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -175,7 +175,7 @@ struct davinci_spi { u8 *tmp_buf; int count; struct davinci_spi_dma *dma_channels; - struct davinci_spi_platform_data *pdata; + struct davinci_spi_platform_data *pdata; void (*get_rx)(u32 rx_data, struct davinci_spi *); u32 (*get_tx)(struct davinci_spi *); @@ -435,7 +435,6 @@ static int davinci_spi_request_dma(struct spi_device *spi) * * This functions sets the default transfer method. */ - static int davinci_spi_setup(struct spi_device *spi) { int retval; @@ -1096,7 +1095,6 @@ static int davinci_spi_probe(struct platform_device *pdev) } clk_enable(davinci_spi->clk); - master->bus_num = pdev->id; master->num_chipselect = pdata->num_chipselect; master->setup = davinci_spi_setup; @@ -1113,15 +1111,15 @@ static int davinci_spi_probe(struct platform_device *pdev) davinci_spi->bitbang.flags |= SPI_READY; if (use_dma) { - r = platform_get_resource(pdev, IORESOURCE_DMA, 0); - if (r) - dma_rx_chan = r->start; - r = platform_get_resource(pdev, IORESOURCE_DMA, 1); - if (r) - dma_tx_chan = r->start; - r = platform_get_resource(pdev, IORESOURCE_DMA, 2); - if (r) - dma_eventq = r->start; + r = platform_get_resource(pdev, IORESOURCE_DMA, 0); + if (r) + dma_rx_chan = r->start; + r = platform_get_resource(pdev, IORESOURCE_DMA, 1); + if (r) + dma_tx_chan = r->start; + r = platform_get_resource(pdev, IORESOURCE_DMA, 2); + if (r) + dma_eventq = r->start; } if (!use_dma || -- cgit v1.2.3-70-g09d2 From c3c475c2353f6d13a5c77c3b6203c0240339da7d Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Fri, 3 Sep 2010 16:19:09 +0530 Subject: spi: davinci: remove unused variable 'pdata' The 'pdata' variable is unused in couple of routines. Remove such occurences. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 8 -------- 1 file changed, 8 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 2fa5bec807c..a92f507eaff 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -299,12 +299,10 @@ static int davinci_spi_setup_transfer(struct spi_device *spi, { struct davinci_spi *davinci_spi; - struct davinci_spi_platform_data *pdata; u8 bits_per_word = 0; u32 hz = 0, prescale = 0, clkspeed; davinci_spi = spi_master_get_devdata(spi->master); - pdata = davinci_spi->pdata; if (t) { bits_per_word = t->bits_per_word; @@ -357,11 +355,9 @@ static void davinci_spi_dma_rx_callback(unsigned lch, u16 ch_status, void *data) struct spi_device *spi = (struct spi_device *)data; struct davinci_spi *davinci_spi; struct davinci_spi_dma *davinci_spi_dma; - struct davinci_spi_platform_data *pdata; davinci_spi = spi_master_get_devdata(spi->master); davinci_spi_dma = &(davinci_spi->dma_channels[spi->chip_select]); - pdata = davinci_spi->pdata; if (ch_status == DMA_COMPLETE) edma_stop(davinci_spi_dma->dma_rx_channel); @@ -378,11 +374,9 @@ static void davinci_spi_dma_tx_callback(unsigned lch, u16 ch_status, void *data) struct spi_device *spi = (struct spi_device *)data; struct davinci_spi *davinci_spi; struct davinci_spi_dma *davinci_spi_dma; - struct davinci_spi_platform_data *pdata; davinci_spi = spi_master_get_devdata(spi->master); davinci_spi_dma = &(davinci_spi->dma_channels[spi->chip_select]); - pdata = davinci_spi->pdata; if (ch_status == DMA_COMPLETE) edma_stop(davinci_spi_dma->dma_tx_channel); @@ -398,13 +392,11 @@ static int davinci_spi_request_dma(struct spi_device *spi) { struct davinci_spi *davinci_spi; struct davinci_spi_dma *davinci_spi_dma; - struct davinci_spi_platform_data *pdata; struct device *sdev; int r; davinci_spi = spi_master_get_devdata(spi->master); davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select]; - pdata = davinci_spi->pdata; sdev = davinci_spi->bitbang.master->dev.parent; r = edma_alloc_channel(davinci_spi_dma->dma_rx_sync_dev, -- cgit v1.2.3-70-g09d2 From 8e206f1cbd0d1387bf7d5e463ca880b43458e2ea Mon Sep 17 00:00:00 2001 From: Sekhar Nori Date: Fri, 20 Aug 2010 16:20:49 +0530 Subject: spi: davinci: removed unused #defines Remove unused defines from code which should help in easy reading of code. Also, use the opportuinity to keep the SPIGCR1 register defines together. Tested-By: Michael Williamson Tested-By: Brian Niebuhr Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 33 ++------------------------------- 1 file changed, 2 insertions(+), 31 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index a92f507eaff..7bd0a55f5bb 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -54,16 +54,12 @@ #define SPIFMT_WDELAY_SHIFT 24 #define SPIFMT_CHARLEN_MASK 0x0000001Fu -/* SPIGCR1 */ -#define SPIGCR1_SPIENA_MASK 0x01000000u /* SPIPC0 */ #define SPIPC0_DIFUN_MASK BIT(11) /* MISO */ #define SPIPC0_DOFUN_MASK BIT(10) /* MOSI */ #define SPIPC0_CLKFUN_MASK BIT(9) /* CLK */ #define SPIPC0_SPIENA_MASK BIT(8) /* nREADY */ -#define SPIPC0_EN1FUN_MASK BIT(1) -#define SPIPC0_EN0FUN_MASK BIT(0) #define SPIINT_MASKALL 0x0101035F #define SPI_INTLVL_1 0x000001FFu @@ -75,6 +71,7 @@ #define SPIGCR1_CLKMOD_MASK BIT(1) #define SPIGCR1_MASTER_MASK BIT(0) #define SPIGCR1_LOOPBACK_MASK BIT(16) +#define SPIGCR1_SPIENA_MASK BIT(24) /* SPIBUF */ #define SPIBUF_TXFULL_MASK BIT(29) @@ -90,23 +87,12 @@ #define SPIFLG_RX_INTR_MASK BIT(8) #define SPIFLG_TX_INTR_MASK BIT(9) #define SPIFLG_BUF_INIT_ACTIVE_MASK BIT(24) -#define SPIFLG_MASK (SPIFLG_DLEN_ERR_MASK \ - | SPIFLG_TIMEOUT_MASK | SPIFLG_PARERR_MASK \ - | SPIFLG_DESYNC_MASK | SPIFLG_BITERR_MASK \ - | SPIFLG_OVRRUN_MASK | SPIFLG_RX_INTR_MASK \ - | SPIFLG_TX_INTR_MASK \ - | SPIFLG_BUF_INIT_ACTIVE_MASK) - -#define SPIINT_DLEN_ERR_INTR BIT(0) -#define SPIINT_TIMEOUT_INTR BIT(1) -#define SPIINT_PARERR_INTR BIT(2) -#define SPIINT_DESYNC_INTR BIT(3) + #define SPIINT_BITERR_INTR BIT(4) #define SPIINT_OVRRUN_INTR BIT(6) #define SPIINT_RX_INTR BIT(8) #define SPIINT_TX_INTR BIT(9) #define SPIINT_DMA_REQ_EN BIT(16) -#define SPIINT_ENABLE_HIGHZ BIT(24) #define SPI_T2CDELAY_SHIFT 16 #define SPI_C2TDELAY_SHIFT 24 @@ -118,26 +104,11 @@ #define SPILVL 0x0c #define SPIFLG 0x10 #define SPIPC0 0x14 -#define SPIPC1 0x18 -#define SPIPC2 0x1c -#define SPIPC3 0x20 -#define SPIPC4 0x24 -#define SPIPC5 0x28 -#define SPIPC6 0x2c -#define SPIPC7 0x30 -#define SPIPC8 0x34 -#define SPIDAT0 0x38 #define SPIDAT1 0x3c #define SPIBUF 0x40 -#define SPIEMU 0x44 #define SPIDELAY 0x48 #define SPIDEF 0x4c #define SPIFMT0 0x50 -#define SPIFMT1 0x54 -#define SPIFMT2 0x58 -#define SPIFMT3 0x5c -#define TGINTVEC0 0x60 -#define TGINTVEC1 0x64 struct davinci_spi_slave { u32 cmd_to_write; -- cgit v1.2.3-70-g09d2 From 50356dd7c1f6338588af6a745649a718f16fe453 Mon Sep 17 00:00:00 2001 From: Sekhar Nori Date: Fri, 8 Oct 2010 15:27:26 +0530 Subject: spi: davinci: remove unnecessary typecast The typecasting of SPI base address to davinci_spi_reg is unused. Remove it. Tested-By: Michael Williamson Tested-By: Brian Niebuhr Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 7bd0a55f5bb..76decda0c8d 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -1020,8 +1020,7 @@ static int davinci_spi_probe(struct platform_device *pdev) goto free_master; } - davinci_spi->base = (struct davinci_spi_reg __iomem *) - ioremap(r->start, davinci_spi->region_size); + davinci_spi->base = ioremap(r->start, davinci_spi->region_size); if (davinci_spi->base == NULL) { ret = -ENOMEM; goto release_region; -- cgit v1.2.3-70-g09d2 From 843a713bc53d04f8fac46ddd8693a2cc0422ca5e Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Thu, 12 Aug 2010 12:49:05 +0530 Subject: spi: davinci: set chip-select mode in SPIDEF only once Quit writing the same constant value determining the chip-select mode when no transmissions are in progress in davinci_spi_chipelect(). Instead just setup the SPIDEF register once during probe. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 76decda0c8d..d6b6a495808 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -245,8 +245,6 @@ static void davinci_spi_chipselect(struct spi_device *spi, int value) * line for the controller */ if (value == BITBANG_CS_INACTIVE) { - set_io_bits(davinci_spi->base + SPIDEF, CS_DEFAULT); - data1_reg_val |= CS_DEFAULT << SPIDAT1_CSNR_SHIFT; iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1); @@ -1132,6 +1130,8 @@ static int davinci_spi_probe(struct platform_device *pdev) clear_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_CLKMOD_MASK); + iowrite32(CS_DEFAULT, davinci_spi->base + SPIDEF); + /* master mode default */ set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_MASTER_MASK); -- cgit v1.2.3-70-g09d2 From 7978b8c385a86f0b5b9304e81a1dfb5dcaf21528 Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Fri, 13 Aug 2010 10:11:03 +0530 Subject: spi: davinci: enable both activation and deactivation of chip-selects Let davinci_spi_chipselect() perform both activation and deactivation of chip selects. This lets spi_bitbang fully control chip select activation, as intended by the SPI API. With this change, the chip select activation code need not be duplicated in davinci_spi_bufs_{pio|dma}(). Also, keeping chip select active control is removed as a platform data and simply controlled using information from spi_bitbang on whether chip slect should be activated or de-activated. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/dm355.c | 1 - arch/arm/mach-davinci/dm365.c | 1 - arch/arm/mach-davinci/include/mach/spi.h | 1 - drivers/spi/davinci_spi.c | 53 +++++++++++--------------------- 4 files changed, 18 insertions(+), 38 deletions(-) (limited to 'drivers/spi') diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index 9be261beae7..6a76dfa60ef 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c @@ -413,7 +413,6 @@ static struct davinci_spi_platform_data dm355_spi0_pdata = { .version = SPI_VERSION_1, .num_chipselect = 2, .clk_internal = 1, - .cs_hold = 1, .intr_level = 0, .poll_mode = 1, /* 0 -> interrupt mode 1-> polling mode */ .c2tdelay = 0, diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index a12065e8726..cd623db8d7d 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -626,7 +626,6 @@ static struct davinci_spi_platform_data dm365_spi0_pdata = { .version = SPI_VERSION_1, .num_chipselect = 2, .clk_internal = 1, - .cs_hold = 1, .intr_level = 0, .poll_mode = 1, /* 0 -> interrupt mode 1-> polling mode */ .c2tdelay = 0, diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h index 910efbf099c..2cb326e536b 100644 --- a/arch/arm/mach-davinci/include/mach/spi.h +++ b/arch/arm/mach-davinci/include/mach/spi.h @@ -33,7 +33,6 @@ struct davinci_spi_platform_data { u8 wait_enable; u8 timer_disable; u8 clk_internal; - u8 cs_hold; u8 intr_level; u8 poll_mode; u8 use_dma; diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index d6b6a495808..105c686b2ce 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -66,7 +66,7 @@ #define SPI_INTLVL_0 0x00000000u /* SPIDAT1 */ -#define SPIDAT1_CSHOLD_SHIFT 28 +#define SPIDAT1_CSHOLD_MASK BIT(28) #define SPIDAT1_CSNR_SHIFT 16 #define SPIGCR1_CLKMOD_MASK BIT(1) #define SPIGCR1_MASTER_MASK BIT(0) @@ -235,7 +235,8 @@ static void davinci_spi_chipselect(struct spi_device *spi, int value) { struct davinci_spi *davinci_spi; struct davinci_spi_platform_data *pdata; - u32 data1_reg_val = 0; + u32 data1_reg_val; + u8 chip_sel = spi->chip_select; davinci_spi = spi_master_get_devdata(spi->master); pdata = davinci_spi->pdata; @@ -244,14 +245,17 @@ static void davinci_spi_chipselect(struct spi_device *spi, int value) * Board specific chip select logic decides the polarity and cs * line for the controller */ - if (value == BITBANG_CS_INACTIVE) { - data1_reg_val |= CS_DEFAULT << SPIDAT1_CSNR_SHIFT; - iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1); - - while ((ioread32(davinci_spi->base + SPIBUF) - & SPIBUF_RXEMPTY_MASK) == 0) - cpu_relax(); + data1_reg_val = CS_DEFAULT << SPIDAT1_CSNR_SHIFT; + if (value == BITBANG_CS_ACTIVE) { + data1_reg_val |= SPIDAT1_CSHOLD_MASK; + data1_reg_val &= ~((0x1 << chip_sel) << SPIDAT1_CSNR_SHIFT); } + + iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1); + while ((ioread32(davinci_spi->base + SPIBUF) + & SPIBUF_RXEMPTY_MASK) == 0) + cpu_relax(); + } /** @@ -632,7 +636,7 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) { struct davinci_spi *davinci_spi; int int_status, count, ret; - u8 conv, tmp; + u8 conv; u32 tx_data, data1_reg_val; u32 buf_val, flg_val; struct davinci_spi_platform_data *pdata; @@ -647,6 +651,8 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) conv = davinci_spi->slave[spi->chip_select].bytes_per_word; davinci_spi->count = t->len / conv; + data1_reg_val = ioread32(davinci_spi->base + SPIDAT1); + INIT_COMPLETION(davinci_spi->done); ret = davinci_spi_bufs_prep(spi, davinci_spi); @@ -661,16 +667,6 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) davinci_spi->base + SPIDELAY); count = davinci_spi->count; - data1_reg_val = pdata->cs_hold << SPIDAT1_CSHOLD_SHIFT; - tmp = ~(0x1 << spi->chip_select); - - clear_io_bits(davinci_spi->base + SPIDEF, ~tmp); - - data1_reg_val |= tmp << SPIDAT1_CSNR_SHIFT; - - while ((ioread32(davinci_spi->base + SPIBUF) - & SPIBUF_RXEMPTY_MASK) == 0) - cpu_relax(); /* Determine the command to execute READ or WRITE */ if (t->tx_buf) { @@ -770,7 +766,6 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) int int_status = 0; int count, temp_count; u8 conv = 1; - u8 tmp; u32 data1_reg_val; struct davinci_spi_dma *davinci_spi_dma; int word_len, data_type, ret; @@ -794,6 +789,8 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) conv = davinci_spi->slave[spi->chip_select].bytes_per_word; davinci_spi->count = t->len / conv; + data1_reg_val = ioread32(davinci_spi->base + SPIDAT1); + INIT_COMPLETION(davinci_spi->done); init_completion(&davinci_spi_dma->dma_rx_completion); @@ -820,28 +817,14 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) davinci_spi->base + SPIDELAY); count = davinci_spi->count; /* the number of elements */ - data1_reg_val = pdata->cs_hold << SPIDAT1_CSHOLD_SHIFT; - - /* CS default = 0xFF */ - tmp = ~(0x1 << spi->chip_select); - - clear_io_bits(davinci_spi->base + SPIDEF, ~tmp); - - data1_reg_val |= tmp << SPIDAT1_CSNR_SHIFT; /* disable all interrupts for dma transfers */ clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKALL); /* Disable SPI to write configuration bits in SPIDAT */ clear_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK); - iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1); /* Enable SPI */ set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK); - while ((ioread32(davinci_spi->base + SPIBUF) - & SPIBUF_RXEMPTY_MASK) == 0) - cpu_relax(); - - if (t->tx_buf) { t->tx_dma = dma_map_single(&spi->dev, (void *)t->tx_buf, count, DMA_TO_DEVICE); -- cgit v1.2.3-70-g09d2 From cfbc5d1d8fda9d337e912a03502cf77d29870a8e Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Thu, 12 Aug 2010 12:27:33 +0530 Subject: spi: davinci: remove unnecessary data transmit on CS disable On TI DaVinci's SPI controller, the SPIDAT1 register which controls the chip slect status, also has data transmit register in the lower 16 bits. Writing to the whole 32-bits triggers an additional data transmit every time the chip select is disabled. While most SPI slaves cope-up with this, some cannot. This patch fixes this by doing a 16-bit write on the upper half of the SPIDAT1 register While at it, group the SPIGCR1 register related defines seperately from SPIDAT1 register defines. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 20 ++++++++------------ 1 file changed, 8 insertions(+), 12 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 105c686b2ce..82dddf83daf 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -65,9 +65,10 @@ #define SPI_INTLVL_1 0x000001FFu #define SPI_INTLVL_0 0x00000000u -/* SPIDAT1 */ -#define SPIDAT1_CSHOLD_MASK BIT(28) -#define SPIDAT1_CSNR_SHIFT 16 +/* SPIDAT1 (upper 16 bit defines) */ +#define SPIDAT1_CSHOLD_MASK BIT(12) + +/* SPIGCR1 */ #define SPIGCR1_CLKMOD_MASK BIT(1) #define SPIGCR1_MASTER_MASK BIT(0) #define SPIGCR1_LOOPBACK_MASK BIT(16) @@ -235,8 +236,8 @@ static void davinci_spi_chipselect(struct spi_device *spi, int value) { struct davinci_spi *davinci_spi; struct davinci_spi_platform_data *pdata; - u32 data1_reg_val; u8 chip_sel = spi->chip_select; + u16 spidat1_cfg = CS_DEFAULT; davinci_spi = spi_master_get_devdata(spi->master); pdata = davinci_spi->pdata; @@ -245,17 +246,12 @@ static void davinci_spi_chipselect(struct spi_device *spi, int value) * Board specific chip select logic decides the polarity and cs * line for the controller */ - data1_reg_val = CS_DEFAULT << SPIDAT1_CSNR_SHIFT; if (value == BITBANG_CS_ACTIVE) { - data1_reg_val |= SPIDAT1_CSHOLD_MASK; - data1_reg_val &= ~((0x1 << chip_sel) << SPIDAT1_CSNR_SHIFT); + spidat1_cfg |= SPIDAT1_CSHOLD_MASK; + spidat1_cfg &= ~(0x1 << chip_sel); } - iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1); - while ((ioread32(davinci_spi->base + SPIBUF) - & SPIBUF_RXEMPTY_MASK) == 0) - cpu_relax(); - + iowrite16(spidat1_cfg, davinci_spi->base + SPIDAT1 + 2); } /** -- cgit v1.2.3-70-g09d2 From 23853973d9b76eb8b3cf46157689bc6187e141d9 Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Fri, 13 Aug 2010 10:57:44 +0530 Subject: spi: davinci: enable GPIO lines to be used as chip selects Sometimes, the chip selects provided by SPI module are muxed with other functionality and cannot be used in some designs. In such cases, it becomes convenient to use an available GPIO line as chip select. This patch enables the DaVinci SPI driver to treat specific GPIO lines as chip selects based on information provided in platform data. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/include/mach/spi.h | 3 +++ drivers/spi/davinci_spi.c | 39 ++++++++++++++++++++++++++------ 2 files changed, 35 insertions(+), 7 deletions(-) (limited to 'drivers/spi') diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h index 2cb326e536b..734d1fb9961 100644 --- a/arch/arm/mach-davinci/include/mach/spi.h +++ b/arch/arm/mach-davinci/include/mach/spi.h @@ -19,6 +19,8 @@ #ifndef __ARCH_ARM_DAVINCI_SPI_H #define __ARCH_ARM_DAVINCI_SPI_H +#define SPI_INTERN_CS 0xFF + enum { SPI_VERSION_1, /* For DM355/DM365/DM6467 */ SPI_VERSION_2, /* For DA8xx */ @@ -38,6 +40,7 @@ struct davinci_spi_platform_data { u8 use_dma; u8 c2tdelay; u8 t2cdelay; + u8 *chip_sel; }; #endif /* __ARCH_ARM_DAVINCI_SPI_H */ diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 82dddf83daf..d5d7014e6ae 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -238,20 +238,32 @@ static void davinci_spi_chipselect(struct spi_device *spi, int value) struct davinci_spi_platform_data *pdata; u8 chip_sel = spi->chip_select; u16 spidat1_cfg = CS_DEFAULT; + bool gpio_chipsel = false; davinci_spi = spi_master_get_devdata(spi->master); pdata = davinci_spi->pdata; + if (pdata->chip_sel && chip_sel < pdata->num_chipselect && + pdata->chip_sel[chip_sel] != SPI_INTERN_CS) + gpio_chipsel = true; + /* * Board specific chip select logic decides the polarity and cs * line for the controller */ - if (value == BITBANG_CS_ACTIVE) { - spidat1_cfg |= SPIDAT1_CSHOLD_MASK; - spidat1_cfg &= ~(0x1 << chip_sel); - } + if (gpio_chipsel) { + if (value == BITBANG_CS_ACTIVE) + gpio_set_value(pdata->chip_sel[chip_sel], 0); + else + gpio_set_value(pdata->chip_sel[chip_sel], 1); + } else { + if (value == BITBANG_CS_ACTIVE) { + spidat1_cfg |= SPIDAT1_CSHOLD_MASK; + spidat1_cfg &= ~(0x1 << chip_sel); + } - iowrite16(spidat1_cfg, davinci_spi->base + SPIDAT1 + 2); + iowrite16(spidat1_cfg, davinci_spi->base + SPIDAT1 + 2); + } } /** @@ -546,6 +558,7 @@ static void davinci_spi_cleanup(struct spi_device *spi) static int davinci_spi_bufs_prep(struct spi_device *spi, struct davinci_spi *davinci_spi) { + struct davinci_spi_platform_data *pdata; int op_mode = 0; /* @@ -558,8 +571,12 @@ static int davinci_spi_bufs_prep(struct spi_device *spi, op_mode = SPIPC0_DIFUN_MASK | SPIPC0_DOFUN_MASK | SPIPC0_CLKFUN_MASK; - if (!(spi->mode & SPI_NO_CS)) - op_mode |= 1 << spi->chip_select; + if (!(spi->mode & SPI_NO_CS)) { + pdata = davinci_spi->pdata; + if (!pdata->chip_sel || + pdata->chip_sel[spi->chip_select] == SPI_INTERN_CS) + op_mode |= 1 << spi->chip_select; + } if (spi->mode & SPI_READY) op_mode |= SPIPC0_SPIENA_MASK; @@ -1101,6 +1118,14 @@ static int davinci_spi_probe(struct platform_device *pdev) udelay(100); iowrite32(1, davinci_spi->base + SPIGCR0); + /* initialize chip selects */ + if (pdata->chip_sel) { + for (i = 0; i < pdata->num_chipselect; i++) { + if (pdata->chip_sel[i] != SPI_INTERN_CS) + gpio_direction_output(pdata->chip_sel[i], 1); + } + } + /* Clock internal */ if (davinci_spi->pdata->clk_internal) set_io_bits(davinci_spi->base + SPIGCR1, -- cgit v1.2.3-70-g09d2 From 7fe0092b1f55f58a749d68ace3a3597e8a2a9163 Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Fri, 13 Aug 2010 13:27:23 +0530 Subject: spi: davinci: simplify prescalar calculation Simplify pre-scalar calculation and move it into a seprate function. Refuse to correct invalid pre-scalar values silently as this might lead to unexpected bugs and lower performance. Instead an error will force users to dig into the root-cause of the issue. While at it, remove some device specific checks on the maximum SPI frequency. As the driver supports the SPI interface implemented on various devices, it should only take care of core SPI limitations and leave the device specific handling to platform code. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 53 +++++++++++++++++++++++++++-------------------- 1 file changed, 31 insertions(+), 22 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index d5d7014e6ae..17269ad54a9 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -53,6 +53,7 @@ #define SPIFMT_WDELAY_MASK 0x3f000000u #define SPIFMT_WDELAY_SHIFT 24 #define SPIFMT_CHARLEN_MASK 0x0000001Fu +#define SPIFMT_PRESCALE_SHIFT 8 /* SPIPC0 */ @@ -266,6 +267,29 @@ static void davinci_spi_chipselect(struct spi_device *spi, int value) } } +/** + * davinci_spi_get_prescale - Calculates the correct prescale value + * @maxspeed_hz: the maximum rate the SPI clock can run at + * + * This function calculates the prescale value that generates a clock rate + * less than or equal to the specified maximum. + * + * Returns: calculated prescale - 1 for easy programming into SPI registers + * or negative error number if valid prescalar cannot be updated. + */ +static inline int davinci_spi_get_prescale(struct davinci_spi *davinci_spi, + u32 max_speed_hz) +{ + int ret; + + ret = DIV_ROUND_UP(clk_get_rate(davinci_spi->clk), max_speed_hz); + + if (ret < 3 || ret > 256) + return -EINVAL; + + return ret - 1; +} + /** * davinci_spi_setup_transfer - This functions will determine transfer method * @spi: spi device on which data transfer to be done @@ -281,7 +305,7 @@ static int davinci_spi_setup_transfer(struct spi_device *spi, struct davinci_spi *davinci_spi; u8 bits_per_word = 0; - u32 hz = 0, prescale = 0, clkspeed; + u32 hz = 0, prescale = 0; davinci_spi = spi_master_get_devdata(spi->master); @@ -312,21 +336,18 @@ static int davinci_spi_setup_transfer(struct spi_device *spi, if (!hz) hz = spi->max_speed_hz; + prescale = davinci_spi_get_prescale(davinci_spi, hz); + if (prescale < 0) + return prescale; + clear_fmt_bits(davinci_spi->base, SPIFMT_CHARLEN_MASK, spi->chip_select); set_fmt_bits(davinci_spi->base, bits_per_word & 0x1f, spi->chip_select); - clkspeed = clk_get_rate(davinci_spi->clk); - if (hz > clkspeed / 2) - prescale = 1 << 8; - if (hz < clkspeed / 256) - prescale = 255 << 8; - if (!prescale) - prescale = ((clkspeed / hz - 1) << 8) & 0x0000ff00; - clear_fmt_bits(davinci_spi->base, 0x0000ff00, spi->chip_select); - set_fmt_bits(davinci_spi->base, prescale, spi->chip_select); + set_fmt_bits(davinci_spi->base, + prescale << SPIFMT_PRESCALE_SHIFT, spi->chip_select); return 0; } @@ -413,10 +434,8 @@ static int davinci_spi_setup(struct spi_device *spi) int retval; struct davinci_spi *davinci_spi; struct davinci_spi_dma *davinci_spi_dma; - struct device *sdev; davinci_spi = spi_master_get_devdata(spi->master); - sdev = davinci_spi->bitbang.master->dev.parent; /* if bits per word length is zero then set it default 8 */ if (!spi->bits_per_word) @@ -435,16 +454,6 @@ static int davinci_spi_setup(struct spi_device *spi) } } - /* - * SPI in DaVinci and DA8xx operate between - * 600 KHz and 50 MHz - */ - if (spi->max_speed_hz < 600000 || spi->max_speed_hz > 50000000) { - dev_dbg(sdev, "Operating frequency is not in acceptable " - "range\n"); - return -EINVAL; - } - /* * Set up SPIFMTn register, unique to this chipselect. * -- cgit v1.2.3-70-g09d2 From 472880c73da124b6cb5cbc31a36754aa62935afe Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Mon, 16 Aug 2010 10:28:53 +0530 Subject: spi: davinci: remove 'wait_enable' platform data member The SPI_READY bit of struct spi_device:mode serves the purpose of letting the SPI master know if the slave can signal if it is ready for transfer or not. The 'wait_enable' platform data was duplicating this functionality. Use the framework provided method of indicating this capability. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/include/mach/spi.h | 1 - drivers/spi/davinci_spi.c | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) (limited to 'drivers/spi') diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h index 734d1fb9961..fe699140269 100644 --- a/arch/arm/mach-davinci/include/mach/spi.h +++ b/arch/arm/mach-davinci/include/mach/spi.h @@ -32,7 +32,6 @@ struct davinci_spi_platform_data { u8 wdelay; u8 odd_parity; u8 parity_enable; - u8 wait_enable; u8 timer_disable; u8 clk_internal; u8 intr_level; diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 17269ad54a9..54808577c12 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -522,7 +522,7 @@ static int davinci_spi_setup(struct spi_device *spi) SPIFMT_PARITYENA_MASK, spi->chip_select); - if (davinci_spi->pdata->wait_enable) + if (spi->mode & SPI_READY) set_fmt_bits(davinci_spi->base, SPIFMT_WAITENA_MASK, spi->chip_select); -- cgit v1.2.3-70-g09d2 From 53a31b07c5aea4001bbb36ddd5ef2addffc7ccbd Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Mon, 16 Aug 2010 15:05:51 +0530 Subject: spi: davinci: make chip-slect specific parameters really chip-select specific Some chip-select specific paramterers like wdelay, parity, usage of chip-select timers (and the actual timer values) are included in platform data forcing the same behaviour across all chip-selects. Create a new davinci_spi_config data structure which can be passed along using controller_data member of spi_device data structure on a per-device basis. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/dm355.c | 3 -- arch/arm/mach-davinci/dm365.c | 3 -- arch/arm/mach-davinci/include/mach/spi.h | 13 ++++--- drivers/spi/davinci_spi.c | 67 ++++++++++++++++++-------------- 4 files changed, 45 insertions(+), 41 deletions(-) (limited to 'drivers/spi') diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index 6a76dfa60ef..a6d9b72190f 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c @@ -413,10 +413,7 @@ static struct davinci_spi_platform_data dm355_spi0_pdata = { .version = SPI_VERSION_1, .num_chipselect = 2, .clk_internal = 1, - .intr_level = 0, .poll_mode = 1, /* 0 -> interrupt mode 1-> polling mode */ - .c2tdelay = 0, - .t2cdelay = 0, }; static struct platform_device dm355_spi0_device = { .name = "spi_davinci", diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index cd623db8d7d..80dd159134c 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -626,10 +626,7 @@ static struct davinci_spi_platform_data dm365_spi0_pdata = { .version = SPI_VERSION_1, .num_chipselect = 2, .clk_internal = 1, - .intr_level = 0, .poll_mode = 1, /* 0 -> interrupt mode 1-> polling mode */ - .c2tdelay = 0, - .t2cdelay = 0, }; static struct resource dm365_spi0_resources[] = { diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h index fe699140269..29c19c425b0 100644 --- a/arch/arm/mach-davinci/include/mach/spi.h +++ b/arch/arm/mach-davinci/include/mach/spi.h @@ -29,17 +29,20 @@ enum { struct davinci_spi_platform_data { u8 version; u8 num_chipselect; - u8 wdelay; - u8 odd_parity; - u8 parity_enable; - u8 timer_disable; u8 clk_internal; u8 intr_level; u8 poll_mode; u8 use_dma; + u8 *chip_sel; +}; + +struct davinci_spi_config { + u8 wdelay; + u8 odd_parity; + u8 parity_enable; + u8 timer_disable; u8 c2tdelay; u8 t2cdelay; - u8 *chip_sel; }; #endif /* __ARCH_ARM_DAVINCI_SPI_H */ diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 54808577c12..d4320f78407 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -156,6 +156,8 @@ struct davinci_spi { struct davinci_spi_slave slave[SPI_MAX_CHIPSELECT]; }; +static struct davinci_spi_config davinci_spi_default_cfg; + static unsigned use_dma; static void davinci_spi_rx_buf_u8(u32 data, struct davinci_spi *davinci_spi) @@ -434,8 +436,12 @@ static int davinci_spi_setup(struct spi_device *spi) int retval; struct davinci_spi *davinci_spi; struct davinci_spi_dma *davinci_spi_dma; + struct davinci_spi_config *spicfg; davinci_spi = spi_master_get_devdata(spi->master); + spicfg = (struct davinci_spi_config *)spi->controller_data; + if (!spicfg) + spicfg = &davinci_spi_default_cfg; /* if bits per word length is zero then set it default 8 */ if (!spi->bits_per_word) @@ -496,31 +502,34 @@ static int davinci_spi_setup(struct spi_device *spi) */ if (davinci_spi->version == SPI_VERSION_2) { + clear_fmt_bits(davinci_spi->base, SPIFMT_WDELAY_MASK, - spi->chip_select); + spi->chip_select); set_fmt_bits(davinci_spi->base, - (davinci_spi->pdata->wdelay - << SPIFMT_WDELAY_SHIFT) - & SPIFMT_WDELAY_MASK, - spi->chip_select); + (spicfg->wdelay << SPIFMT_WDELAY_SHIFT) & + SPIFMT_WDELAY_MASK, spi->chip_select); - if (davinci_spi->pdata->odd_parity) - set_fmt_bits(davinci_spi->base, - SPIFMT_ODD_PARITY_MASK, - spi->chip_select); + if (spicfg->odd_parity) + set_fmt_bits(davinci_spi->base, SPIFMT_ODD_PARITY_MASK, + spi->chip_select); else clear_fmt_bits(davinci_spi->base, SPIFMT_ODD_PARITY_MASK, spi->chip_select); - if (davinci_spi->pdata->parity_enable) - set_fmt_bits(davinci_spi->base, - SPIFMT_PARITYENA_MASK, - spi->chip_select); + if (spicfg->parity_enable) + set_fmt_bits(davinci_spi->base, SPIFMT_PARITYENA_MASK, + spi->chip_select); else - clear_fmt_bits(davinci_spi->base, - SPIFMT_PARITYENA_MASK, - spi->chip_select); + clear_fmt_bits(davinci_spi->base, SPIFMT_PARITYENA_MASK, + spi->chip_select); + + if (spicfg->timer_disable) + set_fmt_bits(davinci_spi->base, SPIFMT_DISTIMER_MASK, + spi->chip_select); + else + clear_fmt_bits(davinci_spi->base, SPIFMT_DISTIMER_MASK, + spi->chip_select); if (spi->mode & SPI_READY) set_fmt_bits(davinci_spi->base, @@ -531,14 +540,6 @@ static int davinci_spi_setup(struct spi_device *spi) SPIFMT_WAITENA_MASK, spi->chip_select); - if (davinci_spi->pdata->timer_disable) - set_fmt_bits(davinci_spi->base, - SPIFMT_DISTIMER_MASK, - spi->chip_select); - else - clear_fmt_bits(davinci_spi->base, - SPIFMT_DISTIMER_MASK, - spi->chip_select); } retval = davinci_spi_setup_transfer(spi, NULL); @@ -662,9 +663,13 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) u32 tx_data, data1_reg_val; u32 buf_val, flg_val; struct davinci_spi_platform_data *pdata; + struct davinci_spi_config *spicfg; davinci_spi = spi_master_get_devdata(spi->master); pdata = davinci_spi->pdata; + spicfg = (struct davinci_spi_config *)spi->controller_data; + if (!spicfg) + spicfg = &davinci_spi_default_cfg; davinci_spi->tx = t->tx_buf; davinci_spi->rx = t->rx_buf; @@ -684,8 +689,8 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) /* Enable SPI */ set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK); - iowrite32(0 | (pdata->c2tdelay << SPI_C2TDELAY_SHIFT) | - (pdata->t2cdelay << SPI_T2CDELAY_SHIFT), + iowrite32((spicfg->c2tdelay << SPI_C2TDELAY_SHIFT) | + (spicfg->t2cdelay << SPI_T2CDELAY_SHIFT), davinci_spi->base + SPIDELAY); count = davinci_spi->count; @@ -792,12 +797,14 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) struct davinci_spi_dma *davinci_spi_dma; int word_len, data_type, ret; unsigned long tx_reg, rx_reg; - struct davinci_spi_platform_data *pdata; + struct davinci_spi_config *spicfg; struct device *sdev; davinci_spi = spi_master_get_devdata(spi->master); - pdata = davinci_spi->pdata; sdev = davinci_spi->bitbang.master->dev.parent; + spicfg = (struct davinci_spi_config *)spi->controller_data; + if (!spicfg) + spicfg = &davinci_spi_default_cfg; davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select]; @@ -834,8 +841,8 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) return ret; /* Put delay val if required */ - iowrite32(0 | (pdata->c2tdelay << SPI_C2TDELAY_SHIFT) | - (pdata->t2cdelay << SPI_T2CDELAY_SHIFT), + iowrite32((spicfg->c2tdelay << SPI_C2TDELAY_SHIFT) | + (spicfg->t2cdelay << SPI_T2CDELAY_SHIFT), davinci_spi->base + SPIDELAY); count = davinci_spi->count; /* the number of elements */ -- cgit v1.2.3-70-g09d2 From 25f33512f6ae7e37d7b3d353d57d4d6d066033ce Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Thu, 19 Aug 2010 12:15:22 +0530 Subject: spi: davinci: consolidate setup of SPIFMTn in one function Consolidate the setup of SPIFMTn register under davinci_spi_setup_transfer() simplifying the code and avoiding unnecessary reads and writes to the register. The two inline functions {set|clear}_fmt_bits() can be eliminated because of this. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 154 +++++++++++++++------------------------------- 1 file changed, 49 insertions(+), 105 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index d4320f78407..34b28fe2d32 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -52,7 +52,6 @@ #define SPIFMT_ODD_PARITY_MASK BIT(23) #define SPIFMT_WDELAY_MASK 0x3f000000u #define SPIFMT_WDELAY_SHIFT 24 -#define SPIFMT_CHARLEN_MASK 0x0000001Fu #define SPIFMT_PRESCALE_SHIFT 8 @@ -212,16 +211,6 @@ static inline void clear_io_bits(void __iomem *addr, u32 bits) iowrite32(v, addr); } -static inline void set_fmt_bits(void __iomem *addr, u32 bits, int cs_num) -{ - set_io_bits(addr + SPIFMT0 + (0x4 * cs_num), bits); -} - -static inline void clear_fmt_bits(void __iomem *addr, u32 bits, int cs_num) -{ - clear_io_bits(addr + SPIFMT0 + (0x4 * cs_num), bits); -} - static void davinci_spi_set_dma_req(const struct spi_device *spi, int enable) { struct davinci_spi *davinci_spi = spi_master_get_devdata(spi->master); @@ -306,10 +295,14 @@ static int davinci_spi_setup_transfer(struct spi_device *spi, { struct davinci_spi *davinci_spi; + struct davinci_spi_config *spicfg; u8 bits_per_word = 0; - u32 hz = 0, prescale = 0; + u32 hz = 0, spifmt = 0, prescale = 0; davinci_spi = spi_master_get_devdata(spi->master); + spicfg = (struct davinci_spi_config *)spi->controller_data; + if (!spicfg) + spicfg = &davinci_spi_default_cfg; if (t) { bits_per_word = t->bits_per_word; @@ -338,18 +331,55 @@ static int davinci_spi_setup_transfer(struct spi_device *spi, if (!hz) hz = spi->max_speed_hz; + /* Set up SPIFMTn register, unique to this chipselect. */ + prescale = davinci_spi_get_prescale(davinci_spi, hz); if (prescale < 0) return prescale; - clear_fmt_bits(davinci_spi->base, SPIFMT_CHARLEN_MASK, - spi->chip_select); - set_fmt_bits(davinci_spi->base, bits_per_word & 0x1f, - spi->chip_select); + spifmt = (prescale << SPIFMT_PRESCALE_SHIFT) | (bits_per_word & 0x1f); + + if (spi->mode & SPI_LSB_FIRST) + spifmt |= SPIFMT_SHIFTDIR_MASK; + + if (spi->mode & SPI_CPOL) + spifmt |= SPIFMT_POLARITY_MASK; + + if (!(spi->mode & SPI_CPHA)) + spifmt |= SPIFMT_PHASE_MASK; + + /* + * Version 1 hardware supports two basic SPI modes: + * - Standard SPI mode uses 4 pins, with chipselect + * - 3 pin SPI is a 4 pin variant without CS (SPI_NO_CS) + * (distinct from SPI_3WIRE, with just one data wire; + * or similar variants without MOSI or without MISO) + * + * Version 2 hardware supports an optional handshaking signal, + * so it can support two more modes: + * - 5 pin SPI variant is standard SPI plus SPI_READY + * - 4 pin with enable is (SPI_READY | SPI_NO_CS) + */ + + if (davinci_spi->version == SPI_VERSION_2) { + + spifmt |= ((spicfg->wdelay << SPIFMT_WDELAY_SHIFT) + & SPIFMT_WDELAY_MASK); - clear_fmt_bits(davinci_spi->base, 0x0000ff00, spi->chip_select); - set_fmt_bits(davinci_spi->base, - prescale << SPIFMT_PRESCALE_SHIFT, spi->chip_select); + if (spicfg->odd_parity) + spifmt |= SPIFMT_ODD_PARITY_MASK; + + if (spicfg->parity_enable) + spifmt |= SPIFMT_PARITYENA_MASK; + + if (spicfg->timer_disable) + spifmt |= SPIFMT_DISTIMER_MASK; + + if (spi->mode & SPI_READY) + spifmt |= SPIFMT_WAITENA_MASK; + } + + iowrite32(spifmt, davinci_spi->base + SPIFMT0); return 0; } @@ -436,12 +466,8 @@ static int davinci_spi_setup(struct spi_device *spi) int retval; struct davinci_spi *davinci_spi; struct davinci_spi_dma *davinci_spi_dma; - struct davinci_spi_config *spicfg; davinci_spi = spi_master_get_devdata(spi->master); - spicfg = (struct davinci_spi_config *)spi->controller_data; - if (!spicfg) - spicfg = &davinci_spi_default_cfg; /* if bits per word length is zero then set it default 8 */ if (!spi->bits_per_word) @@ -460,88 +486,6 @@ static int davinci_spi_setup(struct spi_device *spi) } } - /* - * Set up SPIFMTn register, unique to this chipselect. - * - * NOTE: we could do all of these with one write. Also, some - * of the "version 2" features are found in chips that don't - * support all of them... - */ - if (spi->mode & SPI_LSB_FIRST) - set_fmt_bits(davinci_spi->base, SPIFMT_SHIFTDIR_MASK, - spi->chip_select); - else - clear_fmt_bits(davinci_spi->base, SPIFMT_SHIFTDIR_MASK, - spi->chip_select); - - if (spi->mode & SPI_CPOL) - set_fmt_bits(davinci_spi->base, SPIFMT_POLARITY_MASK, - spi->chip_select); - else - clear_fmt_bits(davinci_spi->base, SPIFMT_POLARITY_MASK, - spi->chip_select); - - if (!(spi->mode & SPI_CPHA)) - set_fmt_bits(davinci_spi->base, SPIFMT_PHASE_MASK, - spi->chip_select); - else - clear_fmt_bits(davinci_spi->base, SPIFMT_PHASE_MASK, - spi->chip_select); - - /* - * Version 1 hardware supports two basic SPI modes: - * - Standard SPI mode uses 4 pins, with chipselect - * - 3 pin SPI is a 4 pin variant without CS (SPI_NO_CS) - * (distinct from SPI_3WIRE, with just one data wire; - * or similar variants without MOSI or without MISO) - * - * Version 2 hardware supports an optional handshaking signal, - * so it can support two more modes: - * - 5 pin SPI variant is standard SPI plus SPI_READY - * - 4 pin with enable is (SPI_READY | SPI_NO_CS) - */ - - if (davinci_spi->version == SPI_VERSION_2) { - - clear_fmt_bits(davinci_spi->base, SPIFMT_WDELAY_MASK, - spi->chip_select); - set_fmt_bits(davinci_spi->base, - (spicfg->wdelay << SPIFMT_WDELAY_SHIFT) & - SPIFMT_WDELAY_MASK, spi->chip_select); - - if (spicfg->odd_parity) - set_fmt_bits(davinci_spi->base, SPIFMT_ODD_PARITY_MASK, - spi->chip_select); - else - clear_fmt_bits(davinci_spi->base, - SPIFMT_ODD_PARITY_MASK, - spi->chip_select); - - if (spicfg->parity_enable) - set_fmt_bits(davinci_spi->base, SPIFMT_PARITYENA_MASK, - spi->chip_select); - else - clear_fmt_bits(davinci_spi->base, SPIFMT_PARITYENA_MASK, - spi->chip_select); - - if (spicfg->timer_disable) - set_fmt_bits(davinci_spi->base, SPIFMT_DISTIMER_MASK, - spi->chip_select); - else - clear_fmt_bits(davinci_spi->base, SPIFMT_DISTIMER_MASK, - spi->chip_select); - - if (spi->mode & SPI_READY) - set_fmt_bits(davinci_spi->base, - SPIFMT_WAITENA_MASK, - spi->chip_select); - else - clear_fmt_bits(davinci_spi->base, - SPIFMT_WAITENA_MASK, - spi->chip_select); - - } - retval = davinci_spi_setup_transfer(spi, NULL); return retval; -- cgit v1.2.3-70-g09d2 From fd764463fe28ac53371565f851240e74775fb1aa Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Thu, 19 Aug 2010 12:44:31 +0530 Subject: spi: davinci: setup chip-select timers values only if timer enabled Setup chip-select timers values only if timer is enabled (timer_disbled in spi configuration is false). As a nice side effect, this patch removes code duplicated in davinci_spi_bufs_pio() and davinci_spi_bufs_dma(). Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 21 ++++----------------- 1 file changed, 4 insertions(+), 17 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 34b28fe2d32..d09b63cf58b 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -374,6 +374,10 @@ static int davinci_spi_setup_transfer(struct spi_device *spi, if (spicfg->timer_disable) spifmt |= SPIFMT_DISTIMER_MASK; + else + iowrite32((spicfg->c2tdelay << SPI_C2TDELAY_SHIFT) | + (spicfg->t2cdelay << SPI_T2CDELAY_SHIFT), + davinci_spi->base + SPIDELAY); if (spi->mode & SPI_READY) spifmt |= SPIFMT_WAITENA_MASK; @@ -607,13 +611,9 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) u32 tx_data, data1_reg_val; u32 buf_val, flg_val; struct davinci_spi_platform_data *pdata; - struct davinci_spi_config *spicfg; davinci_spi = spi_master_get_devdata(spi->master); pdata = davinci_spi->pdata; - spicfg = (struct davinci_spi_config *)spi->controller_data; - if (!spicfg) - spicfg = &davinci_spi_default_cfg; davinci_spi->tx = t->tx_buf; davinci_spi->rx = t->rx_buf; @@ -633,10 +633,6 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) /* Enable SPI */ set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK); - iowrite32((spicfg->c2tdelay << SPI_C2TDELAY_SHIFT) | - (spicfg->t2cdelay << SPI_T2CDELAY_SHIFT), - davinci_spi->base + SPIDELAY); - count = davinci_spi->count; /* Determine the command to execute READ or WRITE */ @@ -741,14 +737,10 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) struct davinci_spi_dma *davinci_spi_dma; int word_len, data_type, ret; unsigned long tx_reg, rx_reg; - struct davinci_spi_config *spicfg; struct device *sdev; davinci_spi = spi_master_get_devdata(spi->master); sdev = davinci_spi->bitbang.master->dev.parent; - spicfg = (struct davinci_spi_config *)spi->controller_data; - if (!spicfg) - spicfg = &davinci_spi_default_cfg; davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select]; @@ -784,11 +776,6 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) if (ret) return ret; - /* Put delay val if required */ - iowrite32((spicfg->c2tdelay << SPI_C2TDELAY_SHIFT) | - (spicfg->t2cdelay << SPI_T2CDELAY_SHIFT), - davinci_spi->base + SPIDELAY); - count = davinci_spi->count; /* the number of elements */ /* disable all interrupts for dma transfers */ -- cgit v1.2.3-70-g09d2 From 7abbf23c5903e14b0cff1cdeab906eab164be767 Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Thu, 19 Aug 2010 15:07:38 +0530 Subject: spi: davinci: add support for wait enable timeouts Just enabling WAITENA in SPIFMTn register waits for the enable signal from the slave indefinitely. Allow support for finite waiting by adding support for c2e delay (maximum time for addressed slave to respond) and t2e delay (maximum time for slave to respond after transmit data finished). While at it, modify the T2C and C2T defines by prepending the register name as is the convention followed for other register field elsewhere in the driver. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/include/mach/spi.h | 2 ++ drivers/spi/davinci_spi.c | 36 ++++++++++++++++++++++++-------- 2 files changed, 29 insertions(+), 9 deletions(-) (limited to 'drivers/spi') diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h index 29c19c425b0..483b055da44 100644 --- a/arch/arm/mach-davinci/include/mach/spi.h +++ b/arch/arm/mach-davinci/include/mach/spi.h @@ -43,6 +43,8 @@ struct davinci_spi_config { u8 timer_disable; u8 c2tdelay; u8 t2cdelay; + u8 t2edelay; + u8 c2edelay; }; #endif /* __ARCH_ARM_DAVINCI_SPI_H */ diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index d09b63cf58b..e94c63813e9 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -78,6 +78,16 @@ #define SPIBUF_TXFULL_MASK BIT(29) #define SPIBUF_RXEMPTY_MASK BIT(31) +/* SPIDELAY */ +#define SPIDELAY_C2TDELAY_SHIFT 24 +#define SPIDELAY_C2TDELAY_MASK (0xFF << SPIDELAY_C2TDELAY_SHIFT) +#define SPIDELAY_T2CDELAY_SHIFT 16 +#define SPIDELAY_T2CDELAY_MASK (0xFF << SPIDELAY_T2CDELAY_SHIFT) +#define SPIDELAY_T2EDELAY_SHIFT 8 +#define SPIDELAY_T2EDELAY_MASK (0xFF << SPIDELAY_T2EDELAY_SHIFT) +#define SPIDELAY_C2EDELAY_SHIFT 0 +#define SPIDELAY_C2EDELAY_MASK 0xFF + /* Error Masks */ #define SPIFLG_DLEN_ERR_MASK BIT(0) #define SPIFLG_TIMEOUT_MASK BIT(1) @@ -95,9 +105,6 @@ #define SPIINT_TX_INTR BIT(9) #define SPIINT_DMA_REQ_EN BIT(16) -#define SPI_T2CDELAY_SHIFT 16 -#define SPI_C2TDELAY_SHIFT 24 - /* SPI Controller registers */ #define SPIGCR0 0x00 #define SPIGCR1 0x04 @@ -363,6 +370,8 @@ static int davinci_spi_setup_transfer(struct spi_device *spi, if (davinci_spi->version == SPI_VERSION_2) { + u32 delay = 0; + spifmt |= ((spicfg->wdelay << SPIFMT_WDELAY_SHIFT) & SPIFMT_WDELAY_MASK); @@ -372,15 +381,24 @@ static int davinci_spi_setup_transfer(struct spi_device *spi, if (spicfg->parity_enable) spifmt |= SPIFMT_PARITYENA_MASK; - if (spicfg->timer_disable) + if (spicfg->timer_disable) { spifmt |= SPIFMT_DISTIMER_MASK; - else - iowrite32((spicfg->c2tdelay << SPI_C2TDELAY_SHIFT) | - (spicfg->t2cdelay << SPI_T2CDELAY_SHIFT), - davinci_spi->base + SPIDELAY); + } else { + delay |= (spicfg->c2tdelay << SPIDELAY_C2TDELAY_SHIFT) + & SPIDELAY_C2TDELAY_MASK; + delay |= (spicfg->t2cdelay << SPIDELAY_T2CDELAY_SHIFT) + & SPIDELAY_T2CDELAY_MASK; + } - if (spi->mode & SPI_READY) + if (spi->mode & SPI_READY) { spifmt |= SPIFMT_WAITENA_MASK; + delay |= (spicfg->t2edelay << SPIDELAY_T2EDELAY_SHIFT) + & SPIDELAY_T2EDELAY_MASK; + delay |= (spicfg->c2edelay << SPIDELAY_C2EDELAY_SHIFT) + & SPIDELAY_C2EDELAY_MASK; + } + + iowrite32(delay, davinci_spi->base + SPIDELAY); } iowrite32(spifmt, davinci_spi->base + SPIFMT0); -- cgit v1.2.3-70-g09d2 From b6c4eeac5bc6a6bf769d7f170c507a1b78fd120a Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Thu, 19 Aug 2010 15:41:41 +0530 Subject: spi: davinci: remove unused members of davinci_spi_slave Several members of struct davinci_spi_slave are unused in code. Remove such members. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 5 ----- 1 file changed, 5 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index e94c63813e9..31b9c2278de 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -119,10 +119,7 @@ #define SPIFMT0 0x50 struct davinci_spi_slave { - u32 cmd_to_write; - u32 clk_ctrl_to_write; u32 bytes_per_word; - u8 active_cs; }; /* We have 2 DMA channels per CS, one for RX and one for TX */ @@ -495,8 +492,6 @@ static int davinci_spi_setup(struct spi_device *spi) if (!spi->bits_per_word) spi->bits_per_word = 8; - davinci_spi->slave[spi->chip_select].cmd_to_write = 0; - if (use_dma && davinci_spi->dma_channels) { davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select]; -- cgit v1.2.3-70-g09d2 From cda987ebb86dfc757320bfa5c7b2afcd9d3ed30f Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Thu, 19 Aug 2010 16:16:28 +0530 Subject: spi: davinci: eliminate the single member structure davinci_spi_slave The struct davinci_spi_slave has a single member. Eliminate it and store the per-chipselect data in struct davinci_spi directly. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 31b9c2278de..3dac2038b5a 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -118,10 +118,6 @@ #define SPIDEF 0x4c #define SPIFMT0 0x50 -struct davinci_spi_slave { - u32 bytes_per_word; -}; - /* We have 2 DMA channels per CS, one for RX and one for TX */ struct davinci_spi_dma { int dma_tx_channel; @@ -156,7 +152,7 @@ struct davinci_spi { void (*get_rx)(u32 rx_data, struct davinci_spi *); u32 (*get_tx)(struct davinci_spi *); - struct davinci_spi_slave slave[SPI_MAX_CHIPSELECT]; + u8 bytes_per_word[SPI_MAX_CHIPSELECT]; }; static struct davinci_spi_config davinci_spi_default_cfg; @@ -324,11 +320,11 @@ static int davinci_spi_setup_transfer(struct spi_device *spi, if (bits_per_word <= 8 && bits_per_word >= 2) { davinci_spi->get_rx = davinci_spi_rx_buf_u8; davinci_spi->get_tx = davinci_spi_tx_buf_u8; - davinci_spi->slave[spi->chip_select].bytes_per_word = 1; + davinci_spi->bytes_per_word[spi->chip_select] = 1; } else if (bits_per_word <= 16 && bits_per_word >= 2) { davinci_spi->get_rx = davinci_spi_rx_buf_u16; davinci_spi->get_tx = davinci_spi_tx_buf_u16; - davinci_spi->slave[spi->chip_select].bytes_per_word = 2; + davinci_spi->bytes_per_word[spi->chip_select] = 2; } else return -EINVAL; @@ -632,7 +628,7 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) davinci_spi->rx = t->rx_buf; /* convert len to words based on bits_per_word */ - conv = davinci_spi->slave[spi->chip_select].bytes_per_word; + conv = davinci_spi->bytes_per_word[spi->chip_select]; davinci_spi->count = t->len / conv; data1_reg_val = ioread32(davinci_spi->base + SPIDAT1); @@ -764,7 +760,7 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) davinci_spi->rx = t->rx_buf; /* convert len to words based on bits_per_word */ - conv = davinci_spi->slave[spi->chip_select].bytes_per_word; + conv = davinci_spi->bytes_per_word[spi->chip_select]; davinci_spi->count = t->len / conv; data1_reg_val = ioread32(davinci_spi->base + SPIDAT1); -- cgit v1.2.3-70-g09d2 From 6321be60edac6037ea76e9beef375c6ae2961765 Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Thu, 19 Aug 2010 16:38:20 +0530 Subject: spi: davinci: eliminate unnecessary update of davinci_spi->count The count member of davinci_spi is internal to the driver and is not shared with framework. Eliminate its unnecessary update. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 6 ------ 1 file changed, 6 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 3dac2038b5a..f1c3502c2d0 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -726,9 +726,6 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) if (ret != 0) return ret; - /* SPI Framework maintains the count only in bytes so convert back */ - davinci_spi->count *= conv; - return t->len; } @@ -880,9 +877,6 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) if (ret != 0) return ret; - /* SPI Framework maintains the count only in bytes so convert back */ - davinci_spi->count *= conv; - return t->len; } -- cgit v1.2.3-70-g09d2 From b7ab24a0da96c8fc6d551ea87e82692299df6ac6 Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Thu, 19 Aug 2010 16:42:42 +0530 Subject: spi: davinci: simplify calculation of edma acount value The EDMA acount (called data_type in davinci_spi_bufs_dma()) is simply the bytes_per_word obtained in the transfer setup function. The current code calculates the acount value from bytes_per_word in a convoluted manner. Simplify the code. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 25 +++---------------------- 1 file changed, 3 insertions(+), 22 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index f1c3502c2d0..b0b338fc446 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -39,9 +39,6 @@ #define CS_DEFAULT 0xFF #define SPI_BUFSIZ (SMP_CACHE_BYTES + 1) -#define DAVINCI_DMA_DATA_TYPE_S8 0x01 -#define DAVINCI_DMA_DATA_TYPE_S16 0x02 -#define DAVINCI_DMA_DATA_TYPE_S32 0x04 #define SPIFMT_PHASE_MASK BIT(16) #define SPIFMT_POLARITY_MASK BIT(17) @@ -729,19 +726,14 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) return t->len; } -#define DAVINCI_DMA_DATA_TYPE_S8 0x01 -#define DAVINCI_DMA_DATA_TYPE_S16 0x02 -#define DAVINCI_DMA_DATA_TYPE_S32 0x04 - static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) { struct davinci_spi *davinci_spi; int int_status = 0; int count, temp_count; - u8 conv = 1; u32 data1_reg_val; struct davinci_spi_dma *davinci_spi_dma; - int word_len, data_type, ret; + int data_type, ret; unsigned long tx_reg, rx_reg; struct device *sdev; @@ -757,8 +749,8 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) davinci_spi->rx = t->rx_buf; /* convert len to words based on bits_per_word */ - conv = davinci_spi->bytes_per_word[spi->chip_select]; - davinci_spi->count = t->len / conv; + data_type = davinci_spi->bytes_per_word[spi->chip_select]; + davinci_spi->count = t->len / data_type; data1_reg_val = ioread32(davinci_spi->base + SPIDAT1); @@ -767,17 +759,6 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) init_completion(&davinci_spi_dma->dma_rx_completion); init_completion(&davinci_spi_dma->dma_tx_completion); - word_len = conv * 8; - - if (word_len <= 8) - data_type = DAVINCI_DMA_DATA_TYPE_S8; - else if (word_len <= 16) - data_type = DAVINCI_DMA_DATA_TYPE_S16; - else if (word_len <= 32) - data_type = DAVINCI_DMA_DATA_TYPE_S32; - else - return -EINVAL; - ret = davinci_spi_bufs_prep(spi, davinci_spi); if (ret) return ret; -- cgit v1.2.3-70-g09d2 From 53d454a170e86594af1d27be820e678a582af751 Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Thu, 19 Aug 2010 17:04:25 +0530 Subject: spi: davinci: check for NULL buffer pointer before using it In the davinci_spi_{tx|rx}_u{8|16}() functions, check for buffer pointer being valid before using it. While providing for better error checking, this change will help simplify code in the caller. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 40 ++++++++++++++++++++++------------------ 1 file changed, 22 insertions(+), 18 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index b0b338fc446..10b0a08d262 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -158,37 +158,41 @@ static unsigned use_dma; static void davinci_spi_rx_buf_u8(u32 data, struct davinci_spi *davinci_spi) { - u8 *rx = davinci_spi->rx; - - *rx++ = (u8)data; - davinci_spi->rx = rx; + if (davinci_spi->rx) { + u8 *rx = davinci_spi->rx; + *rx++ = (u8)data; + davinci_spi->rx = rx; + } } static void davinci_spi_rx_buf_u16(u32 data, struct davinci_spi *davinci_spi) { - u16 *rx = davinci_spi->rx; - - *rx++ = (u16)data; - davinci_spi->rx = rx; + if (davinci_spi->rx) { + u16 *rx = davinci_spi->rx; + *rx++ = (u16)data; + davinci_spi->rx = rx; + } } static u32 davinci_spi_tx_buf_u8(struct davinci_spi *davinci_spi) { - u32 data; - const u8 *tx = davinci_spi->tx; - - data = *tx++; - davinci_spi->tx = tx; + u32 data = 0; + if (davinci_spi->tx) { + const u8 *tx = davinci_spi->tx; + data = *tx++; + davinci_spi->tx = tx; + } return data; } static u32 davinci_spi_tx_buf_u16(struct davinci_spi *davinci_spi) { - u32 data; - const u16 *tx = davinci_spi->tx; - - data = *tx++; - davinci_spi->tx = tx; + u32 data = 0; + if (davinci_spi->tx) { + const u16 *tx = davinci_spi->tx; + data = *tx++; + davinci_spi->tx = tx; + } return data; } -- cgit v1.2.3-70-g09d2 From fab89ea330cabdaf29d82151de6d8f2369cc4da9 Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Fri, 20 Aug 2010 14:53:47 +0530 Subject: spi: davinci: remove unnecessary disable of SPI In the davinci_spi_bufs_dma() function, SPI is briefly disabled before enabling it immediately back again. Remove this unnecessary disable. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 10b0a08d262..1169e8e7462 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -771,8 +771,6 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) /* disable all interrupts for dma transfers */ clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKALL); - /* Disable SPI to write configuration bits in SPIDAT */ - clear_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK); /* Enable SPI */ set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK); -- cgit v1.2.3-70-g09d2 From f2bf4e849315c1573f996d082c53c6b686054da7 Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Fri, 20 Aug 2010 15:28:23 +0530 Subject: spi: davinci: remove unnecessary 'count' variable in driver private data The variable count in DaVinci SPI driver's private data is largely unused and its minor use can easily be eliminated. Remove the variable. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 1169e8e7462..ad814f2512f 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -142,7 +142,6 @@ struct davinci_spi { const void *tx; void *rx; u8 *tmp_buf; - int count; struct davinci_spi_dma *dma_channels; struct davinci_spi_platform_data *pdata; @@ -630,8 +629,6 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) /* convert len to words based on bits_per_word */ conv = davinci_spi->bytes_per_word[spi->chip_select]; - davinci_spi->count = t->len / conv; - data1_reg_val = ioread32(davinci_spi->base + SPIDAT1); INIT_COMPLETION(davinci_spi->done); @@ -643,7 +640,7 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) /* Enable SPI */ set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK); - count = davinci_spi->count; + count = t->len / conv; /* Determine the command to execute READ or WRITE */ if (t->tx_buf) { @@ -699,7 +696,7 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) } else { /* Receive in Interrupt mode */ int i; - for (i = 0; i < davinci_spi->count; i++) { + for (i = 0; i < count; i++) { set_io_bits(davinci_spi->base + SPIINT, SPIINT_BITERR_INTR | SPIINT_OVRRUN_INTR @@ -754,7 +751,6 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) /* convert len to words based on bits_per_word */ data_type = davinci_spi->bytes_per_word[spi->chip_select]; - davinci_spi->count = t->len / data_type; data1_reg_val = ioread32(davinci_spi->base + SPIDAT1); @@ -767,7 +763,7 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) if (ret) return ret; - count = davinci_spi->count; /* the number of elements */ + count = t->len / data_type; /* the number of elements */ /* disable all interrupts for dma transfers */ clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKALL); -- cgit v1.2.3-70-g09d2 From 134e32b979f3f3987e84dcd5cc42040e21252e53 Mon Sep 17 00:00:00 2001 From: Sekhar Nori Date: Fri, 20 Aug 2010 16:27:08 +0530 Subject: spi: davinci: do not treat Tx interrupt being set as error In davinci_spi_check_error(), Tx interrupt being set is treated as error. This function is only meant to flag bus error conditions and Tx interrupt being set at that point is not a bus error but rather a driver bug. Stop checking for Tx interrupt and flagging that as an IO error. Tested-By: Michael Williamson Tested-By: Brian Niebuhr Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 4 ---- 1 file changed, 4 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index ad814f2512f..a60a65c690d 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -590,10 +590,6 @@ static int davinci_spi_check_error(struct davinci_spi *davinci_spi, dev_dbg(sdev, "SPI Data Overrun error\n"); return -EIO; } - if (int_status & SPIFLG_TX_INTR_MASK) { - dev_dbg(sdev, "SPI TX intr bit set\n"); - return -EIO; - } if (int_status & SPIFLG_BUF_INIT_ACTIVE_MASK) { dev_dbg(sdev, "SPI Buffer Init Active\n"); return -EBUSY; -- cgit v1.2.3-70-g09d2 From 47f44671c0dc92e2b77ff3dd843f742d12510477 Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Mon, 23 Aug 2010 16:34:13 +0530 Subject: spi: davinci: remove unnecessary completion variable initialization The completion variable 'done' is unnecessarly initialized by the function davinci_spi_bufs_dma() where as it is not used for DMA transfers at all. Remove the unnecessary initialization. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index a60a65c690d..54d06f409b6 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -750,8 +750,6 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) data1_reg_val = ioread32(davinci_spi->base + SPIDAT1); - INIT_COMPLETION(davinci_spi->done); - init_completion(&davinci_spi_dma->dma_rx_completion); init_completion(&davinci_spi_dma->dma_tx_completion); -- cgit v1.2.3-70-g09d2 From cf90fe73504764cbcc2552c7ea69b1866059db30 Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Fri, 20 Aug 2010 17:02:49 +0530 Subject: spi: davinci: remove non-useful interrupt mode support The interrupt mode support as it stands is another version of poll mode. Even when interrupt mode is selected, the code tight loops on interrupt status register, rendering it totally useless. A completion variable is initialized, but never used. Remove this fake interrupt mode since users can anyway use poll mode with no functional difference. A usefully implemented interrupt mode support can be added later. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/dm355.c | 1 - arch/arm/mach-davinci/dm365.c | 1 - arch/arm/mach-davinci/include/mach/spi.h | 2 - drivers/spi/davinci_spi.c | 126 +++++-------------------------- 4 files changed, 19 insertions(+), 111 deletions(-) (limited to 'drivers/spi') diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index a6d9b72190f..e311f29ffb5 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c @@ -413,7 +413,6 @@ static struct davinci_spi_platform_data dm355_spi0_pdata = { .version = SPI_VERSION_1, .num_chipselect = 2, .clk_internal = 1, - .poll_mode = 1, /* 0 -> interrupt mode 1-> polling mode */ }; static struct platform_device dm355_spi0_device = { .name = "spi_davinci", diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index 80dd159134c..1e5012e196b 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -626,7 +626,6 @@ static struct davinci_spi_platform_data dm365_spi0_pdata = { .version = SPI_VERSION_1, .num_chipselect = 2, .clk_internal = 1, - .poll_mode = 1, /* 0 -> interrupt mode 1-> polling mode */ }; static struct resource dm365_spi0_resources[] = { diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h index 483b055da44..e68afe23885 100644 --- a/arch/arm/mach-davinci/include/mach/spi.h +++ b/arch/arm/mach-davinci/include/mach/spi.h @@ -30,8 +30,6 @@ struct davinci_spi_platform_data { u8 version; u8 num_chipselect; u8 clk_internal; - u8 intr_level; - u8 poll_mode; u8 use_dma; u8 *chip_sel; }; diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 54d06f409b6..198f062da37 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -59,8 +59,6 @@ #define SPIPC0_SPIENA_MASK BIT(8) /* nREADY */ #define SPIINT_MASKALL 0x0101035F -#define SPI_INTLVL_1 0x000001FFu -#define SPI_INTLVL_0 0x00000000u /* SPIDAT1 (upper 16 bit defines) */ #define SPIDAT1_CSHOLD_MASK BIT(12) @@ -92,14 +90,8 @@ #define SPIFLG_DESYNC_MASK BIT(3) #define SPIFLG_BITERR_MASK BIT(4) #define SPIFLG_OVRRUN_MASK BIT(6) -#define SPIFLG_RX_INTR_MASK BIT(8) -#define SPIFLG_TX_INTR_MASK BIT(9) #define SPIFLG_BUF_INIT_ACTIVE_MASK BIT(24) -#define SPIINT_BITERR_INTR BIT(4) -#define SPIINT_OVRRUN_INTR BIT(6) -#define SPIINT_RX_INTR BIT(8) -#define SPIINT_TX_INTR BIT(9) #define SPIINT_DMA_REQ_EN BIT(16) /* SPI Controller registers */ @@ -136,8 +128,6 @@ struct davinci_spi { resource_size_t pbase; void __iomem *base; size_t region_size; - u32 irq; - struct completion done; const void *tx; void *rx; @@ -611,7 +601,7 @@ static int davinci_spi_check_error(struct davinci_spi *davinci_spi, static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) { struct davinci_spi *davinci_spi; - int int_status, count, ret; + int status, count, ret; u8 conv; u32 tx_data, data1_reg_val; u32 buf_val, flg_val; @@ -627,8 +617,6 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) conv = davinci_spi->bytes_per_word[spi->chip_select]; data1_reg_val = ioread32(davinci_spi->base + SPIDAT1); - INIT_COMPLETION(davinci_spi->done); - ret = davinci_spi_bufs_prep(spi, davinci_spi); if (ret) return ret; @@ -638,9 +626,10 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) count = t->len / conv; + clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKALL); + /* Determine the command to execute READ or WRITE */ if (t->tx_buf) { - clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKALL); while (1) { tx_data = davinci_spi->get_tx(davinci_spi); @@ -668,45 +657,25 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) break; } } else { - if (pdata->poll_mode) { - while (1) { - /* keeps the serial clock going */ - if ((ioread32(davinci_spi->base + SPIBUF) - & SPIBUF_TXFULL_MASK) == 0) - iowrite32(data1_reg_val, - davinci_spi->base + SPIDAT1); + while (1) { + /* keeps the serial clock going */ + if ((ioread32(davinci_spi->base + SPIBUF) + & SPIBUF_TXFULL_MASK) == 0) + iowrite32(data1_reg_val, + davinci_spi->base + SPIDAT1); while (ioread32(davinci_spi->base + SPIBUF) & - SPIBUF_RXEMPTY_MASK) + SPIBUF_RXEMPTY_MASK) cpu_relax(); - flg_val = ioread32(davinci_spi->base + SPIFLG); - buf_val = ioread32(davinci_spi->base + SPIBUF); - - davinci_spi->get_rx(buf_val, davinci_spi); - - count--; - if (count <= 0) - break; - } - } else { /* Receive in Interrupt mode */ - int i; - - for (i = 0; i < count; i++) { - set_io_bits(davinci_spi->base + SPIINT, - SPIINT_BITERR_INTR - | SPIINT_OVRRUN_INTR - | SPIINT_RX_INTR); + flg_val = ioread32(davinci_spi->base + SPIFLG); + buf_val = ioread32(davinci_spi->base + SPIBUF); - iowrite32(data1_reg_val, - davinci_spi->base + SPIDAT1); + davinci_spi->get_rx(buf_val, davinci_spi); - while (ioread32(davinci_spi->base + SPIINT) & - SPIINT_RX_INTR) - cpu_relax(); - } - iowrite32((data1_reg_val & 0x0ffcffff), - davinci_spi->base + SPIDAT1); + count--; + if (count <= 0) + break; } } @@ -714,9 +683,9 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) * Check for bit error, desync error,parity error,timeout error and * receive overflow errors */ - int_status = ioread32(davinci_spi->base + SPIFLG); + status = ioread32(davinci_spi->base + SPIFLG); - ret = davinci_spi_check_error(davinci_spi, int_status); + ret = davinci_spi_check_error(davinci_spi, status); if (ret != 0) return ret; @@ -853,38 +822,6 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) return t->len; } -/** - * davinci_spi_irq - IRQ handler for DaVinci SPI - * @irq: IRQ number for this SPI Master - * @context_data: structure for SPI Master controller davinci_spi - */ -static irqreturn_t davinci_spi_irq(s32 irq, void *context_data) -{ - struct davinci_spi *davinci_spi = context_data; - u32 int_status, rx_data = 0; - irqreturn_t ret = IRQ_NONE; - - int_status = ioread32(davinci_spi->base + SPIFLG); - - while ((int_status & SPIFLG_RX_INTR_MASK)) { - if (likely(int_status & SPIFLG_RX_INTR_MASK)) { - ret = IRQ_HANDLED; - - rx_data = ioread32(davinci_spi->base + SPIBUF); - davinci_spi->get_rx(rx_data, davinci_spi); - - /* Disable Receive Interrupt */ - iowrite32(~(SPIINT_RX_INTR | SPIINT_TX_INTR), - davinci_spi->base + SPIINT); - } else - (void)davinci_spi_check_error(davinci_spi, int_status); - - int_status = ioread32(davinci_spi->base + SPIFLG); - } - - return ret; -} - /** * davinci_spi_probe - probe function for SPI Master Controller * @pdev: platform_device structure which contains plateform specific data @@ -943,22 +880,11 @@ static int davinci_spi_probe(struct platform_device *pdev) goto release_region; } - davinci_spi->irq = platform_get_irq(pdev, 0); - if (davinci_spi->irq <= 0) { - ret = -EINVAL; - goto unmap_io; - } - - ret = request_irq(davinci_spi->irq, davinci_spi_irq, IRQF_DISABLED, - dev_name(&pdev->dev), davinci_spi); - if (ret) - goto unmap_io; - /* Allocate tmp_buf for tx_buf */ davinci_spi->tmp_buf = kzalloc(SPI_BUFSIZ, GFP_KERNEL); if (davinci_spi->tmp_buf == NULL) { ret = -ENOMEM; - goto irq_free; + goto unmap_io; } davinci_spi->bitbang.master = spi_master_get(master); @@ -1034,8 +960,6 @@ static int davinci_spi_probe(struct platform_device *pdev) davinci_spi->get_rx = davinci_spi_rx_buf_u8; davinci_spi->get_tx = davinci_spi_tx_buf_u8; - init_completion(&davinci_spi->done); - /* Reset In/OUT SPI module */ iowrite32(0, davinci_spi->base + SPIGCR0); udelay(100); @@ -1062,21 +986,12 @@ static int davinci_spi_probe(struct platform_device *pdev) /* master mode default */ set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_MASTER_MASK); - if (davinci_spi->pdata->intr_level) - iowrite32(SPI_INTLVL_1, davinci_spi->base + SPILVL); - else - iowrite32(SPI_INTLVL_0, davinci_spi->base + SPILVL); - ret = spi_bitbang_start(&davinci_spi->bitbang); if (ret) goto free_clk; dev_info(&pdev->dev, "Controller at 0x%p\n", davinci_spi->base); - if (!pdata->poll_mode) - dev_info(&pdev->dev, "Operating in interrupt mode" - " using IRQ %d\n", davinci_spi->irq); - return ret; free_clk: @@ -1086,8 +1001,6 @@ put_master: spi_master_put(master); free_tmp_buf: kfree(davinci_spi->tmp_buf); -irq_free: - free_irq(davinci_spi->irq, davinci_spi); unmap_io: iounmap(davinci_spi->base); release_region: @@ -1121,7 +1034,6 @@ static int __exit davinci_spi_remove(struct platform_device *pdev) clk_put(davinci_spi->clk); spi_master_put(master); kfree(davinci_spi->tmp_buf); - free_irq(davinci_spi->irq, davinci_spi); iounmap(davinci_spi->base); release_mem_region(davinci_spi->pbase, davinci_spi->region_size); -- cgit v1.2.3-70-g09d2 From 839c996ca8dd56f9ea80d7fc0c8b18b01394c82a Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Mon, 23 Aug 2010 16:39:19 +0530 Subject: spi: davinci: simplify poll mode transfers Use the fact that the get_tx and get_rx can now cope with NULL buffer pointers to simplify the poll mode transfer code. While at it, check for SPI errors every transfer rather than at the end of the whole transfer. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 96 ++++++++++++++++++++--------------------------- 1 file changed, 41 insertions(+), 55 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 198f062da37..cd37697850c 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -91,6 +91,10 @@ #define SPIFLG_BITERR_MASK BIT(4) #define SPIFLG_OVRRUN_MASK BIT(6) #define SPIFLG_BUF_INIT_ACTIVE_MASK BIT(24) +#define SPIFLG_ERROR_MASK (SPIFLG_DLEN_ERR_MASK \ + | SPIFLG_TIMEOUT_MASK | SPIFLG_PARERR_MASK \ + | SPIFLG_DESYNC_MASK | SPIFLG_BITERR_MASK \ + | SPIFLG_OVRRUN_MASK) #define SPIINT_DMA_REQ_EN BIT(16) @@ -601,10 +605,10 @@ static int davinci_spi_check_error(struct davinci_spi *davinci_spi, static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) { struct davinci_spi *davinci_spi; - int status, count, ret; - u8 conv; + int ret; + int rcount, wcount; u32 tx_data, data1_reg_val; - u32 buf_val, flg_val; + u32 errors = 0; struct davinci_spi_platform_data *pdata; davinci_spi = spi_master_get_devdata(spi->master); @@ -612,70 +616,51 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) davinci_spi->tx = t->tx_buf; davinci_spi->rx = t->rx_buf; - - /* convert len to words based on bits_per_word */ - conv = davinci_spi->bytes_per_word[spi->chip_select]; - data1_reg_val = ioread32(davinci_spi->base + SPIDAT1); + wcount = t->len / davinci_spi->bytes_per_word[spi->chip_select]; + rcount = wcount; ret = davinci_spi_bufs_prep(spi, davinci_spi); if (ret) return ret; + data1_reg_val = ioread32(davinci_spi->base + SPIDAT1); + /* Enable SPI */ set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK); - count = t->len / conv; - clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKALL); - /* Determine the command to execute READ or WRITE */ - if (t->tx_buf) { + /* start the transfer */ + wcount--; + tx_data = davinci_spi->get_tx(davinci_spi); + data1_reg_val &= 0xFFFF0000; + data1_reg_val |= tx_data & 0xFFFF; + iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1); - while (1) { - tx_data = davinci_spi->get_tx(davinci_spi); + while (rcount > 0 || wcount > 0) { - data1_reg_val &= ~(0xFFFF); - data1_reg_val |= (0xFFFF & tx_data); - - buf_val = ioread32(davinci_spi->base + SPIBUF); - if ((buf_val & SPIBUF_TXFULL_MASK) == 0) { - iowrite32(data1_reg_val, - davinci_spi->base + SPIDAT1); - - count--; - } - while (ioread32(davinci_spi->base + SPIBUF) - & SPIBUF_RXEMPTY_MASK) - cpu_relax(); - - /* getting the returned byte */ - if (t->rx_buf) { - buf_val = ioread32(davinci_spi->base + SPIBUF); - davinci_spi->get_rx(buf_val, davinci_spi); - } - if (count <= 0) - break; - } - } else { - while (1) { - /* keeps the serial clock going */ - if ((ioread32(davinci_spi->base + SPIBUF) - & SPIBUF_TXFULL_MASK) == 0) - iowrite32(data1_reg_val, - davinci_spi->base + SPIDAT1); + u32 buf, status; - while (ioread32(davinci_spi->base + SPIBUF) & - SPIBUF_RXEMPTY_MASK) - cpu_relax(); + buf = ioread32(davinci_spi->base + SPIBUF); - flg_val = ioread32(davinci_spi->base + SPIFLG); - buf_val = ioread32(davinci_spi->base + SPIBUF); + if (!(buf & SPIBUF_RXEMPTY_MASK)) { + davinci_spi->get_rx(buf & 0xFFFF, davinci_spi); + rcount--; + } - davinci_spi->get_rx(buf_val, davinci_spi); + status = ioread32(davinci_spi->base + SPIFLG); - count--; - if (count <= 0) - break; + if (unlikely(status & SPIFLG_ERROR_MASK)) { + errors = status & SPIFLG_ERROR_MASK; + break; + } + + if (wcount > 0 && !(buf & SPIBUF_TXFULL_MASK)) { + wcount--; + tx_data = davinci_spi->get_tx(davinci_spi); + data1_reg_val &= ~0xFFFF; + data1_reg_val |= 0xFFFF & tx_data; + iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1); } } @@ -683,11 +668,12 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) * Check for bit error, desync error,parity error,timeout error and * receive overflow errors */ - status = ioread32(davinci_spi->base + SPIFLG); - - ret = davinci_spi_check_error(davinci_spi, status); - if (ret != 0) + if (errors) { + ret = davinci_spi_check_error(davinci_spi, errors); + WARN(!ret, "%s: error reported but no error found!\n", + dev_name(&spi->dev)); return ret; + } return t->len; } -- cgit v1.2.3-70-g09d2 From e0d205e9914476e96596c5339fa440fb314ef03b Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Thu, 2 Sep 2010 16:52:06 +0530 Subject: spi: davinci: add support for interrupt mode Add support for SPI interrupt mode operation. Define a per chip-select "io type" variable which specifies if the transfers on this chip-select should happen in interrupt mode or polled mode. Introduce a new function davinci_spi_process_events() to help consolidate the code between interrupt mode processing and polled mode processing. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/include/mach/spi.h | 4 + drivers/spi/davinci_spi.c | 145 ++++++++++++++++++++++++------- 2 files changed, 119 insertions(+), 30 deletions(-) (limited to 'drivers/spi') diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h index e68afe23885..ab45b89a0c5 100644 --- a/arch/arm/mach-davinci/include/mach/spi.h +++ b/arch/arm/mach-davinci/include/mach/spi.h @@ -30,6 +30,7 @@ struct davinci_spi_platform_data { u8 version; u8 num_chipselect; u8 clk_internal; + u8 intr_line; u8 use_dma; u8 *chip_sel; }; @@ -38,6 +39,9 @@ struct davinci_spi_config { u8 wdelay; u8 odd_parity; u8 parity_enable; +#define SPI_IO_TYPE_INTR 0 +#define SPI_IO_TYPE_POLL 1 + u8 io_type; u8 timer_disable; u8 c2tdelay; u8 t2cdelay; diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index cd37697850c..45cc1a77a51 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -59,6 +59,9 @@ #define SPIPC0_SPIENA_MASK BIT(8) /* nREADY */ #define SPIINT_MASKALL 0x0101035F +#define SPIINT_MASKINT 0x0000015F +#define SPI_INTLVL_1 0x000001FF +#define SPI_INTLVL_0 0x00000000 /* SPIDAT1 (upper 16 bit defines) */ #define SPIDAT1_CSHOLD_MASK BIT(12) @@ -132,10 +135,14 @@ struct davinci_spi { resource_size_t pbase; void __iomem *base; size_t region_size; + u32 irq; + struct completion done; const void *tx; void *rx; u8 *tmp_buf; + int rcount; + int wcount; struct davinci_spi_dma *dma_channels; struct davinci_spi_platform_data *pdata; @@ -593,6 +600,43 @@ static int davinci_spi_check_error(struct davinci_spi *davinci_spi, return 0; } +/** + * davinci_spi_process_events - check for and handle any SPI controller events + * @davinci_spi: the controller data + * + * This function will check the SPIFLG register and handle any events that are + * detected there + */ +static int davinci_spi_process_events(struct davinci_spi *davinci_spi) +{ + u32 buf, status, errors = 0, data1_reg_val; + + buf = ioread32(davinci_spi->base + SPIBUF); + + if (davinci_spi->rcount > 0 && !(buf & SPIBUF_RXEMPTY_MASK)) { + davinci_spi->get_rx(buf & 0xFFFF, davinci_spi); + davinci_spi->rcount--; + } + + status = ioread32(davinci_spi->base + SPIFLG); + + if (unlikely(status & SPIFLG_ERROR_MASK)) { + errors = status & SPIFLG_ERROR_MASK; + goto out; + } + + if (davinci_spi->wcount > 0 && !(buf & SPIBUF_TXFULL_MASK)) { + data1_reg_val = ioread32(davinci_spi->base + SPIDAT1); + davinci_spi->wcount--; + data1_reg_val &= ~0xFFFF; + data1_reg_val |= 0xFFFF & davinci_spi->get_tx(davinci_spi); + iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1); + } + +out: + return errors; +} + /** * davinci_spi_bufs - functions which will handle transfer data * @spi: spi device on which data transfer to be done @@ -606,18 +650,22 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) { struct davinci_spi *davinci_spi; int ret; - int rcount, wcount; u32 tx_data, data1_reg_val; u32 errors = 0; + struct davinci_spi_config *spicfg; struct davinci_spi_platform_data *pdata; davinci_spi = spi_master_get_devdata(spi->master); pdata = davinci_spi->pdata; + spicfg = (struct davinci_spi_config *)spi->controller_data; + if (!spicfg) + spicfg = &davinci_spi_default_cfg; davinci_spi->tx = t->tx_buf; davinci_spi->rx = t->rx_buf; - wcount = t->len / davinci_spi->bytes_per_word[spi->chip_select]; - rcount = wcount; + davinci_spi->wcount = t->len / + davinci_spi->bytes_per_word[spi->chip_select]; + davinci_spi->rcount = davinci_spi->wcount; ret = davinci_spi_bufs_prep(spi, davinci_spi); if (ret) @@ -628,42 +676,32 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) /* Enable SPI */ set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK); - clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKALL); + if (spicfg->io_type == SPI_IO_TYPE_INTR) { + set_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKINT); + INIT_COMPLETION(davinci_spi->done); + } /* start the transfer */ - wcount--; + davinci_spi->wcount--; tx_data = davinci_spi->get_tx(davinci_spi); data1_reg_val &= 0xFFFF0000; data1_reg_val |= tx_data & 0xFFFF; iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1); - while (rcount > 0 || wcount > 0) { - - u32 buf, status; - - buf = ioread32(davinci_spi->base + SPIBUF); - - if (!(buf & SPIBUF_RXEMPTY_MASK)) { - davinci_spi->get_rx(buf & 0xFFFF, davinci_spi); - rcount--; - } - - status = ioread32(davinci_spi->base + SPIFLG); - - if (unlikely(status & SPIFLG_ERROR_MASK)) { - errors = status & SPIFLG_ERROR_MASK; - break; - } - - if (wcount > 0 && !(buf & SPIBUF_TXFULL_MASK)) { - wcount--; - tx_data = davinci_spi->get_tx(davinci_spi); - data1_reg_val &= ~0xFFFF; - data1_reg_val |= 0xFFFF & tx_data; - iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1); + /* Wait for the transfer to complete */ + if (spicfg->io_type == SPI_IO_TYPE_INTR) { + wait_for_completion_interruptible(&(davinci_spi->done)); + } else { + while (davinci_spi->rcount > 0 || davinci_spi->wcount > 0) { + errors = davinci_spi_process_events(davinci_spi); + if (errors) + break; + cpu_relax(); } } + clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKALL); + /* * Check for bit error, desync error,parity error,timeout error and * receive overflow errors @@ -678,6 +716,32 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) return t->len; } +/** + * davinci_spi_irq - Interrupt handler for SPI Master Controller + * @irq: IRQ number for this SPI Master + * @context_data: structure for SPI Master controller davinci_spi + * + * ISR will determine that interrupt arrives either for READ or WRITE command. + * According to command it will do the appropriate action. It will check + * transfer length and if it is not zero then dispatch transfer command again. + * If transfer length is zero then it will indicate the COMPLETION so that + * davinci_spi_bufs function can go ahead. + */ +static irqreturn_t davinci_spi_irq(s32 irq, void *context_data) +{ + struct davinci_spi *davinci_spi = context_data; + int status; + + status = davinci_spi_process_events(davinci_spi); + if (unlikely(status != 0)) + clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKINT); + + if ((!davinci_spi->rcount && !davinci_spi->wcount) || status) + complete(&davinci_spi->done); + + return IRQ_HANDLED; +} + static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) { struct davinci_spi *davinci_spi; @@ -866,11 +930,22 @@ static int davinci_spi_probe(struct platform_device *pdev) goto release_region; } + davinci_spi->irq = platform_get_irq(pdev, 0); + if (davinci_spi->irq <= 0) { + ret = -EINVAL; + goto unmap_io; + } + + ret = request_irq(davinci_spi->irq, davinci_spi_irq, 0, + dev_name(&pdev->dev), davinci_spi); + if (ret) + goto unmap_io; + /* Allocate tmp_buf for tx_buf */ davinci_spi->tmp_buf = kzalloc(SPI_BUFSIZ, GFP_KERNEL); if (davinci_spi->tmp_buf == NULL) { ret = -ENOMEM; - goto unmap_io; + goto irq_free; } davinci_spi->bitbang.master = spi_master_get(master); @@ -946,6 +1021,8 @@ static int davinci_spi_probe(struct platform_device *pdev) davinci_spi->get_rx = davinci_spi_rx_buf_u8; davinci_spi->get_tx = davinci_spi_tx_buf_u8; + init_completion(&davinci_spi->done); + /* Reset In/OUT SPI module */ iowrite32(0, davinci_spi->base + SPIGCR0); udelay(100); @@ -967,6 +1044,11 @@ static int davinci_spi_probe(struct platform_device *pdev) clear_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_CLKMOD_MASK); + if (pdata->intr_line) + iowrite32(SPI_INTLVL_1, davinci_spi->base + SPILVL); + else + iowrite32(SPI_INTLVL_0, davinci_spi->base + SPILVL); + iowrite32(CS_DEFAULT, davinci_spi->base + SPIDEF); /* master mode default */ @@ -987,6 +1069,8 @@ put_master: spi_master_put(master); free_tmp_buf: kfree(davinci_spi->tmp_buf); +irq_free: + free_irq(davinci_spi->irq, davinci_spi); unmap_io: iounmap(davinci_spi->base); release_region: @@ -1020,6 +1104,7 @@ static int __exit davinci_spi_remove(struct platform_device *pdev) clk_put(davinci_spi->clk); spi_master_put(master); kfree(davinci_spi->tmp_buf); + free_irq(davinci_spi->irq, davinci_spi); iounmap(davinci_spi->base); release_mem_region(davinci_spi->pbase, davinci_spi->region_size); -- cgit v1.2.3-70-g09d2 From f34bd4cc68fb4548536cac56798d3fad41806724 Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Fri, 3 Sep 2010 11:56:35 +0530 Subject: spi: davinci: configure the invariable bits in spipc0 only once Configure the data-in, data-out and clock functionality pins in SPIPC0 register only once during probe. No need to set these bits for each transfer. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 45cc1a77a51..6f279c5d8f9 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -536,9 +536,6 @@ static int davinci_spi_bufs_prep(struct spi_device *spi, * optimize for both flags staying cleared. */ - op_mode = SPIPC0_DIFUN_MASK - | SPIPC0_DOFUN_MASK - | SPIPC0_CLKFUN_MASK; if (!(spi->mode & SPI_NO_CS)) { pdata = davinci_spi->pdata; if (!pdata->chip_sel || @@ -886,6 +883,7 @@ static int davinci_spi_probe(struct platform_device *pdev) resource_size_t dma_tx_chan = SPI_NO_RESOURCE; resource_size_t dma_eventq = SPI_NO_RESOURCE; int i = 0, ret = 0; + u32 spipc0; pdata = pdev->dev.platform_data; if (pdata == NULL) { @@ -1028,6 +1026,10 @@ static int davinci_spi_probe(struct platform_device *pdev) udelay(100); iowrite32(1, davinci_spi->base + SPIGCR0); + /* Set up SPIPC0. CS and ENA init is done in davinci_spi_bufs_prep */ + spipc0 = SPIPC0_DIFUN_MASK | SPIPC0_DOFUN_MASK | SPIPC0_CLKFUN_MASK; + iowrite32(spipc0, davinci_spi->base + SPIPC0); + /* initialize chip selects */ if (pdata->chip_sel) { for (i = 0; i < pdata->num_chipselect; i++) { -- cgit v1.2.3-70-g09d2 From be88471b96cf3a0d7aea72d5ca9c6a95fb54bade Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Fri, 3 Sep 2010 12:15:28 +0530 Subject: spi: davinci: remove unnecessary function davinci_spi_bufs_prep() The function davinci_spi_bufs_prep() is doing stuff that davinci_spi_setup() is doing. Eliminate it and move the work to davinci_spi_setup() Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 64 ++++++++++++++++------------------------------- 1 file changed, 21 insertions(+), 43 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 6f279c5d8f9..05b6145da3e 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -482,13 +482,33 @@ static int davinci_spi_setup(struct spi_device *spi) int retval; struct davinci_spi *davinci_spi; struct davinci_spi_dma *davinci_spi_dma; + struct davinci_spi_platform_data *pdata; davinci_spi = spi_master_get_devdata(spi->master); + pdata = davinci_spi->pdata; /* if bits per word length is zero then set it default 8 */ if (!spi->bits_per_word) spi->bits_per_word = 8; + if (!(spi->mode & SPI_NO_CS)) { + if ((pdata->chip_sel == NULL) || + (pdata->chip_sel[spi->chip_select] == SPI_INTERN_CS)) + set_io_bits(davinci_spi->base + SPIPC0, + 1 << spi->chip_select); + + } + + if (spi->mode & SPI_READY) + set_io_bits(davinci_spi->base + SPIPC0, SPIPC0_SPIENA_MASK); + + if (spi->mode & SPI_LOOP) + set_io_bits(davinci_spi->base + SPIGCR1, + SPIGCR1_LOOPBACK_MASK); + else + clear_io_bits(davinci_spi->base + SPIGCR1, + SPIGCR1_LOOPBACK_MASK); + if (use_dma && davinci_spi->dma_channels) { davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select]; @@ -523,40 +543,6 @@ static void davinci_spi_cleanup(struct spi_device *spi) } } -static int davinci_spi_bufs_prep(struct spi_device *spi, - struct davinci_spi *davinci_spi) -{ - struct davinci_spi_platform_data *pdata; - int op_mode = 0; - - /* - * REVISIT unless devices disagree about SPI_LOOP or - * SPI_READY (SPI_NO_CS only allows one device!), this - * should not need to be done before each message... - * optimize for both flags staying cleared. - */ - - if (!(spi->mode & SPI_NO_CS)) { - pdata = davinci_spi->pdata; - if (!pdata->chip_sel || - pdata->chip_sel[spi->chip_select] == SPI_INTERN_CS) - op_mode |= 1 << spi->chip_select; - } - if (spi->mode & SPI_READY) - op_mode |= SPIPC0_SPIENA_MASK; - - iowrite32(op_mode, davinci_spi->base + SPIPC0); - - if (spi->mode & SPI_LOOP) - set_io_bits(davinci_spi->base + SPIGCR1, - SPIGCR1_LOOPBACK_MASK); - else - clear_io_bits(davinci_spi->base + SPIGCR1, - SPIGCR1_LOOPBACK_MASK); - - return 0; -} - static int davinci_spi_check_error(struct davinci_spi *davinci_spi, int int_status) { @@ -664,10 +650,6 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) davinci_spi->bytes_per_word[spi->chip_select]; davinci_spi->rcount = davinci_spi->wcount; - ret = davinci_spi_bufs_prep(spi, davinci_spi); - if (ret) - return ret; - data1_reg_val = ioread32(davinci_spi->base + SPIDAT1); /* Enable SPI */ @@ -769,10 +751,6 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) init_completion(&davinci_spi_dma->dma_rx_completion); init_completion(&davinci_spi_dma->dma_tx_completion); - ret = davinci_spi_bufs_prep(spi, davinci_spi); - if (ret) - return ret; - count = t->len / data_type; /* the number of elements */ /* disable all interrupts for dma transfers */ @@ -1026,7 +1004,7 @@ static int davinci_spi_probe(struct platform_device *pdev) udelay(100); iowrite32(1, davinci_spi->base + SPIGCR0); - /* Set up SPIPC0. CS and ENA init is done in davinci_spi_bufs_prep */ + /* Set up SPIPC0. CS and ENA init is done in davinci_spi_setup */ spipc0 = SPIPC0_DIFUN_MASK | SPIPC0_DOFUN_MASK | SPIPC0_CLKFUN_MASK; iowrite32(spipc0, davinci_spi->base + SPIPC0); -- cgit v1.2.3-70-g09d2 From b23a5d4691043e97bbfde8c2fb5b8fecdc400308 Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Fri, 24 Sep 2010 18:53:32 +0530 Subject: spi: davinci: remove unnecessary call to davinci_spi_setup_transfer() Remove unnecessary call to davinci_spi_setup_transfer() at the end of davinci_spi_setup(). davinci_spi_setup_transfer() is registered as the setup_transfer callback for the bitbang layer and is called independently by the bitbang layer to setup the transfer before it begins. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 05b6145da3e..77109dc11b0 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -479,7 +479,7 @@ static int davinci_spi_request_dma(struct spi_device *spi) */ static int davinci_spi_setup(struct spi_device *spi) { - int retval; + int retval = 0; struct davinci_spi *davinci_spi; struct davinci_spi_dma *davinci_spi_dma; struct davinci_spi_platform_data *pdata; @@ -512,16 +512,11 @@ static int davinci_spi_setup(struct spi_device *spi) if (use_dma && davinci_spi->dma_channels) { davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select]; - if ((davinci_spi_dma->dma_rx_channel == -1) - || (davinci_spi_dma->dma_tx_channel == -1)) { + if ((davinci_spi_dma->dma_rx_channel == -1) || + (davinci_spi_dma->dma_tx_channel == -1)) retval = davinci_spi_request_dma(spi); - if (retval < 0) - return retval; - } } - retval = davinci_spi_setup_transfer(spi, NULL); - return retval; } -- cgit v1.2.3-70-g09d2 From 96fd881f22b44fc14772316a6b9231012393cda8 Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Mon, 27 Sep 2010 22:23:23 +0530 Subject: spi: davinci: do not store DMA channel information per chip select Do not store DMA channel related information per chip-select since that information does not depend on the chip select. The same DMA channels can be used for transfers on all chip-selects since the transfer happens one-at-a-time. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 47 ++++++++++++++++++----------------------------- 1 file changed, 18 insertions(+), 29 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 77109dc11b0..4aa522134a9 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -143,7 +143,7 @@ struct davinci_spi { u8 *tmp_buf; int rcount; int wcount; - struct davinci_spi_dma *dma_channels; + struct davinci_spi_dma dma_channels; struct davinci_spi_platform_data *pdata; void (*get_rx)(u32 rx_data, struct davinci_spi *); @@ -407,7 +407,7 @@ static void davinci_spi_dma_rx_callback(unsigned lch, u16 ch_status, void *data) struct davinci_spi_dma *davinci_spi_dma; davinci_spi = spi_master_get_devdata(spi->master); - davinci_spi_dma = &(davinci_spi->dma_channels[spi->chip_select]); + davinci_spi_dma = &davinci_spi->dma_channels; if (ch_status == DMA_COMPLETE) edma_stop(davinci_spi_dma->dma_rx_channel); @@ -426,7 +426,7 @@ static void davinci_spi_dma_tx_callback(unsigned lch, u16 ch_status, void *data) struct davinci_spi_dma *davinci_spi_dma; davinci_spi = spi_master_get_devdata(spi->master); - davinci_spi_dma = &(davinci_spi->dma_channels[spi->chip_select]); + davinci_spi_dma = &davinci_spi->dma_channels; if (ch_status == DMA_COMPLETE) edma_stop(davinci_spi_dma->dma_tx_channel); @@ -446,7 +446,7 @@ static int davinci_spi_request_dma(struct spi_device *spi) int r; davinci_spi = spi_master_get_devdata(spi->master); - davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select]; + davinci_spi_dma = &davinci_spi->dma_channels; sdev = davinci_spi->bitbang.master->dev.parent; r = edma_alloc_channel(davinci_spi_dma->dma_rx_sync_dev, @@ -509,8 +509,8 @@ static int davinci_spi_setup(struct spi_device *spi) clear_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_LOOPBACK_MASK); - if (use_dma && davinci_spi->dma_channels) { - davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select]; + if (use_dma) { + davinci_spi_dma = &davinci_spi->dma_channels; if ((davinci_spi_dma->dma_rx_channel == -1) || (davinci_spi_dma->dma_tx_channel == -1)) @@ -522,13 +522,11 @@ static int davinci_spi_setup(struct spi_device *spi) static void davinci_spi_cleanup(struct spi_device *spi) { - struct davinci_spi *davinci_spi = spi_master_get_devdata(spi->master); - struct davinci_spi_dma *davinci_spi_dma; - - davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select]; - - if (use_dma && davinci_spi->dma_channels) { - davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select]; + if (use_dma) { + struct davinci_spi *davinci_spi = + spi_master_get_devdata(spi->master); + struct davinci_spi_dma *davinci_spi_dma = + &davinci_spi->dma_channels; if ((davinci_spi_dma->dma_rx_channel != -1) && (davinci_spi_dma->dma_tx_channel != -1)) { @@ -730,7 +728,7 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) davinci_spi = spi_master_get_devdata(spi->master); sdev = davinci_spi->bitbang.master->dev.parent; - davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select]; + davinci_spi_dma = &davinci_spi->dma_channels; tx_reg = (unsigned long)davinci_spi->pbase + SPIDAT1; rx_reg = (unsigned long)davinci_spi->pbase + SPIBUF; @@ -967,22 +965,13 @@ static int davinci_spi_probe(struct platform_device *pdev) use_dma = 0; } else { davinci_spi->bitbang.txrx_bufs = davinci_spi_bufs_dma; - davinci_spi->dma_channels = kzalloc(master->num_chipselect - * sizeof(struct davinci_spi_dma), GFP_KERNEL); - if (davinci_spi->dma_channels == NULL) { - ret = -ENOMEM; - goto free_clk; - } - for (i = 0; i < master->num_chipselect; i++) { - davinci_spi->dma_channels[i].dma_rx_channel = -1; - davinci_spi->dma_channels[i].dma_rx_sync_dev = - dma_rx_chan; - davinci_spi->dma_channels[i].dma_tx_channel = -1; - davinci_spi->dma_channels[i].dma_tx_sync_dev = - dma_tx_chan; - davinci_spi->dma_channels[i].eventq = dma_eventq; - } + davinci_spi->dma_channels.dma_rx_channel = -1; + davinci_spi->dma_channels.dma_rx_sync_dev = dma_rx_chan; + davinci_spi->dma_channels.dma_tx_channel = -1; + davinci_spi->dma_channels.dma_tx_sync_dev = dma_tx_chan; + davinci_spi->dma_channels.eventq = dma_eventq; + dev_info(&pdev->dev, "DaVinci SPI driver in EDMA mode\n" "Using RX channel = %d , TX channel = %d and " "event queue = %d", dma_rx_chan, dma_tx_chan, -- cgit v1.2.3-70-g09d2 From c29e3c60e75d1cc1262ac8af379738b6fd851f33 Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Tue, 28 Sep 2010 13:59:26 +0530 Subject: spi: davinci: always start transmit DMA Due to the full duplex nature of the SPI bus, the SPI master on DaVinci needs transmit to be active even if the tranfer is only meant to collect receive data. The current code achieves this by using a temporary zeroed buffer to provide DMA data in case the transfer does not have a transmit buffer provided. However, the transmit DMA is started only if transmit buffer is provided rendering the temporary buffer unused. Instead the code relies on a write to SPIDAT1 register to trigger transmit operation. This however only sends two bytes of data. Fix this by starting transmit DMA always. This changes exposes a bug on DM355 where the CSHOLD bit in SPIDAT1 needs to be written to in between transfers. Handle that by introducing a "cshold_bug" platform data which is set to true for DM355. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/dm355.c | 1 + arch/arm/mach-davinci/include/mach/spi.h | 1 + drivers/spi/davinci_spi.c | 22 +++++++++------------- 3 files changed, 11 insertions(+), 13 deletions(-) (limited to 'drivers/spi') diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index e311f29ffb5..27ee870b2d2 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c @@ -413,6 +413,7 @@ static struct davinci_spi_platform_data dm355_spi0_pdata = { .version = SPI_VERSION_1, .num_chipselect = 2, .clk_internal = 1, + .cshold_bug = true, }; static struct platform_device dm355_spi0_device = { .name = "spi_davinci", diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h index ab45b89a0c5..68db6d5daaf 100644 --- a/arch/arm/mach-davinci/include/mach/spi.h +++ b/arch/arm/mach-davinci/include/mach/spi.h @@ -33,6 +33,7 @@ struct davinci_spi_platform_data { u8 intr_line; u8 use_dma; u8 *chip_sel; + bool cshold_bug; }; struct davinci_spi_config { diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 4aa522134a9..a5f03dd8d8d 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -719,13 +719,14 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) struct davinci_spi *davinci_spi; int int_status = 0; int count, temp_count; - u32 data1_reg_val; struct davinci_spi_dma *davinci_spi_dma; int data_type, ret; unsigned long tx_reg, rx_reg; + struct davinci_spi_platform_data *pdata; struct device *sdev; davinci_spi = spi_master_get_devdata(spi->master); + pdata = davinci_spi->pdata; sdev = davinci_spi->bitbang.master->dev.parent; davinci_spi_dma = &davinci_spi->dma_channels; @@ -739,8 +740,6 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) /* convert len to words based on bits_per_word */ data_type = davinci_spi->bytes_per_word[spi->chip_select]; - data1_reg_val = ioread32(davinci_spi->base + SPIDAT1); - init_completion(&davinci_spi_dma->dma_rx_completion); init_completion(&davinci_spi_dma->dma_tx_completion); @@ -781,9 +780,6 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) edma_set_dest_index(davinci_spi_dma->dma_tx_channel, 0, 0); if (t->rx_buf) { - /* initiate transaction */ - iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1); - t->rx_dma = dma_map_single(&spi->dev, (void *)t->rx_buf, count, DMA_FROM_DEVICE); if (dma_mapping_error(&spi->dev, t->rx_dma)) { @@ -805,18 +801,18 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) data_type, 0); } - if ((t->tx_buf) || (t->rx_buf)) - edma_start(davinci_spi_dma->dma_tx_channel); + if (pdata->cshold_bug) { + u16 spidat1 = ioread16(davinci_spi->base + SPIDAT1 + 2); + iowrite16(spidat1, davinci_spi->base + SPIDAT1 + 2); + } if (t->rx_buf) edma_start(davinci_spi_dma->dma_rx_channel); - if ((t->rx_buf) || (t->tx_buf)) - davinci_spi_set_dma_req(spi, 1); + edma_start(davinci_spi_dma->dma_tx_channel); + davinci_spi_set_dma_req(spi, 1); - if (t->tx_buf) - wait_for_completion_interruptible( - &davinci_spi_dma->dma_tx_completion); + wait_for_completion_interruptible(&davinci_spi_dma->dma_tx_completion); if (t->rx_buf) wait_for_completion_interruptible( -- cgit v1.2.3-70-g09d2 From d3f7141cbf4580b2f18f93940df29cf0c15e7ef5 Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Wed, 29 Sep 2010 12:31:54 +0530 Subject: spi: davinci: do not use temporary buffer if no transmit data provided Remove usage of temporary buffer when no transmit data is provided. Instead, use the transmit register itself as the source of data. By choosing the transmit register itself as the source of data, this patch helps remove unnecessary accesses to memory when no real data is being transmitted. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 52 +++++++++++++++++++---------------------------- 1 file changed, 21 insertions(+), 31 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index a5f03dd8d8d..f5129390bc2 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -38,8 +38,6 @@ #define CS_DEFAULT 0xFF -#define SPI_BUFSIZ (SMP_CACHE_BYTES + 1) - #define SPIFMT_PHASE_MASK BIT(16) #define SPIFMT_POLARITY_MASK BIT(17) #define SPIFMT_DISTIMER_MASK BIT(18) @@ -140,7 +138,6 @@ struct davinci_spi { const void *tx; void *rx; - u8 *tmp_buf; int rcount; int wcount; struct davinci_spi_dma dma_channels; @@ -718,7 +715,7 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) { struct davinci_spi *davinci_spi; int int_status = 0; - int count, temp_count; + int count; struct davinci_spi_dma *davinci_spi_dma; int data_type, ret; unsigned long tx_reg, rx_reg; @@ -750,6 +747,18 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) /* Enable SPI */ set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK); + /* + * Transmit DMA setup + * + * If there is transmit data, map the transmit buffer, set it as the + * source of data and set the source B index to data size. + * If there is no transmit data, set the transmit register as the + * source of data, and set the source B index to zero. + * + * The destination is always the transmit register itself. And the + * destination never increments. + */ + if (t->tx_buf) { t->tx_dma = dma_map_single(&spi->dev, (void *)t->tx_buf, count, DMA_TO_DEVICE); @@ -758,25 +767,15 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) " TX buffer\n", count); return -ENOMEM; } - temp_count = count; - } else { - /* We need TX clocking for RX transaction */ - t->tx_dma = dma_map_single(&spi->dev, - (void *)davinci_spi->tmp_buf, count + 1, - DMA_TO_DEVICE); - if (dma_mapping_error(&spi->dev, t->tx_dma)) { - dev_dbg(sdev, "Unable to DMA map a %d bytes" - " TX tmp buffer\n", count); - return -ENOMEM; - } - temp_count = count + 1; } edma_set_transfer_params(davinci_spi_dma->dma_tx_channel, - data_type, temp_count, 1, 0, ASYNC); + data_type, count, 1, 0, ASYNC); edma_set_dest(davinci_spi_dma->dma_tx_channel, tx_reg, INCR, W8BIT); - edma_set_src(davinci_spi_dma->dma_tx_channel, t->tx_dma, INCR, W8BIT); - edma_set_src_index(davinci_spi_dma->dma_tx_channel, data_type, 0); + edma_set_src(davinci_spi_dma->dma_tx_channel, + t->tx_buf ? t->tx_dma : tx_reg, INCR, W8BIT); + edma_set_src_index(davinci_spi_dma->dma_tx_channel, + t->tx_buf ? data_type : 0, 0); edma_set_dest_index(davinci_spi_dma->dma_tx_channel, 0, 0); if (t->rx_buf) { @@ -818,7 +817,8 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) wait_for_completion_interruptible( &davinci_spi_dma->dma_rx_completion); - dma_unmap_single(NULL, t->tx_dma, temp_count, DMA_TO_DEVICE); + if (t->tx_buf) + dma_unmap_single(NULL, t->tx_dma, count, DMA_TO_DEVICE); if (t->rx_buf) dma_unmap_single(NULL, t->rx_dma, count, DMA_FROM_DEVICE); @@ -906,17 +906,10 @@ static int davinci_spi_probe(struct platform_device *pdev) if (ret) goto unmap_io; - /* Allocate tmp_buf for tx_buf */ - davinci_spi->tmp_buf = kzalloc(SPI_BUFSIZ, GFP_KERNEL); - if (davinci_spi->tmp_buf == NULL) { - ret = -ENOMEM; - goto irq_free; - } - davinci_spi->bitbang.master = spi_master_get(master); if (davinci_spi->bitbang.master == NULL) { ret = -ENODEV; - goto free_tmp_buf; + goto irq_free; } davinci_spi->clk = clk_get(&pdev->dev, NULL); @@ -1027,8 +1020,6 @@ free_clk: clk_put(davinci_spi->clk); put_master: spi_master_put(master); -free_tmp_buf: - kfree(davinci_spi->tmp_buf); irq_free: free_irq(davinci_spi->irq, davinci_spi); unmap_io: @@ -1063,7 +1054,6 @@ static int __exit davinci_spi_remove(struct platform_device *pdev) clk_disable(davinci_spi->clk); clk_put(davinci_spi->clk); spi_master_put(master); - kfree(davinci_spi->tmp_buf); free_irq(davinci_spi->irq, davinci_spi); iounmap(davinci_spi->base); release_mem_region(davinci_spi->pbase, davinci_spi->region_size); -- cgit v1.2.3-70-g09d2 From e91c659bbcf2f47519260182a75f64ede34df3ca Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Fri, 1 Oct 2010 10:29:29 +0530 Subject: spi: davinci: always start receive DMA In keeping with the full duplex nature of the SPI bus. Always start receive DMA along with transmit DMA. If there is no receive buffer provided with the transfer, use a temporary buffer to receive the data to be thrown away. [michael.williamson@criticallink.com: receive DMA size should be same as transfer length to avoid hang-up when transfer length is smaller than temporary rx buffer size (rx buffer not provided)] Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 70 ++++++++++++++++++++++++++++------------------- 1 file changed, 42 insertions(+), 28 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index f5129390bc2..705d0069bce 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -138,6 +138,8 @@ struct davinci_spi { const void *tx; void *rx; +#define SPI_TMP_BUFSZ (SMP_CACHE_BYTES + 1) + u8 rx_tmp_buf[SPI_TMP_BUFSZ]; int rcount; int wcount; struct davinci_spi_dma dma_channels; @@ -716,10 +718,12 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) struct davinci_spi *davinci_spi; int int_status = 0; int count; + unsigned rx_buf_count; struct davinci_spi_dma *davinci_spi_dma; int data_type, ret; unsigned long tx_reg, rx_reg; struct davinci_spi_platform_data *pdata; + void *rx_buf; struct device *sdev; davinci_spi = spi_master_get_devdata(spi->master); @@ -778,50 +782,60 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) t->tx_buf ? data_type : 0, 0); edma_set_dest_index(davinci_spi_dma->dma_tx_channel, 0, 0); + /* + * Receive DMA setup + * + * If there is receive buffer, use it to receive data. If there + * is none provided, use a temporary receive buffer. Set the + * destination B index to 0 so effectively only one byte is used + * in the temporary buffer (address does not increment). + * + * The source of receive data is the receive data register. The + * source address never increments. + */ + if (t->rx_buf) { - t->rx_dma = dma_map_single(&spi->dev, (void *)t->rx_buf, count, - DMA_FROM_DEVICE); - if (dma_mapping_error(&spi->dev, t->rx_dma)) { - dev_dbg(sdev, "Couldn't DMA map a %d bytes RX buffer\n", - count); - if (t->tx_buf != NULL) - dma_unmap_single(NULL, t->tx_dma, - count, DMA_TO_DEVICE); - return -ENOMEM; - } - edma_set_transfer_params(davinci_spi_dma->dma_rx_channel, - data_type, count, 1, 0, ASYNC); - edma_set_src(davinci_spi_dma->dma_rx_channel, - rx_reg, INCR, W8BIT); - edma_set_dest(davinci_spi_dma->dma_rx_channel, - t->rx_dma, INCR, W8BIT); - edma_set_src_index(davinci_spi_dma->dma_rx_channel, 0, 0); - edma_set_dest_index(davinci_spi_dma->dma_rx_channel, - data_type, 0); + rx_buf = t->rx_buf; + rx_buf_count = count; + } else { + rx_buf = davinci_spi->rx_tmp_buf; + rx_buf_count = sizeof(davinci_spi->rx_tmp_buf); + } + + t->rx_dma = dma_map_single(&spi->dev, rx_buf, rx_buf_count, + DMA_FROM_DEVICE); + if (dma_mapping_error(&spi->dev, t->rx_dma)) { + dev_dbg(sdev, "Couldn't DMA map a %d bytes RX buffer\n", + rx_buf_count); + if (t->tx_buf) + dma_unmap_single(NULL, t->tx_dma, count, DMA_TO_DEVICE); + return -ENOMEM; } + edma_set_transfer_params(davinci_spi_dma->dma_rx_channel, data_type, + count, 1, 0, ASYNC); + edma_set_src(davinci_spi_dma->dma_rx_channel, rx_reg, INCR, W8BIT); + edma_set_dest(davinci_spi_dma->dma_rx_channel, t->rx_dma, INCR, W8BIT); + edma_set_src_index(davinci_spi_dma->dma_rx_channel, 0, 0); + edma_set_dest_index(davinci_spi_dma->dma_rx_channel, + t->rx_buf ? data_type : 0, 0); + if (pdata->cshold_bug) { u16 spidat1 = ioread16(davinci_spi->base + SPIDAT1 + 2); iowrite16(spidat1, davinci_spi->base + SPIDAT1 + 2); } - if (t->rx_buf) - edma_start(davinci_spi_dma->dma_rx_channel); - + edma_start(davinci_spi_dma->dma_rx_channel); edma_start(davinci_spi_dma->dma_tx_channel); davinci_spi_set_dma_req(spi, 1); wait_for_completion_interruptible(&davinci_spi_dma->dma_tx_completion); - - if (t->rx_buf) - wait_for_completion_interruptible( - &davinci_spi_dma->dma_rx_completion); + wait_for_completion_interruptible(&davinci_spi_dma->dma_rx_completion); if (t->tx_buf) dma_unmap_single(NULL, t->tx_dma, count, DMA_TO_DEVICE); - if (t->rx_buf) - dma_unmap_single(NULL, t->rx_dma, count, DMA_FROM_DEVICE); + dma_unmap_single(NULL, t->rx_dma, rx_buf_count, DMA_FROM_DEVICE); /* * Check for bit error, desync error,parity error,timeout error and -- cgit v1.2.3-70-g09d2 From 49fc3f497d7d409e9b0dc384fe7c173bccd3b1a1 Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Fri, 1 Oct 2010 11:22:23 +0530 Subject: spi: davinci: use edma_write_slot() to setup EDMA PaRAM slot Currently a series of EDMA API calls are being made to setup various aspects of EDMA PaRAM slots for receive and transmit. Instead setup the PaRAM using a local structure and write once to the hardware using edma_write_slot() Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 34 +++++++++++++++++++--------------- 1 file changed, 19 insertions(+), 15 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 705d0069bce..67f1e463c1f 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -725,6 +725,7 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) struct davinci_spi_platform_data *pdata; void *rx_buf; struct device *sdev; + struct edmacc_param param; davinci_spi = spi_master_get_devdata(spi->master); pdata = davinci_spi->pdata; @@ -773,14 +774,15 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) } } - edma_set_transfer_params(davinci_spi_dma->dma_tx_channel, - data_type, count, 1, 0, ASYNC); - edma_set_dest(davinci_spi_dma->dma_tx_channel, tx_reg, INCR, W8BIT); - edma_set_src(davinci_spi_dma->dma_tx_channel, - t->tx_buf ? t->tx_dma : tx_reg, INCR, W8BIT); - edma_set_src_index(davinci_spi_dma->dma_tx_channel, - t->tx_buf ? data_type : 0, 0); - edma_set_dest_index(davinci_spi_dma->dma_tx_channel, 0, 0); + param.opt = TCINTEN | EDMA_TCC(davinci_spi_dma->dma_tx_channel); + param.src = t->tx_buf ? t->tx_dma : tx_reg; + param.a_b_cnt = count << 16 | data_type; + param.dst = tx_reg; + param.src_dst_bidx = t->tx_buf ? data_type : 0; + param.link_bcntrld = 0xffff; + param.src_dst_cidx = 0; + param.ccnt = 1; + edma_write_slot(davinci_spi_dma->dma_tx_channel, ¶m); /* * Receive DMA setup @@ -812,13 +814,15 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) return -ENOMEM; } - edma_set_transfer_params(davinci_spi_dma->dma_rx_channel, data_type, - count, 1, 0, ASYNC); - edma_set_src(davinci_spi_dma->dma_rx_channel, rx_reg, INCR, W8BIT); - edma_set_dest(davinci_spi_dma->dma_rx_channel, t->rx_dma, INCR, W8BIT); - edma_set_src_index(davinci_spi_dma->dma_rx_channel, 0, 0); - edma_set_dest_index(davinci_spi_dma->dma_rx_channel, - t->rx_buf ? data_type : 0, 0); + param.opt = TCINTEN | EDMA_TCC(davinci_spi_dma->dma_rx_channel); + param.src = rx_reg; + param.a_b_cnt = count << 16 | data_type; + param.dst = t->rx_dma; + param.src_dst_bidx = (t->rx_buf ? data_type : 0) << 16; + param.link_bcntrld = 0xffff; + param.src_dst_cidx = 0; + param.ccnt = 1; + edma_write_slot(davinci_spi_dma->dma_rx_channel, ¶m); if (pdata->cshold_bug) { u16 spidat1 = ioread16(davinci_spi->base + SPIDAT1 + 2); -- cgit v1.2.3-70-g09d2 From a4f4497b86a689aa8c827d4ebe0d00c4eba66f76 Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Fri, 1 Oct 2010 14:00:48 +0530 Subject: spi: davinci: fix DMA event generation stoppage Do not stop SPI DMA event generation in either transmit or receive DMA event call back because the single setting affects both transmit and receive event generation. Depending on the order in which the callbacks happen, transmit or receive events can get unintentionally stalled. Instead, disable event generation once after both the transmit and receive DMA completes. While at it, remove the largely under-used function to set or clear DMA event generation. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 18 +++--------------- 1 file changed, 3 insertions(+), 15 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 67f1e463c1f..9695f98b03b 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -211,16 +211,6 @@ static inline void clear_io_bits(void __iomem *addr, u32 bits) iowrite32(v, addr); } -static void davinci_spi_set_dma_req(const struct spi_device *spi, int enable) -{ - struct davinci_spi *davinci_spi = spi_master_get_devdata(spi->master); - - if (enable) - set_io_bits(davinci_spi->base + SPIINT, SPIINT_DMA_REQ_EN); - else - clear_io_bits(davinci_spi->base + SPIINT, SPIINT_DMA_REQ_EN); -} - /* * Interface to control the chip select signal */ @@ -414,8 +404,6 @@ static void davinci_spi_dma_rx_callback(unsigned lch, u16 ch_status, void *data) edma_clean_channel(davinci_spi_dma->dma_rx_channel); complete(&davinci_spi_dma->dma_rx_completion); - /* We must disable the DMA RX request */ - davinci_spi_set_dma_req(spi, 0); } static void davinci_spi_dma_tx_callback(unsigned lch, u16 ch_status, void *data) @@ -433,8 +421,6 @@ static void davinci_spi_dma_tx_callback(unsigned lch, u16 ch_status, void *data) edma_clean_channel(davinci_spi_dma->dma_tx_channel); complete(&davinci_spi_dma->dma_tx_completion); - /* We must disable the DMA TX request */ - davinci_spi_set_dma_req(spi, 0); } static int davinci_spi_request_dma(struct spi_device *spi) @@ -831,7 +817,7 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) edma_start(davinci_spi_dma->dma_rx_channel); edma_start(davinci_spi_dma->dma_tx_channel); - davinci_spi_set_dma_req(spi, 1); + set_io_bits(davinci_spi->base + SPIINT, SPIINT_DMA_REQ_EN); wait_for_completion_interruptible(&davinci_spi_dma->dma_tx_completion); wait_for_completion_interruptible(&davinci_spi_dma->dma_rx_completion); @@ -841,6 +827,8 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) dma_unmap_single(NULL, t->rx_dma, rx_buf_count, DMA_FROM_DEVICE); + clear_io_bits(davinci_spi->base + SPIINT, SPIINT_DMA_REQ_EN); + /* * Check for bit error, desync error,parity error,timeout error and * receive overflow errors -- cgit v1.2.3-70-g09d2 From 903ca25b219e28e3513ca4c2ff379fcdf19e057e Mon Sep 17 00:00:00 2001 From: Sekhar Nori Date: Fri, 1 Oct 2010 14:51:40 +0530 Subject: spi: davinci: do not allocate DMA channels during SPI device setup Do not allocate (and de-allocate) SPI DMA channels during setup (and cleanup) for each SPI device. Instead, allocate the DMA channels once duing probe and use them for the life time of the driver. This makes sense since there are dedicated DMA channels meant for SPI use. This also helps remove the unnecessary DMA "sync_dev" variables being used to store DMA channel information. Also, the "use_dma" platform variable is now eliminated since it is possible to check if the platform supports DMA or not based upon whether DMA resources can be found or not. Tested-By: Michael Williamson Tested-By: Brian Niebuhr Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/include/mach/spi.h | 1 - drivers/spi/davinci_spi.c | 153 +++++++++++-------------------- 2 files changed, 51 insertions(+), 103 deletions(-) (limited to 'drivers/spi') diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h index 68db6d5daaf..f7586a03678 100644 --- a/arch/arm/mach-davinci/include/mach/spi.h +++ b/arch/arm/mach-davinci/include/mach/spi.h @@ -31,7 +31,6 @@ struct davinci_spi_platform_data { u8 num_chipselect; u8 clk_internal; u8 intr_line; - u8 use_dma; u8 *chip_sel; bool cshold_bug; }; diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 9695f98b03b..6db47860102 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -116,8 +116,6 @@ struct davinci_spi_dma { int dma_tx_channel; int dma_rx_channel; - int dma_tx_sync_dev; - int dma_rx_sync_dev; enum dma_event_q eventq; struct completion dma_tx_completion; @@ -153,8 +151,6 @@ struct davinci_spi { static struct davinci_spi_config davinci_spi_default_cfg; -static unsigned use_dma; - static void davinci_spi_rx_buf_u8(u32 data, struct davinci_spi *davinci_spi) { if (davinci_spi->rx) { @@ -391,12 +387,7 @@ static int davinci_spi_setup_transfer(struct spi_device *spi, static void davinci_spi_dma_rx_callback(unsigned lch, u16 ch_status, void *data) { - struct spi_device *spi = (struct spi_device *)data; - struct davinci_spi *davinci_spi; - struct davinci_spi_dma *davinci_spi_dma; - - davinci_spi = spi_master_get_devdata(spi->master); - davinci_spi_dma = &davinci_spi->dma_channels; + struct davinci_spi_dma *davinci_spi_dma = data; if (ch_status == DMA_COMPLETE) edma_stop(davinci_spi_dma->dma_rx_channel); @@ -408,12 +399,7 @@ static void davinci_spi_dma_rx_callback(unsigned lch, u16 ch_status, void *data) static void davinci_spi_dma_tx_callback(unsigned lch, u16 ch_status, void *data) { - struct spi_device *spi = (struct spi_device *)data; - struct davinci_spi *davinci_spi; - struct davinci_spi_dma *davinci_spi_dma; - - davinci_spi = spi_master_get_devdata(spi->master); - davinci_spi_dma = &davinci_spi->dma_channels; + struct davinci_spi_dma *davinci_spi_dma = data; if (ch_status == DMA_COMPLETE) edma_stop(davinci_spi_dma->dma_tx_channel); @@ -423,39 +409,6 @@ static void davinci_spi_dma_tx_callback(unsigned lch, u16 ch_status, void *data) complete(&davinci_spi_dma->dma_tx_completion); } -static int davinci_spi_request_dma(struct spi_device *spi) -{ - struct davinci_spi *davinci_spi; - struct davinci_spi_dma *davinci_spi_dma; - struct device *sdev; - int r; - - davinci_spi = spi_master_get_devdata(spi->master); - davinci_spi_dma = &davinci_spi->dma_channels; - sdev = davinci_spi->bitbang.master->dev.parent; - - r = edma_alloc_channel(davinci_spi_dma->dma_rx_sync_dev, - davinci_spi_dma_rx_callback, spi, - davinci_spi_dma->eventq); - if (r < 0) { - dev_dbg(sdev, "Unable to request DMA channel for SPI RX\n"); - return -EAGAIN; - } - davinci_spi_dma->dma_rx_channel = r; - r = edma_alloc_channel(davinci_spi_dma->dma_tx_sync_dev, - davinci_spi_dma_tx_callback, spi, - davinci_spi_dma->eventq); - if (r < 0) { - edma_free_channel(davinci_spi_dma->dma_rx_channel); - davinci_spi_dma->dma_rx_channel = -1; - dev_dbg(sdev, "Unable to request DMA channel for SPI TX\n"); - return -EAGAIN; - } - davinci_spi_dma->dma_tx_channel = r; - - return 0; -} - /** * davinci_spi_setup - This functions will set default transfer method * @spi: spi device on which data transfer to be done @@ -466,7 +419,6 @@ static int davinci_spi_setup(struct spi_device *spi) { int retval = 0; struct davinci_spi *davinci_spi; - struct davinci_spi_dma *davinci_spi_dma; struct davinci_spi_platform_data *pdata; davinci_spi = spi_master_get_devdata(spi->master); @@ -494,33 +446,9 @@ static int davinci_spi_setup(struct spi_device *spi) clear_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_LOOPBACK_MASK); - if (use_dma) { - davinci_spi_dma = &davinci_spi->dma_channels; - - if ((davinci_spi_dma->dma_rx_channel == -1) || - (davinci_spi_dma->dma_tx_channel == -1)) - retval = davinci_spi_request_dma(spi); - } - return retval; } -static void davinci_spi_cleanup(struct spi_device *spi) -{ - if (use_dma) { - struct davinci_spi *davinci_spi = - spi_master_get_devdata(spi->master); - struct davinci_spi_dma *davinci_spi_dma = - &davinci_spi->dma_channels; - - if ((davinci_spi_dma->dma_rx_channel != -1) - && (davinci_spi_dma->dma_tx_channel != -1)) { - edma_free_channel(davinci_spi_dma->dma_tx_channel); - edma_free_channel(davinci_spi_dma->dma_rx_channel); - } - } -} - static int davinci_spi_check_error(struct davinci_spi *davinci_spi, int int_status) { @@ -842,6 +770,30 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) return t->len; } +static int davinci_spi_request_dma(struct davinci_spi_dma *davinci_spi_dma) +{ + int r; + + r = edma_alloc_channel(davinci_spi_dma->dma_rx_channel, + davinci_spi_dma_rx_callback, davinci_spi_dma, + davinci_spi_dma->eventq); + if (r < 0) { + pr_err("Unable to request DMA channel for SPI RX\n"); + return -EAGAIN; + } + + r = edma_alloc_channel(davinci_spi_dma->dma_tx_channel, + davinci_spi_dma_tx_callback, davinci_spi_dma, + davinci_spi_dma->eventq); + if (r < 0) { + edma_free_channel(davinci_spi_dma->dma_rx_channel); + pr_err("Unable to request DMA channel for SPI TX\n"); + return -EAGAIN; + } + + return 0; +} + /** * davinci_spi_probe - probe function for SPI Master Controller * @pdev: platform_device structure which contains plateform specific data @@ -928,45 +880,39 @@ static int davinci_spi_probe(struct platform_device *pdev) master->bus_num = pdev->id; master->num_chipselect = pdata->num_chipselect; master->setup = davinci_spi_setup; - master->cleanup = davinci_spi_cleanup; davinci_spi->bitbang.chipselect = davinci_spi_chipselect; davinci_spi->bitbang.setup_transfer = davinci_spi_setup_transfer; davinci_spi->version = pdata->version; - use_dma = pdata->use_dma; davinci_spi->bitbang.flags = SPI_NO_CS | SPI_LSB_FIRST | SPI_LOOP; if (davinci_spi->version == SPI_VERSION_2) davinci_spi->bitbang.flags |= SPI_READY; - if (use_dma) { - r = platform_get_resource(pdev, IORESOURCE_DMA, 0); - if (r) - dma_rx_chan = r->start; - r = platform_get_resource(pdev, IORESOURCE_DMA, 1); - if (r) - dma_tx_chan = r->start; - r = platform_get_resource(pdev, IORESOURCE_DMA, 2); - if (r) - dma_eventq = r->start; - } - - if (!use_dma || - dma_rx_chan == SPI_NO_RESOURCE || - dma_tx_chan == SPI_NO_RESOURCE || - dma_eventq == SPI_NO_RESOURCE) { - davinci_spi->bitbang.txrx_bufs = davinci_spi_bufs_pio; - use_dma = 0; - } else { - davinci_spi->bitbang.txrx_bufs = davinci_spi_bufs_dma; - - davinci_spi->dma_channels.dma_rx_channel = -1; - davinci_spi->dma_channels.dma_rx_sync_dev = dma_rx_chan; - davinci_spi->dma_channels.dma_tx_channel = -1; - davinci_spi->dma_channels.dma_tx_sync_dev = dma_tx_chan; + r = platform_get_resource(pdev, IORESOURCE_DMA, 0); + if (r) + dma_rx_chan = r->start; + r = platform_get_resource(pdev, IORESOURCE_DMA, 1); + if (r) + dma_tx_chan = r->start; + r = platform_get_resource(pdev, IORESOURCE_DMA, 2); + if (r) + dma_eventq = r->start; + + davinci_spi->bitbang.txrx_bufs = davinci_spi_bufs_pio; + if (dma_rx_chan != SPI_NO_RESOURCE && + dma_tx_chan != SPI_NO_RESOURCE && + dma_eventq != SPI_NO_RESOURCE) { + davinci_spi->dma_channels.dma_rx_channel = dma_rx_chan; + davinci_spi->dma_channels.dma_tx_channel = dma_tx_chan; davinci_spi->dma_channels.eventq = dma_eventq; + ret = davinci_spi_request_dma(&davinci_spi->dma_channels); + if (ret) + goto free_clk; + + davinci_spi->bitbang.txrx_bufs = davinci_spi_bufs_dma; dev_info(&pdev->dev, "DaVinci SPI driver in EDMA mode\n" "Using RX channel = %d , TX channel = %d and " "event queue = %d", dma_rx_chan, dma_tx_chan, @@ -1015,12 +961,15 @@ static int davinci_spi_probe(struct platform_device *pdev) ret = spi_bitbang_start(&davinci_spi->bitbang); if (ret) - goto free_clk; + goto free_dma; dev_info(&pdev->dev, "Controller at 0x%p\n", davinci_spi->base); return ret; +free_dma: + edma_free_channel(davinci_spi->dma_channels.dma_tx_channel); + edma_free_channel(davinci_spi->dma_channels.dma_rx_channel); free_clk: clk_disable(davinci_spi->clk); clk_put(davinci_spi->clk); -- cgit v1.2.3-70-g09d2 From 523c37e7006522e778a1fd0aea2746ceb788572f Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Mon, 4 Oct 2010 17:35:34 +0530 Subject: spi: davinci: fix EDMA CC errors at end of transfers Use a dummy param slot linked to itself to take care of the extra "sync event" that gets sent to EDMA controller after the last byte has been transferred. The dummy PaRAM slot that is linked to the actual DMA PaRAM slot "absorbs" this event and prevents a EDMA CC error to be asserted. Without this provision, the EDMA CC error would be asserted because the channel PaRAM would be empty after the transfer and EDMA would not know what to make out of the extra sync event. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 28 +++++++++++++++++++++++++--- 1 file changed, 25 insertions(+), 3 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 6db47860102..975c2a228d0 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -116,6 +116,7 @@ struct davinci_spi_dma { int dma_tx_channel; int dma_rx_channel; + int dummy_param_slot; enum dma_event_q eventq; struct completion dma_tx_completion; @@ -697,6 +698,8 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) param.src_dst_cidx = 0; param.ccnt = 1; edma_write_slot(davinci_spi_dma->dma_tx_channel, ¶m); + edma_link(davinci_spi_dma->dma_tx_channel, + davinci_spi_dma->dummy_param_slot); /* * Receive DMA setup @@ -779,19 +782,37 @@ static int davinci_spi_request_dma(struct davinci_spi_dma *davinci_spi_dma) davinci_spi_dma->eventq); if (r < 0) { pr_err("Unable to request DMA channel for SPI RX\n"); - return -EAGAIN; + r = -EAGAIN; + goto rx_dma_failed; } r = edma_alloc_channel(davinci_spi_dma->dma_tx_channel, davinci_spi_dma_tx_callback, davinci_spi_dma, davinci_spi_dma->eventq); if (r < 0) { - edma_free_channel(davinci_spi_dma->dma_rx_channel); pr_err("Unable to request DMA channel for SPI TX\n"); - return -EAGAIN; + r = -EAGAIN; + goto tx_dma_failed; } + r = edma_alloc_slot(EDMA_CTLR(davinci_spi_dma->dma_tx_channel), + EDMA_SLOT_ANY); + if (r < 0) { + pr_err("Unable to request SPI TX DMA param slot\n"); + r = -EAGAIN; + goto param_failed; + } + davinci_spi_dma->dummy_param_slot = r; + edma_link(davinci_spi_dma->dummy_param_slot, + davinci_spi_dma->dummy_param_slot); + return 0; +param_failed: + edma_free_channel(davinci_spi_dma->dma_tx_channel); +tx_dma_failed: + edma_free_channel(davinci_spi_dma->dma_rx_channel); +rx_dma_failed: + return r; } /** @@ -970,6 +991,7 @@ static int davinci_spi_probe(struct platform_device *pdev) free_dma: edma_free_channel(davinci_spi->dma_channels.dma_tx_channel); edma_free_channel(davinci_spi->dma_channels.dma_rx_channel); + edma_free_slot(davinci_spi->dma_channels.dummy_param_slot); free_clk: clk_disable(davinci_spi->clk); clk_put(davinci_spi->clk); -- cgit v1.2.3-70-g09d2 From 9b189fd7584a1d8c68334dd1bc47b363877b314e Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Tue, 5 Oct 2010 11:38:41 +0530 Subject: spi: davinci: handle DMA completion errors correctly Do not simply clean the DMA channel on a DMA completion error. Instead, use wcount and rcount members of davinci_spi to detecion non-completion of DMA and signal EIO to the application. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 63 +++++++++++++++++++++++++++-------------------- 1 file changed, 36 insertions(+), 27 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 975c2a228d0..a47947da17a 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -388,24 +388,26 @@ static int davinci_spi_setup_transfer(struct spi_device *spi, static void davinci_spi_dma_rx_callback(unsigned lch, u16 ch_status, void *data) { - struct davinci_spi_dma *davinci_spi_dma = data; + struct davinci_spi *davinci_spi = data; + struct davinci_spi_dma *davinci_spi_dma = &davinci_spi->dma_channels; + + edma_stop(davinci_spi_dma->dma_rx_channel); if (ch_status == DMA_COMPLETE) - edma_stop(davinci_spi_dma->dma_rx_channel); - else - edma_clean_channel(davinci_spi_dma->dma_rx_channel); + davinci_spi->rcount = 0; complete(&davinci_spi_dma->dma_rx_completion); } static void davinci_spi_dma_tx_callback(unsigned lch, u16 ch_status, void *data) { - struct davinci_spi_dma *davinci_spi_dma = data; + struct davinci_spi *davinci_spi = data; + struct davinci_spi_dma *davinci_spi_dma = &davinci_spi->dma_channels; + + edma_stop(davinci_spi_dma->dma_tx_channel); if (ch_status == DMA_COMPLETE) - edma_stop(davinci_spi_dma->dma_tx_channel); - else - edma_clean_channel(davinci_spi_dma->dma_tx_channel); + davinci_spi->wcount = 0; complete(&davinci_spi_dma->dma_tx_completion); } @@ -632,7 +634,6 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) { struct davinci_spi *davinci_spi; int int_status = 0; - int count; unsigned rx_buf_count; struct davinci_spi_dma *davinci_spi_dma; int data_type, ret; @@ -648,20 +649,20 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) davinci_spi_dma = &davinci_spi->dma_channels; + /* convert len to words based on bits_per_word */ + data_type = davinci_spi->bytes_per_word[spi->chip_select]; + tx_reg = (unsigned long)davinci_spi->pbase + SPIDAT1; rx_reg = (unsigned long)davinci_spi->pbase + SPIBUF; davinci_spi->tx = t->tx_buf; davinci_spi->rx = t->rx_buf; - - /* convert len to words based on bits_per_word */ - data_type = davinci_spi->bytes_per_word[spi->chip_select]; + davinci_spi->wcount = t->len / data_type; + davinci_spi->rcount = davinci_spi->wcount; init_completion(&davinci_spi_dma->dma_rx_completion); init_completion(&davinci_spi_dma->dma_tx_completion); - count = t->len / data_type; /* the number of elements */ - /* disable all interrupts for dma transfers */ clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKALL); /* Enable SPI */ @@ -680,18 +681,18 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) */ if (t->tx_buf) { - t->tx_dma = dma_map_single(&spi->dev, (void *)t->tx_buf, count, - DMA_TO_DEVICE); + t->tx_dma = dma_map_single(&spi->dev, (void *)t->tx_buf, + davinci_spi->wcount, DMA_TO_DEVICE); if (dma_mapping_error(&spi->dev, t->tx_dma)) { - dev_dbg(sdev, "Unable to DMA map a %d bytes" - " TX buffer\n", count); + dev_dbg(sdev, "Unable to DMA map %d bytes TX buffer\n", + davinci_spi->wcount); return -ENOMEM; } } param.opt = TCINTEN | EDMA_TCC(davinci_spi_dma->dma_tx_channel); param.src = t->tx_buf ? t->tx_dma : tx_reg; - param.a_b_cnt = count << 16 | data_type; + param.a_b_cnt = davinci_spi->wcount << 16 | data_type; param.dst = tx_reg; param.src_dst_bidx = t->tx_buf ? data_type : 0; param.link_bcntrld = 0xffff; @@ -715,7 +716,7 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) if (t->rx_buf) { rx_buf = t->rx_buf; - rx_buf_count = count; + rx_buf_count = davinci_spi->rcount; } else { rx_buf = davinci_spi->rx_tmp_buf; rx_buf_count = sizeof(davinci_spi->rx_tmp_buf); @@ -727,13 +728,14 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) dev_dbg(sdev, "Couldn't DMA map a %d bytes RX buffer\n", rx_buf_count); if (t->tx_buf) - dma_unmap_single(NULL, t->tx_dma, count, DMA_TO_DEVICE); + dma_unmap_single(NULL, t->tx_dma, davinci_spi->wcount, + DMA_TO_DEVICE); return -ENOMEM; } param.opt = TCINTEN | EDMA_TCC(davinci_spi_dma->dma_rx_channel); param.src = rx_reg; - param.a_b_cnt = count << 16 | data_type; + param.a_b_cnt = davinci_spi->rcount << 16 | data_type; param.dst = t->rx_dma; param.src_dst_bidx = (t->rx_buf ? data_type : 0) << 16; param.link_bcntrld = 0xffff; @@ -754,7 +756,8 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) wait_for_completion_interruptible(&davinci_spi_dma->dma_rx_completion); if (t->tx_buf) - dma_unmap_single(NULL, t->tx_dma, count, DMA_TO_DEVICE); + dma_unmap_single(NULL, t->tx_dma, davinci_spi->wcount, + DMA_TO_DEVICE); dma_unmap_single(NULL, t->rx_dma, rx_buf_count, DMA_FROM_DEVICE); @@ -770,15 +773,21 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) if (ret != 0) return ret; + if (davinci_spi->rcount != 0 || davinci_spi->wcount != 0) { + dev_err(sdev, "SPI data transfer error\n"); + return -EIO; + } + return t->len; } -static int davinci_spi_request_dma(struct davinci_spi_dma *davinci_spi_dma) +static int davinci_spi_request_dma(struct davinci_spi *davinci_spi) { int r; + struct davinci_spi_dma *davinci_spi_dma = &davinci_spi->dma_channels; r = edma_alloc_channel(davinci_spi_dma->dma_rx_channel, - davinci_spi_dma_rx_callback, davinci_spi_dma, + davinci_spi_dma_rx_callback, davinci_spi, davinci_spi_dma->eventq); if (r < 0) { pr_err("Unable to request DMA channel for SPI RX\n"); @@ -787,7 +796,7 @@ static int davinci_spi_request_dma(struct davinci_spi_dma *davinci_spi_dma) } r = edma_alloc_channel(davinci_spi_dma->dma_tx_channel, - davinci_spi_dma_tx_callback, davinci_spi_dma, + davinci_spi_dma_tx_callback, davinci_spi, davinci_spi_dma->eventq); if (r < 0) { pr_err("Unable to request DMA channel for SPI TX\n"); @@ -929,7 +938,7 @@ static int davinci_spi_probe(struct platform_device *pdev) davinci_spi->dma_channels.dma_tx_channel = dma_tx_chan; davinci_spi->dma_channels.eventq = dma_eventq; - ret = davinci_spi_request_dma(&davinci_spi->dma_channels); + ret = davinci_spi_request_dma(davinci_spi); if (ret) goto free_clk; -- cgit v1.2.3-70-g09d2 From 6dbd29b27bd2627ba0025a6cff14381e69512cdf Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Tue, 5 Oct 2010 15:43:08 +0530 Subject: spi: davinci: remove usage of additional completion variables for DMA The DMA code does not use the existing completion variable 'done' which is being used for interrupt mode transfers. Instead it uses two different completion variables specific to DMA mode transfers. Eliminate the usage of new completion variables for DMA mode and use the existing completion variable. [nsekhar@ti.com: To make this process easy, eliminate the two different DMA completion callback functions for tx and rx and use a single callback function instead] Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 58 +++++++++++++++++++---------------------------- 1 file changed, 23 insertions(+), 35 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index a47947da17a..6094e3a0785 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -118,9 +118,6 @@ struct davinci_spi_dma { int dma_rx_channel; int dummy_param_slot; enum dma_event_q eventq; - - struct completion dma_tx_completion; - struct completion dma_rx_completion; }; /* SPI Controller driver's private data. */ @@ -386,32 +383,6 @@ static int davinci_spi_setup_transfer(struct spi_device *spi, return 0; } -static void davinci_spi_dma_rx_callback(unsigned lch, u16 ch_status, void *data) -{ - struct davinci_spi *davinci_spi = data; - struct davinci_spi_dma *davinci_spi_dma = &davinci_spi->dma_channels; - - edma_stop(davinci_spi_dma->dma_rx_channel); - - if (ch_status == DMA_COMPLETE) - davinci_spi->rcount = 0; - - complete(&davinci_spi_dma->dma_rx_completion); -} - -static void davinci_spi_dma_tx_callback(unsigned lch, u16 ch_status, void *data) -{ - struct davinci_spi *davinci_spi = data; - struct davinci_spi_dma *davinci_spi_dma = &davinci_spi->dma_channels; - - edma_stop(davinci_spi_dma->dma_tx_channel); - - if (ch_status == DMA_COMPLETE) - davinci_spi->wcount = 0; - - complete(&davinci_spi_dma->dma_tx_completion); -} - /** * davinci_spi_setup - This functions will set default transfer method * @spi: spi device on which data transfer to be done @@ -630,6 +601,25 @@ static irqreturn_t davinci_spi_irq(s32 irq, void *context_data) return IRQ_HANDLED; } +static void davinci_spi_dma_callback(unsigned lch, u16 status, void *data) +{ + struct davinci_spi *davinci_spi = data; + struct davinci_spi_dma *davinci_spi_dma = &davinci_spi->dma_channels; + + edma_stop(lch); + + if (status == DMA_COMPLETE) { + if (lch == davinci_spi_dma->dma_rx_channel) + davinci_spi->rcount = 0; + if (lch == davinci_spi_dma->dma_tx_channel) + davinci_spi->wcount = 0; + } + + if ((!davinci_spi->wcount && !davinci_spi->rcount) || + (status != DMA_COMPLETE)) + complete(&davinci_spi->done); +} + static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) { struct davinci_spi *davinci_spi; @@ -660,8 +650,7 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) davinci_spi->wcount = t->len / data_type; davinci_spi->rcount = davinci_spi->wcount; - init_completion(&davinci_spi_dma->dma_rx_completion); - init_completion(&davinci_spi_dma->dma_tx_completion); + INIT_COMPLETION(davinci_spi->done); /* disable all interrupts for dma transfers */ clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKALL); @@ -752,8 +741,7 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) edma_start(davinci_spi_dma->dma_tx_channel); set_io_bits(davinci_spi->base + SPIINT, SPIINT_DMA_REQ_EN); - wait_for_completion_interruptible(&davinci_spi_dma->dma_tx_completion); - wait_for_completion_interruptible(&davinci_spi_dma->dma_rx_completion); + wait_for_completion_interruptible(&davinci_spi->done); if (t->tx_buf) dma_unmap_single(NULL, t->tx_dma, davinci_spi->wcount, @@ -787,7 +775,7 @@ static int davinci_spi_request_dma(struct davinci_spi *davinci_spi) struct davinci_spi_dma *davinci_spi_dma = &davinci_spi->dma_channels; r = edma_alloc_channel(davinci_spi_dma->dma_rx_channel, - davinci_spi_dma_rx_callback, davinci_spi, + davinci_spi_dma_callback, davinci_spi, davinci_spi_dma->eventq); if (r < 0) { pr_err("Unable to request DMA channel for SPI RX\n"); @@ -796,7 +784,7 @@ static int davinci_spi_request_dma(struct davinci_spi *davinci_spi) } r = edma_alloc_channel(davinci_spi_dma->dma_tx_channel, - davinci_spi_dma_tx_callback, davinci_spi, + davinci_spi_dma_callback, davinci_spi, davinci_spi_dma->eventq); if (r < 0) { pr_err("Unable to request DMA channel for SPI TX\n"); -- cgit v1.2.3-70-g09d2 From 87467bd9052725283b9a9f4b1b310fed8744fb1e Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Wed, 6 Oct 2010 17:03:10 +0530 Subject: spi: davinci: let DMA operation be specified on per-device basis Let DMA operation be specified on a per-device basis instead of selecting it once during probe. A side effect of this is the need to combine the PIO and DMA buffer txrx_bufs routine. This is good since they anyway share some common functionality. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/include/mach/spi.h | 1 + drivers/spi/davinci_spi.c | 342 ++++++++++++++----------------- 2 files changed, 156 insertions(+), 187 deletions(-) (limited to 'drivers/spi') diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h index f7586a03678..b3ab7d04943 100644 --- a/arch/arm/mach-davinci/include/mach/spi.h +++ b/arch/arm/mach-davinci/include/mach/spi.h @@ -41,6 +41,7 @@ struct davinci_spi_config { u8 parity_enable; #define SPI_IO_TYPE_INTR 0 #define SPI_IO_TYPE_POLL 1 +#define SPI_IO_TYPE_DMA 2 u8 io_type; u8 timer_disable; u8 c2tdelay; diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 6094e3a0785..5fe298099a1 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -500,6 +500,25 @@ out: return errors; } +static void davinci_spi_dma_callback(unsigned lch, u16 status, void *data) +{ + struct davinci_spi *davinci_spi = data; + struct davinci_spi_dma *davinci_spi_dma = &davinci_spi->dma_channels; + + edma_stop(lch); + + if (status == DMA_COMPLETE) { + if (lch == davinci_spi_dma->dma_rx_channel) + davinci_spi->rcount = 0; + if (lch == davinci_spi_dma->dma_tx_channel) + davinci_spi->wcount = 0; + } + + if ((!davinci_spi->wcount && !davinci_spi->rcount) || + (status != DMA_COMPLETE)) + complete(&davinci_spi->done); +} + /** * davinci_spi_bufs - functions which will handle transfer data * @spi: spi device on which data transfer to be done @@ -509,25 +528,30 @@ out: * of SPI controller and then wait until the completion will be marked * by the IRQ Handler. */ -static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) +static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t) { struct davinci_spi *davinci_spi; - int ret; + int data_type, ret; u32 tx_data, data1_reg_val; u32 errors = 0; struct davinci_spi_config *spicfg; struct davinci_spi_platform_data *pdata; + unsigned uninitialized_var(rx_buf_count); + struct device *sdev; davinci_spi = spi_master_get_devdata(spi->master); pdata = davinci_spi->pdata; spicfg = (struct davinci_spi_config *)spi->controller_data; if (!spicfg) spicfg = &davinci_spi_default_cfg; + sdev = davinci_spi->bitbang.master->dev.parent; + + /* convert len to words based on bits_per_word */ + data_type = davinci_spi->bytes_per_word[spi->chip_select]; davinci_spi->tx = t->tx_buf; davinci_spi->rx = t->rx_buf; - davinci_spi->wcount = t->len / - davinci_spi->bytes_per_word[spi->chip_select]; + davinci_spi->wcount = t->len / data_type; davinci_spi->rcount = davinci_spi->wcount; data1_reg_val = ioread32(davinci_spi->base + SPIDAT1); @@ -535,20 +559,117 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) /* Enable SPI */ set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK); - if (spicfg->io_type == SPI_IO_TYPE_INTR) { + INIT_COMPLETION(davinci_spi->done); + + if (spicfg->io_type == SPI_IO_TYPE_INTR) set_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKINT); - INIT_COMPLETION(davinci_spi->done); - } - /* start the transfer */ - davinci_spi->wcount--; - tx_data = davinci_spi->get_tx(davinci_spi); - data1_reg_val &= 0xFFFF0000; - data1_reg_val |= tx_data & 0xFFFF; - iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1); + if (spicfg->io_type != SPI_IO_TYPE_DMA) { + /* start the transfer */ + davinci_spi->wcount--; + tx_data = davinci_spi->get_tx(davinci_spi); + data1_reg_val &= 0xFFFF0000; + data1_reg_val |= tx_data & 0xFFFF; + iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1); + } else { + struct davinci_spi_dma *davinci_spi_dma; + unsigned long tx_reg, rx_reg; + struct edmacc_param param; + void *rx_buf; + + davinci_spi_dma = &davinci_spi->dma_channels; + + tx_reg = (unsigned long)davinci_spi->pbase + SPIDAT1; + rx_reg = (unsigned long)davinci_spi->pbase + SPIBUF; + + /* + * Transmit DMA setup + * + * If there is transmit data, map the transmit buffer, set it + * as the source of data and set the source B index to data + * size. If there is no transmit data, set the transmit register + * as the source of data, and set the source B index to zero. + * + * The destination is always the transmit register itself. And + * the destination never increments. + */ + + if (t->tx_buf) { + t->tx_dma = dma_map_single(&spi->dev, (void *)t->tx_buf, + davinci_spi->wcount, DMA_TO_DEVICE); + if (dma_mapping_error(&spi->dev, t->tx_dma)) { + dev_dbg(sdev, "Unable to DMA map %d bytes" + "TX buffer\n", + davinci_spi->wcount); + return -ENOMEM; + } + } + + param.opt = TCINTEN | EDMA_TCC(davinci_spi_dma->dma_tx_channel); + param.src = t->tx_buf ? t->tx_dma : tx_reg; + param.a_b_cnt = davinci_spi->wcount << 16 | data_type; + param.dst = tx_reg; + param.src_dst_bidx = t->tx_buf ? data_type : 0; + param.link_bcntrld = 0xffff; + param.src_dst_cidx = 0; + param.ccnt = 1; + edma_write_slot(davinci_spi_dma->dma_tx_channel, ¶m); + edma_link(davinci_spi_dma->dma_tx_channel, + davinci_spi_dma->dummy_param_slot); + + /* + * Receive DMA setup + * + * If there is receive buffer, use it to receive data. If there + * is none provided, use a temporary receive buffer. Set the + * destination B index to 0 so effectively only one byte is used + * in the temporary buffer (address does not increment). + * + * The source of receive data is the receive data register. The + * source address never increments. + */ + + if (t->rx_buf) { + rx_buf = t->rx_buf; + rx_buf_count = davinci_spi->rcount; + } else { + rx_buf = davinci_spi->rx_tmp_buf; + rx_buf_count = sizeof(davinci_spi->rx_tmp_buf); + } + + t->rx_dma = dma_map_single(&spi->dev, rx_buf, rx_buf_count, + DMA_FROM_DEVICE); + if (dma_mapping_error(&spi->dev, t->rx_dma)) { + dev_dbg(sdev, "Couldn't DMA map a %d bytes RX buffer\n", + rx_buf_count); + if (t->tx_buf) + dma_unmap_single(NULL, t->tx_dma, + davinci_spi->wcount, + DMA_TO_DEVICE); + return -ENOMEM; + } + + param.opt = TCINTEN | EDMA_TCC(davinci_spi_dma->dma_rx_channel); + param.src = rx_reg; + param.a_b_cnt = davinci_spi->rcount << 16 | data_type; + param.dst = t->rx_dma; + param.src_dst_bidx = (t->rx_buf ? data_type : 0) << 16; + param.link_bcntrld = 0xffff; + param.src_dst_cidx = 0; + param.ccnt = 1; + edma_write_slot(davinci_spi_dma->dma_rx_channel, ¶m); + + if (pdata->cshold_bug) + iowrite16(data1_reg_val >> 16, + davinci_spi->base + SPIDAT1 + 2); + + edma_start(davinci_spi_dma->dma_rx_channel); + edma_start(davinci_spi_dma->dma_tx_channel); + set_io_bits(davinci_spi->base + SPIINT, SPIINT_DMA_REQ_EN); + } /* Wait for the transfer to complete */ - if (spicfg->io_type == SPI_IO_TYPE_INTR) { + if (spicfg->io_type != SPI_IO_TYPE_POLL) { wait_for_completion_interruptible(&(davinci_spi->done)); } else { while (davinci_spi->rcount > 0 || davinci_spi->wcount > 0) { @@ -560,6 +681,17 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) } clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKALL); + if (spicfg->io_type == SPI_IO_TYPE_DMA) { + + if (t->tx_buf) + dma_unmap_single(NULL, t->tx_dma, davinci_spi->wcount, + DMA_TO_DEVICE); + + dma_unmap_single(NULL, t->rx_dma, rx_buf_count, + DMA_FROM_DEVICE); + + clear_io_bits(davinci_spi->base + SPIINT, SPIINT_DMA_REQ_EN); + } /* * Check for bit error, desync error,parity error,timeout error and @@ -572,6 +704,11 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) return ret; } + if (davinci_spi->rcount != 0 || davinci_spi->wcount != 0) { + dev_err(sdev, "SPI data transfer error\n"); + return -EIO; + } + return t->len; } @@ -601,174 +738,6 @@ static irqreturn_t davinci_spi_irq(s32 irq, void *context_data) return IRQ_HANDLED; } -static void davinci_spi_dma_callback(unsigned lch, u16 status, void *data) -{ - struct davinci_spi *davinci_spi = data; - struct davinci_spi_dma *davinci_spi_dma = &davinci_spi->dma_channels; - - edma_stop(lch); - - if (status == DMA_COMPLETE) { - if (lch == davinci_spi_dma->dma_rx_channel) - davinci_spi->rcount = 0; - if (lch == davinci_spi_dma->dma_tx_channel) - davinci_spi->wcount = 0; - } - - if ((!davinci_spi->wcount && !davinci_spi->rcount) || - (status != DMA_COMPLETE)) - complete(&davinci_spi->done); -} - -static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) -{ - struct davinci_spi *davinci_spi; - int int_status = 0; - unsigned rx_buf_count; - struct davinci_spi_dma *davinci_spi_dma; - int data_type, ret; - unsigned long tx_reg, rx_reg; - struct davinci_spi_platform_data *pdata; - void *rx_buf; - struct device *sdev; - struct edmacc_param param; - - davinci_spi = spi_master_get_devdata(spi->master); - pdata = davinci_spi->pdata; - sdev = davinci_spi->bitbang.master->dev.parent; - - davinci_spi_dma = &davinci_spi->dma_channels; - - /* convert len to words based on bits_per_word */ - data_type = davinci_spi->bytes_per_word[spi->chip_select]; - - tx_reg = (unsigned long)davinci_spi->pbase + SPIDAT1; - rx_reg = (unsigned long)davinci_spi->pbase + SPIBUF; - - davinci_spi->tx = t->tx_buf; - davinci_spi->rx = t->rx_buf; - davinci_spi->wcount = t->len / data_type; - davinci_spi->rcount = davinci_spi->wcount; - - INIT_COMPLETION(davinci_spi->done); - - /* disable all interrupts for dma transfers */ - clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKALL); - /* Enable SPI */ - set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK); - - /* - * Transmit DMA setup - * - * If there is transmit data, map the transmit buffer, set it as the - * source of data and set the source B index to data size. - * If there is no transmit data, set the transmit register as the - * source of data, and set the source B index to zero. - * - * The destination is always the transmit register itself. And the - * destination never increments. - */ - - if (t->tx_buf) { - t->tx_dma = dma_map_single(&spi->dev, (void *)t->tx_buf, - davinci_spi->wcount, DMA_TO_DEVICE); - if (dma_mapping_error(&spi->dev, t->tx_dma)) { - dev_dbg(sdev, "Unable to DMA map %d bytes TX buffer\n", - davinci_spi->wcount); - return -ENOMEM; - } - } - - param.opt = TCINTEN | EDMA_TCC(davinci_spi_dma->dma_tx_channel); - param.src = t->tx_buf ? t->tx_dma : tx_reg; - param.a_b_cnt = davinci_spi->wcount << 16 | data_type; - param.dst = tx_reg; - param.src_dst_bidx = t->tx_buf ? data_type : 0; - param.link_bcntrld = 0xffff; - param.src_dst_cidx = 0; - param.ccnt = 1; - edma_write_slot(davinci_spi_dma->dma_tx_channel, ¶m); - edma_link(davinci_spi_dma->dma_tx_channel, - davinci_spi_dma->dummy_param_slot); - - /* - * Receive DMA setup - * - * If there is receive buffer, use it to receive data. If there - * is none provided, use a temporary receive buffer. Set the - * destination B index to 0 so effectively only one byte is used - * in the temporary buffer (address does not increment). - * - * The source of receive data is the receive data register. The - * source address never increments. - */ - - if (t->rx_buf) { - rx_buf = t->rx_buf; - rx_buf_count = davinci_spi->rcount; - } else { - rx_buf = davinci_spi->rx_tmp_buf; - rx_buf_count = sizeof(davinci_spi->rx_tmp_buf); - } - - t->rx_dma = dma_map_single(&spi->dev, rx_buf, rx_buf_count, - DMA_FROM_DEVICE); - if (dma_mapping_error(&spi->dev, t->rx_dma)) { - dev_dbg(sdev, "Couldn't DMA map a %d bytes RX buffer\n", - rx_buf_count); - if (t->tx_buf) - dma_unmap_single(NULL, t->tx_dma, davinci_spi->wcount, - DMA_TO_DEVICE); - return -ENOMEM; - } - - param.opt = TCINTEN | EDMA_TCC(davinci_spi_dma->dma_rx_channel); - param.src = rx_reg; - param.a_b_cnt = davinci_spi->rcount << 16 | data_type; - param.dst = t->rx_dma; - param.src_dst_bidx = (t->rx_buf ? data_type : 0) << 16; - param.link_bcntrld = 0xffff; - param.src_dst_cidx = 0; - param.ccnt = 1; - edma_write_slot(davinci_spi_dma->dma_rx_channel, ¶m); - - if (pdata->cshold_bug) { - u16 spidat1 = ioread16(davinci_spi->base + SPIDAT1 + 2); - iowrite16(spidat1, davinci_spi->base + SPIDAT1 + 2); - } - - edma_start(davinci_spi_dma->dma_rx_channel); - edma_start(davinci_spi_dma->dma_tx_channel); - set_io_bits(davinci_spi->base + SPIINT, SPIINT_DMA_REQ_EN); - - wait_for_completion_interruptible(&davinci_spi->done); - - if (t->tx_buf) - dma_unmap_single(NULL, t->tx_dma, davinci_spi->wcount, - DMA_TO_DEVICE); - - dma_unmap_single(NULL, t->rx_dma, rx_buf_count, DMA_FROM_DEVICE); - - clear_io_bits(davinci_spi->base + SPIINT, SPIINT_DMA_REQ_EN); - - /* - * Check for bit error, desync error,parity error,timeout error and - * receive overflow errors - */ - int_status = ioread32(davinci_spi->base + SPIFLG); - - ret = davinci_spi_check_error(davinci_spi, int_status); - if (ret != 0) - return ret; - - if (davinci_spi->rcount != 0 || davinci_spi->wcount != 0) { - dev_err(sdev, "SPI data transfer error\n"); - return -EIO; - } - - return t->len; -} - static int davinci_spi_request_dma(struct davinci_spi *davinci_spi) { int r; @@ -918,7 +887,7 @@ static int davinci_spi_probe(struct platform_device *pdev) if (r) dma_eventq = r->start; - davinci_spi->bitbang.txrx_bufs = davinci_spi_bufs_pio; + davinci_spi->bitbang.txrx_bufs = davinci_spi_bufs; if (dma_rx_chan != SPI_NO_RESOURCE && dma_tx_chan != SPI_NO_RESOURCE && dma_eventq != SPI_NO_RESOURCE) { @@ -930,10 +899,9 @@ static int davinci_spi_probe(struct platform_device *pdev) if (ret) goto free_clk; - davinci_spi->bitbang.txrx_bufs = davinci_spi_bufs_dma; - dev_info(&pdev->dev, "DaVinci SPI driver in EDMA mode\n" - "Using RX channel = %d , TX channel = %d and " - "event queue = %d", dma_rx_chan, dma_tx_chan, + dev_info(&pdev->dev, "DMA: supported\n"); + dev_info(&pdev->dev, "DMA: RX channel: %d, TX channel: %d, " + "event queue: %d\n", dma_rx_chan, dma_tx_chan, dma_eventq); } -- cgit v1.2.3-70-g09d2 From 3409e408ab0d7171ae81d198110a1f293852959f Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Wed, 6 Oct 2010 18:13:31 +0530 Subject: spi: davinci: remove non-useful "clk_internal" platform data The "clk_internal" platform data member which contols the CLKMOD bit in Global Control Register 1 is not useful since CLKMOD needs be set to 1 *always* to ensure master mode operation. Remove this platform data. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/dm355.c | 1 - arch/arm/mach-davinci/dm365.c | 1 - arch/arm/mach-davinci/include/mach/spi.h | 1 - drivers/spi/davinci_spi.c | 9 +-------- 4 files changed, 1 insertion(+), 11 deletions(-) (limited to 'drivers/spi') diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index 27ee870b2d2..c0c501a4c13 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c @@ -412,7 +412,6 @@ static struct resource dm355_spi0_resources[] = { static struct davinci_spi_platform_data dm355_spi0_pdata = { .version = SPI_VERSION_1, .num_chipselect = 2, - .clk_internal = 1, .cshold_bug = true, }; static struct platform_device dm355_spi0_device = { diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index 1e5012e196b..8b8204fa757 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -625,7 +625,6 @@ static u64 dm365_spi0_dma_mask = DMA_BIT_MASK(32); static struct davinci_spi_platform_data dm365_spi0_pdata = { .version = SPI_VERSION_1, .num_chipselect = 2, - .clk_internal = 1, }; static struct resource dm365_spi0_resources[] = { diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h index b3ab7d04943..1f8b7866bea 100644 --- a/arch/arm/mach-davinci/include/mach/spi.h +++ b/arch/arm/mach-davinci/include/mach/spi.h @@ -29,7 +29,6 @@ enum { struct davinci_spi_platform_data { u8 version; u8 num_chipselect; - u8 clk_internal; u8 intr_line; u8 *chip_sel; bool cshold_bug; diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 5fe298099a1..2e74fcd2f42 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -927,14 +927,6 @@ static int davinci_spi_probe(struct platform_device *pdev) } } - /* Clock internal */ - if (davinci_spi->pdata->clk_internal) - set_io_bits(davinci_spi->base + SPIGCR1, - SPIGCR1_CLKMOD_MASK); - else - clear_io_bits(davinci_spi->base + SPIGCR1, - SPIGCR1_CLKMOD_MASK); - if (pdata->intr_line) iowrite32(SPI_INTLVL_1, davinci_spi->base + SPILVL); else @@ -943,6 +935,7 @@ static int davinci_spi_probe(struct platform_device *pdev) iowrite32(CS_DEFAULT, davinci_spi->base + SPIDEF); /* master mode default */ + set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_CLKMOD_MASK); set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_MASTER_MASK); ret = spi_bitbang_start(&davinci_spi->bitbang); -- cgit v1.2.3-70-g09d2 From 3f27b57c1684efbe11fcc9449df898b1d0feb753 Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Wed, 6 Oct 2010 18:25:43 +0530 Subject: spi: davinci: enable and power-up SPI only when required Enable SPI only when active transfers are in progress. Keep it in local low power when not in use. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 2e74fcd2f42..1652bba955e 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -49,7 +49,6 @@ #define SPIFMT_WDELAY_SHIFT 24 #define SPIFMT_PRESCALE_SHIFT 8 - /* SPIPC0 */ #define SPIPC0_DIFUN_MASK BIT(11) /* MISO */ #define SPIPC0_DOFUN_MASK BIT(10) /* MOSI */ @@ -67,6 +66,7 @@ /* SPIGCR1 */ #define SPIGCR1_CLKMOD_MASK BIT(1) #define SPIGCR1_MASTER_MASK BIT(0) +#define SPIGCR1_POWERDOWN_MASK BIT(8) #define SPIGCR1_LOOPBACK_MASK BIT(16) #define SPIGCR1_SPIENA_MASK BIT(24) @@ -556,7 +556,7 @@ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t) data1_reg_val = ioread32(davinci_spi->base + SPIDAT1); - /* Enable SPI */ + clear_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK); set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK); INIT_COMPLETION(davinci_spi->done); @@ -693,6 +693,9 @@ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t) clear_io_bits(davinci_spi->base + SPIINT, SPIINT_DMA_REQ_EN); } + clear_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK); + set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK); + /* * Check for bit error, desync error,parity error,timeout error and * receive overflow errors @@ -937,6 +940,7 @@ static int davinci_spi_probe(struct platform_device *pdev) /* master mode default */ set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_CLKMOD_MASK); set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_MASTER_MASK); + set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK); ret = spi_bitbang_start(&davinci_spi->bitbang); if (ret) -- cgit v1.2.3-70-g09d2 From d8c174cdeb6511aa307e6058468b68a9cc3990e4 Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Wed, 6 Oct 2010 18:47:16 +0530 Subject: spi: davinci: setup the driver owner Setup the owner member of the platform driver to THIS_MODULE instead of leaving it NULL. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 1652bba955e..2ec5fd2f2e7 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -1001,7 +1001,10 @@ static int __exit davinci_spi_remove(struct platform_device *pdev) } static struct platform_driver davinci_spi_driver = { - .driver.name = "spi_davinci", + .driver = { + .name = "spi_davinci", + .owner = THIS_MODULE, + }, .remove = __exit_p(davinci_spi_remove), }; -- cgit v1.2.3-70-g09d2 From 035540f6ea2394bdd9675552d31e1125cd0e402e Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Wed, 6 Oct 2010 18:32:40 +0530 Subject: spi: davinci: add additional comments Add comments describing the platform data members and per-chip-select SPI configuration structure. Also, add some comments describing the what happens during the driver probe. Signed-off-by: Brian Niebuhr Tested-By: Michael Williamson Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/include/mach/spi.h | 32 ++++++++++++++++++++++++++++++++ drivers/spi/davinci_spi.c | 7 +++++++ 2 files changed, 39 insertions(+) (limited to 'drivers/spi') diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h index 1f8b7866bea..38f4da5ca13 100644 --- a/arch/arm/mach-davinci/include/mach/spi.h +++ b/arch/arm/mach-davinci/include/mach/spi.h @@ -26,6 +26,20 @@ enum { SPI_VERSION_2, /* For DA8xx */ }; +/** + * davinci_spi_platform_data - Platform data for SPI master device on DaVinci + * + * @version: version of the SPI IP. Different DaVinci devices have slightly + * varying versions of the same IP. + * @num_chipselect: number of chipselects supported by this SPI master + * @intr_line: interrupt line used to connect the SPI IP to the ARM interrupt + * controller withn the SoC. Possible values are 0 and 1. + * @chip_sel: list of GPIOs which can act as chip-selects for the SPI. + * SPI_INTERN_CS denotes internal SPI chip-select. Not necessary + * to populate if all chip-selects are internal. + * @cshold_bug: set this to true if the SPI controller on your chip requires + * a write to CSHOLD bit in between transfers (like in DM355). + */ struct davinci_spi_platform_data { u8 version; u8 num_chipselect; @@ -34,6 +48,24 @@ struct davinci_spi_platform_data { bool cshold_bug; }; +/** + * davinci_spi_config - Per-chip-select configuration for SPI slave devices + * + * @wdelay: amount of delay between transmissions. Measured in number of + * SPI module clocks. + * @odd_parity: polarity of parity flag at the end of transmit data stream. + * 0 - odd parity, 1 - even parity. + * @parity_enable: enable transmission of parity at end of each transmit + * data stream. + * @io_type: type of IO transfer. Choose between polled, interrupt and DMA. + * @timer_disable: disable chip-select timers (setup and hold) + * @c2tdelay: chip-select setup time. Measured in number of SPI module clocks. + * @t2cdelay: chip-select hold time. Measured in number of SPI module clocks. + * @t2edelay: transmit data finished to SPI ENAn pin inactive time. Measured + * in number of SPI clocks. + * @c2edelay: chip-select active to SPI ENAn signal active time. Measured in + * number of SPI clocks. + */ struct davinci_spi_config { u8 wdelay; u8 odd_parity; diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 2ec5fd2f2e7..f40f1be1528 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -787,6 +787,13 @@ rx_dma_failed: /** * davinci_spi_probe - probe function for SPI Master Controller * @pdev: platform_device structure which contains plateform specific data + * + * According to Linux Device Model this function will be invoked by Linux + * with platform_device struct which contains the device specific info. + * This function will map the SPI controller's memory, register IRQ, + * Reset SPI controller and setting its registers to default value. + * It will invoke spi_bitbang_start to create work queue so that client driver + * can register transfer method to work queue. */ static int davinci_spi_probe(struct platform_device *pdev) { -- cgit v1.2.3-70-g09d2 From 43abb11ba540e21346c6e7ab3211b48928501ea6 Mon Sep 17 00:00:00 2001 From: Brian Niebuhr Date: Wed, 6 Oct 2010 18:34:47 +0530 Subject: spi: davinci: add EF Johnson Technologies copyright Add copyright for EF Johnson Technologies since the driver has been majorly overhauled by Brian. Signed-off-by: Brian Niebuhr Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index f40f1be1528..42314a321d3 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -1,5 +1,6 @@ /* * Copyright (C) 2009 Texas Instruments. + * Copyright (C) 2010 EF Johnson Technologies * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by -- cgit v1.2.3-70-g09d2 From 0e0eae4d1cdff5fa6608bcc6f6990774dec2527d Mon Sep 17 00:00:00 2001 From: Sekhar Nori Date: Fri, 8 Oct 2010 14:04:22 +0530 Subject: spi: davinci: remove unnecessary private data member 'region_size' Remove unnecesary private data member 'region_size' being used to store the size of SPI memory region. Instead, get the memory resource size directly from the platform data. Tested-By: Brian Niebuhr Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 42314a321d3..f6f63d05814 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -129,7 +129,6 @@ struct davinci_spi { u8 version; resource_size_t pbase; void __iomem *base; - size_t region_size; u32 irq; struct completion done; @@ -835,17 +834,15 @@ static int davinci_spi_probe(struct platform_device *pdev) } davinci_spi->pbase = r->start; - davinci_spi->region_size = resource_size(r); davinci_spi->pdata = pdata; - mem = request_mem_region(r->start, davinci_spi->region_size, - pdev->name); + mem = request_mem_region(r->start, resource_size(r), pdev->name); if (mem == NULL) { ret = -EBUSY; goto free_master; } - davinci_spi->base = ioremap(r->start, davinci_spi->region_size); + davinci_spi->base = ioremap(r->start, resource_size(r)); if (davinci_spi->base == NULL) { ret = -ENOMEM; goto release_region; @@ -972,7 +969,7 @@ irq_free: unmap_io: iounmap(davinci_spi->base); release_region: - release_mem_region(davinci_spi->pbase, davinci_spi->region_size); + release_mem_region(davinci_spi->pbase, resource_size(r)); free_master: kfree(master); err: @@ -992,6 +989,7 @@ static int __exit davinci_spi_remove(struct platform_device *pdev) { struct davinci_spi *davinci_spi; struct spi_master *master; + struct resource *r; master = dev_get_drvdata(&pdev->dev); davinci_spi = spi_master_get_devdata(master); @@ -1003,7 +1001,8 @@ static int __exit davinci_spi_remove(struct platform_device *pdev) spi_master_put(master); free_irq(davinci_spi->irq, davinci_spi); iounmap(davinci_spi->base); - release_mem_region(davinci_spi->pbase, davinci_spi->region_size); + r = platform_get_resource(pdev, IORESOURCE_MEM, 0); + release_mem_region(davinci_spi->pbase, resource_size(r)); return 0; } -- cgit v1.2.3-70-g09d2 From 212d4b69652171d4474bc9dfc08e829737264632 Mon Sep 17 00:00:00 2001 From: Sekhar Nori Date: Mon, 11 Oct 2010 10:41:39 +0530 Subject: spi: davinci: shorten variable names Shorten names of local variables and structure members where possible. Local variables: * 'davinci_spi' is being renamed 'dspi' * 'davinci_spi_dma' is being renamed 'dma' Structure members: * 'dma_{tx|rx}_channel' is being renamed '{tx|rx}_channel' since the structure containing them is already called 'davinci_spi_dma' * 'davinci_spi_dma' in 'davinci_spi' structure is being renamed 'dma' Tested-By: Brian Niebuhr Signed-off-by: Sekhar Nori --- drivers/spi/davinci_spi.c | 409 ++++++++++++++++++++++------------------------ 1 file changed, 198 insertions(+), 211 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index f6f63d05814..6beab99bf95 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -115,8 +115,8 @@ /* We have 2 DMA channels per CS, one for RX and one for TX */ struct davinci_spi_dma { - int dma_tx_channel; - int dma_rx_channel; + int tx_channel; + int rx_channel; int dummy_param_slot; enum dma_event_q eventq; }; @@ -138,7 +138,7 @@ struct davinci_spi { u8 rx_tmp_buf[SPI_TMP_BUFSZ]; int rcount; int wcount; - struct davinci_spi_dma dma_channels; + struct davinci_spi_dma dma; struct davinci_spi_platform_data *pdata; void (*get_rx)(u32 rx_data, struct davinci_spi *); @@ -149,42 +149,42 @@ struct davinci_spi { static struct davinci_spi_config davinci_spi_default_cfg; -static void davinci_spi_rx_buf_u8(u32 data, struct davinci_spi *davinci_spi) +static void davinci_spi_rx_buf_u8(u32 data, struct davinci_spi *dspi) { - if (davinci_spi->rx) { - u8 *rx = davinci_spi->rx; + if (dspi->rx) { + u8 *rx = dspi->rx; *rx++ = (u8)data; - davinci_spi->rx = rx; + dspi->rx = rx; } } -static void davinci_spi_rx_buf_u16(u32 data, struct davinci_spi *davinci_spi) +static void davinci_spi_rx_buf_u16(u32 data, struct davinci_spi *dspi) { - if (davinci_spi->rx) { - u16 *rx = davinci_spi->rx; + if (dspi->rx) { + u16 *rx = dspi->rx; *rx++ = (u16)data; - davinci_spi->rx = rx; + dspi->rx = rx; } } -static u32 davinci_spi_tx_buf_u8(struct davinci_spi *davinci_spi) +static u32 davinci_spi_tx_buf_u8(struct davinci_spi *dspi) { u32 data = 0; - if (davinci_spi->tx) { - const u8 *tx = davinci_spi->tx; + if (dspi->tx) { + const u8 *tx = dspi->tx; data = *tx++; - davinci_spi->tx = tx; + dspi->tx = tx; } return data; } -static u32 davinci_spi_tx_buf_u16(struct davinci_spi *davinci_spi) +static u32 davinci_spi_tx_buf_u16(struct davinci_spi *dspi) { u32 data = 0; - if (davinci_spi->tx) { - const u16 *tx = davinci_spi->tx; + if (dspi->tx) { + const u16 *tx = dspi->tx; data = *tx++; - davinci_spi->tx = tx; + dspi->tx = tx; } return data; } @@ -210,14 +210,14 @@ static inline void clear_io_bits(void __iomem *addr, u32 bits) */ static void davinci_spi_chipselect(struct spi_device *spi, int value) { - struct davinci_spi *davinci_spi; + struct davinci_spi *dspi; struct davinci_spi_platform_data *pdata; u8 chip_sel = spi->chip_select; - u16 spidat1_cfg = CS_DEFAULT; + u16 spidat1 = CS_DEFAULT; bool gpio_chipsel = false; - davinci_spi = spi_master_get_devdata(spi->master); - pdata = davinci_spi->pdata; + dspi = spi_master_get_devdata(spi->master); + pdata = dspi->pdata; if (pdata->chip_sel && chip_sel < pdata->num_chipselect && pdata->chip_sel[chip_sel] != SPI_INTERN_CS) @@ -234,11 +234,11 @@ static void davinci_spi_chipselect(struct spi_device *spi, int value) gpio_set_value(pdata->chip_sel[chip_sel], 1); } else { if (value == BITBANG_CS_ACTIVE) { - spidat1_cfg |= SPIDAT1_CSHOLD_MASK; - spidat1_cfg &= ~(0x1 << chip_sel); + spidat1 |= SPIDAT1_CSHOLD_MASK; + spidat1 &= ~(0x1 << chip_sel); } - iowrite16(spidat1_cfg, davinci_spi->base + SPIDAT1 + 2); + iowrite16(spidat1, dspi->base + SPIDAT1 + 2); } } @@ -252,12 +252,12 @@ static void davinci_spi_chipselect(struct spi_device *spi, int value) * Returns: calculated prescale - 1 for easy programming into SPI registers * or negative error number if valid prescalar cannot be updated. */ -static inline int davinci_spi_get_prescale(struct davinci_spi *davinci_spi, +static inline int davinci_spi_get_prescale(struct davinci_spi *dspi, u32 max_speed_hz) { int ret; - ret = DIV_ROUND_UP(clk_get_rate(davinci_spi->clk), max_speed_hz); + ret = DIV_ROUND_UP(clk_get_rate(dspi->clk), max_speed_hz); if (ret < 3 || ret > 256) return -EINVAL; @@ -278,12 +278,12 @@ static int davinci_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t) { - struct davinci_spi *davinci_spi; + struct davinci_spi *dspi; struct davinci_spi_config *spicfg; u8 bits_per_word = 0; u32 hz = 0, spifmt = 0, prescale = 0; - davinci_spi = spi_master_get_devdata(spi->master); + dspi = spi_master_get_devdata(spi->master); spicfg = (struct davinci_spi_config *)spi->controller_data; if (!spicfg) spicfg = &davinci_spi_default_cfg; @@ -302,13 +302,13 @@ static int davinci_spi_setup_transfer(struct spi_device *spi, * 8bit, 16bit or 32bit transfer */ if (bits_per_word <= 8 && bits_per_word >= 2) { - davinci_spi->get_rx = davinci_spi_rx_buf_u8; - davinci_spi->get_tx = davinci_spi_tx_buf_u8; - davinci_spi->bytes_per_word[spi->chip_select] = 1; + dspi->get_rx = davinci_spi_rx_buf_u8; + dspi->get_tx = davinci_spi_tx_buf_u8; + dspi->bytes_per_word[spi->chip_select] = 1; } else if (bits_per_word <= 16 && bits_per_word >= 2) { - davinci_spi->get_rx = davinci_spi_rx_buf_u16; - davinci_spi->get_tx = davinci_spi_tx_buf_u16; - davinci_spi->bytes_per_word[spi->chip_select] = 2; + dspi->get_rx = davinci_spi_rx_buf_u16; + dspi->get_tx = davinci_spi_tx_buf_u16; + dspi->bytes_per_word[spi->chip_select] = 2; } else return -EINVAL; @@ -317,7 +317,7 @@ static int davinci_spi_setup_transfer(struct spi_device *spi, /* Set up SPIFMTn register, unique to this chipselect. */ - prescale = davinci_spi_get_prescale(davinci_spi, hz); + prescale = davinci_spi_get_prescale(dspi, hz); if (prescale < 0) return prescale; @@ -345,7 +345,7 @@ static int davinci_spi_setup_transfer(struct spi_device *spi, * - 4 pin with enable is (SPI_READY | SPI_NO_CS) */ - if (davinci_spi->version == SPI_VERSION_2) { + if (dspi->version == SPI_VERSION_2) { u32 delay = 0; @@ -375,10 +375,10 @@ static int davinci_spi_setup_transfer(struct spi_device *spi, & SPIDELAY_C2EDELAY_MASK; } - iowrite32(delay, davinci_spi->base + SPIDELAY); + iowrite32(delay, dspi->base + SPIDELAY); } - iowrite32(spifmt, davinci_spi->base + SPIFMT0); + iowrite32(spifmt, dspi->base + SPIFMT0); return 0; } @@ -392,11 +392,11 @@ static int davinci_spi_setup_transfer(struct spi_device *spi, static int davinci_spi_setup(struct spi_device *spi) { int retval = 0; - struct davinci_spi *davinci_spi; + struct davinci_spi *dspi; struct davinci_spi_platform_data *pdata; - davinci_spi = spi_master_get_devdata(spi->master); - pdata = davinci_spi->pdata; + dspi = spi_master_get_devdata(spi->master); + pdata = dspi->pdata; /* if bits per word length is zero then set it default 8 */ if (!spi->bits_per_word) @@ -405,28 +405,24 @@ static int davinci_spi_setup(struct spi_device *spi) if (!(spi->mode & SPI_NO_CS)) { if ((pdata->chip_sel == NULL) || (pdata->chip_sel[spi->chip_select] == SPI_INTERN_CS)) - set_io_bits(davinci_spi->base + SPIPC0, - 1 << spi->chip_select); + set_io_bits(dspi->base + SPIPC0, 1 << spi->chip_select); } if (spi->mode & SPI_READY) - set_io_bits(davinci_spi->base + SPIPC0, SPIPC0_SPIENA_MASK); + set_io_bits(dspi->base + SPIPC0, SPIPC0_SPIENA_MASK); if (spi->mode & SPI_LOOP) - set_io_bits(davinci_spi->base + SPIGCR1, - SPIGCR1_LOOPBACK_MASK); + set_io_bits(dspi->base + SPIGCR1, SPIGCR1_LOOPBACK_MASK); else - clear_io_bits(davinci_spi->base + SPIGCR1, - SPIGCR1_LOOPBACK_MASK); + clear_io_bits(dspi->base + SPIGCR1, SPIGCR1_LOOPBACK_MASK); return retval; } -static int davinci_spi_check_error(struct davinci_spi *davinci_spi, - int int_status) +static int davinci_spi_check_error(struct davinci_spi *dspi, int int_status) { - struct device *sdev = davinci_spi->bitbang.master->dev.parent; + struct device *sdev = dspi->bitbang.master->dev.parent; if (int_status & SPIFLG_TIMEOUT_MASK) { dev_dbg(sdev, "SPI Time-out Error\n"); @@ -441,7 +437,7 @@ static int davinci_spi_check_error(struct davinci_spi *davinci_spi, return -EIO; } - if (davinci_spi->version == SPI_VERSION_2) { + if (dspi->version == SPI_VERSION_2) { if (int_status & SPIFLG_DLEN_ERR_MASK) { dev_dbg(sdev, "SPI Data Length Error\n"); return -EIO; @@ -465,35 +461,35 @@ static int davinci_spi_check_error(struct davinci_spi *davinci_spi, /** * davinci_spi_process_events - check for and handle any SPI controller events - * @davinci_spi: the controller data + * @dspi: the controller data * * This function will check the SPIFLG register and handle any events that are * detected there */ -static int davinci_spi_process_events(struct davinci_spi *davinci_spi) +static int davinci_spi_process_events(struct davinci_spi *dspi) { - u32 buf, status, errors = 0, data1_reg_val; + u32 buf, status, errors = 0, spidat1; - buf = ioread32(davinci_spi->base + SPIBUF); + buf = ioread32(dspi->base + SPIBUF); - if (davinci_spi->rcount > 0 && !(buf & SPIBUF_RXEMPTY_MASK)) { - davinci_spi->get_rx(buf & 0xFFFF, davinci_spi); - davinci_spi->rcount--; + if (dspi->rcount > 0 && !(buf & SPIBUF_RXEMPTY_MASK)) { + dspi->get_rx(buf & 0xFFFF, dspi); + dspi->rcount--; } - status = ioread32(davinci_spi->base + SPIFLG); + status = ioread32(dspi->base + SPIFLG); if (unlikely(status & SPIFLG_ERROR_MASK)) { errors = status & SPIFLG_ERROR_MASK; goto out; } - if (davinci_spi->wcount > 0 && !(buf & SPIBUF_TXFULL_MASK)) { - data1_reg_val = ioread32(davinci_spi->base + SPIDAT1); - davinci_spi->wcount--; - data1_reg_val &= ~0xFFFF; - data1_reg_val |= 0xFFFF & davinci_spi->get_tx(davinci_spi); - iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1); + if (dspi->wcount > 0 && !(buf & SPIBUF_TXFULL_MASK)) { + spidat1 = ioread32(dspi->base + SPIDAT1); + dspi->wcount--; + spidat1 &= ~0xFFFF; + spidat1 |= 0xFFFF & dspi->get_tx(dspi); + iowrite32(spidat1, dspi->base + SPIDAT1); } out: @@ -502,21 +498,20 @@ out: static void davinci_spi_dma_callback(unsigned lch, u16 status, void *data) { - struct davinci_spi *davinci_spi = data; - struct davinci_spi_dma *davinci_spi_dma = &davinci_spi->dma_channels; + struct davinci_spi *dspi = data; + struct davinci_spi_dma *dma = &dspi->dma; edma_stop(lch); if (status == DMA_COMPLETE) { - if (lch == davinci_spi_dma->dma_rx_channel) - davinci_spi->rcount = 0; - if (lch == davinci_spi_dma->dma_tx_channel) - davinci_spi->wcount = 0; + if (lch == dma->rx_channel) + dspi->rcount = 0; + if (lch == dma->tx_channel) + dspi->wcount = 0; } - if ((!davinci_spi->wcount && !davinci_spi->rcount) || - (status != DMA_COMPLETE)) - complete(&davinci_spi->done); + if ((!dspi->wcount && !dspi->rcount) || (status != DMA_COMPLETE)) + complete(&dspi->done); } /** @@ -530,57 +525,57 @@ static void davinci_spi_dma_callback(unsigned lch, u16 status, void *data) */ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t) { - struct davinci_spi *davinci_spi; + struct davinci_spi *dspi; int data_type, ret; - u32 tx_data, data1_reg_val; + u32 tx_data, spidat1; u32 errors = 0; struct davinci_spi_config *spicfg; struct davinci_spi_platform_data *pdata; unsigned uninitialized_var(rx_buf_count); struct device *sdev; - davinci_spi = spi_master_get_devdata(spi->master); - pdata = davinci_spi->pdata; + dspi = spi_master_get_devdata(spi->master); + pdata = dspi->pdata; spicfg = (struct davinci_spi_config *)spi->controller_data; if (!spicfg) spicfg = &davinci_spi_default_cfg; - sdev = davinci_spi->bitbang.master->dev.parent; + sdev = dspi->bitbang.master->dev.parent; /* convert len to words based on bits_per_word */ - data_type = davinci_spi->bytes_per_word[spi->chip_select]; + data_type = dspi->bytes_per_word[spi->chip_select]; - davinci_spi->tx = t->tx_buf; - davinci_spi->rx = t->rx_buf; - davinci_spi->wcount = t->len / data_type; - davinci_spi->rcount = davinci_spi->wcount; + dspi->tx = t->tx_buf; + dspi->rx = t->rx_buf; + dspi->wcount = t->len / data_type; + dspi->rcount = dspi->wcount; - data1_reg_val = ioread32(davinci_spi->base + SPIDAT1); + spidat1 = ioread32(dspi->base + SPIDAT1); - clear_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK); - set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK); + clear_io_bits(dspi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK); + set_io_bits(dspi->base + SPIGCR1, SPIGCR1_SPIENA_MASK); - INIT_COMPLETION(davinci_spi->done); + INIT_COMPLETION(dspi->done); if (spicfg->io_type == SPI_IO_TYPE_INTR) - set_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKINT); + set_io_bits(dspi->base + SPIINT, SPIINT_MASKINT); if (spicfg->io_type != SPI_IO_TYPE_DMA) { /* start the transfer */ - davinci_spi->wcount--; - tx_data = davinci_spi->get_tx(davinci_spi); - data1_reg_val &= 0xFFFF0000; - data1_reg_val |= tx_data & 0xFFFF; - iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1); + dspi->wcount--; + tx_data = dspi->get_tx(dspi); + spidat1 &= 0xFFFF0000; + spidat1 |= tx_data & 0xFFFF; + iowrite32(spidat1, dspi->base + SPIDAT1); } else { - struct davinci_spi_dma *davinci_spi_dma; + struct davinci_spi_dma *dma; unsigned long tx_reg, rx_reg; struct edmacc_param param; void *rx_buf; - davinci_spi_dma = &davinci_spi->dma_channels; + dma = &dspi->dma; - tx_reg = (unsigned long)davinci_spi->pbase + SPIDAT1; - rx_reg = (unsigned long)davinci_spi->pbase + SPIBUF; + tx_reg = (unsigned long)dspi->pbase + SPIDAT1; + rx_reg = (unsigned long)dspi->pbase + SPIBUF; /* * Transmit DMA setup @@ -596,26 +591,24 @@ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t) if (t->tx_buf) { t->tx_dma = dma_map_single(&spi->dev, (void *)t->tx_buf, - davinci_spi->wcount, DMA_TO_DEVICE); + dspi->wcount, DMA_TO_DEVICE); if (dma_mapping_error(&spi->dev, t->tx_dma)) { dev_dbg(sdev, "Unable to DMA map %d bytes" - "TX buffer\n", - davinci_spi->wcount); + "TX buffer\n", dspi->wcount); return -ENOMEM; } } - param.opt = TCINTEN | EDMA_TCC(davinci_spi_dma->dma_tx_channel); + param.opt = TCINTEN | EDMA_TCC(dma->tx_channel); param.src = t->tx_buf ? t->tx_dma : tx_reg; - param.a_b_cnt = davinci_spi->wcount << 16 | data_type; + param.a_b_cnt = dspi->wcount << 16 | data_type; param.dst = tx_reg; param.src_dst_bidx = t->tx_buf ? data_type : 0; param.link_bcntrld = 0xffff; param.src_dst_cidx = 0; param.ccnt = 1; - edma_write_slot(davinci_spi_dma->dma_tx_channel, ¶m); - edma_link(davinci_spi_dma->dma_tx_channel, - davinci_spi_dma->dummy_param_slot); + edma_write_slot(dma->tx_channel, ¶m); + edma_link(dma->tx_channel, dma->dummy_param_slot); /* * Receive DMA setup @@ -631,10 +624,10 @@ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t) if (t->rx_buf) { rx_buf = t->rx_buf; - rx_buf_count = davinci_spi->rcount; + rx_buf_count = dspi->rcount; } else { - rx_buf = davinci_spi->rx_tmp_buf; - rx_buf_count = sizeof(davinci_spi->rx_tmp_buf); + rx_buf = dspi->rx_tmp_buf; + rx_buf_count = sizeof(dspi->rx_tmp_buf); } t->rx_dma = dma_map_single(&spi->dev, rx_buf, rx_buf_count, @@ -643,71 +636,69 @@ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t) dev_dbg(sdev, "Couldn't DMA map a %d bytes RX buffer\n", rx_buf_count); if (t->tx_buf) - dma_unmap_single(NULL, t->tx_dma, - davinci_spi->wcount, - DMA_TO_DEVICE); + dma_unmap_single(NULL, t->tx_dma, dspi->wcount, + DMA_TO_DEVICE); return -ENOMEM; } - param.opt = TCINTEN | EDMA_TCC(davinci_spi_dma->dma_rx_channel); + param.opt = TCINTEN | EDMA_TCC(dma->rx_channel); param.src = rx_reg; - param.a_b_cnt = davinci_spi->rcount << 16 | data_type; + param.a_b_cnt = dspi->rcount << 16 | data_type; param.dst = t->rx_dma; param.src_dst_bidx = (t->rx_buf ? data_type : 0) << 16; param.link_bcntrld = 0xffff; param.src_dst_cidx = 0; param.ccnt = 1; - edma_write_slot(davinci_spi_dma->dma_rx_channel, ¶m); + edma_write_slot(dma->rx_channel, ¶m); if (pdata->cshold_bug) - iowrite16(data1_reg_val >> 16, - davinci_spi->base + SPIDAT1 + 2); + iowrite16(spidat1 >> 16, dspi->base + SPIDAT1 + 2); - edma_start(davinci_spi_dma->dma_rx_channel); - edma_start(davinci_spi_dma->dma_tx_channel); - set_io_bits(davinci_spi->base + SPIINT, SPIINT_DMA_REQ_EN); + edma_start(dma->rx_channel); + edma_start(dma->tx_channel); + set_io_bits(dspi->base + SPIINT, SPIINT_DMA_REQ_EN); } /* Wait for the transfer to complete */ if (spicfg->io_type != SPI_IO_TYPE_POLL) { - wait_for_completion_interruptible(&(davinci_spi->done)); + wait_for_completion_interruptible(&(dspi->done)); } else { - while (davinci_spi->rcount > 0 || davinci_spi->wcount > 0) { - errors = davinci_spi_process_events(davinci_spi); + while (dspi->rcount > 0 || dspi->wcount > 0) { + errors = davinci_spi_process_events(dspi); if (errors) break; cpu_relax(); } } - clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKALL); + clear_io_bits(dspi->base + SPIINT, SPIINT_MASKALL); if (spicfg->io_type == SPI_IO_TYPE_DMA) { if (t->tx_buf) - dma_unmap_single(NULL, t->tx_dma, davinci_spi->wcount, + dma_unmap_single(NULL, t->tx_dma, dspi->wcount, DMA_TO_DEVICE); dma_unmap_single(NULL, t->rx_dma, rx_buf_count, DMA_FROM_DEVICE); - clear_io_bits(davinci_spi->base + SPIINT, SPIINT_DMA_REQ_EN); + clear_io_bits(dspi->base + SPIINT, SPIINT_DMA_REQ_EN); } - clear_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK); - set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK); + clear_io_bits(dspi->base + SPIGCR1, SPIGCR1_SPIENA_MASK); + set_io_bits(dspi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK); /* * Check for bit error, desync error,parity error,timeout error and * receive overflow errors */ if (errors) { - ret = davinci_spi_check_error(davinci_spi, errors); + ret = davinci_spi_check_error(dspi, errors); WARN(!ret, "%s: error reported but no error found!\n", dev_name(&spi->dev)); return ret; } - if (davinci_spi->rcount != 0 || davinci_spi->wcount != 0) { + if (dspi->rcount != 0 || dspi->wcount != 0) { dev_err(sdev, "SPI data transfer error\n"); return -EIO; } @@ -726,60 +717,56 @@ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t) * If transfer length is zero then it will indicate the COMPLETION so that * davinci_spi_bufs function can go ahead. */ -static irqreturn_t davinci_spi_irq(s32 irq, void *context_data) +static irqreturn_t davinci_spi_irq(s32 irq, void *data) { - struct davinci_spi *davinci_spi = context_data; + struct davinci_spi *dspi = data; int status; - status = davinci_spi_process_events(davinci_spi); + status = davinci_spi_process_events(dspi); if (unlikely(status != 0)) - clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKINT); + clear_io_bits(dspi->base + SPIINT, SPIINT_MASKINT); - if ((!davinci_spi->rcount && !davinci_spi->wcount) || status) - complete(&davinci_spi->done); + if ((!dspi->rcount && !dspi->wcount) || status) + complete(&dspi->done); return IRQ_HANDLED; } -static int davinci_spi_request_dma(struct davinci_spi *davinci_spi) +static int davinci_spi_request_dma(struct davinci_spi *dspi) { int r; - struct davinci_spi_dma *davinci_spi_dma = &davinci_spi->dma_channels; + struct davinci_spi_dma *dma = &dspi->dma; - r = edma_alloc_channel(davinci_spi_dma->dma_rx_channel, - davinci_spi_dma_callback, davinci_spi, - davinci_spi_dma->eventq); + r = edma_alloc_channel(dma->rx_channel, davinci_spi_dma_callback, dspi, + dma->eventq); if (r < 0) { pr_err("Unable to request DMA channel for SPI RX\n"); r = -EAGAIN; goto rx_dma_failed; } - r = edma_alloc_channel(davinci_spi_dma->dma_tx_channel, - davinci_spi_dma_callback, davinci_spi, - davinci_spi_dma->eventq); + r = edma_alloc_channel(dma->tx_channel, davinci_spi_dma_callback, dspi, + dma->eventq); if (r < 0) { pr_err("Unable to request DMA channel for SPI TX\n"); r = -EAGAIN; goto tx_dma_failed; } - r = edma_alloc_slot(EDMA_CTLR(davinci_spi_dma->dma_tx_channel), - EDMA_SLOT_ANY); + r = edma_alloc_slot(EDMA_CTLR(dma->tx_channel), EDMA_SLOT_ANY); if (r < 0) { pr_err("Unable to request SPI TX DMA param slot\n"); r = -EAGAIN; goto param_failed; } - davinci_spi_dma->dummy_param_slot = r; - edma_link(davinci_spi_dma->dummy_param_slot, - davinci_spi_dma->dummy_param_slot); + dma->dummy_param_slot = r; + edma_link(dma->dummy_param_slot, dma->dummy_param_slot); return 0; param_failed: - edma_free_channel(davinci_spi_dma->dma_tx_channel); + edma_free_channel(dma->tx_channel); tx_dma_failed: - edma_free_channel(davinci_spi_dma->dma_rx_channel); + edma_free_channel(dma->rx_channel); rx_dma_failed: return r; } @@ -798,7 +785,7 @@ rx_dma_failed: static int davinci_spi_probe(struct platform_device *pdev) { struct spi_master *master; - struct davinci_spi *davinci_spi; + struct davinci_spi *dspi; struct davinci_spi_platform_data *pdata; struct resource *r, *mem; resource_size_t dma_rx_chan = SPI_NO_RESOURCE; @@ -821,8 +808,8 @@ static int davinci_spi_probe(struct platform_device *pdev) dev_set_drvdata(&pdev->dev, master); - davinci_spi = spi_master_get_devdata(master); - if (davinci_spi == NULL) { + dspi = spi_master_get_devdata(master); + if (dspi == NULL) { ret = -ENOENT; goto free_master; } @@ -833,8 +820,8 @@ static int davinci_spi_probe(struct platform_device *pdev) goto free_master; } - davinci_spi->pbase = r->start; - davinci_spi->pdata = pdata; + dspi->pbase = r->start; + dspi->pdata = pdata; mem = request_mem_region(r->start, resource_size(r), pdev->name); if (mem == NULL) { @@ -842,48 +829,48 @@ static int davinci_spi_probe(struct platform_device *pdev) goto free_master; } - davinci_spi->base = ioremap(r->start, resource_size(r)); - if (davinci_spi->base == NULL) { + dspi->base = ioremap(r->start, resource_size(r)); + if (dspi->base == NULL) { ret = -ENOMEM; goto release_region; } - davinci_spi->irq = platform_get_irq(pdev, 0); - if (davinci_spi->irq <= 0) { + dspi->irq = platform_get_irq(pdev, 0); + if (dspi->irq <= 0) { ret = -EINVAL; goto unmap_io; } - ret = request_irq(davinci_spi->irq, davinci_spi_irq, 0, - dev_name(&pdev->dev), davinci_spi); + ret = request_irq(dspi->irq, davinci_spi_irq, 0, dev_name(&pdev->dev), + dspi); if (ret) goto unmap_io; - davinci_spi->bitbang.master = spi_master_get(master); - if (davinci_spi->bitbang.master == NULL) { + dspi->bitbang.master = spi_master_get(master); + if (dspi->bitbang.master == NULL) { ret = -ENODEV; goto irq_free; } - davinci_spi->clk = clk_get(&pdev->dev, NULL); - if (IS_ERR(davinci_spi->clk)) { + dspi->clk = clk_get(&pdev->dev, NULL); + if (IS_ERR(dspi->clk)) { ret = -ENODEV; goto put_master; } - clk_enable(davinci_spi->clk); + clk_enable(dspi->clk); master->bus_num = pdev->id; master->num_chipselect = pdata->num_chipselect; master->setup = davinci_spi_setup; - davinci_spi->bitbang.chipselect = davinci_spi_chipselect; - davinci_spi->bitbang.setup_transfer = davinci_spi_setup_transfer; + dspi->bitbang.chipselect = davinci_spi_chipselect; + dspi->bitbang.setup_transfer = davinci_spi_setup_transfer; - davinci_spi->version = pdata->version; + dspi->version = pdata->version; - davinci_spi->bitbang.flags = SPI_NO_CS | SPI_LSB_FIRST | SPI_LOOP; - if (davinci_spi->version == SPI_VERSION_2) - davinci_spi->bitbang.flags |= SPI_READY; + dspi->bitbang.flags = SPI_NO_CS | SPI_LSB_FIRST | SPI_LOOP; + if (dspi->version == SPI_VERSION_2) + dspi->bitbang.flags |= SPI_READY; r = platform_get_resource(pdev, IORESOURCE_DMA, 0); if (r) @@ -895,15 +882,15 @@ static int davinci_spi_probe(struct platform_device *pdev) if (r) dma_eventq = r->start; - davinci_spi->bitbang.txrx_bufs = davinci_spi_bufs; + dspi->bitbang.txrx_bufs = davinci_spi_bufs; if (dma_rx_chan != SPI_NO_RESOURCE && dma_tx_chan != SPI_NO_RESOURCE && dma_eventq != SPI_NO_RESOURCE) { - davinci_spi->dma_channels.dma_rx_channel = dma_rx_chan; - davinci_spi->dma_channels.dma_tx_channel = dma_tx_chan; - davinci_spi->dma_channels.eventq = dma_eventq; + dspi->dma.rx_channel = dma_rx_chan; + dspi->dma.tx_channel = dma_tx_chan; + dspi->dma.eventq = dma_eventq; - ret = davinci_spi_request_dma(davinci_spi); + ret = davinci_spi_request_dma(dspi); if (ret) goto free_clk; @@ -913,19 +900,19 @@ static int davinci_spi_probe(struct platform_device *pdev) dma_eventq); } - davinci_spi->get_rx = davinci_spi_rx_buf_u8; - davinci_spi->get_tx = davinci_spi_tx_buf_u8; + dspi->get_rx = davinci_spi_rx_buf_u8; + dspi->get_tx = davinci_spi_tx_buf_u8; - init_completion(&davinci_spi->done); + init_completion(&dspi->done); /* Reset In/OUT SPI module */ - iowrite32(0, davinci_spi->base + SPIGCR0); + iowrite32(0, dspi->base + SPIGCR0); udelay(100); - iowrite32(1, davinci_spi->base + SPIGCR0); + iowrite32(1, dspi->base + SPIGCR0); /* Set up SPIPC0. CS and ENA init is done in davinci_spi_setup */ spipc0 = SPIPC0_DIFUN_MASK | SPIPC0_DOFUN_MASK | SPIPC0_CLKFUN_MASK; - iowrite32(spipc0, davinci_spi->base + SPIPC0); + iowrite32(spipc0, dspi->base + SPIPC0); /* initialize chip selects */ if (pdata->chip_sel) { @@ -936,40 +923,40 @@ static int davinci_spi_probe(struct platform_device *pdev) } if (pdata->intr_line) - iowrite32(SPI_INTLVL_1, davinci_spi->base + SPILVL); + iowrite32(SPI_INTLVL_1, dspi->base + SPILVL); else - iowrite32(SPI_INTLVL_0, davinci_spi->base + SPILVL); + iowrite32(SPI_INTLVL_0, dspi->base + SPILVL); - iowrite32(CS_DEFAULT, davinci_spi->base + SPIDEF); + iowrite32(CS_DEFAULT, dspi->base + SPIDEF); /* master mode default */ - set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_CLKMOD_MASK); - set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_MASTER_MASK); - set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK); + set_io_bits(dspi->base + SPIGCR1, SPIGCR1_CLKMOD_MASK); + set_io_bits(dspi->base + SPIGCR1, SPIGCR1_MASTER_MASK); + set_io_bits(dspi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK); - ret = spi_bitbang_start(&davinci_spi->bitbang); + ret = spi_bitbang_start(&dspi->bitbang); if (ret) goto free_dma; - dev_info(&pdev->dev, "Controller at 0x%p\n", davinci_spi->base); + dev_info(&pdev->dev, "Controller at 0x%p\n", dspi->base); return ret; free_dma: - edma_free_channel(davinci_spi->dma_channels.dma_tx_channel); - edma_free_channel(davinci_spi->dma_channels.dma_rx_channel); - edma_free_slot(davinci_spi->dma_channels.dummy_param_slot); + edma_free_channel(dspi->dma.tx_channel); + edma_free_channel(dspi->dma.rx_channel); + edma_free_slot(dspi->dma.dummy_param_slot); free_clk: - clk_disable(davinci_spi->clk); - clk_put(davinci_spi->clk); + clk_disable(dspi->clk); + clk_put(dspi->clk); put_master: spi_master_put(master); irq_free: - free_irq(davinci_spi->irq, davinci_spi); + free_irq(dspi->irq, dspi); unmap_io: - iounmap(davinci_spi->base); + iounmap(dspi->base); release_region: - release_mem_region(davinci_spi->pbase, resource_size(r)); + release_mem_region(dspi->pbase, resource_size(r)); free_master: kfree(master); err: @@ -987,22 +974,22 @@ err: */ static int __exit davinci_spi_remove(struct platform_device *pdev) { - struct davinci_spi *davinci_spi; + struct davinci_spi *dspi; struct spi_master *master; struct resource *r; master = dev_get_drvdata(&pdev->dev); - davinci_spi = spi_master_get_devdata(master); + dspi = spi_master_get_devdata(master); - spi_bitbang_stop(&davinci_spi->bitbang); + spi_bitbang_stop(&dspi->bitbang); - clk_disable(davinci_spi->clk); - clk_put(davinci_spi->clk); + clk_disable(dspi->clk); + clk_put(dspi->clk); spi_master_put(master); - free_irq(davinci_spi->irq, davinci_spi); - iounmap(davinci_spi->base); + free_irq(dspi->irq, dspi); + iounmap(dspi->base); r = platform_get_resource(pdev, IORESOURCE_MEM, 0); - release_mem_region(davinci_spi->pbase, resource_size(r)); + release_mem_region(dspi->pbase, resource_size(r)); return 0; } -- cgit v1.2.3-70-g09d2 From 23ce17adb7fc33a4353abe4b57a03f555cced57b Mon Sep 17 00:00:00 2001 From: Sekhar Nori Date: Tue, 12 Oct 2010 11:58:02 +0530 Subject: spi: davinci: kconfig: add manufacturer name to prompt string Add manufacturer name to the Kconfig prompt string and move the controller name to the begining of the prompt. This helps locate the driver easily among the list of existing drivers. While at it, also add information about being able to build the driver as module. Tested-By: Brian Niebuhr Signed-off-by: Sekhar Nori --- drivers/spi/Kconfig | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 78f9fd02c1b..a32796e0bdc 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -111,11 +111,14 @@ config SPI_COLDFIRE_QSPI will be called coldfire_qspi. config SPI_DAVINCI - tristate "SPI controller driver for DaVinci/DA8xx SoC's" + tristate "Texas Instruments DaVinci/DA8x/OMAP-L/AM1x SoC SPI controller" depends on SPI_MASTER && ARCH_DAVINCI select SPI_BITBANG help - SPI master controller for DaVinci and DA8xx SPI modules. + SPI master controller for DaVinci/DA8x/OMAP-L/AM1x SPI modules. + + This driver can also be built as a module. The module will be called + davinci_spi. config SPI_EP93XX tristate "Cirrus Logic EP93xx SPI controller" -- cgit v1.2.3-70-g09d2 From fbd29a14af42d374ddce9c16ff5f7805e69c764f Mon Sep 17 00:00:00 2001 From: Sebastian Andrzej Siewior Date: Fri, 19 Nov 2010 09:00:11 -0800 Subject: spi/pxa2xx: register driver properly use platform_driver_register instead of platform_driver_probe. The latter only checks available devices at the time of calling. So if a device gets inserter at a later point in time then the driver will never play with it. Signed-off-by: Sebastian Andrzej Siewior Signed-off-by: Dirk Brandewie --- drivers/spi/pxa2xx_spi.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/pxa2xx_spi.c b/drivers/spi/pxa2xx_spi.c index e76b1afafe0..4e169b579ef 100644 --- a/drivers/spi/pxa2xx_spi.c +++ b/drivers/spi/pxa2xx_spi.c @@ -1366,7 +1366,7 @@ static void cleanup(struct spi_device *spi) kfree(chip); } -static int __init init_queue(struct driver_data *drv_data) +static int __devinit init_queue(struct driver_data *drv_data) { INIT_LIST_HEAD(&drv_data->queue); spin_lock_init(&drv_data->lock); @@ -1454,7 +1454,7 @@ static int destroy_queue(struct driver_data *drv_data) return 0; } -static int __init pxa2xx_spi_probe(struct platform_device *pdev) +static int __devinit pxa2xx_spi_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct pxa2xx_spi_master *platform_info; @@ -1723,13 +1723,14 @@ static struct platform_driver driver = { .pm = &pxa2xx_spi_pm_ops, #endif }, + .probe = pxa2xx_spi_probe, .remove = pxa2xx_spi_remove, .shutdown = pxa2xx_spi_shutdown, }; static int __init pxa2xx_spi_init(void) { - return platform_driver_probe(&driver, pxa2xx_spi_probe); + return platform_driver_register(&driver); } subsys_initcall(pxa2xx_spi_init); -- cgit v1.2.3-70-g09d2 From 49cbb1e0b6dcba9170e72fdf40c75fc24cadba4b Mon Sep 17 00:00:00 2001 From: Sebastian Andrzej Siewior Date: Mon, 22 Nov 2010 17:12:14 -0800 Subject: spi/pxa2xx: add support for shared IRQ handler This is required in case the interrupt line is shared with other devices. Signed-off-by: Sebastian Andrzej Siewior Signed-off-by: Dirk Brandewie --- drivers/spi/pxa2xx_spi.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) (limited to 'drivers/spi') diff --git a/drivers/spi/pxa2xx_spi.c b/drivers/spi/pxa2xx_spi.c index 4e169b579ef..1865c23f217 100644 --- a/drivers/spi/pxa2xx_spi.c +++ b/drivers/spi/pxa2xx_spi.c @@ -742,6 +742,18 @@ static irqreturn_t ssp_int(int irq, void *dev_id) { struct driver_data *drv_data = dev_id; void __iomem *reg = drv_data->ioaddr; + u32 sccr1_reg = read_SSCR1(reg); + u32 mask = drv_data->mask_sr; + u32 status; + + status = read_SSSR(reg); + + /* Ignore possible writes if we don't need to write */ + if (!(sccr1_reg & SSCR1_TIE)) + mask &= ~SSSR_TFS; + + if (!(status & mask)) + return IRQ_NONE; if (!drv_data->cur_msg) { @@ -1512,7 +1524,8 @@ static int __devinit pxa2xx_spi_probe(struct platform_device *pdev) drv_data->mask_sr = SSSR_TINT | SSSR_RFS | SSSR_TFS | SSSR_ROR; } - status = request_irq(ssp->irq, ssp_int, 0, dev_name(dev), drv_data); + status = request_irq(ssp->irq, ssp_int, IRQF_SHARED, dev_name(dev), + drv_data); if (status < 0) { dev_err(&pdev->dev, "cannot get IRQ %d\n", ssp->irq); goto out_error_master_alloc; -- cgit v1.2.3-70-g09d2 From 4a25605fb71f02b4f80091df91f777225a0309c5 Mon Sep 17 00:00:00 2001 From: Sebastian Andrzej Siewior Date: Mon, 22 Nov 2010 17:12:15 -0800 Subject: spi/pxa2xx: Use define for SSSR_TFL_MASK instead of plain numbers Signed-off-by: Sebastian Andrzej Siewior Signed-off-by: Dirk Brandewie --- arch/arm/plat-pxa/include/plat/ssp.h | 3 ++- drivers/spi/pxa2xx_spi.c | 8 ++++---- 2 files changed, 6 insertions(+), 5 deletions(-) (limited to 'drivers/spi') diff --git a/arch/arm/plat-pxa/include/plat/ssp.h b/arch/arm/plat-pxa/include/plat/ssp.h index fe43150690e..21c12ca8073 100644 --- a/arch/arm/plat-pxa/include/plat/ssp.h +++ b/arch/arm/plat-pxa/include/plat/ssp.h @@ -82,7 +82,8 @@ #define SSSR_TFS (1 << 5) /* Transmit FIFO Service Request */ #define SSSR_RFS (1 << 6) /* Receive FIFO Service Request */ #define SSSR_ROR (1 << 7) /* Receive FIFO Overrun */ - +#define SSSR_TFL_MASK (0xf << 8) /* Transmit FIFO Level mask */ +#define SSSR_RFL_MASK (0xf << 12) /* Receive FIFO Level mask */ /* extra bits in PXA255, PXA26x and PXA27x SSP ports */ #define SSCR0_TISSP (1 << 4) /* TI Sync Serial Protocol */ diff --git a/drivers/spi/pxa2xx_spi.c b/drivers/spi/pxa2xx_spi.c index 1865c23f217..55083445aae 100644 --- a/drivers/spi/pxa2xx_spi.c +++ b/drivers/spi/pxa2xx_spi.c @@ -224,7 +224,7 @@ static int null_writer(struct driver_data *drv_data) void __iomem *reg = drv_data->ioaddr; u8 n_bytes = drv_data->n_bytes; - if (((read_SSSR(reg) & 0x00000f00) == 0x00000f00) + if (((read_SSSR(reg) & SSSR_TFL_MASK) == SSSR_TFL_MASK) || (drv_data->tx == drv_data->tx_end)) return 0; @@ -252,7 +252,7 @@ static int u8_writer(struct driver_data *drv_data) { void __iomem *reg = drv_data->ioaddr; - if (((read_SSSR(reg) & 0x00000f00) == 0x00000f00) + if (((read_SSSR(reg) & SSSR_TFL_MASK) == SSSR_TFL_MASK) || (drv_data->tx == drv_data->tx_end)) return 0; @@ -279,7 +279,7 @@ static int u16_writer(struct driver_data *drv_data) { void __iomem *reg = drv_data->ioaddr; - if (((read_SSSR(reg) & 0x00000f00) == 0x00000f00) + if (((read_SSSR(reg) & SSSR_TFL_MASK) == SSSR_TFL_MASK) || (drv_data->tx == drv_data->tx_end)) return 0; @@ -306,7 +306,7 @@ static int u32_writer(struct driver_data *drv_data) { void __iomem *reg = drv_data->ioaddr; - if (((read_SSSR(reg) & 0x00000f00) == 0x00000f00) + if (((read_SSSR(reg) & SSSR_TFL_MASK) == SSSR_TFL_MASK) || (drv_data->tx == drv_data->tx_end)) return 0; -- cgit v1.2.3-70-g09d2 From 8348c259dd6a6019a8fa01b0a3443409480f7b9d Mon Sep 17 00:00:00 2001 From: Sebastian Andrzej Siewior Date: Mon, 22 Nov 2010 17:12:15 -0800 Subject: arm/pxa2xx: reorgazine SSP and SPI header files The PXA-SPI driver relies on some files / defines which are arm specific and are within the ARM tree. The CE4100 SoC which is x86 has also the SPI core. This patch moves the ssp and spi files from arm/mach-pxa and plat-pxa to include/linux where the CE4100 can access them. This move got verified by building the following defconfigs: cm_x2xx_defconfig corgi_defconfig em_x270_defconfig ezx_defconfig imote2_defconfig pxa3xx_defconfig spitz_defconfig zeus_defconfig raumfeld_defconfig magician_defconfig Signed-off-by: Sebastian Andrzej Siewior Signed-off-by: Dirk Brandewie --- Documentation/spi/pxa2xx | 4 +- arch/arm/mach-pxa/cm-x255.c | 2 +- arch/arm/mach-pxa/cm-x270.c | 2 +- arch/arm/mach-pxa/corgi.c | 2 +- arch/arm/mach-pxa/devices.c | 2 +- arch/arm/mach-pxa/em-x270.c | 2 +- arch/arm/mach-pxa/hx4700.c | 2 +- arch/arm/mach-pxa/icontrol.c | 2 +- arch/arm/mach-pxa/include/mach/pxa2xx_spi.h | 47 ------- arch/arm/mach-pxa/littleton.c | 2 +- arch/arm/mach-pxa/lubbock.c | 2 +- arch/arm/mach-pxa/pcm027.c | 2 +- arch/arm/mach-pxa/poodle.c | 2 +- arch/arm/mach-pxa/spitz.c | 3 +- arch/arm/mach-pxa/stargate2.c | 2 +- arch/arm/mach-pxa/tosa.c | 2 +- arch/arm/mach-pxa/trizeps4.c | 1 - arch/arm/mach-pxa/z2.c | 2 +- arch/arm/mach-pxa/zeus.c | 2 +- arch/arm/plat-pxa/include/plat/ssp.h | 187 ---------------------------- arch/arm/plat-pxa/ssp.c | 2 +- drivers/spi/pxa2xx_spi.c | 4 +- include/linux/pxa2xx_ssp.h | 187 ++++++++++++++++++++++++++++ include/linux/spi/pxa2xx_spi.h | 49 ++++++++ sound/soc/pxa/pxa-ssp.c | 2 +- 25 files changed, 257 insertions(+), 259 deletions(-) delete mode 100644 arch/arm/mach-pxa/include/mach/pxa2xx_spi.h delete mode 100644 arch/arm/plat-pxa/include/plat/ssp.h create mode 100644 include/linux/pxa2xx_ssp.h create mode 100644 include/linux/spi/pxa2xx_spi.h (limited to 'drivers/spi') diff --git a/Documentation/spi/pxa2xx b/Documentation/spi/pxa2xx index 6bb916d57c9..68a4fe3818a 100644 --- a/Documentation/spi/pxa2xx +++ b/Documentation/spi/pxa2xx @@ -19,7 +19,7 @@ Declaring PXA2xx Master Controllers ----------------------------------- Typically a SPI master is defined in the arch/.../mach-*/board-*.c as a "platform device". The master configuration is passed to the driver via a table -found in arch/arm/mach-pxa/include/mach/pxa2xx_spi.h: +found in include/linux/spi/pxa2xx_spi.h: struct pxa2xx_spi_master { enum pxa_ssp_type ssp_type; @@ -94,7 +94,7 @@ using the "spi_board_info" structure found in "linux/spi/spi.h". See Each slave device attached to the PXA must provide slave specific configuration information via the structure "pxa2xx_spi_chip" found in -"arch/arm/mach-pxa/include/mach/pxa2xx_spi.h". The pxa2xx_spi master controller driver +"include/linux/spi/pxa2xx_spi.h". The pxa2xx_spi master controller driver will uses the configuration whenever the driver communicates with the slave device. All fields are optional. diff --git a/arch/arm/mach-pxa/cm-x255.c b/arch/arm/mach-pxa/cm-x255.c index f1a7703d771..93f59f877fc 100644 --- a/arch/arm/mach-pxa/cm-x255.c +++ b/arch/arm/mach-pxa/cm-x255.c @@ -17,13 +17,13 @@ #include #include +#include #include #include #include #include -#include #include "generic.h" diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c index a9926bb7592..b88d601a809 100644 --- a/arch/arm/mach-pxa/cm-x270.c +++ b/arch/arm/mach-pxa/cm-x270.c @@ -19,12 +19,12 @@ #include