From 8b526ae4ddd7a62397d99856079b59eda5d09360 Mon Sep 17 00:00:00 2001 From: Jongpill Lee Date: Fri, 16 Jul 2010 10:19:41 +0900 Subject: ARM: SAMSUNG: serial: Add FRACVAL support for newer UART Add support for the FRACVAL register on the newer UART blocks which provides the same function as UDIVSLOT register but the FRACVAL is easier to implement. To support UDIVSLOT register, UDIVSLOT table search is necessary though supporting FRACVAL only needs the index value of UDIVSLOT table. Signed-off-by: Jongpill Lee Acked-by: Changhwan Youn Signed-off-by: Kukjin Kim --- drivers/serial/samsung.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/serial/samsung.c b/drivers/serial/samsung.c index a9d6c5626a0..b1156ba8ad1 100644 --- a/drivers/serial/samsung.c +++ b/drivers/serial/samsung.c @@ -705,8 +705,13 @@ static void s3c24xx_serial_set_termios(struct uart_port *port, if (ourport->info->has_divslot) { unsigned int div = ourport->baudclk_rate / baud; - udivslot = udivslot_table[div & 15]; - dbg("udivslot = %04x (div %d)\n", udivslot, div & 15); + if (cfg->has_fracval) { + udivslot = (div & 15); + dbg("fracval = %04x\n", udivslot); + } else { + udivslot = udivslot_table[div & 15]; + dbg("udivslot = %04x (div %d)\n", udivslot, div & 15); + } } switch (termios->c_cflag & CSIZE) { -- cgit v1.2.3-70-g09d2 From acfdc56d541517266eeeeca3a4e5baafaa01c2a1 Mon Sep 17 00:00:00 2001 From: Jongpill Lee Date: Fri, 16 Jul 2010 15:07:37 +0900 Subject: ARM: S5PV310: Add serial port support This patch adds UART serial port support for S5PV310. In the case of that serial device has just one clock source, driver can not control clock source. So add check function in get_clksrc and set_clksrc. Signed-off-by: Jongpill Lee Acked-by: Changhwan Youn Signed-off-by: Kukjin Kim --- drivers/serial/Kconfig | 4 ++-- drivers/serial/s5pv210.c | 8 ++++++++ 2 files changed, 10 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 8b23165bc5d..aa220108cec 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -544,8 +544,8 @@ config SERIAL_S3C6400 config SERIAL_S5PV210 tristate "Samsung S5PV210 Serial port support" - depends on SERIAL_SAMSUNG && (CPU_S5PV210 || CPU_S5P6442) - select SERIAL_SAMSUNG_UARTS_4 if CPU_S5PV210 + depends on SERIAL_SAMSUNG && (CPU_S5PV210 || CPU_S5P6442 || CPU_S5PV310) + select SERIAL_SAMSUNG_UARTS_4 if (CPU_S5PV210 || CPU_S5PV310) default y help Serial port support for Samsung's S5P Family of SoC's diff --git a/drivers/serial/s5pv210.c b/drivers/serial/s5pv210.c index 4a789e5361a..6ebccd70a70 100644 --- a/drivers/serial/s5pv210.c +++ b/drivers/serial/s5pv210.c @@ -28,8 +28,12 @@ static int s5pv210_serial_setsource(struct uart_port *port, struct s3c24xx_uart_clksrc *clk) { + struct s3c2410_uartcfg *cfg = port->dev->platform_data; unsigned long ucon = rd_regl(port, S3C2410_UCON); + if ((cfg->clocks_size) == 1) + return 0; + if (strcmp(clk->name, "pclk") == 0) ucon &= ~S5PV210_UCON_CLKMASK; else if (strcmp(clk->name, "uclk1") == 0) @@ -47,10 +51,14 @@ static int s5pv210_serial_setsource(struct uart_port *port, static int s5pv210_serial_getsource(struct uart_port *port, struct s3c24xx_uart_clksrc *clk) { + struct s3c2410_uartcfg *cfg = port->dev->platform_data; u32 ucon = rd_regl(port, S3C2410_UCON); clk->divisor = 1; + if ((cfg->clocks_size) == 1) + return 0; + switch (ucon & S5PV210_UCON_CLKMASK) { case S5PV210_UCON_PCLK: clk->name = "pclk"; -- cgit v1.2.3-70-g09d2 From e48add8c1c462fb10d6297b739a57ef599eb02ae Mon Sep 17 00:00:00 2001 From: Atul Dahiya Date: Tue, 20 Jul 2010 12:19:14 +0530 Subject: rtc: rtc-s3c: Updates RTC driver for clock enabling support This Patch updates existing Samsung RTC driver for clock enabling support. Signed-off-by: Atul Dahiya Signed-off-by: Kukjin Kim Cc: Ben Dooks Acked-by: Wan ZongShun --- drivers/rtc/rtc-s3c.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) (limited to 'drivers') diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c index 70b68d35f96..c032a15c84a 100644 --- a/drivers/rtc/rtc-s3c.c +++ b/drivers/rtc/rtc-s3c.c @@ -1,4 +1,7 @@ /* drivers/rtc/rtc-s3c.c + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ * * Copyright (c) 2004,2006 Simtec Electronics * Ben Dooks, @@ -39,6 +42,7 @@ enum s3c_cpu_type { static struct resource *s3c_rtc_mem; +static struct clk *rtc_clk; static void __iomem *s3c_rtc_base; static int s3c_rtc_alarmno = NO_IRQ; static int s3c_rtc_tickno = NO_IRQ; @@ -431,6 +435,10 @@ static int __devexit s3c_rtc_remove(struct platform_device *dev) s3c_rtc_setpie(&dev->dev, 0); s3c_rtc_setaie(0); + clk_disable(rtc_clk); + clk_put(rtc_clk); + rtc_clk = NULL; + iounmap(s3c_rtc_base); release_resource(s3c_rtc_mem); kfree(s3c_rtc_mem); @@ -488,6 +496,16 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev) goto err_nomap; } + rtc_clk = clk_get(&pdev->dev, "rtc"); + if (IS_ERR(rtc_clk)) { + dev_err(&pdev->dev, "failed to find rtc clock source\n"); + ret = PTR_ERR(rtc_clk); + rtc_clk = NULL; + goto err_clk; + } + + clk_enable(rtc_clk); + /* check to see if everything is setup correctly */ s3c_rtc_enable(pdev, 1); @@ -523,6 +541,10 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev) err_nortc: s3c_rtc_enable(pdev, 0); + clk_disable(rtc_clk); + clk_put(rtc_clk); + + err_clk: iounmap(s3c_rtc_base); err_nomap: -- cgit v1.2.3-70-g09d2 From 2f3478f6579b3f8d4579b6d49d7a8e9376c48fc2 Mon Sep 17 00:00:00 2001 From: Atul Dahiya Date: Tue, 20 Jul 2010 16:02:51 +0530 Subject: rtc: rtc-s3c: Updates driver for S3C64XX and newer SoCs This Patch does followings. 1) Enables support for alarm and time tick pending register for periodic interrupt generation. 2) Changes writeb to writew beacuse the macro S3C64XX_RTCCON_TICEN (Tick Timer Enable) is 9th bit of register. 3) Changes writeb to writel as max_user_freq used in s3c64xx is 32768 and requires 15 bits to update the Tick Count Register. Signed-off-by: Atul Dahiya Signed-off-by: Taekgyun Ko Signed-off-by: Kukjin Kim Cc: Ben Dooks --- drivers/rtc/rtc-s3c.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c index c032a15c84a..204001769eb 100644 --- a/drivers/rtc/rtc-s3c.c +++ b/drivers/rtc/rtc-s3c.c @@ -57,6 +57,10 @@ static irqreturn_t s3c_rtc_alarmirq(int irq, void *id) struct rtc_device *rdev = id; rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF); + + if (s3c_rtc_cpu_type == TYPE_S3C64XX) + writeb(S3C2410_INTP_ALM, s3c_rtc_base + S3C2410_INTP); + return IRQ_HANDLED; } @@ -65,6 +69,10 @@ static irqreturn_t s3c_rtc_tickirq(int irq, void *id) struct rtc_device *rdev = id; rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF); + + if (s3c_rtc_cpu_type == TYPE_S3C64XX) + writeb(S3C2410_INTP_TIC, s3c_rtc_base + S3C2410_INTP); + return IRQ_HANDLED; } @@ -98,7 +106,7 @@ static int s3c_rtc_setpie(struct device *dev, int enabled) if (enabled) tmp |= S3C64XX_RTCCON_TICEN; - writeb(tmp, s3c_rtc_base + S3C2410_RTCCON); + writew(tmp, s3c_rtc_base + S3C2410_RTCCON); } else { tmp = readb(s3c_rtc_base + S3C2410_TICNT); tmp &= ~S3C2410_TICNT_ENABLE; @@ -132,7 +140,7 @@ static int s3c_rtc_setfreq(struct device *dev, int freq) tmp |= (rtc_dev->max_user_freq / freq)-1; - writeb(tmp, s3c_rtc_base + S3C2410_TICNT); + writel(tmp, s3c_rtc_base + S3C2410_TICNT); spin_unlock_irq(&s3c_rtc_pie_lock); return 0; -- cgit v1.2.3-70-g09d2 From 051fe54e9f8c568dc9cd288b630d436ee93afe35 Mon Sep 17 00:00:00 2001 From: Taekgyun Ko Date: Thu, 29 Jul 2010 13:00:42 +0900 Subject: rtc: rtc-s3c: Add BCD register initialization codes RTC needs to be initialized when BCD registers have invalid value. Signed-off-by: Taekgyun Ko Signed-off-by: Kukjin Kim Cc: Ben Dooks Acked-by: Alessandro Zummo --- drivers/rtc/rtc-s3c.c | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'drivers') diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c index 204001769eb..a0d3ec89d41 100644 --- a/drivers/rtc/rtc-s3c.c +++ b/drivers/rtc/rtc-s3c.c @@ -458,6 +458,7 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev) { struct rtc_device *rtc; struct resource *res; + unsigned int tmp, i; int ret; pr_debug("%s: probe=%p\n", __func__, pdev); @@ -536,6 +537,15 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev) s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data; + /* Check RTC Time */ + + for (i = S3C2410_RTCSEC; i <= S3C2410_RTCYEAR; i += 0x4) { + tmp = readb(s3c_rtc_base + i); + + if ((tmp & 0xf) > 0x9 || ((tmp >> 4) & 0xf) > 0x9) + writeb(0, s3c_rtc_base + i); + } + if (s3c_rtc_cpu_type == TYPE_S3C64XX) rtc->max_user_freq = 32768; else -- cgit v1.2.3-70-g09d2 From 16f4efe7bf6cae180f72618ccc4027afee78123a Mon Sep 17 00:00:00 2001 From: Atul Dahiya Date: Tue, 20 Jul 2010 16:38:49 +0530 Subject: rtc: rtc-s3c: Add extra option to include RTC for Samsung SoCs This patch adds HAVE_S3C_RTC to control inclusion of RTC driver for Samsung SoCs. This option will help to include the driver only for the necessary machines and not for any given arch. Signed-off-by: Atul Dahiya Signed-off-by: Kukjin Kim Cc: Ben Dooks --- drivers/rtc/Kconfig | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index 10ba12c8c5e..c43732ff180 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -645,9 +645,16 @@ config RTC_DRV_OMAP DA8xx/OMAP-L13x chips. This driver can also be built as a module called rtc-omap. +config HAVE_S3C_RTC + bool + help + This will include RTC support for Samsung SoCs. If + you want to include RTC support for any machine, kindly + select this in the respective mach-XXXX/Kconfig file. + config RTC_DRV_S3C tristate "Samsung S3C series SoC RTC" - depends on ARCH_S3C2410 || ARCH_S3C64XX + depends on ARCH_S3C2410 || ARCH_S3C64XX || HAVE_S3C_RTC help RTC (Realtime Clock) driver for the clock inbuilt into the Samsung S3C24XX series of SoCs. This can provide periodic -- cgit v1.2.3-70-g09d2 From 4b623926ba8e29393077fc3e01d1141a3ee2e2e9 Mon Sep 17 00:00:00 2001 From: Naveen Krishna Ch Date: Thu, 29 Jul 2010 18:49:34 +0900 Subject: ARM: SAMSUNG: i2c/busses: Add HAVE_S3C2410_I2C option to include I2C for Samsung SoCs This patch adds HAVE_S3C2410_I2C to control inclusion of I2C bus driver on Samsung SoCs and makes I2C bus driver dependency SoC specific instead of machine specific. This will enalbe all machines using Samsung ARCH_S3C2410, _S3C64XX, _S5P6440, _S5PC100, and _S5PV210 to select the I2C driver by default Signed-off-by: Naveen Krishna Ch Signed-off-by: Kukjin Kim Cc: Ben Dooks --- arch/arm/Kconfig | 5 +++++ drivers/i2c/busses/Kconfig | 11 +++++++++-- 2 files changed, 14 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ea668a41b99..bc9506cdf4d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -634,6 +634,7 @@ config ARCH_S3C2410 select ARCH_HAS_CPUFREQ select HAVE_CLK select ARCH_USES_GETTIMEOFFSET + select HAVE_S3C2410_I2C help Samsung S3C2410X CPU based systems, such as the Simtec Electronics BAST (), the IPAQ 1940 or @@ -663,6 +664,7 @@ config ARCH_S3C64XX select S3C_DEV_NAND select USB_ARCH_HAS_OHCI select SAMSUNG_GPIOLIB_4BIT + select HAVE_S3C2410_I2C help Samsung S3C64XX series based systems @@ -672,6 +674,7 @@ config ARCH_S5P6440 select GENERIC_GPIO select HAVE_CLK select ARCH_USES_GETTIMEOFFSET + select HAVE_S3C2410_I2C select HAVE_S3C_RTC help Samsung S5P6440 CPU based systems @@ -692,6 +695,7 @@ config ARCH_S5PC100 select CPU_V7 select ARM_L1_CACHE_SHIFT_6 select ARCH_USES_GETTIMEOFFSET + select HAVE_S3C2410_I2C select HAVE_S3C_RTC help Samsung S5PC100 series based systems @@ -703,6 +707,7 @@ config ARCH_S5PV210 select HAVE_CLK select ARM_L1_CACHE_SHIFT_6 select ARCH_USES_GETTIMEOFFSET + select HAVE_S3C2410_I2C select HAVE_S3C_RTC help Samsung S5PV210/S5PC110 series based systems diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index bceafbfa726..80143899cce 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -521,12 +521,19 @@ config I2C_PXA_SLAVE is necessary for systems where the PXA may be a target on the I2C bus. +config HAVE_S3C2410_I2C + bool + help + This will include I2C support for Samsung SoCs. If you want to + include I2C support for any machine, kindly select this in the + respective Kconfig file. + config I2C_S3C2410 tristate "S3C2410 I2C Driver" - depends on ARCH_S3C2410 || ARCH_S3C64XX + depends on HAVE_S3C2410_I2C help Say Y here to include support for I2C controller in the - Samsung S3C2410 based System-on-Chip devices. + Samsung SoCs. config I2C_S6000 tristate "S6000 I2C support" -- cgit v1.2.3-70-g09d2