From 38ce73ebd74a9a1738b73619557f2397c59ba628 Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Mon, 18 Sep 2006 23:21:38 +0100 Subject: [ARM] 3825/1: iop3xx: use cp6 enable/disable macros Add CP6 enable/disable sequences to the timekeeping code and the IRQ code. As a result, we can't depend on CP6 access being enabled when we enter get_irqnr_and_base anymore, so switch the latter over to using memory-mapped accesses for now. Signed-off-by: Lennert Buytenhek Signed-off-by: Russell King --- include/asm-arm/arch-iop33x/entry-macro.S | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'include/asm-arm/arch-iop33x/entry-macro.S') diff --git a/include/asm-arm/arch-iop33x/entry-macro.S b/include/asm-arm/arch-iop33x/entry-macro.S index 980ec9b1ac8..57f6ea0069e 100644 --- a/include/asm-arm/arch-iop33x/entry-macro.S +++ b/include/asm-arm/arch-iop33x/entry-macro.S @@ -17,10 +17,11 @@ */ .macro get_irqnr_and_base, irqnr, irqstat, base, tmp mov \irqnr, #0 - mrc p6, 0, \irqstat, c4, c0, 0 @ Read IINTSRC0 + ldr \base, =IOP3XX_REG_ADDR(0x7A0) + ldr \irqstat, [\base] @ Read IINTSRC0 cmp \irqstat, #0 bne 1002f - mrc p6, 0, \irqstat, c5, c0, 0 @ Read IINTSRC1 + ldr \irqstat, [\base, #4] @ Read IINTSRC1 cmp \irqstat, #0 beq 1001f clz \irqnr, \irqstat -- cgit v1.2.3-70-g09d2