From 62c4f0a2d5a188f73a94f2cb8ea0dba3e7cf0a7f Mon Sep 17 00:00:00 2001 From: David Woodhouse Date: Wed, 26 Apr 2006 12:56:16 +0100 Subject: Don't include linux/config.h from anywhere else in include/ Signed-off-by: David Woodhouse --- include/asm-arm/apm.h | 1 - include/asm-arm/arch-aaec2000/memory.h | 1 - include/asm-arm/arch-cl7500/acornfb.h | 1 - include/asm-arm/arch-clps711x/hardware.h | 1 - include/asm-arm/arch-clps711x/memory.h | 1 - include/asm-arm/arch-clps711x/uncompress.h | 1 - include/asm-arm/arch-ebsa285/hardware.h | 1 - include/asm-arm/arch-ebsa285/memory.h | 1 - include/asm-arm/arch-ebsa285/vmalloc.h | 1 - include/asm-arm/arch-integrator/smp.h | 1 - include/asm-arm/arch-iop3xx/memory.h | 1 - include/asm-arm/arch-iop3xx/timex.h | 1 - include/asm-arm/arch-iop3xx/uncompress.h | 1 - include/asm-arm/arch-ixp4xx/dma.h | 1 - include/asm-arm/arch-lh7a40x/constants.h | 1 - include/asm-arm/arch-lh7a40x/irqs.h | 1 - include/asm-arm/arch-lh7a40x/registers.h | 1 - include/asm-arm/arch-omap/board.h | 1 - include/asm-arm/arch-omap/hardware.h | 1 - include/asm-arm/arch-omap/system.h | 1 - include/asm-arm/arch-omap/uncompress.h | 1 - include/asm-arm/arch-pxa/idp.h | 1 - include/asm-arm/arch-pxa/irqs.h | 1 - include/asm-arm/arch-pxa/pxa-regs.h | 1 - include/asm-arm/arch-pxa/timex.h | 1 - include/asm-arm/arch-realview/smp.h | 1 - include/asm-arm/arch-s3c2410/dma.h | 1 - include/asm-arm/arch-s3c2410/uncompress.h | 1 - include/asm-arm/arch-sa1100/assabet.h | 1 - include/asm-arm/arch-sa1100/cerf.h | 1 - include/asm-arm/arch-sa1100/collie.h | 1 - include/asm-arm/arch-sa1100/dma.h | 1 - include/asm-arm/arch-sa1100/hardware.h | 1 - include/asm-arm/arch-sa1100/ide.h | 1 - include/asm-arm/arch-sa1100/irqs.h | 1 - include/asm-arm/arch-sa1100/memory.h | 1 - include/asm-arm/arch-sa1100/system.h | 1 - include/asm-arm/atomic.h | 1 - include/asm-arm/bug.h | 1 - include/asm-arm/cacheflush.h | 1 - include/asm-arm/cpu.h | 1 - include/asm-arm/dma-mapping.h | 1 - include/asm-arm/dma.h | 1 - include/asm-arm/elf.h | 1 - include/asm-arm/fpstate.h | 1 - include/asm-arm/glue.h | 1 - include/asm-arm/hardirq.h | 1 - include/asm-arm/hardware/dec21285.h | 1 - include/asm-arm/hardware/iomd.h | 1 - include/asm-arm/leds.h | 1 - include/asm-arm/mach/serial_at91rm9200.h | 1 - include/asm-arm/mach/serial_sa1100.h | 1 - include/asm-arm/memory.h | 1 - include/asm-arm/page.h | 1 - include/asm-arm/pci.h | 1 - include/asm-arm/proc-fns.h | 1 - include/asm-arm/ptrace.h | 1 - include/asm-arm/smp.h | 1 - include/asm-arm/system.h | 1 - include/asm-arm/tlbflush.h | 1 - 60 files changed, 60 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/apm.h b/include/asm-arm/apm.h index 3a50eb759c2..d09113b37e4 100644 --- a/include/asm-arm/apm.h +++ b/include/asm-arm/apm.h @@ -13,7 +13,6 @@ #ifndef ARM_ASM_SA1100_APM_H #define ARM_ASM_SA1100_APM_H -#include #include /* diff --git a/include/asm-arm/arch-aaec2000/memory.h b/include/asm-arm/arch-aaec2000/memory.h index d8209f8911d..24b51cccde8 100644 --- a/include/asm-arm/arch-aaec2000/memory.h +++ b/include/asm-arm/arch-aaec2000/memory.h @@ -11,7 +11,6 @@ #ifndef __ASM_ARCH_MEMORY_H #define __ASM_ARCH_MEMORY_H -#include #define PHYS_OFFSET UL(0xf0000000) diff --git a/include/asm-arm/arch-cl7500/acornfb.h b/include/asm-arm/arch-cl7500/acornfb.h index 3867231a447..aea6330c974 100644 --- a/include/asm-arm/arch-cl7500/acornfb.h +++ b/include/asm-arm/arch-cl7500/acornfb.h @@ -1,4 +1,3 @@ -#include #define acornfb_valid_pixrate(var) (var->pixclock >= 39325 && var->pixclock <= 40119) static inline void diff --git a/include/asm-arm/arch-clps711x/hardware.h b/include/asm-arm/arch-clps711x/hardware.h index 1386871e1a5..0fdbe72fff2 100644 --- a/include/asm-arm/arch-clps711x/hardware.h +++ b/include/asm-arm/arch-clps711x/hardware.h @@ -22,7 +22,6 @@ #ifndef __ASM_ARCH_HARDWARE_H #define __ASM_ARCH_HARDWARE_H -#include #define CLPS7111_VIRT_BASE 0xff000000 #define CLPS7111_BASE CLPS7111_VIRT_BASE diff --git a/include/asm-arm/arch-clps711x/memory.h b/include/asm-arm/arch-clps711x/memory.h index 61d8717406c..c6e8dcf674d 100644 --- a/include/asm-arm/arch-clps711x/memory.h +++ b/include/asm-arm/arch-clps711x/memory.h @@ -20,7 +20,6 @@ #ifndef __ASM_ARCH_MEMORY_H #define __ASM_ARCH_MEMORY_H -#include /* * Physical DRAM offset. diff --git a/include/asm-arm/arch-clps711x/uncompress.h b/include/asm-arm/arch-clps711x/uncompress.h index 07157b7e4b2..03d233ae87c 100644 --- a/include/asm-arm/arch-clps711x/uncompress.h +++ b/include/asm-arm/arch-clps711x/uncompress.h @@ -17,7 +17,6 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include #include #include #include diff --git a/include/asm-arm/arch-ebsa285/hardware.h b/include/asm-arm/arch-ebsa285/hardware.h index ec51fe92483..daad8ee2d19 100644 --- a/include/asm-arm/arch-ebsa285/hardware.h +++ b/include/asm-arm/arch-ebsa285/hardware.h @@ -12,7 +12,6 @@ #ifndef __ASM_ARCH_HARDWARE_H #define __ASM_ARCH_HARDWARE_H -#include #include #ifdef CONFIG_ARCH_FOOTBRIDGE diff --git a/include/asm-arm/arch-ebsa285/memory.h b/include/asm-arm/arch-ebsa285/memory.h index 99181ffc7e2..cbd7ae64bcc 100644 --- a/include/asm-arm/arch-ebsa285/memory.h +++ b/include/asm-arm/arch-ebsa285/memory.h @@ -19,7 +19,6 @@ #ifndef __ASM_ARCH_MEMORY_H #define __ASM_ARCH_MEMORY_H -#include #if defined(CONFIG_FOOTBRIDGE_ADDIN) /* diff --git a/include/asm-arm/arch-ebsa285/vmalloc.h b/include/asm-arm/arch-ebsa285/vmalloc.h index d1ca955ce43..02598200997 100644 --- a/include/asm-arm/arch-ebsa285/vmalloc.h +++ b/include/asm-arm/arch-ebsa285/vmalloc.h @@ -6,7 +6,6 @@ * published by the Free Software Foundation. */ -#include #ifdef CONFIG_ARCH_FOOTBRIDGE #define VMALLOC_END (PAGE_OFFSET + 0x30000000) diff --git a/include/asm-arm/arch-integrator/smp.h b/include/asm-arm/arch-integrator/smp.h index da6981efdc3..ab2c79bb950 100644 --- a/include/asm-arm/arch-integrator/smp.h +++ b/include/asm-arm/arch-integrator/smp.h @@ -1,7 +1,6 @@ #ifndef ASMARM_ARCH_SMP_H #define ASMARM_ARCH_SMP_H -#include #include #include diff --git a/include/asm-arm/arch-iop3xx/memory.h b/include/asm-arm/arch-iop3xx/memory.h index bc62f4b1323..e43ebd98474 100644 --- a/include/asm-arm/arch-iop3xx/memory.h +++ b/include/asm-arm/arch-iop3xx/memory.h @@ -5,7 +5,6 @@ #ifndef __ASM_ARCH_MEMORY_H #define __ASM_ARCH_MEMORY_H -#include #include /* diff --git a/include/asm-arm/arch-iop3xx/timex.h b/include/asm-arm/arch-iop3xx/timex.h index 472badb451c..14ca8d0f7b2 100644 --- a/include/asm-arm/arch-iop3xx/timex.h +++ b/include/asm-arm/arch-iop3xx/timex.h @@ -3,7 +3,6 @@ * * IOP3xx architecture timex specifications */ -#include #include #if defined(CONFIG_ARCH_IQ80321) || defined(CONFIG_ARCH_IQ31244) diff --git a/include/asm-arm/arch-iop3xx/uncompress.h b/include/asm-arm/arch-iop3xx/uncompress.h index c98eb6254b1..fbdd5af644f 100644 --- a/include/asm-arm/arch-iop3xx/uncompress.h +++ b/include/asm-arm/arch-iop3xx/uncompress.h @@ -1,7 +1,6 @@ /* * linux/include/asm-arm/arch-iop3xx/uncompress.h */ -#include #include #include #include diff --git a/include/asm-arm/arch-ixp4xx/dma.h b/include/asm-arm/arch-ixp4xx/dma.h index b1a071ecebc..789f7f53c35 100644 --- a/include/asm-arm/arch-ixp4xx/dma.h +++ b/include/asm-arm/arch-ixp4xx/dma.h @@ -11,7 +11,6 @@ #ifndef __ASM_ARCH_DMA_H #define __ASM_ARCH_DMA_H -#include #include #include #include diff --git a/include/asm-arm/arch-lh7a40x/constants.h b/include/asm-arm/arch-lh7a40x/constants.h index 52c1cb9c39c..267d1145c3f 100644 --- a/include/asm-arm/arch-lh7a40x/constants.h +++ b/include/asm-arm/arch-lh7a40x/constants.h @@ -12,7 +12,6 @@ #ifndef __ASM_ARCH_CONSTANTS_H #define __ASM_ARCH_CONSTANTS_H -#include /* Addressing constants */ diff --git a/include/asm-arm/arch-lh7a40x/irqs.h b/include/asm-arm/arch-lh7a40x/irqs.h index f91f3e59f3a..189908b2b79 100644 --- a/include/asm-arm/arch-lh7a40x/irqs.h +++ b/include/asm-arm/arch-lh7a40x/irqs.h @@ -18,7 +18,6 @@ #ifndef __ASM_ARCH_IRQS_H #define __ASM_ARCH_IRQS_H -#include #define FIQ_START 80 diff --git a/include/asm-arm/arch-lh7a40x/registers.h b/include/asm-arm/arch-lh7a40x/registers.h index 2edb22e3545..3b0d4fcd36f 100644 --- a/include/asm-arm/arch-lh7a40x/registers.h +++ b/include/asm-arm/arch-lh7a40x/registers.h @@ -9,7 +9,6 @@ * */ -#include #include #ifndef __ASM_ARCH_REGISTERS_H diff --git a/include/asm-arm/arch-omap/board.h b/include/asm-arm/arch-omap/board.h index 6d6240a4681..dfdbf06fd64 100644 --- a/include/asm-arm/arch-omap/board.h +++ b/include/asm-arm/arch-omap/board.h @@ -10,7 +10,6 @@ #ifndef _OMAP_BOARD_H #define _OMAP_BOARD_H -#include #include /* Different peripheral ids */ diff --git a/include/asm-arm/arch-omap/hardware.h b/include/asm-arm/arch-omap/hardware.h index 7909b729826..c7d9e857795 100644 --- a/include/asm-arm/arch-omap/hardware.h +++ b/include/asm-arm/arch-omap/hardware.h @@ -37,7 +37,6 @@ #define __ASM_ARCH_OMAP_HARDWARE_H #include -#include #ifndef __ASSEMBLER__ #include #include diff --git a/include/asm-arm/arch-omap/system.h b/include/asm-arm/arch-omap/system.h index 67970d1a202..ac2bfa433f0 100644 --- a/include/asm-arm/arch-omap/system.h +++ b/include/asm-arm/arch-omap/system.h @@ -4,7 +4,6 @@ */ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H -#include #include #include diff --git a/include/asm-arm/arch-omap/uncompress.h b/include/asm-arm/arch-omap/uncompress.h index ca2c8bec82e..aca0adfef1b 100644 --- a/include/asm-arm/arch-omap/uncompress.h +++ b/include/asm-arm/arch-omap/uncompress.h @@ -17,7 +17,6 @@ * kind, whether express or implied. */ -#include #include #include #include diff --git a/include/asm-arm/arch-pxa/idp.h b/include/asm-arm/arch-pxa/idp.h index e7ef497417b..b6952534a4e 100644 --- a/include/asm-arm/arch-pxa/idp.h +++ b/include/asm-arm/arch-pxa/idp.h @@ -15,7 +15,6 @@ * Changes for 2.6 kernel. */ -#include /* * Note: this file must be safe to include in assembly files diff --git a/include/asm-arm/arch-pxa/irqs.h b/include/asm-arm/arch-pxa/irqs.h index 67af238a8f8..f3bc70eee35 100644 --- a/include/asm-arm/arch-pxa/irqs.h +++ b/include/asm-arm/arch-pxa/irqs.h @@ -10,7 +10,6 @@ * published by the Free Software Foundation. */ -#include #ifdef CONFIG_PXA27x #define PXA_IRQ_SKIP 0 diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index c8f53a71c07..6650d4decae 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h @@ -13,7 +13,6 @@ #ifndef __PXA_REGS_H #define __PXA_REGS_H -#include /* * PXA Chip selects diff --git a/include/asm-arm/arch-pxa/timex.h b/include/asm-arm/arch-pxa/timex.h index aa125ec56a3..2473bb51d0a 100644 --- a/include/asm-arm/arch-pxa/timex.h +++ b/include/asm-arm/arch-pxa/timex.h @@ -10,7 +10,6 @@ * published by the Free Software Foundation. */ -#include #if defined(CONFIG_PXA25x) /* PXA250/210 timer base */ diff --git a/include/asm-arm/arch-realview/smp.h b/include/asm-arm/arch-realview/smp.h index fc87783e8e8..515819efd04 100644 --- a/include/asm-arm/arch-realview/smp.h +++ b/include/asm-arm/arch-realview/smp.h @@ -1,7 +1,6 @@ #ifndef ASMARM_ARCH_SMP_H #define ASMARM_ARCH_SMP_H -#include #include diff --git a/include/asm-arm/arch-s3c2410/dma.h b/include/asm-arm/arch-s3c2410/dma.h index b011e14f3bc..72964f9b841 100644 --- a/include/asm-arm/arch-s3c2410/dma.h +++ b/include/asm-arm/arch-s3c2410/dma.h @@ -18,7 +18,6 @@ #ifndef __ASM_ARCH_DMA_H #define __ASM_ARCH_DMA_H __FILE__ -#include #include #include "hardware.h" diff --git a/include/asm-arm/arch-s3c2410/uncompress.h b/include/asm-arm/arch-s3c2410/uncompress.h index a6f6a0e44af..0ecb8103fa7 100644 --- a/include/asm-arm/arch-s3c2410/uncompress.h +++ b/include/asm-arm/arch-s3c2410/uncompress.h @@ -22,7 +22,6 @@ #ifndef __ASM_ARCH_UNCOMPRESS_H #define __ASM_ARCH_UNCOMPRESS_H -#include /* defines for UART registers */ #include "asm/arch/regs-serial.h" diff --git a/include/asm-arm/arch-sa1100/assabet.h b/include/asm-arm/arch-sa1100/assabet.h index 1f59b368c3f..d6a1bb5b494 100644 --- a/include/asm-arm/arch-sa1100/assabet.h +++ b/include/asm-arm/arch-sa1100/assabet.h @@ -12,7 +12,6 @@ #ifndef __ASM_ARCH_ASSABET_H #define __ASM_ARCH_ASSABET_H -#include /* System Configuration Register flags */ diff --git a/include/asm-arm/arch-sa1100/cerf.h b/include/asm-arm/arch-sa1100/cerf.h index 356d5ba8899..9a19c3d07c1 100644 --- a/include/asm-arm/arch-sa1100/cerf.h +++ b/include/asm-arm/arch-sa1100/cerf.h @@ -10,7 +10,6 @@ #ifndef _INCLUDE_CERF_H_ #define _INCLUDE_CERF_H_ -#include #define CERF_ETH_IO 0xf0000000 #define CERF_ETH_IRQ IRQ_GPIO26 diff --git a/include/asm-arm/arch-sa1100/collie.h b/include/asm-arm/arch-sa1100/collie.h index d49e5ff63ca..14a344aa3cc 100644 --- a/include/asm-arm/arch-sa1100/collie.h +++ b/include/asm-arm/arch-sa1100/collie.h @@ -13,7 +13,6 @@ #ifndef __ASM_ARCH_COLLIE_H #define __ASM_ARCH_COLLIE_H -#include #define COLLIE_SCP_CHARGE_ON SCOOP_GPCR_PA11 #define COLLIE_SCP_DIAG_BOOT1 SCOOP_GPCR_PA12 diff --git a/include/asm-arm/arch-sa1100/dma.h b/include/asm-arm/arch-sa1100/dma.h index 02575d72ac6..6b7917a2e77 100644 --- a/include/asm-arm/arch-sa1100/dma.h +++ b/include/asm-arm/arch-sa1100/dma.h @@ -10,7 +10,6 @@ #ifndef __ASM_ARCH_DMA_H #define __ASM_ARCH_DMA_H -#include #include "hardware.h" diff --git a/include/asm-arm/arch-sa1100/hardware.h b/include/asm-arm/arch-sa1100/hardware.h index ee008a5484f..1abd7cfc8bc 100644 --- a/include/asm-arm/arch-sa1100/hardware.h +++ b/include/asm-arm/arch-sa1100/hardware.h @@ -12,7 +12,6 @@ #ifndef __ASM_ARCH_HARDWARE_H #define __ASM_ARCH_HARDWARE_H -#include #define UNCACHEABLE_ADDR 0xfa050000 diff --git a/include/asm-arm/arch-sa1100/ide.h b/include/asm-arm/arch-sa1100/ide.h index 2153538069c..98b10bcf9f1 100644 --- a/include/asm-arm/arch-sa1100/ide.h +++ b/include/asm-arm/arch-sa1100/ide.h @@ -9,7 +9,6 @@ * architectures. */ -#include #include #include #include diff --git a/include/asm-arm/arch-sa1100/irqs.h b/include/asm-arm/arch-sa1100/irqs.h index eabd3be3d70..d7940683efb 100644 --- a/include/asm-arm/arch-sa1100/irqs.h +++ b/include/asm-arm/arch-sa1100/irqs.h @@ -7,7 +7,6 @@ * * 2001/11/14 RMK Cleaned up and standardised a lot of the IRQs. */ -#include #define IRQ_GPIO0 0 #define IRQ_GPIO1 1 diff --git a/include/asm-arm/arch-sa1100/memory.h b/include/asm-arm/arch-sa1100/memory.h index a29fac1387c..1ff172dc8e3 100644 --- a/include/asm-arm/arch-sa1100/memory.h +++ b/include/asm-arm/arch-sa1100/memory.h @@ -7,7 +7,6 @@ #ifndef __ASM_ARCH_MEMORY_H #define __ASM_ARCH_MEMORY_H -#include #include /* diff --git a/include/asm-arm/arch-sa1100/system.h b/include/asm-arm/arch-sa1100/system.h index 0f0612f79b2..aef91e3b63f 100644 --- a/include/asm-arm/arch-sa1100/system.h +++ b/include/asm-arm/arch-sa1100/system.h @@ -3,7 +3,6 @@ * * Copyright (c) 1999 Nicolas Pitre */ -#include #include static inline void arch_idle(void) diff --git a/include/asm-arm/atomic.h b/include/asm-arm/atomic.h index 3d7283d8440..4b0ce3e7de9 100644 --- a/include/asm-arm/atomic.h +++ b/include/asm-arm/atomic.h @@ -11,7 +11,6 @@ #ifndef __ASM_ARM_ATOMIC_H #define __ASM_ARM_ATOMIC_H -#include #include typedef struct { volatile int counter; } atomic_t; diff --git a/include/asm-arm/bug.h b/include/asm-arm/bug.h index 7fb02138f58..0e36fd5d87d 100644 --- a/include/asm-arm/bug.h +++ b/include/asm-arm/bug.h @@ -1,7 +1,6 @@ #ifndef _ASMARM_BUG_H #define _ASMARM_BUG_H -#include #ifdef CONFIG_BUG #ifdef CONFIG_DEBUG_BUGVERBOSE diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h index 746be56b1b7..fe0c744e026 100644 --- a/include/asm-arm/cacheflush.h +++ b/include/asm-arm/cacheflush.h @@ -10,7 +10,6 @@ #ifndef _ASMARM_CACHEFLUSH_H #define _ASMARM_CACHEFLUSH_H -#include #include #include diff --git a/include/asm-arm/cpu.h b/include/asm-arm/cpu.h index 751bc746207..715426b9b08 100644 --- a/include/asm-arm/cpu.h +++ b/include/asm-arm/cpu.h @@ -10,7 +10,6 @@ #ifndef __ASM_ARM_CPU_H #define __ASM_ARM_CPU_H -#include #include struct cpuinfo_arm { diff --git a/include/asm-arm/dma-mapping.h b/include/asm-arm/dma-mapping.h index 63ca7412a46..55eb4dc3253 100644 --- a/include/asm-arm/dma-mapping.h +++ b/include/asm-arm/dma-mapping.h @@ -3,7 +3,6 @@ #ifdef __KERNEL__ -#include #include /* need struct page */ #include diff --git a/include/asm-arm/dma.h b/include/asm-arm/dma.h index 49c01e2bf7c..9f2c5305c26 100644 --- a/include/asm-arm/dma.h +++ b/include/asm-arm/dma.h @@ -3,7 +3,6 @@ typedef unsigned int dmach_t; -#include #include #include #include diff --git a/include/asm-arm/elf.h b/include/asm-arm/elf.h index 2d44b42d184..71061ca5c5d 100644 --- a/include/asm-arm/elf.h +++ b/include/asm-arm/elf.h @@ -1,7 +1,6 @@ #ifndef __ASMARM_ELF_H #define __ASMARM_ELF_H -#include /* * ELF register definitions.. diff --git a/include/asm-arm/fpstate.h b/include/asm-arm/fpstate.h index 52bae088a18..132c3c5628b 100644 --- a/include/asm-arm/fpstate.h +++ b/include/asm-arm/fpstate.h @@ -11,7 +11,6 @@ #ifndef __ASM_ARM_FPSTATE_H #define __ASM_ARM_FPSTATE_H -#include #ifndef __ASSEMBLY__ diff --git a/include/asm-arm/glue.h b/include/asm-arm/glue.h index 223e0d6c41b..0cc5d3b10ce 100644 --- a/include/asm-arm/glue.h +++ b/include/asm-arm/glue.h @@ -15,7 +15,6 @@ */ #ifdef __KERNEL__ -#include #ifdef __STDC__ #define ____glue(name,fn) name##fn diff --git a/include/asm-arm/hardirq.h b/include/asm-arm/hardirq.h index 1cbb173bf5b..182310b9919 100644 --- a/include/asm-arm/hardirq.h +++ b/include/asm-arm/hardirq.h @@ -1,7 +1,6 @@ #ifndef __ASM_HARDIRQ_H #define __ASM_HARDIRQ_H -#include #include #include #include diff --git a/include/asm-arm/hardware/dec21285.h b/include/asm-arm/hardware/dec21285.h index 6685e3fb97b..546f7077be9 100644 --- a/include/asm-arm/hardware/dec21285.h +++ b/include/asm-arm/hardware/dec21285.h @@ -18,7 +18,6 @@ #define DC21285_PCI_IO 0x7c000000 #define DC21285_PCI_MEM 0x80000000 -#include #ifndef __ASSEMBLY__ #include #define DC21285_IO(x) ((volatile unsigned long *)(ARMCSR_BASE+(x))) diff --git a/include/asm-arm/hardware/iomd.h b/include/asm-arm/hardware/iomd.h index 82fa2c279a1..396e55ad06c 100644 --- a/include/asm-arm/hardware/iomd.h +++ b/include/asm-arm/hardware/iomd.h @@ -13,7 +13,6 @@ #ifndef __ASMARM_HARDWARE_IOMD_H #define __ASMARM_HARDWARE_IOMD_H -#include #ifndef __ASSEMBLY__ diff --git a/include/asm-arm/leds.h b/include/asm-arm/leds.h index 88ce4124f85..12290ea5580 100644 --- a/include/asm-arm/leds.h +++ b/include/asm-arm/leds.h @@ -13,7 +13,6 @@ #ifndef ASM_ARM_LEDS_H #define ASM_ARM_LEDS_H -#include typedef enum { led_idle_start, diff --git a/include/asm-arm/mach/serial_at91rm9200.h b/include/asm-arm/mach/serial_at91rm9200.h index 98f4b0cb883..a0269de1207 100644 --- a/include/asm-arm/mach/serial_at91rm9200.h +++ b/include/asm-arm/mach/serial_at91rm9200.h @@ -7,7 +7,6 @@ * * Low level machine dependent UART functions. */ -#include struct uart_port; diff --git a/include/asm-arm/mach/serial_sa1100.h b/include/asm-arm/mach/serial_sa1100.h index 9162018585d..20c22bb218d 100644 --- a/include/asm-arm/mach/serial_sa1100.h +++ b/include/asm-arm/mach/serial_sa1100.h @@ -7,7 +7,6 @@ * * Low level machine dependent UART functions. */ -#include struct uart_port; struct uart_info; diff --git a/include/asm-arm/memory.h b/include/asm-arm/memory.h index 20928940759..731e321a57d 100644 --- a/include/asm-arm/memory.h +++ b/include/asm-arm/memory.h @@ -22,7 +22,6 @@ #define UL(x) (x) #endif -#include #include #include #include diff --git a/include/asm-arm/page.h b/include/asm-arm/page.h index a404d2bf0c6..66cfeb5290e 100644 --- a/include/asm-arm/page.h +++ b/include/asm-arm/page.h @@ -10,7 +10,6 @@ #ifndef _ASMARM_PAGE_H #define _ASMARM_PAGE_H -#include /* PAGE_SHIFT determines the page size */ #define PAGE_SHIFT 12 diff --git a/include/asm-arm/pci.h b/include/asm-arm/pci.h index ead3ced38cb..f21abd4ddac 100644 --- a/include/asm-arm/pci.h +++ b/include/asm-arm/pci.h @@ -2,7 +2,6 @@ #define ASMARM_PCI_H #ifdef __KERNEL__ -#include #include #include /* for PCIBIOS_MIN_* */ diff --git a/include/asm-arm/proc-fns.h b/include/asm-arm/proc-fns.h index 106045edb86..e9310895e79 100644 --- a/include/asm-arm/proc-fns.h +++ b/include/asm-arm/proc-fns.h @@ -13,7 +13,6 @@ #ifdef __KERNEL__ -#include /* * Work out if we need multiple CPU support diff --git a/include/asm-arm/ptrace.h b/include/asm-arm/ptrace.h index 77adb7fa169..2bebe3dc0a3 100644 --- a/include/asm-arm/ptrace.h +++ b/include/asm-arm/ptrace.h @@ -10,7 +10,6 @@ #ifndef __ASM_ARM_PTRACE_H #define __ASM_ARM_PTRACE_H -#include #define PTRACE_GETREGS 12 #define PTRACE_SETREGS 13 diff --git a/include/asm-arm/smp.h b/include/asm-arm/smp.h index fe45f7f6122..f67acce387e 100644 --- a/include/asm-arm/smp.h +++ b/include/asm-arm/smp.h @@ -10,7 +10,6 @@ #ifndef __ASM_ARM_SMP_H #define __ASM_ARM_SMP_H -#include #include #include #include diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h index 95b3abf4851..f5eafd7ed8f 100644 --- a/include/asm-arm/system.h +++ b/include/asm-arm/system.h @@ -3,7 +3,6 @@ #ifdef __KERNEL__ -#include #define CPU_ARCH_UNKNOWN 0 #define CPU_ARCH_ARMv3 1 diff --git a/include/asm-arm/tlbflush.h b/include/asm-arm/tlbflush.h index 728992451dd..d97fc76189a 100644 --- a/include/asm-arm/tlbflush.h +++ b/include/asm-arm/tlbflush.h @@ -10,7 +10,6 @@ #ifndef _ASMARM_TLBFLUSH_H #define _ASMARM_TLBFLUSH_H -#include #ifndef CONFIG_MMU -- cgit v1.2.3-70-g09d2 From 56142536868a2be34f261ed8fdca1610f8a73fbd Mon Sep 17 00:00:00 2001 From: David Woodhouse Date: Sat, 29 Apr 2006 01:51:47 +0100 Subject: Remove unneeded _syscallX macros from user view in asm-*/unistd.h These aren't needed by glibc or klibc, and they're broken in some cases anyway. The uClibc folks are apparently switching over to stop using them too (now that we agreed that they should be dropped, at least). Signed-off-by: David Woodhouse --- include/asm-alpha/unistd.h | 7 ++++--- include/asm-arm/unistd.h | 10 +++++----- include/asm-arm26/unistd.h | 10 +++++----- include/asm-cris/unistd.h | 9 ++++----- include/asm-frv/unistd.h | 7 ++++--- include/asm-h8300/unistd.h | 7 ++++--- include/asm-i386/unistd.h | 7 ++++--- include/asm-m32r/unistd.h | 5 +++-- include/asm-m68k/unistd.h | 7 ++++--- include/asm-m68knommu/unistd.h | 7 ++++--- include/asm-mips/unistd.h | 6 +++--- include/asm-parisc/unistd.h | 4 ++-- include/asm-powerpc/unistd.h | 7 +++---- include/asm-s390/unistd.h | 7 ++++--- include/asm-sh/unistd.h | 7 ++++--- include/asm-sh64/unistd.h | 7 ++++--- include/asm-sparc/unistd.h | 4 ++-- include/asm-sparc64/unistd.h | 4 ++-- include/asm-v850/unistd.h | 12 ++++-------- include/asm-x86_64/unistd.h | 7 ++++--- include/asm-xtensa/unistd.h | 21 +++------------------ 21 files changed, 76 insertions(+), 86 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-alpha/unistd.h b/include/asm-alpha/unistd.h index ef25b658511..bc6e6a9259d 100644 --- a/include/asm-alpha/unistd.h +++ b/include/asm-alpha/unistd.h @@ -383,6 +383,8 @@ #define __NR_inotify_add_watch 445 #define __NR_inotify_rm_watch 446 +#ifdef __KERNEL__ + #define NR_SYSCALLS 447 #if defined(__GNUC__) @@ -565,9 +567,8 @@ type name (type1 arg1,type2 arg2,type3 arg3,type4 arg4,type5 arg5, type6 arg6)\ _syscall_return(type); \ } -#endif /* __LIBRARY__ && __GNUC__ */ +#endif /* __GNUC__ */ -#ifdef __KERNEL__ #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR #define __ARCH_WANT_STAT64 @@ -578,7 +579,6 @@ type name (type1 arg1,type2 arg2,type3 arg3,type4 arg4,type5 arg5, type6 arg6)\ #define __ARCH_WANT_SYS_OLD_GETRLIMIT #define __ARCH_WANT_SYS_OLDUMOUNT #define __ARCH_WANT_SYS_SIGPENDING -#endif #ifdef __KERNEL_SYSCALLS__ @@ -661,4 +661,5 @@ asmlinkage long sys_rt_sigaction(int sig, #define cond_syscall(x) asm(".weak\t" #x "\n" #x " = sys_ni_syscall") +#endif /* __KERNEL__ */ #endif /* _ALPHA_UNISTD_H */ diff --git a/include/asm-arm/unistd.h b/include/asm-arm/unistd.h index ee8dfea549b..a5896d94e1a 100644 --- a/include/asm-arm/unistd.h +++ b/include/asm-arm/unistd.h @@ -13,8 +13,6 @@ #ifndef __ASM_ARM_UNISTD_H #define __ASM_ARM_UNISTD_H -#include - #define __NR_OABI_SYSCALL_BASE 0x900000 #if defined(__thumb__) || defined(__ARM_EABI__) @@ -378,6 +376,9 @@ #undef __NR_ipc #endif +#ifdef __KERNEL__ +#include + #define __sys2(x) #x #define __sys1(x) __sys2(x) @@ -519,7 +520,6 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6 __syscall_return(type,__res); \ } -#ifdef __KERNEL__ #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_STAT64 #define __ARCH_WANT_SYS_GETHOSTNAME @@ -540,7 +540,6 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6 #define __ARCH_WANT_OLD_READDIR #define __ARCH_WANT_SYS_SOCKETCALL #endif -#endif #ifdef __KERNEL_SYSCALLS__ @@ -564,7 +563,7 @@ asmlinkage long sys_rt_sigaction(int sig, struct sigaction __user *oact, size_t sigsetsize); -#endif +#endif /* __KERNEL_SYSCALLS__ */ /* * "Conditional" syscalls @@ -574,4 +573,5 @@ asmlinkage long sys_rt_sigaction(int sig, */ #define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") +#endif /* __KERNEL__ */ #endif /* __ASM_ARM_UNISTD_H */ diff --git a/include/asm-arm26/unistd.h b/include/asm-arm26/unistd.h index be4c2fb9c04..70eb6d91cfd 100644 --- a/include/asm-arm26/unistd.h +++ b/include/asm-arm26/unistd.h @@ -14,8 +14,6 @@ #ifndef __ASM_ARM_UNISTD_H #define __ASM_ARM_UNISTD_H -#include - #define __NR_SYSCALL_BASE 0x900000 /* @@ -312,6 +310,9 @@ #define __ARM_NR_cacheflush (__ARM_NR_BASE+2) #define __ARM_NR_usr26 (__ARM_NR_BASE+3) +#ifdef __KERNEL__ +#include + #define __sys2(x) #x #define __sys1(x) __sys2(x) @@ -443,7 +444,6 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6 __syscall_return(type,__res); \ } -#ifdef __KERNEL__ #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR #define __ARCH_WANT_STAT64 @@ -462,7 +462,6 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6 #define __ARCH_WANT_SYS_SIGPENDING #define __ARCH_WANT_SYS_SIGPROCMASK #define __ARCH_WANT_SYS_RT_SIGACTION -#endif #ifdef __KERNEL_SYSCALLS__ @@ -486,7 +485,7 @@ asmlinkage long sys_rt_sigaction(int sig, struct sigaction __user *oact, size_t sigsetsize); -#endif +#endif /* __KERNEL_SYSCALLS__ */ /* * "Conditional" syscalls @@ -496,4 +495,5 @@ asmlinkage long sys_rt_sigaction(int sig, */ #define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") +#endif /* __KERNEL__ */ #endif /* __ASM_ARM_UNISTD_H */ diff --git a/include/asm-cris/unistd.h b/include/asm-cris/unistd.h index bb2dfe48021..c2954e90aa2 100644 --- a/include/asm-cris/unistd.h +++ b/include/asm-cris/unistd.h @@ -295,11 +295,11 @@ #define __NR_request_key 287 #define __NR_keyctl 288 -#define NR_syscalls 289 +#ifdef __KERNEL__ +#define NR_syscalls 289 -#ifdef __KERNEL__ #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR #define __ARCH_WANT_OLD_STAT @@ -379,12 +379,10 @@ asmlinkage long sys_rt_sigaction(int sig, * complaints. We don't want to use -fno-builtin, so just use a * different name when in the kernel. */ -#ifdef __KERNEL__ #define _exit kernel_syscall_exit -#endif static inline _syscall1(int,_exit,int,exitcode) static inline _syscall3(pid_t,waitpid,pid_t,pid,int *,wait_stat,int,options) -#endif +#endif /* __KERNEL_SYSCALLS__ */ /* @@ -395,4 +393,5 @@ static inline _syscall3(pid_t,waitpid,pid_t,pid,int *,wait_stat,int,options) */ #define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") +#endif /* __KERNEL__ */ #endif /* _ASM_CRIS_UNISTD_H_ */ diff --git a/include/asm-frv/unistd.h b/include/asm-frv/unistd.h index 2662a3e12dc..7c2e712c3b7 100644 --- a/include/asm-frv/unistd.h +++ b/include/asm-frv/unistd.h @@ -317,6 +317,8 @@ #define __NR_pselect6 308 #define __NR_ppoll 309 +#ifdef __KERNEL__ + #define NR_syscalls 310 /* @@ -477,9 +479,8 @@ static inline pid_t wait(int * wait_stat) return waitpid(-1,wait_stat,0); } -#endif +#endif /* __KERNEL_SYSCALLS__ */ -#ifdef __KERNEL__ #define __ARCH_WANT_IPC_PARSE_VERSION /* #define __ARCH_WANT_OLD_READDIR */ #define __ARCH_WANT_OLD_STAT @@ -503,7 +504,6 @@ static inline pid_t wait(int * wait_stat) #define __ARCH_WANT_SYS_SIGPROCMASK #define __ARCH_WANT_SYS_RT_SIGACTION #define __ARCH_WANT_SYS_RT_SIGSUSPEND -#endif /* * "Conditional" syscalls @@ -515,4 +515,5 @@ static inline pid_t wait(int * wait_stat) #define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") #endif +#endif /* __KERNEL__ */ #endif /* _ASM_UNISTD_H_ */ diff --git a/include/asm-h8300/unistd.h b/include/asm-h8300/unistd.h index adb05159379..226dd596c2d 100644 --- a/include/asm-h8300/unistd.h +++ b/include/asm-h8300/unistd.h @@ -292,6 +292,8 @@ #define __NR_request_key 287 #define __NR_keyctl 288 +#ifdef __KERNEL__ + #define NR_syscalls 289 @@ -460,7 +462,6 @@ type name(atype a, btype b, ctype c, dtype d, etype e, ftype f) \ __syscall_return(type, __res); \ } -#ifdef __KERNEL__ #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR #define __ARCH_WANT_OLD_STAT @@ -483,7 +484,6 @@ type name(atype a, btype b, ctype c, dtype d, etype e, ftype f) \ #define __ARCH_WANT_SYS_SIGPENDING #define __ARCH_WANT_SYS_SIGPROCMASK #define __ARCH_WANT_SYS_RT_SIGACTION -#endif #ifdef __KERNEL_SYSCALLS__ @@ -534,7 +534,7 @@ asmlinkage long sys_rt_sigaction(int sig, struct sigaction __user *oact, size_t sigsetsize); -#endif +#endif /* __KERNEL_SYSCALLS__ */ /* * "Conditional" syscalls @@ -543,4 +543,5 @@ asmlinkage long sys_rt_sigaction(int sig, asm (".weak\t_" #name "\n" \ ".set\t_" #name ",_sys_ni_syscall"); +#endif /* __KERNEL__ */ #endif /* _ASM_H8300_UNISTD_H_ */ diff --git a/include/asm-i386/unistd.h b/include/asm-i386/unistd.h index eb4b152c82f..de2ccc149e3 100644 --- a/include/asm-i386/unistd.h +++ b/include/asm-i386/unistd.h @@ -323,6 +323,8 @@ #define __NR_tee 315 #define __NR_vmsplice 316 +#ifdef __KERNEL__ + #define NR_syscalls 317 /* @@ -422,7 +424,6 @@ __asm__ volatile ("push %%ebp ; push %%ebx ; movl 4(%2),%%ebp ; " \ __syscall_return(type,__res); \ } -#ifdef __KERNEL__ #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR #define __ARCH_WANT_OLD_STAT @@ -446,7 +447,6 @@ __syscall_return(type,__res); \ #define __ARCH_WANT_SYS_SIGPROCMASK #define __ARCH_WANT_SYS_RT_SIGACTION #define __ARCH_WANT_SYS_RT_SIGSUSPEND -#endif #ifdef __KERNEL_SYSCALLS__ @@ -485,7 +485,7 @@ asmlinkage long sys_rt_sigaction(int sig, struct sigaction __user *oact, size_t sigsetsize); -#endif +#endif /* __KERNEL_SYSCALLS__ */ /* * "Conditional" syscalls @@ -497,4 +497,5 @@ asmlinkage long sys_rt_sigaction(int sig, #define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") #endif +#endif /* __KERNEL__ */ #endif /* _ASM_I386_UNISTD_H_ */ diff --git a/include/asm-m32r/unistd.h b/include/asm-m32r/unistd.h index be0eb014c3b..cc31790d807 100644 --- a/include/asm-m32r/unistd.h +++ b/include/asm-m32r/unistd.h @@ -295,6 +295,8 @@ #define __NR_kexec_load 283 #define __NR_waitid 284 +#ifdef __KERNEL__ + #define NR_syscalls 285 /* user-visible error numbers are in the range -1 - -124: see @@ -405,7 +407,6 @@ __asm__ __volatile__ (\ __syscall_return(type,__res); \ } -#ifdef __KERNEL__ #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_STAT64 #define __ARCH_WANT_SYS_ALARM @@ -421,7 +422,6 @@ __syscall_return(type,__res); \ #define __ARCH_WANT_SYS_OLD_GETRLIMIT /*will be unused*/ #define __ARCH_WANT_SYS_OLDUMOUNT #define __ARCH_WANT_SYS_RT_SIGACTION -#endif #ifdef __KERNEL_SYSCALLS__ @@ -470,4 +470,5 @@ asmlinkage long sys_rt_sigaction(int sig, #define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") #endif +#endif /* __KERNEL__ */ #endif /* _ASM_M32R_UNISTD_H */ diff --git a/include/asm-m68k/unistd.h b/include/asm-m68k/unistd.h index c2554bcd174..f236fe92156 100644 --- a/include/asm-m68k/unistd.h +++ b/include/asm-m68k/unistd.h @@ -285,6 +285,8 @@ #define __NR_request_key 280 #define __NR_keyctl 281 +#ifdef __KERNEL__ + #define NR_syscalls 282 /* user-visible error numbers are in the range -1 - -124: see @@ -383,7 +385,6 @@ __asm__ __volatile__ ("trap #0" \ __syscall_return(type,__res); \ } -#ifdef __KERNEL__ #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR #define __ARCH_WANT_OLD_STAT @@ -406,7 +407,6 @@ __syscall_return(type,__res); \ #define __ARCH_WANT_SYS_SIGPENDING #define __ARCH_WANT_SYS_SIGPROCMASK #define __ARCH_WANT_SYS_RT_SIGACTION -#endif #ifdef __KERNEL_SYSCALLS__ @@ -451,7 +451,7 @@ asmlinkage long sys_rt_sigaction(int sig, struct sigaction __user *oact, size_t sigsetsize); -#endif +#endif /* __KERNEL_SYSCALLS__ */ /* * "Conditional" syscalls @@ -461,4 +461,5 @@ asmlinkage long sys_rt_sigaction(int sig, */ #define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") +#endif /* __KERNEL__ */ #endif /* _ASM_M68K_UNISTD_H_ */ diff --git a/include/asm-m68knommu/unistd.h b/include/asm-m68knommu/unistd.h index 5373988a7e5..1b2abdf281e 100644 --- a/include/asm-m68knommu/unistd.h +++ b/include/asm-m68knommu/unistd.h @@ -286,6 +286,8 @@ #define __NR_request_key 280 #define __NR_keyctl 281 +#ifdef __KERNEL__ + #define NR_syscalls 282 /* user-visible error numbers are in the range -1 - -122: see @@ -437,7 +439,6 @@ type name(atype a, btype b, ctype c, dtype d, etype e) \ return (type)__res; \ } -#ifdef __KERNEL__ #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR #define __ARCH_WANT_OLD_STAT @@ -460,7 +461,6 @@ type name(atype a, btype b, ctype c, dtype d, etype e) \ #define __ARCH_WANT_SYS_SIGPENDING #define __ARCH_WANT_SYS_SIGPROCMASK #define __ARCH_WANT_SYS_RT_SIGACTION -#endif #ifdef __KERNEL_SYSCALLS__ @@ -515,7 +515,7 @@ asmlinkage long sys_rt_sigaction(int sig, struct sigaction __user *oact, size_t sigsetsize); -#endif +#endif /* __KERNEL_SYSCALLS__ */ /* * "Conditional" syscalls @@ -525,4 +525,5 @@ asmlinkage long sys_rt_sigaction(int sig, */ #define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") +#endif /* __KERNEL__ */ #endif /* _ASM_M68K_UNISTD_H_ */ diff --git a/include/asm-mips/unistd.h b/include/asm-mips/unistd.h index e71f161a489..8bb0bb9b2e6 100644 --- a/include/asm-mips/unistd.h +++ b/include/asm-mips/unistd.h @@ -905,6 +905,8 @@ #define __NR_N32_Linux 6000 #define __NR_N32_Linux_syscalls 268 +#ifdef __KERNEL__ + #ifndef __ASSEMBLY__ /* XXX - _foo needs to be __foo, while __NR_bar could be _NR_bar. */ @@ -1168,8 +1170,6 @@ type name (atype a,btype b,ctype c,dtype d,etype e,ftype f) \ #endif /* (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) */ -#ifdef __KERNEL__ - #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR @@ -1196,7 +1196,6 @@ type name (atype a,btype b,ctype c,dtype d,etype e,ftype f) \ # ifdef CONFIG_MIPS32_O32 # define __ARCH_WANT_COMPAT_SYS_TIME # endif -#endif #ifdef __KERNEL_SYSCALLS__ @@ -1247,4 +1246,5 @@ asmlinkage long sys_rt_sigaction(int sig, */ #define cond_syscall(x) asm(".weak\t" #x "\n" #x "\t=\tsys_ni_syscall") +#endif /* __KERNEL__ */ #endif /* _ASM_UNISTD_H */ diff --git a/include/asm-parisc/unistd.h b/include/asm-parisc/unistd.h index 0e1a30be2e3..12b867238a4 100644 --- a/include/asm-parisc/unistd.h +++ b/include/asm-parisc/unistd.h @@ -792,6 +792,7 @@ #define HPUX_GATEWAY_ADDR 0xC0000004 #define LINUX_GATEWAY_ADDR 0x100 +#ifdef __KERNEL__ #ifndef __ASSEMBLY__ #define SYS_ify(syscall_name) __NR_##syscall_name @@ -934,7 +935,6 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \ return K_INLINE_SYSCALL(name, 5, arg1, arg2, arg3, arg4, arg5); \ } -#ifdef __KERNEL__ #define __ARCH_WANT_OLD_READDIR #define __ARCH_WANT_STAT64 #define __ARCH_WANT_SYS_ALARM @@ -956,7 +956,6 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \ #define __ARCH_WANT_SYS_SIGPENDING #define __ARCH_WANT_SYS_SIGPROCMASK #define __ARCH_WANT_SYS_RT_SIGACTION -#endif /* mmap & mmap2 take 6 arguments */ #define _syscall6(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5,type6,arg6) \ @@ -1056,4 +1055,5 @@ asmlinkage long sys_rt_sigaction(int sig, */ #define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") +#endif /* __KERNEL__ */ #endif /* _ASM_PARISC_UNISTD_H_ */ diff --git a/include/asm-powerpc/unistd.h b/include/asm-powerpc/unistd.h index ef932f1cddc..bd3c6b6cc50 100644 --- a/include/asm-powerpc/unistd.h +++ b/include/asm-powerpc/unistd.h @@ -305,12 +305,12 @@ #define __NR_tee 284 #define __NR_vmsplice 285 +#ifdef __KERNEL__ + #define __NR_syscalls 286 -#ifdef __KERNEL__ #define __NR__exit __NR_exit #define NR_syscalls __NR_syscalls -#endif #ifndef __ASSEMBLY__ @@ -422,7 +422,6 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6 __syscall_nr(6, type, name, arg1, arg2, arg3, arg4, arg5, arg6); \ } -#ifdef __KERNEL__ #include #include @@ -478,8 +477,8 @@ extern int execve(const char *file, char **argv, char **envp); #define cond_syscall(x) asm(".weak\t." #x "\n\t.set\t." #x ",.sys_ni_syscall") #endif -#endif /* __KERNEL__ */ #endif /* __ASSEMBLY__ */ +#endif /* __KERNEL__ */ #endif /* _ASM_PPC_UNISTD_H_ */ diff --git a/include/asm-s390/unistd.h b/include/asm-s390/unistd.h index ac790bf4455..40efbe84221 100644 --- a/include/asm-s390/unistd.h +++ b/include/asm-s390/unistd.h @@ -386,6 +386,8 @@ #endif +#ifdef __KERNEL__ + /* user-visible error numbers are in the range -1 - -122: see */ #define __syscall_return(type, res) \ @@ -540,7 +542,6 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, \ __syscall_return(type,__res); \ } -#ifdef __KERNEL__ #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR #define __ARCH_WANT_SYS_ALARM @@ -567,7 +568,6 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, \ # define __ARCH_WANT_COMPAT_SYS_TIME # define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND # endif -#endif #ifdef __KERNEL_SYSCALLS__ @@ -618,7 +618,7 @@ asmlinkage long sys_rt_sigaction(int sig, struct sigaction __user *oact, size_t sigsetsize); -#endif +#endif /* __KERNEL_SYSCALLS__ */ /* * "Conditional" syscalls @@ -628,4 +628,5 @@ asmlinkage long sys_rt_sigaction(int sig, */ #define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") +#endif /* __KERNEL__ */ #endif /* _ASM_S390_UNISTD_H_ */ diff --git a/include/asm-sh/unistd.h b/include/asm-sh/unistd.h index 05520cebda1..76b5430cb45 100644 --- a/include/asm-sh/unistd.h +++ b/include/asm-sh/unistd.h @@ -304,6 +304,8 @@ #define NR_syscalls 293 +#ifdef __KERNEL__ + /* user-visible error numbers are in the range -1 - -124: see */ #define __syscall_return(type, res) \ @@ -420,7 +422,6 @@ __asm__ __volatile__ ("trapa #0x16" \ __syscall_return(type,__sc0); \ } -#ifdef __KERNEL__ #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR #define __ARCH_WANT_OLD_STAT @@ -443,7 +444,6 @@ __syscall_return(type,__sc0); \ #define __ARCH_WANT_SYS_SIGPENDING #define __ARCH_WANT_SYS_SIGPROCMASK #define __ARCH_WANT_SYS_RT_SIGACTION -#endif #ifdef __KERNEL_SYSCALLS__ @@ -513,7 +513,7 @@ asmlinkage long sys_rt_sigaction(int sig, struct sigaction __user *oact, size_t sigsetsize); -#endif +#endif /* __KERNEL_SYSCALLS__ */ /* * "Conditional" syscalls @@ -525,4 +525,5 @@ asmlinkage long sys_rt_sigaction(int sig, #define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") #endif +#endif /* __KERNEL__ */ #endif /* __ASM_SH_UNISTD_H */ diff --git a/include/asm-sh64/unistd.h b/include/asm-sh64/unistd.h index 1f8f394ae37..9a1590fffc1 100644 --- a/include/asm-sh64/unistd.h +++ b/include/asm-sh64/unistd.h @@ -344,6 +344,8 @@ #define __NR_inotify_add_watch 319 #define __NR_inotify_rm_watch 320 +#ifdef __KERNEL__ + #define NR_syscalls 321 /* user-visible error numbers are in the range -1 - -125: see */ @@ -486,7 +488,6 @@ __asm__ __volatile__ ("!dummy %0 %1 %2 %3 %4 %5 %6" \ __syscall_return(type,__sc0); \ } -#ifdef __KERNEL__ #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR #define __ARCH_WANT_OLD_STAT @@ -509,7 +510,6 @@ __syscall_return(type,__sc0); \ #define __ARCH_WANT_SYS_SIGPENDING #define __ARCH_WANT_SYS_SIGPROCMASK #define __ARCH_WANT_SYS_RT_SIGACTION -#endif #ifdef __KERNEL_SYSCALLS__ @@ -550,7 +550,7 @@ static inline pid_t wait(int * wait_stat) { return waitpid(-1,wait_stat,0); } -#endif +#endif /* __KERNEL_SYSCALLS__ */ /* * "Conditional" syscalls @@ -562,4 +562,5 @@ static inline pid_t wait(int * wait_stat) #define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") #endif +#endif /* __KERNEL__ */ #endif /* __ASM_SH64_UNISTD_H */ diff --git a/include/asm-sparc/unistd.h b/include/asm-sparc/unistd.h index 32a48f623e2..7bd5a7dd678 100644 --- a/include/asm-sparc/unistd.h +++ b/include/asm-sparc/unistd.h @@ -317,6 +317,7 @@ #define __NR_ppoll 298 #define __NR_unshare 299 +#ifdef __KERNEL__ /* WARNING: You MAY NOT add syscall numbers larger than 299, since * all of the syscall tables in the Sparc kernel are * sized to have 299 entries (starting at zero). Therefore @@ -453,7 +454,6 @@ errno = -__res; \ return -1; \ } -#ifdef __KERNEL__ #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR #define __ARCH_WANT_STAT64 @@ -475,7 +475,6 @@ return -1; \ #define __ARCH_WANT_SYS_SIGPENDING #define __ARCH_WANT_SYS_SIGPROCMASK #define __ARCH_WANT_SYS_RT_SIGSUSPEND -#endif #ifdef __KERNEL_SYSCALLS__ @@ -532,4 +531,5 @@ asmlinkage long sys_rt_sigaction(int sig, */ #define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") +#endif /* __KERNEL__ */ #endif /* _SPARC_UNISTD_H */ diff --git a/include/asm-sparc64/unistd.h b/include/asm-sparc64/unistd.h index ca80e8aca12..18f7b1a2517 100644 --- a/include/asm-sparc64/unistd.h +++ b/include/asm-sparc64/unistd.h @@ -319,6 +319,7 @@ #define __NR_ppoll 298 #define __NR_unshare 299 +#ifdef __KERNEL__ /* WARNING: You MAY NOT add syscall numbers larger than 299, since * all of the syscall tables in the Sparc kernel are * sized to have 299 entries (starting at zero). Therefore @@ -485,7 +486,6 @@ asmlinkage long sys_rt_sigaction(int sig, #endif /* __KERNEL_SYSCALLS__ */ -#ifdef __KERNEL__ /* sysconf options, for SunOS compatibility */ #define _SC_ARG_MAX 1 #define _SC_CHILD_MAX 2 @@ -519,7 +519,6 @@ asmlinkage long sys_rt_sigaction(int sig, #define __ARCH_WANT_SYS_SIGPROCMASK #define __ARCH_WANT_SYS_RT_SIGSUSPEND #define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND -#endif /* * "Conditional" syscalls @@ -529,4 +528,5 @@ asmlinkage long sys_rt_sigaction(int sig, */ #define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") +#endif /* __KERNEL__ */ #endif /* _SPARC64_UNISTD_H */ diff --git a/include/asm-v850/unistd.h b/include/asm-v850/unistd.h index 82460a7bb23..bcb44bfe577 100644 --- a/include/asm-v850/unistd.h +++ b/include/asm-v850/unistd.h @@ -14,8 +14,6 @@ #ifndef __V850_UNISTD_H__ #define __V850_UNISTD_H__ -#include - #define __NR_restart_syscall 0 #define __NR_exit 1 #define __NR_fork 2 @@ -237,10 +235,9 @@ except the syscall number (r12). */ #define SYSCALL_SHORT_CLOBBERS SYSCALL_CLOBBERS, "r13", "r14" +#ifdef __KERNEL__ -/* User programs sometimes end up including this header file - (indirectly, via uClibc header files), so I'm a bit nervous just - including . */ +#include #define __syscall_return(type, res) \ do { \ @@ -368,7 +365,6 @@ type name (atype a, btype b, ctype c, dtype d, etype e, ftype f) \ } -#ifdef __KERNEL__ #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR #define __ARCH_WANT_STAT64 @@ -389,7 +385,6 @@ type name (atype a, btype b, ctype c, dtype d, etype e, ftype f) \ #define __ARCH_WANT_SYS_SIGPENDING #define __ARCH_WANT_SYS_SIGPROCMASK #define __ARCH_WANT_SYS_RT_SIGACTION -#endif #ifdef __KERNEL_SYSCALLS__ @@ -440,7 +435,7 @@ asmlinkage long sys_rt_sigaction(int sig, struct sigaction __user *oact, size_t sigsetsize); -#endif +#endif /* __KERNEL_SYSCALLS__ */ /* * "Conditional" syscalls @@ -455,4 +450,5 @@ asmlinkage long sys_rt_sigaction(int sig, void name (void) __attribute__ ((weak, alias ("sys_ni_syscall"))); #endif +#endif /* __KERNEL__ */ #endif /* __V850_UNISTD_H__ */ diff --git a/include/asm-x86_64/unistd.h b/include/asm-x86_64/unistd.h index feb77cb8c04..0aff22bdbb2 100644 --- a/include/asm-x86_64/unistd.h +++ b/include/asm-x86_64/unistd.h @@ -618,6 +618,8 @@ __SYSCALL(__NR_sync_file_range, sys_sync_file_range) #define __NR_vmsplice 278 __SYSCALL(__NR_vmsplice, sys_vmsplice) +#ifdef __KERNEL__ + #define __NR_syscall_max __NR_vmsplice #ifndef __NO_STUBS @@ -635,7 +637,6 @@ do { \ return (type) (res); \ } while (0) -#ifdef __KERNEL__ #define __ARCH_WANT_OLD_READDIR #define __ARCH_WANT_OLD_STAT #define __ARCH_WANT_SYS_ALARM @@ -657,7 +658,6 @@ do { \ #define __ARCH_WANT_SYS_RT_SIGACTION #define __ARCH_WANT_SYS_TIME #define __ARCH_WANT_COMPAT_SYS_TIME -#endif #ifndef __KERNEL_SYSCALLS__ @@ -821,7 +821,7 @@ asmlinkage long sys_pipe(int *fildes); #endif /* __KERNEL_SYSCALLS__ */ -#if !defined(__ASSEMBLY__) && defined(__KERNEL__) +#ifndef __ASSEMBLY__ #include #include @@ -848,4 +848,5 @@ asmlinkage long sys_rt_sigaction(int sig, */ #define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") +#endif /* __KERNEL__ */ #endif diff --git a/include/asm-xtensa/unistd.h b/include/asm-xtensa/unistd.h index 6b39d6609d9..5e1b99dc4ab 100644 --- a/include/asm-xtensa/unistd.h +++ b/include/asm-xtensa/unistd.h @@ -11,8 +11,6 @@ #ifndef _XTENSA_UNISTD_H #define _XTENSA_UNISTD_H -#include - #define __NR_spill 0 #define __NR_exit 1 #define __NR_read 3 @@ -221,21 +219,9 @@ #define SYSXTENSA_COUNT 5 /* count of syscall0 functions*/ #ifdef __KERNEL__ -#define __syscall_return(type, res) return ((type)(res)) -#else -#define __syscall_return(type, res) \ -do { \ - if ((unsigned long)(res) >= (unsigned long)(-125)) { \ - /* Avoid using "res" which is declared to be in register r2; \ - * errno might expand to a function call and clobber it. */ \ - int __err = -(res); \ - errno = __err; \ - res = -1; \ - } \ - return (type) (res); \ -} while (0) -#endif +#include +#define __syscall_return(type, res) return ((type)(res)) /* Tensilica's xt-xcc compiler is much more agressive at code * optimization than gcc. Multiple __asm__ statements are @@ -429,11 +415,10 @@ static __inline__ _syscall3(int,execve,const char*,file,char**,argv,char**,envp) */ #define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall"); -#ifdef __KERNEL__ #define __ARCH_WANT_STAT64 #define __ARCH_WANT_SYS_UTIME #define __ARCH_WANT_SYS_LLSEEK #define __ARCH_WANT_SYS_RT_SIGACTION -#endif +#endif /* __KERNEL__ */ #endif /* _XTENSA_UNISTD_H */ -- cgit v1.2.3-70-g09d2 From 2295196c30ea686389519f699f0ccbfbc5c3b94c Mon Sep 17 00:00:00 2001 From: Marc Singer Date: Tue, 16 May 2006 11:41:27 +0100 Subject: [ARM] 3400/1: lpd7a40x: platform headers update Patch from Marc Singer Updates to the lpd7a40x platform headers. Includes support for new architecture, lpd7a400. Signed-off-by: Marc Singer Signed-off-by: Russell King --- arch/arm/mach-lh7a40x/common.h | 1 + arch/arm/mach-lh7a40x/lcd-panel.h | 346 ++++++++++++++++++++++++++++++ include/asm-arm/arch-lh7a40x/clocks.h | 20 ++ include/asm-arm/arch-lh7a40x/constants.h | 8 +- include/asm-arm/arch-lh7a40x/dma.h | 79 ++++++- include/asm-arm/arch-lh7a40x/hardware.h | 4 + include/asm-arm/arch-lh7a40x/irqs.h | 7 +- include/asm-arm/arch-lh7a40x/registers.h | 64 ++++-- include/asm-arm/arch-lh7a40x/ssp.h | 71 ++++++ include/asm-arm/arch-lh7a40x/uncompress.h | 2 +- 10 files changed, 581 insertions(+), 21 deletions(-) create mode 100644 arch/arm/mach-lh7a40x/lcd-panel.h create mode 100644 include/asm-arm/arch-lh7a40x/clocks.h create mode 100644 include/asm-arm/arch-lh7a40x/ssp.h (limited to 'include/asm-arm') diff --git a/arch/arm/mach-lh7a40x/common.h b/arch/arm/mach-lh7a40x/common.h index ea8de7e3ab1..18e8bb4eb20 100644 --- a/arch/arm/mach-lh7a40x/common.h +++ b/arch/arm/mach-lh7a40x/common.h @@ -12,6 +12,7 @@ extern struct sys_timer lh7a40x_timer; extern void lh7a400_init_irq (void); extern void lh7a404_init_irq (void); +extern void lh7a40x_clcd_init (void); extern void lh7a40x_init_board_irq (void); #define IRQ_DISPATCH(irq) desc_handle_irq((irq),(irq_desc + irq), regs) diff --git a/arch/arm/mach-lh7a40x/lcd-panel.h b/arch/arm/mach-lh7a40x/lcd-panel.h new file mode 100644 index 00000000000..4fb2efc4950 --- /dev/null +++ b/arch/arm/mach-lh7a40x/lcd-panel.h @@ -0,0 +1,346 @@ +/* lcd-panel.h + $Id$ + + written by Marc Singer + 18 Jul 2005 + + Copyright (C) 2005 Marc Singer + + ----------- + DESCRIPTION + ----------- + + Only one panel may be defined at a time. + + The pixel clock is calculated to be no greater than the target. + + Each timing value is accompanied by a specification comment. + + UNITS/MIN/TYP/MAX + + Most of the units will be in clocks. + + USE_RGB555 + + Define this macro to configure the AMBA LCD controller to use an + RGB555 encoding for the pels instead of the normal RGB565. + + LPD9520, LPD79524, LPD7A400, LPD7A404-10, LPD7A404-11 + + These boards are best approximated by 555 for all panels. Some + can use an extra low-order bit of blue in bit 16 of the color + value, but we don't have a way to communicate this non-linear + mapping to the kernel. + +*/ + +#if !defined (__LCD_PANEL_H__) +# define __LCD_PANEL_H__ + +#if defined (MACH_LPD79520)\ + || defined (MACH_LPD79524)\ + || defined (MACH_LPD7A400)\ + || defined (MACH_LPD7A404) +# define USE_RGB555 +#endif + +struct clcd_panel_extra { + unsigned int hrmode; + unsigned int clsen; + unsigned int spsen; + unsigned int pcdel; + unsigned int revdel; + unsigned int lpdel; + unsigned int spldel; + unsigned int pc2del; +}; + +#define NS_TO_CLOCK(ns,c) ((((ns)*((c)/1000) + (1000000 - 1))/1000000)) +#define CLOCK_TO_DIV(e,c) (((c) + (e) - 1)/(e)) + +#if defined CONFIG_FB_ARMCLCD_SHARP_LQ035Q7DB02_HRTFT + + /* Logic Product Development LCD 3.5" QVGA HRTFT -10 */ + /* Sharp PN LQ035Q7DB02 w/HRTFT controller chip */ + +#define PIX_CLOCK_TARGET (6800000) +#define PIX_CLOCK_DIVIDER CLOCK_TO_DIV (PIX_CLOCK_TARGET, HCLK) +#define PIX_CLOCK (HCLK/PIX_CLOCK_DIVIDER) + +static struct clcd_panel lcd_panel = { + .mode = { + .name = "3.5in QVGA (LQ035Q7DB02)", + .xres = 240, + .yres = 320, + .pixclock = PIX_CLOCK, + .left_margin = 16, + .right_margin = 21, + .upper_margin = 8, // line/8/8/8 + .lower_margin = 5, + .hsync_len = 61, + .vsync_len = NS_TO_CLOCK (60, PIX_CLOCK), + .vmode = FB_VMODE_NONINTERLACED, + }, + .width = -1, + .height = -1, + .tim2 = TIM2_IPC | (PIX_CLOCK_DIVIDER - 2), + .cntl = CNTL_LCDTFT | CNTL_WATERMARK, + .bpp = 16, +}; + +#define HAS_LCD_PANEL_EXTRA + +static struct clcd_panel_extra lcd_panel_extra = { + .hrmode = 1, + .clsen = 1, + .spsen = 1, + .pcdel = 8, + .revdel = 7, + .lpdel = 13, + .spldel = 77, + .pc2del = 208, +}; + +#endif + +#if defined CONFIG_FB_ARMCLCD_SHARP_LQ057Q3DC02 + + /* Logic Product Development LCD 5.7" QVGA -10 */ + /* Sharp PN LQ057Q3DC02 */ + /* QVGA mode, V/Q=LOW */ + +/* From Sharp on 2006.1.3. I believe some of the values are incorrect + * based on the datasheet. + + Timing0 TIMING1 TIMING2 CONTROL + 0x140A0C4C 0x080504EF 0x013F380D 0x00000829 + HBP= 20 VBP= 8 BCD= 0 + HFP= 10 VFP= 5 CPL=319 + HSW= 12 VSW= 1 IOE= 0 + PPL= 19 LPP=239 IPC= 1 + IHS= 1 + IVS= 1 + ACB= 0 + CSEL= 0 + PCD= 13 + + */ + +/* The full horozontal cycle (Th) is clock/360/400/450. */ +/* The full vertical cycle (Tv) is line/251/262/280. */ + +#define PIX_CLOCK_TARGET (6300000) /* -/6.3/7 MHz */ +#define PIX_CLOCK_DIVIDER CLOCK_TO_DIV (PIX_CLOCK_TARGET, HCLK) +#define PIX_CLOCK (HCLK/PIX_CLOCK_DIVIDER) + +static struct clcd_panel lcd_panel = { + .mode = { + .name = "5.7in QVGA (LQ057Q3DC02)", + .xres = 320, + .yres = 240, + .pixclock = PIX_CLOCK, + .left_margin = 11, + .right_margin = 400-11-320-2, + .upper_margin = 7, // line/7/7/7 + .lower_margin = 262-7-240-2, + .hsync_len = 2, // clk/2/96/200 + .vsync_len = 2, // line/2/-/34 + .vmode = FB_VMODE_NONINTERLACED, + }, + .width = -1, + .height = -1, + .tim2 = TIM2_IHS | TIM2_IVS + | (PIX_CLOCK_DIVIDER - 2), + .cntl = CNTL_LCDTFT | CNTL_WATERMARK, + .bpp = 16, +}; + +#endif + +#if defined CONFIG_FB_ARMCLCD_SHARP_LQ64D343 + + /* Logic Product Development LCD 6.4" VGA -10 */ + /* Sharp PN LQ64D343 */ + +/* The full horozontal cycle (Th) is clock/750/800/900. */ +/* The full vertical cycle (Tv) is line/515/525/560. */ + +#define PIX_CLOCK_TARGET (28330000) +#define PIX_CLOCK_DIVIDER CLOCK_TO_DIV (PIX_CLOCK_TARGET, HCLK) +#define PIX_CLOCK (HCLK/PIX_CLOCK_DIVIDER) + +static struct clcd_panel lcd_panel = { + .mode = { + .name = "6.4in QVGA (LQ64D343)", + .xres = 640, + .yres = 480, + .pixclock = PIX_CLOCK, + .left_margin = 32, + .right_margin = 800-32-640-96, + .upper_margin = 32, // line/34/34/34 + .lower_margin = 540-32-480-2, + .hsync_len = 96, // clk/2/96/200 + .vsync_len = 2, // line/2/-/34 + .vmode = FB_VMODE_NONINTERLACED, + }, + .width = -1, + .height = -1, + .tim2 = TIM2_IHS | TIM2_IVS + | (PIX_CLOCK_DIVIDER - 2), + .cntl = CNTL_LCDTFT | CNTL_WATERMARK, + .bpp = 16, +}; + +#endif + +#if defined CONFIG_FB_ARMCLCD_SHARP_LQ10D368 + + /* Logic Product Development LCD 10.4" VGA -10 */ + /* Sharp PN LQ10D368 */ + +#define PIX_CLOCK_TARGET (28330000) +#define PIX_CLOCK_DIVIDER CLOCK_TO_DIV (PIX_CLOCK_TARGET, HCLK) +#define PIX_CLOCK (HCLK/PIX_CLOCK_DIVIDER) + +static struct clcd_panel lcd_panel = { + .mode = { + .name = "10.4in VGA (LQ10D368)", + .xres = 640, + .yres = 480, + .pixclock = PIX_CLOCK, + .left_margin = 21, + .right_margin = 15, + .upper_margin = 34, + .lower_margin = 5, + .hsync_len = 96, + .vsync_len = 16, + .vmode = FB_VMODE_NONINTERLACED, + }, + .width = -1, + .height = -1, + .tim2 = TIM2_IHS | TIM2_IVS + | (PIX_CLOCK_DIVIDER - 2), + .cntl = CNTL_LCDTFT | CNTL_WATERMARK, + .bpp = 16, +}; + +#endif + +#if defined CONFIG_FB_ARMCLCD_SHARP_LQ121S1DG41 + + /* Logic Product Development LCD 12.1" SVGA -10 */ + /* Sharp PN LQ121S1DG41, was LQ121S1DG31 */ + +/* Note that with a 99993900 Hz HCLK, it is not possible to hit the + * target clock frequency range of 35MHz to 42MHz. */ + +/* If the target pixel clock is substantially lower than the panel + * spec, this is done to prevent the LCD display from glitching when + * the CPU is under load. A pixel clock higher than 25MHz + * (empirically determined) will compete with the CPU for bus cycles + * for the Ethernet chip. However, even a pixel clock of 10MHz + * competes with Compact Flash interface during some operations + * (fdisk, e2fsck). And, at that speed the display may have a visible + * flicker. */ + +/* The full horozontal cycle (Th) is clock/832/1056/1395. */ + +#define PIX_CLOCK_TARGET (20000000) +#define PIX_CLOCK_DIVIDER CLOCK_TO_DIV (PIX_CLOCK_TARGET, HCLK) +#define PIX_CLOCK (HCLK/PIX_CLOCK_DIVIDER) + +static struct clcd_panel lcd_panel = { + .mode = { + .name = "12.1in SVGA (LQ121S1DG41)", + .xres = 800, + .yres = 600, + .pixclock = PIX_CLOCK, + .left_margin = 89, // ns/5/-/(1/PIX_CLOCK)-10 + .right_margin = 1056-800-89-128, + .upper_margin = 23, // line/23/23/23 + .lower_margin = 44, + .hsync_len = 128, // clk/2/128/200 + .vsync_len = 4, // line/2/4/6 + .vmode = FB_VMODE_NONINTERLACED, + }, + .width = -1, + .height = -1, + .tim2 = TIM2_IHS | TIM2_IVS + | (PIX_CLOCK_DIVIDER - 2), + .cntl = CNTL_LCDTFT | CNTL_WATERMARK, + .bpp = 16, +}; + +#endif + +#if defined CONFIG_FB_ARMCLCD_HITACHI + + /* Hitachi*/ + /* Submitted by Michele Da Rold */ + +#define PIX_CLOCK_TARGET (49000000) +#define PIX_CLOCK_DIVIDER CLOCK_TO_DIV (PIX_CLOCK_TARGET, HCLK) +#define PIX_CLOCK (HCLK/PIX_CLOCK_DIVIDER) + +static struct clcd_panel lcd_panel = { + .mode = { + .name = "Hitachi 800x480", + .xres = 800, + .yres = 480, + .pixclock = PIX_CLOCK, + .left_margin = 88, + .right_margin = 40, + .upper_margin = 32, + .lower_margin = 11, + .hsync_len = 128, + .vsync_len = 2, + .vmode = FB_VMODE_NONINTERLACED, + }, + .width = -1, + .height = -1, + .tim2 = TIM2_IPC | TIM2_IHS | TIM2_IVS + | (PIX_CLOCK_DIVIDER - 2), + .cntl = CNTL_LCDTFT | CNTL_WATERMARK, + .bpp = 16, +}; + +#endif + + +#if defined CONFIG_FB_ARMCLCD_AUO_A070VW01_WIDE + + /* AU Optotronics A070VW01 7.0 Wide Screen color Display*/ + /* Submitted by Michele Da Rold */ + +#define PIX_CLOCK_TARGET (10000000) +#define PIX_CLOCK_DIVIDER CLOCK_TO_DIV (PIX_CLOCK_TARGET, HCLK) +#define PIX_CLOCK (HCLK/PIX_CLOCK_DIVIDER) + +static struct clcd_panel lcd_panel = { + .mode = { + .name = "7.0in Wide (A070VW01)", + .xres = 480, + .yres = 234, + .pixclock = PIX_CLOCK, + .left_margin = 30, + .right_margin = 25, + .upper_margin = 14, + .lower_margin = 12, + .hsync_len = 100, + .vsync_len = 1, + .vmode = FB_VMODE_NONINTERLACED, + }, + .width = -1, + .height = -1, + .tim2 = TIM2_IPC | TIM2_IHS | TIM2_IVS + | (PIX_CLOCK_DIVIDER - 2), + .cntl = CNTL_LCDTFT | CNTL_WATERMARK, + .bpp = 16, +}; + +#endif + +#undef NS_TO_CLOCK +#undef CLOCK_TO_DIV + +#endif /* __LCD_PANEL_H__ */ diff --git a/include/asm-arm/arch-lh7a40x/clocks.h b/include/asm-arm/arch-lh7a40x/clocks.h new file mode 100644 index 00000000000..bee02fd8dab --- /dev/null +++ b/include/asm-arm/arch-lh7a40x/clocks.h @@ -0,0 +1,20 @@ +/* include/asm-arm/arch-lh7a40x/clocks.h + * + * Copyright (C) 2004 Marc Singer + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + */ + +#include + +#ifndef __ASM_ARCH_CLOCKS_H +#define __ASM_ARCH_CLOCKS_H + +unsigned int fclkfreq_get (void); +unsigned int hclkfreq_get (void); +unsigned int pclkfreq_get (void); + +#endif /* _ASM_ARCH_CLOCKS_H */ diff --git a/include/asm-arm/arch-lh7a40x/constants.h b/include/asm-arm/arch-lh7a40x/constants.h index 52c1cb9c39c..2929e891ee0 100644 --- a/include/asm-arm/arch-lh7a40x/constants.h +++ b/include/asm-arm/arch-lh7a40x/constants.h @@ -29,8 +29,7 @@ #if defined (CONFIG_MACH_LPD7A400) || defined (CONFIG_MACH_LPD7A404) -# define IOBARRIER_PHYS 0xc0000000 /* Start of SDRAM */ -/*# define IOBARRIER_PHYS 0x00000000 */ /* Start of flash */ +# define IOBARRIER_PHYS 0x10000000 /* Second bank, fastest timing */ # define IOBARRIER_VIRT 0xf0000000 # define IOBARRIER_SIZE PAGE_SIZE @@ -53,6 +52,9 @@ # define CPLD08_PHYS CPLDX_PHYS (0x08) # define CPLD08_VIRT CPLDX_VIRT (0x08) # define CPLD08_SIZE PAGE_SIZE +# define CPLD0A_PHYS CPLDX_PHYS (0x0a) +# define CPLD0A_VIRT CPLDX_VIRT (0x0a) +# define CPLD0A_SIZE PAGE_SIZE # define CPLD0C_PHYS CPLDX_PHYS (0x0c) # define CPLD0C_VIRT CPLDX_VIRT (0x0c) # define CPLD0C_SIZE PAGE_SIZE @@ -84,5 +86,7 @@ #define XTAL_IN 14745600 /* 14.7456 MHz crystal */ #define PLL_CLOCK (XTAL_IN * 21) /* 309 MHz PLL clock */ #define MAX_HCLK_KHZ 100000 /* HCLK max limit ~100MHz */ +#define HCLK (99993600) +//#define HCLK (119808000) #endif /* __ASM_ARCH_CONSTANTS_H */ diff --git a/include/asm-arm/arch-lh7a40x/dma.h b/include/asm-arm/arch-lh7a40x/dma.h index 15492e3253f..a8cbd14bbf9 100644 --- a/include/asm-arm/arch-lh7a40x/dma.h +++ b/include/asm-arm/arch-lh7a40x/dma.h @@ -1,9 +1,86 @@ /* include/asm-arm/arch-lh7a40x/dma.h * - * Copyright (C) 2003 Coastal Environmental Systems + * Copyright (C) 2005 Marc Singer * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * version 2 as published by the Free Software Foundation. * */ + +typedef enum { + DMA_M2M0 = 0, + DMA_M2M1 = 1, + DMA_M2P0 = 2, /* Tx */ + DMA_M2P1 = 3, /* Rx */ + DMA_M2P2 = 4, /* Tx */ + DMA_M2P3 = 5, /* Rx */ + DMA_M2P4 = 6, /* Tx - AC97 */ + DMA_M2P5 = 7, /* Rx - AC97 */ + DMA_M2P6 = 8, /* Tx */ + DMA_M2P7 = 9, /* Rx */ +} dma_device_t; + +#define DMA_LENGTH_MAX ((64*1024) - 4) /* bytes */ + +#define DMAC_GCA __REG(DMAC_PHYS + 0x2b80) +#define DMAC_GIR __REG(DMAC_PHYS + 0x2bc0) + +#define DMAC_GIR_MMI1 (1<<11) +#define DMAC_GIR_MMI0 (1<<10) +#define DMAC_GIR_MPI8 (1<<9) +#define DMAC_GIR_MPI9 (1<<8) +#define DMAC_GIR_MPI6 (1<<7) +#define DMAC_GIR_MPI7 (1<<6) +#define DMAC_GIR_MPI4 (1<<5) +#define DMAC_GIR_MPI5 (1<<4) +#define DMAC_GIR_MPI2 (1<<3) +#define DMAC_GIR_MPI3 (1<<2) +#define DMAC_GIR_MPI0 (1<<1) +#define DMAC_GIR_MPI1 (1<<0) + +#define DMAC_M2P0 0x0000 +#define DMAC_M2P1 0x0040 +#define DMAC_M2P2 0x0080 +#define DMAC_M2P3 0x00c0 +#define DMAC_M2P4 0x0240 +#define DMAC_M2P5 0x0200 +#define DMAC_M2P6 0x02c0 +#define DMAC_M2P7 0x0280 +#define DMAC_M2P8 0x0340 +#define DMAC_M2P9 0x0300 +#define DMAC_M2M0 0x0100 +#define DMAC_M2M1 0x0140 + +#define DMAC_P_PCONTROL(c) __REG(DMAC_PHYS + (c) + 0x00) +#define DMAC_P_PINTERRUPT(c) __REG(DMAC_PHYS + (c) + 0x04) +#define DMAC_P_PPALLOC(c) __REG(DMAC_PHYS + (c) + 0x08) +#define DMAC_P_PSTATUS(c) __REG(DMAC_PHYS + (c) + 0x0c) +#define DMAC_P_REMAIN(c) __REG(DMAC_PHYS + (c) + 0x14) +#define DMAC_P_MAXCNT0(c) __REG(DMAC_PHYS + (c) + 0x20) +#define DMAC_P_BASE0(c) __REG(DMAC_PHYS + (c) + 0x24) +#define DMAC_P_CURRENT0(c) __REG(DMAC_PHYS + (c) + 0x28) +#define DMAC_P_MAXCNT1(c) __REG(DMAC_PHYS + (c) + 0x30) +#define DMAC_P_BASE1(c) __REG(DMAC_PHYS + (c) + 0x34) +#define DMAC_P_CURRENT1(c) __REG(DMAC_PHYS + (c) + 0x38) + +#define DMAC_PCONTROL_ENABLE (1<<4) + +#define DMAC_PORT_USB 0 +#define DMAC_PORT_SDMMC 1 +#define DMAC_PORT_AC97_1 2 +#define DMAC_PORT_AC97_2 3 +#define DMAC_PORT_AC97_3 4 +#define DMAC_PORT_UART1 6 +#define DMAC_PORT_UART2 7 +#define DMAC_PORT_UART3 8 + +#define DMAC_PSTATUS_CURRSTATE_SHIFT 4 +#define DMAC_PSTATUS_CURRSTATE_MASK 0x3 + +#define DMAC_PSTATUS_NEXTBUF (1<<6) +#define DMAC_PSTATUS_STALLRINT (1<<0) + +#define DMAC_INT_CHE (1<<3) +#define DMAC_INT_NFB (1<<1) +#define DMAC_INT_STALL (1<<0) diff --git a/include/asm-arm/arch-lh7a40x/hardware.h b/include/asm-arm/arch-lh7a40x/hardware.h index aeb07c162e2..e9ff74fd793 100644 --- a/include/asm-arm/arch-lh7a40x/hardware.h +++ b/include/asm-arm/arch-lh7a40x/hardware.h @@ -13,6 +13,8 @@ #ifndef __ASM_ARCH_HARDWARE_H #define __ASM_ARCH_HARDWARE_H +#include /* Added for the sake of amba-clcd driver */ + #define io_p2v(x) (0xf0000000 | (((x) & 0xfff00000) >> 4) | ((x) & 0x0000ffff)) #define io_v2p(x) ( (((x) & 0x0fff0000) << 4) | ((x) & 0x0000ffff)) @@ -53,6 +55,8 @@ typedef struct { volatile u8 offset[4096]; } __regbase8; #endif +#define MASK_AND_SET(v,m,s) (v) = ((v)&~(m))|(s) + #include "registers.h" #endif /* _ASM_ARCH_HARDWARE_H */ diff --git a/include/asm-arm/arch-lh7a40x/irqs.h b/include/asm-arm/arch-lh7a40x/irqs.h index f91f3e59f3a..7e8a217200e 100644 --- a/include/asm-arm/arch-lh7a40x/irqs.h +++ b/include/asm-arm/arch-lh7a40x/irqs.h @@ -154,9 +154,10 @@ #if !defined (IRQ_GPIO0INTR) # define IRQ_GPIO0INTR IRQ_GPIO0FIQ #endif -#define IRQ_TICK IRQ_TINTR +#define IRQ_TICK IRQ_TINTR #define IRQ_PCC1_RDY IRQ_GPIO6INTR /* PCCard 1 ready */ #define IRQ_PCC2_RDY IRQ_GPIO7INTR /* PCCard 2 ready */ +#define IRQ_USB IRQ_USBINTR /* USB device */ #ifdef CONFIG_MACH_KEV7A400 # define IRQ_TS IRQ_GPIOFIQ /* Touchscreen */ @@ -191,6 +192,10 @@ # define IRQ_LPD7A400_TS IRQ_LPD7A40X_CPLD + 1 /* Touch screen */ #endif +#if defined (CONFIG_MACH_LPD7A400) +# define IRQ_TOUCH IRQ_LPD7A400_TS +#endif + #define NR_IRQS (NR_IRQ_CPU + NR_IRQ_BOARD) #endif diff --git a/include/asm-arm/arch-lh7a40x/registers.h b/include/asm-arm/arch-lh7a40x/registers.h index 2edb22e3545..544307bb87a 100644 --- a/include/asm-arm/arch-lh7a40x/registers.h +++ b/include/asm-arm/arch-lh7a40x/registers.h @@ -18,7 +18,7 @@ /* Physical register base addresses */ -#define AC97_PHYS (0x80000000) /* AC97 Controller */ +#define AC97C_PHYS (0x80000000) /* AC97 Controller */ #define MMC_PHYS (0x80000100) /* Multimedia Card Controller */ #define USB_PHYS (0x80000200) /* USB Client */ #define SCI_PHYS (0x80000300) /* Secure Card Interface */ @@ -35,6 +35,8 @@ #define RTC_PHYS (0x80000d00) /* Real-time Clock */ #define GPIO_PHYS (0x80000e00) /* General Purpose IO */ #define BMI_PHYS (0x80000f00) /* Battery Monitor Interface */ +#define HRTFTC_PHYS (0x80001000) /* High-res TFT Controller (LH7A400) */ +#define ALI_PHYS (0x80001000) /* Advanced LCD Interface (LH7A404) */ #define WDT_PHYS (0x80001400) /* Watchdog Timer */ #define SMC_PHYS (0x80002000) /* Static Memory Controller */ #define SDRC_PHYS (0x80002400) /* SDRAM Controller */ @@ -43,6 +45,7 @@ /* Physical registers of the LH7A404 */ +#define ADC_PHYS (0x80001300) /* A/D & Touchscreen Controller */ #define VIC1_PHYS (0x80008000) /* Vectored Interrupt Controller 1 */ #define USBH_PHYS (0x80009000) /* USB OHCI host controller */ #define VIC2_PHYS (0x8000a000) /* Vectored Interrupt Controller 2 */ @@ -53,10 +56,32 @@ /* Clock/State Controller register */ +#define CSC_PWRSR __REG(CSC_PHYS + 0x00) /* Reset register & ID */ #define CSC_PWRCNT __REG(CSC_PHYS + 0x04) /* Power control */ +#define CSC_CLKSET __REG(CSC_PHYS + 0x20) /* Clock speed control */ +#define CSC_USBDRESET __REG(CSC_PHYS + 0x4c) /* USB Device resets */ #define CSC_PWRCNT_USBH_EN (1<<28) /* USB Host power enable */ - +#define CSC_PWRCNT_DMAC_M2M1_EN (1<<27) +#define CSC_PWRCNT_DMAC_M2M0_EN (1<<26) +#define CSC_PWRCNT_DMAC_M2P8_EN (1<<25) +#define CSC_PWRCNT_DMAC_M2P9_EN (1<<24) +#define CSC_PWRCNT_DMAC_M2P6_EN (1<<23) +#define CSC_PWRCNT_DMAC_M2P7_EN (1<<22) +#define CSC_PWRCNT_DMAC_M2P4_EN (1<<21) +#define CSC_PWRCNT_DMAC_M2P5_EN (1<<20) +#define CSC_PWRCNT_DMAC_M2P2_EN (1<<19) +#define CSC_PWRCNT_DMAC_M2P3_EN (1<<18) +#define CSC_PWRCNT_DMAC_M2P0_EN (1<<17) +#define CSC_PWRCNT_DMAC_M2P1_EN (1<<16) + +#define CSC_PWRSR_CHIPMAN_SHIFT (24) +#define CSC_PWRSR_CHIPMAN_MASK (0xff) +#define CSC_PWRSR_CHIPID_SHIFT (16) +#define CSC_PWRSR_CHIPID_MASK (0xff) + +#define CSC_USBDRESET_APBRESETREG (1<<1) +#define CSC_USBDRESET_IORESETREG (1<<0) /* Interrupt Controller registers */ @@ -109,6 +134,13 @@ #define GPIO_GPIOFEOI __REG(GPIO_PHYS + 0x54) /* GPIO End-of-Interrupt */ #define GPIO_GPIOINTEN __REG(GPIO_PHYS + 0x58) /* GPIO Interrupt Enable */ #define GPIO_INTSTATUS __REG(GPIO_PHYS + 0x5c) /* GPIO Interrupt Status */ +#define GPIO_PINMUX __REG(GPIO_PHYS + 0x2c) +#define GPIO_PADD __REG(GPIO_PHYS + 0x10) +#define GPIO_PAD __REG(GPIO_PHYS + 0x00) +#define GPIO_PCD __REG(GPIO_PHYS + 0x08) +#define GPIO_PCDD __REG(GPIO_PHYS + 0x18) +#define GPIO_PEDD __REG(GPIO_PHYS + 0x24) +#define GPIO_PED __REG(GPIO_PHYS + 0x20) /* Static Memory Controller registers */ @@ -138,20 +170,21 @@ #endif #if defined (CONFIG_MACH_LPD7A400) || defined (CONFIG_MACH_LPD7A404) -# define CPLD_CONTROL __REG8(CPLD02_PHYS) -# define CPLD_SPI_DATA __REG8(CPLD06_PHYS) -# define CPLD_SPI_CONTROL __REG8(CPLD08_PHYS) -# define CPLD_SPI_EEPROM __REG8(CPLD0A_PHYS) -# define CPLD_INTERRUPTS __REG8(CPLD0C_PHYS) /* IRQ mask/status */ -# define CPLD_BOOT_MODE __REG8(CPLD0E_PHYS) -# define CPLD_FLASH __REG8(CPLD10_PHYS) -# define CPLD_POWER_MGMT __REG8(CPLD12_PHYS) -# define CPLD_REVISION __REG8(CPLD14_PHYS) -# define CPLD_GPIO_EXT __REG8(CPLD16_PHYS) -# define CPLD_GPIO_DATA __REG8(CPLD18_PHYS) -# define CPLD_GPIO_DIR __REG8(CPLD1A_PHYS) -#endif +# define CPLD_CONTROL __REG16(CPLD02_PHYS) +# define CPLD_SPI_DATA __REG16(CPLD06_PHYS) +# define CPLD_SPI_CONTROL __REG16(CPLD08_PHYS) +# define CPLD_SPI_EEPROM __REG16(CPLD0A_PHYS) +# define CPLD_INTERRUPTS __REG16(CPLD0C_PHYS) /* IRQ mask/status */ +# define CPLD_BOOT_MODE __REG16(CPLD0E_PHYS) +# define CPLD_FLASH __REG16(CPLD10_PHYS) +# define CPLD_POWER_MGMT __REG16(CPLD12_PHYS) +# define CPLD_REVISION __REG16(CPLD14_PHYS) +# define CPLD_GPIO_EXT __REG16(CPLD16_PHYS) +# define CPLD_GPIO_DATA __REG16(CPLD18_PHYS) +# define CPLD_GPIO_DIR __REG16(CPLD1A_PHYS) + +#endif /* Timer registers */ @@ -190,4 +223,3 @@ #endif /* _ASM_ARCH_REGISTERS_H */ - diff --git a/include/asm-arm/arch-lh7a40x/ssp.h b/include/asm-arm/arch-lh7a40x/ssp.h new file mode 100644 index 00000000000..132b1c4d5ce --- /dev/null +++ b/include/asm-arm/arch-lh7a40x/ssp.h @@ -0,0 +1,71 @@ +/* ssp.h + $Id$ + + written by Marc Singer + 6 Dec 2004 + + Copyright (C) 2004 Marc Singer + + ----------- + DESCRIPTION + ----------- + + This SSP header is available throughout the kernel, for this + machine/architecture, because drivers that use it may be dispersed. + + This file was cloned from the 7952x implementation. It would be + better to share them, but we're taking an easier approach for the + time being. + +*/ + +#if !defined (__SSP_H__) +# define __SSP_H__ + +/* ----- Includes */ + +/* ----- Types */ + +struct ssp_driver { + int (*init) (void); + void (*exit) (void); + void (*acquire) (void); + void (*release) (void); + int (*configure) (int device, int mode, int speed, + int frame_size_write, int frame_size_read); + void (*chip_select) (int enable); + void (*set_callbacks) (void* handle, + irqreturn_t (*callback_tx)(void*), + irqreturn_t (*callback_rx)(void*)); + void (*enable) (void); + void (*disable) (void); +// int (*save_state) (void*); +// void (*restore_state) (void*); + int (*read) (void); + int (*write) (u16 data); + int (*write_read) (u16 data); + void (*flush) (void); + void (*write_async) (void* pv, size_t cb); + size_t (*write_pos) (void); +}; + + /* These modes are only available on the LH79524 */ +#define SSP_MODE_SPI (1) +#define SSP_MODE_SSI (2) +#define SSP_MODE_MICROWIRE (3) +#define SSP_MODE_I2S (4) + + /* CPLD SPI devices */ +#define DEVICE_EEPROM 0 /* Configuration eeprom */ +#define DEVICE_MAC 1 /* MAC eeprom (LPD79524) */ +#define DEVICE_CODEC 2 /* Audio codec */ +#define DEVICE_TOUCH 3 /* Touch screen (LPD79520) */ + +/* ----- Globals */ + +/* ----- Prototypes */ + +//extern struct ssp_driver lh79520_i2s_driver; +extern struct ssp_driver lh7a400_cpld_ssp_driver; + +#endif /* __SSP_H__ */ diff --git a/include/asm-arm/arch-lh7a40x/uncompress.h b/include/asm-arm/arch-lh7a40x/uncompress.h index f8053346f60..3d1ce0426a3 100644 --- a/include/asm-arm/arch-lh7a40x/uncompress.h +++ b/include/asm-arm/arch-lh7a40x/uncompress.h @@ -16,7 +16,7 @@ #ifndef UART_R_STATUS # define UART_R_STATUS (0x10) #endif -#define nTxRdy (0x20) /* Not TxReady (literally Tx FIFO full) */ +#define nTxRdy (0x20) /* Not TxReady (literally Tx FIFO full) */ /* Access UART with physical addresses before MMU is setup */ #define UART_STATUS (*(volatile unsigned long*) (UART2_PHYS + UART_R_STATUS)) -- cgit v1.2.3-70-g09d2 From 638b266630db8d492255d340e18d46ba6ab1b057 Mon Sep 17 00:00:00 2001 From: Marc Singer Date: Tue, 16 May 2006 11:41:28 +0100 Subject: [ARM] 3401/1: lpd7a40x: platform update Patch from Marc Singer Updates to the lpd7a40x_platform files. Includes support for new architecture, lpd7a400. Signed-off-by: Marc Singer Signed-off-by: Russell King --- arch/arm/mach-lh7a40x/Makefile | 19 +-- arch/arm/mach-lh7a40x/arch-lpd7a40x.c | 200 ++++++++++++++++++++--------- arch/arm/mach-lh7a40x/clocks.c | 199 ++++++++++++++++++++++++++++ arch/arm/mach-lh7a40x/irq-lh7a404.c | 17 ++- arch/arm/mach-lh7a40x/time.c | 4 +- include/asm-arm/arch-lh7a40x/entry-macro.S | 70 +++++++++- 6 files changed, 433 insertions(+), 76 deletions(-) create mode 100644 arch/arm/mach-lh7a40x/clocks.c (limited to 'include/asm-arm') diff --git a/arch/arm/mach-lh7a40x/Makefile b/arch/arm/mach-lh7a40x/Makefile index e90512dbc2d..94b8615fb3c 100644 --- a/arch/arm/mach-lh7a40x/Makefile +++ b/arch/arm/mach-lh7a40x/Makefile @@ -4,11 +4,14 @@ # Object file lists. -obj-y := time.o -obj-$(CONFIG_MACH_KEV7A400) += arch-kev7a400.o irq-lh7a400.o -obj-$(CONFIG_MACH_LPD7A400) += arch-lpd7a40x.o irq-lh7a400.o -obj-$(CONFIG_MACH_LPD7A404) += arch-lpd7a40x.o irq-lh7a404.o - -obj-m := -obj-n := -obj- := +obj-y := time.o clocks.o +obj-m := +obj-n := +obj- := + +obj-$(CONFIG_MACH_KEV7A400) += arch-kev7a400.o irq-lh7a400.o +obj-$(CONFIG_MACH_LPD7A400) += arch-lpd7a40x.o irq-lh7a400.o +obj-$(CONFIG_MACH_LPD7A404) += arch-lpd7a40x.o irq-lh7a404.o +obj-$(CONFIG_LPD7A40X_CPLD_SSP) += ssp-cpld.o +obj-$(CONFIG_FB_ARMCLCD) += clcd.o + diff --git a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c index 12e23277c5e..c0e6854289f 100644 --- a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c +++ b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c @@ -23,6 +23,28 @@ #include "common.h" +#define CPLD_INT_NETHERNET (1<<0) +#define CPLD_INTMASK_ETHERNET (1<<2) +#if defined (CONFIG_MACH_LPD7A400) +# define CPLD_INT_NTOUCH (1<<1) +# define CPLD_INTMASK_TOUCH (1<<3) +# define CPLD_INT_PEN (1<<4) +# define CPLD_INTMASK_PEN (1<<4) +# define CPLD_INT_PIRQ (1<<4) +#endif +#define CPLD_INTMASK_CPLD (1<<7) +#define CPLD_INT_CPLD (1<<6) + +#define CPLD_CONTROL_SWINT (1<<7) /* Disable all CPLD IRQs */ +#define CPLD_CONTROL_OCMSK (1<<6) /* Mask USB1 connect IRQ */ +#define CPLD_CONTROL_PDRV (1<<5) /* PCC_nDRV high */ +#define CPLD_CONTROL_USB1C (1<<4) /* USB1 connect IRQ active */ +#define CPLD_CONTROL_USB1P (1<<3) /* USB1 power disable */ +#define CPLD_CONTROL_AWKP (1<<2) /* Auto-wakeup disabled */ +#define CPLD_CONTROL_LCD_ENABLE (1<<1) /* LCD Vee enable */ +#define CPLD_CONTROL_WRLAN_NENABLE (1<<0) /* SMC91x power disable */ + + static struct resource smc91x_resources[] = { [0] = { .start = CPLD00_PHYS, @@ -48,12 +70,12 @@ static struct platform_device smc91x_device = { static struct resource lh7a40x_usbclient_resources[] = { [0] = { .start = USB_PHYS, - .end = (USB_PHYS + 0xFF), + .end = (USB_PHYS + PAGE_SIZE), .flags = IORESOURCE_MEM, }, [1] = { - .start = IRQ_USBINTR, - .end = IRQ_USBINTR, + .start = IRQ_USB, + .end = IRQ_USB, .flags = IORESOURCE_IRQ, }, }; @@ -61,7 +83,8 @@ static struct resource lh7a40x_usbclient_resources[] = { static u64 lh7a40x_usbclient_dma_mask = 0xffffffffUL; static struct platform_device lh7a40x_usbclient_device = { - .name = "lh7a40x_udc", +// .name = "lh7a40x_udc", + .name = "lh7-udc", .id = 0, .dev = { .dma_mask = &lh7a40x_usbclient_dma_mask, @@ -101,7 +124,7 @@ static struct platform_device lh7a404_usbhost_device = { #endif -static struct platform_device *lpd7a40x_devs[] __initdata = { +static struct platform_device* lpd7a40x_devs[] __initdata = { &smc91x_device, &lh7a40x_usbclient_device, #if defined (CONFIG_ARCH_LH7A404) @@ -113,29 +136,52 @@ extern void lpd7a400_map_io (void); static void __init lpd7a40x_init (void) { - CPLD_CONTROL |= (1<<6); /* Mask USB1 connection IRQ */ +#if defined (CONFIG_MACH_LPD7A400) + CPLD_CONTROL |= 0 + | CPLD_CONTROL_SWINT /* Disable software interrupt */ + | CPLD_CONTROL_OCMSK; /* Mask USB1 connection IRQ */ CPLD_CONTROL &= ~(0 - | (1<<1) /* Disable LCD */ - | (1<<0) /* Enable WLAN */ + | CPLD_CONTROL_LCD_ENABLE /* Disable LCD */ + | CPLD_CONTROL_WRLAN_NENABLE /* Enable SMC91x */ ); +#endif + +#if defined (CONFIG_MACH_LPD7A404) + CPLD_CONTROL &= ~(0 + | CPLD_CONTROL_WRLAN_NENABLE /* Enable SMC91x */ + ); +#endif platform_add_devices (lpd7a40x_devs, ARRAY_SIZE (lpd7a40x_devs)); +#if defined (CONFIG_FB_ARMCLCD) + lh7a40x_clcd_init (); +#endif } static void lh7a40x_ack_cpld_irq (u32 irq) { - /* CPLD doesn't have ack capability */ + /* CPLD doesn't have ack capability, but some devices may */ + +#if defined (CPLD_INTMASK_TOUCH) + /* The touch control *must* mask the the interrupt because the + * interrupt bit is read by the driver to determine if the pen + * is still down. */ + if (irq == IRQ_TOUCH) + CPLD_INTERRUPTS |= CPLD_INTMASK_TOUCH; +#endif } static void lh7a40x_mask_cpld_irq (u32 irq) { switch (irq) { case IRQ_LPD7A40X_ETH_INT: - CPLD_INTERRUPTS = CPLD_INTERRUPTS | 0x4; + CPLD_INTERRUPTS |= CPLD_INTMASK_ETHERNET; break; - case IRQ_LPD7A400_TS: - CPLD_INTERRUPTS = CPLD_INTERRUPTS | 0x8; +#if defined (IRQ_TOUCH) + case IRQ_TOUCH: + CPLD_INTERRUPTS |= CPLD_INTMASK_TOUCH; break; +#endif } } @@ -143,11 +189,13 @@ static void lh7a40x_unmask_cpld_irq (u32 irq) { switch (irq) { case IRQ_LPD7A40X_ETH_INT: - CPLD_INTERRUPTS = CPLD_INTERRUPTS & ~ 0x4; + CPLD_INTERRUPTS &= ~CPLD_INTMASK_ETHERNET; break; - case IRQ_LPD7A400_TS: - CPLD_INTERRUPTS = CPLD_INTERRUPTS & ~ 0x8; +#if defined (IRQ_TOUCH) + case IRQ_TOUCH: + CPLD_INTERRUPTS &= ~CPLD_INTMASK_TOUCH; break; +#endif } } @@ -164,11 +212,13 @@ static void lpd7a40x_cpld_handler (unsigned int irq, struct irqdesc *desc, desc->chip->ack (irq); - if ((mask & 0x1) == 0) /* WLAN */ + if ((mask & (1<<0)) == 0) /* WLAN */ IRQ_DISPATCH (IRQ_LPD7A40X_ETH_INT); - if ((mask & 0x2) == 0) /* Touch */ - IRQ_DISPATCH (IRQ_LPD7A400_TS); +#if defined (IRQ_TOUCH) + if ((mask & (1<<1)) == 0) /* Touch */ + IRQ_DISPATCH (IRQ_TOUCH); +#endif desc->chip->unmask (irq); /* Level-triggered need this */ } @@ -204,9 +254,21 @@ void __init lh7a40x_init_board_irq (void) /* Then, configure CPLD interrupt */ - CPLD_INTERRUPTS = 0x9c; /* Disable all CPLD interrupts */ + /* Disable all CPLD interrupts */ +#if defined (CONFIG_MACH_LPD7A400) + CPLD_INTERRUPTS = CPLD_INTMASK_TOUCH | CPLD_INTMASK_PEN + | CPLD_INTMASK_ETHERNET; + /* *** FIXME: don't know why we need 7 and 4. 7 is way wrong + and 4 is uncefined. */ + // (1<<7)|(1<<4)|(1<<3)|(1<<2); +#endif +#if defined (CONFIG_MACH_LPD7A404) + CPLD_INTERRUPTS = CPLD_INTMASK_ETHERNET; + /* *** FIXME: don't know why we need 6 and 5, neither is defined. */ + // (1<<6)|(1<<5)|(1<<3); +#endif GPIO_PFDD &= ~(1 << pinCPLD); /* Make input */ - GPIO_INTTYPE1 |= (1 << pinCPLD); /* Edge triggered */ + GPIO_INTTYPE1 &= ~(1 << pinCPLD); /* Level triggered */ GPIO_INTTYPE2 &= ~(1 << pinCPLD); /* Active low */ barrier (); GPIO_GPIOFINTEN |= (1 << pinCPLD); /* Enable */ @@ -216,7 +278,7 @@ void __init lh7a40x_init_board_irq (void) for (irq = IRQ_BOARD_START; irq < IRQ_BOARD_START + NR_IRQ_BOARD; ++irq) { set_irq_chip (irq, &lpd7a40x_cpld_chip); - set_irq_handler (irq, do_edge_IRQ); + set_irq_handler (irq, do_level_IRQ); set_irq_flags (irq, IRQF_VALID); } @@ -226,91 +288,109 @@ void __init lh7a40x_init_board_irq (void) lpd7a40x_cpld_handler); } -static struct map_desc lpd7a400_io_desc[] __initdata = { +static struct map_desc lpd7a40x_io_desc[] __initdata = { { - .virtual = IO_VIRT, + .virtual = IO_VIRT, .pfn = __phys_to_pfn(IO_PHYS), - .length = IO_SIZE, + .length = IO_SIZE, .type = MT_DEVICE - }, { /* Mapping added to work around chip select problems */ + }, + { /* Mapping added to work around chip select problems */ .virtual = IOBARRIER_VIRT, .pfn = __phys_to_pfn(IOBARRIER_PHYS), .length = IOBARRIER_SIZE, .type = MT_DEVICE - }, { + }, + { .virtual = CF_VIRT, .pfn = __phys_to_pfn(CF_PHYS), - .length = CF_SIZE, + .length = CF_SIZE, .type = MT_DEVICE - }, { + }, + { .virtual = CPLD02_VIRT, .pfn = __phys_to_pfn(CPLD02_PHYS), - .length = CPLD02_SIZE, + .length = CPLD02_SIZE, .type = MT_DEVICE - }, { + }, + { .virtual = CPLD06_VIRT, .pfn = __phys_to_pfn(CPLD06_PHYS), - .length = CPLD06_SIZE, + .length = CPLD06_SIZE, + .type = MT_DEVICE + }, + { + .virtual = CPLD08_VIRT, + .pfn = __phys_to_pfn(CPLD08_PHYS), + .length = CPLD08_SIZE, .type = MT_DEVICE - }, { + }, + { .virtual = CPLD08_VIRT, .pfn = __phys_to_pfn(CPLD08_PHYS), - .length = CPLD08_SIZE, + .length = CPLD08_SIZE, .type = MT_DEVICE - }, { + }, + { + .virtual = CPLD0A_VIRT, + .pfn = __phys_to_pfn(CPLD0A_PHYS), + .length = CPLD0A_SIZE, + .type = MT_DEVICE + }, + { .virtual = CPLD0C_VIRT, .pfn = __phys_to_pfn(CPLD0C_PHYS), - .length = CPLD0C_SIZE, + .length = CPLD0C_SIZE, .type = MT_DEVICE - }, { + }, + { .virtual = CPLD0E_VIRT, .pfn = __phys_to_pfn(CPLD0E_PHYS), - .length = CPLD0E_SIZE, + .length = CPLD0E_SIZE, .type = MT_DEVICE - }, { + }, + { .virtual = CPLD10_VIRT, .pfn = __phys_to_pfn(CPLD10_PHYS), - .length = CPLD10_SIZE, + .length = CPLD10_SIZE, .type = MT_DEVICE - }, { + }, + { .virtual = CPLD12_VIRT, .pfn = __phys_to_pfn(CPLD12_PHYS), - .length = CPLD12_SIZE, + .length = CPLD12_SIZE, .type = MT_DEVICE - }, { + }, + { .virtual = CPLD14_VIRT, .pfn = __phys_to_pfn(CPLD14_PHYS), - .length = CPLD14_SIZE, + .length = CPLD14_SIZE, .type = MT_DEVICE - }, { + }, + { .virtual = CPLD16_VIRT, .pfn = __phys_to_pfn(CPLD16_PHYS), - .length = CPLD16_SIZE, + .length = CPLD16_SIZE, .type = MT_DEVICE - }, { + }, + { .virtual = CPLD18_VIRT, .pfn = __phys_to_pfn(CPLD18_PHYS), - .length = CPLD18_SIZE, + .length = CPLD18_SIZE, .type = MT_DEVICE - }, { + }, + { .virtual = CPLD1A_VIRT, .pfn = __phys_to_pfn(CPLD1A_PHYS), - .length = CPLD1A_SIZE, + .length = CPLD1A_SIZE, .type = MT_DEVICE }, - /* This mapping is redundant since the smc driver performs another. */ -/* { CPLD00_VIRT, CPLD00_PHYS, CPLD00_SIZE, MT_DEVICE }, */ }; void __init -lpd7a400_map_io(void) +lpd7a40x_map_io(void) { - iotable_init (lpd7a400_io_desc, ARRAY_SIZE (lpd7a400_io_desc)); - - /* Fixup (improve) Static Memory Controller settings */ - SMC_BCR0 = 0x200039af; /* Boot Flash */ - SMC_BCR6 = 0x1000fbe0; /* CPLD */ - SMC_BCR7 = 0x1000b2c2; /* Compact Flash */ + iotable_init (lpd7a40x_io_desc, ARRAY_SIZE (lpd7a40x_io_desc)); } #ifdef CONFIG_MACH_LPD7A400 @@ -320,7 +400,7 @@ MACHINE_START (LPD7A400, "Logic Product Development LPD7A400-10") .phys_io = 0x80000000, .io_pg_offst = ((io_p2v (0x80000000))>>18) & 0xfffc, .boot_params = 0xc0000100, - .map_io = lpd7a400_map_io, + .map_io = lpd7a40x_map_io, .init_irq = lh7a400_init_irq, .timer = &lh7a40x_timer, .init_machine = lpd7a40x_init, @@ -335,7 +415,7 @@ MACHINE_START (LPD7A404, "Logic Product Development LPD7A404-10") .phys_io = 0x80000000, .io_pg_offst = ((io_p2v (0x80000000))>>18) & 0xfffc, .boot_params = 0xc0000100, - .map_io = lpd7a400_map_io, + .map_io = lpd7a40x_map_io, .init_irq = lh7a404_init_irq, .timer = &lh7a40x_timer, .init_machine = lpd7a40x_init, diff --git a/arch/arm/mach-lh7a40x/clocks.c b/arch/arm/mach-lh7a40x/clocks.c new file mode 100644 index 00000000000..2291afe9f23 --- /dev/null +++ b/arch/arm/mach-lh7a40x/clocks.c @@ -0,0 +1,199 @@ +/* arch/arm/mach-lh7a40x/clocks.c + * + * Copyright (C) 2004 Marc Singer + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + */ + +#include +#include +#include +#include +#include + +struct module; +struct icst525_params; + +struct clk { + struct list_head node; + unsigned long rate; + struct module *owner; + const char *name; +// void *data; +// const struct icst525_params *params; +// void (*setvco)(struct clk *, struct icst525_vco vco); +}; + +int clk_register(struct clk *clk); +void clk_unregister(struct clk *clk); + +/* ----- */ + +#define MAINDIV1(c) (((c) >> 7) & 0x0f) +#define MAINDIV2(c) (((c) >> 11) & 0x1f) +#define PS(c) (((c) >> 18) & 0x03) +#define PREDIV(c) (((c) >> 2) & 0x1f) +#define HCLKDIV(c) (((c) >> 0) & 0x02) +#define PCLKDIV(c) (((c) >> 16) & 0x03) + +unsigned int cpufreq_get (unsigned int cpu) /* in kHz */ +{ + return fclkfreq_get ()/1000; +} +EXPORT_SYMBOL(cpufreq_get); + +unsigned int fclkfreq_get (void) +{ + unsigned int clkset = CSC_CLKSET; + unsigned int gclk + = XTAL_IN + / (1 << PS(clkset)) + * (MAINDIV1(clkset) + 2) + / (PREDIV(clkset) + 2) + * (MAINDIV2(clkset) + 2) + ; + return gclk; +} + +unsigned int hclkfreq_get (void) +{ + unsigned int clkset = CSC_CLKSET; + unsigned int hclk = fclkfreq_get () / (HCLKDIV(clkset) + 1); + + return hclk; +} + +unsigned int pclkfreq_get (void) +{ + unsigned int clkset = CSC_CLKSET; + int pclkdiv = PCLKDIV(clkset); + unsigned int pclk; + if (pclkdiv == 0x3) + pclkdiv = 0x2; + pclk = hclkfreq_get () / (1 << pclkdiv); + + return pclk; +} + +/* ----- */ + +static LIST_HEAD(clocks); +static DECLARE_MUTEX(clocks_sem); + +struct clk *clk_get (struct device *dev, const char *id) +{ + struct clk *p; + struct clk *clk = ERR_PTR(-ENOENT); + + down (&clocks_sem); + list_for_each_entry (p, &clocks, node) { + if (strcmp (id, p->name) == 0 + && try_module_get(p->owner)) { + clk = p; + break; + } + } + up (&clocks_sem); + + return clk; +} +EXPORT_SYMBOL(clk_get); + +void clk_put (struct clk *clk) +{ + module_put(clk->owner); +} +EXPORT_SYMBOL(clk_put); + +int clk_enable (struct clk *clk) +{ + return 0; +} +EXPORT_SYMBOL(clk_enable); + +void clk_disable (struct clk *clk) +{ +} +EXPORT_SYMBOL(clk_disable); + +int clk_use (struct clk *clk) +{ + return 0; +} +EXPORT_SYMBOL(clk_use); + +void clk_unuse (struct clk *clk) +{ +} +EXPORT_SYMBOL(clk_unuse); + +unsigned long clk_get_rate (struct clk *clk) +{ + return clk->rate; +} +EXPORT_SYMBOL(clk_get_rate); + +long clk_round_rate (struct clk *clk, unsigned long rate) +{ + return rate; +} +EXPORT_SYMBOL(clk_round_rate); + +int clk_set_rate (struct clk *clk, unsigned long rate) +{ + int ret = -EIO; + return ret; +} +EXPORT_SYMBOL(clk_set_rate); + +#if 0 +/* + * These are fixed clocks. + */ +static struct clk kmi_clk = { + .name = "KMIREFCLK", + .rate = 24000000, +}; + +static struct clk uart_clk = { + .name = "UARTCLK", + .rate = 24000000, +}; + +static struct clk mmci_clk = { + .name = "MCLK", + .rate = 33000000, +}; +#endif + +static struct clk clcd_clk = { + .name = "CLCDCLK", + .rate = 0, +}; + +int clk_register (struct clk *clk) +{ + down (&clocks_sem); + list_add (&clk->node, &clocks); + up (&clocks_sem); + return 0; +} +EXPORT_SYMBOL(clk_register); + +void clk_unregister (struct clk *clk) +{ + down (&clocks_sem); + list_del (&clk->node); + up (&clocks_sem); +} +EXPORT_SYMBOL(clk_unregister); + +static int __init clk_init (void) +{ + clk_register(&clcd_clk); + return 0; +} +arch_initcall(clk_init); diff --git a/arch/arm/mach-lh7a40x/irq-lh7a404.c b/arch/arm/mach-lh7a40x/irq-lh7a404.c index e902e3d87da..2685a81454d 100644 --- a/arch/arm/mach-lh7a40x/irq-lh7a404.c +++ b/arch/arm/mach-lh7a40x/irq-lh7a404.c @@ -28,13 +28,17 @@ static unsigned char irq_pri_vic1[] = { #if defined (USE_PRIORITIES) -IRQ_GPIO3INTR, + IRQ_GPIO3INTR, /* CPLD */ + IRQ_DMAM2P4, IRQ_DMAM2P5, /* AC97 */ #endif }; static unsigned char irq_pri_vic2[] = { #if defined (USE_PRIORITIES) - IRQ_T3UI, IRQ_GPIO7INTR, + IRQ_T3UI, /* Timer */ + IRQ_GPIO7INTR, /* CPLD */ IRQ_UART1INTR, IRQ_UART2INTR, IRQ_UART3INTR, + IRQ_LCDINTR, /* LCD */ + IRQ_TSCINTR, /* ADC/Touchscreen */ #endif }; @@ -98,10 +102,19 @@ static struct irqchip lh7a404_gpio_vic2_chip = { /* IRQ initialization */ +#if defined (CONFIG_ARCH_LH7A400) && defined (CONFIG_ARCH_LH7A404) +extern void* branch_irq_lh7a400; +#endif + void __init lh7a404_init_irq (void) { int irq; +#if defined (CONFIG_ARCH_LH7A400) && defined (CONFIG_ARCH_LH7A404) +#define NOP 0xe1a00000 /* mov r0, r0 */ + branch_irq_lh7a400 = NOP; +#endif + VIC1_INTENCLR = 0xffffffff; VIC2_INTENCLR = 0xffffffff; VIC1_INTSEL = 0; /* All IRQs */ diff --git a/arch/arm/mach-lh7a40x/time.c b/arch/arm/mach-lh7a40x/time.c index be377e331f2..ef9af375fcc 100644 --- a/arch/arm/mach-lh7a40x/time.c +++ b/arch/arm/mach-lh7a40x/time.c @@ -1,4 +1,4 @@ -/* +/* * arch/arm/mach-lh7a40x/time.c * * Copyright (C) 2004 Logic Product Development @@ -57,7 +57,7 @@ static struct irqaction lh7a40x_timer_irq = { .handler = lh7a40x_timer_interrupt, }; -static void __init lh7a40x_timer_init(void) +static void __init lh7a40x_timer_init (void) { /* Stop/disable all timers */ TIMER_CONTROL1 = 0; diff --git a/include/asm-arm/arch-lh7a40x/entry-macro.S b/include/asm-arm/arch-lh7a40x/entry-macro.S index a2f67c06d9c..9fc7f498812 100644 --- a/include/asm-arm/arch-lh7a40x/entry-macro.S +++ b/include/asm-arm/arch-lh7a40x/entry-macro.S @@ -10,11 +10,73 @@ #include #include -# if defined (CONFIG_ARCH_LH7A400) && defined (CONFIG_ARCH_LH7A404) -# error "LH7A400 and LH7A404 are mutually exclusive" -# endif +/* In order to allow there to be support for both of the processor + classes at the same time, we make a hack here that isn't very + pretty. At startup, the link pointed to with the + branch_irq_lh7a400 symbol is replaced with a NOP when the CPU is + detected as a lh7a404. -# if defined (CONFIG_ARCH_LH7A400) + *** FIXME: we should clean this up so that there is only one + implementation for each CPU's design. + +*/ + +#if defined (CONFIG_ARCH_LH7A400) && defined (CONFIG_ARCH_LH7A404) + + .macro disable_fiq + .endm + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + +branch_irq_lh7a400: b 1000f + +@ Implementation of the LH7A404 get_irqnr_and_base. + + mov \irqnr, #0 @ VIC1 irq base + mov \base, #io_p2v(0x80000000) @ APB registers + add \base, \base, #0x8000 + ldr \tmp, [\base, #0x0030] @ VIC1_VECTADDR + tst \tmp, #VA_VECTORED @ Direct vectored + bne 1002f + tst \tmp, #VA_VIC1DEFAULT @ Default vectored VIC1 + ldrne \irqstat, [\base, #0] @ VIC1_IRQSTATUS + bne 1001f + add \base, \base, #(0xa000 - 0x8000) + ldr \tmp, [\base, #0x0030] @ VIC2_VECTADDR + tst \tmp, #VA_VECTORED @ Direct vectored + bne 1002f + ldr \irqstat, [\base, #0] @ VIC2_IRQSTATUS + mov \irqnr, #32 @ VIC2 irq base + +1001: movs \irqstat, \irqstat, lsr #1 @ Shift into carry + bcs 1008f @ Bit set; irq found + add \irqnr, \irqnr, #1 + bne 1001b @ Until no bits + b 1009f @ Nothing? Hmm. +1002: and \irqnr, \tmp, #0x3f @ Mask for valid bits +1008: movs \irqstat, #1 @ Force !Z + str \tmp, [\base, #0x0030] @ Clear vector + b 1009f + +@ Implementation of the LH7A400 get_irqnr_and_base. + +1000: mov \irqnr, #0 + mov \base, #io_p2v(0x80000000) @ APB registers + ldr \irqstat, [\base, #0x500] @ PIC INTSR + +1001: movs \irqstat, \irqstat, lsr #1 @ Shift into carry + bcs 1008f @ Bit set; irq found + add \irqnr, \irqnr, #1 + bne 1001b @ Until no bits + b 1009f @ Nothing? Hmm. +1008: movs \irqstat, #1 @ Force !Z + +1009: + .endm + + + +#elif defined (CONFIG_ARCH_LH7A400) .macro disable_fiq .endm -- cgit v1.2.3-70-g09d2 From a5a503038e71a6b7d4bd9e596ac13087274e60c7 Mon Sep 17 00:00:00 2001 From: Vitaly Wool Date: Tue, 16 May 2006 11:54:36 +0100 Subject: [ARM] 3465/1: [1/3] Support for Philips PNX4008 platform: headers Patch from Vitaly Wool This patch adds kernel headers for PNX4008 ARM platform. It's basically the same as the previos one, but with the rmk's comments taken into account. Signed-off-by: Vitaly Wool Signed-off-by: Dmitry Pervushin Signed-off-by: Russell King --- include/asm-arm/arch-pnx4008/clock.h | 61 ++++++++ include/asm-arm/arch-pnx4008/debug-macro.S | 27 ++++ include/asm-arm/arch-pnx4008/dma.h | 162 ++++++++++++++++++++++ include/asm-arm/arch-pnx4008/entry-macro.S | 121 ++++++++++++++++ include/asm-arm/arch-pnx4008/gpio.h | 139 +++++++++++++++++++ include/asm-arm/arch-pnx4008/hardware.h | 32 +++++ include/asm-arm/arch-pnx4008/io.h | 21 +++ include/asm-arm/arch-pnx4008/irq.h | 42 ++++++ include/asm-arm/arch-pnx4008/irqs.h | 215 +++++++++++++++++++++++++++++ include/asm-arm/arch-pnx4008/memory.h | 24 ++++ include/asm-arm/arch-pnx4008/param.h | 21 +++ include/asm-arm/arch-pnx4008/platform.h | 69 +++++++++ include/asm-arm/arch-pnx4008/pm.h | 62 +++++++++ include/asm-arm/arch-pnx4008/system.h | 38 +++++ include/asm-arm/arch-pnx4008/timex.h | 73 ++++++++++ include/asm-arm/arch-pnx4008/uncompress.h | 46 ++++++ include/asm-arm/arch-pnx4008/vmalloc.h | 20 +++ 17 files changed, 1173 insertions(+) create mode 100644 include/asm-arm/arch-pnx4008/clock.h create mode 100644 include/asm-arm/arch-pnx4008/debug-macro.S create mode 100644 include/asm-arm/arch-pnx4008/dma.h create mode 100644 include/asm-arm/arch-pnx4008/entry-macro.S create mode 100644 include/asm-arm/arch-pnx4008/gpio.h create mode 100644 include/asm-arm/arch-pnx4008/hardware.h create mode 100644 include/asm-arm/arch-pnx4008/io.h create mode 100644 include/asm-arm/arch-pnx4008/irq.h create mode 100644 include/asm-arm/arch-pnx4008/irqs.h create mode 100644 include/asm-arm/arch-pnx4008/memory.h create mode 100644 include/asm-arm/arch-pnx4008/param.h create mode 100644 include/asm-arm/arch-pnx4008/platform.h create mode 100644 include/asm-arm/arch-pnx4008/pm.h create mode 100644 include/asm-arm/arch-pnx4008/system.h create mode 100644 include/asm-arm/arch-pnx4008/timex.h create mode 100644 include/asm-arm/arch-pnx4008/uncompress.h create mode 100644 include/asm-arm/arch-pnx4008/vmalloc.h (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-pnx4008/clock.h b/include/asm-arm/arch-pnx4008/clock.h new file mode 100644 index 00000000000..91ae0030fdf --- /dev/null +++ b/include/asm-arm/arch-pnx4008/clock.h @@ -0,0 +1,61 @@ +/* + * include/asm-arm/arch-pnx4008/clock.h + * + * Clock control driver for PNX4008 - header file + * + * Authors: Vitaly Wool, Dmitry Chigirev + * + * 2005 (c) MontaVista Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + */ +#ifndef __PNX4008_CLOCK_H__ +#define __PNX4008_CLOCK_H__ + +struct module; +struct clk; + +#define PWRMAN_VA_BASE IO_ADDRESS(PNX4008_PWRMAN_BASE) +#define HCLKDIVCTRL_REG (PWRMAN_VA_BASE + 0x40) +#define PWRCTRL_REG (PWRMAN_VA_BASE + 0x44) +#define PLLCTRL_REG (PWRMAN_VA_BASE + 0x48) +#define OSC13CTRL_REG (PWRMAN_VA_BASE + 0x4c) +#define SYSCLKCTRL_REG (PWRMAN_VA_BASE + 0x50) +#define HCLKPLLCTRL_REG (PWRMAN_VA_BASE + 0x58) +#define USBCTRL_REG (PWRMAN_VA_BASE + 0x64) +#define SDRAMCLKCTRL_REG (PWRMAN_VA_BASE + 0x68) +#define MSCTRL_REG (PWRMAN_VA_BASE + 0x80) +#define BTCLKCTRL (PWRMAN_VA_BASE + 0x84) +#define DUMCLKCTRL_REG (PWRMAN_VA_BASE + 0x90) +#define I2CCLKCTRL_REG (PWRMAN_VA_BASE + 0xac) +#define KEYCLKCTRL_REG (PWRMAN_VA_BASE + 0xb0) +#define TSCLKCTRL_REG (PWRMAN_VA_BASE + 0xb4) +#define PWMCLKCTRL_REG (PWRMAN_VA_BASE + 0xb8) +#define SPICTRL_REG (PWRMAN_VA_BASE + 0xc4) +#define FLASHCLKCTRL_REG (PWRMAN_VA_BASE + 0xc8) +#define UART3CLK_REG (PWRMAN_VA_BASE + 0xd0) +#define UARTCLKCTRL_REG (PWRMAN_VA_BASE + 0xe4) +#define DMACLKCTRL_REG (PWRMAN_VA_BASE + 0xe8) +#define AUTOCLK_CTRL (PWRMAN_VA_BASE + 0xec) +#define JPEGCLKCTRL_REG (PWRMAN_VA_BASE + 0xfc) + +#define AUDIOCONFIG_VA_BASE IO_ADDRESS(PNX4008_AUDIOCONFIG_BASE) +#define DSPPLLCTRL_REG (AUDIOCONFIG_VA_BASE + 0x60) +#define DSPCLKCTRL_REG (AUDIOCONFIG_VA_BASE + 0x64) +#define AUDIOCLKCTRL_REG (AUDIOCONFIG_VA_BASE + 0x68) +#define AUDIOPLLCTRL_REG (AUDIOCONFIG_VA_BASE + 0x6C) + +#define USB_OTG_CLKCTRL_REG IO_ADDRESS(PNX4008_USB_CONFIG_BASE + 0xff4) + +#define VFP9CLKCTRL_REG IO_ADDRESS(PNX4008_DEBUG_BASE) + +#define CLK_RATE_13MHZ 13000 +#define CLK_RATE_1MHZ 1000 +#define CLK_RATE_208MHZ 208000 +#define CLK_RATE_48MHZ 48000 +#define CLK_RATE_32KHZ 32 + +#define PNX4008_UART_CLK CLK_RATE_13MHZ * 1000 /* in MHz */ + +#endif diff --git a/include/asm-arm/arch-pnx4008/debug-macro.S b/include/asm-arm/arch-pnx4008/debug-macro.S new file mode 100644 index 00000000000..eb3839de389 --- /dev/null +++ b/include/asm-arm/arch-pnx4008/debug-macro.S @@ -0,0 +1,27 @@ +/* linux/include/asm-arm/arch-pnx4008/debug-macro.S + * + * Debugging macro include header + * + * Copyright (C) 1994-1999 Russell King + * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * +*/ + + .macro addruart,rx + mrc p15, 0, \rx, c1, c0 + tst \rx, #1 @ MMU enabled? + mov \rx, #0x00090000 + addeq \rx, \rx, #0x40000000 + addne \rx, \rx, #0xf4000000 + .endm + + .macro senduart,rd,rx + strb \rd, [\rx, #0x0] + .endm + +#define UART_SHIFT 2 +#include diff --git a/include/asm-arm/arch-pnx4008/dma.h b/include/asm-arm/arch-pnx4008/dma.h new file mode 100644 index 00000000000..3aee1204795 --- /dev/null +++ b/include/asm-arm/arch-pnx4008/dma.h @@ -0,0 +1,162 @@ +/* + * linux/include/asm-arm/arch-pnx4008/dma.h + * + * PNX4008 DMA header file + * + * Author: Vitaly Wool + * Copyright: MontaVista Software Inc. (c) 2005 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_DMA_H +#define __ASM_ARCH_DMA_H + +#include "platform.h" + +#define MAX_DMA_ADDRESS 0xffffffff + +#define MAX_DMA_CHANNELS 8 + +#define DMAC_BASE IO_ADDRESS(PNX4008_DMA_CONFIG_BASE) +#define DMAC_INT_STAT (DMAC_BASE + 0x0000) +#define DMAC_INT_TC_STAT (DMAC_BASE + 0x0004) +#define DMAC_INT_TC_CLEAR (DMAC_BASE + 0x0008) +#define DMAC_INT_ERR_STAT (DMAC_BASE + 0x000c) +#define DMAC_INT_ERR_CLEAR (DMAC_BASE + 0x0010) +#define DMAC_SOFT_SREQ (DMAC_BASE + 0x0024) +#define DMAC_CONFIG (DMAC_BASE + 0x0030) +#define DMAC_Cx_SRC_ADDR(c) (DMAC_BASE + 0x0100 + (c) * 0x20) +#define DMAC_Cx_DEST_ADDR(c) (DMAC_BASE + 0x0104 + (c) * 0x20) +#define DMAC_Cx_LLI(c) (DMAC_BASE + 0x0108 + (c) * 0x20) +#define DMAC_Cx_CONTROL(c) (DMAC_BASE + 0x010c + (c) * 0x20) +#define DMAC_Cx_CONFIG(c) (DMAC_BASE + 0x0110 + (c) * 0x20) + +enum { + WIDTH_BYTE = 0, + WIDTH_HWORD, + WIDTH_WORD +}; + +enum { + FC_MEM2MEM_DMA, + FC_MEM2PER_DMA, + FC_PER2MEM_DMA, + FC_PER2PER_DMA, + FC_PER2PER_DPER, + FC_MEM2PER_PER, + FC_PER2MEM_PER, + FC_PER2PER_SPER +}; + +enum { + DMA_INT_UNKNOWN = 0, + DMA_ERR_INT = 1, + DMA_TC_INT = 2, +}; + +enum { + DMA_BUFFER_ALLOCATED = 1, + DMA_HAS_LL = 2, +}; + +enum { + PER_CAM_DMA_1 = 0, + PER_NDF_FLASH = 1, + PER_MBX_SLAVE_FIFO = 2, + PER_SPI2_REC_XMIT = 3, + PER_MS_SD_RX_XMIT = 4, + PER_HS_UART_1_XMIT = 5, + PER_HS_UART_1_RX = 6, + PER_HS_UART_2_XMIT = 7, + PER_HS_UART_2_RX = 8, + PER_HS_UART_7_XMIT = 9, + PER_HS_UART_7_RX = 10, + PER_SPI1_REC_XMIT = 11, + PER_MLC_NDF_SREC = 12, + PER_CAM_DMA_2 = 13, + PER_PRNG_INFIFO = 14, + PER_PRNG_OUTFIFO = 15, +}; + +struct pnx4008_dma_ch_ctrl { + int tc_mask; + int cacheable; + int bufferable; + int priv_mode; + int di; + int si; + int dest_ahb1; + int src_ahb1; + int dwidth; + int swidth; + int dbsize; + int sbsize; + int tr_size; +}; + +struct pnx4008_dma_ch_config { + int halt; + int active; + int lock; + int itc; + int ie; + int flow_cntrl; + int dest_per; + int src_per; +}; + +struct pnx4008_dma_ll { + unsigned long src_addr; + unsigned long dest_addr; + u32 next_dma; + unsigned long ch_ctrl; + struct pnx4008_dma_ll *next; + int flags; + void *alloc_data; + int (*free) (void *); +}; + +struct pnx4008_dma_config { + int is_ll; + unsigned long src_addr; + unsigned long dest_addr; + unsigned long ch_ctrl; + unsigned long ch_cfg; + struct pnx4008_dma_ll *ll; + u32 ll_dma; + int flags; + void *alloc_data; + int (*free) (void *); +}; + +extern struct pnx4008_dma_ll *pnx4008_alloc_ll_entry(dma_addr_t *); +extern void pnx4008_free_ll_entry(struct pnx4008_dma_ll *, dma_addr_t); +extern void pnx4008_free_ll(u32 ll_dma, struct pnx4008_dma_ll *); + +extern int pnx4008_request_channel(char *, int, + void (*)(int, int, void *, struct pt_regs *), + void *); +extern void pnx4008_free_channel(int); +extern int pnx4008_config_dma(int, int, int); +extern int pnx4008_dma_pack_control(const struct pnx4008_dma_ch_ctrl *, + unsigned long *); +extern int pnx4008_dma_parse_control(unsigned long, + struct pnx4008_dma_ch_ctrl *); +extern int pnx4008_dma_pack_config(const struct pnx4008_dma_ch_config *, + unsigned long *); +extern int pnx4008_dma_parse_config(unsigned long, + struct pnx4008_dma_ch_config *); +extern int pnx4008_config_channel(int, struct pnx4008_dma_config *); +extern int pnx4008_channel_get_config(int, struct pnx4008_dma_config *); +extern int pnx4008_dma_ch_enable(int); +extern int pnx4008_dma_ch_disable(int); +extern int pnx4008_dma_ch_enabled(int); +extern void pnx4008_dma_split_head_entry(struct pnx4008_dma_config *, + struct pnx4008_dma_ch_ctrl *); +extern void pnx4008_dma_split_ll_entry(struct pnx4008_dma_ll *, + struct pnx4008_dma_ch_ctrl *); + +#endif /* _ASM_ARCH_DMA_H */ diff --git a/include/asm-arm/arch-pnx4008/entry-macro.S b/include/asm-arm/arch-pnx4008/entry-macro.S new file mode 100644 index 00000000000..c1c198e3680 --- /dev/null +++ b/include/asm-arm/arch-pnx4008/entry-macro.S @@ -0,0 +1,121 @@ +/* + * include/asm-arm/arch-pnx4008/entry-macro.S + * + * Low-level IRQ helper macros for PNX4008-based platforms + * + * 2005-2006 (c) MontaVista Software, Inc. + * Author: Vitaly Wool + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include "platform.h" + +#define IO_BASE 0xF0000000 +#define IO_ADDRESS(x) (((((x) & 0xff000000) >> 4) | ((x) & 0xfffff)) | IO_BASE) + +#define INTRC_MASK 0x00 +#define INTRC_RAW_STAT 0x04 +#define INTRC_STAT 0x08 +#define INTRC_POLAR 0x0C +#define INTRC_ACT_TYPE 0x10 +#define INTRC_TYPE 0x14 + +#define SIC1_BASE_INT 32 +#define SIC2_BASE_INT 64 + + .macro disable_fiq + .endm + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp +/* decode the MIC interrupt numbers */ + ldr \base, =IO_ADDRESS(PNX4008_INTCTRLMIC_BASE) + ldr \irqstat, [\base, #INTRC_STAT] + + cmp \irqstat,#1<<16 + movhs \irqnr,#16 + movlo \irqnr,#0 + movhs \irqstat,\irqstat,lsr#16 + cmp \irqstat,#1<<8 + addhs \irqnr,\irqnr,#8 + movhs \irqstat,\irqstat,lsr#8 + cmp \irqstat,#1<<4 + addhs \irqnr,\irqnr,#4 + movhs \irqstat,\irqstat,lsr#4 + cmp \irqstat,#1<<2 + addhs \irqnr,\irqnr,#2 + movhs \irqstat,\irqstat,lsr#2 + cmp \irqstat,#1<<1 + addhs \irqnr,\irqnr,#1 + +/* was there an interrupt ? if not then drop out with EQ status */ + teq \irqstat,#0 + beq 1003f + +/* and now check for extended IRQ reasons */ + cmp \irqnr,#1 + bls 1003f + cmp \irqnr,#30 + blo 1002f + +/* IRQ 31,30 : High priority cascade IRQ handle */ +/* read the correct SIC */ +/* decoding status after compare : eq is 30 (SIC1) , ne is 31 (SIC2) */ +/* set the base IRQ number */ + ldreq \base, =IO_ADDRESS(PNX4008_INTCTRLSIC1_BASE) + moveq \irqnr,#SIC1_BASE_INT + ldrne \base, =IO_ADDRESS(PNX4008_INTCTRLSIC2_BASE) + movne \irqnr,#SIC2_BASE_INT + ldr \irqstat, [\base, #INTRC_STAT] + ldr \tmp, [\base, #INTRC_TYPE] +/* and with inverted mask : low priority interrupts */ + and \irqstat,\irqstat,\tmp + b 1004f + +1003: +/* IRQ 1,0 : Low priority cascade IRQ handle */ +/* read the correct SIC */ +/* decoding status after compare : eq is 1 (SIC2) , ne is 0 (SIC1)*/ +/* read the correct SIC */ +/* set the base IRQ number */ + ldrne \base, =IO_ADDRESS(PNX4008_INTCTRLSIC1_BASE) + movne \irqnr,#SIC1_BASE_INT + ldreq \base, =IO_ADDRESS(PNX4008_INTCTRLSIC2_BASE) + moveq \irqnr,#SIC2_BASE_INT + ldr \irqstat, [\base, #INTRC_STAT] + ldr \tmp, [\base, #INTRC_TYPE] +/* and with inverted mask : low priority interrupts */ + bic \irqstat,\irqstat,\tmp + +1004: + + cmp \irqstat,#1<<16 + addhs \irqnr,\irqnr,#16 + movhs \irqstat,\irqstat,lsr#16 + cmp \irqstat,#1<<8 + addhs \irqnr,\irqnr,#8 + movhs \irqstat,\irqstat,lsr#8 + cmp \irqstat,#1<<4 + addhs \irqnr,\irqnr,#4 + movhs \irqstat,\irqstat,lsr#4 + cmp \irqstat,#1<<2 + addhs \irqnr,\irqnr,#2 + movhs \irqstat,\irqstat,lsr#2 + cmp \irqstat,#1<<1 + addhs \irqnr,\irqnr,#1 + + +/* is irqstat not zero */ + +1002: +/* we assert that irqstat is not equal to zero and return ne status if true*/ + teq \irqstat,#0 +1003: + .endm + + + .macro irq_prio_table + .endm + + diff --git a/include/asm-arm/arch-pnx4008/gpio.h b/include/asm-arm/arch-pnx4008/gpio.h new file mode 100644 index 00000000000..1fa5a77c301 --- /dev/null +++ b/include/asm-arm/arch-pnx4008/gpio.h @@ -0,0 +1,139 @@ +/* + * include/asm-arm/arch-pnx4008/gpio.h + * + * PNX4008 GPIO driver - header file + * + * Author: Dmitry Chigirev + * + * Based on reference code by Iwo Mergler and Z.Tabaaloute from Philips: + * Copyright (c) 2005 Koninklijke Philips Electronics N.V. + * + * 2005 (c) MontaVista Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + */ + +#ifndef _PNX4008_GPIO_H_ +#define _PNX4008_GPIO_H_ + + +/* Block numbers */ +#define GPIO_IN (0) +#define GPIO_OUT (0x100) +#define GPIO_BID (0x200) +#define GPIO_RAM (0x300) +#define GPIO_MUX (0x400) + +#define GPIO_TYPE_MASK(K) ((K) & 0x700) + +/* INPUT GPIOs */ +/* GPI */ +#define GPI_00 (GPIO_IN | 0) +#define GPI_01 (GPIO_IN | 1) +#define GPI_02 (GPIO_IN | 2) +#define GPI_03 (GPIO_IN | 3) +#define GPI_04 (GPIO_IN | 4) +#define GPI_05 (GPIO_IN | 5) +#define GPI_06 (GPIO_IN | 6) +#define GPI_07 (GPIO_IN | 7) +#define GPI_08 (GPIO_IN | 8) +#define GPI_09 (GPIO_IN | 9) +#define U1_RX (GPIO_IN | 15) +#define U2_HTCS (GPIO_IN | 16) +#define U2_RX (GPIO_IN | 17) +#define U3_RX (GPIO_IN | 18) +#define U4_RX (GPIO_IN | 19) +#define U5_RX (GPIO_IN | 20) +#define U6_IRRX (GPIO_IN | 21) +#define U7_HCTS (GPIO_IN | 22) +#define U7_RX (GPIO_IN | 23) +/* MISC IN */ +#define SPI1_DATIN (GPIO_IN | 25) +#define DISP_SYNC (GPIO_IN | 26) +#define SPI2_DATIN (GPIO_IN | 27) +#define GPI_11 (GPIO_IN | 28) + +#define GPIO_IN_MASK 0x1eff83ff + +/* OUTPUT GPIOs */ +/* GPO */ +#define GPO_00 (GPIO_OUT | 0) +#define GPO_01 (GPIO_OUT | 1) +#define GPO_02 (GPIO_OUT | 2) +#define GPO_03 (GPIO_OUT | 3) +#define GPO_04 (GPIO_OUT | 4) +#define GPO_05 (GPIO_OUT | 5) +#define GPO_06 (GPIO_OUT | 6) +#define GPO_07 (GPIO_OUT | 7) +#define GPO_08 (GPIO_OUT | 8) +#define GPO_09 (GPIO_OUT | 9) +#define GPO_10 (GPIO_OUT | 10) +#define GPO_11 (GPIO_OUT | 11) +#define GPO_12 (GPIO_OUT | 12) +#define GPO_13 (GPIO_OUT | 13) +#define GPO_14 (GPIO_OUT | 14) +#define GPO_15 (GPIO_OUT | 15) +#define GPO_16 (GPIO_OUT | 16) +#define GPO_17 (GPIO_OUT | 17) +#define GPO_18 (GPIO_OUT | 18) +#define GPO_19 (GPIO_OUT | 19) +#define GPO_20 (GPIO_OUT | 20) +#define GPO_21 (GPIO_OUT | 21) +#define GPO_22 (GPIO_OUT | 22) +#define GPO_23 (GPIO_OUT | 23) + +#define GPIO_OUT_MASK 0xffffff + +/* BIDIRECTIONAL GPIOs */ +/* RAM pins */ +#define RAM_D19 (GPIO_RAM | 0) +#define RAM_D20 (GPIO_RAM | 1) +#define RAM_D21 (GPIO_RAM | 2) +#define RAM_D22 (GPIO_RAM | 3) +#define RAM_D23 (GPIO_RAM | 4) +#define RAM_D24 (GPIO_RAM | 5) +#define RAM_D25 (GPIO_RAM | 6) +#define RAM_D26 (GPIO_RAM | 7) +#define RAM_D27 (GPIO_RAM | 8) +#define RAM_D28 (GPIO_RAM | 9) +#define RAM_D29 (GPIO_RAM | 10) +#define RAM_D30 (GPIO_RAM | 11) +#define RAM_D31 (GPIO_RAM | 12) + +#define GPIO_RAM_MASK 0x1fff + +/* I/O pins */ +#define GPIO_00 (GPIO_BID | 25) +#define GPIO_01 (GPIO_BID | 26) +#define GPIO_02 (GPIO_BID | 27) +#define GPIO_03 (GPIO_BID | 28) +#define GPIO_04 (GPIO_BID | 29) +#define GPIO_05 (GPIO_BID | 30) + +#define GPIO_BID_MASK 0x7e000000 + +/* Non-GPIO multiplexed PIOs. For multiplexing with GPIO, please use GPIO macros */ +#define GPIO_SDRAM_SEL (GPIO_MUX | 3) + +#define GPIO_MUX_MASK 0x8 + +/* Extraction/assembly macros */ +#define GPIO_BIT_MASK(K) ((K) & 0x1F) +#define GPIO_BIT(K) (1 << GPIO_BIT_MASK(K)) +#define GPIO_ISMUX(K) ((GPIO_TYPE_MASK(K) == GPIO_MUX) && (GPIO_BIT(K) & GPIO_MUX_MASK)) +#define GPIO_ISRAM(K) ((GPIO_TYPE_MASK(K) == GPIO_RAM) && (GPIO_BIT(K) & GPIO_RAM_MASK)) +#define GPIO_ISBID(K) ((GPIO_TYPE_MASK(K) == GPIO_BID) && (GPIO_BIT(K) & GPIO_BID_MASK)) +#define GPIO_ISOUT(K) ((GPIO_TYPE_MASK(K) == GPIO_OUT) && (GPIO_BIT(K) & GPIO_OUT_MASK)) +#define GPIO_ISIN(K) ((GPIO_TYPE_MASK(K) == GPIO_IN) && (GPIO_BIT(K) & GPIO_IN_MASK)) + +extern int pnx4008_gpio_register_pin(unsigned short pin); +extern int pnx4008_gpio_unregister_pin(unsigned short pin); +extern unsigned long pnx4008_gpio_read_pin(unsigned short pin); +extern int pnx4008_gpio_write_pin(unsigned short pin, int output); +extern int pnx4008_gpio_set_pin_direction(unsigned short pin, int output); +extern int pnx4008_gpio_read_pin_direction(unsigned short pin); +extern int pnx4008_gpio_set_pin_mux(unsigned short pin, int output); +extern int pnx4008_gpio_read_pin_mux(unsigned short pin); + +#endif /* _PNX4008_GPIO_H_ */ diff --git a/include/asm-arm/arch-pnx4008/hardware.h b/include/asm-arm/arch-pnx4008/hardware.h new file mode 100644 index 00000000000..a4410397a92 --- /dev/null +++ b/include/asm-arm/arch-pnx4008/hardware.h @@ -0,0 +1,32 @@ +/* + * linux/include/asm-arm/arch-pnx4008/hardware.h + * + * Copyright (c) 2005 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H + +#include +#include + +/* Start of virtual addresses for IO devices */ +#define IO_BASE 0xF0000000 + +/* This macro relies on fact that for all HW i/o addresses bits 20-23 are 0 */ +#define IO_ADDRESS(x) (((((x) & 0xff000000) >> 4) | ((x) & 0xfffff)) | IO_BASE) + +#endif diff --git a/include/asm-arm/arch-pnx4008/io.h b/include/asm-arm/arch-pnx4008/io.h new file mode 100644 index 00000000000..29ee43955c5 --- /dev/null +++ b/include/asm-arm/arch-pnx4008/io.h @@ -0,0 +1,21 @@ + +/* + * include/asm-arm/arch-pnx4008/io.h + * + * Author: Dmitry Chigirev + * + * 2005 (c) MontaVista Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + */ + +#ifndef __ASM_ARM_ARCH_IO_H +#define __ASM_ARM_ARCH_IO_H + +#define IO_SPACE_LIMIT 0xffffffff + +#define __io(a) ((void __iomem *)(a)) +#define __mem_pci(a) (a) + +#endif diff --git a/include/asm-arm/arch-pnx4008/irq.h b/include/asm-arm/arch-pnx4008/irq.h new file mode 100644 index 00000000000..fabff5dc337 --- /dev/null +++ b/include/asm-arm/arch-pnx4008/irq.h @@ -0,0 +1,42 @@ +/* + * include/asm-arm/arch-pnx4008/irq.h + * + * PNX4008 IRQ controller driver - header file + * this one is used in entry-arnv.S as well so it cannot contain C code + * + * Copyright (c) 2005 Philips Semiconductors + * Copyright (c) 2005 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ +#ifndef __PNX4008_IRQ_H__ +#define __PNX4008_IRQ_H__ + +#define MIC_VA_BASE IO_ADDRESS(PNX4008_INTCTRLMIC_BASE) +#define SIC1_VA_BASE IO_ADDRESS(PNX4008_INTCTRLSIC1_BASE) +#define SIC2_VA_BASE IO_ADDRESS(PNX4008_INTCTRLSIC2_BASE) + +/* Manual: Chapter 20, page 195 */ + +#define INTC_BIT(irq) (1<< ((irq) & 0x1F)) + +#define INTC_ER(irq) IO_ADDRESS((PNX4008_INTCTRLMIC_BASE + 0x0 + (((irq)&(0x3<<5))<<9))) +#define INTC_RSR(irq) IO_ADDRESS((PNX4008_INTCTRLMIC_BASE + 0x4 + (((irq)&(0x3<<5))<<9))) +#define INTC_SR(irq) IO_ADDRESS((PNX4008_INTCTRLMIC_BASE + 0x8 + (((irq)&(0x3<<5))<<9))) +#define INTC_APR(irq) IO_ADDRESS((PNX4008_INTCTRLMIC_BASE + 0xC + (((irq)&(0x3<<5))<<9))) +#define INTC_ATR(irq) IO_ADDRESS((PNX4008_INTCTRLMIC_BASE + 0x10 + (((irq)&(0x3<<5))<<9))) +#define INTC_ITR(irq) IO_ADDRESS((PNX4008_INTCTRLMIC_BASE + 0x14 + (((irq)&(0x3<<5))<<9))) + +#define START_INT_REG_BIT(irq) (1<<((irq)&0x1F)) + +#define START_INT_ER_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x20 + (((irq)&(0x1<<5))>>1))) +#define START_INT_RSR_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x24 + (((irq)&(0x1<<5))>>1))) +#define START_INT_SR_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x28 + (((irq)&(0x1<<5))>>1))) +#define START_INT_APR_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x2C + (((irq)&(0x1<<5))>>1))) + +extern void __init pnx4008_init_irq(void); + +#endif /* __PNX4008_IRQ_H__ */ diff --git a/include/asm-arm/arch-pnx4008/irqs.h b/include/asm-arm/arch-pnx4008/irqs.h new file mode 100644 index 00000000000..13ec7ed0f50 --- /dev/null +++ b/include/asm-arm/arch-pnx4008/irqs.h @@ -0,0 +1,215 @@ +/* + * include/asm-arm/arch-pnx4008/irqs.h + * + * PNX4008 IRQ controller driver - header file + * + * Author: Dmitry Chigirev + * + * 2005 (c) MontaVista Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + */ +#ifndef __PNX4008_IRQS_h__ +#define __PNX4008_IRQS_h__ + +#define NR_IRQS 96 + +/*Manual: table 259, page 199*/ + +/*SUB2 Interrupt Routing (SIC2)*/ + +#define SIC2_BASE_INT 64 + +#define CLK_SWITCH_ARM_INT 95 /*manual: Clkswitch ARM */ +#define CLK_SWITCH_DSP_INT 94 /*manual: ClkSwitch DSP */ +#define CLK_SWITCH_AUD_INT 93 /*manual: Clkswitch AUD */ +#define GPI_06_INT 92 +#define GPI_05_INT 91 +#define GPI_04_INT 90 +#define GPI_03_INT 89 +#define GPI_02_INT 88 +#define GPI_01_INT 87 +#define GPI_00_INT 86 +#define BT_CLKREQ_INT 85 +#define SPI1_DATIN_INT 84 +#define U5_RX_INT 83 +#define SDIO_INT_N 82 +#define CAM_HS_INT 81 +#define CAM_VS_INT 80 +#define GPI_07_INT 79 +#define DISP_SYNC_INT 78 +#define DSP_INT8 77 +#define U7_HCTS_INT 76 +#define GPI_10_INT 75 +#define GPI_09_INT 74 +#define GPI_08_INT 73 +#define DSP_INT7 72 +#define U2_HCTS_INT 71 +#define SPI2_DATIN_INT 70 +#define GPIO_05_INT 69 +#define GPIO_04_INT 68 +#define GPIO_03_INT 67 +#define GPIO_02_INT 66 +#define GPIO_01_INT 65 +#define GPIO_00_INT 64 + +/*Manual: table 258, page 198*/ + +/*SUB1 Interrupt Routing (SIC1)*/ + +#define SIC1_BASE_INT 32 + +#define USB_I2C_INT 63 +#define USB_DEV_HP_INT 62 +#define USB_DEV_LP_INT 61 +#define USB_DEV_DMA_INT 60 +#define USB_HOST_INT 59 +#define USB_OTG_ATX_INT_N 58 +#define USB_OTG_TIMER_INT 57 +#define SW_INT 56 +#define SPI1_INT 55 +#define KEY_IRQ 54 +#define DSP_M_INT 53 +#define RTC_INT 52 +#define I2C_1_INT 51 +#define I2C_2_INT 50 +#define PLL1_LOCK_INT 49 +#define PLL2_LOCK_INT 48 +#define PLL3_LOCK_INT 47 +#define PLL4_LOCK_INT 46 +#define PLL5_LOCK_INT 45 +#define SPI2_INT 44 +#define DSP_INT1 43 +#define DSP_INT2 42 +#define DSP_TDM_INT2 41 +#define TS_AUX_INT 40 +#define TS_IRQ 39 +#define TS_P_INT 38 +#define UOUT1_TO_PAD_INT 37 +#define GPI_11_INT 36 +#define DSP_INT4 35 +#define JTAG_COMM_RX_INT 34 +#define JTAG_COMM_TX_INT 33 +#define DSP_INT3 32 + +/*Manual: table 257, page 197*/ + +/*MAIN Interrupt Routing*/ + +#define MAIN_BASE_INT 0 + +#define SUB2_FIQ_N 31 /*active low */ +#define SUB1_FIQ_N 30 /*active low */ +#define JPEG_INT 29 +#define DMA_INT 28 +#define MSTIMER_INT 27 +#define IIR1_INT 26 +#define IIR2_INT 25 +#define IIR7_INT 24 +#define DSP_TDM_INT0 23 +#define DSP_TDM_INT1 22 +#define DSP_P_INT 21 +#define DSP_INT0 20 +#define DUM_INT 19 +#define UOUT0_TO_PAD_INT 18 +#define MP4_ENC_INT 17 +#define MP4_DEC_INT 16 +#define SD0_INT 15 +#define MBX_INT 14 +#define SD1_INT 13 +#define MS_INT_N 12 +#define FLASH_INT 11 /*NAND*/ +#define IIR6_INT 10 +#define IIR5_INT 9 +#define IIR4_INT 8 +#define IIR3_INT 7 +#define WATCH_INT 6 +#define HSTIMER_INT 5 +#define ARCH_TIMER_IRQ HSTIMER_INT +#define CAM_INT 4 +#define PRNG_INT 3 +#define CRYPTO_INT 2 +#define SUB2_IRQ_N 1 /*active low */ +#define SUB1_IRQ_N 0 /*active low */ + +#define PNX4008_IRQ_TYPES \ +{ /*IRQ #'s: */ \ +IRQT_LOW, IRQT_LOW, IRQT_LOW, IRQT_HIGH, /* 0, 1, 2, 3 */ \ +IRQT_LOW, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 4, 5, 6, 7 */ \ +IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 8, 9,10,11 */ \ +IRQT_LOW, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 12,13,14,15 */ \ +IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 16,17,18,19 */ \ +IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 20,21,22,23 */ \ +IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 24,25,26,27 */ \ +IRQT_HIGH, IRQT_HIGH, IRQT_LOW, IRQT_LOW, /* 28,29,30,31 */ \ +IRQT_HIGH, IRQT_LOW, IRQT_HIGH, IRQT_HIGH, /* 32,33,34,35 */ \ +IRQT_HIGH, IRQT_HIGH, IRQT_FALLING, IRQT_HIGH, /* 36,37,38,39 */ \ +IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 40,41,42,43 */ \ +IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 44,45,46,47 */ \ +IRQT_HIGH, IRQT_HIGH, IRQT_LOW, IRQT_LOW, /* 48,49,50,51 */ \ +IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 52,53,54,55 */ \ +IRQT_HIGH, IRQT_HIGH, IRQT_LOW, IRQT_HIGH, /* 56,57,58,59 */ \ +IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 60,61,62,63 */ \ +IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 64,65,66,67 */ \ +IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 68,69,70,71 */ \ +IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 72,73,74,75 */ \ +IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 76,77,78,79 */ \ +IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 80,81,82,83 */ \ +IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 84,85,86,87 */ \ +IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 88,89,90,91 */ \ +IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 92,93,94,95 */ \ +} + +/* Start Enable Pin Interrupts - table 58 page 66 */ + +#define SE_PIN_BASE_INT 32 + +#define SE_U7_RX_INT 63 +#define SE_U7_HCTS_INT 62 +#define SE_BT_CLKREQ_INT 61 +#define SE_U6_IRRX_INT 60 +/*59 unused*/ +#define SE_U5_RX_INT 58 +#define SE_GPI_11_INT 57 +#define SE_U3_RX_INT 56 +#define SE_U2_HCTS_INT 55 +#define SE_U2_RX_INT 54 +#define SE_U1_RX_INT 53 +#define SE_DISP_SYNC_INT 52 +/*51 unused*/ +#define SE_SDIO_INT_N 50 +#define SE_MSDIO_START_INT 49 +#define SE_GPI_06_INT 48 +#define SE_GPI_05_INT 47 +#define SE_GPI_04_INT 46 +#define SE_GPI_03_INT 45 +#define SE_GPI_02_INT 44 +#define SE_GPI_01_INT 43 +#define SE_GPI_00_INT 42 +#define SE_SYSCLKEN_PIN_INT 41 +#define SE_SPI1_DATAIN_INT 40 +#define SE_GPI_07_INT 39 +#define SE_SPI2_DATAIN_INT 38 +#define SE_GPI_10_INT 37 +#define SE_GPI_09_INT 36 +#define SE_GPI_08_INT 35 +/*34-32 unused*/ + +/* Start Enable Internal Interrupts - table 57 page 65 */ + +#define SE_INT_BASE_INT 0 + +#define SE_TS_IRQ 31 +#define SE_TS_P_INT 30 +#define SE_TS_AUX_INT 29 +/*27-28 unused*/ +#define SE_USB_AHB_NEED_CLK_INT 26 +#define SE_MSTIMER_INT 25 +#define SE_RTC_INT 24 +#define SE_USB_NEED_CLK_INT 23 +#define SE_USB_INT 22 +#define SE_USB_I2C_INT 21 +#define SE_USB_OTG_TIMER_INT 20 + +#endif /* __PNX4008_IRQS_h__ */ diff --git a/include/asm-arm/arch-pnx4008/memory.h b/include/asm-arm/arch-pnx4008/memory.h new file mode 100644 index 00000000000..0d8268a9526 --- /dev/null +++ b/include/asm-arm/arch-pnx4008/memory.h @@ -0,0 +1,24 @@ +/* + * linux/include/asm-arm/arch-pnx4008/memory.h + * + * Copyright (c) 2005 Philips Semiconductors + * Copyright (c) 2005 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef __ASM_ARCH_MEMORY_H +#define __ASM_ARCH_MEMORY_H + +/* + * Physical DRAM offset. + */ +#define PHYS_OFFSET (0x80000000) + +#define __virt_to_bus(x) ((x) - PAGE_OFFSET + PHYS_OFFSET) +#define __bus_to_virt(x) ((x) + PAGE_OFFSET - PHYS_OFFSET) + +#endif diff --git a/include/asm-arm/arch-pnx4008/param.h b/include/asm-arm/arch-pnx4008/param.h new file mode 100644 index 00000000000..95d5f547b41 --- /dev/null +++ b/include/asm-arm/arch-pnx4008/param.h @@ -0,0 +1,21 @@ +/* + * linux/include/asm-arm/arch-pnx4008/param.h + * + * Copyright (C) 1999 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#define HZ 100 diff --git a/include/asm-arm/arch-pnx4008/platform.h b/include/asm-arm/arch-pnx4008/platform.h new file mode 100644 index 00000000000..485a3651b4d --- /dev/null +++ b/include/asm-arm/arch-pnx4008/platform.h @@ -0,0 +1,69 @@ +/* + * include/asm-arm/arch-pnx4008/platfrom.h + * + * PNX4008 Base addresses - header file + * + * Author: Dmitry Chigirev + * + * Based on reference code received from Philips: + * Copyright (C) 2003 Philips Semiconductors + * + * 2005 (c) MontaVista Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + */ + + +#ifndef __ASM_ARCH_PLATFORM_H__ +#define __ASM_ARCH_PLATFORM_H__ + +#define PNX4008_IRAM_BASE 0x08000000 +#define PNX4008_IRAM_SIZE 0x00010000 +#define PNX4008_YUV_SLAVE_BASE 0x10000000 +#define PNX4008_DUM_SLAVE_BASE 0x18000000 +#define PNX4008_NDF_FLASH_BASE 0x20020000 +#define PNX4008_SPI1_BASE 0x20088000 +#define PNX4008_SPI2_BASE 0x20090000 +#define PNX4008_SD_CONFIG_BASE 0x20098000 +#define PNX4008_FLASH_DATA 0x200B0000 +#define PNX4008_MLC_FLASH_BASE 0x200B8000 +#define PNX4008_JPEG_CONFIG_BASE 0x300A0000 +#define PNX4008_DMA_CONFIG_BASE 0x31000000 +#define PNX4008_USB_CONFIG_BASE 0x31020000 +#define PNX4008_SDRAM_CFG_BASE 0x31080000 +#define PNX4008_AHB2FAB_BASE 0x40000000 +#define PNX4008_PWRMAN_BASE 0x40004000 +#define PNX4008_INTCTRLMIC_BASE 0x40008000 +#define PNX4008_INTCTRLSIC1_BASE 0x4000C000 +#define PNX4008_INTCTRLSIC2_BASE 0x40010000 +#define PNX4008_HSUART1_BASE 0x40014000 +#define PNX4008_HSUART2_BASE 0x40018000 +#define PNX4008_HSUART7_BASE 0x4001C000 +#define PNX4008_RTC_BASE 0x40024000 +#define PNX4008_PIO_BASE 0x40028000 +#define PNX4008_MSTIMER_BASE 0x40034000 +#define PNX4008_HSTIMER_BASE 0x40038000 +#define PNX4008_WDOG_BASE 0x4003C000 +#define PNX4008_DEBUG_BASE 0x40040000 +#define PNX4008_TOUCH1_BASE 0x40048000 +#define PNX4008_KEYSCAN_BASE 0x40050000 +#define PNX4008_UARTCTRL_BASE 0x40054000 +#define PNX4008_PWM_BASE 0x4005C000 +#define PNX4008_UART3_BASE 0x40080000 +#define PNX4008_UART4_BASE 0x40088000 +#define PNX4008_UART5_BASE 0x40090000 +#define PNX4008_UART6_BASE 0x40098000 +#define PNX4008_I2C1_BASE 0x400A0000 +#define PNX4008_I2C2_BASE 0x400A8000 +#define PNX4008_MAGICGATE_BASE 0x400B0000 +#define PNX4008_DUMCONF_BASE 0x400B8000 +#define PNX4008_DUM_MAINCFG_BASE 0x400BC000 +#define PNX4008_DSP_BASE 0x400C0000 +#define PNX4008_PROFCOUNTER_BASE 0x400C8000 +#define PNX4008_CRYPTO_BASE 0x400D0000 +#define PNX4008_CAMIFCONF_BASE 0x400D8000 +#define PNX4008_YUV2RGB_BASE 0x400E0000 +#define PNX4008_AUDIOCONFIG_BASE 0x400E8000 + +#endif diff --git a/include/asm-arm/arch-pnx4008/pm.h b/include/asm-arm/arch-pnx4008/pm.h new file mode 100644 index 00000000000..c660486670f --- /dev/null +++ b/include/asm-arm/arch-pnx4008/pm.h @@ -0,0 +1,62 @@ +/* + * include/asm-arm/arch-pnx4008/pm.h + * + * PNX4008 Power Management Routiness - header file + * + * Authors: Vitaly Wool, Dmitry Chigirev + * + * 2005 (c) MontaVista Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + */ + +#ifndef __ASM_ARCH_PNX4008_PM_H +#define __ASM_ARCH_PNX4008_PM_H + +#ifndef __ASSEMBLER__ +#include "irq.h" +#include "irqs.h" +#include "clock.h" + +extern void pnx4008_pm_idle(void); +extern void pnx4008_pm_suspend(void); +extern unsigned int pnx4008_cpu_suspend_sz; +extern void pnx4008_cpu_suspend(void); +extern unsigned int pnx4008_cpu_standby_sz; +extern void pnx4008_cpu_standby(void); + +extern int pnx4008_startup_pll(struct clk *); +extern int pnx4008_shutdown_pll(struct clk *); + +static inline void start_int_umask(u8 irq) +{ + __raw_writel(__raw_readl(START_INT_ER_REG(irq)) | + START_INT_REG_BIT(irq), START_INT_ER_REG(irq)); +} + +static inline void start_int_mask(u8 irq) +{ + __raw_writel(__raw_readl(START_INT_ER_REG(irq)) & + ~START_INT_REG_BIT(irq), START_INT_ER_REG(irq)); +} + +static inline void start_int_ack(u8 irq) +{ + __raw_writel(START_INT_REG_BIT(irq), START_INT_RSR_REG(irq)); +} + +static inline void start_int_set_falling_edge(u8 irq) +{ + __raw_writel(__raw_readl(START_INT_APR_REG(irq)) & + ~START_INT_REG_BIT(irq), START_INT_APR_REG(irq)); +} + +static inline void start_int_set_rising_edge(u8 irq) +{ + __raw_writel(__raw_readl(START_INT_APR_REG(irq)) | + START_INT_REG_BIT(irq), START_INT_APR_REG(irq)); +} + +#endif /* ASSEMBLER */ +#endif /* __ASM_ARCH_PNX4008_PM_H */ diff --git a/include/asm-arm/arch-pnx4008/system.h b/include/asm-arm/arch-pnx4008/system.h new file mode 100644 index 00000000000..6e3da70ab10 --- /dev/null +++ b/include/asm-arm/arch-pnx4008/system.h @@ -0,0 +1,38 @@ +/* + * linux/include/asm-arm/arch-pnx4008/system.h + * + * Copyright (C) 2003 Philips Semiconductors + * Copyright (C) 2005 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +#include +#include +#include + +static void arch_idle(void) +{ + cpu_do_idle(); +} + +static inline void arch_reset(char mode) +{ + cpu_reset(0); +} + +#endif diff --git a/include/asm-arm/arch-pnx4008/timex.h b/include/asm-arm/arch-pnx4008/timex.h new file mode 100644 index 00000000000..ee470a39089 --- /dev/null +++ b/include/asm-arm/arch-pnx4008/timex.h @@ -0,0 +1,73 @@ +/* + * include/asm-arm/arch-pnx4008/timex.h + * + * PNX4008 timers header file + * + * Author: Dmitry Chigirev + * + * 2005 (c) MontaVista Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + */ + +#ifndef __PNX4008_TIMEX_H +#define __PNX4008_TIMEX_H + +#include +#include + +#define CLOCK_TICK_RATE 1000000 + +#define TICKS2USECS(x) (x) + +/* MilliSecond Timer - Chapter 21 Page 202 */ + +#define MSTIM_INT IO_ADDRESS((PNX4008_MSTIMER_BASE + 0x0)) +#define MSTIM_CTRL IO_ADDRESS((PNX4008_MSTIMER_BASE + 0x4)) +#define MSTIM_COUNTER IO_ADDRESS((PNX4008_MSTIMER_BASE + 0x8)) +#define MSTIM_MCTRL IO_ADDRESS((PNX4008_MSTIMER_BASE + 0x14)) +#define MSTIM_MATCH0 IO_ADDRESS((PNX4008_MSTIMER_BASE + 0x18)) +#define MSTIM_MATCH1 IO_ADDRESS((PNX4008_MSTIMER_BASE + 0x1c)) + +/* High Speed Timer - Chpater 22, Page 205 */ + +#define HSTIM_INT IO_ADDRESS((PNX4008_HSTIMER_BASE + 0x0)) +#define HSTIM_CTRL IO_ADDRESS((PNX4008_HSTIMER_BASE + 0x4)) +#define HSTIM_COUNTER IO_ADDRESS((PNX4008_HSTIMER_BASE + 0x8)) +#define HSTIM_PMATCH IO_ADDRESS((PNX4008_HSTIMER_BASE + 0xC)) +#define HSTIM_PCOUNT IO_ADDRESS((PNX4008_HSTIMER_BASE + 0x10)) +#define HSTIM_MCTRL IO_ADDRESS((PNX4008_HSTIMER_BASE + 0x14)) +#define HSTIM_MATCH0 IO_ADDRESS((PNX4008_HSTIMER_BASE + 0x18)) +#define HSTIM_MATCH1 IO_ADDRESS((PNX4008_HSTIMER_BASE + 0x1c)) +#define HSTIM_MATCH2 IO_ADDRESS((PNX4008_HSTIMER_BASE + 0x20)) +#define HSTIM_CCR IO_ADDRESS((PNX4008_HSTIMER_BASE + 0x28)) +#define HSTIM_CR0 IO_ADDRESS((PNX4008_HSTIMER_BASE + 0x2C)) +#define HSTIM_CR1 IO_ADDRESS((PNX4008_HSTIMER_BASE + 0x30)) + +/* IMPORTANT: both timers are UPCOUNTING */ + +/* xSTIM_MCTRL bit definitions */ +#define MR0_INT 1 +#define RESET_COUNT0 (1<<1) +#define STOP_COUNT0 (1<<2) +#define MR1_INT (1<<3) +#define RESET_COUNT1 (1<<4) +#define STOP_COUNT1 (1<<5) +#define MR2_INT (1<<6) +#define RESET_COUNT2 (1<<7) +#define STOP_COUNT2 (1<<8) + +/* xSTIM_CTRL bit definitions */ +#define COUNT_ENAB 1 +#define RESET_COUNT (1<<1) +#define DEBUG_EN (1<<2) + +/* xSTIM_INT bit definitions */ +#define MATCH0_INT 1 +#define MATCH1_INT (1<<1) +#define MATCH2_INT (1<<2) +#define RTC_TICK0 (1<<4) +#define RTC_TICK1 (1<<5) + +#endif diff --git a/include/asm-arm/arch-pnx4008/uncompress.h b/include/asm-arm/arch-pnx4008/uncompress.h new file mode 100644 index 00000000000..8fa4d24b72b --- /dev/null +++ b/include/asm-arm/arch-pnx4008/uncompress.h @@ -0,0 +1,46 @@ +/* + * linux/include/asm-arm/arch-pnx4008/uncompress.h + * + * Copyright (C) 1999 ARM Limited + * Copyright (C) 2006 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#define UART5_BASE 0x40090000 + +#define UART5_DR (*(volatile unsigned char *) (UART5_BASE)) +#define UART5_FR (*(volatile unsigned char *) (UART5_BASE + 18)) + +static __inline__ void putc(char c) +{ + while (UART5_FR & (1 << 5)) + barrier(); + + UART5_DR = c; +} + +/* + * This does not append a newline + */ +static inline void flush(void) +{ +} + +/* + * nothing to do + */ +#define arch_decomp_setup() +#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-pnx4008/vmalloc.h b/include/asm-arm/arch-pnx4008/vmalloc.h new file mode 100644 index 00000000000..140d925f6f3 --- /dev/null +++ b/include/asm-arm/arch-pnx4008/vmalloc.h @@ -0,0 +1,20 @@ +/* + * include/asm-arm/arch-pnx4008/vmalloc.h + * + * Author: Vitaly Wool + * + * 2006 (c) MontaVista Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + */ + +/* + * Just any arbitrary offset to the start of the vmalloc VM area: the + * current 8MB value just means that there will be a 8MB "hole" after the + * physical memory until the kernel virtual memory starts. That means that + * any out-of-bounds memory accesses will hopefully be caught. + * The vmalloc() routines leaves a hole of 4kB between each vmalloced + * area for the same reason. ;) + */ +#define VMALLOC_END (PAGE_OFFSET + 0x10000000) -- cgit v1.2.3-70-g09d2 From 68d5969378fc21d9f70c0fdbc25176a68d873922 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Sun, 18 Jun 2006 16:21:52 +0100 Subject: [ARM] 3552/1: S3C24XX: Move VA of GPIO for low-level debug Patch from Ben Dooks Using the low-level debug routines early in the kernel debug cause the 1:1 mapping to get into the TLB, which is not flushed until after the CPU detection process (which needs the GPIO VA). This patch moves the VA for the GPIO to the same offset as the physical offset of the UART to the GPIO. Signed-off-by: Ben Dooks Signed-off-by: Russell King --- include/asm-arm/arch-s3c2410/map.h | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-s3c2410/map.h b/include/asm-arm/arch-s3c2410/map.h index c380d264a84..5e4c8c37bc6 100644 --- a/include/asm-arm/arch-s3c2410/map.h +++ b/include/asm-arm/arch-s3c2410/map.h @@ -126,9 +126,18 @@ #define S3C24XX_SZ_IIS SZ_1M /* GPIO ports */ -#define S3C24XX_VA_GPIO S3C2410_ADDR(0x00E00000) + +/* the calculation for the VA of this must ensure that + * it is the same distance apart from the UART in the + * phsyical address space, as the initial mapping for the IO + * is done as a 1:1 maping. This puts it (currently) at + * 0xF6800000, which is not in the way of any current mapping + * by the base system. +*/ + #define S3C2400_PA_GPIO (0x15600000) #define S3C2410_PA_GPIO (0x56000000) +#define S3C24XX_VA_GPIO ((S3C2410_PA_GPIO - S3C24XX_PA_UART) + S3C24XX_VA_UART) #define S3C24XX_SZ_GPIO SZ_1M /* RTC */ -- cgit v1.2.3-70-g09d2 From ebc67da65fda03cbe5b4019d91229287fddd5c6e Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Sun, 18 Jun 2006 16:26:58 +0100 Subject: [ARM] 3554/1: ARM: Fix dyntick locking Patch from Tony Lindgren This patch fixes some dyntick locking issues on ARM as pointed out by Russell King. Signed-off-by: Tony Lindgren Signed-off-by: Russell King --- arch/arm/kernel/irq.c | 4 ++-- arch/arm/kernel/time.c | 24 +++++++++++++++++------- include/asm-arm/mach/time.h | 1 + 3 files changed, 20 insertions(+), 9 deletions(-) (limited to 'include/asm-arm') diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c index 2d5896b3618..bcc19fbb32d 100644 --- a/arch/arm/kernel/irq.c +++ b/arch/arm/kernel/irq.c @@ -342,10 +342,10 @@ __do_irq(unsigned int irq, struct irqaction *action, struct pt_regs *regs) #ifdef CONFIG_NO_IDLE_HZ if (!(action->flags & SA_TIMER) && system_timer->dyn_tick != NULL) { - write_seqlock(&xtime_lock); + spin_lock(&system_timer->dyn_tick->lock); if (system_timer->dyn_tick->state & DYN_TICK_ENABLED) system_timer->dyn_tick->handler(irq, 0, regs); - write_sequnlock(&xtime_lock); + spin_unlock(&system_timer->dyn_tick->lock); } #endif diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c index d6bd435a685..9c12d4fefbd 100644 --- a/arch/arm/kernel/time.c +++ b/arch/arm/kernel/time.c @@ -379,7 +379,7 @@ static int timer_dyn_tick_enable(void) int ret = -ENODEV; if (dyn_tick) { - write_seqlock_irqsave(&xtime_lock, flags); + spin_lock_irqsave(&dyn_tick->lock, flags); ret = 0; if (!(dyn_tick->state & DYN_TICK_ENABLED)) { ret = dyn_tick->enable(); @@ -387,7 +387,7 @@ static int timer_dyn_tick_enable(void) if (ret == 0) dyn_tick->state |= DYN_TICK_ENABLED; } - write_sequnlock_irqrestore(&xtime_lock, flags); + spin_unlock_irqrestore(&dyn_tick->lock, flags); } return ret; @@ -400,7 +400,7 @@ static int timer_dyn_tick_disable(void) int ret = -ENODEV; if (dyn_tick) { - write_seqlock_irqsave(&xtime_lock, flags); + spin_lock_irqsave(&dyn_tick->lock, flags); ret = 0; if (dyn_tick->state & DYN_TICK_ENABLED) { ret = dyn_tick->disable(); @@ -408,7 +408,7 @@ static int timer_dyn_tick_disable(void) if (ret == 0) dyn_tick->state &= ~DYN_TICK_ENABLED; } - write_sequnlock_irqrestore(&xtime_lock, flags); + spin_unlock_irqrestore(&dyn_tick->lock, flags); } return ret; @@ -422,15 +422,20 @@ static int timer_dyn_tick_disable(void) void timer_dyn_reprogram(void) { struct dyn_tick_timer *dyn_tick = system_timer->dyn_tick; - unsigned long next, seq; + unsigned long next, seq, flags; - if (dyn_tick && (dyn_tick->state & DYN_TICK_ENABLED)) { + if (!dyn_tick) + return; + + spin_lock_irqsave(&dyn_tick->lock, flags); + if (dyn_tick->state & DYN_TICK_ENABLED) { next = next_timer_interrupt(); do { seq = read_seqbegin(&xtime_lock); - dyn_tick->reprogram(next_timer_interrupt() - jiffies); + dyn_tick->reprogram(next - jiffies); } while (read_seqretry(&xtime_lock, seq)); } + spin_unlock_irqrestore(&dyn_tick->lock, flags); } static ssize_t timer_show_dyn_tick(struct sys_device *dev, char *buf) @@ -499,5 +504,10 @@ void __init time_init(void) if (system_timer->offset == NULL) system_timer->offset = dummy_gettimeoffset; system_timer->init(); + +#ifdef CONFIG_NO_IDLE_HZ + if (system_timer->dyn_tick) + system_timer->dyn_tick->lock = SPIN_LOCK_UNLOCKED; +#endif } diff --git a/include/asm-arm/mach/time.h b/include/asm-arm/mach/time.h index 96c6db7dd0e..9f28073559e 100644 --- a/include/asm-arm/mach/time.h +++ b/include/asm-arm/mach/time.h @@ -50,6 +50,7 @@ struct sys_timer { #define DYN_TICK_ENABLED (1 << 1) struct dyn_tick_timer { + spinlock_t lock; unsigned int state; /* Current state */ int (*enable)(void); /* Enables dynamic tick */ int (*disable)(void); /* Disables dynamic tick */ -- cgit v1.2.3-70-g09d2 From 96ce2385dd2817da549910001a69ac0a2762a1b9 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Sun, 18 Jun 2006 23:06:41 +0100 Subject: [ARM] 3559/1: S3C2442: core and serial port Patch from Ben Dooks Core support for the Samsung S3C2442, and the serial port driver update to allow the serial port blocks to be used. Signed-off-by: Ben Dooks Signed-off-by: Russell King --- arch/arm/mach-s3c2410/Kconfig | 26 +++++ arch/arm/mach-s3c2410/Makefile | 10 ++ arch/arm/mach-s3c2410/clock.c | 2 +- arch/arm/mach-s3c2410/cpu.c | 24 +++- arch/arm/mach-s3c2410/cpu.h | 1 + arch/arm/mach-s3c2410/s3c2440-irq.c | 77 +------------ arch/arm/mach-s3c2410/s3c2440.c | 142 +---------------------- arch/arm/mach-s3c2410/s3c2442-clock.c | 171 ++++++++++++++++++++++++++++ arch/arm/mach-s3c2410/s3c2442.c | 52 +++++++++ arch/arm/mach-s3c2410/s3c2442.h | 17 +++ arch/arm/mach-s3c2410/s3c244x-irq.c | 142 +++++++++++++++++++++++ arch/arm/mach-s3c2410/s3c244x.c | 182 ++++++++++++++++++++++++++++++ arch/arm/mach-s3c2410/s3c244x.h | 25 ++++ drivers/serial/s3c2410.c | 2 +- include/asm-arm/arch-s3c2410/regs-clock.h | 6 +- include/asm-arm/arch-s3c2410/regs-gpio.h | 5 + include/asm-arm/arch-s3c2410/uncompress.h | 5 +- 17 files changed, 664 insertions(+), 225 deletions(-) create mode 100644 arch/arm/mach-s3c2410/s3c2442-clock.c create mode 100644 arch/arm/mach-s3c2410/s3c2442.c create mode 100644 arch/arm/mach-s3c2410/s3c2442.h create mode 100644 arch/arm/mach-s3c2410/s3c244x-irq.c create mode 100644 arch/arm/mach-s3c2410/s3c244x.c create mode 100644 arch/arm/mach-s3c2410/s3c244x.h (limited to 'include/asm-arm') diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig index 970f98dadff..0c334136db7 100644 --- a/arch/arm/mach-s3c2410/Kconfig +++ b/arch/arm/mach-s3c2410/Kconfig @@ -70,6 +70,18 @@ config ARCH_S3C2440 help Say Y here if you are using the SMDK2440. +config SMDK2440_CPU2440 + bool "SMDK2440 with S3C2440 cpu module" + depends on ARCH_S3C2440 + default y if ARCH_S3C2440 + select CPU_S3C2440 + +config SMDK2440_CPU2442 + bool "SMDM2440 with S3C2442 cpu module" + depends on ARCH_S3C2440 + select CPU_S3C2442 + + config MACH_VR1000 bool "Thorcom VR1000" select CPU_S3C2410 @@ -109,12 +121,26 @@ config CPU_S3C2410 Support for S3C2410 and S3C2410A family from the S3C24XX line of Samsung Mobile CPUs. +config CPU_S3C244X + bool + depends on ARCH_S3C2410 && (CPU_S3C2440 || CPU_S3C2442) + help + Support for S3C2440 and S3C2442 Samsung Mobile CPU based systems. + config CPU_S3C2440 bool depends on ARCH_S3C2410 + select CPU_S3C244X help Support for S3C2440 Samsung Mobile CPU based systems. +config CPU_S3C2442 + bool + depends on ARCH_S3C2420 + select CPU_S3C244X + help + Support for S3C2442 Samsung Mobile CPU based systems. + comment "S3C2410 Boot" config S3C2410_BOOT_WATCHDOG diff --git a/arch/arm/mach-s3c2410/Makefile b/arch/arm/mach-s3c2410/Makefile index 3e5712db6b5..5e09355cd4f 100644 --- a/arch/arm/mach-s3c2410/Makefile +++ b/arch/arm/mach-s3c2410/Makefile @@ -24,6 +24,11 @@ obj-$(CONFIG_S3C2410_DMA) += dma.o obj-$(CONFIG_PM) += pm.o sleep.o obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o +# S3C244X support + +obj-$(CONFIG_CPU_S3C244X) += s3c244x.o +obj-$(CONFIG_CPU_S3C244X) += s3c244x-irq.o + # S3C2440 support obj-$(CONFIG_CPU_S3C2440) += s3c2440.o s3c2440-dsc.o @@ -31,6 +36,11 @@ obj-$(CONFIG_CPU_S3C2440) += s3c2440-irq.o obj-$(CONFIG_CPU_S3C2440) += s3c2440-clock.o obj-$(CONFIG_CPU_S3C2440) += s3c2410-gpio.o +# S3C2442 support + +obj-$(CONFIG_CPU_S3C2442) += s3c2442.o +obj-$(CONFIG_CPU_S3C2442) += s3c2442-clock.o + # bast extras obj-$(CONFIG_BAST_PC104_IRQ) += bast-irq.o diff --git a/arch/arm/mach-s3c2410/clock.c b/arch/arm/mach-s3c2410/clock.c index 6de713ad319..99d174612b5 100644 --- a/arch/arm/mach-s3c2410/clock.c +++ b/arch/arm/mach-s3c2410/clock.c @@ -70,7 +70,7 @@ void inline s3c24xx_clk_enable(unsigned int clocks, unsigned int enable) clkcon &= ~clocks; /* ensure none of the special function bits set */ - clkcon &= ~(S3C2410_CLKCON_IDLE|S3C2410_CLKCON_POWER); + clkcon &= ~(S3C2410_CLKCON_IDLE|S3C2410_CLKCON_POWER | 3); __raw_writel(clkcon, S3C2410_CLKCON); } diff --git a/arch/arm/mach-s3c2410/cpu.c b/arch/arm/mach-s3c2410/cpu.c index acc58adfbd2..52842e6e86e 100644 --- a/arch/arm/mach-s3c2410/cpu.c +++ b/arch/arm/mach-s3c2410/cpu.c @@ -44,7 +44,9 @@ #include "clock.h" #include "s3c2400.h" #include "s3c2410.h" +#include "s3c244x.h" #include "s3c2440.h" +#include "s3c2442.h" struct cpu_table { unsigned long idcode; @@ -61,6 +63,7 @@ struct cpu_table { static const char name_s3c2400[] = "S3C2400"; static const char name_s3c2410[] = "S3C2410"; static const char name_s3c2440[] = "S3C2440"; +static const char name_s3c2442[] = "S3C2442"; static const char name_s3c2410a[] = "S3C2410A"; static const char name_s3c2440a[] = "S3C2440A"; @@ -86,21 +89,30 @@ static struct cpu_table cpu_ids[] __initdata = { { .idcode = 0x32440000, .idmask = 0xffffffff, - .map_io = s3c2440_map_io, - .init_clocks = s3c2440_init_clocks, - .init_uarts = s3c2440_init_uarts, + .map_io = s3c244x_map_io, + .init_clocks = s3c244x_init_clocks, + .init_uarts = s3c244x_init_uarts, .init = s3c2440_init, .name = name_s3c2440 }, { .idcode = 0x32440001, .idmask = 0xffffffff, - .map_io = s3c2440_map_io, - .init_clocks = s3c2440_init_clocks, - .init_uarts = s3c2440_init_uarts, + .map_io = s3c244x_map_io, + .init_clocks = s3c244x_init_clocks, + .init_uarts = s3c244x_init_uarts, .init = s3c2440_init, .name = name_s3c2440a }, + { + .idcode = 0x32440aaa, + .idmask = 0xffffffff, + .map_io = s3c244x_map_io, + .init_clocks = s3c244x_init_clocks, + .init_uarts = s3c244x_init_uarts, + .init = s3c2442_init, + .name = name_s3c2442 + }, { .idcode = 0x0, /* S3C2400 doesn't have an idcode */ .idmask = 0xffffffff, diff --git a/arch/arm/mach-s3c2410/cpu.h b/arch/arm/mach-s3c2410/cpu.h index 0c776acb063..40862899b2f 100644 --- a/arch/arm/mach-s3c2410/cpu.h +++ b/arch/arm/mach-s3c2410/cpu.h @@ -74,3 +74,4 @@ extern struct sys_timer s3c24xx_timer; /* system device classes */ extern struct sysdev_class s3c2440_sysclass; +extern struct sysdev_class s3c2442_sysclass; diff --git a/arch/arm/mach-s3c2410/s3c2440-irq.c b/arch/arm/mach-s3c2410/s3c2440-irq.c index 278d0044c85..acfe3870727 100644 --- a/arch/arm/mach-s3c2410/s3c2440-irq.c +++ b/arch/arm/mach-s3c2410/s3c2440-irq.c @@ -100,73 +100,12 @@ static struct irqchip s3c_irq_wdtac97 = { .ack = s3c_irq_wdtac97_ack, }; -/* camera irq */ - -static void s3c_irq_demux_cam(unsigned int irq, - struct irqdesc *desc, - struct pt_regs *regs) -{ - unsigned int subsrc, submsk; - struct irqdesc *mydesc; - - /* read the current pending interrupts, and the mask - * for what it is available */ - - subsrc = __raw_readl(S3C2410_SUBSRCPND); - submsk = __raw_readl(S3C2410_INTSUBMSK); - - subsrc &= ~submsk; - subsrc >>= 11; - subsrc &= 3; - - if (subsrc != 0) { - if (subsrc & 1) { - mydesc = irq_desc + IRQ_S3C2440_CAM_C; - desc_handle_irq(IRQ_S3C2440_CAM_C, mydesc, regs); - } - if (subsrc & 2) { - mydesc = irq_desc + IRQ_S3C2440_CAM_P; - desc_handle_irq(IRQ_S3C2440_CAM_P, mydesc, regs); - } - } -} - -#define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0)) - -static void -s3c_irq_cam_mask(unsigned int irqno) -{ - s3c_irqsub_mask(irqno, INTMSK_CAM, 3<<11); -} - -static void -s3c_irq_cam_unmask(unsigned int irqno) -{ - s3c_irqsub_unmask(irqno, INTMSK_CAM); -} - -static void -s3c_irq_cam_ack(unsigned int irqno) -{ - s3c_irqsub_maskack(irqno, INTMSK_CAM, 3<<11); -} - -static struct irqchip s3c_irq_cam = { - .mask = s3c_irq_cam_mask, - .unmask = s3c_irq_cam_unmask, - .ack = s3c_irq_cam_ack, -}; - static int s3c2440_irq_add(struct sys_device *sysdev) { unsigned int irqno; printk("S3C2440: IRQ Support\n"); - set_irq_chip(IRQ_NFCON, &s3c_irq_level_chip); - set_irq_handler(IRQ_NFCON, do_level_IRQ); - set_irq_flags(IRQ_NFCON, IRQF_VALID); - /* add new chained handler for wdt, ac7 */ set_irq_chip(IRQ_WDT, &s3c_irq_level_chip); @@ -179,18 +118,6 @@ static int s3c2440_irq_add(struct sys_device *sysdev) set_irq_flags(irqno, IRQF_VALID); } - /* add chained handler for camera */ - - set_irq_chip(IRQ_CAM, &s3c_irq_level_chip); - set_irq_handler(IRQ_CAM, do_level_IRQ); - set_irq_chained_handler(IRQ_CAM, s3c_irq_demux_cam); - - for (irqno = IRQ_S3C2440_CAM_C; irqno <= IRQ_S3C2440_CAM_P; irqno++) { - set_irq_chip(irqno, &s3c_irq_cam); - set_irq_handler(irqno, do_level_IRQ); - set_irq_flags(irqno, IRQF_VALID); - } - return 0; } @@ -198,10 +125,10 @@ static struct sysdev_driver s3c2440_irq_driver = { .add = s3c2440_irq_add, }; -static int s3c24xx_irq_driver(void) +static int s3c2440_irq_init(void) { return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_irq_driver); } -arch_initcall(s3c24xx_irq_driver); +arch_initcall(s3c2440_irq_init); diff --git a/arch/arm/mach-s3c2410/s3c2440.c b/arch/arm/mach-s3c2410/s3c2440.c index 54681740f9f..0ab50f44f31 100644 --- a/arch/arm/mach-s3c2410/s3c2440.c +++ b/arch/arm/mach-s3c2410/s3c2440.c @@ -1,6 +1,6 @@ /* linux/arch/arm/mach-s3c2410/s3c2440.c * - * Copyright (c) 2004-2005 Simtec Electronics + * Copyright (c) 2004-2006 Simtec Electronics * Ben Dooks * * Samsung S3C2440 Mobile CPU support @@ -8,16 +8,6 @@ * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. - * - * Modifications: - * 24-Aug-2004 BJD Start of s3c2440 support - * 12-Oct-2004 BJD Moved clock info out to clock.c - * 01-Nov-2004 BJD Fixed clock build code - * 09-Nov-2004 BJD Added sysdev for power management - * 04-Nov-2004 BJD New serial registration - * 15-Nov-2004 BJD Rename the i2c device for the s3c2440 - * 14-Jan-2005 BJD Moved clock init code into seperate function - * 14-Jan-2005 BJD Removed un-used clock bits */ #include @@ -50,144 +40,20 @@ #include "cpu.h" #include "pm.h" - -static struct map_desc s3c2440_iodesc[] __initdata = { - IODESC_ENT(USBHOST), - IODESC_ENT(CLKPWR), - IODESC_ENT(LCD), - IODESC_ENT(TIMER), - IODESC_ENT(ADC), - IODESC_ENT(WATCHDOG), -}; - -/* uart initialisation */ - -void __init s3c2440_init_uarts(struct s3c2410_uartcfg *cfg, int no) -{ - s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no); -} - -#ifdef CONFIG_PM - -static struct sleep_save s3c2440_sleep[] = { - SAVE_ITEM(S3C2440_DSC0), - SAVE_ITEM(S3C2440_DSC1), - SAVE_ITEM(S3C2440_GPJDAT), - SAVE_ITEM(S3C2440_GPJCON), - SAVE_ITEM(S3C2440_GPJUP) -}; - -static int s3c2440_suspend(struct sys_device *dev, pm_message_t state) -{ - s3c2410_pm_do_save(s3c2440_sleep, ARRAY_SIZE(s3c2440_sleep)); - return 0; -} - -static int s3c2440_resume(struct sys_device *dev) -{ - s3c2410_pm_do_restore(s3c2440_sleep, ARRAY_SIZE(s3c2440_sleep)); - return 0; -} - -#else -#define s3c2440_suspend NULL -#define s3c2440_resume NULL -#endif - -struct sysdev_class s3c2440_sysclass = { - set_kset_name("s3c2440-core"), - .suspend = s3c2440_suspend, - .resume = s3c2440_resume -}; - static struct sys_device s3c2440_sysdev = { .cls = &s3c2440_sysclass, }; -void __init s3c2440_map_io(struct map_desc *mach_desc, int size) +int __init s3c2440_init(void) { - /* register our io-tables */ - - iotable_init(s3c2440_iodesc, ARRAY_SIZE(s3c2440_iodesc)); - iotable_init(mach_desc, size); - - /* rename any peripherals used differing from the s3c2410 */ - - s3c_device_i2c.name = "s3c2440-i2c"; - s3c_device_nand.name = "s3c2440-nand"; + printk("S3C2440: Initialising architecture\n"); /* change irq for watchdog */ s3c_device_wdt.resource[1].start = IRQ_S3C2440_WDT; s3c_device_wdt.resource[1].end = IRQ_S3C2440_WDT; -} -void __init s3c2440_init_clocks(int xtal) -{ - unsigned long clkdiv; - unsigned long camdiv; - unsigned long hclk, fclk, pclk; - int hdiv = 1; - - /* now we've got our machine bits initialised, work out what - * clocks we've got */ - - fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal) * 2; - - clkdiv = __raw_readl(S3C2410_CLKDIVN); - camdiv = __raw_readl(S3C2440_CAMDIVN); - - /* work out clock scalings */ - - switch (clkdiv & S3C2440_CLKDIVN_HDIVN_MASK) { - case S3C2440_CLKDIVN_HDIVN_1: - hdiv = 1; - break; - - case S3C2440_CLKDIVN_HDIVN_2: - hdiv = 2; - break; - - case S3C2440_CLKDIVN_HDIVN_4_8: - hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4; - break; - - case S3C2440_CLKDIVN_HDIVN_3_6: - hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3; - break; - } - - hclk = fclk / hdiv; - pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN)? 2:1); - - /* print brief summary of clocks, etc */ - - printk("S3C2440: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n", - print_mhz(fclk), print_mhz(hclk), print_mhz(pclk)); - - /* initialise the clocks here, to allow other things like the - * console to use them, and to add new ones after the initialisation - */ - - s3c24xx_setup_clocks(xtal, fclk, hclk, pclk); -} - -/* need to register class before we actually register the device, and - * we also need to ensure that it has been initialised before any of the - * drivers even try to use it (even if not on an s3c2440 based system) - * as a driver which may support both 2410 and 2440 may try and use it. -*/ - -static int __init s3c2440_core_init(void) -{ - return sysdev_class_register(&s3c2440_sysclass); -} - -core_initcall(s3c2440_core_init); - -int __init s3c2440_init(void) -{ - printk("S3C2440: Initialising architecture\n"); + /* register our system device for everything else */ return sysdev_register(&s3c2440_sysdev); } diff --git a/arch/arm/mach-s3c2410/s3c2442-clock.c b/arch/arm/mach-s3c2410/s3c2442-clock.c new file mode 100644 index 00000000000..5b7b301eb52 --- /dev/null +++ b/arch/arm/mach-s3c2410/s3c2442-clock.c @@ -0,0 +1,171 @@ +/* linux/arch/arm/mach-s3c2410/s3c2442-clock.c + * + * Copyright (c) 2004-2005 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks + * + * S3C2442 Clock support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +*/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include + +#include "clock.h" +#include "cpu.h" + +/* S3C2442 extended clock support */ + +static unsigned long s3c2442_camif_upll_round(struct clk *clk, + unsigned long rate) +{ + unsigned long parent_rate = clk_get_rate(clk->parent); + int div; + + if (rate > parent_rate) + return parent_rate; + + div = parent_rate / rate; + + if (div == 3) + return parent_rate / 3; + + /* note, we remove the +/- 1 calculations for the divisor */ + + div /= 2; + + if (div < 1) + div = 1; + else if (div > 16) + div = 16; + + return parent_rate / (div * 2); +} + +static int s3c2442_camif_upll_setrate(struct clk *clk, unsigned long rate) +{ + unsigned long parent_rate = clk_get_rate(clk->parent); + unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN); + + rate = s3c2442_camif_upll_round(clk, rate); + + camdivn &= ~S3C2442_CAMDIVN_CAMCLK_DIV3; + + if (rate == parent_rate) { + camdivn &= ~S3C2440_CAMDIVN_CAMCLK_SEL; + } else if ((parent_rate / rate) == 3) { + camdivn |= S3C2440_CAMDIVN_CAMCLK_SEL; + camdivn |= S3C2442_CAMDIVN_CAMCLK_DIV3; + } else { + camdivn &= ~S3C2440_CAMDIVN_CAMCLK_MASK; + camdivn |= S3C2440_CAMDIVN_CAMCLK_SEL; + camdivn |= (((parent_rate / rate) / 2) - 1); + } + + __raw_writel(camdivn, S3C2440_CAMDIVN); + + return 0; +} + +/* Extra S3C2442 clocks */ + +static struct clk s3c2442_clk_cam = { + .name = "camif", + .id = -1, + .enable = s3c24xx_clkcon_enable, + .ctrlbit = S3C2440_CLKCON_CAMERA, +}; + +static struct clk s3c2442_clk_cam_upll = { + .name = "camif-upll", + .id = -1, + .set_rate = s3c2442_camif_upll_setrate, + .round_rate = s3c2442_camif_upll_round, +}; + +static int s3c2442_clk_add(struct sys_device *sysdev) +{ + unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN); + unsigned long clkdivn; + struct clk *clk_h; + struct clk *clk_p; + struct clk *clk_upll; + + printk("S3C2442: Clock Support, DVS %s\n", + (camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off"); + + clk_p = clk_get(NULL, "pclk"); + clk_h = clk_get(NULL, "hclk"); + clk_upll = clk_get(NULL, "upll"); + + if (IS_ERR(clk_p) || IS_ERR(clk_h) || IS_ERR(clk_upll)) { + printk(KERN_ERR "S3C2442: Failed to get parent clocks\n"); + return -EINVAL; + } + + /* check rate of UPLL, and if it is near 96MHz, then change + * to using half the UPLL rate for the system */ + + if (clk_get_rate(clk_upll) > (94 * MHZ)) { + clk_usb_bus.rate = clk_get_rate(clk_upll) / 2; + + mutex_lock(&clocks_mutex); + + clkdivn = __raw_readl(S3C2410_CLKDIVN); + clkdivn |= S3C2440_CLKDIVN_UCLK; + __raw_writel(clkdivn, S3C2410_CLKDIVN); + + mutex_unlock(&clocks_mutex); + } + + s3c2442_clk_cam.parent = clk_h; + s3c2442_clk_cam_upll.parent = clk_upll; + + s3c24xx_register_clock(&s3c2442_clk_cam); + s3c24xx_register_clock(&s3c2442_clk_cam_upll); + + clk_disable(&s3c2442_clk_cam); + + return 0; +} + +static struct sysdev_driver s3c2442_clk_driver = { + .add = s3c2442_clk_add, +}; + +static __init int s3c2442_clk_init(void) +{ + return sysdev_driver_register(&s3c2442_sysclass, &s3c2442_clk_driver); +} + +arch_initcall(s3c2442_clk_init); diff --git a/arch/arm/mach-s3c2410/s3c2442.c b/arch/arm/mach-s3c2410/s3c2442.c new file mode 100644 index 00000000000..debae243055 --- /dev/null +++ b/arch/arm/mach-s3c2410/s3c2442.c @@ -0,0 +1,52 @@ +/* linux/arch/arm/mach-s3c2410/s3c2440.c + * + * Copyright (c) 2006 Simtec Electronics + * Ben Dooks + * + * Samsung S3C2442 Mobile CPU support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "s3c2442.h" +#include "clock.h" +#include "devs.h" +#include "cpu.h" +#include "pm.h" + +static struct sys_device s3c2442_sysdev = { + .cls = &s3c2442_sysclass, +}; + +int __init s3c2442_init(void) +{ + printk("S3C2442: Initialising architecture\n"); + + return sysdev_register(&s3c2442_sysdev); +} diff --git a/arch/arm/mach-s3c2410/s3c2442.h b/arch/arm/mach-s3c2410/s3c2442.h new file mode 100644 index 00000000000..0ae37d24866 --- /dev/null +++ b/arch/arm/mach-s3c2410/s3c2442.h @@ -0,0 +1,17 @@ +/* arch/arm/mach-s3c2410/s3c2442.h + * + * Copyright (c) 2006 Simtec Electronics + * Ben Dooks + * + * Header file for s3c2442 cpu support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifdef CONFIG_CPU_S3C2442 +extern int s3c2442_init(void); +#else +#define s3c2442_init NULL +#endif diff --git a/arch/arm/mach-s3c2410/s3c244x-irq.c b/arch/arm/mach-s3c2410/s3c244x-irq.c new file mode 100644 index 00000000000..2aadca1ce7e --- /dev/null +++ b/arch/arm/mach-s3c2410/s3c244x-irq.c @@ -0,0 +1,142 @@ +/* linux/arch/arm/mach-s3c2410/s3c2440-irq.c + * + * Copyright (c) 2003,2004 Simtec Electronics + * Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * Changelog: + * 25-Jul-2005 BJD Split from irq.c + * +*/ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include + +#include +#include + +#include "cpu.h" +#include "pm.h" +#include "irq.h" + +/* camera irq */ + +static void s3c_irq_demux_cam(unsigned int irq, + struct irqdesc *desc, + struct pt_regs *regs) +{ + unsigned int subsrc, submsk; + struct irqdesc *mydesc; + + /* read the current pending interrupts, and the mask + * for what it is available */ + + subsrc = __raw_readl(S3C2410_SUBSRCPND); + submsk = __raw_readl(S3C2410_INTSUBMSK); + + subsrc &= ~submsk; + subsrc >>= 11; + subsrc &= 3; + + if (subsrc != 0) { + if (subsrc & 1) { + mydesc = irq_desc + IRQ_S3C2440_CAM_C; + desc_handle_irq(IRQ_S3C2440_CAM_C, mydesc, regs); + } + if (subsrc & 2) { + mydesc = irq_desc + IRQ_S3C2440_CAM_P; + desc_handle_irq(IRQ_S3C2440_CAM_P, mydesc, regs); + } + } +} + +#define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0)) + +static void +s3c_irq_cam_mask(unsigned int irqno) +{ + s3c_irqsub_mask(irqno, INTMSK_CAM, 3<<11); +} + +static void +s3c_irq_cam_unmask(unsigned int irqno) +{ + s3c_irqsub_unmask(irqno, INTMSK_CAM); +} + +static void +s3c_irq_cam_ack(unsigned int irqno) +{ + s3c_irqsub_maskack(irqno, INTMSK_CAM, 3<<11); +} + +static struct irqchip s3c_irq_cam = { + .mask = s3c_irq_cam_mask, + .unmask = s3c_irq_cam_unmask, + .ack = s3c_irq_cam_ack, +}; + +static int s3c244x_irq_add(struct sys_device *sysdev) +{ + unsigned int irqno; + + set_irq_chip(IRQ_NFCON, &s3c_irq_level_chip); + set_irq_handler(IRQ_NFCON, do_level_IRQ); + set_irq_flags(IRQ_NFCON, IRQF_VALID); + + /* add chained handler for camera */ + + set_irq_chip(IRQ_CAM, &s3c_irq_level_chip); + set_irq_handler(IRQ_CAM, do_level_IRQ); + set_irq_chained_handler(IRQ_CAM, s3c_irq_demux_cam); + + for (irqno = IRQ_S3C2440_CAM_C; irqno <= IRQ_S3C2440_CAM_P; irqno++) { + set_irq_chip(irqno, &s3c_irq_cam); + set_irq_handler(irqno, do_level_IRQ); + set_irq_flags(irqno, IRQF_VALID); + } + + return 0; +} + +static struct sysdev_driver s3c244x_irq_driver = { + .add = s3c244x_irq_add, +}; + +static int s3c2440_irq_init(void) +{ + return sysdev_driver_register(&s3c2440_sysclass, &s3c244x_irq_driver); +} + +arch_initcall(s3c2440_irq_init); + + +static int s3c2442_irq_init(void) +{ + return sysdev_driver_register(&s3c2442_sysclass, &s3c244x_irq_driver); +} + +arch_initcall(s3c2442_irq_init); diff --git a/arch/arm/mach-s3c2410/s3c244x.c b/arch/arm/mach-s3c2410/s3c244x.c new file mode 100644 index 00000000000..96852a7000d --- /dev/null +++ b/arch/arm/mach-s3c2410/s3c244x.c @@ -0,0 +1,182 @@ +/* linux/arch/arm/mach-s3c2410/s3c244x.c + * + * Copyright (c) 2004-2006 Simtec Electronics + * Ben Dooks + * + * Samsung S3C2440 and S3C2442 Mobile CPU support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "s3c2440.h" +#include "s3c244x.h" +#include "clock.h" +#include "devs.h" +#include "cpu.h" +#include "pm.h" + +static struct map_desc s3c244x_iodesc[] __initdata = { + IODESC_ENT(CLKPWR), + IODESC_ENT(TIMER), + IODESC_ENT(WATCHDOG), + IODESC_ENT(LCD), + IODESC_ENT(ADC), + IODESC_ENT(USBHOST), +}; + +/* uart initialisation */ + +void __init s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no) +{ + s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no); +} + +void __init s3c244x_map_io(struct map_desc *mach_desc, int size) +{ + /* register our io-tables */ + + iotable_init(s3c244x_iodesc, ARRAY_SIZE(s3c244x_iodesc)); + iotable_init(mach_desc, size); + + /* rename any peripherals used differing from the s3c2410 */ + + s3c_device_i2c.name = "s3c2440-i2c"; + s3c_device_nand.name = "s3c2440-nand"; +} + +void __init s3c244x_init_clocks(int xtal) +{ + unsigned long clkdiv; + unsigned long camdiv; + unsigned long hclk, fclk, pclk; + int hdiv = 1; + + /* now we've got our machine bits initialised, work out what + * clocks we've got */ + + fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal) * 2; + + clkdiv = __raw_readl(S3C2410_CLKDIVN); + camdiv = __raw_readl(S3C2440_CAMDIVN); + + /* work out clock scalings */ + + switch (clkdiv & S3C2440_CLKDIVN_HDIVN_MASK) { + case S3C2440_CLKDIVN_HDIVN_1: + hdiv = 1; + break; + + case S3C2440_CLKDIVN_HDIVN_2: + hdiv = 2; + break; + + case S3C2440_CLKDIVN_HDIVN_4_8: + hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4; + break; + + case S3C2440_CLKDIVN_HDIVN_3_6: + hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3; + break; + } + + hclk = fclk / hdiv; + pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN)? 2:1); + + /* print brief summary of clocks, etc */ + + printk("S3C244X: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n", + print_mhz(fclk), print_mhz(hclk), print_mhz(pclk)); + + /* initialise the clocks here, to allow other things like the + * console to use them, and to add new ones after the initialisation + */ + + s3c24xx_setup_clocks(xtal, fclk, hclk, pclk); +} + +#ifdef CONFIG_PM + +static struct sleep_save s3c244x_sleep[] = { + SAVE_ITEM(S3C2440_DSC0), + SAVE_ITEM(S3C2440_DSC1), + SAVE_ITEM(S3C2440_GPJDAT), + SAVE_ITEM(S3C2440_GPJCON), + SAVE_ITEM(S3C2440_GPJUP) +}; + +static int s3c244x_suspend(struct sys_device *dev, pm_message_t state) +{ + s3c2410_pm_do_save(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep)); + return 0; +} + +static int s3c244x_resume(struct sys_device *dev) +{ + s3c2410_pm_do_restore(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep)); + return 0; +} + +#else +#define s3c244x_suspend NULL +#define s3c244x_resume NULL +#endif + +/* Since the S3C2442 and S3C2440 share items, put both sysclasses here */ + +struct sysdev_class s3c2440_sysclass = { + set_kset_name("s3c2440-core"), + .suspend = s3c244x_suspend, + .resume = s3c244x_resume +}; + +struct sysdev_class s3c2442_sysclass = { + set_kset_name("s3c2442-core"), + .suspend = s3c244x_suspend, + .resume = s3c244x_resume +}; + +/* need to register class before we actually register the device, and + * we also need to ensure that it has been initialised before any of the + * drivers even try to use it (even if not on an s3c2440 based system) + * as a driver which may support both 2410 and 2440 may try and use it. +*/ + +static int __init s3c2440_core_init(void) +{ + return sysdev_class_register(&s3c2440_sysclass); +} + +core_initcall(s3c2440_core_init); + +static int __init s3c2442_core_init(void) +{ + return sysdev_class_register(&s3c2442_sysclass); +} + +core_initcall(s3c2442_core_init); diff --git a/arch/arm/mach-s3c2410/s3c244x.h b/arch/arm/mach-s3c2410/s3c244x.h new file mode 100644 index 00000000000..3e7f5f75134 --- /dev/null +++ b/arch/arm/mach-s3c2410/s3c244x.h @@ -0,0 +1,25 @@ +/* arch/arm/mach-s3c2410/s3c2440.h + * + * Copyright (c) 2004-2005 Simtec Electronics + * Ben Dooks + * + * Header file for S3C2440 and S3C2442 cpu support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442) + +extern void s3c244x_map_io(struct map_desc *mach_desc, int size); + +extern void s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no); + +extern void s3c244x_init_clocks(int xtal); + +#else +#define s3c244x_init_clocks NULL +#define s3c244x_init_uarts NULL +#define s3c244x_map_io NULL +#endif diff --git a/drivers/serial/s3c2410.c b/drivers/serial/s3c2410.c index f5aac92fb79..53c2465bad2 100644 --- a/drivers/serial/s3c2410.c +++ b/drivers/serial/s3c2410.c @@ -1365,7 +1365,7 @@ static inline void s3c2410_serial_exit(void) #endif /* CONFIG_CPU_S3C2410 */ -#ifdef CONFIG_CPU_S3C2440 +#if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442) static int s3c2440_serial_setsource(struct uart_port *port, struct s3c24xx_uart_clksrc *clk) diff --git a/include/asm-arm/arch-s3c2410/regs-clock.h b/include/asm-arm/arch-s3c2410/regs-clock.h index 34360706e01..6c92faffe98 100644 --- a/include/asm-arm/arch-s3c2410/regs-clock.h +++ b/include/asm-arm/arch-s3c2410/regs-clock.h @@ -114,7 +114,7 @@ s3c2410_get_pll(unsigned int pllval, unsigned int baseclk) #endif /* __ASSEMBLY__ */ -#ifdef CONFIG_CPU_S3C2440 +#if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442) /* extra registers */ #define S3C2440_CAMDIVN S3C2410_CLKREG(0x18) @@ -136,7 +136,9 @@ s3c2410_get_pll(unsigned int pllval, unsigned int baseclk) #define S3C2440_CAMDIVN_HCLK4_HALF (1<<9) #define S3C2440_CAMDIVN_DVSEN (1<<12) -#endif /* CONFIG_CPU_S3C2440 */ +#define S3C2442_CAMDIVN_CAMCLK_DIV3 (1<<5) + +#endif /* CONFIG_CPU_S3C2440 or CONFIG_CPU_S3C2442 */ #endif /* __ASM_ARM_REGS_CLOCK */ diff --git a/include/asm-arm/arch-s3c2410/regs-gpio.h b/include/asm-arm/arch-s3c2410/regs-gpio.h index d2574084697..5f10334f06b 100644 --- a/include/asm-arm/arch-s3c2410/regs-gpio.h +++ b/include/asm-arm/arch-s3c2410/regs-gpio.h @@ -450,12 +450,14 @@ #define S3C2410_GPD0_OUTP (0x01 << 0) #define S3C2410_GPD0_VD8 (0x02 << 0) #define S3C2400_GPD0_VFRAME (0x02 << 0) +#define S3C2442_GPD0_nSPICS1 (0x03 << 0) #define S3C2410_GPD1 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 1) #define S3C2410_GPD1_INP (0x00 << 2) #define S3C2410_GPD1_OUTP (0x01 << 2) #define S3C2410_GPD1_VD9 (0x02 << 2) #define S3C2400_GPD1_VM (0x02 << 2) +#define S3C2442_GPD1_SPICLK1 (0x03 << 2) #define S3C2410_GPD2 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 2) #define S3C2410_GPD2_INP (0x00 << 4) @@ -858,6 +860,7 @@ #define S3C2410_GPG12_OUTP (0x01 << 24) #define S3C2410_GPG12_EINT20 (0x02 << 24) #define S3C2410_GPG12_XMON (0x03 << 24) +#define S3C2442_GPG12_nSPICS0 (0x03 << 24) #define S3C2410_GPG13 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 13) #define S3C2410_GPG13_INP (0x00 << 26) @@ -943,6 +946,7 @@ #define S3C2410_GPH9_INP (0x00 << 18) #define S3C2410_GPH9_OUTP (0x01 << 18) #define S3C2410_GPH9_CLKOUT0 (0x02 << 18) +#define S3C2442_GPH9_nSPICS0 (0x03 << 18) #define S3C2410_GPH10 S3C2410_GPIONO(S3C2410_GPIO_BANKH, 10) #define S3C2410_GPH10_INP (0x00 << 20) @@ -1051,6 +1055,7 @@ #define S3C2410_GSTATUS1_IDMASK (0xffff0000) #define S3C2410_GSTATUS1_2410 (0x32410000) #define S3C2410_GSTATUS1_2440 (0x32440000) +#define S3C2410_GSTATUS1_2442 (0x32440aaa) #define S3C2410_GSTATUS2_WTRESET (1<<2) #define S3C2410_GSTATUS2_OFFRESET (1<<1) diff --git a/include/asm-arm/arch-s3c2410/uncompress.h b/include/asm-arm/arch-s3c2410/uncompress.h index a6f6a0e44af..bbd9ee1ff75 100644 --- a/include/asm-arm/arch-s3c2410/uncompress.h +++ b/include/asm-arm/arch-s3c2410/uncompress.h @@ -82,7 +82,8 @@ static void putc(int ch) while (1) { level = uart_rd(S3C2410_UFSTAT); - if (cpuid == S3C2410_GSTATUS1_2440) { + if (cpuid == S3C2410_GSTATUS1_2440 || + cpuid == S3C2410_GSTATUS1_2442) { level &= S3C2440_UFSTAT_TXMASK; level >>= S3C2440_UFSTAT_TXSHIFT; } else { @@ -130,7 +131,7 @@ static void arch_decomp_wdog_start(void) { __raw_writel(WDOG_COUNT, S3C2410_WTDAT); __raw_writel(WDOG_COUNT, S3C2410_WTCNT); - __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x40), S3C2410_WTCON); + __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x80), S3C2410_WTCON); } #else -- cgit v1.2.3-70-g09d2 From ab76fb13d73488ded53c87b77b1b5e38df2acf74 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Mon, 19 Jun 2006 13:24:32 +0100 Subject: [ARM] 3566/1: netX: register definitions Patch from Sascha Hauer This patch adds the register definitions for Hilscher's netX network processors. Signed-off-by: Robert Schwebel Signed-off-by: Sascha Hauer Signed-off-by: Russell King --- include/asm-arm/arch-netx/netx-regs.h | 410 ++++++++++++++++++++++++++++++++++ 1 file changed, 410 insertions(+) create mode 100644 include/asm-arm/arch-netx/netx-regs.h (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-netx/netx-regs.h b/include/asm-arm/arch-netx/netx-regs.h new file mode 100644 index 00000000000..8ab45bea83c --- /dev/null +++ b/include/asm-arm/arch-netx/netx-regs.h @@ -0,0 +1,410 @@ +/* + * include/asm-arm/arch-netx/netx-regs.h + * + * Copyright (c) 2005 Sascha Hauer , Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef __ASM_ARCH_NETX_REGS_H +#define __ASM_ARCH_NETX_REGS_H + +/* offsets relative to the beginning of the io space */ +#define NETX_OFS_SYSTEM 0x00000 +#define NETX_OFS_MEMCR 0x00100 +#define NETX_OFS_DPMAS 0x03000 +#define NETX_OFS_GPIO 0x00800 +#define NETX_OFS_PIO 0x00900 +#define NETX_OFS_UART0 0x00a00 +#define NETX_OFS_UART1 0x00a40 +#define NETX_OFS_UART2 0x00a80 +#define NETX_OF_MIIMU 0x00b00 +#define NETX_OFS_SPI 0x00c00 +#define NETX_OFS_I2C 0x00d00 +#define NETX_OFS_SYSTIME 0x01100 +#define NETX_OFS_RTC 0x01200 +#define NETX_OFS_EXTBUS 0x03600 +#define NETX_OFS_LCD 0x04000 +#define NETX_OFS_USB 0x20000 +#define NETX_OFS_XMAC0 0x60000 +#define NETX_OFS_XMAC1 0x61000 +#define NETX_OFS_XMAC2 0x62000 +#define NETX_OFS_XMAC3 0x63000 +#define NETX_OFS_XMAC(no) (0x60000 + (no) * 0x1000) +#define NETX_OFS_PFIFO 0x64000 +#define NETX_OFS_XPEC0 0x70000 +#define NETX_OFS_XPEC1 0x74000 +#define NETX_OFS_XPEC2 0x78000 +#define NETX_OFS_XPEC3 0x7c000 +#define NETX_OFS_XPEC(no) (0x70000 + (no) * 0x4000) +#define NETX_OFS_VIC 0xff000 + +/* physical addresses */ +#define NETX_PA_SYSTEM (NETX_IO_PHYS + NETX_OFS_SYSTEM) +#define NETX_PA_MEMCR (NETX_IO_PHYS + NETX_OFS_MEMCR) +#define NETX_PA_DPMAS (NETX_IO_PHYS + NETX_OFS_DPMAS) +#define NETX_PA_GPIO (NETX_IO_PHYS + NETX_OFS_GPIO) +#define NETX_PA_PIO (NETX_IO_PHYS + NETX_OFS_PIO) +#define NETX_PA_UART0 (NETX_IO_PHYS + NETX_OFS_UART0) +#define NETX_PA_UART1 (NETX_IO_PHYS + NETX_OFS_UART1) +#define NETX_PA_UART2 (NETX_IO_PHYS + NETX_OFS_UART2) +#define NETX_PA_MIIMU (NETX_IO_PHYS + NETX_OF_MIIMU) +#define NETX_PA_SPI (NETX_IO_PHYS + NETX_OFS_SPI) +#define NETX_PA_I2C (NETX_IO_PHYS + NETX_OFS_I2C) +#define NETX_PA_SYSTIME (NETX_IO_PHYS + NETX_OFS_SYSTIME) +#define NETX_PA_RTC (NETX_IO_PHYS + NETX_OFS_RTC) +#define NETX_PA_EXTBUS (NETX_IO_PHYS + NETX_OFS_EXTBUS) +#define NETX_PA_LCD (NETX_IO_PHYS + NETX_OFS_LCD) +#define NETX_PA_USB (NETX_IO_PHYS + NETX_OFS_USB) +#define NETX_PA_XMAC0 (NETX_IO_PHYS + NETX_OFS_XMAC0) +#define NETX_PA_XMAC1 (NETX_IO_PHYS + NETX_OFS_XMAC1) +#define NETX_PA_XMAC2 (NETX_IO_PHYS + NETX_OFS_XMAC2) +#define NETX_PA_XMAC3 (NETX_IO_PHYS + NETX_OFS_XMAC3) +#define NETX_PA_XMAC(no) (NETX_IO_PHYS + NETX_OFS_XMAC(no)) +#define NETX_PA_PFIFO (NETX_IO_PHYS + NETX_OFS_PFIFO) +#define NETX_PA_XPEC0 (NETX_IO_PHYS + NETX_OFS_XPEC0) +#define NETX_PA_XPEC1 (NETX_IO_PHYS + NETX_OFS_XPEC1) +#define NETX_PA_XPEC2 (NETX_IO_PHYS + NETX_OFS_XPEC2) +#define NETX_PA_XPEC3 (NETX_IO_PHYS + NETX_OFS_XPEC3) +#define NETX_PA_XPEC(no) (NETX_IO_PHYS + NETX_OFS_XPEC(no)) +#define NETX_PA_VIC (NETX_IO_PHYS + NETX_OFS_VIC) + +/* virual addresses */ +#define NETX_VA_SYSTEM (NETX_IO_VIRT + NETX_OFS_SYSTEM) +#define NETX_VA_MEMCR (NETX_IO_VIRT + NETX_OFS_MEMCR) +#define NETX_VA_DPMAS (NETX_IO_VIRT + NETX_OFS_DPMAS) +#define NETX_VA_GPIO (NETX_IO_VIRT + NETX_OFS_GPIO) +#define NETX_VA_PIO (NETX_IO_VIRT + NETX_OFS_PIO) +#define NETX_VA_UART0 (NETX_IO_VIRT + NETX_OFS_UART0) +#define NETX_VA_UART1 (NETX_IO_VIRT + NETX_OFS_UART1) +#define NETX_VA_UART2 (NETX_IO_VIRT + NETX_OFS_UART2) +#define NETX_VA_MIIMU (NETX_IO_VIRT + NETX_OF_MIIMU) +#define NETX_VA_SPI (NETX_IO_VIRT + NETX_OFS_SPI) +#define NETX_VA_I2C (NETX_IO_VIRT + NETX_OFS_I2C) +#define NETX_VA_SYSTIME (NETX_IO_VIRT + NETX_OFS_SYSTIME) +#define NETX_VA_RTC (NETX_IO_VIRT + NETX_OFS_RTC) +#define NETX_VA_EXTBUS (NETX_IO_VIRT + NETX_OFS_EXTBUS) +#define NETX_VA_LCD (NETX_IO_VIRT + NETX_OFS_LCD) +#define NETX_VA_USB (NETX_IO_VIRT + NETX_OFS_USB) +#define NETX_VA_XMAC0 (NETX_IO_VIRT + NETX_OFS_XMAC0) +#define NETX_VA_XMAC1 (NETX_IO_VIRT + NETX_OFS_XMAC1) +#define NETX_VA_XMAC2 (NETX_IO_VIRT + NETX_OFS_XMAC2) +#define NETX_VA_XMAC3 (NETX_IO_VIRT + NETX_OFS_XMAC3) +#define NETX_VA_XMAC(no) (NETX_IO_VIRT + NETX_OFS_XMAC(no)) +#define NETX_VA_PFIFO (NETX_IO_VIRT + NETX_OFS_PFIFO) +#define NETX_VA_XPEC0 (NETX_IO_VIRT + NETX_OFS_XPEC0) +#define NETX_VA_XPEC1 (NETX_IO_VIRT + NETX_OFS_XPEC1) +#define NETX_VA_XPEC2 (NETX_IO_VIRT + NETX_OFS_XPEC2) +#define NETX_VA_XPEC3 (NETX_IO_VIRT + NETX_OFS_XPEC3) +#define NETX_VA_XPEC(no) (NETX_IO_VIRT + NETX_OFS_XPEC(no)) +#define NETX_VA_VIC (NETX_IO_VIRT + NETX_OFS_VIC) + +/********************************* + * System functions * + *********************************/ + +/* Registers */ +#define NETX_SYSTEM_REG(ofs) __io(NETX_VA_SYSTEM + (ofs)) +#define NETX_SYSTEM_BOO_SR NETX_SYSTEM_REG(0x00) +#define NETX_SYSTEM_IOC_CR NETX_SYSTEM_REG(0x04) +#define NETX_SYSTEM_IOC_MR NETX_SYSTEM_REG(0x08) + +/* FIXME: Docs are not consistent */ +#define NETX_SYSTEM_RES_CR NETX_SYSTEM_REG(0x08) +/* #define NETX_SYSTEM_RES_CR NETX_SYSTEM_REG(0x0c) */ + +#define NETX_SYSTEM_PHY_CONTROL NETX_SYSTEM_REG(0x10) +#define NETX_SYSTEM_REV NETX_SYSTEM_REG(0x34) +#define NETX_SYSTEM_IOC_ACCESS_KEY NETX_SYSTEM_REG(0x70) +#define NETX_SYSTEM_WDG_TR NETX_SYSTEM_REG(0x200) +#define NETX_SYSTEM_WDG_CTR NETX_SYSTEM_REG(0x204) +#define NETX_SYSTEM_WDG_IRQ_TIMEOUT NETX_SYSTEM_REG(0x208) +#define NETX_SYSTEM_WDG_RES_TIMEOUT NETX_SYSTEM_REG(0x20c) + +/* Bits */ +#define NETX_SYSTEM_RES_CR_RSTIN (1<<0) +#define NETX_SYSTEM_RES_CR_WDG_RES (1<<1) +#define NETX_SYSTEM_RES_CR_HOST_RES (1<<2) +#define NETX_SYSTEM_RES_CR_FIRMW_RES (1<<3) +#define NETX_SYSTEM_RES_CR_XPEC0_RES (1<<4) +#define NETX_SYSTEM_RES_CR_XPEC1_RES (1<<5) +#define NETX_SYSTEM_RES_CR_XPEC2_RES (1<<6) +#define NETX_SYSTEM_RES_CR_XPEC3_RES (1<<7) +#define NETX_SYSTEM_RES_CR_DIS_XPEC0_RES (1<<16) +#define NETX_SYSTEM_RES_CR_DIS_XPEC1_RES (1<<17) +#define NETX_SYSTEM_RES_CR_DIS_XPEC2_RES (1<<18) +#define NETX_SYSTEM_RES_CR_DIS_XPEC3_RES (1<<19) +#define NETX_SYSTEM_RES_CR_FIRMW_FLG0 (1<<20) +#define NETX_SYSTEM_RES_CR_FIRMW_FLG1 (1<<21) +#define NETX_SYSTEM_RES_CR_FIRMW_FLG2 (1<<22) +#define NETX_SYSTEM_RES_CR_FIRMW_FLG3 (1<<23) +#define NETX_SYSTEM_RES_CR_FIRMW_RES_EN (1<<24) +#define NETX_SYSTEM_RES_CR_RSTOUT (1<<25) +#define NETX_SYSTEM_RES_CR_EN_RSTOUT (1<<26) + +#define PHY_CONTROL_RESET (1<<31) +#define PHY_CONTROL_SIM_BYP (1<<30) +#define PHY_CONTROL_CLK_XLATIN (1<<29) +#define PHY_CONTROL_PHY1_EN (1<<21) +#define PHY_CONTROL_PHY1_NP_MSG_CODE +#define PHY_CONTROL_PHY1_AUTOMDIX (1<<17) +#define PHY_CONTROL_PHY1_FIXMODE (1<<16) +#define PHY_CONTROL_PHY1_MODE(mode) (((mode) & 0x7) << 13) +#define PHY_CONTROL_PHY0_EN (1<<12) +#define PHY_CONTROL_PHY0_NP_MSG_CODE +#define PHY_CONTROL_PHY0_AUTOMDIX (1<<8) +#define PHY_CONTROL_PHY0_FIXMODE (1<<7) +#define PHY_CONTROL_PHY0_MODE(mode) (((mode) & 0x7) << 4) +#define PHY_CONTROL_PHY_ADDRESS(adr) ((adr) & 0xf) + +#define PHY_MODE_10BASE_T_HALF 0 +#define PHY_MODE_10BASE_T_FULL 1 +#define PHY_MODE_100BASE_TX_FX_FULL 2 +#define PHY_MODE_100BASE_TX_FX_HALF 3 +#define PHY_MODE_100BASE_TX_HALF 4 +#define PHY_MODE_REPEATER 5 +#define PHY_MODE_POWER_DOWN 6 +#define PHY_MODE_ALL 7 + +/* Bits */ +#define VECT_CNTL_ENABLE (1 << 5) + +/******************************* + * GPIO and timer module * + *******************************/ + +/* Registers */ +#define NETX_GPIO_REG(ofs) __io(NETX_VA_GPIO + (ofs)) +#define NETX_GPIO_CFG(gpio) NETX_GPIO_REG(0x0 + ((gpio)<<2)) +#define NETX_GPIO_THRESHOLD_CAPTURE(gpio) NETX_GPIO_REG(0x40 + ((gpio)<<2)) +#define NETX_GPIO_COUNTER_CTRL(counter) NETX_GPIO_REG(0x80 + ((counter)<<2)) +#define NETX_GPIO_COUNTER_MAX(counter) NETX_GPIO_REG(0x94 + ((counter)<<2)) +#define NETX_GPIO_COUNTER_CURRENT(counter) NETX_GPIO_REG(0xa8 + ((counter)<<2)) +#define NETX_GPIO_IRQ_ENABLE NETX_GPIO_REG(0xbc) +#define NETX_GPIO_IRQ_DISABLE NETX_GPIO_REG(0xc0) +#define NETX_GPIO_SYSTIME_NS_CMP NETX_GPIO_REG(0xc4) +#define NETX_GPIO_LINE NETX_GPIO_REG(0xc8) +#define NETX_GPIO_IRQ NETX_GPIO_REG(0xd0) + +/* Bits */ +#define NETX_GPIO_CFG_IOCFG_GP_INPUT (0x0) +#define NETX_GPIO_CFG_IOCFG_GP_OUTPUT (0x1) +#define NETX_GPIO_CFG_IOCFG_GP_UART (0x2) +#define NETX_GPIO_CFG_INV (1<<2) +#define NETX_GPIO_CFG_MODE_INPUT_READ (0<<3) +#define NETX_GPIO_CFG_MODE_INPUT_CAPTURE_CONT_RISING (1<<3) +#define NETX_GPIO_CFG_MODE_INPUT_CAPTURE_ONCE_RISING (2<<3) +#define NETX_GPIO_CFG_MODE_INPUT_CAPTURE_HIGH_LEVEL (3<<3) +#define NETX_GPIO_CFG_COUNT_REF_COUNTER0 (0<<5) +#define NETX_GPIO_CFG_COUNT_REF_COUNTER1 (1<<5) +#define NETX_GPIO_CFG_COUNT_REF_COUNTER2 (2<<5) +#define NETX_GPIO_CFG_COUNT_REF_COUNTER3 (3<<5) +#define NETX_GPIO_CFG_COUNT_REF_COUNTER4 (4<<5) +#define NETX_GPIO_CFG_COUNT_REF_SYSTIME (7<<5) + +#define NETX_GPIO_COUNTER_CTRL_RUN (1<<0) +#define NETX_GPIO_COUNTER_CTRL_SYM (1<<1) +#define NETX_GPIO_COUNTER_CTRL_ONCE (1<<2) +#define NETX_GPIO_COUNTER_CTRL_IRQ_EN (1<<3) +#define NETX_GPIO_COUNTER_CTRL_CNT_EVENT (1<<4) +#define NETX_GPIO_COUNTER_CTRL_RST_EN (1<<5) +#define NETX_GPIO_COUNTER_CTRL_SEL_EVENT (1<<6) +#define NETX_GPIO_COUNTER_CTRL_GPIO_REF /* FIXME */ + +#define GPIO_BIT(gpio) (1<<(gpio)) +#define COUNTER_BIT(counter) ((1<<16)<<(counter)) + +/******************************* + * PIO * + *******************************/ + +/* Registers */ +#define NETX_PIO_REG(ofs) __io(NETX_VA_PIO + (ofs)) +#define NETX_PIO_INPIO NETX_PIO_REG(0x0) +#define NETX_PIO_OUTPIO NETX_PIO_REG(0x4) +#define NETX_PIO_OEPIO NETX_PIO_REG(0x8) + +/******************************* + * MII Unit * + *******************************/ + +/* Registers */ +#define NETX_MIIMU __io(NETX_VA_MIIMU) + +/* Bits */ +#define MIIMU_SNRDY (1<<0) +#define MIIMU_PREAMBLE (1<<1) +#define MIIMU_OPMODE_WRITE (1<<2) +#define MIIMU_MDC_PERIOD (1<<3) +#define MIIMU_PHY_NRES (1<<4) +#define MIIMU_RTA (1<<5) +#define MIIMU_REGADDR(adr) (((adr) & 0x1f) << 6) +#define MIIMU_PHYADDR(adr) (((adr) & 0x1f) << 11) +#define MIIMU_DATA(data) (((data) & 0xffff) << 16) + +/******************************* + * xmac / xpec * + *******************************/ + +/* XPEC register offsets relative to NETX_VA_XPEC(no) */ +#define NETX_XPEC_R0_OFS 0x00 +#define NETX_XPEC_R1_OFS 0x04 +#define NETX_XPEC_R2_OFS 0x08 +#define NETX_XPEC_R3_OFS 0x0c +#define NETX_XPEC_R4_OFS 0x10 +#define NETX_XPEC_R5_OFS 0x14 +#define NETX_XPEC_R6_OFS 0x18 +#define NETX_XPEC_R7_OFS 0x1c +#define NETX_XPEC_RANGE01_OFS 0x20 +#define NETX_XPEC_RANGE23_OFS 0x24 +#define NETX_XPEC_RANGE45_OFS 0x28 +#define NETX_XPEC_RANGE67_OFS 0x2c +#define NETX_XPEC_PC_OFS 0x48 +#define NETX_XPEC_TIMER_OFS(timer) (0x30 + ((timer)<<2)) +#define NETX_XPEC_IRQ_OFS 0x8c +#define NETX_XPEC_SYSTIME_NS_OFS 0x90 +#define NETX_XPEC_FIFO_DATA_OFS 0x94 +#define NETX_XPEC_SYSTIME_S_OFS 0x98 +#define NETX_XPEC_ADC_OFS 0x9c +#define NETX_XPEC_URX_COUNT_OFS 0x40 +#define NETX_XPEC_UTX_COUNT_OFS 0x44 +#define NETX_XPEC_PC_OFS 0x48 +#define NETX_XPEC_ZERO_OFS 0x4c +#define NETX_XPEC_STATCFG_OFS 0x50 +#define NETX_XPEC_EC_MASKA_OFS 0x54 +#define NETX_XPEC_EC_MASKB_OFS 0x58 +#define NETX_XPEC_EC_MASK0_OFS 0x5c +#define NETX_XPEC_EC_MASK8_OFS 0x7c +#define NETX_XPEC_EC_MASK9_OFS 0x80 +#define NETX_XPEC_XPU_HOLD_PC_OFS 0x100 +#define NETX_XPEC_RAM_START_OFS 0x2000 + +/* Bits */ +#define XPU_HOLD_PC (1<<0) + +/* XMAC register offsets relative to NETX_VA_XMAC(no) */ +#define NETX_XMAC_RPU_PROGRAM_START_OFS 0x000 +#define NETX_XMAC_RPU_PROGRAM_END_OFS 0x3ff +#define NETX_XMAC_TPU_PROGRAM_START_OFS 0x400 +#define NETX_XMAC_TPU_PROGRAM_END_OFS 0x7ff +#define NETX_XMAC_RPU_HOLD_PC_OFS 0xa00 +#define NETX_XMAC_TPU_HOLD_PC_OFS 0xa04 +#define NETX_XMAC_STATUS_SHARED0_OFS 0x840 +#define NETX_XMAC_CONFIG_SHARED0_OFS 0x844 +#define NETX_XMAC_STATUS_SHARED1_OFS 0x848 +#define NETX_XMAC_CONFIG_SHARED1_OFS 0x84c +#define NETX_XMAC_STATUS_SHARED2_OFS 0x850 +#define NETX_XMAC_CONFIG_SHARED2_OFS 0x854 +#define NETX_XMAC_STATUS_SHARED3_OFS 0x858 +#define NETX_XMAC_CONFIG_SHARED3_OFS 0x85c + +#define RPU_HOLD_PC (1<<15) +#define TPU_HOLD_PC (1<<15) + +/******************************* + * Pointer FIFO * + *******************************/ + +/* Registers */ +#define NETX_PFIFO_REG(ofs) __io(NETX_VA_PFIFO + (ofs)) +#define NETX_PFIFO_BASE(pfifo) NETX_PFIFO_REG(0x00 + ((pfifo)<<2)) +#define NETX_PFIFO_BORDER_BASE(pfifo) NETX_PFIFO_REG(0x80 + ((pfifo)<<2)) +#define NETX_PFIFO_RESET NETX_PFIFO_REG(0x100) +#define NETX_PFIFO_FULL NETX_PFIFO_REG(0x104) +#define NETX_PFIFO_EMPTY NETX_PFIFO_REG(0x108) +#define NETX_PFIFO_OVEFLOW NETX_PFIFO_REG(0x10c) +#define NETX_PFIFO_UNDERRUN NETX_PFIFO_REG(0x110) +#define NETX_PFIFO_FILL_LEVEL(pfifo) NETX_PFIFO_REG(0x180 + ((pfifo)<<2)) +#define NETX_PFIFO_XPEC_ISR(xpec) NETX_PFIFO_REG(0x400 + ((xpec) << 2)) + +/******************************* + * Dual Port Memory * + *******************************/ + +/* Registers */ +#define NETX_DPMAS_REG(ofs) __io(NETX_VA_DPMAS + (ofs)) +#define NETX_DPMAS_SYS_STAT NETX_DPMAS_REG(0x4d8) +#define NETX_DPMAS_INT_STAT NETX_DPMAS_REG(0x4e0) +#define NETX_DPMAS_INT_EN NETX_DPMAS_REG(0x4f0) +#define NETX_DPMAS_IF_CONF0 NETX_DPMAS_REG(0x608) +#define NETX_DPMAS_IF_CONF1 NETX_DPMAS_REG(0x60c) +#define NETX_DPMAS_EXT_CONFIG(cs) NETX_DPMAS_REG(0x610 + 4 * (cs)) +#define NETX_DPMAS_IO_MODE0 NETX_DPMAS_REG(0x620) /* I/O 32..63 */ +#define NETX_DPMAS_DRV_EN0 NETX_DPMAS_REG(0x624) +#define NETX_DPMAS_DATA0 NETX_DPMAS_REG(0x628) +#define NETX_DPMAS_IO_MODE1 NETX_DPMAS_REG(0x630) /* I/O 64..84 */ +#define NETX_DPMAS_DRV_EN1 NETX_DPMAS_REG(0x634) +#define NETX_DPMAS_DATA1 NETX_DPMAS_REG(0x638) + +/* Bits */ +#define NETX_DPMAS_INT_EN_GLB_EN (1<<31) +#define NETX_DPMAS_INT_EN_MEM_LCK (1<<30) +#define NETX_DPMAS_INT_EN_WDG (1<<29) +#define NETX_DPMAS_INT_EN_PIO72 (1<<28) +#define NETX_DPMAS_INT_EN_PIO47 (1<<27) +#define NETX_DPMAS_INT_EN_PIO40 (1<<26) +#define NETX_DPMAS_INT_EN_PIO36 (1<<25) +#define NETX_DPMAS_INT_EN_PIO35 (1<<24) + +#define NETX_DPMAS_IF_CONF0_HIF_DISABLED (0<<28) +#define NETX_DPMAS_IF_CONF0_HIF_EXT_BUS (1<<28) +#define NETX_DPMAS_IF_CONF0_HIF_UP_8BIT (2<<28) +#define NETX_DPMAS_IF_CONF0_HIF_UP_16BIT (3<<28) +#define NETX_DPMAS_IF_CONF0_HIF_IO (4<<28) +#define NETX_DPMAS_IF_CONF0_WAIT_DRV_PP (1<<14) +#define NETX_DPMAS_IF_CONF0_WAIT_DRV_OD (2<<14) +#define NETX_DPMAS_IF_CONF0_WAIT_DRV_TRI (3<<14) + +#define NETX_DPMAS_IF_CONF1_IRQ_POL_PIO35 (1<<26) +#define NETX_DPMAS_IF_CONF1_IRQ_POL_PIO36 (1<<27) +#define NETX_DPMAS_IF_CONF1_IRQ_POL_PIO40 (1<<28) +#define NETX_DPMAS_IF_CONF1_IRQ_POL_PIO47 (1<<29) +#define NETX_DPMAS_IF_CONF1_IRQ_POL_PIO72 (1<<30) + +#define NETX_EXT_CONFIG_TALEWIDTH(x) (((x) & 0x7) << 29) +#define NETX_EXT_CONFIG_TADRHOLD(x) (((x) & 0x7) << 26) +#define NETX_EXT_CONFIG_TCSON(x) (((x) & 0x7) << 23) +#define NETX_EXT_CONFIG_TRDON(x) (((x) & 0x7) << 20) +#define NETX_EXT_CONFIG_TWRON(x) (((x) & 0x7) << 17) +#define NETX_EXT_CONFIG_TWROFF(x) (((x) & 0x1f) << 12) +#define NETX_EXT_CONFIG_TRDWRCYC(x) (((x) & 0x1f) << 7) +#define NETX_EXT_CONFIG_WAIT_POL (1<<6) +#define NETX_EXT_CONFIG_WAIT_EN (1<<5) +#define NETX_EXT_CONFIG_NRD_MODE (1<<4) +#define NETX_EXT_CONFIG_DS_MODE (1<<3) +#define NETX_EXT_CONFIG_NWR_MODE (1<<2) +#define NETX_EXT_CONFIG_16BIT (1<<1) +#define NETX_EXT_CONFIG_CS_ENABLE (1<<0) + +#define NETX_DPMAS_IO_MODE0_WRL (1<<13) +#define NETX_DPMAS_IO_MODE0_WAIT (1<<14) +#define NETX_DPMAS_IO_MODE0_READY (1<<15) +#define NETX_DPMAS_IO_MODE0_CS0 (1<<19) +#define NETX_DPMAS_IO_MODE0_EXTRD (1<<20) + +#define NETX_DPMAS_IO_MODE1_CS2 (1<<15) +#define NETX_DPMAS_IO_MODE1_CS1 (1<<16) +#define NETX_DPMAS_IO_MODE1_SAMPLE_NPOR (0<<30) +#define NETX_DPMAS_IO_MODE1_SAMPLE_100MHZ (1<<30) +#define NETX_DPMAS_IO_MODE1_SAMPLE_NPIO36 (2<<30) +#define NETX_DPMAS_IO_MODE1_SAMPLE_PIO36 (3<<30) + +/******************************* + * I2C * + *******************************/ +#define NETX_I2C_REG(ofs) __io(NETX_VA_I2C, (ofs)) +#define NETX_I2C_CTRL NETX_I2C_REG(0x0) +#define NETX_I2C_DATA NETX_I2C_REG(0x4) + +#endif /* __ASM_ARCH_NETX_REGS_H */ -- cgit v1.2.3-70-g09d2 From 10e8e1fb758eed5cfb0cae1b770f842624851e7b Mon Sep 17 00:00:00 2001 From: Andrew Victor Date: Mon, 19 Jun 2006 15:26:51 +0100 Subject: [ARM] 3581/1: AT91RM9200 Internal SRAM Patch from Andrew Victor This patch maps the AT91RM9200's internal SRAM into the virtual memory address space - just below the internal peripheral registers. Signed-off-by: Andrew Victor Signed-off-by: Russell King --- arch/arm/mach-at91rm9200/common.c | 6 ++++++ include/asm-arm/arch-at91rm9200/hardware.h | 5 ++++- include/asm-arm/arch-at91rm9200/vmalloc.h | 2 +- 3 files changed, 11 insertions(+), 2 deletions(-) (limited to 'include/asm-arm') diff --git a/arch/arm/mach-at91rm9200/common.c b/arch/arm/mach-at91rm9200/common.c index 3848fd2d559..40d29a73b5c 100644 --- a/arch/arm/mach-at91rm9200/common.c +++ b/arch/arm/mach-at91rm9200/common.c @@ -17,6 +17,7 @@ #include #include +#include "generic.h" static struct map_desc at91rm9200_io_desc[] __initdata = { { @@ -94,6 +95,11 @@ static struct map_desc at91rm9200_io_desc[] __initdata = { .pfn = __phys_to_pfn(AT91_BASE_TCB0), .length = SZ_16K, .type = MT_DEVICE, + }, { + .virtual = AT91_SRAM_VIRT_BASE, + .pfn = __phys_to_pfn(AT91_SRAM_BASE), + .length = AT91_SRAM_SIZE, + .type = MT_DEVICE, }, }; diff --git a/include/asm-arm/arch-at91rm9200/hardware.h b/include/asm-arm/arch-at91rm9200/hardware.h index 59e6f44d3a0..87f40df5714 100644 --- a/include/asm-arm/arch-at91rm9200/hardware.h +++ b/include/asm-arm/arch-at91rm9200/hardware.h @@ -50,9 +50,12 @@ #define AT91_VA_BASE_TCB0 AT91_IO_P2V(AT91_BASE_TCB0) /* Internal SRAM */ -#define AT91_BASE_SRAM 0x00200000 /* Internal SRAM base address */ +#define AT91_SRAM_BASE 0x00200000 /* Internal SRAM base address */ #define AT91_SRAM_SIZE 0x00004000 /* Internal SRAM SIZE (16Kb) */ + /* Internal SRAM is mapped below the IO devices */ +#define AT91_SRAM_VIRT_BASE (AT91_IO_VIRT_BASE - AT91_SRAM_SIZE) + /* Serial ports */ #define AT91_NR_UART 5 /* 4 USART3's and one DBGU port */ diff --git a/include/asm-arm/arch-at91rm9200/vmalloc.h b/include/asm-arm/arch-at91rm9200/vmalloc.h index 34d9718feb9..4c367eb57f4 100644 --- a/include/asm-arm/arch-at91rm9200/vmalloc.h +++ b/include/asm-arm/arch-at91rm9200/vmalloc.h @@ -21,6 +21,6 @@ #ifndef __ASM_ARCH_VMALLOC_H #define __ASM_ARCH_VMALLOC_H -#define VMALLOC_END (AT91_IO_VIRT_BASE & PGDIR_MASK) +#define VMALLOC_END (AT91_SRAM_VIRT_BASE & PGDIR_MASK) #endif -- cgit v1.2.3-70-g09d2 From bb6d8c8828123e01e2ae6c9d9c4870477889fd94 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Mon, 19 Jun 2006 15:27:53 +0100 Subject: [ARM] 3567/2: arm: base support for Hilscher netX Patch from Sascha Hauer This patch adds the base support for Hilscher's netX network processors. Signed-off-by: Robert Schwebel Signed-off-by: Sascha Hauer Signed-off-by: Russell King --- arch/arm/Kconfig | 8 ++ arch/arm/Makefile | 1 + arch/arm/mach-netx/Makefile | 11 ++ arch/arm/mach-netx/Makefile.boot | 2 + arch/arm/mach-netx/generic.c | 193 ++++++++++++++++++++++++++++++++ arch/arm/mach-netx/generic.h | 24 ++++ arch/arm/mach-netx/time.c | 88 +++++++++++++++ arch/arm/mm/Kconfig | 4 +- include/asm-arm/arch-netx/debug-macro.S | 38 +++++++ include/asm-arm/arch-netx/dma.h | 21 ++++ include/asm-arm/arch-netx/entry-macro.S | 35 ++++++ include/asm-arm/arch-netx/hardware.h | 39 +++++++ include/asm-arm/arch-netx/io.h | 29 +++++ include/asm-arm/arch-netx/irqs.h | 70 ++++++++++++ include/asm-arm/arch-netx/memory.h | 36 ++++++ include/asm-arm/arch-netx/param.h | 18 +++ include/asm-arm/arch-netx/system.h | 38 +++++++ include/asm-arm/arch-netx/timex.h | 20 ++++ include/asm-arm/arch-netx/uncompress.h | 76 +++++++++++++ include/asm-arm/arch-netx/vmalloc.h | 19 ++++ 20 files changed, 768 insertions(+), 2 deletions(-) create mode 100644 arch/arm/mach-netx/Makefile create mode 100644 arch/arm/mach-netx/Makefile.boot create mode 100644 arch/arm/mach-netx/generic.c create mode 100644 arch/arm/mach-netx/generic.h create mode 100644 arch/arm/mach-netx/time.c create mode 100644 include/asm-arm/arch-netx/debug-macro.S create mode 100644 include/asm-arm/arch-netx/dma.h create mode 100644 include/asm-arm/arch-netx/entry-macro.S create mode 100644 include/asm-arm/arch-netx/hardware.h create mode 100644 include/asm-arm/arch-netx/io.h create mode 100644 include/asm-arm/arch-netx/irqs.h create mode 100644 include/asm-arm/arch-netx/memory.h create mode 100644 include/asm-arm/arch-netx/param.h create mode 100644 include/asm-arm/arch-netx/system.h create mode 100644 include/asm-arm/arch-netx/timex.h create mode 100644 include/asm-arm/arch-netx/uncompress.h create mode 100644 include/asm-arm/arch-netx/vmalloc.h (limited to 'include/asm-arm') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f47cf9af3bc..dfb97fe045d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -275,6 +275,12 @@ config ARCH_PNX4008 help This enables support for Philips PNX4008 mobile platform. +config ARCH_NETX + bool "Hilscher NetX based" + select ARM_VIC + help + This enables support for systems based on the Hilscher NetX Soc + endchoice source "arch/arm/mach-clps711x/Kconfig" @@ -319,6 +325,8 @@ source "arch/arm/mach-realview/Kconfig" source "arch/arm/mach-at91rm9200/Kconfig" +source "arch/arm/mach-netx/Kconfig" + # Definitions to make life easier config ARCH_ACORN bool diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 6c97aa70d3b..282b14e2f46 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -117,6 +117,7 @@ endif machine-$(CONFIG_ARCH_AT91RM9200) := at91rm9200 machine-$(CONFIG_ARCH_EP93XX) := ep93xx machine-$(CONFIG_ARCH_PNX4008) := pnx4008 + machine-$(CONFIG_ARCH_NETX) := netx ifeq ($(CONFIG_ARCH_EBSA110),y) # This is what happens if you forget the IOCS16 line. diff --git a/arch/arm/mach-netx/Makefile b/arch/arm/mach-netx/Makefile new file mode 100644 index 00000000000..257d02ef66d --- /dev/null +++ b/arch/arm/mach-netx/Makefile @@ -0,0 +1,11 @@ +# +# Makefile for the linux kernel. +# +# Note! Dependencies are done automagically by 'make dep', which also +# removes any old dependencies. DON'T put your own dependencies here +# unless it's something special (ie not a .c file). + +# Object file lists. + +obj-y += time.o generic.o + diff --git a/arch/arm/mach-netx/Makefile.boot b/arch/arm/mach-netx/Makefile.boot new file mode 100644 index 00000000000..b81cf6aff0a --- /dev/null +++ b/arch/arm/mach-netx/Makefile.boot @@ -0,0 +1,2 @@ + zreladdr-y := 0x80008000 + diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c new file mode 100644 index 00000000000..af0b13534cf --- /dev/null +++ b/arch/arm/mach-netx/generic.c @@ -0,0 +1,193 @@ +/* + * arch/arm/mach-netx/generic.c + * + * Copyright (C) 2005 Sascha Hauer , Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static struct map_desc netx_io_desc[] __initdata = { + { + .virtual = NETX_IO_VIRT, + .pfn = __phys_to_pfn(NETX_IO_PHYS), + .length = NETX_IO_SIZE, + .type = MT_DEVICE + } +}; + +void __init netx_map_io(void) +{ + iotable_init(netx_io_desc, ARRAY_SIZE(netx_io_desc)); +} + +static struct resource netx_rtc_resources[] = { + [0] = { + .start = 0x00101200, + .end = 0x00101220, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device netx_rtc_device = { + .name = "netx-rtc", + .id = 0, + .num_resources = ARRAY_SIZE(netx_rtc_resources), + .resource = netx_rtc_resources, +}; + +static struct platform_device *devices[] __initdata = { + &netx_rtc_device, +}; + +#if 0 +#define DEBUG_IRQ(fmt...) printk(fmt) +#else +#define DEBUG_IRQ(fmt...) while (0) {} +#endif + +static void +netx_hif_demux_handler(unsigned int irq_unused, struct irqdesc *desc, + struct pt_regs *regs) +{ + unsigned int irq = NETX_IRQ_HIF_CHAINED(0); + unsigned int stat; + + stat = ((readl(NETX_DPMAS_INT_EN) & + readl(NETX_DPMAS_INT_STAT)) >> 24) & 0x1f; + + desc = irq_desc + NETX_IRQ_HIF_CHAINED(0); + + while (stat) { + if (stat & 1) { + DEBUG_IRQ("handling irq %d\n", irq); + desc_handle_irq(irq, desc, regs); + } + irq++; + desc++; + stat >>= 1; + } +} + +static int +netx_hif_irq_type(unsigned int _irq, unsigned int type) +{ + unsigned int val, irq; + + val = readl(NETX_DPMAS_IF_CONF1); + + irq = _irq - NETX_IRQ_HIF_CHAINED(0); + + if (type & __IRQT_RISEDGE) { + DEBUG_IRQ("rising edges\n"); + val |= (1 << 26) << irq; + } + if (type & __IRQT_FALEDGE) { + DEBUG_IRQ("falling edges\n"); + val &= ~((1 << 26) << irq); + } + if (type & __IRQT_LOWLVL) { + DEBUG_IRQ("low level\n"); + val &= ~((1 << 26) << irq); + } + if (type & __IRQT_HIGHLVL) { + DEBUG_IRQ("high level\n"); + val |= (1 << 26) << irq; + } + + writel(val, NETX_DPMAS_IF_CONF1); + + return 0; +} + +static void +netx_hif_ack_irq(unsigned int _irq) +{ + unsigned int val, irq; + + irq = _irq - NETX_IRQ_HIF_CHAINED(0); + writel((1 << 24) << irq, NETX_DPMAS_INT_STAT); + + val = readl(NETX_DPMAS_INT_EN); + val &= ~((1 << 24) << irq); + writel(val, NETX_DPMAS_INT_EN); + + DEBUG_IRQ("%s: irq %d\n", __FUNCTION__, _irq); +} + +static void +netx_hif_mask_irq(unsigned int _irq) +{ + unsigned int val, irq; + + irq = _irq - NETX_IRQ_HIF_CHAINED(0); + val = readl(NETX_DPMAS_INT_EN); + val &= ~((1 << 24) << irq); + writel(val, NETX_DPMAS_INT_EN); + DEBUG_IRQ("%s: irq %d\n", __FUNCTION__, _irq); +} + +static void +netx_hif_unmask_irq(unsigned int _irq) +{ + unsigned int val, irq; + + irq = _irq - NETX_IRQ_HIF_CHAINED(0); + val = readl(NETX_DPMAS_INT_EN); + val |= (1 << 24) << irq; + writel(val, NETX_DPMAS_INT_EN); + DEBUG_IRQ("%s: irq %d\n", __FUNCTION__, _irq); +} + +static struct irqchip netx_hif_chip = { + .ack = netx_hif_ack_irq, + .mask = netx_hif_mask_irq, + .unmask = netx_hif_unmask_irq, + .set_type = netx_hif_irq_type, +}; + +void __init netx_init_irq(void) +{ + int irq; + + vic_init(__io(io_p2v(NETX_PA_VIC)), 0, ~0); + + for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) { + set_irq_chip(irq, &netx_hif_chip); + set_irq_handler(irq, do_level_IRQ); + set_irq_flags(irq, IRQF_VALID); + } + + writel(NETX_DPMAS_INT_EN_GLB_EN, NETX_DPMAS_INT_EN); + set_irq_chained_handler(NETX_IRQ_HIF, netx_hif_demux_handler); +} + +static int __init netx_init(void) +{ + return platform_add_devices(devices, ARRAY_SIZE(devices)); +} + +subsys_initcall(netx_init); + diff --git a/arch/arm/mach-netx/generic.h b/arch/arm/mach-netx/generic.h new file mode 100644 index 00000000000..ede2d35341c --- /dev/null +++ b/arch/arm/mach-netx/generic.h @@ -0,0 +1,24 @@ +/* + * arch/arm/mach-netx/generic.h + * + * Copyright (c) 2005 Sascha Hauer , Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +extern void __init netx_map_io(void); +extern void __init netx_init_irq(void); + +struct sys_timer; +extern struct sys_timer netx_timer; diff --git a/arch/arm/mach-netx/time.c b/arch/arm/mach-netx/time.c new file mode 100644 index 00000000000..edfbdf40c60 --- /dev/null +++ b/arch/arm/mach-netx/time.c @@ -0,0 +1,88 @@ +/* + * arch/arm/mach-netx/time.c + * + * Copyright (c) 2005 Sascha Hauer , Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include + +#include +#include +#include +#include + +/* + * Returns number of us since last clock interrupt. Note that interrupts + * will have been disabled by do_gettimeoffset() + */ +static unsigned long netx_gettimeoffset(void) +{ + return readl(NETX_GPIO_COUNTER_CURRENT(0)) / 100; +} + +/* + * IRQ handler for the timer + */ +static irqreturn_t +netx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) +{ + write_seqlock(&xtime_lock); + + timer_tick(regs); + write_sequnlock(&xtime_lock); + + /* acknowledge interrupt */ + writel(COUNTER_BIT(0), NETX_GPIO_IRQ); + + return IRQ_HANDLED; +} + + +static struct irqaction netx_timer_irq = { + .name = "NetX Timer Tick", + .flags = SA_INTERRUPT | SA_TIMER, + .handler = netx_timer_interrupt, +}; + +/* + * Set up timer interrupt + */ +static void __init netx_timer_init(void) +{ + /* disable timer initially */ + writel(0, NETX_GPIO_COUNTER_CTRL(0)); + + /* Reset the timer value to zero */ + writel(0, NETX_GPIO_COUNTER_CURRENT(0)); + + writel(LATCH, NETX_GPIO_COUNTER_MAX(0)); + + /* acknowledge interrupt */ + writel(COUNTER_BIT(0), NETX_GPIO_IRQ); + + /* Enable the interrupt in the specific timer register and start timer */ + writel(COUNTER_BIT(0), NETX_GPIO_IRQ_ENABLE); + writel(NETX_GPIO_COUNTER_CTRL_IRQ_EN | NETX_GPIO_COUNTER_CTRL_RUN, + NETX_GPIO_COUNTER_CTRL(0)); + + setup_irq(NETX_IRQ_TIMER0, &netx_timer_irq); +} + +struct sys_timer netx_timer = { + .init = netx_timer_init, + .offset = netx_gettimeoffset, +}; diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 1ff2f073a55..4221d054a1e 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -121,8 +121,8 @@ config CPU_ARM925T # ARM926T config CPU_ARM926T bool "Support ARM926T processor" - depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB || ARCH_PNX4008 - default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || ARCH_PNX4008 + depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB || ARCH_PNX4008 || ARCH_NETX + default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || ARCH_PNX4008 || ARCH_NETX select CPU_32v5 select CPU_ABRT_EV5TJ select CPU_CACHE_VIVT diff --git a/include/asm-arm/arch-netx/debug-macro.S b/include/asm-arm/arch-netx/debug-macro.S new file mode 100644 index 00000000000..a940d0e80cb --- /dev/null +++ b/include/asm-arm/arch-netx/debug-macro.S @@ -0,0 +1,38 @@ +/* linux/include/asm-arm/arch-netx/debug-macro.S + * + * Debugging macro include header + * + * Copyright (C) 1994-1999 Russell King + * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * +*/ + +#include "hardware.h" + + .macro addruart,rx + mrc p15, 0, \rx, c1, c0 + tst \rx, #1 @ MMU enabled? + moveq \rx, #0x00100000 @ physical + movne \rx, #io_p2v(0x00100000) @ virtual + orr \rx, \rx, #0x00000a00 + .endm + + .macro senduart,rd,rx + str \rd, [\rx, #0] + .endm + + .macro busyuart,rd,rx +1002: ldr \rd, [\rx, #0x18] + tst \rd, #(1 << 3) + bne 1002b + .endm + + .macro waituart,rd,rx +1001: ldr \rd, [\rx, #0x18] + tst \rd, #(1 << 3) + bne 1001b + .endm diff --git a/include/asm-arm/arch-netx/dma.h b/include/asm-arm/arch-netx/dma.h new file mode 100644 index 00000000000..4eda5feed81 --- /dev/null +++ b/include/asm-arm/arch-netx/dma.h @@ -0,0 +1,21 @@ +/* + * linux/include/asm-arm/arch-netx/dma.h + * + * Copyright (C) 2005 Sascha Hauer , Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#define MAX_DMA_CHANNELS 0 +#define MAX_DMA_ADDRESS ~0 diff --git a/include/asm-arm/arch-netx/entry-macro.S b/include/asm-arm/arch-netx/entry-macro.S new file mode 100644 index 00000000000..658df4d60ff --- /dev/null +++ b/include/asm-arm/arch-netx/entry-macro.S @@ -0,0 +1,35 @@ +/* + * include/asm-arm/arch-netx/entry-macro.S + * + * Low-level IRQ helper macros for Hilscher netX based platforms + * + * Copyright (C) 2005 Sascha Hauer , Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include + + .macro disable_fiq + .endm + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + mov \base, #io_p2v(0x00100000) + add \base, \base, #0x000ff000 + + ldr \irqstat, [\base, #0] + clz \irqnr, \irqstat + rsb \irqnr, \irqnr, #31 + cmp \irqstat, #0 + .endm + diff --git a/include/asm-arm/arch-netx/hardware.h b/include/asm-arm/arch-netx/hardware.h new file mode 100644 index 00000000000..7786c45455c --- /dev/null +++ b/include/asm-arm/arch-netx/hardware.h @@ -0,0 +1,39 @@ +/* + * include/asm-arm/arch-netx/hardware.h + * + * Copyright (C) 2005 Sascha Hauer , Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H + +#define NETX_IO_PHYS 0x00100000 +#define NETX_IO_VIRT 0xe0000000 +#define NETX_IO_SIZE 0x00100000 + +#define SRAM_INTERNAL_PHYS_0 0x00000 +#define SRAM_INTERNAL_PHYS_1 0x08000 +#define SRAM_INTERNAL_PHYS_2 0x10000 +#define SRAM_INTERNAL_PHYS_3 0x18000 +#define SRAM_INTERNAL_PHYS(no) ((no) * 0x8000) + +#define XPEC_MEM_SIZE 0x4000 +#define XMAC_MEM_SIZE 0x1000 +#define SRAM_MEM_SIZE 0x8000 + +#define io_p2v(x) ((x) - NETX_IO_PHYS + NETX_IO_VIRT) +#define io_v2p(x) ((x) - NETX_IO_VIRT + NETX_IO_PHYS) + +#endif diff --git a/include/asm-arm/arch-netx/io.h b/include/asm-arm/arch-netx/io.h new file mode 100644 index 00000000000..81b7bc47747 --- /dev/null +++ b/include/asm-arm/arch-netx/io.h @@ -0,0 +1,29 @@ +/* + * linux/include/asm-arm/arch-netx/io.h + * + * Copyright (C) 2005 Sascha Hauer , Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef __ASM_ARM_ARCH_IO_H +#define __ASM_ARM_ARCH_IO_H + +#define IO_SPACE_LIMIT 0xffffffff + +#define __io(a) ((void __iomem *)(a)) +#define __mem_pci(a) (a) +#define __mem_isa(a) (a) + +#endif diff --git a/include/asm-arm/arch-netx/irqs.h b/include/asm-arm/arch-netx/irqs.h new file mode 100644 index 00000000000..a487dc6e266 --- /dev/null +++ b/include/asm-arm/arch-netx/irqs.h @@ -0,0 +1,70 @@ +/* + * include/asm-arm/arch-netx/irqs.h + * + * Copyright (C) 2005 Sascha Hauer , Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#define NETX_IRQ_VIC_START 0 +#define NETX_IRQ_SOFTINT 0 +#define NETX_IRQ_TIMER0 1 +#define NETX_IRQ_TIMER1 2 +#define NETX_IRQ_TIMER2 3 +#define NETX_IRQ_SYSTIME_NS 4 +#define NETX_IRQ_SYSTIME_S 5 +#define NETX_IRQ_GPIO_15 6 +#define NETX_IRQ_WATCHDOG 7 +#define NETX_IRQ_UART0 8 +#define NETX_IRQ_UART1 9 +#define NETX_IRQ_UART2 10 +#define NETX_IRQ_USB 11 +#define NETX_IRQ_SPI 12 +#define NETX_IRQ_I2C 13 +#define NETX_IRQ_LCD 14 +#define NETX_IRQ_HIF 15 +#define NETX_IRQ_GPIO_0_14 16 +#define NETX_IRQ_XPEC0 17 +#define NETX_IRQ_XPEC1 18 +#define NETX_IRQ_XPEC2 19 +#define NETX_IRQ_XPEC3 20 +#define NETX_IRQ_XPEC(no) (17 + (no)) +#define NETX_IRQ_MSYNC0 21 +#define NETX_IRQ_MSYNC1 22 +#define NETX_IRQ_MSYNC2 23 +#define NETX_IRQ_MSYNC3 24 +#define NETX_IRQ_IRQ_PHY 25 +#define NETX_IRQ_ISO_AREA 26 +/* int 27 is reserved */ +/* int 28 is reserved */ +#define NETX_IRQ_TIMER3 29 +#define NETX_IRQ_TIMER4 30 +/* int 31 is reserved */ + +#define NETX_IRQS 32 + +/* for multiplexed irqs on gpio 0..14 */ +#define NETX_IRQ_GPIO(x) (NETX_IRQS + (x)) +#define NETX_IRQ_GPIO_LAST NETX_IRQ_GPIO(14) + +/* Host interface interrupts */ +#define NETX_IRQ_HIF_CHAINED(x) (NETX_IRQ_GPIO_LAST + 1 + (x)) +#define NETX_IRQ_HIF_PIO35 NETX_IRQ_HIF_CHAINED(0) +#define NETX_IRQ_HIF_PIO36 NETX_IRQ_HIF_CHAINED(1) +#define NETX_IRQ_HIF_PIO40 NETX_IRQ_HIF_CHAINED(2) +#define NETX_IRQ_HIF_PIO47 NETX_IRQ_HIF_CHAINED(3) +#define NETX_IRQ_HIF_PIO72 NETX_IRQ_HIF_CHAINED(4) +#define NETX_IRQ_HIF_LAST NETX_IRQ_HIF_CHAINED(4) + +#define NR_IRQS (NETX_IRQ_HIF_LAST + 1) diff --git a/include/asm-arm/arch-netx/memory.h b/include/asm-arm/arch-netx/memory.h new file mode 100644 index 00000000000..6d8d2df3e99 --- /dev/null +++ b/include/asm-arm/arch-netx/memory.h @@ -0,0 +1,36 @@ +/* + * linux/include/asm-arm/arch-netx/memory.h + * + * Copyright (C) 2005 Sascha Hauer , Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef __ASM_ARCH_MEMORY_H +#define __ASM_ARCH_MEMORY_H + +#define PHYS_OFFSET UL(0x80000000) + +/* + * Virtual view <-> DMA view memory address translations + * virt_to_bus: Used to translate the virtual address to an + * address suitable to be passed to set_dma_addr + * bus_to_virt: Used to convert an address for DMA operations + * to an address that the kernel can use. + */ +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt(x) __phys_to_virt(x) + +#endif + diff --git a/include/asm-arm/arch-netx/param.h b/include/asm-arm/arch-netx/param.h new file mode 100644 index 00000000000..7a80c26178a --- /dev/null +++ b/include/asm-arm/arch-netx/param.h @@ -0,0 +1,18 @@ +/* + * linux/include/asm-arm/arch-netx/param.h + * + * Copyright (C) 2005 Sascha Hauer , Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ diff --git a/include/asm-arm/arch-netx/system.h b/include/asm-arm/arch-netx/system.h new file mode 100644 index 00000000000..52adf368d76 --- /dev/null +++ b/include/asm-arm/arch-netx/system.h @@ -0,0 +1,38 @@ +/* + * include/asm-arm/arch-netx/system.h + * + * Copyright (C) 2005 Sascha Hauer , Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +#include +#include +#include "netx-regs.h" + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + +static inline void arch_reset(char mode) +{ + writel(NETX_SYSTEM_RES_CR_FIRMW_RES_EN | NETX_SYSTEM_RES_CR_FIRMW_RES, + NETX_SYSTEM_RES_CR); +} + +#endif + diff --git a/include/asm-arm/arch-netx/timex.h b/include/asm-arm/arch-netx/timex.h new file mode 100644 index 00000000000..7fdb42da0b4 --- /dev/null +++ b/include/asm-arm/arch-netx/timex.h @@ -0,0 +1,20 @@ +/* + * include/asm-arm/arch-netx/timex.h + * + * Copyright (C) 2005 Sascha Hauer , Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#define CLOCK_TICK_RATE 100000000 diff --git a/include/asm-arm/arch-netx/uncompress.h b/include/asm-arm/arch-netx/uncompress.h new file mode 100644 index 00000000000..f8943454710 --- /dev/null +++ b/include/asm-arm/arch-netx/uncompress.h @@ -0,0 +1,76 @@ +/* + * include/asm-arm/arch-netx/uncompress.h + * + * Copyright (C) 2005 Sascha Hauer , Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +/* + * The following code assumes the serial port has already been + * initialized by the bootloader. We search for the first enabled + * port in the most probable order. If you didn't setup a port in + * your bootloader then nothing will appear (which might be desired). + * + * This does not append a newline + */ + +#define REG(x) (*(volatile unsigned long *)(x)) + +#define UART1_BASE 0x100a00 +#define UART2_BASE 0x100a80 + +#define UART_DR 0x0 + +#define UART_CR 0x14 +#define CR_UART_EN (1<<0) + +#define UART_FR 0x18 +#define FR_BUSY (1<<3) +#define FR_TXFF (1<<5) + +static void putc(char c) +{ + unsigned long base; + + if (REG(UART1_BASE + UART_CR) & CR_UART_EN) + base = UART1_BASE; + else if (REG(UART2_BASE + UART_CR) & CR_UART_EN) + base = UART2_BASE; + else + return; + + while (REG(base + UART_FR) & FR_TXFF); + REG(base + UART_DR) = c; +} + +static inline void flush(void) +{ + unsigned long base; + + if (REG(UART1_BASE + UART_CR) & CR_UART_EN) + base = UART1_BASE; + else if (REG(UART2_BASE + UART_CR) & CR_UART_EN) + base = UART2_BASE; + else + return; + + while (REG(base + UART_FR) & FR_BUSY); +} + +/* + * nothing to do + */ +#define arch_decomp_setup() +#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-netx/vmalloc.h b/include/asm-arm/arch-netx/vmalloc.h new file mode 100644 index 00000000000..da2da5a595d --- /dev/null +++ b/include/asm-arm/arch-netx/vmalloc.h @@ -0,0 +1,19 @@ +/* + * linux/include/asm-arm/arch-netx/vmalloc.h + * + * Copyright (C) 2005 Sascha Hauer , Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#define VMALLOC_END (PAGE_OFFSET + 0x10000000) -- cgit v1.2.3-70-g09d2 From ef70cd4d247defcd7c0f789a5a98deab0afadf53 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Mon, 19 Jun 2006 15:28:19 +0100 Subject: [ARM] 3568/2: netX: pointer fifo driver Patch from Sascha Hauer This patch adds support for the pointer FIFOs on netX. Signed-off-by: Robert Schwebel Signed-off-by: Sascha Hauer Signed-off-by: Russell King --- arch/arm/mach-netx/Makefile | 2 +- arch/arm/mach-netx/pfifo.c | 68 +++++++++++++++++++++++++++++++++++++++ include/asm-arm/arch-netx/pfifo.h | 54 +++++++++++++++++++++++++++++++ 3 files changed, 123 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-netx/pfifo.c create mode 100644 include/asm-arm/arch-netx/pfifo.h (limited to 'include/asm-arm') diff --git a/arch/arm/mach-netx/Makefile b/arch/arm/mach-netx/Makefile index 257d02ef66d..cd424083e5b 100644 --- a/arch/arm/mach-netx/Makefile +++ b/arch/arm/mach-netx/Makefile @@ -7,5 +7,5 @@ # Object file lists. -obj-y += time.o generic.o +obj-y += time.o generic.o pfifo.o diff --git a/arch/arm/mach-netx/pfifo.c b/arch/arm/mach-netx/pfifo.c new file mode 100644 index 00000000000..44dea61a9de --- /dev/null +++ b/arch/arm/mach-netx/pfifo.c @@ -0,0 +1,68 @@ +/* + * arch/arm/mach-netx/pfifo.c + * + * Copyright (c) 2005 Sascha Hauer , Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include +#include + +#include +#include +#include +#include + +static DEFINE_MUTEX(pfifo_lock); + +static unsigned int pfifo_used = 0; + +int pfifo_request(unsigned int pfifo_mask) +{ + int err = 0; + unsigned int val; + + mutex_lock(&pfifo_lock); + + if (pfifo_mask & pfifo_used) { + err = -EBUSY; + goto out; + } + + pfifo_used |= pfifo_mask; + + val = readl(NETX_PFIFO_RESET); + writel(val | pfifo_mask, NETX_PFIFO_RESET); + writel(val, NETX_PFIFO_RESET); + +out: + mutex_unlock(&pfifo_lock); + return err; +} + +void pfifo_free(unsigned int pfifo_mask) +{ + mutex_lock(&pfifo_lock); + pfifo_used &= ~pfifo_mask; + mutex_unlock(&pfifo_lock); +} + +EXPORT_SYMBOL(pfifo_push); +EXPORT_SYMBOL(pfifo_pop); +EXPORT_SYMBOL(pfifo_fill_level); +EXPORT_SYMBOL(pfifo_empty); +EXPORT_SYMBOL(pfifo_request); +EXPORT_SYMBOL(pfifo_free); diff --git a/include/asm-arm/arch-netx/pfifo.h b/include/asm-arm/arch-netx/pfifo.h new file mode 100644 index 00000000000..4af2ee4a32c --- /dev/null +++ b/include/asm-arm/arch-netx/pfifo.h @@ -0,0 +1,54 @@ +/* + * include/asm-arm/arch-netx/pfifo.h + * + * Copyright (c) 2005 Sascha Hauer , Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + + +#ifndef ASM_ARCH_PFIFO_H +#define ASM_ARCH_PFIFO_H + +static inline int pfifo_push(int no, unsigned int pointer) +{ + writel(pointer, NETX_PFIFO_BASE(no)); + return 0; +} + +static inline unsigned int pfifo_pop(int no) +{ + return readl(NETX_PFIFO_BASE(no)); +} + +static inline int pfifo_fill_level(int no) +{ + + return readl(NETX_PFIFO_FILL_LEVEL(no)); +} + +static inline int pfifo_full(int no) +{ + return readl(NETX_PFIFO_FULL) & (1< Date: Mon, 19 Jun 2006 15:28:20 +0100 Subject: [ARM] 3569/2: netX: driver for XMAC/XPEC engines Patch from Sascha Hauer The netX processors have generic network bitstream engines (XMAC/XPEC). This driver adds support for firmware loading and start, stop, reset commands. Signed-off-by: Robert Schwebel Signed-off-by: Sascha Hauer Signed-off-by: Russell King --- arch/arm/mach-netx/Makefile | 2 +- arch/arm/mach-netx/xc.c | 255 +++++++++++++++++++++++++++++++++++++++++ include/asm-arm/arch-netx/xc.h | 42 +++++++ 3 files changed, 298 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-netx/xc.c create mode 100644 include/asm-arm/arch-netx/xc.h (limited to 'include/asm-arm') diff --git a/arch/arm/mach-netx/Makefile b/arch/arm/mach-netx/Makefile index cd424083e5b..b2b7dd25f21 100644 --- a/arch/arm/mach-netx/Makefile +++ b/arch/arm/mach-netx/Makefile @@ -7,5 +7,5 @@ # Object file lists. -obj-y += time.o generic.o pfifo.o +obj-y += time.o generic.o pfifo.o xc.o diff --git a/arch/arm/mach-netx/xc.c b/arch/arm/mach-netx/xc.c new file mode 100644 index 00000000000..172a058ddd6 --- /dev/null +++ b/arch/arm/mach-netx/xc.c @@ -0,0 +1,255 @@ +/* + * arch/arm/mach-netx/xc.c + * + * Copyright (c) 2005 Sascha Hauer , Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include +#include +#include + +#include +#include +#include + +#include + +static DEFINE_MUTEX(xc_lock); + +static int xc_in_use = 0; + +struct fw_desc { + unsigned int ofs; + unsigned int size; + unsigned int patch_ofs; + unsigned int patch_entries; +}; + +struct fw_header { + unsigned int magic; + unsigned int type; + unsigned int version; + unsigned int reserved[5]; + struct fw_desc fw_desc[3]; +} __attribute__ ((packed)); + +int xc_stop(struct xc *x) +{ + writel(RPU_HOLD_PC, x->xmac_base + NETX_XMAC_RPU_HOLD_PC_OFS); + writel(TPU_HOLD_PC, x->xmac_base + NETX_XMAC_TPU_HOLD_PC_OFS); + writel(XPU_HOLD_PC, x->xpec_base + NETX_XPEC_XPU_HOLD_PC_OFS); + return 0; +} + +int xc_start(struct xc *x) +{ + writel(0, x->xmac_base + NETX_XMAC_RPU_HOLD_PC_OFS); + writel(0, x->xmac_base + NETX_XMAC_TPU_HOLD_PC_OFS); + writel(0, x->xpec_base + NETX_XPEC_XPU_HOLD_PC_OFS); + return 0; +} + +int xc_running(struct xc *x) +{ + return (readl(x->xmac_base + NETX_XMAC_RPU_HOLD_PC_OFS) & RPU_HOLD_PC) + || (readl(x->xmac_base + NETX_XMAC_TPU_HOLD_PC_OFS) & TPU_HOLD_PC) + || (readl(x->xpec_base + NETX_XPEC_XPU_HOLD_PC_OFS) & XPU_HOLD_PC) ? + 0 : 1; +} + +int xc_reset(struct xc *x) +{ + writel(0, x->xpec_base + NETX_XPEC_PC_OFS); + return 0; +} + +static int xc_check_ptr(struct xc *x, unsigned long adr, unsigned int size) +{ + if (adr >= NETX_PA_XMAC(x->no) && + adr + size < NETX_PA_XMAC(x->no) + XMAC_MEM_SIZE) + return 0; + + if (adr >= NETX_PA_XPEC(x->no) && + adr + size < NETX_PA_XPEC(x->no) + XPEC_MEM_SIZE) + return 0; + + dev_err(x->dev, "Illegal pointer in firmware found. aborting\n"); + + return -1; +} + +static int xc_patch(struct xc *x, void *patch, int count) +{ + unsigned int val, adr; + unsigned int *data = patch; + + int i; + for (i = 0; i < count; i++) { + adr = *data++; + val = *data++; + if (xc_check_ptr(x, adr, 4) < 0) + return -EINVAL; + + writel(val, (void __iomem *)io_p2v(adr)); + } + return 0; +} + +int xc_request_firmware(struct xc *x) +{ + int ret; + char name[16]; + const struct firmware *fw; + struct fw_header *head; + unsigned int size; + int i; + void *src; + unsigned long dst; + + sprintf(name, "xc%d.bin", x->no); + + ret = request_firmware(&fw, name, x->dev); + + if (ret < 0) { + dev_err(x->dev, "request_firmware failed\n"); + return ret; + } + + head = (struct fw_header *)fw->data; + if (head->magic != 0x4e657458) { + if (head->magic == 0x5874654e) { + dev_err(x->dev, + "firmware magic is 'XteN'. Endianess problems?\n"); + ret = -ENODEV; + goto exit_release_firmware; + } + dev_err(x->dev, "unrecognized firmware magic 0x%08x\n", + head->magic); + ret = -ENODEV; + goto exit_release_firmware; + } + + x->type = head->type; + x->version = head->version; + + ret = -EINVAL; + + for (i = 0; i < 3; i++) { + src = fw->data + head->fw_desc[i].ofs; + dst = *(unsigned int *)src; + src += sizeof (unsigned int); + size = head->fw_desc[i].size - sizeof (unsigned int); + + if (xc_check_ptr(x, dst, size)) + goto exit_release_firmware; + + memcpy((void *)io_p2v(dst), src, size); + + src = fw->data + head->fw_desc[i].patch_ofs; + size = head->fw_desc[i].patch_entries; + ret = xc_patch(x, src, size); + if (ret < 0) + goto exit_release_firmware; + } + + ret = 0; + + exit_release_firmware: + release_firmware(fw); + + return ret; +} + +struct xc *request_xc(int xcno, struct device *dev) +{ + struct xc *x = NULL; + + mutex_lock(&xc_lock); + + if (xcno > 3) + goto exit; + if (xc_in_use & (1 << xcno)) + goto exit; + + x = kmalloc(sizeof (struct xc), GFP_KERNEL); + if (!x) + goto exit; + + if (!request_mem_region + (NETX_PA_XPEC(xcno), XPEC_MEM_SIZE, dev->kobj.name)) + goto exit_free; + + if (!request_mem_region + (NETX_PA_XMAC(xcno), XMAC_MEM_SIZE, dev->kobj.name)) + goto exit_release_1; + + if (!request_mem_region + (SRAM_INTERNAL_PHYS(xcno), SRAM_MEM_SIZE, dev->kobj.name)) + goto exit_release_2; + + x->xpec_base = (void * __iomem)io_p2v(NETX_PA_XPEC(xcno)); + x->xmac_base = (void * __iomem)io_p2v(NETX_PA_XMAC(xcno)); + x->sram_base = ioremap(SRAM_INTERNAL_PHYS(xcno), SRAM_MEM_SIZE); + if (!x->sram_base) + goto exit_release_3; + + x->irq = NETX_IRQ_XPEC(xcno); + + x->no = xcno; + x->dev = dev; + + xc_in_use |= (1 << xcno); + + goto exit; + + exit_release_3: + release_mem_region(SRAM_INTERNAL_PHYS(xcno), SRAM_MEM_SIZE); + exit_release_2: + release_mem_region(NETX_PA_XMAC(xcno), XMAC_MEM_SIZE); + exit_release_1: + release_mem_region(NETX_PA_XPEC(xcno), XPEC_MEM_SIZE); + exit_free: + kfree(x); + x = NULL; + exit: + mutex_unlock(&xc_lock); + return x; +} + +void free_xc(struct xc *x) +{ + int xcno = x->no; + + mutex_lock(&xc_lock); + + iounmap(x->sram_base); + release_mem_region(SRAM_INTERNAL_PHYS(xcno), SRAM_MEM_SIZE); + release_mem_region(NETX_PA_XMAC(xcno), XMAC_MEM_SIZE); + release_mem_region(NETX_PA_XPEC(xcno), XPEC_MEM_SIZE); + xc_in_use &= ~(1 << x->no); + kfree(x); + + mutex_unlock(&xc_lock); +} + +EXPORT_SYMBOL(free_xc); +EXPORT_SYMBOL(request_xc); +EXPORT_SYMBOL(xc_request_firmware); +EXPORT_SYMBOL(xc_reset); +EXPORT_SYMBOL(xc_running); +EXPORT_SYMBOL(xc_start); +EXPORT_SYMBOL(xc_stop); diff --git a/include/asm-arm/arch-netx/xc.h b/include/asm-arm/arch-netx/xc.h new file mode 100644 index 00000000000..659af19512a --- /dev/null +++ b/include/asm-arm/arch-netx/xc.h @@ -0,0 +1,42 @@ +/* + * linux/include/asm-arm/arch-netx/xc.h + * + * Copyright (C) 2005 Sascha Hauer , Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef __ASM_ARCH_XC_H +#define __ASM_ARCH_XC_H + +struct xc { + int no; + unsigned int type; + unsigned int version; + void __iomem *xpec_base; + void __iomem *xmac_base; + void __iomem *sram_base; + int irq; + struct device *dev; +}; + +int xc_reset(struct xc *x); +int xc_stop(struct xc* x); +int xc_start(struct xc *x); +int xc_running(struct xc *x); +int xc_request_firmware(struct xc* x); +struct xc* request_xc(int xcno, struct device *dev); +void free_xc(struct xc *x); + +#endif /* __ASM_ARCH_XC_H */ -- cgit v1.2.3-70-g09d2 From 441ff855f3edf5d355bea30f557bbed6bcd42c6c Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Mon, 19 Jun 2006 15:35:36 +0100 Subject: [ARM] Fix byte order macros for Thumb The byte order functions are visible to userspace. Unfortunately, __arch_swab32() contains an assembly instruction which is invalid when compiling for Thumb. This reverts to the C version when compiling for Thumb. Signed-off-by: H. Peter Anvin Signed-off-by: Russell King --- include/asm-arm/byteorder.h | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/byteorder.h b/include/asm-arm/byteorder.h index 17eaf8bdf09..e6f7fcdc73b 100644 --- a/include/asm-arm/byteorder.h +++ b/include/asm-arm/byteorder.h @@ -22,16 +22,18 @@ static inline __attribute_const__ __u32 ___arch__swab32(__u32 x) { __u32 t; - if (__builtin_constant_p(x)) { - t = x ^ ((x << 16) | (x >> 16)); /* eor r1,r0,r0,ror #16 */ - } else { +#ifndef __thumb__ + if (!__builtin_constant_p(x)) { /* * The compiler needs a bit of a hint here to always do the * right thing and not screw it up to different degrees * depending on the gcc version. */ asm ("eor\t%0, %1, %1, ror #16" : "=r" (t) : "r" (x)); - } + } else +#endif + t = x ^ ((x << 16) | (x >> 16)); /* eor r1,r0,r0,ror #16 */ + x = (x << 24) | (x >> 8); /* mov r0,r0,ror #8 */ t &= ~0x00FF0000; /* bic r1,r1,#0x00FF0000 */ x ^= (t >> 8); /* eor r0,r0,r1,lsr #8 */ -- cgit v1.2.3-70-g09d2 From 7238d7ee82d325212e83630047e9844943225118 Mon Sep 17 00:00:00 2001 From: Andrew Victor Date: Mon, 19 Jun 2006 16:57:00 +0100 Subject: [ARM] 3586/1: AT91RM9200 header update Patch from Andrew Victor Added definition for the bits in the Chip ID register. Corrected the capitalization of AT91_RTC_AMPM register name. Signed-off-by: Andrew Victor Signed-off-by: Russell King --- include/asm-arm/arch-at91rm9200/at91rm9200_sys.h | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-at91rm9200/at91rm9200_sys.h b/include/asm-arm/arch-at91rm9200/at91rm9200_sys.h index 2910d359f91..0f4c12d5f0c 100644 --- a/include/asm-arm/arch-at91rm9200/at91rm9200_sys.h +++ b/include/asm-arm/arch-at91rm9200/at91rm9200_sys.h @@ -68,8 +68,17 @@ #define AT91_DBGU_RHR (AT91_DBGU + 0x18) /* Receiver Holding Register */ #define AT91_DBGU_THR (AT91_DBGU + 0x1c) /* Transmitter Holding Register */ #define AT91_DBGU_BRGR (AT91_DBGU + 0x20) /* Baud Rate Generator Register */ + #define AT91_DBGU_CIDR (AT91_DBGU + 0x40) /* Chip ID Register */ #define AT91_DBGU_EXID (AT91_DBGU + 0x44) /* Chip ID Extension Register */ +#define AT91_CIDR_VERSION (0x1f << 0) /* Version of the Device */ +#define AT91_CIDR_EPROC (7 << 5) /* Embedded Processor */ +#define AT91_CIDR_NVPSIZ (0xf << 8) /* Nonvolatile Program Memory Size */ +#define AT91_CIDR_NVPSIZ2 (0xf << 12) /* Second Nonvolatile Program Memory Size */ +#define AT91_CIDR_SRAMSIZ (0xf << 16) /* Internal SRAM Size */ +#define AT91_CIDR_ARCH (0xff << 20) /* Architecture Identifier */ +#define AT91_CIDR_NVPTYP (7 << 28) /* Nonvolatile Program Memory Type */ +#define AT91_CIDR_EXT (1 << 31) /* Extension Flag */ /* @@ -241,7 +250,7 @@ #define AT91_RTC_SEC (0x7f << 0) /* Current Second */ #define AT91_RTC_MIN (0x7f << 8) /* Current Minute */ #define AT91_RTC_HOUR (0x3f << 16) /* Current Hour */ -#define At91_RTC_AMPM (1 << 22) /* Ante Meridiem Post Meridiem Indicator */ +#define AT91_RTC_AMPM (1 << 22) /* Ante Meridiem Post Meridiem Indicator */ #define AT91_RTC_CALR (AT91_RTC + 0x0c) /* Calendar Register */ #define AT91_RTC_CENT (0x7f << 0) /* Current Century */ -- cgit v1.2.3-70-g09d2 From 82c583e3ae31ffa76d1280197274cc1e1cde3179 Mon Sep 17 00:00:00 2001 From: Andrew Victor Date: Mon, 19 Jun 2006 16:57:00 +0100 Subject: [ARM] 3587/1: AT91RM9200 hardware headers Patch from Andrew Victor These headers define the registers and bits for the SPI (Serial Peripheral Interface), SSC (Synchronous Serial), TC (Timer/Counter) and UDP (USB Device) peripherals integrated in the AT91RM9200 processor. (They will probably also be usable for the AT91SAM9 series of SoC processors) Signed-off-by: Andrew Victor Signed-off-by: Russell King --- include/asm-arm/arch-at91rm9200/at91rm9200_spi.h | 81 +++++++++++++ include/asm-arm/arch-at91rm9200/at91rm9200_ssc.h | 96 +++++++++++++++ include/asm-arm/arch-at91rm9200/at91rm9200_tc.h | 146 +++++++++++++++++++++++ include/asm-arm/arch-at91rm9200/at91rm9200_udp.h | 77 ++++++++++++ 4 files changed, 400 insertions(+) create mode 100644 include/asm-arm/arch-at91rm9200/at91rm9200_spi.h create mode 100644 include/asm-arm/arch-at91rm9200/at91rm9200_ssc.h create mode 100644 include/asm-arm/arch-at91rm9200/at91rm9200_tc.h create mode 100644 include/asm-arm/arch-at91rm9200/at91rm9200_udp.h (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-at91rm9200/at91rm9200_spi.h b/include/asm-arm/arch-at91rm9200/at91rm9200_spi.h new file mode 100644 index 00000000000..bff5ea45f60 --- /dev/null +++ b/include/asm-arm/arch-at91rm9200/at91rm9200_spi.h @@ -0,0 +1,81 @@ +/* + * include/asm-arm/arch-at91rm9200/at91rm9200_spi.h + * + * Copyright (C) 2005 Ivan Kokshaysky + * Copyright (C) SAN People + * + * Serial Peripheral Interface (SPI) registers. + * Based on AT91RM9200 datasheet revision E. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91RM9200_SPI_H +#define AT91RM9200_SPI_H + +#define AT91_SPI_CR 0x00 /* Control Register */ +#define AT91_SPI_SPIEN (1 << 0) /* SPI Enable */ +#define AT91_SPI_SPIDIS (1 << 1) /* SPI Disable */ +#define AT91_SPI_SWRST (1 << 7) /* SPI Software Reset */ +#define AT91_SPI_LASTXFER (1 << 24) /* Last Transfer [SAM9261 only] */ + +#define AT91_SPI_MR 0x04 /* Mode Register */ +#define AT91_SPI_MSTR (1 << 0) /* Master/Slave Mode */ +#define AT91_SPI_PS (1 << 1) /* Peripheral Select */ +#define AT91_SPI_PS_FIXED (0 << 1) +#define AT91_SPI_PS_VARIABLE (1 << 1) +#define AT91_SPI_PCSDEC (1 << 2) /* Chip Select Decode */ +#define AT91_SPI_DIV32 (1 << 3) /* Clock Selection */ +#define AT91_SPI_MODFDIS (1 << 4) /* Mode Fault Detection */ +#define AT91_SPI_LLB (1 << 7) /* Local Loopback Enable */ +#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ +#define AT91_SPI_DLYBCS (0xff << 24) /* Delay Between Chip Selects */ + +#define AT91_SPI_RDR 0x08 /* Receive Data Register */ +#define AT91_SPI_RD (0xffff << 0) /* Receive Data */ +#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ + +#define AT91_SPI_TDR 0x0c /* Transmit Data Register */ +#define AT91_SPI_TD (0xffff << 0) /* Transmit Data */ +#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ +#define AT91_SPI_LASTXFER (1 << 24) /* Last Transfer [SAM9261 only] */ + +#define AT91_SPI_SR 0x10 /* Status Register */ +#define AT91_SPI_RDRF (1 << 0) /* Receive Data Register Full */ +#define AT91_SPI_TDRE (1 << 1) /* Transmit Data Register Full */ +#define AT91_SPI_MODF (1 << 2) /* Mode Fault Error */ +#define AT91_SPI_OVRES (1 << 3) /* Overrun Error Status */ +#define AT91_SPI_ENDRX (1 << 4) /* End of RX buffer */ +#define AT91_SPI_ENDTX (1 << 5) /* End of TX buffer */ +#define AT91_SPI_RXBUFF (1 << 6) /* RX Buffer Full */ +#define AT91_SPI_TXBUFE (1 << 7) /* TX Buffer Empty */ +#define AT91_SPI_NSSR (1 << 8) /* NSS Rising [SAM9261 only] */ +#define AT91_SPI_TXEMPTY (1 << 9) /* Transmission Register Empty [SAM9261 only] */ +#define AT91_SPI_SPIENS (1 << 16) /* SPI Enable Status */ + +#define AT91_SPI_IER 0x14 /* Interrupt Enable Register */ +#define AT91_SPI_IDR 0x18 /* Interrupt Disable Register */ +#define AT91_SPI_IMR 0x1c /* Interrupt Mask Register */ + +#define AT91_SPI_CSR(n) (0x30 + ((n) * 4)) /* Chip Select Registers 0-3 */ +#define AT91_SPI_CPOL (1 << 0) /* Clock Polarity */ +#define AT91_SPI_NCPHA (1 << 1) /* Clock Phase */ +#define AT91_SPI_CSAAT (1 << 3) /* Chip Select Active After Transfer [SAM9261 only] */ +#define AT91_SPI_BITS (0xf << 4) /* Bits Per Transfer */ +#define AT91_SPI_BITS_8 (0 << 4) +#define AT91_SPI_BITS_9 (1 << 4) +#define AT91_SPI_BITS_10 (2 << 4) +#define AT91_SPI_BITS_11 (3 << 4) +#define AT91_SPI_BITS_12 (4 << 4) +#define AT91_SPI_BITS_13 (5 << 4) +#define AT91_SPI_BITS_14 (6 << 4) +#define AT91_SPI_BITS_15 (7 << 4) +#define AT91_SPI_BITS_16 (8 << 4) +#define AT91_SPI_SCBR (0xff << 8) /* Serial Clock Baud Rate */ +#define AT91_SPI_DLYBS (0xff << 16) /* Delay before SPCK */ +#define AT91_SPI_DLYBCT (0xff << 24) /* Delay between Consecutive Transfers */ + +#endif diff --git a/include/asm-arm/arch-at91rm9200/at91rm9200_ssc.h b/include/asm-arm/arch-at91rm9200/at91rm9200_ssc.h new file mode 100644 index 00000000000..ac880227147 --- /dev/null +++ b/include/asm-arm/arch-at91rm9200/at91rm9200_ssc.h @@ -0,0 +1,96 @@ +/* + * include/asm-arm/arch-at91rm9200/at91rm9200_ssc.h + * + * Copyright (C) SAN People + * + * Serial Synchronous Controller (SSC) registers. + * Based on AT91RM9200 datasheet revision E. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91RM9200_SSC_H +#define AT91RM9200_SSC_H + +#define AT91_SSC_CR 0x00 /* Control Register */ +#define AT91_SSC_RXEN (1 << 0) /* Receive Enable */ +#define AT91_SSC_RXDIS (1 << 1) /* Receive Disable */ +#define AT91_SSC_TXEN (1 << 8) /* Transmit Enable */ +#define AT91_SSC_TXDIS (1 << 9) /* Transmit Disable */ +#define AT91_SSC_SWRST (1 << 15) /* Software Reset */ + +#define AT91_SSC_CMR 0x04 /* Clock Mode Register */ +#define AT91_SSC_CMR_DIV (0xfff << 0) /* Clock Divider */ + +#define AT91_SSC_RCMR 0x10 /* Receive Clock Mode Register */ +#define AT91_SSC_CKS (3 << 0) /* Clock Selection */ +#define AT91_SSC_CKS_DIV (0 << 0) +#define AT91_SSC_CKS_CLOCK (1 << 0) +#define AT91_SSC_CKS_PIN (2 << 0) +#define AT91_SSC_CKO (7 << 2) /* Clock Output Mode Selection */ +#define AT91_SSC_CKO_NONE (0 << 2) +#define AT91_SSC_CKO_CONTINUOUS (1 << 2) +#define AT91_SSC_CKI (1 << 5) /* Clock Inversion */ +#define AT91_SSC_CKI_FALLING (0 << 5) +#define AT91_SSC_CK_RISING (1 << 5) +#define AT91_SSC_START (0xf << 8) /* Start Selection */ +#define AT91_SSC_START_CONTINUOUS (0 << 8) +#define AT91_SSC_START_TX_RX (1 << 8) +#define AT91_SSC_START_LOW_RF (2 << 8) +#define AT91_SSC_START_HIGH_RF (3 << 8) +#define AT91_SSC_START_FALLING_RF (4 << 8) +#define AT91_SSC_START_RISING_RF (5 << 8) +#define AT91_SSC_START_LEVEL_RF (6 << 8) +#define AT91_SSC_START_EDGE_RF (7 << 8) +#define AT91_SSC_STTDLY (0xff << 16) /* Start Delay */ +#define AT91_SSC_PERIOD (0xff << 24) /* Period Divider Selection */ + +#define AT91_SSC_RFMR 0x14 /* Receive Frame Mode Register */ +#define AT91_SSC_DATALEN (0x1f << 0) /* Data Length */ +#define AT91_SSC_LOOP (1 << 5) /* Loop Mode */ +#define AT91_SSC_MSBF (1 << 7) /* Most Significant Bit First */ +#define AT91_SSC_DATNB (0xf << 8) /* Data Number per Frame */ +#define AT91_SSC_FSLEN (0xf << 16) /* Frame Sync Length */ +#define AT91_SSC_FSOS (7 << 20) /* Frame Sync Output Selection */ +#define AT91_SSC_FSOS_NONE (0 << 20) +#define AT91_SSC_FSOS_NEGATIVE (1 << 20) +#define AT91_SSC_FSOS_POSITIVE (2 << 20) +#define AT91_SSC_FSOS_LOW (3 << 20) +#define AT91_SSC_FSOS_HIGH (4 << 20) +#define AT91_SSC_FSOS_TOGGLE (5 << 20) +#define AT91_SSC_FSEDGE (1 << 24) /* Frame Sync Edge Detection */ +#define AT91_SSC_FSEDGE_POSITIVE (0 << 24) +#define AT91_SSC_FSEDGE_NEGATIVE (1 << 24) + +#define AT91_SSC_TCMR 0x18 /* Transmit Clock Mode Register */ +#define AT91_SSC_TFMR 0x1c /* Transmit Fram Mode Register */ +#define AT91_SSC_DATDEF (1 << 5) /* Data Default Value */ +#define AT91_SSC_FSDEN (1 << 23) /* Frame Sync Data Enable */ + +#define AT91_SSC_RHR 0x20 /* Receive Holding Register */ +#define AT91_SSC_THR 0x24 /* Transmit Holding Register */ +#define AT91_SSC_RSHR 0x30 /* Receive Sync Holding Register */ +#define AT91_SSC_TSHR 0x34 /* Transmit Sync Holding Register */ + +#define AT91_SSC_SR 0x40 /* Status Register */ +#define AT91_SSC_TXRDY (1 << 0) /* Transmit Ready */ +#define AT91_SSC_TXEMPTY (1 << 1) /* Transmit Empty */ +#define AT91_SSC_ENDTX (1 << 2) /* End of Transmission */ +#define AT91_SSC_TXBUFE (1 << 3) /* Transmit Buffer Empty */ +#define AT91_SSC_RXRDY (1 << 4) /* Receive Ready */ +#define AT91_SSC_OVRUN (1 << 5) /* Receive Overrun */ +#define AT91_SSC_ENDRX (1 << 6) /* End of Reception */ +#define AT91_SSC_RXBUFF (1 << 7) /* Receive Buffer Full */ +#define AT91_SSC_TXSYN (1 << 10) /* Transmit Sync */ +#define AT91_SSC_RXSYN (1 << 11) /* Receive Sync */ +#define AT91_SSC_TXENA (1 << 16) /* Transmit Enable */ +#define AT91_SSC_RXENA (1 << 17) /* Receive Enable */ + +#define AT91_SSC_IER 0x44 /* Interrupt Enable Register */ +#define AT91_SSC_IDR 0x48 /* Interrupt Disable Register */ +#define AT91_SSC_IMR 0x4c /* Interrupt Mask Register */ + +#endif diff --git a/include/asm-arm/arch-at91rm9200/at91rm9200_tc.h b/include/asm-arm/arch-at91rm9200/at91rm9200_tc.h new file mode 100644 index 00000000000..f4da752bb0c --- /dev/null +++ b/include/asm-arm/arch-at91rm9200/at91rm9200_tc.h @@ -0,0 +1,146 @@ +/* + * include/asm-arm/arch-at91rm9200/at91rm9200_tc.h + * + * Copyright (C) SAN People + * + * Timer/Counter Unit (TC) registers. + * Based on AT91RM9200 datasheet revision E. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91RM9200_TC_H +#define AT91RM9200_TC_H + +#define AT91_TC_BCR 0xc0 /* TC Block Control Register */ +#define AT91_TC_SYNC (1 << 0) /* Synchro Command */ + +#define AT91_TC_BMR 0xc4 /* TC Block Mode Register */ +#define AT91_TC_TC0XC0S (3 << 0) /* External Clock Signal 0 Selection */ +#define AT91_TC_TC0XC0S_TCLK0 (0 << 0) +#define AT91_TC_TC0XC0S_NONE (1 << 0) +#define AT91_TC_TC0XC0S_TIOA1 (2 << 0) +#define AT91_TC_TC0XC0S_TIOA2 (3 << 0) +#define AT91_TC_TC1XC1S (3 << 2) /* External Clock Signal 1 Selection */ +#define AT91_TC_TC1XC1S_TCLK1 (0 << 2) +#define AT91_TC_TC1XC1S_NONE (1 << 2) +#define AT91_TC_TC1XC1S_TIOA0 (2 << 2) +#define AT91_TC_TC1XC1S_TIOA2 (3 << 2) +#define AT91_TC_TC2XC2S (3 << 4) /* External Clock Signal 2 Selection */ +#define AT91_TC_TC2XC2S_TCLK2 (0 << 4) +#define AT91_TC_TC2XC2S_NONE (1 << 4) +#define AT91_TC_TC2XC2S_TIOA0 (2 << 4) +#define AT91_TC_TC2XC2S_TIOA1 (3 << 4) + + +#define AT91_TC_CCR 0x00 /* Channel Control Register */ +#define AT91_TC_CLKEN (1 << 0) /* Counter Clock Enable Command */ +#define AT91_TC_CLKDIS (1 << 1) /* Counter CLock Disable Command */ +#define AT91_TC_SWTRG (1 << 2) /* Software Trigger Command */ + +#define AT91_TC_CMR 0x04 /* Channel Mode Register */ +#define AT91_TC_TCCLKS (7 << 0) /* Capture/Waveform Mode: Clock Selection */ +#define AT91_TC_TIMER_CLOCK1 (0 << 0) +#define AT91_TC_TIMER_CLOCK2 (1 << 0) +#define AT91_TC_TIMER_CLOCK3 (2 << 0) +#define AT91_TC_TIMER_CLOCK4 (3 << 0) +#define AT91_TC_TIMER_CLOCK5 (4 << 0) +#define AT91_TC_XC0 (5 << 0) +#define AT91_TC_XC1 (6 << 0) +#define AT91_TC_XC2 (7 << 0) +#define AT91_TC_CLKI (1 << 3) /* Capture/Waveform Mode: Clock Invert */ +#define AT91_TC_BURST (3 << 4) /* Capture/Waveform Mode: Burst Signal Selection */ +#define AT91_TC_LDBSTOP (1 << 6) /* Capture Mode: Counter Clock Stopped with TB Loading */ +#define AT91_TC_LDBDIS (1 << 7) /* Capture Mode: Counter Clock Disable with RB Loading */ +#define AT91_TC_ETRGEDG (3 << 8) /* Capture Mode: External Trigger Edge Selection */ +#define AT91_TC_ABETRG (1 << 10) /* Capture Mode: TIOA or TIOB External Trigger Selection */ +#define AT91_TC_CPCTRG (1 << 14) /* Capture Mode: RC Compare Trigger Enable */ +#define AT91_TC_WAVE (1 << 15) /* Capture/Waveform mode */ +#define AT91_TC_LDRA (3 << 16) /* Capture Mode: RA Loading Selection */ +#define AT91_TC_LDRB (3 << 18) /* Capture Mode: RB Loading Selection */ + +#define AT91_TC_CPCSTOP (1 << 6) /* Waveform Mode: Counter Clock Stopped with RC Compare */ +#define AT91_TC_CPCDIS (1 << 7) /* Waveform Mode: Counter Clock Disable with RC Compare */ +#define AT91_TC_EEVTEDG (3 << 8) /* Waveform Mode: External Event Edge Selection */ +#define AT91_TC_EEVTEDG_NONE (0 << 8) +#define AT91_TC_EEVTEDG_RISING (1 << 8) +#define AT91_TC_EEVTEDG_FALLING (2 << 8) +#define AT91_TC_EEVTEDG_BOTH (3 << 8) +#define AT91_TC_EEVT (3 << 10) /* Waveform Mode: External Event Selection */ +#define AT91_TC_EEVT_TIOB (0 << 10) +#define AT91_TC_EEVT_XC0 (1 << 10) +#define AT91_TC_EEVT_XC1 (2 << 10) +#define AT91_TC_EEVT_XC2 (3 << 10) +#define AT91_TC_ENETRG (1 << 12) /* Waveform Mode: External Event Trigger Enable */ +#define AT91_TC_WAVESEL (3 << 13) /* Waveform Mode: Waveform Selection */ +#define AT91_TC_WAVESEL_UP (0 << 13) +#define AT91_TC_WAVESEL_UP_AUTO (2 << 13) +#define AT91_TC_WAVESEL_UPDOWN (1 << 13) +#define AT91_TC_WAVESEL_UPDOWN_AUTO (3 << 13) +#define AT91_TC_ACPA (3 << 16) /* Waveform Mode: RA Compare Effect on TIOA */ +#define AT91_TC_ACPA_NONE (0 << 16) +#define AT91_TC_ACPA_SET (1 << 16) +#define AT91_TC_ACPA_CLEAR (2 << 16) +#define AT91_TC_ACPA_TOGGLE (3 << 16) +#define AT91_TC_ACPC (3 << 18) /* Waveform Mode: RC Compre Effect on TIOA */ +#define AT91_TC_ACPC_NONE (0 << 18) +#define AT91_TC_ACPC_SET (1 << 18) +#define AT91_TC_ACPC_CLEAR (2 << 18) +#define AT91_TC_ACPC_TOGGLE (3 << 18) +#define AT91_TC_AEEVT (3 << 20) /* Waveform Mode: External Event Effect on TIOA */ +#define AT91_TC_AEEVT_NONE (0 << 20) +#define AT91_TC_AEEVT_SET (1 << 20) +#define AT91_TC_AEEVT_CLEAR (2 << 20) +#define AT91_TC_AEEVT_TOGGLE (3 << 20) +#define AT91_TC_ASWTRG (3 << 22) /* Waveform Mode: Software Trigger Effect on TIOA */ +#define AT91_TC_ASWTRG_NONE (0 << 22) +#define AT91_TC_ASWTRG_SET (1 << 22) +#define AT91_TC_ASWTRG_CLEAR (2 << 22) +#define AT91_TC_ASWTRG_TOGGLE (3 << 22) +#define AT91_TC_BCPB (3 << 24) /* Waveform Mode: RB Compare Effect on TIOB */ +#define AT91_TC_BCPB_NONE (0 << 24) +#define AT91_TC_BCPB_SET (1 << 24) +#define AT91_TC_BCPB_CLEAR (2 << 24) +#define AT91_TC_BCPB_TOGGLE (3 << 24) +#define AT91_TC_BCPC (3 << 26) /* Waveform Mode: RC Compare Effect on TIOB */ +#define AT91_TC_BCPC_NONE (0 << 26) +#define AT91_TC_BCPC_SET (1 << 26) +#define AT91_TC_BCPC_CLEAR (2 << 26) +#define AT91_TC_BCPC_TOGGLE (3 << 26) +#define AT91_TC_BEEVT (3 << 28) /* Waveform Mode: External Event Effect on TIOB */ +#define AT91_TC_BEEVT_NONE (0 << 28) +#define AT91_TC_BEEVT_SET (1 << 28) +#define AT91_TC_BEEVT_CLEAR (2 << 28) +#define AT91_TC_BEEVT_TOGGLE (3 << 28) +#define AT91_TC_BSWTRG (3 << 30) /* Waveform Mode: Software Trigger Effect on TIOB */ +#define AT91_TC_BSWTRG_NONE (0 << 30) +#define AT91_TC_BSWTRG_SET (1 << 30) +#define AT91_TC_BSWTRG_CLEAR (2 << 30) +#define AT91_TC_BSWTRG_TOGGLE (3 << 30) + +#define AT91_TC_CV 0x10 /* Counter Value */ +#define AT91_TC_RA 0x14 /* Register A */ +#define AT91_TC_RB 0x18 /* Register B */ +#define AT91_TC_RC 0x1c /* Register C */ + +#define AT91_TC_SR 0x20 /* Status Register */ +#define AT91_TC_COVFS (1 << 0) /* Counter Overflow Status */ +#define AT91_TC_LOVRS (1 << 1) /* Load Overrun Status */ +#define AT91_TC_CPAS (1 << 2) /* RA Compare Status */ +#define AT91_TC_CPBS (1 << 3) /* RB Compare Status */ +#define AT91_TC_CPCS (1 << 4) /* RC Compare Status */ +#define AT91_TC_LDRAS (1 << 5) /* RA Loading Status */ +#define AT91_TC_LDRBS (1 << 6) /* RB Loading Status */ +#define AT91_TC_ETRGS (1 << 7) /* External Trigger Status */ +#define AT91_TC_CLKSTA (1 << 16) /* Clock Enabling Status */ +#define AT91_TC_MTIOA (1 << 17) /* TIOA Mirror */ +#define AT91_TC_MTIOB (1 << 18) /* TIOB Mirror */ + +#define AT91_TC_IER 0x24 /* Interrupt Enable Register */ +#define AT91_TC_IDR 0x28 /* Interrupt Disable Register */ +#define AT91_TC_IMR 0x2c /* Interrupt Mask Register */ + +#endif diff --git a/include/asm-arm/arch-at91rm9200/at91rm9200_udp.h b/include/asm-arm/arch-at91rm9200/at91rm9200_udp.h new file mode 100644 index 00000000000..951e3f61cef --- /dev/null +++ b/include/asm-arm/arch-at91rm9200/at91rm9200_udp.h @@ -0,0 +1,77 @@ +/* + * include/asm-arm/arch-at91rm9200/at91rm9200_udp.h + * + * Copyright (C) 2005 Ivan Kokshaysky + * Copyright (C) SAN People + * + * USB Device Port (UDP) registers. + * Based on AT91RM9200 datasheet revision E. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91RM9200_UDP_H +#define AT91RM9200_UDP_H + +#define AT91_UDP_FRM_NUM 0x00 /* Frame Number Register */ +#define AT91_UDP_NUM (0x7ff << 0) /* Frame Number */ +#define AT91_UDP_FRM_ERR (1 << 16) /* Frame Error */ +#define AT91_UDP_FRM_OK (1 << 17) /* Frame OK */ + +#define AT91_UDP_GLB_STAT 0x04 /* Global State Register */ +#define AT91_UDP_FADDEN (1 << 0) /* Function Address Enable */ +#define AT91_UDP_CONFG (1 << 1) /* Configured */ +#define AT91_UDP_ESR (1 << 2) /* Enable Send Resume */ +#define AT91_UDP_RSMINPR (1 << 3) /* Resume has been sent */ +#define AT91_UDP_RMWUPE (1 << 4) /* Remote Wake Up Enable */ + +#define AT91_UDP_FADDR 0x08 /* Function Address Register */ +#define AT91_UDP_FADD (0x7f << 0) /* Function Address Value */ +#define AT91_UDP_FEN (1 << 8) /* Function Enable */ + +#define AT91_UDP_IER 0x10 /* Interrupt Enable Register */ +#define AT91_UDP_IDR 0x14 /* Interrupt Disable Register */ +#define AT91_UDP_IMR 0x18 /* Interrupt Mask Register */ + +#define AT91_UDP_ISR 0x1c /* Interrupt Status Register */ +#define AT91_UDP_EP(n) (1 << (n)) /* Endpoint Interrupt Status */ +#define AT91_UDP_RXSUSP (1 << 8) /* USB Suspend Interrupt Status */ +#define AT91_UDP_RXRSM (1 << 9) /* USB Resume Interrupt Status */ +#define AT91_UDP_EXTRSM (1 << 10) /* External Resume Interrupt Status */ +#define AT91_UDP_SOFINT (1 << 11) /* Start of Frame Interrupt Status */ +#define AT91_UDP_ENDBUSRES (1 << 12) /* End of Bus Reset Interrpt Status */ +#define AT91_UDP_WAKEUP (1 << 13) /* USB Wakeup Interrupt Status */ + +#define AT91_UDP_ICR 0x20 /* Interrupt Clear Register */ +#define AT91_UDP_RST_EP 0x28 /* Reset Endpoint Register */ + +#define AT91_UDP_CSR(n) (0x30 + ((n) * 4)) /* Endpoint Control/Status Registers 0-7 */ +#define AT91_UDP_TXCOMP (1 << 0) /* Generates IN packet with data previously written in DPR */ +#define AT91_UDP_RX_DATA_BK0 (1 << 1) /* Receive Data Bank 0 */ +#define AT91_UDP_RXSETUP (1 << 2) /* Send STALL to the host */ +#define AT91_UDP_STALLSENT (1 << 3) /* Stall Sent / Isochronous error (Isochronous endpoints) */ +#define AT91_UDP_TXPKTRDY (1 << 4) /* Transmit Packet Ready */ +#define AT91_UDP_FORCESTALL (1 << 5) /* Force Stall */ +#define AT91_UDP_RX_DATA_BK1 (1 << 6) /* Receive Data Bank 1 */ +#define AT91_UDP_DIR (1 << 7) /* Transfer Direction */ +#define AT91_UDP_EPTYPE (7 << 8) /* Endpoint Type */ +#define AT91_UDP_EPTYPE_CTRL (0 << 8) +#define AT91_UDP_EPTYPE_ISO_OUT (1 << 8) +#define AT91_UDP_EPTYPE_BULK_OUT (2 << 8) +#define AT91_UDP_EPTYPE_INT_OUT (3 << 8) +#define AT91_UDP_EPTYPE_ISO_IN (5 << 8) +#define AT91_UDP_EPTYPE_BULK_IN (6 << 8) +#define AT91_UDP_EPTYPE_INT_IN (7 << 8) +#define AT91_UDP_DTGLE (1 << 11) /* Data Toggle */ +#define AT91_UDP_EPEDS (1 << 15) /* Endpoint Enable/Disable */ +#define AT91_UDP_RXBYTECNT (0x7ff << 16) /* Number of bytes in FIFO */ + +#define AT91_UDP_FDR(n) (0x50 + ((n) * 4)) /* Endpoint FIFO Data Registers 0-7 */ + +#define AT91_UDP_TXVC 0x74 /* Transceiver Control Register */ +#define AT91_UDP_TXVC_TXVDIS (1 << 8) /* Transceiver Disable */ + +#endif -- cgit v1.2.3-70-g09d2 From 82dc0772a892f8b430a2d567c981fe47a11489c3 Mon Sep 17 00:00:00 2001 From: Andrew Victor Date: Mon, 19 Jun 2006 18:16:46 +0100 Subject: [ARM] 3590/1: AT91RM9200 Platform devices support Patch from Andrew Victor This patch includes the structures and exported functions required for the platform-device support (added in patch 3585/1). Also adds the arch_identify() function for run-time detection of which AT91 processor the code is running on. [Original patch from Ivan Kokshaysky] Signed-off-by: Andrew Victor Signed-off-by: Russell King --- include/asm-arm/arch-at91rm9200/board.h | 23 ++++++++++++++++++++--- include/asm-arm/arch-at91rm9200/system.h | 8 ++++++++ 2 files changed, 28 insertions(+), 3 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-at91rm9200/board.h b/include/asm-arm/arch-at91rm9200/board.h index 4fdef13d01d..587948d5675 100644 --- a/include/asm-arm/arch-at91rm9200/board.h +++ b/include/asm-arm/arch-at91rm9200/board.h @@ -39,6 +39,8 @@ extern int at91_serial_map[AT91_NR_UART]; extern int at91_console_port; #include +#include +#include /* USB Device */ struct at91_udc_data { @@ -91,10 +93,25 @@ struct at91_nand_data { extern void __init at91_add_device_nand(struct at91_nand_data *data); /* I2C*/ -void __init at91_add_device_i2c(void); +extern void __init at91_add_device_i2c(void); - /* RTC */ -void __init at91_add_device_rtc(void); + /* SPI */ +extern void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices); + + /* Serial */ +struct at91_uart_config { + unsigned short console_tty; /* tty number of serial console */ + unsigned short nr_tty; /* number of serial tty's */ + short tty_map[]; /* map UART to tty number */ +}; +extern struct platform_device *at91_default_console_device; +extern void __init at91_init_serial(struct at91_uart_config *config); + +struct at91_uart_data { + short use_dma_tx; /* use transmit DMA? */ + short use_dma_rx; /* use receive DMA? */ +}; +extern void __init at91_add_device_serial(void); /* LEDs */ extern u8 at91_leds_cpu; diff --git a/include/asm-arm/arch-at91rm9200/system.h b/include/asm-arm/arch-at91rm9200/system.h index 29c42655f05..945e66507a7 100644 --- a/include/asm-arm/arch-at91rm9200/system.h +++ b/include/asm-arm/arch-at91rm9200/system.h @@ -48,4 +48,12 @@ static inline void arch_reset(char mode) at91_sys_write(AT91_ST_CR, AT91_ST_WDRST); } +#define ARCH_ID_AT91RM9200 0x09200080 +#define ARCH_ID_AT91SAM9261 0x019000a0 + +static inline unsigned long arch_identify(void) +{ + return at91_sys_read(AT91_DBGU_CIDR) & (AT91_CIDR_EPROC | AT91_CIDR_ARCH); +} + #endif -- cgit v1.2.3-70-g09d2 From afefc4158f3c8529e4bb99c1dc119fd792bac220 Mon Sep 17 00:00:00 2001 From: Andrew Victor Date: Mon, 19 Jun 2006 19:53:19 +0100 Subject: [ARM] 3592/1: AT91RM9200 Serial driver update Patch from Andrew Victor This patch includes a number of updates to the AT91RM9200 serial driver. Changes include: 1. Conversion to a platform_driver. [Ivan Kokshaysky] 2. Replaced all references to AT91RM9200 with AT91. This driver can now also be used for the AT91SAM9216. 3. Allow TIOCM_LOOP to configure local loopback mode. 4. Cleaned up the 'read_status_mask' usage and interrupt handler code. [Chip Coldwell] 5. Suspend/resume support. [David Brownell] There are a few 'unused variable' warning when compiling this - I removed the new DMA support to keep this first patch simpler. Signed-off-by: Andrew Victor Signed-off-by: Russell King --- drivers/serial/Kconfig | 17 +- drivers/serial/at91_serial.c | 463 +++++++++++++++++++------------ include/asm-arm/mach/serial_at91.h | 34 +++ include/asm-arm/mach/serial_at91rm9200.h | 36 --- include/linux/serial_core.h | 4 +- 5 files changed, 325 insertions(+), 229 deletions(-) create mode 100644 include/asm-arm/mach/serial_at91.h delete mode 100644 include/asm-arm/mach/serial_at91rm9200.h (limited to 'include/asm-arm') diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 7d22dc0478d..5ea778fc1ca 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -300,21 +300,22 @@ config SERIAL_AMBA_PL011_CONSOLE kernel at boot time.) config SERIAL_AT91 - bool "AT91RM9200 serial port support" - depends on ARM && ARCH_AT91RM9200 + bool "AT91RM9200 / AT91SAM9261 serial port support" + depends on ARM && (ARCH_AT91RM9200 || ARCH_AT91SAM9261) select SERIAL_CORE help - This enables the driver for the on-chip UARTs of the AT91RM9200 - processor. + This enables the driver for the on-chip UARTs of the Atmel + AT91RM9200 and AT91SAM926 processor. config SERIAL_AT91_CONSOLE - bool "Support for console on AT91RM9200 serial port" + bool "Support for console on AT91RM9200 / AT91SAM9261 serial port" depends on SERIAL_AT91=y select SERIAL_CORE_CONSOLE help - Say Y here if you wish to use a UART on the AT91RM9200 as the system - console (the system console is the device which receives all kernel - messages and warnings and which allows logins in single user mode). + Say Y here if you wish to use a UART on the Atmel AT91RM9200 or + AT91SAM9261 as the system console (the system console is the device + which receives all kernel messages and warnings and which allows + logins in single user mode). config SERIAL_AT91_TTYAT bool "Install as device ttyAT0-4 instead of ttyS0-4" diff --git a/drivers/serial/at91_serial.c b/drivers/serial/at91_serial.c index 6547fe0cef9..db5b25fafed 100644 --- a/drivers/serial/at91_serial.c +++ b/drivers/serial/at91_serial.c @@ -2,7 +2,6 @@ * linux/drivers/char/at91_serial.c * * Driver for Atmel AT91RM9200 Serial ports - * * Copyright (C) 2003 Rick Bronson * * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd. @@ -30,17 +29,19 @@ #include #include #include +#include #include #include #include +#include #include #include -#include +#include +#include #include -#include - +#include #if defined(CONFIG_SERIAL_AT91_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) #define SUPPORT_SYSRQ @@ -67,7 +68,6 @@ #endif -#define AT91_VA_BASE_DBGU ((unsigned long) AT91_VA_BASE_SYS + AT91_DBGU) #define AT91_ISR_PASS_LIMIT 256 #define UART_PUT_CR(port,v) writel(v, (port)->membase + AT91_US_CR) @@ -87,16 +87,33 @@ /* PDC registers */ #define UART_PUT_PTCR(port,v) writel(v, (port)->membase + AT91_PDC_PTCR) +#define UART_GET_PTSR(port) readl((port)->membase + AT91_PDC_PTSR) + #define UART_PUT_RPR(port,v) writel(v, (port)->membase + AT91_PDC_RPR) +#define UART_GET_RPR(port) readl((port)->membase + AT91_PDC_RPR) #define UART_PUT_RCR(port,v) writel(v, (port)->membase + AT91_PDC_RCR) -#define UART_GET_RCR(port) readl((port)->membase + AT91_PDC_RCR) #define UART_PUT_RNPR(port,v) writel(v, (port)->membase + AT91_PDC_RNPR) #define UART_PUT_RNCR(port,v) writel(v, (port)->membase + AT91_PDC_RNCR) +#define UART_PUT_TPR(port,v) writel(v, (port)->membase + AT91_PDC_TPR) +#define UART_PUT_TCR(port,v) writel(v, (port)->membase + AT91_PDC_TCR) +//#define UART_PUT_TNPR(port,v) writel(v, (port)->membase + AT91_PDC_TNPR) +//#define UART_PUT_TNCR(port,v) writel(v, (port)->membase + AT91_PDC_TNCR) static int (*at91_open)(struct uart_port *); static void (*at91_close)(struct uart_port *); +/* + * We wrap our port structure around the generic uart_port. + */ +struct at91_uart_port { + struct uart_port uart; /* uart */ + struct clk *clk; /* uart clock */ + unsigned short suspended; /* is port suspended? */ +}; + +static struct at91_uart_port at91_ports[AT91_NR_UART]; + #ifdef SUPPORT_SYSRQ static struct console at91_console; #endif @@ -115,16 +132,19 @@ static u_int at91_tx_empty(struct uart_port *port) static void at91_set_mctrl(struct uart_port *port, u_int mctrl) { unsigned int control = 0; + unsigned int mode; - /* - * Errata #39: RTS0 is not internally connected to PA21. We need to drive - * the pin manually. - */ - if (port->mapbase == AT91_VA_BASE_US0) { - if (mctrl & TIOCM_RTS) - at91_sys_write(AT91_PIOA + PIO_CODR, AT91_PA21_RTS0); - else - at91_sys_write(AT91_PIOA + PIO_SODR, AT91_PA21_RTS0); + if (arch_identify() == ARCH_ID_AT91RM9200) { + /* + * AT91RM9200 Errata #39: RTS0 is not internally connected to PA21. + * We need to drive the pin manually. + */ + if (port->mapbase == AT91_BASE_US0) { + if (mctrl & TIOCM_RTS) + at91_sys_write(AT91_PIOA + PIO_CODR, AT91_PA21_RTS0); + else + at91_sys_write(AT91_PIOA + PIO_SODR, AT91_PA21_RTS0); + } } if (mctrl & TIOCM_RTS) @@ -137,7 +157,15 @@ static void at91_set_mctrl(struct uart_port *port, u_int mctrl) else control |= AT91_US_DTRDIS; - UART_PUT_CR(port,control); + UART_PUT_CR(port, control); + + /* Local loopback mode? */ + mode = UART_GET_MR(port) & ~AT91_US_CHMODE; + if (mctrl & TIOCM_LOOP) + mode |= AT91_US_CHMODE_LOC_LOOP; + else + mode |= AT91_US_CHMODE_NORMAL; + UART_PUT_MR(port, mode); } /* @@ -169,8 +197,9 @@ static u_int at91_get_mctrl(struct uart_port *port) */ static void at91_stop_tx(struct uart_port *port) { + struct at91_uart_port *at91_port = (struct at91_uart_port *) port; + UART_PUT_IDR(port, AT91_US_TXRDY); - port->read_status_mask &= ~AT91_US_TXRDY; } /* @@ -178,7 +207,8 @@ static void at91_stop_tx(struct uart_port *port) */ static void at91_start_tx(struct uart_port *port) { - port->read_status_mask |= AT91_US_TXRDY; + struct at91_uart_port *at91_port = (struct at91_uart_port *) port; + UART_PUT_IER(port, AT91_US_TXRDY); } @@ -187,6 +217,8 @@ static void at91_start_tx(struct uart_port *port) */ static void at91_stop_rx(struct uart_port *port) { + struct at91_uart_port *at91_port = (struct at91_uart_port *) port; + UART_PUT_IDR(port, AT91_US_RXRDY); } @@ -195,7 +227,6 @@ static void at91_stop_rx(struct uart_port *port) */ static void at91_enable_ms(struct uart_port *port) { - port->read_status_mask |= (AT91_US_RIIC | AT91_US_DSRIC | AT91_US_DCDIC | AT91_US_CTSIC); UART_PUT_IER(port, AT91_US_RIIC | AT91_US_DSRIC | AT91_US_DCDIC | AT91_US_CTSIC); } @@ -218,8 +249,8 @@ static void at91_rx_chars(struct uart_port *port, struct pt_regs *regs) struct tty_struct *tty = port->info->tty; unsigned int status, ch, flg; - status = UART_GET_CSR(port) & port->read_status_mask; - while (status & (AT91_US_RXRDY)) { + status = UART_GET_CSR(port); + while (status & AT91_US_RXRDY) { ch = UART_GET_CHAR(port); port->icount.rx++; @@ -230,40 +261,38 @@ static void at91_rx_chars(struct uart_port *port, struct pt_regs *regs) * note that the error handling code is * out of the main execution path */ - if (unlikely(status & (AT91_US_PARE | AT91_US_FRAME | AT91_US_OVRE))) { + if (unlikely(status & (AT91_US_PARE | AT91_US_FRAME | AT91_US_OVRE | AT91_US_RXBRK))) { UART_PUT_CR(port, AT91_US_RSTSTA); /* clear error */ - if (status & (AT91_US_PARE)) + if (status & AT91_US_RXBRK) { + status &= ~(AT91_US_PARE | AT91_US_FRAME); /* ignore side-effect */ + port->icount.brk++; + if (uart_handle_break(port)) + goto ignore_char; + } + if (status & AT91_US_PARE) port->icount.parity++; - if (status & (AT91_US_FRAME)) + if (status & AT91_US_FRAME) port->icount.frame++; - if (status & (AT91_US_OVRE)) + if (status & AT91_US_OVRE) port->icount.overrun++; - if (status & AT91_US_PARE) + status &= port->read_status_mask; + + if (status & AT91_US_RXBRK) + flg = TTY_BREAK; + else if (status & AT91_US_PARE) flg = TTY_PARITY; else if (status & AT91_US_FRAME) flg = TTY_FRAME; - if (status & AT91_US_OVRE) { - /* - * overrun does *not* affect the character - * we read from the FIFO - */ - tty_insert_flip_char(tty, ch, flg); - ch = 0; - flg = TTY_OVERRUN; - } -#ifdef SUPPORT_SYSRQ - port->sysrq = 0; -#endif } if (uart_handle_sysrq_char(port, ch, regs)) goto ignore_char; - tty_insert_flip_char(tty, ch, flg); + uart_insert_char(port, status, AT91_US_OVRE, ch, flg); ignore_char: - status = UART_GET_CSR(port) & port->read_status_mask; + status = UART_GET_CSR(port); } tty_flip_buffer_push(tty); @@ -308,40 +337,35 @@ static void at91_tx_chars(struct uart_port *port) static irqreturn_t at91_interrupt(int irq, void *dev_id, struct pt_regs *regs) { struct uart_port *port = dev_id; + struct at91_uart_port *at91_port = (struct at91_uart_port *) port; unsigned int status, pending, pass_counter = 0; status = UART_GET_CSR(port); - pending = status & port->read_status_mask; - if (pending) { - do { - if (pending & AT91_US_RXRDY) - at91_rx_chars(port, regs); - - /* Clear the relevent break bits */ - if (pending & AT91_US_RXBRK) { - UART_PUT_CR(port, AT91_US_RSTSTA); - port->icount.brk++; - uart_handle_break(port); - } + pending = status & UART_GET_IMR(port); + while (pending) { + /* Interrupt receive */ + if (pending & AT91_US_RXRDY) + at91_rx_chars(port, regs); + + // TODO: All reads to CSR will clear these interrupts! + if (pending & AT91_US_RIIC) port->icount.rng++; + if (pending & AT91_US_DSRIC) port->icount.dsr++; + if (pending & AT91_US_DCDIC) + uart_handle_dcd_change(port, !(status & AT91_US_DCD)); + if (pending & AT91_US_CTSIC) + uart_handle_cts_change(port, !(status & AT91_US_CTS)); + if (pending & (AT91_US_RIIC | AT91_US_DSRIC | AT91_US_DCDIC | AT91_US_CTSIC)) + wake_up_interruptible(&port->info->delta_msr_wait); + + /* Interrupt transmit */ + if (pending & AT91_US_TXRDY) + at91_tx_chars(port); + + if (pass_counter++ > AT91_ISR_PASS_LIMIT) + break; - // TODO: All reads to CSR will clear these interrupts! - if (pending & AT91_US_RIIC) port->icount.rng++; - if (pending & AT91_US_DSRIC) port->icount.dsr++; - if (pending & AT91_US_DCDIC) - uart_handle_dcd_change(port, !(status & AT91_US_DCD)); - if (pending & AT91_US_CTSIC) - uart_handle_cts_change(port, !(status & AT91_US_CTS)); - if (pending & (AT91_US_RIIC | AT91_US_DSRIC | AT91_US_DCDIC | AT91_US_CTSIC)) - wake_up_interruptible(&port->info->delta_msr_wait); - - if (pending & AT91_US_TXRDY) - at91_tx_chars(port); - if (pass_counter++ > AT91_ISR_PASS_LIMIT) - break; - - status = UART_GET_CSR(port); - pending = status & port->read_status_mask; - } while (pending); + status = UART_GET_CSR(port); + pending = status & UART_GET_IMR(port); } return IRQ_HANDLED; } @@ -351,6 +375,7 @@ static irqreturn_t at91_interrupt(int irq, void *dev_id, struct pt_regs *regs) */ static int at91_startup(struct uart_port *port) { + struct at91_uart_port *at91_port = (struct at91_uart_port *) port; int retval; /* @@ -381,14 +406,14 @@ static int at91_startup(struct uart_port *port) } } - port->read_status_mask = AT91_US_RXRDY | AT91_US_TXRDY | AT91_US_OVRE - | AT91_US_FRAME | AT91_US_PARE | AT91_US_RXBRK; /* * Finally, enable the serial port */ UART_PUT_CR(port, AT91_US_RSTSTA | AT91_US_RSTRX); UART_PUT_CR(port, AT91_US_TXEN | AT91_US_RXEN); /* enable xmit & rcvr */ - UART_PUT_IER(port, AT91_US_RXRDY); /* do receive only */ + + UART_PUT_IER(port, AT91_US_RXRDY); /* enable receive only */ + return 0; } @@ -397,6 +422,8 @@ static int at91_startup(struct uart_port *port) */ static void at91_shutdown(struct uart_port *port) { + struct at91_uart_port *at91_port = (struct at91_uart_port *) port; + /* * Disable all interrupts, port and break condition. */ @@ -421,21 +448,22 @@ static void at91_shutdown(struct uart_port *port) */ static void at91_serial_pm(struct uart_port *port, unsigned int state, unsigned int oldstate) { + struct at91_uart_port *at91_port = (struct at91_uart_port *) port; + switch (state) { case 0: /* * Enable the peripheral clock for this serial port. * This is called on uart_open() or a resume event. */ - at91_sys_write(AT91_PMC_PCER, 1 << port->irq); + clk_enable(at91_port->clk); break; case 3: /* * Disable the peripheral clock for this serial port. * This is called on uart_close() or a suspend event. */ - if (port->irq != AT91_ID_SYS) /* is this a shared clock? */ - at91_sys_write(AT91_PMC_PCDR, 1 << port->irq); + clk_disable(at91_port->clk); break; default: printk(KERN_ERR "at91_serial: unknown pm %d\n", state); @@ -494,9 +522,9 @@ static void at91_set_termios(struct uart_port *port, struct termios * termios, s spin_lock_irqsave(&port->lock, flags); - port->read_status_mask |= AT91_US_OVRE; + port->read_status_mask = AT91_US_OVRE; if (termios->c_iflag & INPCK) - port->read_status_mask |= AT91_US_FRAME | AT91_US_PARE; + port->read_status_mask |= (AT91_US_FRAME | AT91_US_PARE); if (termios->c_iflag & (BRKINT | PARMRK)) port->read_status_mask |= AT91_US_RXBRK; @@ -552,7 +580,7 @@ static void at91_set_termios(struct uart_port *port, struct termios * termios, s */ static const char *at91_type(struct uart_port *port) { - return (port->type == PORT_AT91RM9200) ? "AT91_SERIAL" : NULL; + return (port->type == PORT_AT91) ? "AT91_SERIAL" : NULL; } /* @@ -560,8 +588,15 @@ static const char *at91_type(struct uart_port *port) */ static void at91_release_port(struct uart_port *port) { - release_mem_region(port->mapbase, - (port->mapbase == AT91_VA_BASE_DBGU) ? 512 : SZ_16K); + struct platform_device *pdev = to_platform_device(port->dev); + int size = pdev->resource[0].end - pdev->resource[0].start + 1; + + release_mem_region(port->mapbase, size); + + if (port->flags & UPF_IOREMAP) { + iounmap(port->membase); + port->membase = NULL; + } } /* @@ -569,10 +604,21 @@ static void at91_release_port(struct uart_port *port) */ static int at91_request_port(struct uart_port *port) { - return request_mem_region(port->mapbase, - (port->mapbase == AT91_VA_BASE_DBGU) ? 512 : SZ_16K, - "at91_serial") != NULL ? 0 : -EBUSY; + struct platform_device *pdev = to_platform_device(port->dev); + int size = pdev->resource[0].end - pdev->resource[0].start + 1; + + if (!request_mem_region(port->mapbase, size, "at91_serial")) + return -EBUSY; + + if (port->flags & UPF_IOREMAP) { + port->membase = ioremap(port->mapbase, size); + if (port->membase == NULL) { + release_mem_region(port->mapbase, size); + return -ENOMEM; + } + } + return 0; } /* @@ -581,7 +627,7 @@ static int at91_request_port(struct uart_port *port) static void at91_config_port(struct uart_port *port, int flags) { if (flags & UART_CONFIG_TYPE) { - port->type = PORT_AT91RM9200; + port->type = PORT_AT91; at91_request_port(port); } } @@ -592,7 +638,7 @@ static void at91_config_port(struct uart_port *port, int flags) static int at91_verify_port(struct uart_port *port, struct serial_struct *ser) { int ret = 0; - if (ser->type != PORT_UNKNOWN && ser->type != PORT_AT91RM9200) + if (ser->type != PORT_UNKNOWN && ser->type != PORT_AT91) ret = -EINVAL; if (port->irq != ser->irq) ret = -EINVAL; @@ -624,33 +670,47 @@ static struct uart_ops at91_pops = { .type = at91_type, .release_port = at91_release_port, .request_port = at91_request_port, - .config_port = at91_config_port, - .verify_port = at91_verify_port, + .config_port = at91_config_port, + .verify_port = at91_verify_port, .pm = at91_serial_pm, }; -static struct uart_port at91_ports[AT91_NR_UART]; - -void __init at91_init_ports(void) +/* + * Configure the port from the platform device resource info. + */ +static void __devinit at91_init_port(struct at91_uart_port *at91_port, struct platform_device *pdev) { - static int first = 1; - int i; - - if (!first) - return; - first = 0; + struct uart_port *port = &at91_port->uart; + struct at91_uart_data *data = pdev->dev.platform_data; + + port->iotype = UPIO_MEM; + port->flags = UPF_BOOT_AUTOCONF; + port->ops = &at91_pops; + port->fifosize = 1; + port->line = pdev->id; + port->dev = &pdev->dev; + + port->mapbase = pdev->resource[0].start; + port->irq = pdev->resource[1].start; + + if (port->mapbase == AT91_VA_BASE_SYS + AT91_DBGU) /* Part of system perpherals - already mapped */ + port->membase = (void __iomem *) port->mapbase; + else { + port->flags |= UPF_IOREMAP; + port->membase = NULL; + } - for (i = 0; i < AT91_NR_UART; i++) { - at91_ports[i].iotype = UPIO_MEM; - at91_ports[i].flags = UPF_BOOT_AUTOCONF; - at91_ports[i].uartclk = at91_master_clock; - at91_ports[i].ops = &at91_pops; - at91_ports[i].fifosize = 1; - at91_ports[i].line = i; - } + if (!at91_port->clk) { /* for console, the clock could already be configured */ + at91_port->clk = clk_get(&pdev->dev, "usart"); + clk_enable(at91_port->clk); + port->uartclk = clk_get_rate(at91_port->clk); + } } -void __init at91_register_uart_fns(struct at91rm9200_port_fns *fns) +/* + * Register board-specific modem-control line handlers. + */ +void __init at91_register_uart_fns(struct at91_port_fns *fns) { if (fns->enable_ms) at91_pops.enable_ms = fns->enable_ms; @@ -664,51 +724,6 @@ void __init at91_register_uart_fns(struct at91rm9200_port_fns *fns) at91_pops.set_wake = fns->set_wake; } -/* - * Setup ports. - */ -void __init at91_register_uart(int idx, int port) -{ - if ((idx < 0) || (idx >= AT91_NR_UART)) { - printk(KERN_ERR "%s: bad index number %d\n", __FUNCTION__, idx); - return; - } - - switch (port) { - case 0: - at91_ports[idx].membase = (void __iomem *) AT91_VA_BASE_US0; - at91_ports[idx].mapbase = AT91_VA_BASE_US0; - at91_ports[idx].irq = AT91_ID_US0; - AT91_CfgPIO_USART0(); - break; - case 1: - at91_ports[idx].membase = (void __iomem *) AT91_VA_BASE_US1; - at91_ports[idx].mapbase = AT91_VA_BASE_US1; - at91_ports[idx].irq = AT91_ID_US1; - AT91_CfgPIO_USART1(); - break; - case 2: - at91_ports[idx].membase = (void __iomem *) AT91_VA_BASE_US2; - at91_ports[idx].mapbase = AT91_VA_BASE_US2; - at91_ports[idx].irq = AT91_ID_US2; - AT91_CfgPIO_USART2(); - break; - case 3: - at91_ports[idx].membase = (void __iomem *) AT91_VA_BASE_US3; - at91_ports[idx].mapbase = AT91_VA_BASE_US3; - at91_ports[idx].irq = AT91_ID_US3; - AT91_CfgPIO_USART3(); - break; - case 4: - at91_ports[idx].membase = (void __iomem *) AT91_VA_BASE_DBGU; - at91_ports[idx].mapbase = AT91_VA_BASE_DBGU; - at91_ports[idx].irq = AT91_ID_SYS; - AT91_CfgPIO_DBGU(); - break; - default: - printk(KERN_ERR "%s : bad port number %d\n", __FUNCTION__, port); - } -} #ifdef CONFIG_SERIAL_AT91_CONSOLE static void at91_console_putchar(struct uart_port *port, int ch) @@ -723,7 +738,7 @@ static void at91_console_putchar(struct uart_port *port, int ch) */ static void at91_console_write(struct console *co, const char *s, u_int count) { - struct uart_port *port = at91_ports + co->index; + struct uart_port *port = &at91_ports[co->index].uart; unsigned int status, imr; /* @@ -778,23 +793,15 @@ static void __init at91_console_get_options(struct uart_port *port, int *baud, i static int __init at91_console_setup(struct console *co, char *options) { - struct uart_port *port; + struct uart_port *port = &at91_ports[co->index].uart; int baud = 115200; int bits = 8; int parity = 'n'; int flow = 'n'; - /* - * Check whether an invalid uart number has been specified, and - * if so, search for the first available port that does have - * console support. - */ - port = uart_get_console(at91_ports, AT91_NR_UART, co); + if (port->membase == 0) /* Port not initialized yet - delay setup */ + return -ENODEV; - /* - * Enable the serial console, in-case bootloader did not do it. - */ - at91_sys_write(AT91_PMC_PCER, 1 << port->irq); /* enable clock */ UART_PUT_IDR(port, -1); /* disable interrupts */ UART_PUT_CR(port, AT91_US_RSTSTA | AT91_US_RSTRX); UART_PUT_CR(port, AT91_US_TXEN | AT91_US_RXEN); @@ -821,23 +828,40 @@ static struct console at91_console = { #define AT91_CONSOLE_DEVICE &at91_console -static int __init at91_console_init(void) +/* + * Early console initialization (before VM subsystem initialized). + */ +static int __init at91_console_init(void) { - at91_init_ports(); + if (at91_default_console_device) { + add_preferred_console(AT91_DEVICENAME, at91_default_console_device->id, NULL); + at91_init_port(&(at91_ports[at91_default_console_device->id]), at91_default_console_device); + register_console(&at91_console); + } - at91_console.index = at91_console_port; - register_console(&at91_console); return 0; } console_initcall(at91_console_init); +/* + * Late console initialization. + */ +static int __init at91_late_console_init(void) +{ + if (at91_default_console_device && !(at91_console.flags & CON_ENABLED)) + register_console(&at91_console); + + return 0; +} +core_initcall(at91_late_console_init); + #else #define AT91_CONSOLE_DEVICE NULL #endif static struct uart_driver at91_uart = { .owner = THIS_MODULE, - .driver_name = AT91_DEVICENAME, + .driver_name = "at91_serial", .dev_name = AT91_DEVICENAME, .devfs_name = AT91_DEVICENAME, .major = SERIAL_AT91_MAJOR, @@ -846,33 +870,106 @@ static struct uart_driver at91_uart = { .cons = AT91_CONSOLE_DEVICE, }; -static int __init at91_serial_init(void) +#ifdef CONFIG_PM +static int at91_serial_suspend(struct platform_device *pdev, pm_message_t state) { - int ret, i; + struct uart_port *port = platform_get_drvdata(pdev); + struct at91_uart_port *at91_port = (struct at91_uart_port *) port; + + if (device_may_wakeup(&pdev->dev) && !at91_suspend_entering_slow_clock()) + enable_irq_wake(port->irq); + else { + disable_irq_wake(port->irq); + uart_suspend_port(&at91_uart, port); + at91_port->suspended = 1; + } - at91_init_ports(); + return 0; +} - ret = uart_register_driver(&at91_uart); - if (ret) - return ret; +static int at91_serial_resume(struct platform_device *pdev) +{ + struct uart_port *port = platform_get_drvdata(pdev); + struct at91_uart_port *at91_port = (struct at91_uart_port *) port; - for (i = 0; i < AT91_NR_UART; i++) { - if (at91_serial_map[i] >= 0) - uart_add_one_port(&at91_uart, &at91_ports[i]); + if (at91_port->suspended) { + uart_resume_port(&at91_uart, port); + at91_port->suspended = 0; } return 0; } +#else +#define at91_serial_suspend NULL +#define at91_serial_resume NULL +#endif -static void __exit at91_serial_exit(void) +static int __devinit at91_serial_probe(struct platform_device *pdev) { - int i; + struct at91_uart_port *port; + int ret; - for (i = 0; i < AT91_NR_UART; i++) { - if (at91_serial_map[i] >= 0) - uart_remove_one_port(&at91_uart, &at91_ports[i]); - } + port = &at91_ports[pdev->id]; + at91_init_port(port, pdev); + ret = uart_add_one_port(&at91_uart, &port->uart); + if (!ret) { + device_init_wakeup(&pdev->dev, 1); + platform_set_drvdata(pdev, port); + } + + return ret; +} + +static int __devexit at91_serial_remove(struct platform_device *pdev) +{ + struct uart_port *port = platform_get_drvdata(pdev); + struct at91_uart_port *at91_port = (struct at91_uart_port *) port; + int ret = 0; + + clk_disable(at91_port->clk); + clk_put(at91_port->clk); + + device_init_wakeup(&pdev->dev, 0); + platform_set_drvdata(pdev, NULL); + + if (port) { + ret = uart_remove_one_port(&at91_uart, port); + kfree(port); + } + + return ret; +} + +static struct platform_driver at91_serial_driver = { + .probe = at91_serial_probe, + .remove = __devexit_p(at91_serial_remove), + .suspend = at91_serial_suspend, + .resume = at91_serial_resume, + .driver = { + .name = "at91_usart", + .owner = THIS_MODULE, + }, +}; + +static int __init at91_serial_init(void) +{ + int ret; + + ret = uart_register_driver(&at91_uart); + if (ret) + return ret; + + ret = platform_driver_register(&at91_serial_driver); + if (ret) + uart_unregister_driver(&at91_uart); + + return ret; +} + +static void __exit at91_serial_exit(void) +{ + platform_driver_unregister(&at91_serial_driver); uart_unregister_driver(&at91_uart); } diff --git a/include/asm-arm/mach/serial_at91.h b/include/asm-arm/mach/serial_at91.h new file mode 100644 index 00000000000..18bc4e00e47 --- /dev/null +++ b/include/asm-arm/mach/serial_at91.h @@ -0,0 +1,34 @@ +/* + * linux/include/asm-arm/mach/serial_at91.h + * + * Based on serial_sa1100.h by Nicolas Pitre + * + * Copyright (C) 2002 ATMEL Rousset + * + * Low level machine dependent UART functions. + */ +#include + +struct uart_port; + +/* + * This is a temporary structure for registering these + * functions; it is intended to be discarded after boot. + */ +struct at91_port_fns { + void (*set_mctrl)(struct uart_port *, u_int); + u_int (*get_mctrl)(struct uart_port *); + void (*enable_ms)(struct uart_port *); + void (*pm)(struct uart_port *, u_int, u_int); + int (*set_wake)(struct uart_port *, u_int); + int (*open)(struct uart_port *); + void (*close)(struct uart_port *); +}; + +#if defined(CONFIG_SERIAL_AT91) +void at91_register_uart_fns(struct at91_port_fns *fns); +#else +#define at91_register_uart_fns(fns) do { } while (0) +#endif + + diff --git a/include/asm-arm/mach/serial_at91rm9200.h b/include/asm-arm/mach/serial_at91rm9200.h deleted file mode 100644 index 98f4b0cb883..00000000000 --- a/include/asm-arm/mach/serial_at91rm9200.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * linux/include/asm-arm/mach/serial_at91rm9200.h - * - * Based on serial_sa1100.h by Nicolas Pitre - * - * Copyright (C) 2002 ATMEL Rousset - * - * Low level machine dependent UART functions. - */ -#include - -struct uart_port; - -/* - * This is a temporary structure for registering these - * functions; it is intended to be discarded after boot. - */ -struct at91rm9200_port_fns { - void (*set_mctrl)(struct uart_port *, u_int); - u_int (*get_mctrl)(struct uart_port *); - void (*enable_ms)(struct uart_port *); - void (*pm)(struct uart_port *, u_int, u_int); - int (*set_wake)(struct uart_port *, u_int); - int (*open)(struct uart_port *); - void (*close)(struct uart_port *); -}; - -#if defined(CONFIG_SERIAL_AT91) -void at91_register_uart_fns(struct at91rm9200_port_fns *fns); -void at91_register_uart(int idx, int port); -#else -#define at91_register_uart_fns(fns) do { } while (0) -#define at91_register_uart(idx,port) do { } while (0) -#endif - - diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h index bd14858121e..56c2a1db4a9 100644 --- a/include/linux/serial_core.h +++ b/include/linux/serial_core.h @@ -67,8 +67,8 @@ /* Parisc type numbers. */ #define PORT_MUX 48 -/* Atmel AT91RM9200 SoC */ -#define PORT_AT91RM9200 49 +/* Atmel AT91xxx SoC */ +#define PORT_AT91 49 /* Macintosh Zilog type numbers */ #define PORT_MAC_ZILOG 50 /* m68k : not yet implemented */ -- cgit v1.2.3-70-g09d2 From 74617fb6b825ea370ae72565f7543306bc08ef6e Mon Sep 17 00:00:00 2001 From: Richard Purdie Date: Mon, 19 Jun 2006 19:57:12 +0100 Subject: [ARM] 3593/1: Add reboot and shutdown handlers for Zaurus handhelds Patch from Richard Purdie Add functionality to allow machine specific reboot handlers on ARM. Add machine specific reboot and poweroff handlers for all PXA Zaurus models. Signed-off-by: Richard Purdie Signed-off-by: Russell King --- arch/arm/kernel/process.c | 61 ++++++++++++++++++++++----------------- arch/arm/mach-pxa/corgi.c | 25 ++++++++++++++++ arch/arm/mach-pxa/poodle.c | 17 +++++++++++ arch/arm/mach-pxa/spitz.c | 25 ++++++++++++++++ arch/arm/mach-pxa/tosa.c | 25 ++++++++++++++++ include/asm-arm/arch-pxa/system.h | 1 + include/asm-arm/system.h | 3 ++ 7 files changed, 131 insertions(+), 26 deletions(-) (limited to 'include/asm-arm') diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c index 7df6e1aaa32..17c38dbf2f3 100644 --- a/arch/arm/kernel/process.c +++ b/arch/arm/kernel/process.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #include @@ -71,8 +72,36 @@ static int __init hlt_setup(char *__unused) __setup("nohlt", nohlt_setup); __setup("hlt", hlt_setup); +void arm_machine_restart(char mode) +{ + /* + * Clean and disable cache, and turn off interrupts + */ + cpu_proc_fin(); + + /* + * Tell the mm system that we are going to reboot - + * we may need it to insert some 1:1 mappings so that + * soft boot works. + */ + setup_mm_for_reboot(mode); + + /* + * Now call the architecture specific reboot code. + */ + arch_reset(mode); + + /* + * Whoops - the architecture was unable to reboot. + * Tell the user! + */ + mdelay(1000); + printk("Reboot failed -- System halted\n"); + while (1); +} + /* - * The following aren't currently used. + * Function pointers to optional machine specific functions */ void (*pm_idle)(void); EXPORT_SYMBOL(pm_idle); @@ -80,6 +109,10 @@ EXPORT_SYMBOL(pm_idle); void (*pm_power_off)(void); EXPORT_SYMBOL(pm_power_off); +void (*arm_pm_restart)(char str) = arm_machine_restart; +EXPORT_SYMBOL_GPL(arm_pm_restart); + + /* * This is our default idle handler. We need to disable * interrupts here to ensure we don't miss a wakeup call. @@ -151,33 +184,9 @@ void machine_power_off(void) pm_power_off(); } - void machine_restart(char * __unused) { - /* - * Clean and disable cache, and turn off interrupts - */ - cpu_proc_fin(); - - /* - * Tell the mm system that we are going to reboot - - * we may need it to insert some 1:1 mappings so that - * soft boot works. - */ - setup_mm_for_reboot(reboot_mode); - - /* - * Now call the architecture specific reboot code. - */ - arch_reset(reboot_mode); - - /* - * Whoops - the architecture was unable to reboot. - * Tell the user! - */ - mdelay(1000); - printk("Reboot failed -- System halted\n"); - while (1); + arm_pm_restart(reboot_mode); } void __show_regs(struct pt_regs *regs) diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c index d6d72603636..bf6648a8390 100644 --- a/arch/arm/mach-pxa/corgi.c +++ b/arch/arm/mach-pxa/corgi.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include @@ -26,6 +27,7 @@ #include #include #include +#include #include #include @@ -310,8 +312,31 @@ static struct platform_device *devices[] __initdata = { &corgiled_device, }; +static void corgi_poweroff(void) +{ + RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR; + + if (!machine_is_corgi()) + /* Green LED off tells the bootloader to halt */ + reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN); + arm_machine_restart('h'); +} + +static void corgi_restart(char mode) +{ + RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR; + + if (!machine_is_corgi()) + /* Green LED on tells the bootloader to reboot */ + set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN); + arm_machine_restart('h'); +} + static void __init corgi_init(void) { + pm_power_off = corgi_poweroff; + arm_pm_restart = corgi_restart; + /* setup sleep mode values */ PWER = 0x00000002; PFER = 0x00000000; diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c index a042473deed..1d516d317e8 100644 --- a/arch/arm/mach-pxa/poodle.c +++ b/arch/arm/mach-pxa/poodle.c @@ -18,11 +18,13 @@ #include #include #include +#include #include #include #include #include +#include #include #include @@ -247,10 +249,25 @@ static struct platform_device *devices[] __initdata = { &poodle_scoop_device, }; +static void poodle_poweroff(void) +{ + RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR; + arm_machine_restart('h'); +} + +static void poodle_restart(char mode) +{ + RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR; + arm_machine_restart('h'); +} + static void __init poodle_init(void) { int ret = 0; + pm_power_off = poodle_poweroff; + arm_pm_restart = poodle_restart; + /* setup sleep mode values */ PWER = 0x00000002; PFER = 0x00000000; diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index 44bcb8097c7..eb9937f6f5c 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include @@ -27,6 +28,7 @@ #include #include #include +#include #include #include @@ -432,8 +434,31 @@ static struct platform_device *devices[] __initdata = { &spitzled_device, }; +static void spitz_poweroff(void) +{ + RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR; + + pxa_gpio_mode(SPITZ_GPIO_ON_RESET | GPIO_OUT); + GPSR(SPITZ_GPIO_ON_RESET) = GPIO_bit(SPITZ_GPIO_ON_RESET); + + mdelay(1000); + arm_machine_restart('h'); +} + +static void spitz_restart(char mode) +{ + /* Bootloader magic for a reboot */ + if((MSC0 & 0xffff0000) == 0x7ff00000) + MSC0 = (MSC0 & 0xffff) | 0x7ee00000; + + spitz_poweroff(); +} + static void __init common_init(void) { + pm_power_off = spitz_poweroff; + arm_pm_restart = spitz_restart; + PMCR = 0x00; /* setup sleep mode values */ diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c index 76c0e7f0a21..afa223b9e7a 100644 --- a/arch/arm/mach-pxa/tosa.c +++ b/arch/arm/mach-pxa/tosa.c @@ -19,12 +19,14 @@ #include #include #include +#include #include #include #include #include #include +#include #include #include #include @@ -266,8 +268,31 @@ static struct platform_device *devices[] __initdata = { &tosaled_device, }; +static void tosa_poweroff(void) +{ + RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR; + + pxa_gpio_mode(TOSA_GPIO_ON_RESET | GPIO_OUT); + GPSR(TOSA_GPIO_ON_RESET) = GPIO_bit(TOSA_GPIO_ON_RESET); + + mdelay(1000); + arm_machine_restart('h'); +} + +static void tosa_restart(char mode) +{ + /* Bootloader magic for a reboot */ + if((MSC0 & 0xffff0000) == 0x7ff00000) + MSC0 = (MSC0 & 0xffff) | 0x7ee00000; + + tosa_poweroff(); +} + static void __init tosa_init(void) { + pm_power_off = tosa_poweroff; + arm_pm_restart = tosa_restart; + pxa_gpio_mode(TOSA_GPIO_ON_RESET | GPIO_IN); pxa_gpio_mode(TOSA_GPIO_TC6393_INT | GPIO_IN); pxa_gpio_mode(TOSA_GPIO_USB_IN | GPIO_IN); diff --git a/include/asm-arm/arch-pxa/system.h b/include/asm-arm/arch-pxa/system.h index 840a46bfbc5..1d56a3ef89f 100644 --- a/include/asm-arm/arch-pxa/system.h +++ b/include/asm-arm/arch-pxa/system.h @@ -10,6 +10,7 @@ * published by the Free Software Foundation. */ +#include #include "hardware.h" #include "pxa-regs.h" diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h index 7c9568d3030..e6b762b3148 100644 --- a/include/asm-arm/system.h +++ b/include/asm-arm/system.h @@ -108,6 +108,9 @@ extern void __show_regs(struct pt_regs *); extern int cpu_architecture(void); extern void cpu_init(void); +void arm_machine_restart(char mode); +extern void (*arm_pm_restart)(char str); + /* * Intel's XScale3 core supports some v6 features (supersections, L2) * but advertises itself as v5 as it does not support the v6 ISA. For -- cgit v1.2.3-70-g09d2 From 88660351cb6daa85baf9700f12dff3af564dc14a Mon Sep 17 00:00:00 2001 From: Richard Purdie Date: Mon, 19 Jun 2006 19:58:51 +0100 Subject: [ARM] 3561/1: Poodle: Correct the MMC/SD power control Patch from Richard Purdie Correct the Poodle power control for the MMC/SD port. Also add write protection switch support. Signed-off-by: Richard Purdie Signed-off-by: Russell King --- arch/arm/mach-pxa/poodle.c | 22 ++++++++++++++++++---- include/asm-arm/arch-pxa/poodle.h | 2 ++ 2 files changed, 20 insertions(+), 4 deletions(-) (limited to 'include/asm-arm') diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c index 1d516d317e8..234877a09df 100644 --- a/arch/arm/mach-pxa/poodle.c +++ b/arch/arm/mach-pxa/poodle.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include @@ -143,7 +144,9 @@ static int poodle_mci_init(struct device *dev, irqreturn_t (*poodle_detect_int)( pxa_gpio_mode(GPIO6_MMCCLK_MD); pxa_gpio_mode(GPIO8_MMCCS0_MD); pxa_gpio_mode(POODLE_GPIO_nSD_DETECT | GPIO_IN); + pxa_gpio_mode(POODLE_GPIO_nSD_WP | GPIO_IN); pxa_gpio_mode(POODLE_GPIO_SD_PWR | GPIO_OUT); + pxa_gpio_mode(POODLE_GPIO_SD_PWR1 | GPIO_OUT); poodle_mci_platform_data.detect_delay = msecs_to_jiffies(250); @@ -162,12 +165,22 @@ static void poodle_mci_setpower(struct device *dev, unsigned int vdd) { struct pxamci_platform_data* p_d = dev->platform_data; - if (( 1 << vdd) & p_d->ocr_mask) - GPSR1 = GPIO_bit(POODLE_GPIO_SD_PWR); - else - GPCR1 = GPIO_bit(POODLE_GPIO_SD_PWR); + if (( 1 << vdd) & p_d->ocr_mask) { + GPSR(POODLE_GPIO_SD_PWR) = GPIO_bit(POODLE_GPIO_SD_PWR); + mdelay(2); + GPSR(POODLE_GPIO_SD_PWR1) = GPIO_bit(POODLE_GPIO_SD_PWR1); + } else { + GPCR(POODLE_GPIO_SD_PWR1) = GPIO_bit(POODLE_GPIO_SD_PWR1); + GPCR(POODLE_GPIO_SD_PWR) = GPIO_bit(POODLE_GPIO_SD_PWR); + } +} + +static int poodle_mci_get_ro(struct device *dev) +{ + return GPLR(POODLE_GPIO_nSD_WP) & GPIO_bit(POODLE_GPIO_nSD_WP); } + static void poodle_mci_exit(struct device *dev, void *data) { free_irq(POODLE_IRQ_GPIO_nSD_DETECT, data); @@ -176,6 +189,7 @@ static void poodle_mci_exit(struct device *dev, void *data) static struct pxamci_platform_data poodle_mci_platform_data = { .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, .init = poodle_mci_init, + .get_ro = poodle_mci_get_ro, .setpower = poodle_mci_setpower, .exit = poodle_mci_exit, }; diff --git a/include/asm-arm/arch-pxa/poodle.h b/include/asm-arm/arch-pxa/poodle.h index 6b5ac5144e7..6079e0aa1ab 100644 --- a/include/asm-arm/arch-pxa/poodle.h +++ b/include/asm-arm/arch-pxa/poodle.h @@ -31,6 +31,7 @@ #define POODLE_GPIO_CF_CD (14) #define POODLE_GPIO_CF_STSCHG (14) #define POODLE_GPIO_SD_PWR (33) +#define POODLE_GPIO_SD_PWR1 (3) #define POODLE_GPIO_nSD_CLK (6) #define POODLE_GPIO_nSD_WP (7) #define POODLE_GPIO_nSD_INT (8) @@ -42,6 +43,7 @@ #define POODLE_GPIO_BYPASS_ON (36) #define POODLE_GPIO_CHRG_ON (38) #define POODLE_GPIO_CHRG_FULL (16) +#define POODLE_GPIO_DISCHARGE_ON (42) /* Enable battery discharge */ /* PXA GPIOs */ #define POODLE_IRQ_GPIO_ON_KEY IRQ_GPIO(0) -- cgit v1.2.3-70-g09d2 From f8703dc8cb10eca7f6fe6ef364d8e106fe07f034 Mon Sep 17 00:00:00 2001 From: Richard Purdie Date: Mon, 19 Jun 2006 19:58:52 +0100 Subject: [ARM] 3564/1: sharpsl_pm: Abstract some machine specific parameters Patch from Richard Purdie Abstract some machine specific parameters from the sharpsl_pm core into the machine specific drivers. This allows the core to support tosa/poodle. Signed-off-by: Richard Purdie Signed-off-by: Russell King --- arch/arm/common/sharpsl_pm.c | 28 +++++++++++----------------- arch/arm/mach-pxa/corgi_pm.c | 23 ++++++++++++++++++++--- arch/arm/mach-pxa/sharpsl_pm.c | 7 +++++-- arch/arm/mach-pxa/spitz_pm.c | 15 +++++++++++++++ include/asm-arm/hardware/sharpsl_pm.h | 11 +++++++++++ 5 files changed, 62 insertions(+), 22 deletions(-) (limited to 'include/asm-arm') diff --git a/arch/arm/common/sharpsl_pm.c b/arch/arm/common/sharpsl_pm.c index 3cd8c9ee451..045e37e0733 100644 --- a/arch/arm/common/sharpsl_pm.c +++ b/arch/arm/common/sharpsl_pm.c @@ -49,13 +49,6 @@ #define SHARPSL_CHARGE_CO_CHECK_TIME 5 /* 5 msec */ #define SHARPSL_CHARGE_RETRY_CNT 1 /* eqv. 10 min */ -#define SHARPSL_CHARGE_ON_VOLT 0x99 /* 2.9V */ -#define SHARPSL_CHARGE_ON_TEMP 0xe0 /* 2.9V */ -#define SHARPSL_CHARGE_ON_ACIN_HIGH 0x9b /* 6V */ -#define SHARPSL_CHARGE_ON_ACIN_LOW 0x34 /* 2V */ -#define SHARPSL_FATAL_ACIN_VOLT 182 /* 3.45V */ -#define SHARPSL_FATAL_NOACIN_VOLT 170 /* 3.40V */ - /* * Prototypes */ @@ -82,12 +75,13 @@ DEFINE_LED_TRIGGER(sharpsl_charge_led_trigger); static int get_percentage(int voltage) { int i = sharpsl_pm.machinfo->bat_levels - 1; + int bl_status = sharpsl_pm.machinfo->backlight_get_status ? sharpsl_pm.machinfo->backlight_get_status() : 0; struct battery_thresh *thresh; if (sharpsl_pm.charge_mode == CHRG_ON) - thresh=sharpsl_pm.machinfo->bat_levels_acin; + thresh = bl_status ? sharpsl_pm.machinfo->bat_levels_acin_bl : sharpsl_pm.machinfo->bat_levels_acin; else - thresh=sharpsl_pm.machinfo->bat_levels_noac; + thresh = bl_status ? sharpsl_pm.machinfo->bat_levels_noac_bl : sharpsl_pm.machinfo->bat_levels_noac; while (i > 0 && (voltage > thresh[i].voltage)) i--; @@ -131,7 +125,7 @@ static void sharpsl_battery_thread(void *private_) sharpsl_pm.battstat.ac_status = (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN) ? APM_AC_ONLINE : APM_AC_OFFLINE); /* Corgi cannot confirm when battery fully charged so periodically kick! */ - if (machine_is_corgi() && (sharpsl_pm.charge_mode == CHRG_ON) + if (!sharpsl_pm.machinfo->batfull_irq && (sharpsl_pm.charge_mode == CHRG_ON) && time_after(jiffies, sharpsl_pm.charge_start_time + SHARPSL_CHARGE_ON_TIME_INTERVAL)) schedule_work(&toggle_charger); @@ -166,11 +160,11 @@ static void sharpsl_battery_thread(void *private_) && ((sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_LOW) || (sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_CRITICAL))) { if (!(sharpsl_pm.flags & SHARPSL_BL_LIMIT)) { - corgibl_limit_intensity(1); + sharpsl_pm.machinfo->backlight_limit(1); sharpsl_pm.flags |= SHARPSL_BL_LIMIT; } } else if (sharpsl_pm.flags & SHARPSL_BL_LIMIT) { - corgibl_limit_intensity(0); + sharpsl_pm.machinfo->backlight_limit(0); sharpsl_pm.flags &= ~SHARPSL_BL_LIMIT; } @@ -418,7 +412,7 @@ static int sharpsl_check_battery_temp(void) val = get_select_val(buff); dev_dbg(sharpsl_pm.dev, "Temperature: %d\n", val); - if (val > SHARPSL_CHARGE_ON_TEMP) + if (val > sharpsl_pm.machinfo->charge_on_temp) return -1; return 0; @@ -450,7 +444,7 @@ static int sharpsl_check_battery_voltage(void) val = get_select_val(buff); dev_dbg(sharpsl_pm.dev, "Battery Voltage: %d\n", val); - if (val < SHARPSL_CHARGE_ON_VOLT) + if (val < sharpsl_pm.machinfo->charge_on_volt) return -1; return 0; @@ -468,7 +462,7 @@ static int sharpsl_ac_check(void) temp = get_select_val(buff); dev_dbg(sharpsl_pm.dev, "AC Voltage: %d\n",temp); - if ((temp > SHARPSL_CHARGE_ON_ACIN_HIGH) || (temp < SHARPSL_CHARGE_ON_ACIN_LOW)) { + if ((temp > sharpsl_pm.machinfo->charge_acin_high) || (temp < sharpsl_pm.machinfo->charge_acin_low)) { dev_err(sharpsl_pm.dev, "Error: AC check failed.\n"); return -1; } @@ -627,8 +621,8 @@ static int sharpsl_fatal_check(void) temp = get_select_val(buff); dev_dbg(sharpsl_pm.dev, "sharpsl_fatal_check: acin: %d, discharge voltage: %d, no discharge: %d\n", acin, temp, sharpsl_pm.machinfo->read_devdata(SHARPSL_BATT_VOLT)); - if ((acin && (temp < SHARPSL_FATAL_ACIN_VOLT)) || - (!acin && (temp < SHARPSL_FATAL_NOACIN_VOLT))) + if ((acin && (temp < sharpsl_pm.machinfo->fatal_acin_volt)) || + (!acin && (temp < sharpsl_pm.machinfo->fatal_noacin_volt))) return -1; return 0; } diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c index 7a1ab73e9e1..4c3de4008a4 100644 --- a/arch/arm/mach-pxa/corgi_pm.c +++ b/arch/arm/mach-pxa/corgi_pm.c @@ -27,6 +27,13 @@ #include #include "sharpsl.h" +#define SHARPSL_CHARGE_ON_VOLT 0x99 /* 2.9V */ +#define SHARPSL_CHARGE_ON_TEMP 0xe0 /* 2.9V */ +#define SHARPSL_CHARGE_ON_ACIN_HIGH 0x9b /* 6V */ +#define SHARPSL_CHARGE_ON_ACIN_LOW 0x34 /* 2V */ +#define SHARPSL_FATAL_ACIN_VOLT 182 /* 3.45V */ +#define SHARPSL_FATAL_NOACIN_VOLT 170 /* 3.40V */ + static void corgi_charger_init(void) { pxa_gpio_mode(CORGI_GPIO_ADC_TEMP_ON | GPIO_OUT); @@ -195,9 +202,16 @@ static struct sharpsl_charger_machinfo corgi_pm_machinfo = { .read_devdata = corgipm_read_devdata, .charger_wakeup = corgi_charger_wakeup, .should_wakeup = corgi_should_wakeup, - .bat_levels = 40, - .bat_levels_noac = spitz_battery_levels_noac, - .bat_levels_acin = spitz_battery_levels_acin, + .backlight_limit = corgibl_limit_intensity, + .charge_on_volt = SHARPSL_CHARGE_ON_VOLT, + .charge_on_temp = SHARPSL_CHARGE_ON_TEMP, + .charge_acin_high = SHARPSL_CHARGE_ON_ACIN_HIGH, + .charge_acin_low = SHARPSL_CHARGE_ON_ACIN_LOW, + .fatal_acin_volt = SHARPSL_FATAL_ACIN_VOLT, + .fatal_noacin_volt= SHARPSL_FATAL_NOACIN_VOLT, + .bat_levels = 40, + .bat_levels_noac = spitz_battery_levels_noac, + .bat_levels_acin = spitz_battery_levels_acin, .status_high_acin = 188, .status_low_acin = 178, .status_high_noac = 185, @@ -214,6 +228,9 @@ static int __devinit corgipm_init(void) if (!corgipm_device) return -ENOMEM; + if (!machine_is_corgi()) + corgi_pm_machinfo.batfull_irq = 1; + corgipm_device->dev.platform_data = &corgi_pm_machinfo; ret = platform_device_add(corgipm_device); diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c index 6d402b262d8..0f1648780c4 100644 --- a/arch/arm/mach-pxa/sharpsl_pm.c +++ b/arch/arm/mach-pxa/sharpsl_pm.c @@ -128,6 +128,9 @@ struct battery_thresh spitz_battery_levels_noac[] = { */ int sharpsl_pm_pxa_read_max1111(int channel) { + if (machine_is_tosa()) // Ugly, better move this function into another module + return 0; + return corgi_ssp_max1111_get((channel << MAXCTRL_SEL_SH) | MAXCTRL_PD0 | MAXCTRL_PD1 | MAXCTRL_SGL | MAXCTRL_UNI | MAXCTRL_STR); } @@ -156,7 +159,7 @@ void sharpsl_pm_pxa_init(void) else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal),IRQT_FALLING); } - if (!machine_is_corgi()) + if (sharpsl_pm.machinfo->batfull_irq) { /* Register interrupt handler. */ if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr, SA_INTERRUPT, "CO", sharpsl_chrg_full_isr)) { @@ -174,6 +177,6 @@ void sharpsl_pm_pxa_remove(void) if (sharpsl_pm.machinfo->gpio_fatal) free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr); - if (!machine_is_corgi()) + if (sharpsl_pm.machinfo->batfull_irq) free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr); } diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c index 5e5bdc89848..40be833079c 100644 --- a/arch/arm/mach-pxa/spitz_pm.c +++ b/arch/arm/mach-pxa/spitz_pm.c @@ -27,6 +27,13 @@ #include #include "sharpsl.h" +#define SHARPSL_CHARGE_ON_VOLT 0x99 /* 2.9V */ +#define SHARPSL_CHARGE_ON_TEMP 0xe0 /* 2.9V */ +#define SHARPSL_CHARGE_ON_ACIN_HIGH 0x9b /* 6V */ +#define SHARPSL_CHARGE_ON_ACIN_LOW 0x34 /* 2V */ +#define SHARPSL_FATAL_ACIN_VOLT 182 /* 3.45V */ +#define SHARPSL_FATAL_NOACIN_VOLT 170 /* 3.40V */ + static int spitz_last_ac_status; static void spitz_charger_init(void) @@ -190,6 +197,7 @@ struct sharpsl_charger_machinfo spitz_pm_machinfo = { .gpio_batlock = SPITZ_GPIO_BAT_COVER, .gpio_acin = SPITZ_GPIO_AC_IN, .gpio_batfull = SPITZ_GPIO_CHRG_FULL, + .batfull_irq = 1, .gpio_fatal = SPITZ_GPIO_FATAL_BAT, .discharge = spitz_discharge, .discharge1 = spitz_discharge1, @@ -200,6 +208,13 @@ struct sharpsl_charger_machinfo spitz_pm_machinfo = { .read_devdata = spitzpm_read_devdata, .charger_wakeup = spitz_charger_wakeup, .should_wakeup = spitz_should_wakeup, + .backlight_limit = corgibl_limit_intensity, + .charge_on_volt = SHARPSL_CHARGE_ON_VOLT, + .charge_on_temp = SHARPSL_CHARGE_ON_TEMP, + .charge_acin_high = SHARPSL_CHARGE_ON_ACIN_HIGH, + .charge_acin_low = SHARPSL_CHARGE_ON_ACIN_LOW, + .fatal_acin_volt = SHARPSL_FATAL_ACIN_VOLT, + .fatal_noacin_volt= SHARPSL_FATAL_NOACIN_VOLT, .bat_levels = 40, .bat_levels_noac = spitz_battery_levels_noac, .bat_levels_acin = spitz_battery_levels_acin, diff --git a/include/asm-arm/hardware/sharpsl_pm.h b/include/asm-arm/hardware/sharpsl_pm.h index 36983e5f366..ecf15b83956 100644 --- a/include/asm-arm/hardware/sharpsl_pm.h +++ b/include/asm-arm/hardware/sharpsl_pm.h @@ -16,6 +16,7 @@ struct sharpsl_charger_machinfo { void (*exit)(void); int gpio_acin; int gpio_batfull; + int batfull_irq; int gpio_batlock; int gpio_fatal; void (*discharge)(int); @@ -34,9 +35,19 @@ struct sharpsl_charger_machinfo { #define SHARPSL_STATUS_FATAL 7 unsigned long (*charger_wakeup)(void); int (*should_wakeup)(unsigned int resume_on_alarm); + void (*backlight_limit)(int); + int (*backlight_get_status) (void); + int charge_on_volt; + int charge_on_temp; + int charge_acin_high; + int charge_acin_low; + int fatal_acin_volt; + int fatal_noacin_volt; int bat_levels; struct battery_thresh *bat_levels_noac; struct battery_thresh *bat_levels_acin; + struct battery_thresh *bat_levels_noac_bl; + struct battery_thresh *bat_levels_acin_bl; int status_high_acin; int status_low_acin; int status_high_noac; -- cgit v1.2.3-70-g09d2 From faed568413e89f87cd60aa8b292cc4b9996bae42 Mon Sep 17 00:00:00 2001 From: Richard Purdie Date: Mon, 19 Jun 2006 20:46:05 +0100 Subject: [ARM] 3594/1: Poodle: Add touchscreen support + other updates Patch from Richard Purdie Poodle Updates: * Update corgi_ssp to make the GPIO chip selects optional * Enable corgi_ssp for use by poodle * Add corgi touchscreen platform device for poodle * Export locomo platform device. * Set framebuffer device parent correctly Signed-off-by: Richard Purdie Signed-off-by: Russell King --- arch/arm/mach-pxa/Kconfig | 1 + arch/arm/mach-pxa/Makefile | 2 +- arch/arm/mach-pxa/corgi_ssp.c | 42 ++++++++++++++++-------- arch/arm/mach-pxa/poodle.c | 69 +++++++++++++++++++++++++++++++++++++-- include/asm-arm/arch-pxa/poodle.h | 2 ++ 5 files changed, 99 insertions(+), 17 deletions(-) (limited to 'include/asm-arm') diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index 0104fd142e7..ea5137f319c 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig @@ -61,6 +61,7 @@ config MACH_POODLE bool "Enable Sharp SL-5600 (Poodle) Support" depends PXA_SHARPSL_25x select SHARP_LOCOMO + select PXA_SSP config MACH_CORGI bool "Enable Sharp SL-C700 (Corgi) Support" diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile index 4e8a983e2b8..1610690be41 100644 --- a/arch/arm/mach-pxa/Makefile +++ b/arch/arm/mach-pxa/Makefile @@ -15,7 +15,7 @@ obj-$(CONFIG_ARCH_PXA_IDP) += idp.o obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o corgi_pm.o obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o spitz_pm.o obj-$(CONFIG_MACH_AKITA) += akita-ioexp.o -obj-$(CONFIG_MACH_POODLE) += poodle.o +obj-$(CONFIG_MACH_POODLE) += poodle.o corgi_ssp.o obj-$(CONFIG_MACH_TOSA) += tosa.o # Support for blinky lights diff --git a/arch/arm/mach-pxa/corgi_ssp.c b/arch/arm/mach-pxa/corgi_ssp.c index 8a25a1c8019..f9421318cb7 100644 --- a/arch/arm/mach-pxa/corgi_ssp.c +++ b/arch/arm/mach-pxa/corgi_ssp.c @@ -50,12 +50,14 @@ unsigned long corgi_ssp_ads7846_putget(ulong data) unsigned long ret,flag; spin_lock_irqsave(&corgi_ssp_lock, flag); - GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); + if (ssp_machinfo->cs_ads7846 >= 0) + GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); ssp_write_word(&corgi_ssp_dev,data); ret = ssp_read_word(&corgi_ssp_dev); - GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); + if (ssp_machinfo->cs_ads7846 >= 0) + GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); spin_unlock_irqrestore(&corgi_ssp_lock, flag); return ret; @@ -68,12 +70,14 @@ unsigned long corgi_ssp_ads7846_putget(ulong data) void corgi_ssp_ads7846_lock(void) { spin_lock(&corgi_ssp_lock); - GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); + if (ssp_machinfo->cs_ads7846 >= 0) + GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); } void corgi_ssp_ads7846_unlock(void) { - GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); + if (ssp_machinfo->cs_ads7846 >= 0) + GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); spin_unlock(&corgi_ssp_lock); } @@ -110,11 +114,13 @@ unsigned long corgi_ssp_dac_put(ulong data) ssp_config(&corgi_ssp_dev, (SSCR0_Motorola | (SSCR0_DSS & 0x07 )), sscr1, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_lcdcon)); ssp_enable(&corgi_ssp_dev); - GPCR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); + if (ssp_machinfo->cs_lcdcon >= 0) + GPCR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); ssp_write_word(&corgi_ssp_dev,data); /* Read null data back from device to prevent SSP overflow */ ssp_read_word(&corgi_ssp_dev); - GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); + if (ssp_machinfo->cs_lcdcon >= 0) + GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); ssp_disable(&corgi_ssp_dev); ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846)); @@ -147,7 +153,8 @@ int corgi_ssp_max1111_get(ulong data) int voltage,voltage1,voltage2; spin_lock_irqsave(&corgi_ssp_lock, flag); - GPCR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); + if (ssp_machinfo->cs_max1111 >= 0) + GPCR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); ssp_disable(&corgi_ssp_dev); ssp_config(&corgi_ssp_dev, (SSCR0_Motorola | (SSCR0_DSS & 0x07 )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_max1111)); ssp_enable(&corgi_ssp_dev); @@ -169,7 +176,8 @@ int corgi_ssp_max1111_get(ulong data) ssp_disable(&corgi_ssp_dev); ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846)); ssp_enable(&corgi_ssp_dev); - GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); + if (ssp_machinfo->cs_max1111 >= 0) + GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); spin_unlock_irqrestore(&corgi_ssp_lock, flag); if (voltage1 & 0xc0 || voltage2 & 0x3f) @@ -196,9 +204,12 @@ static int __init corgi_ssp_probe(struct platform_device *dev) int ret; /* Chip Select - Disable All */ - pxa_gpio_mode(ssp_machinfo->cs_lcdcon | GPIO_OUT | GPIO_DFLT_HIGH); - pxa_gpio_mode(ssp_machinfo->cs_max1111 | GPIO_OUT | GPIO_DFLT_HIGH); - pxa_gpio_mode(ssp_machinfo->cs_ads7846 | GPIO_OUT | GPIO_DFLT_HIGH); + if (ssp_machinfo->cs_lcdcon >= 0) + pxa_gpio_mode(ssp_machinfo->cs_lcdcon | GPIO_OUT | GPIO_DFLT_HIGH); + if (ssp_machinfo->cs_max1111 >= 0) + pxa_gpio_mode(ssp_machinfo->cs_max1111 | GPIO_OUT | GPIO_DFLT_HIGH); + if (ssp_machinfo->cs_ads7846 >= 0) + pxa_gpio_mode(ssp_machinfo->cs_ads7846 | GPIO_OUT | GPIO_DFLT_HIGH); ret = ssp_init(&corgi_ssp_dev, ssp_machinfo->port, 0); @@ -229,9 +240,12 @@ static int corgi_ssp_suspend(struct platform_device *dev, pm_message_t state) static int corgi_ssp_resume(struct platform_device *dev) { - GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); /* High - Disable LCD Control/Timing Gen */ - GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); /* High - Disable MAX1111*/ - GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); /* High - Disable ADS7846*/ + if (ssp_machinfo->cs_lcdcon >= 0) + GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); /* High - Disable LCD Control/Timing Gen */ + if (ssp_machinfo->cs_max1111 >= 0) + GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); /* High - Disable MAX1111*/ + if (ssp_machinfo->cs_ads7846 >= 0) + GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); /* High - Disable ADS7846*/ ssp_restore_state(&corgi_ssp_dev,&corgi_ssp_state); ssp_enable(&corgi_ssp_dev); diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c index 234877a09df..9a9fa87cea9 100644 --- a/arch/arm/mach-pxa/poodle.c +++ b/arch/arm/mach-pxa/poodle.c @@ -37,12 +37,15 @@ #include #include #include +#include +#include #include #include #include #include "generic.h" +#include "sharpsl.h" static struct resource poodle_scoop_resources[] = { [0] = { @@ -120,13 +123,71 @@ static struct resource locomo_resources[] = { }, }; -static struct platform_device locomo_device = { +struct platform_device poodle_locomo_device = { .name = "locomo", .id = 0, .num_resources = ARRAY_SIZE(locomo_resources), .resource = locomo_resources, }; +EXPORT_SYMBOL(poodle_locomo_device); + +/* + * Poodle SSP Device + */ + +struct platform_device poodle_ssp_device = { + .name = "corgi-ssp", + .id = -1, +}; + +struct corgissp_machinfo poodle_ssp_machinfo = { + .port = 1, + .cs_lcdcon = -1, + .cs_ads7846 = -1, + .cs_max1111 = -1, + .clk_lcdcon = 2, + .clk_ads7846 = 36, + .clk_max1111 = 2, +}; + + +/* + * Poodle Touch Screen Device + */ +static struct resource poodlets_resources[] = { + [0] = { + .start = POODLE_IRQ_GPIO_TP_INT, + .end = POODLE_IRQ_GPIO_TP_INT, + .flags = IORESOURCE_IRQ, + }, +}; + +static unsigned long poodle_get_hsync_len(void) +{ + return 0; +} + +static void poodle_null_hsync(void) +{ +} + +static struct corgits_machinfo poodle_ts_machinfo = { + .get_hsync_len = poodle_get_hsync_len, + .put_hsync = poodle_null_hsync, + .wait_hsync = poodle_null_hsync, +}; + +static struct platform_device poodle_ts_device = { + .name = "corgi-ts", + .dev = { + .platform_data = &poodle_ts_machinfo, + }, + .id = -1, + .num_resources = ARRAY_SIZE(poodlets_resources), + .resource = poodlets_resources, +}; + /* * MMC/SD Device @@ -259,8 +320,10 @@ static struct pxafb_mach_info poodle_fb_info __initdata = { }; static struct platform_device *devices[] __initdata = { - &locomo_device, + &poodle_locomo_device, &poodle_scoop_device, + &poodle_ssp_device, + &poodle_ts_device, }; static void poodle_poweroff(void) @@ -319,6 +382,7 @@ static void __init poodle_init(void) GPSR1 = 0x00000000; GPSR2 = 0x00000000; + set_pxa_fb_parent(&poodle_locomo_device.dev); set_pxa_fb_info(&poodle_fb_info); pxa_gpio_mode(POODLE_GPIO_USB_PULLUP | GPIO_OUT); pxa_gpio_mode(POODLE_GPIO_IR_ON | GPIO_OUT); @@ -332,6 +396,7 @@ static void __init poodle_init(void) if (ret) { printk(KERN_WARNING "poodle: Unable to register LoCoMo device\n"); } + corgi_ssp_set_machinfo(&poodle_ssp_machinfo); } static void __init fixup_poodle(struct machine_desc *desc, diff --git a/include/asm-arm/arch-pxa/poodle.h b/include/asm-arm/arch-pxa/poodle.h index 6079e0aa1ab..4d6a4031576 100644 --- a/include/asm-arm/arch-pxa/poodle.h +++ b/include/asm-arm/arch-pxa/poodle.h @@ -70,4 +70,6 @@ #define POODLE_SCOOP_IO_DIR ( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT ) #define POODLE_SCOOP_IO_OUT ( 0 ) +extern struct platform_device poodle_locomo_device; + #endif /* __ASM_ARCH_POODLE_H */ -- cgit v1.2.3-70-g09d2 From e6fea6a5e30efef56dee2b8455fde0811922055b Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Tue, 20 Jun 2006 19:26:41 +0100 Subject: [ARM] 3602/1: ixp23xx: fix two typos Patch from Lennert Buytenhek Fix two typos in include/asm-arm/arch-ixp23xx. Signed-off-by: Lennert Buytenhek Signed-off-by: Russell King --- include/asm-arm/arch-ixp23xx/entry-macro.S | 2 +- include/asm-arm/arch-ixp23xx/ixp23xx.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-ixp23xx/entry-macro.S b/include/asm-arm/arch-ixp23xx/entry-macro.S index 0ef4e6016ac..867761677b5 100644 --- a/include/asm-arm/arch-ixp23xx/entry-macro.S +++ b/include/asm-arm/arch-ixp23xx/entry-macro.S @@ -8,7 +8,7 @@ .macro get_irqnr_and_base, irqnr, irqstat, base, tmp ldr \irqnr, =(IXP23XX_INTC_VIRT + IXP23XX_INTR_IRQ_ENC_ST_OFFSET) ldr \irqnr, [\irqnr] @ get interrupt number - cmp \irqnr, #0x0 @ suprious interrupt ? + cmp \irqnr, #0x0 @ spurious interrupt ? movne \irqnr, \irqnr, lsr #2 @ skip unwanted low order bits subne \irqnr, \irqnr, #1 @ convert to 0 based diff --git a/include/asm-arm/arch-ixp23xx/ixp23xx.h b/include/asm-arm/arch-ixp23xx/ixp23xx.h index e49e1ca61b1..01efdbd1180 100644 --- a/include/asm-arm/arch-ixp23xx/ixp23xx.h +++ b/include/asm-arm/arch-ixp23xx/ixp23xx.h @@ -251,7 +251,7 @@ * CAP CSRs. ****************************************************************************/ #define IXP23XX_GLOBAL_REG(x) ((volatile unsigned long *)(IXP23XX_CAP_CSR_VIRT + 0x4a00 + (x))) -#define IXP23XX_PROD_IDG IXP23XX_GLOBAL_REG(0x00) +#define IXP23XX_PRODUCT_ID IXP23XX_GLOBAL_REG(0x00) #define IXP23XX_MISC_CONTROL IXP23XX_GLOBAL_REG(0x04) #define IXP23XX_MSF_CLK_CNTRL IXP23XX_GLOBAL_REG(0x08) #define IXP23XX_RESET0 IXP23XX_GLOBAL_REG(0x0c) -- cgit v1.2.3-70-g09d2 From c322e24b40b83bbdfa7c269bc0105e76a39e627f Mon Sep 17 00:00:00 2001 From: Liam Girdwood Date: Tue, 20 Jun 2006 19:26:42 +0100 Subject: [ARM] 3606/1: PXA27x SSP Register definitions Patch from Liam Girdwood This patch adds some new PXA27x SSP port registers and also fixes the SSP slots per frame macro Changes:- o SSCR0_SlotPerFrm fixed o Added SSP port TSA, RSA, TSS and ACD registers Signed-off-by: Liam Girdwood Signed-off-by: Russell King --- include/asm-arm/arch-pxa/pxa-regs.h | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index c8f53a71c07..7c1aefd99d5 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h @@ -1626,7 +1626,7 @@ #define SSCR0_RIM (1 << 22) /* Receive FIFO overrrun interrupt mask */ #define SSCR0_TUM (1 << 23) /* Transmit FIFO underrun interrupt mask */ #define SSCR0_FRDC (0x07000000) /* Frame rate divider control (mask) */ -#define SSCR0_SlotsPerFrm(c) ((x) - 1) /* Time slots per frame [1..8] */ +#define SSCR0_SlotsPerFrm(x) ((x) - 1) /* Time slots per frame [1..8] */ #define SSCR0_ADC (1 << 30) /* Audio clock select */ #define SSCR0_MOD (1 << 31) /* Mode (normal or network) */ #endif @@ -1707,6 +1707,10 @@ #if defined (CONFIG_PXA27x) #define SSTO_P1 __REG(0x41000028) /* SSP Port 1 Time Out Register */ #define SSPSP_P1 __REG(0x4100002C) /* SSP Port 1 Programmable Serial Protocol */ +#define SSTSA_P1 __REG(0x41000030) /* SSP Port 1 Tx Timeslot Active */ +#define SSRSA_P1 __REG(0x41000034) /* SSP Port 1 Rx Timeslot Active */ +#define SSTSS_P1 __REG(0x41000038) /* SSP Port 1 Timeslot Status */ +#define SSACD_P1 __REG(0x4100003C) /* SSP Port 1 Audio Clock Divider */ #define SSCR0_P2 __REG(0x41700000) /* SSP Port 2 Control Register 0 */ #define SSCR1_P2 __REG(0x41700004) /* SSP Port 2 Control Register 1 */ #define SSSR_P2 __REG(0x41700008) /* SSP Port 2 Status Register */ @@ -1714,6 +1718,10 @@ #define SSDR_P2 __REG(0x41700010) /* (Write / Read) SSP Port 2 Data Write Register/SSP Data Read Register */ #define SSTO_P2 __REG(0x41700028) /* SSP Port 2 Time Out Register */ #define SSPSP_P2 __REG(0x4170002C) /* SSP Port 2 Programmable Serial Protocol */ +#define SSTSA_P2 __REG(0x41700030) /* SSP Port 2 Tx Timeslot Active */ +#define SSRSA_P2 __REG(0x41700034) /* SSP Port 2 Rx Timeslot Active */ +#define SSTSS_P2 __REG(0x41700038) /* SSP Port 2 Timeslot Status */ +#define SSACD_P2 __REG(0x4170003C) /* SSP Port 2 Audio Clock Divider */ #define SSCR0_P3 __REG(0x41900000) /* SSP Port 3 Control Register 0 */ #define SSCR1_P3 __REG(0x41900004) /* SSP Port 3 Control Register 1 */ #define SSSR_P3 __REG(0x41900008) /* SSP Port 3 Status Register */ @@ -1721,6 +1729,10 @@ #define SSDR_P3 __REG(0x41900010) /* (Write / Read) SSP Port 3 Data Write Register/SSP Data Read Register */ #define SSTO_P3 __REG(0x41900028) /* SSP Port 3 Time Out Register */ #define SSPSP_P3 __REG(0x4190002C) /* SSP Port 3 Programmable Serial Protocol */ +#define SSTSA_P3 __REG(0x41900030) /* SSP Port 3 Tx Timeslot Active */ +#define SSRSA_P3 __REG(0x41900034) /* SSP Port 3 Rx Timeslot Active */ +#define SSTSS_P3 __REG(0x41900038) /* SSP Port 3 Timeslot Status */ +#define SSACD_P3 __REG(0x4190003C) /* SSP Port 3 Audio Clock Divider */ #else /* PXA255 (only port 2) and PXA26x ports*/ #define SSTO_P1 __REG(0x41000028) /* SSP Port 1 Time Out Register */ #define SSPSP_P1 __REG(0x4100002C) /* SSP Port 1 Programmable Serial Protocol */ @@ -1747,6 +1759,10 @@ #define SSDR_P(x) (*(((x) == 1) ? &SSDR_P1 : ((x) == 2) ? &SSDR_P2 : ((x) == 3) ? &SSDR_P3 : NULL)) #define SSTO_P(x) (*(((x) == 1) ? &SSTO_P1 : ((x) == 2) ? &SSTO_P2 : ((x) == 3) ? &SSTO_P3 : NULL)) #define SSPSP_P(x) (*(((x) == 1) ? &SSPSP_P1 : ((x) == 2) ? &SSPSP_P2 : ((x) == 3) ? &SSPSP_P3 : NULL)) +#define SSTSA_P(x) (*(((x) == 1) ? &SSTSA_P1 : ((x) == 2) ? &SSTSA_P2 : ((x) == 3) ? &SSTSA_P3 : NULL)) +#define SSRSA_P(x) (*(((x) == 1) ? &SSRSA_P1 : ((x) == 2) ? &SSRSA_P2 : ((x) == 3) ? &SSRSA_P3 : NULL)) +#define SSTSS_P(x) (*(((x) == 1) ? &SSTSS_P1 : ((x) == 2) ? &SSTSS_P2 : ((x) == 3) ? &SSTSS_P3 : NULL)) +#define SSACD_P(x) (*(((x) == 1) ? &SSACD_P1 : ((x) == 2) ? &SSACD_P2 : ((x) == 3) ? &SSACD_P3 : NULL)) /* * MultiMediaCard (MMC) controller -- cgit v1.2.3-70-g09d2 From d6bdbb8ef3e4a9cafc747e1444b4908f9f2f548d Mon Sep 17 00:00:00 2001 From: Andrew Victor Date: Tue, 20 Jun 2006 19:27:34 +0100 Subject: [ARM] 3603/1: AT91RM9200 remove old files Patch from Andrew Victor This patch removes the now unnecessary include/asm-arm/arch-at91rm9200/pio.h file. The pin configuration is now handled in the platform-device setup code (arch/arm/mach-at91rm9200/devices.c). Signed-off-by: Andrew Victor Signed-off-by: Russell King --- include/asm-arm/arch-at91rm9200/pio.h | 115 ---------------------------------- 1 file changed, 115 deletions(-) delete mode 100644 include/asm-arm/arch-at91rm9200/pio.h (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-at91rm9200/pio.h b/include/asm-arm/arch-at91rm9200/pio.h deleted file mode 100644 index a89501b4a70..00000000000 --- a/include/asm-arm/arch-at91rm9200/pio.h +++ /dev/null @@ -1,115 +0,0 @@ -/* - * include/asm-arm/arch-at91rm9200/pio.h - * - * Copyright (C) 2003 SAN People - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - */ - -#ifndef __ASM_ARCH_PIO_H -#define __ASM_ARCH_PIO_H - -#include - -static inline void AT91_CfgPIO_USART0(void) { - at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA17_TXD0 | AT91_PA18_RXD0 | AT91_PA20_CTS0); - - /* - * Errata #39 - RTS0 is not internally connected to PA21. We need to drive - * the pin manually. Default is off (RTS is active low). - */ - at91_sys_write(AT91_PIOA + PIO_PER, AT91_PA21_RTS0); - at91_sys_write(AT91_PIOA + PIO_OER, AT91_PA21_RTS0); - at91_sys_write(AT91_PIOA + PIO_SODR, AT91_PA21_RTS0); -} - -static inline void AT91_CfgPIO_USART1(void) { - at91_sys_write(AT91_PIOB + PIO_PDR, AT91_PB18_RI1 | AT91_PB19_DTR1 - | AT91_PB20_TXD1 | AT91_PB21_RXD1 | AT91_PB23_DCD1 - | AT91_PB24_CTS1 | AT91_PB25_DSR1 | AT91_PB26_RTS1); -} - -static inline void AT91_CfgPIO_USART2(void) { - at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA22_RXD2 | AT91_PA23_TXD2); -} - -static inline void AT91_CfgPIO_USART3(void) { - at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA5_TXD3 | AT91_PA6_RXD3); - at91_sys_write(AT91_PIOA + PIO_BSR, AT91_PA5_TXD3 | AT91_PA6_RXD3); -} - -static inline void AT91_CfgPIO_DBGU(void) { - at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA31_DTXD | AT91_PA30_DRXD); -} - -/* - * Enable the Two-Wire interface. - */ -static inline void AT91_CfgPIO_TWI(void) { - at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA25_TWD | AT91_PA26_TWCK); - at91_sys_write(AT91_PIOA + PIO_ASR, AT91_PA25_TWD | AT91_PA26_TWCK); - at91_sys_write(AT91_PIOA + PIO_MDER, AT91_PA25_TWD | AT91_PA26_TWCK); /* open drain */ -} - -/* - * Enable the Serial Peripheral Interface. - */ -static inline void AT91_CfgPIO_SPI(void) { - at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA0_MISO | AT91_PA1_MOSI | AT91_PA2_SPCK); -} - -static inline void AT91_CfgPIO_SPI_CS0(void) { - at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA3_NPCS0); -} - -static inline void AT91_CfgPIO_SPI_CS1(void) { - at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA4_NPCS1); -} - -static inline void AT91_CfgPIO_SPI_CS2(void) { - at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA5_NPCS2); -} - -static inline void AT91_CfgPIO_SPI_CS3(void) { - at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA6_NPCS3); -} - -/* - * Select the DataFlash card. - */ -static inline void AT91_CfgPIO_DataFlashCard(void) { - at91_sys_write(AT91_PIOB + PIO_PER, AT91_PIO_P(7)); - at91_sys_write(AT91_PIOB + PIO_OER, AT91_PIO_P(7)); - at91_sys_write(AT91_PIOB + PIO_CODR, AT91_PIO_P(7)); -} - -/* - * Enable NAND Flash (SmartMedia) interface. - */ -static inline void AT91_CfgPIO_SmartMedia(void) { - /* enable PC0=SMCE, PC1=SMOE, PC3=SMWE, A21=CLE, A22=ALE */ - at91_sys_write(AT91_PIOC + PIO_ASR, AT91_PC0_BFCK | AT91_PC1_BFRDY_SMOE | AT91_PC3_BFBAA_SMWE); - at91_sys_write(AT91_PIOC + PIO_PDR, AT91_PC0_BFCK | AT91_PC1_BFRDY_SMOE | AT91_PC3_BFBAA_SMWE); - - /* Configure PC2 as input (signal READY of the SmartMedia) */ - at91_sys_write(AT91_PIOC + PIO_PER, AT91_PC2_BFAVD); /* enable direct output enable */ - at91_sys_write(AT91_PIOC + PIO_ODR, AT91_PC2_BFAVD); /* disable output */ - - /* Configure PB1 as input (signal Card Detect of the SmartMedia) */ - at91_sys_write(AT91_PIOB + PIO_PER, AT91_PIO_P(1)); /* enable direct output enable */ - at91_sys_write(AT91_PIOB + PIO_ODR, AT91_PIO_P(1)); /* disable output */ -} - -static inline int AT91_PIO_SmartMedia_RDY(void) { - return (at91_sys_read(AT91_PIOC + PIO_PDSR) & AT91_PIO_P(2)) ? 1 : 0; -} - -static inline int AT91_PIO_SmartMedia_CardDetect(void) { - return (at91_sys_read(AT91_PIOB + PIO_PDSR) & AT91_PIO_P(1)) ? 1 : 0; -} - -#endif -- cgit v1.2.3-70-g09d2 From 907d6deb625cd7ff5fea3ef4b20dfb6c1c19c3ee Mon Sep 17 00:00:00 2001 From: Andrew Victor Date: Tue, 20 Jun 2006 19:30:19 +0100 Subject: [ARM] 3605/1: AT91RM9200 Power Management Patch from Andrew Victor This patch adds the core Power Management support for the AT91RM9200 processor. It will support suspend-to-RAM and standby modes. The suspend-to-RAM functionality is not 100% complete. The code that needs to be execute from the internal SRAM to restore the system is outstanding. For now we just fall through to Standby mode. The AT91-specific at91_suspend_entering_slow_clock() function will eventually be replaced by clk_must_disable() once that functionality is added to mainline clock API. Patch from David Brownell. Signed-off-by: Andrew Victor Signed-off-by: Russell King --- arch/arm/mach-at91rm9200/generic.h | 7 + arch/arm/mach-at91rm9200/pm.c | 225 +++++++++++++++++++++++++++++++++ include/asm-arm/arch-at91rm9200/gpio.h | 5 + 3 files changed, 237 insertions(+) create mode 100644 arch/arm/mach-at91rm9200/pm.c (limited to 'include/asm-arm') diff --git a/arch/arm/mach-at91rm9200/generic.h b/arch/arm/mach-at91rm9200/generic.h index 9bd541eba0a..f0d969d7d87 100644 --- a/arch/arm/mach-at91rm9200/generic.h +++ b/arch/arm/mach-at91rm9200/generic.h @@ -16,3 +16,10 @@ extern struct sys_timer at91rm9200_timer; extern void __init at91rm9200_map_io(void); extern int __init at91_clock_init(unsigned long main_clock); +struct device; +extern void __init at91_clock_associate(const char *id, struct device *dev, const char *func); + + /* Power Management */ +extern void at91_irq_suspend(void); +extern void at91_irq_resume(void); + diff --git a/arch/arm/mach-at91rm9200/pm.c b/arch/arm/mach-at91rm9200/pm.c new file mode 100644 index 00000000000..47e5480feb7 --- /dev/null +++ b/arch/arm/mach-at91rm9200/pm.c @@ -0,0 +1,225 @@ +/* + * arch/arm/mach-at91rm9200/pm.c + * AT91 Power Management + * + * Copyright (C) 2005 David Brownell + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include + +#include "generic.h" + + +static int at91_pm_valid_state(suspend_state_t state) +{ + switch (state) { + case PM_SUSPEND_ON: + case PM_SUSPEND_STANDBY: + case PM_SUSPEND_MEM: + return 1; + + default: + return 0; + } +} + + +static suspend_state_t target_state; + +/* + * Called after processes are frozen, but before we shutdown devices. + */ +static int at91_pm_prepare(suspend_state_t state) +{ + target_state = state; + return 0; +} + +/* + * Verify that all the clocks are correct before entering + * slow-clock mode. + */ +static int at91_pm_verify_clocks(void) +{ + unsigned long scsr; + int i; + + scsr = at91_sys_read(AT91_PMC_SCSR); + + /* USB must not be using PLLB */ + if ((scsr & (AT91_PMC_UHP | AT91_PMC_UDP)) != 0) { + pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n"); + return 0; + } + +#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS + /* PCK0..PCK3 must be disabled, or configured to use clk32k */ + for (i = 0; i < 4; i++) { + u32 css; + + if ((scsr & (AT91_PMC_PCK0 << i)) == 0) + continue; + + css = at91_sys_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS; + if (css != AT91_PMC_CSS_SLOW) { + pr_debug("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css); + return 0; + } + } +#endif + + return 1; +} + +/* + * Call this from platform driver suspend() to see how deeply to suspend. + * For example, some controllers (like OHCI) need one of the PLL clocks + * in order to act as a wakeup source, and those are not available when + * going into slow clock mode. + * + * REVISIT: generalize as clk_will_be_available(clk)? Other platforms have + * the very same problem (but not using at91 main_clk), and it'd be better + * to add one generic API rather than lots of platform-specific ones. + */ +int at91_suspend_entering_slow_clock(void) +{ + return (target_state == PM_SUSPEND_MEM); +} +EXPORT_SYMBOL(at91_suspend_entering_slow_clock); + + +static void (*slow_clock)(void); + + + +static int at91_pm_enter(suspend_state_t state) +{ + at91_gpio_suspend(); + at91_irq_suspend(); + + pr_debug("AT91: PM - wake mask %08x, pm state %d\n", + /* remember all the always-wake irqs */ + (at91_sys_read(AT91_PMC_PCSR) + | (1 << AT91_ID_FIQ) + | (1 << AT91_ID_SYS) + | (1 << AT91_ID_IRQ0) + | (1 << AT91_ID_IRQ1) + | (1 << AT91_ID_IRQ2) + | (1 << AT91_ID_IRQ3) + | (1 << AT91_ID_IRQ4) + | (1 << AT91_ID_IRQ5) + | (1 << AT91_ID_IRQ6)) + & at91_sys_read(AT91_AIC_IMR), + state); + + switch (state) { + /* + * Suspend-to-RAM is like STANDBY plus slow clock mode, so + * drivers must suspend more deeply: only the master clock + * controller may be using the main oscillator. + */ + case PM_SUSPEND_MEM: + /* + * Ensure that clocks are in a valid state. + */ + if (!at91_pm_verify_clocks()) + goto error; + + /* + * Enter slow clock mode by switching over to clk32k and + * turning off the main oscillator; reverse on wakeup. + */ + if (slow_clock) { + slow_clock(); + break; + } else { + /* DEVELOPMENT ONLY */ + pr_info("AT91: PM - no slow clock mode yet ...\n"); + /* FALLTHROUGH leaving master clock alone */ + } + + /* + * STANDBY mode has *all* drivers suspended; ignores irqs not + * marked as 'wakeup' event sources; and reduces DRAM power. + * But otherwise it's identical to PM_SUSPEND_ON: cpu idle, and + * nothing fancy done with main or cpu clocks. + */ + case PM_SUSPEND_STANDBY: + /* + * NOTE: the Wait-for-Interrupt instruction needs to be + * in icache so the SDRAM stays in self-refresh mode until + * the wakeup IRQ occurs. + */ + asm("b 1f; .align 5; 1:"); + asm("mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */ + at91_sys_write(AT91_SDRAMC_SRR, 1); /* self-refresh mode */ + /* fall though to next state */ + + case PM_SUSPEND_ON: + asm("mcr p15, 0, r0, c7, c0, 4"); /* wait for interrupt */ + break; + + default: + pr_debug("AT91: PM - bogus suspend state %d\n", state); + goto error; + } + + pr_debug("AT91: PM - wakeup %08x\n", + at91_sys_read(AT91_AIC_IPR) & at91_sys_read(AT91_AIC_IMR)); + +error: + target_state = PM_SUSPEND_ON; + at91_irq_resume(); + at91_gpio_resume(); + return 0; +} + + +static struct pm_ops at91_pm_ops ={ + .pm_disk_mode = 0, + .valid = at91_pm_valid_state, + .prepare = at91_pm_prepare, + .enter = at91_pm_enter, +}; + +static int __init at91_pm_init(void) +{ + printk("AT91: Power Management\n"); + +#ifdef CONFIG_AT91_PM_SLOW_CLOCK + /* REVISIT allocations of SRAM should be dynamically managed. + * FIQ handlers and other components will want SRAM/TCM too... + */ + slow_clock = (void *) (AT91_VA_BASE_SRAM + (3 * SZ_4K)); + memcpy(slow_clock, at91rm9200_slow_clock, at91rm9200_slow_clock_sz); +#endif + + /* Disable SDRAM low-power mode. Cannot be used with self-refresh. */ + at91_sys_write(AT91_SDRAMC_LPR, 0); + + pm_set_ops(&at91_pm_ops); + + return 0; +} +arch_initcall(at91_pm_init); diff --git a/include/asm-arm/arch-at91rm9200/gpio.h b/include/asm-arm/arch-at91rm9200/gpio.h index 6176ab2dc41..dbde1baaf25 100644 --- a/include/asm-arm/arch-at91rm9200/gpio.h +++ b/include/asm-arm/arch-at91rm9200/gpio.h @@ -13,6 +13,8 @@ #ifndef __ASM_ARCH_AT91RM9200_GPIO_H #define __ASM_ARCH_AT91RM9200_GPIO_H +#include + #define PIN_BASE NR_AIC_IRQS #define PQFP_GPIO_BANKS 3 /* PQFP package has 3 banks */ @@ -188,6 +190,9 @@ extern int at91_set_multi_drive(unsigned pin, int is_on); /* callable at any time */ extern int at91_set_gpio_value(unsigned pin, int value); extern int at91_get_gpio_value(unsigned pin); + +extern void at91_gpio_suspend(void); +extern void at91_gpio_resume(void); #endif #endif -- cgit v1.2.3-70-g09d2 From 5c3fddced9f62f4b175ce400bb96b23f47626e50 Mon Sep 17 00:00:00 2001 From: Andrew Victor Date: Tue, 20 Jun 2006 19:30:20 +0100 Subject: [ARM] 3607/1: AT91RM9200 misc fixes Patch from Andrew Victor This final patch includes some general fixes. 1. Link in pm.o if CONFIG_PM is enabled. [Should have been included in patch 3605/1]. 2. Use __raw_readl()/__raw_writel() when accessing System Peripheral registers. 3. Removed some unnecessary includes Signed-off-by: Andrew Victor Signed-off-by: Russell King --- arch/arm/mach-at91rm9200/Makefile | 7 +++++++ include/asm-arm/arch-at91rm9200/hardware.h | 4 ++-- include/asm-arm/arch-at91rm9200/io.h | 1 - include/asm-arm/arch-at91rm9200/irqs.h | 2 -- 4 files changed, 9 insertions(+), 5 deletions(-) (limited to 'include/asm-arm') diff --git a/arch/arm/mach-at91rm9200/Makefile b/arch/arm/mach-at91rm9200/Makefile index c8f544b789c..81ebc6684ad 100644 --- a/arch/arm/mach-at91rm9200/Makefile +++ b/arch/arm/mach-at91rm9200/Makefile @@ -7,6 +7,8 @@ obj-m := obj-n := obj- := +obj-$(CONFIG_PM) += pm.o + # Board-specific support obj-$(CONFIG_ARCH_AT91RM9200DK) += board-dk.o obj-$(CONFIG_MACH_AT91RM9200EK) += board-ek.o @@ -28,3 +30,8 @@ obj-$(CONFIG_LEDS) += $(led-y) # VGA support #obj-$(CONFIG_FB_S1D13XXX) += ics1523.o + + +ifeq ($(CONFIG_PM_DEBUG),y) +CFLAGS_pm.o += -DDEBUG +endif diff --git a/include/asm-arm/arch-at91rm9200/hardware.h b/include/asm-arm/arch-at91rm9200/hardware.h index 87f40df5714..235d39d9110 100644 --- a/include/asm-arm/arch-at91rm9200/hardware.h +++ b/include/asm-arm/arch-at91rm9200/hardware.h @@ -84,14 +84,14 @@ static inline unsigned int at91_sys_read(unsigned int reg_offset) { void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS; - return readl(addr + reg_offset); + return __raw_readl(addr + reg_offset); } static inline void at91_sys_write(unsigned int reg_offset, unsigned long value) { void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS; - writel(value, addr + reg_offset); + __raw_writel(value, addr + reg_offset); } #endif diff --git a/include/asm-arm/arch-at91rm9200/io.h b/include/asm-arm/arch-at91rm9200/io.h index 23e670d85c9..88fd1bebcef 100644 --- a/include/asm-arm/arch-at91rm9200/io.h +++ b/include/asm-arm/arch-at91rm9200/io.h @@ -21,7 +21,6 @@ #ifndef __ASM_ARCH_IO_H #define __ASM_ARCH_IO_H -#include #include #define IO_SPACE_LIMIT 0xFFFFFFFF diff --git a/include/asm-arm/arch-at91rm9200/irqs.h b/include/asm-arm/arch-at91rm9200/irqs.h index 27b0497f1b3..2dc93b174a8 100644 --- a/include/asm-arm/arch-at91rm9200/irqs.h +++ b/include/asm-arm/arch-at91rm9200/irqs.h @@ -37,8 +37,6 @@ * symbols in gpio.h for ones handled indirectly as GPIOs. * We make provision for 4 banks of GPIO. */ -#include - #define NR_IRQS (NR_AIC_IRQS + (4 * 32)) -- cgit v1.2.3-70-g09d2 From 55c20c0af7fe7d5d09af4addfafcfe3bdc500f5d Mon Sep 17 00:00:00 2001 From: Andrew Victor Date: Tue, 20 Jun 2006 19:31:39 +0100 Subject: [ARM] 3599/1: AT91RM9200 remove global variables Patch from Andrew Victor This patch removes some now unnecessary global variables - at91_master_clock, at91_serial_map, at91_console_port. Signed-off-by: Andrew Victor Signed-off-by: Russell King --- arch/arm/mach-at91rm9200/clock.c | 5 +---- arch/arm/mach-at91rm9200/common.c | 11 ----------- include/asm-arm/arch-at91rm9200/board.h | 7 ------- 3 files changed, 1 insertion(+), 22 deletions(-) (limited to 'include/asm-arm') diff --git a/arch/arm/mach-at91rm9200/clock.c b/arch/arm/mach-at91rm9200/clock.c index 30042d2bac5..fe71b834899 100644 --- a/arch/arm/mach-at91rm9200/clock.c +++ b/arch/arm/mach-at91rm9200/clock.c @@ -28,10 +28,10 @@ #include #include -#include /* for master clock global */ #include "generic.h" + /* * There's a lot more which can be done with clocks, including cpufreq * integration, slow clock mode support (for system suspend), letting @@ -722,9 +722,6 @@ int __init at91_clock_init(unsigned long main_clock) (unsigned) main_clock / 1000000, ((unsigned) main_clock % 1000000) / 1000); - /* FIXME get rid of master_clock global */ - at91_master_clock = mck.rate_hz; - #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS /* establish PCK0..PCK3 parentage */ for (tmp = 0; tmp < ARRAY_SIZE(clock_list); tmp++) { diff --git a/arch/arm/mach-at91rm9200/common.c b/arch/arm/mach-at91rm9200/common.c index 40d29a73b5c..1da68966e77 100644 --- a/arch/arm/mach-at91rm9200/common.c +++ b/arch/arm/mach-at91rm9200/common.c @@ -108,14 +108,3 @@ void __init at91rm9200_map_io(void) iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc)); } - -unsigned long at91_master_clock; - -EXPORT_SYMBOL(at91_master_clock); - - -int at91_serial_map[AT91_NR_UART]; -int at91_console_port; - -EXPORT_SYMBOL(at91_serial_map); -EXPORT_SYMBOL(at91_console_port); diff --git a/include/asm-arm/arch-at91rm9200/board.h b/include/asm-arm/arch-at91rm9200/board.h index 587948d5675..1fdd70b2380 100644 --- a/include/asm-arm/arch-at91rm9200/board.h +++ b/include/asm-arm/arch-at91rm9200/board.h @@ -31,13 +31,6 @@ #ifndef __ASM_ARCH_BOARD_H #define __ASM_ARCH_BOARD_H - /* Clocks */ -extern unsigned long at91_master_clock; - - /* Serial Port */ -extern int at91_serial_map[AT91_NR_UART]; -extern int at91_console_port; - #include #include #include -- cgit v1.2.3-70-g09d2 From ea75ee9ab8835ece099589c729574aa8aa94c0a6 Mon Sep 17 00:00:00 2001 From: Russell King Date: Tue, 20 Jun 2006 19:53:16 +0100 Subject: [ARM] Include asm/hardware.h not asm/arch/hardware.h Signed-off-by: Russell King --- arch/arm/mach-at91rm9200/board-carmeva.c | 2 +- arch/arm/mach-at91rm9200/board-csb337.c | 2 +- arch/arm/mach-at91rm9200/board-csb637.c | 2 +- arch/arm/mach-at91rm9200/board-dk.c | 2 +- arch/arm/mach-at91rm9200/board-eb9200.c | 2 +- arch/arm/mach-at91rm9200/board-ek.c | 2 +- arch/arm/mach-at91rm9200/board-kafa.c | 2 +- arch/arm/mach-at91rm9200/board-kb9202.c | 2 +- arch/arm/mach-at91rm9200/clock.c | 2 +- arch/arm/mach-at91rm9200/common.c | 2 +- arch/arm/mach-at91rm9200/devices.c | 2 +- arch/arm/mach-at91rm9200/gpio.c | 2 +- arch/arm/mach-netx/fb.c | 2 +- arch/arm/mach-pnx4008/serial.c | 2 +- include/asm-arm/arch-at91rm9200/memory.h | 2 +- include/asm-arm/arch-at91rm9200/system.h | 2 +- include/asm-arm/arch-at91rm9200/timex.h | 2 +- include/asm-arm/arch-at91rm9200/uncompress.h | 2 +- 18 files changed, 18 insertions(+), 18 deletions(-) (limited to 'include/asm-arm') diff --git a/arch/arm/mach-at91rm9200/board-carmeva.c b/arch/arm/mach-at91rm9200/board-carmeva.c index 9183cb75ccd..2c138b542eb 100644 --- a/arch/arm/mach-at91rm9200/board-carmeva.c +++ b/arch/arm/mach-at91rm9200/board-carmeva.c @@ -35,7 +35,7 @@ #include #include -#include +#include #include #include diff --git a/arch/arm/mach-at91rm9200/board-csb337.c b/arch/arm/mach-at91rm9200/board-csb337.c index 3b9de181ae3..e94645d77f7 100644 --- a/arch/arm/mach-at91rm9200/board-csb337.c +++ b/arch/arm/mach-at91rm9200/board-csb337.c @@ -35,7 +35,7 @@ #include #include -#include +#include #include #include diff --git a/arch/arm/mach-at91rm9200/board-csb637.c b/arch/arm/mach-at91rm9200/board-csb637.c index 2c4470d110d..67d5f7786cd 100644 --- a/arch/arm/mach-at91rm9200/board-csb637.c +++ b/arch/arm/mach-at91rm9200/board-csb637.c @@ -34,7 +34,7 @@ #include #include -#include +#include #include #include diff --git a/arch/arm/mach-at91rm9200/board-dk.c b/arch/arm/mach-at91rm9200/board-dk.c index eb02ca95be7..48d7390fa58 100644 --- a/arch/arm/mach-at91rm9200/board-dk.c +++ b/arch/arm/mach-at91rm9200/board-dk.c @@ -38,7 +38,7 @@ #include #include -#include +#include #include #include diff --git a/arch/arm/mach-at91rm9200/board-eb9200.c b/arch/arm/mach-at91rm9200/board-eb9200.c index c7e4546a262..a3e2df968a6 100644 --- a/arch/arm/mach-at91rm9200/board-eb9200.c +++ b/arch/arm/mach-at91rm9200/board-eb9200.c @@ -35,7 +35,7 @@ #include #include -#include +#include #include #include diff --git a/arch/arm/mach-at91rm9200/board-ek.c b/arch/arm/mach-at91rm9200/board-ek.c index 4d7468e4267..72202ed830a 100644 --- a/arch/arm/mach-at91rm9200/board-ek.c +++ b/arch/arm/mach-at91rm9200/board-ek.c @@ -38,7 +38,7 @@ #include #include -#include +#include #include #include diff --git a/arch/arm/mach-at91rm9200/board-kafa.c b/arch/arm/mach-at91rm9200/board-kafa.c index 35d459fdfcf..bf760c5e0c4 100644 --- a/arch/arm/mach-at91rm9200/board-kafa.c +++ b/arch/arm/mach-at91rm9200/board-kafa.c @@ -34,7 +34,7 @@ #include #include -#include +#include #include #include diff --git a/arch/arm/mach-at91rm9200/board-kb9202.c b/arch/arm/mach-at91rm9200/board-kb9202.c index 6ba65ef4880..f06d2b54cc9 100644 --- a/arch/arm/mach-at91rm9200/board-kb9202.c +++ b/arch/arm/mach-at91rm9200/board-kb9202.c @@ -35,7 +35,7 @@ #include #include -#include +#include #include #include diff --git a/arch/arm/mach-at91rm9200/clock.c b/arch/arm/mach-at91rm9200/clock.c index fe71b834899..edc2cc837ae 100644 --- a/arch/arm/mach-at91rm9200/clock.c +++ b/arch/arm/mach-at91rm9200/clock.c @@ -27,7 +27,7 @@ #include #include -#include +#include #include "generic.h" diff --git a/arch/arm/mach-at91rm9200/common.c b/arch/arm/mach-at91rm9200/common.c index 1da68966e77..e836f8537a1 100644 --- a/arch/arm/mach-at91rm9200/common.c +++ b/arch/arm/mach-at91rm9200/common.c @@ -16,7 +16,7 @@ #include #include -#include +#include #include "generic.h" static struct map_desc at91rm9200_io_desc[] __initdata = { diff --git a/arch/arm/mach-at91rm9200/devices.c b/arch/arm/mach-at91rm9200/devices.c index bf753e306a3..1cf85d231ba 100644 --- a/arch/arm/mach-at91rm9200/devices.c +++ b/arch/arm/mach-at91rm9200/devices.c @@ -16,7 +16,7 @@ #include #include -#include +#include #include #include diff --git a/arch/arm/mach-at91rm9200/gpio.c b/arch/arm/mach-at91rm9200/gpio.c index 3430ea05466..83c34747087 100644 --- a/arch/arm/mach-at91rm9200/gpio.c +++ b/arch/arm/mach-at91rm9200/gpio.c @@ -16,7 +16,7 @@ #include #include -#include +#include #include static const u32 pio_controller_offset[4] = { diff --git a/arch/arm/mach-netx/fb.c b/arch/arm/mach-netx/fb.c index e169b683e4d..ef0ab6115c0 100644 --- a/arch/arm/mach-netx/fb.c +++ b/arch/arm/mach-netx/fb.c @@ -24,7 +24,7 @@ #include #include -#include +#include struct clk {}; diff --git a/arch/arm/mach-pnx4008/serial.c b/arch/arm/mach-pnx4008/serial.c index 2e1e04cc048..10322384e45 100644 --- a/arch/arm/mach-pnx4008/serial.c +++ b/arch/arm/mach-pnx4008/serial.c @@ -16,7 +16,7 @@ #include #include -#include +#include #include #include diff --git a/include/asm-arm/arch-at91rm9200/memory.h b/include/asm-arm/arch-at91rm9200/memory.h index 462f1f0ad67..3c327c40437 100644 --- a/include/asm-arm/arch-at91rm9200/memory.h +++ b/include/asm-arm/arch-at91rm9200/memory.h @@ -21,7 +21,7 @@ #ifndef __ASM_ARCH_MEMORY_H #define __ASM_ARCH_MEMORY_H -#include +#include #define PHYS_OFFSET (AT91_SDRAM_BASE) diff --git a/include/asm-arm/arch-at91rm9200/system.h b/include/asm-arm/arch-at91rm9200/system.h index 945e66507a7..8a2ff472e4c 100644 --- a/include/asm-arm/arch-at91rm9200/system.h +++ b/include/asm-arm/arch-at91rm9200/system.h @@ -21,7 +21,7 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H -#include +#include static inline void arch_idle(void) { diff --git a/include/asm-arm/arch-at91rm9200/timex.h b/include/asm-arm/arch-at91rm9200/timex.h index 3f112dd1258..88687cefe6e 100644 --- a/include/asm-arm/arch-at91rm9200/timex.h +++ b/include/asm-arm/arch-at91rm9200/timex.h @@ -21,7 +21,7 @@ #ifndef __ASM_ARCH_TIMEX_H #define __ASM_ARCH_TIMEX_H -#include +#include #define CLOCK_TICK_RATE (AT91_SLOW_CLOCK) diff --git a/include/asm-arm/arch-at91rm9200/uncompress.h b/include/asm-arm/arch-at91rm9200/uncompress.h index 7b38497c24b..ec7811ab0a5 100644 --- a/include/asm-arm/arch-at91rm9200/uncompress.h +++ b/include/asm-arm/arch-at91rm9200/uncompress.h @@ -21,7 +21,7 @@ #ifndef __ASM_ARCH_UNCOMPRESS_H #define __ASM_ARCH_UNCOMPRESS_H -#include +#include /* * The following code assumes the serial port has already been -- cgit v1.2.3-70-g09d2 From 4af6fee18822d012a15b4c9b8992e1f2793dfe0b Mon Sep 17 00:00:00 2001 From: Deepak Saxena Date: Tue, 20 Jun 2006 21:30:44 +0100 Subject: [ARM] 3610/1: Make reboot work on Versatile Patch from Deepak Saxena This patch makes soft reboot work on the Versatile board. Thanks to Catalin Marinas @ ARM for pointing out the proper way to do this. Signed-off-by: Deepak Saxena Signed-off-by: Russell King --- arch/arm/Kconfig | 112 ++++++++++++++++---------------- include/asm-arm/arch-versatile/system.h | 16 ++--- 2 files changed, 63 insertions(+), 65 deletions(-) (limited to 'include/asm-arm') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index dfb97fe045d..1b7e5c2e90e 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -93,15 +93,49 @@ choice prompt "ARM system type" default ARCH_VERSATILE +config ARCH_AAEC2000 + bool "Agilent AAEC-2000 based" + select ARM_AMBA + help + This enables support for systems based on the Agilent AAEC-2000 + +config ARCH_INTEGRATOR + bool "ARM Ltd. Integrator family" + select ARM_AMBA + select ICST525 + help + Support for ARM's Integrator platform. + +config ARCH_REALVIEW + bool "ARM Ltd. RealView family" + select ARM_AMBA + select ICST307 + help + This enables support for ARM Ltd RealView boards. + +config ARCH_VERSATILE + bool "ARM Ltd. Versatile family" + select ARM_AMBA + select ARM_VIC + select ICST307 + help + This enables support for ARM Ltd Versatile board. + +config ARCH_AT91RM9200 + bool "Atmel AT91RM9200" + help + Say Y here if you intend to run this kernel on an Atmel + AT91RM9200-based board. + config ARCH_CLPS7500 - bool "Cirrus-CL-PS7500FE" + bool "Cirrus CL-PS7500FE" select TIMER_ACORN select ISA help Support for the Cirrus Logic PS7500FE system-on-a-chip. config ARCH_CLPS711X - bool "CLPS711x/EP721x-based" + bool "Cirrus Logic CLPS711x/EP721x-based" help Support for Cirrus Logic 711x/721x based boards. @@ -135,12 +169,22 @@ config ARCH_FOOTBRIDGE Support for systems based on the DC21285 companion chip ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. -config ARCH_INTEGRATOR - bool "Integrator" - select ARM_AMBA - select ICST525 +config ARCH_NETX + bool "Hilscher NetX based" + select ARM_VIC help - Support for ARM's Integrator platform. + This enables support for systems based on the Hilscher NetX Soc + +config ARCH_H720X + bool "Hynix HMS720x-based" + select ISA_DMA_API + help + This enables support for systems based on the Hynix HMS720x + +config ARCH_IMX + bool "IMX" + help + Support for Motorola's i.MX family of processors (MX1, MXL). config ARCH_IOP3XX bool "IOP3xx-based" @@ -178,6 +222,11 @@ config ARCH_L7200 If you have any questions or comments about the Linux kernel port to this board, send e-mail to . +config ARCH_PNX4008 + bool "Philips Nexperia PNX4008 Mobile" + help + This enables support for Philips PNX4008 mobile platform. + config ARCH_PXA bool "PXA2xx-based" select ARCH_MTD_XIP @@ -232,55 +281,6 @@ config ARCH_OMAP help Support for TI's OMAP platform (OMAP1 and OMAP2). -config ARCH_VERSATILE - bool "Versatile" - select ARM_AMBA - select ARM_VIC - select ICST307 - help - This enables support for ARM Ltd Versatile board. - -config ARCH_REALVIEW - bool "RealView" - select ARM_AMBA - select ICST307 - help - This enables support for ARM Ltd RealView boards. - -config ARCH_IMX - bool "IMX" - help - Support for Motorola's i.MX family of processors (MX1, MXL). - -config ARCH_H720X - bool "Hynix-HMS720x-based" - select ISA_DMA_API - help - This enables support for systems based on the Hynix HMS720x - -config ARCH_AAEC2000 - bool "Agilent AAEC-2000 based" - select ARM_AMBA - help - This enables support for systems based on the Agilent AAEC-2000 - -config ARCH_AT91RM9200 - bool "AT91RM9200" - help - Say Y here if you intend to run this kernel on an Atmel - AT91RM9200-based board. - -config ARCH_PNX4008 - bool "Philips Nexperia PNX4008 Mobile" - help - This enables support for Philips PNX4008 mobile platform. - -config ARCH_NETX - bool "Hilscher NetX based" - select ARM_VIC - help - This enables support for systems based on the Hilscher NetX Soc - endchoice source "arch/arm/mach-clps711x/Kconfig" diff --git a/include/asm-arm/arch-versatile/system.h b/include/asm-arm/arch-versatile/system.h index 8889a189739..71c6254c0d9 100644 --- a/include/asm-arm/arch-versatile/system.h +++ b/include/asm-arm/arch-versatile/system.h @@ -36,16 +36,14 @@ static inline void arch_idle(void) static inline void arch_reset(char mode) { - unsigned int hdr_ctrl = (IO_ADDRESS(VERSATILE_SYS_BASE) + VERSATILE_SYS_RESETCTL_OFFSET); - unsigned int val; + u32 val; - /* - * To reset, we hit the on-board reset register - * in the system FPGA - */ - val = __raw_readl(hdr_ctrl); - val |= VERSATILE_SYS_CTRL_RESET_CONFIGCLR; - __raw_writel(val, hdr_ctrl); + val = __raw_readl(IO_ADDRESS(VERSATILE_SYS_RESETCTL)) & ~0x7; + val |= 0x105; + + __raw_writel(0xa05f, IO_ADDRESS(VERSATILE_SYS_LOCK)); + __raw_writel(val, IO_ADDRESS(VERSATILE_SYS_RESETCTL)); + __raw_writel(0, IO_ADDRESS(VERSATILE_SYS_LOCK)); } #endif -- cgit v1.2.3-70-g09d2 From d6551e884cf66de072b81f8b6d23259462c40baf Mon Sep 17 00:00:00 2001 From: Russell King Date: Wed, 21 Jun 2006 13:31:52 +0100 Subject: [ARM] Add thread_notify infrastructure Some machine classes need to allow VFP support to be built into the kernel, but still allow the kernel to run even though VFP isn't present. Unfortunately, the kernel hard-codes VFP instructions into the thread switch, which prevents this being run-time selectable. Solve this by introducing a notifier which things such as VFP can hook into to be informed of events which affect the VFP subsystem (eg, creation and destruction of threads, switches between threads.) Signed-off-by: Russell King --- arch/arm/kernel/entry-armv.S | 24 +++++++------- arch/arm/kernel/iwmmxt.S | 2 +- arch/arm/kernel/process.c | 24 ++++++-------- arch/arm/nwfpe/fpmodule.c | 25 +++++++++++---- arch/arm/vfp/vfpmodule.c | 71 ++++++++++++++++++++++++++--------------- include/asm-arm/thread_notify.h | 48 ++++++++++++++++++++++++++++ 6 files changed, 135 insertions(+), 59 deletions(-) create mode 100644 include/asm-arm/thread_notify.h (limited to 'include/asm-arm') diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index ab8e600c18c..86c92523a34 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S @@ -20,6 +20,7 @@ #include #include #include +#include #include "entry-header.S" @@ -560,10 +561,8 @@ ENTRY(__switch_to) add ip, r1, #TI_CPU_SAVE ldr r3, [r2, #TI_TP_VALUE] stmia ip!, {r4 - sl, fp, sp, lr} @ Store most regs on stack -#ifndef CONFIG_MMU - add r2, r2, #TI_CPU_DOMAIN -#else - ldr r6, [r2, #TI_CPU_DOMAIN]! +#ifdef CONFIG_MMU + ldr r6, [r2, #TI_CPU_DOMAIN] #endif #if __LINUX_ARM_ARCH__ >= 6 #ifdef CONFIG_CPU_32v6K @@ -585,21 +584,20 @@ ENTRY(__switch_to) #ifdef CONFIG_MMU mcr p15, 0, r6, c3, c0, 0 @ Set domain register #endif -#ifdef CONFIG_VFP - @ Always disable VFP so we can lazily save/restore the old - @ state. This occurs in the context of the previous thread. - VFPFMRX r4, FPEXC - bic r4, r4, #FPEXC_ENABLE - VFPFMXR FPEXC, r4 -#endif #if defined(CONFIG_IWMMXT) bl iwmmxt_task_switch #elif defined(CONFIG_CPU_XSCALE) - add r4, r2, #40 @ cpu_context_save->extra + add r4, r2, #TI_CPU_DOMAIN + 40 @ cpu_context_save->extra ldmib r4, {r4, r5} mar acc0, r4, r5 #endif - ldmib r2, {r4 - sl, fp, sp, pc} @ Load all regs saved previously + mov r5, r0 + add r4, r2, #TI_CPU_SAVE + ldr r0, =thread_notify_head + mov r1, #THREAD_NOTIFY_SWITCH + bl atomic_notifier_call_chain + mov r0, r5 + ldmia r4, {r4 - sl, fp, sp, pc} @ Load all regs saved previously __INIT diff --git a/arch/arm/kernel/iwmmxt.S b/arch/arm/kernel/iwmmxt.S index 24c7b0477a0..af9e0ae952d 100644 --- a/arch/arm/kernel/iwmmxt.S +++ b/arch/arm/kernel/iwmmxt.S @@ -285,7 +285,7 @@ ENTRY(iwmmxt_task_switch) bne 1f @ yes: block them for next task ldr r5, =concan_owner - add r6, r2, #(TI_IWMMXT_STATE - TI_CPU_DOMAIN) @ get next task Concan save area + add r6, r2, #TI_IWMMXT_STATE @ get next task Concan save area ldr r5, [r5] @ get current Concan owner teq r5, r6 @ next task owns it? movne pc, lr @ no: leave Concan disabled diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c index 17c38dbf2f3..e1c77ee885a 100644 --- a/arch/arm/kernel/process.c +++ b/arch/arm/kernel/process.c @@ -33,6 +33,7 @@ #include #include #include +#include #include #include @@ -338,13 +339,9 @@ void exit_thread(void) { } -static void default_fp_init(union fp_state *fp) -{ - memset(fp, 0, sizeof(union fp_state)); -} +ATOMIC_NOTIFIER_HEAD(thread_notify_head); -void (*fp_init)(union fp_state *) = default_fp_init; -EXPORT_SYMBOL(fp_init); +EXPORT_SYMBOL_GPL(thread_notify_head); void flush_thread(void) { @@ -353,22 +350,21 @@ void flush_thread(void) memset(thread->used_cp, 0, sizeof(thread->used_cp)); memset(&tsk->thread.debug, 0, sizeof(struct debug_info)); + memset(&thread->fpstate, 0, sizeof(union fp_state)); + + thread_notify(THREAD_NOTIFY_FLUSH, thread); #if defined(CONFIG_IWMMXT) iwmmxt_task_release(thread); -#endif - fp_init(&thread->fpstate); -#if defined(CONFIG_VFP) - vfp_flush_thread(&thread->vfpstate); #endif } void release_thread(struct task_struct *dead_task) { -#if defined(CONFIG_VFP) - vfp_release_thread(&task_thread_info(dead_task)->vfpstate); -#endif + struct thread_info *thread = task_thread_info(dead_task); + + thread_notify(THREAD_NOTIFY_RELEASE, thread); #if defined(CONFIG_IWMMXT) - iwmmxt_task_release(task_thread_info(dead_task)); + iwmmxt_task_release(thread); #endif } diff --git a/arch/arm/nwfpe/fpmodule.c b/arch/arm/nwfpe/fpmodule.c index 2dfe1ac42ee..7d977d23f02 100644 --- a/arch/arm/nwfpe/fpmodule.c +++ b/arch/arm/nwfpe/fpmodule.c @@ -33,7 +33,8 @@ #include #include #include -/* XXX */ + +#include #include "softfloat.h" #include "fpopcode.h" @@ -56,16 +57,28 @@ void fp_send_sig(unsigned long sig, struct task_struct *p, int priv); extern char fpe_type[]; #endif +static int nwfpe_notify(struct notifier_block *self, unsigned long cmd, void *v) +{ + struct thread_info *thread = v; + + if (cmd == THREAD_NOTIFY_FLUSH) + nwfpe_init_fpa(&thread->fpstate); + + return NOTIFY_DONE; +} + +static struct notifier_block nwfpe_notifier_block = { + .notifier_call = nwfpe_notify, +}; + /* kernel function prototypes required */ void fp_setup(void); /* external declarations for saved kernel symbols */ extern void (*kern_fp_enter)(void); -extern void (*fp_init)(union fp_state *); /* Original value of fp_enter from kernel before patched by fpe_init. */ static void (*orig_fp_enter)(void); -static void (*orig_fp_init)(union fp_state *); /* forward declarations */ extern void nwfpe_enter(void); @@ -88,20 +101,20 @@ static int __init fpe_init(void) printk(KERN_WARNING "NetWinder Floating Point Emulator V0.97 (" NWFPE_BITS " precision)\n"); + thread_register_notifier(&nwfpe_notifier_block); + /* Save pointer to the old FP handler and then patch ourselves in */ orig_fp_enter = kern_fp_enter; - orig_fp_init = fp_init; kern_fp_enter = nwfpe_enter; - fp_init = nwfpe_init_fpa; return 0; } static void __exit fpe_exit(void) { + thread_unregister_notifier(&nwfpe_notifier_block); /* Restore the values we saved earlier. */ kern_fp_enter = orig_fp_enter; - fp_init = orig_fp_init; } /* diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c index 03486be0419..2476f4c2e76 100644 --- a/arch/arm/vfp/vfpmodule.c +++ b/arch/arm/vfp/vfpmodule.c @@ -15,6 +15,8 @@ #include #include #include + +#include #include #include "vfpinstr.h" @@ -36,38 +38,55 @@ union vfp_state *last_VFP_context; */ unsigned int VFP_arch; -/* - * Per-thread VFP initialisation. - */ -void vfp_flush_thread(union vfp_state *vfp) +static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v) { - memset(vfp, 0, sizeof(union vfp_state)); + struct thread_info *thread = v; + union vfp_state *vfp = &thread->vfpstate; - vfp->hard.fpexc = FPEXC_ENABLE; - vfp->hard.fpscr = FPSCR_ROUND_NEAREST; + switch (cmd) { + case THREAD_NOTIFY_FLUSH: + /* + * Per-thread VFP initialisation. + */ + memset(vfp, 0, sizeof(union vfp_state)); - /* - * Disable VFP to ensure we initialise it first. - */ - fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_ENABLE); + vfp->hard.fpexc = FPEXC_ENABLE; + vfp->hard.fpscr = FPSCR_ROUND_NEAREST; - /* - * Ensure we don't try to overwrite our newly initialised - * state information on the first fault. - */ - if (last_VFP_context == vfp) - last_VFP_context = NULL; -} + /* + * Disable VFP to ensure we initialise it first. + */ + fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_ENABLE); -/* - * Per-thread VFP cleanup. - */ -void vfp_release_thread(union vfp_state *vfp) -{ - if (last_VFP_context == vfp) - last_VFP_context = NULL; + /* + * FALLTHROUGH: Ensure we don't try to overwrite our newly + * initialised state information on the first fault. + */ + + case THREAD_NOTIFY_RELEASE: + /* + * Per-thread VFP cleanup. + */ + if (last_VFP_context == vfp) + last_VFP_context = NULL; + break; + + case THREAD_NOTIFY_SWITCH: + /* + * Always disable VFP so we can lazily save/restore the + * old state. + */ + fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_ENABLE); + break; + } + + return NOTIFY_DONE; } +static struct notifier_block vfp_notifier_block = { + .notifier_call = vfp_notifier, +}; + /* * Raise a SIGFPE for the current process. * sicode describes the signal being raised. @@ -281,6 +300,8 @@ static int __init vfp_init(void) (vfpsid & FPSID_VARIANT_MASK) >> FPSID_VARIANT_BIT, (vfpsid & FPSID_REV_MASK) >> FPSID_REV_BIT); vfp_vector = vfp_support_entry; + + thread_register_notifier(&vfp_notifier_block); } return 0; } diff --git a/include/asm-arm/thread_notify.h b/include/asm-arm/thread_notify.h new file mode 100644 index 00000000000..8866e521684 --- /dev/null +++ b/include/asm-arm/thread_notify.h @@ -0,0 +1,48 @@ +/* + * linux/include/asm-arm/thread_notify.h + * + * Copyright (C) 2006 Russell King. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef ASMARM_THREAD_NOTIFY_H +#define ASMARM_THREAD_NOTIFY_H + +#ifdef __KERNEL__ + +#ifndef __ASSEMBLY__ + +#include +#include + +static inline int thread_register_notifier(struct notifier_block *n) +{ + extern struct atomic_notifier_head thread_notify_head; + return atomic_notifier_chain_register(&thread_notify_head, n); +} + +static inline void thread_unregister_notifier(struct notifier_block *n) +{ + extern struct atomic_notifier_head thread_notify_head; + atomic_notifier_chain_unregister(&thread_notify_head, n); +} + +static inline void thread_notify(unsigned long rc, struct thread_info *thread) +{ + extern struct atomic_notifier_head thread_notify_head; + atomic_notifier_call_chain(&thread_notify_head, rc, thread); +} + +#endif + +/* + * These are the reason codes for the thread notifier. + */ +#define THREAD_NOTIFY_FLUSH 0 +#define THREAD_NOTIFY_RELEASE 1 +#define THREAD_NOTIFY_SWITCH 2 + +#endif +#endif -- cgit v1.2.3-70-g09d2 From b741483d7d8d86d215daf2a1f77bc3d3770746a6 Mon Sep 17 00:00:00 2001 From: Vitaly Wool Date: Thu, 22 Jun 2006 10:26:21 +0100 Subject: [ARM] 3623/1: pnx4008: move GPIO-related defines to gpio.h Patch from Vitaly Wool This patch moves GPIO-related defines and static inline funcs from include/asm-arm/arch-pnx4008/pm.h to include/asm-arm/arch-pnx4008/gpio.h. Also, some more GPIO-related defines are added to include/asm-arm/arch-pnx4008/gpio.h as they are needed for the USB host driver (coming soon...) Signed-off-by: Vitaly Wool Signed-off-by: Russell King --- arch/arm/mach-pnx4008/serial.c | 2 +- include/asm-arm/arch-pnx4008/gpio.h | 102 ++++++++++++++++++++++++++++++++++++ include/asm-arm/arch-pnx4008/pm.h | 29 ---------- 3 files changed, 103 insertions(+), 30 deletions(-) (limited to 'include/asm-arm') diff --git a/arch/arm/mach-pnx4008/serial.c b/arch/arm/mach-pnx4008/serial.c index 10322384e45..95a1b3f964a 100644 --- a/arch/arm/mach-pnx4008/serial.c +++ b/arch/arm/mach-pnx4008/serial.c @@ -20,7 +20,7 @@ #include #include -#include +#include #include diff --git a/include/asm-arm/arch-pnx4008/gpio.h b/include/asm-arm/arch-pnx4008/gpio.h index 1fa5a77c301..d01bf83d55c 100644 --- a/include/asm-arm/arch-pnx4008/gpio.h +++ b/include/asm-arm/arch-pnx4008/gpio.h @@ -127,6 +127,79 @@ #define GPIO_ISOUT(K) ((GPIO_TYPE_MASK(K) == GPIO_OUT) && (GPIO_BIT(K) & GPIO_OUT_MASK)) #define GPIO_ISIN(K) ((GPIO_TYPE_MASK(K) == GPIO_IN) && (GPIO_BIT(K) & GPIO_IN_MASK)) +/* Start Enable Pin Interrupts - table 58 page 66 */ + +#define SE_PIN_BASE_INT 32 + +#define SE_U7_RX_INT 63 +#define SE_U7_HCTS_INT 62 +#define SE_BT_CLKREQ_INT 61 +#define SE_U6_IRRX_INT 60 +/*59 unused*/ +#define SE_U5_RX_INT 58 +#define SE_GPI_11_INT 57 +#define SE_U3_RX_INT 56 +#define SE_U2_HCTS_INT 55 +#define SE_U2_RX_INT 54 +#define SE_U1_RX_INT 53 +#define SE_DISP_SYNC_INT 52 +/*51 unused*/ +#define SE_SDIO_INT_N 50 +#define SE_MSDIO_START_INT 49 +#define SE_GPI_06_INT 48 +#define SE_GPI_05_INT 47 +#define SE_GPI_04_INT 46 +#define SE_GPI_03_INT 45 +#define SE_GPI_02_INT 44 +#define SE_GPI_01_INT 43 +#define SE_GPI_00_INT 42 +#define SE_SYSCLKEN_PIN_INT 41 +#define SE_SPI1_DATAIN_INT 40 +#define SE_GPI_07_INT 39 +#define SE_SPI2_DATAIN_INT 38 +#define SE_GPI_10_INT 37 +#define SE_GPI_09_INT 36 +#define SE_GPI_08_INT 35 +/*34-32 unused*/ + +/* Start Enable Internal Interrupts - table 57 page 65 */ + +#define SE_INT_BASE_INT 0 + +#define SE_TS_IRQ 31 +#define SE_TS_P_INT 30 +#define SE_TS_AUX_INT 29 +/*27-28 unused*/ +#define SE_USB_AHB_NEED_CLK_INT 26 +#define SE_MSTIMER_INT 25 +#define SE_RTC_INT 24 +#define SE_USB_NEED_CLK_INT 23 +#define SE_USB_INT 22 +#define SE_USB_I2C_INT 21 +#define SE_USB_OTG_TIMER_INT 20 +#define SE_USB_OTG_ATX_INT_N 19 +/*18 unused*/ +#define SE_DSP_GPIO4_INT 17 +#define SE_KEY_IRQ 16 +#define SE_DSP_SLAVEPORT_INT 15 +#define SE_DSP_GPIO1_INT 14 +#define SE_DSP_GPIO0_INT 13 +#define SE_DSP_AHB_INT 12 +/*11-6 unused*/ +#define SE_GPIO_05_INT 5 +#define SE_GPIO_04_INT 4 +#define SE_GPIO_03_INT 3 +#define SE_GPIO_02_INT 2 +#define SE_GPIO_01_INT 1 +#define SE_GPIO_00_INT 0 + +#define START_INT_REG_BIT(irq) (1<<((irq)&0x1F)) + +#define START_INT_ER_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x20 + (((irq)&(0x1<<5))>>1))) +#define START_INT_RSR_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x24 + (((irq)&(0x1<<5))>>1))) +#define START_INT_SR_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x28 + (((irq)&(0x1<<5))>>1))) +#define START_INT_APR_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x2C + (((irq)&(0x1<<5))>>1))) + extern int pnx4008_gpio_register_pin(unsigned short pin); extern int pnx4008_gpio_unregister_pin(unsigned short pin); extern unsigned long pnx4008_gpio_read_pin(unsigned short pin); @@ -136,4 +209,33 @@ extern int pnx4008_gpio_read_pin_direction(unsigned short pin); extern int pnx4008_gpio_set_pin_mux(unsigned short pin, int output); extern int pnx4008_gpio_read_pin_mux(unsigned short pin); +static inline void start_int_umask(u8 irq) +{ + __raw_writel(__raw_readl(START_INT_ER_REG(irq)) | + START_INT_REG_BIT(irq), START_INT_ER_REG(irq)); +} + +static inline void start_int_mask(u8 irq) +{ + __raw_writel(__raw_readl(START_INT_ER_REG(irq)) & + ~START_INT_REG_BIT(irq), START_INT_ER_REG(irq)); +} + +static inline void start_int_ack(u8 irq) +{ + __raw_writel(START_INT_REG_BIT(irq), START_INT_RSR_REG(irq)); +} + +static inline void start_int_set_falling_edge(u8 irq) +{ + __raw_writel(__raw_readl(START_INT_APR_REG(irq)) & + ~START_INT_REG_BIT(irq), START_INT_APR_REG(irq)); +} + +static inline void start_int_set_rising_edge(u8 irq) +{ + __raw_writel(__raw_readl(START_INT_APR_REG(irq)) | + START_INT_REG_BIT(irq), START_INT_APR_REG(irq)); +} + #endif /* _PNX4008_GPIO_H_ */ diff --git a/include/asm-arm/arch-pnx4008/pm.h b/include/asm-arm/arch-pnx4008/pm.h index c660486670f..bac1634cb3e 100644 --- a/include/asm-arm/arch-pnx4008/pm.h +++ b/include/asm-arm/arch-pnx4008/pm.h @@ -29,34 +29,5 @@ extern void pnx4008_cpu_standby(void); extern int pnx4008_startup_pll(struct clk *); extern int pnx4008_shutdown_pll(struct clk *); -static inline void start_int_umask(u8 irq) -{ - __raw_writel(__raw_readl(START_INT_ER_REG(irq)) | - START_INT_REG_BIT(irq), START_INT_ER_REG(irq)); -} - -static inline void start_int_mask(u8 irq) -{ - __raw_writel(__raw_readl(START_INT_ER_REG(irq)) & - ~START_INT_REG_BIT(irq), START_INT_ER_REG(irq)); -} - -static inline void start_int_ack(u8 irq) -{ - __raw_writel(START_INT_REG_BIT(irq), START_INT_RSR_REG(irq)); -} - -static inline void start_int_set_falling_edge(u8 irq) -{ - __raw_writel(__raw_readl(START_INT_APR_REG(irq)) & - ~START_INT_REG_BIT(irq), START_INT_APR_REG(irq)); -} - -static inline void start_int_set_rising_edge(u8 irq) -{ - __raw_writel(__raw_readl(START_INT_APR_REG(irq)) | - START_INT_REG_BIT(irq), START_INT_APR_REG(irq)); -} - #endif /* ASSEMBLER */ #endif /* __ASM_ARCH_PNX4008_PM_H */ -- cgit v1.2.3-70-g09d2 From ae2a120ce50e9dc8092f9bd4d76d8c8150a12c48 Mon Sep 17 00:00:00 2001 From: Vitaly Wool Date: Thu, 22 Jun 2006 10:27:15 +0100 Subject: [ARM] 3621/1: fix compilation breakage for pnx4008 Patch from Vitaly Wool pnx4008_defconfig fails to build: include/asm/hardware/debug-8250.S: Assembler messages: include/asm/hardware/debug-8250.S:12: Error: Macro with this name was already defined. This is due to senduart macro erroneously defined in include/asm-arm/arch-pnx4008/debug-macro.S. This patch removes it from that file. Signed-off-by: Vitaly Wool Signed-off-by: Russell King --- include/asm-arm/arch-pnx4008/debug-macro.S | 4 ---- 1 file changed, 4 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-pnx4008/debug-macro.S b/include/asm-arm/arch-pnx4008/debug-macro.S index eb3839de389..67d18a203d2 100644 --- a/include/asm-arm/arch-pnx4008/debug-macro.S +++ b/include/asm-arm/arch-pnx4008/debug-macro.S @@ -19,9 +19,5 @@ addne \rx, \rx, #0xf4000000 .endm - .macro senduart,rd,rx - strb \rd, [\rx, #0x0] - .endm - #define UART_SHIFT 2 #include -- cgit v1.2.3-70-g09d2 From 8b76a68c6caafef5a91cdc80958aecaca76a8896 Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Thu, 22 Jun 2006 10:30:56 +0100 Subject: [ARM] 3620/2: ixp23xx: add uengine loader support Patch from Lennert Buytenhek This patch allows the ixp2000 uengine loader that is already in the tree to also be used on the ixp23xx. Signed-off-by: Lennert Buytenhek Signed-off-by: Russell King --- arch/arm/common/Makefile | 1 + arch/arm/common/uengine.c | 58 +++++++++++++++++++++++++++------ arch/arm/mach-ixp23xx/core.c | 1 + include/asm-arm/arch-ixp23xx/ixp23xx.h | 3 ++ include/asm-arm/arch-ixp23xx/platform.h | 15 +++++++++ 5 files changed, 68 insertions(+), 10 deletions(-) (limited to 'include/asm-arm') diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile index 847e3e6356c..e1289a256ce 100644 --- a/arch/arm/common/Makefile +++ b/arch/arm/common/Makefile @@ -16,3 +16,4 @@ obj-$(CONFIG_SHARP_PARAM) += sharpsl_param.o obj-$(CONFIG_SHARPSL_PM) += sharpsl_pm.o obj-$(CONFIG_SHARP_SCOOP) += scoop.o obj-$(CONFIG_ARCH_IXP2000) += uengine.o +obj-$(CONFIG_ARCH_IXP23XX) += uengine.o diff --git a/arch/arm/common/uengine.c b/arch/arm/common/uengine.c index a1310b71004..dfca596a9a2 100644 --- a/arch/arm/common/uengine.c +++ b/arch/arm/common/uengine.c @@ -18,10 +18,26 @@ #include #include #include -#include +#include #include #include +#if defined(CONFIG_ARCH_IXP2000) +#define IXP_UENGINE_CSR_VIRT_BASE IXP2000_UENGINE_CSR_VIRT_BASE +#define IXP_PRODUCT_ID IXP2000_PRODUCT_ID +#define IXP_MISC_CONTROL IXP2000_MISC_CONTROL +#define IXP_RESET1 IXP2000_RESET1 +#else +#if defined(CONFIG_ARCH_IXP23XX) +#define IXP_UENGINE_CSR_VIRT_BASE IXP23XX_UENGINE_CSR_VIRT_BASE +#define IXP_PRODUCT_ID IXP23XX_PRODUCT_ID +#define IXP_MISC_CONTROL IXP23XX_MISC_CONTROL +#define IXP_RESET1 IXP23XX_RESET1 +#else +#error unknown platform +#endif +#endif + #define USTORE_ADDRESS 0x000 #define USTORE_DATA_LOWER 0x004 #define USTORE_DATA_UPPER 0x008 @@ -43,7 +59,7 @@ u32 ixp2000_uengine_mask; static void *ixp2000_uengine_csr_area(int uengine) { - return ((void *)IXP2000_UENGINE_CSR_VIRT_BASE) + (uengine << 10); + return ((void *)IXP_UENGINE_CSR_VIRT_BASE) + (uengine << 10); } /* @@ -91,8 +107,13 @@ EXPORT_SYMBOL(ixp2000_uengine_csr_write); void ixp2000_uengine_reset(u32 uengine_mask) { - ixp2000_reg_wrb(IXP2000_RESET1, uengine_mask & ixp2000_uengine_mask); - ixp2000_reg_wrb(IXP2000_RESET1, 0); + u32 value; + + value = ixp2000_reg_read(IXP_RESET1) & ~ixp2000_uengine_mask; + + uengine_mask &= ixp2000_uengine_mask; + ixp2000_reg_wrb(IXP_RESET1, value | uengine_mask); + ixp2000_reg_wrb(IXP_RESET1, value); } EXPORT_SYMBOL(ixp2000_uengine_reset); @@ -235,11 +256,12 @@ static int check_ixp_type(struct ixp2000_uengine_code *c) u32 product_id; u32 rev; - product_id = ixp2000_reg_read(IXP2000_PRODUCT_ID); + product_id = ixp2000_reg_read(IXP_PRODUCT_ID); if (((product_id >> 16) & 0x1f) != 0) return 0; switch ((product_id >> 8) & 0xff) { +#ifdef CONFIG_ARCH_IXP2000 case 0: /* IXP2800 */ if (!(c->cpu_model_bitmask & 4)) return 0; @@ -254,6 +276,14 @@ static int check_ixp_type(struct ixp2000_uengine_code *c) if (!(c->cpu_model_bitmask & 2)) return 0; break; +#endif + +#ifdef CONFIG_ARCH_IXP23XX + case 4: /* IXP23xx */ + if (!(c->cpu_model_bitmask & 0x3f0)) + return 0; + break; +#endif default: return 0; @@ -432,7 +462,8 @@ static int __init ixp2000_uengine_init(void) /* * Determine number of microengines present. */ - switch ((ixp2000_reg_read(IXP2000_PRODUCT_ID) >> 8) & 0x1fff) { + switch ((ixp2000_reg_read(IXP_PRODUCT_ID) >> 8) & 0x1fff) { +#ifdef CONFIG_ARCH_IXP2000 case 0: /* IXP2800 */ case 1: /* IXP2850 */ ixp2000_uengine_mask = 0x00ff00ff; @@ -441,10 +472,17 @@ static int __init ixp2000_uengine_init(void) case 2: /* IXP2400 */ ixp2000_uengine_mask = 0x000f000f; break; +#endif + +#ifdef CONFIG_ARCH_IXP23XX + case 4: /* IXP23xx */ + ixp2000_uengine_mask = (*IXP23XX_EXP_CFG_FUSE >> 8) & 0xf; + break; +#endif default: printk(KERN_INFO "Detected unknown IXP2000 model (%.8x)\n", - (unsigned int)ixp2000_reg_read(IXP2000_PRODUCT_ID)); + (unsigned int)ixp2000_reg_read(IXP_PRODUCT_ID)); ixp2000_uengine_mask = 0x00000000; break; } @@ -457,15 +495,15 @@ static int __init ixp2000_uengine_init(void) /* * Synchronise timestamp counters across all microengines. */ - value = ixp2000_reg_read(IXP2000_MISC_CONTROL); - ixp2000_reg_wrb(IXP2000_MISC_CONTROL, value & ~0x80); + value = ixp2000_reg_read(IXP_MISC_CONTROL); + ixp2000_reg_wrb(IXP_MISC_CONTROL, value & ~0x80); for (uengine = 0; uengine < 32; uengine++) { if (ixp2000_uengine_mask & (1 << uengine)) { ixp2000_uengine_csr_write(uengine, TIMESTAMP_LOW, 0); ixp2000_uengine_csr_write(uengine, TIMESTAMP_HIGH, 0); } } - ixp2000_reg_wrb(IXP2000_MISC_CONTROL, value | 0x80); + ixp2000_reg_wrb(IXP_MISC_CONTROL, value | 0x80); return 0; } diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c index e2aad734080..051e3d70026 100644 --- a/arch/arm/mach-ixp23xx/core.c +++ b/arch/arm/mach-ixp23xx/core.c @@ -439,5 +439,6 @@ static struct platform_device *ixp23xx_devices[] __initdata = { void __init ixp23xx_sys_init(void) { + *IXP23XX_EXP_UNIT_FUSE |= 0xf; platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices)); } diff --git a/include/asm-arm/arch-ixp23xx/ixp23xx.h b/include/asm-arm/arch-ixp23xx/ixp23xx.h index 01efdbd1180..d0a72201ee9 100644 --- a/include/asm-arm/arch-ixp23xx/ixp23xx.h +++ b/include/asm-arm/arch-ixp23xx/ixp23xx.h @@ -124,6 +124,7 @@ #define IXP23XX_EXP_UNIT_FUSE IXP23XX_EXP_CFG_REG(0x28) #define IXP23XX_EXP_MSF_MUX IXP23XX_EXP_CFG_REG(0x30) +#define IXP23XX_EXP_CFG_FUSE IXP23XX_EXP_CFG_REG(0x34) #define IXP23XX_EXP_BUS_PHYS 0x90000000 #define IXP23XX_EXP_BUS_WINDOW_SIZE 0x01000000 @@ -265,6 +266,8 @@ #define IXP23XX_PCI_UNIT_RESET (1 << 1) #define IXP23XX_XSCALE_RESET (1 << 0) +#define IXP23XX_UENGINE_CSR_VIRT_BASE (IXP23XX_CAP_CSR_VIRT + 0x18000) + /**************************************************************************** * PCI CSRs. diff --git a/include/asm-arm/arch-ixp23xx/platform.h b/include/asm-arm/arch-ixp23xx/platform.h index e4d99060a04..19a73b39c86 100644 --- a/include/asm-arm/arch-ixp23xx/platform.h +++ b/include/asm-arm/arch-ixp23xx/platform.h @@ -14,6 +14,21 @@ #ifndef __ASSEMBLY__ +extern inline unsigned long ixp2000_reg_read(volatile void *reg) +{ + return *((volatile unsigned long *)reg); +} + +extern inline void ixp2000_reg_write(volatile void *reg, unsigned long val) +{ + *((volatile unsigned long *)reg) = val; +} + +extern inline void ixp2000_reg_wrb(volatile void *reg, unsigned long val) +{ + *((volatile unsigned long *)reg) = val; +} + struct pci_sys_data; void ixp23xx_map_io(void); -- cgit v1.2.3-70-g09d2 From fa3e686a34f4c33de31a128cc36def0b466bfe1a Mon Sep 17 00:00:00 2001 From: Pavel Pisa Date: Thu, 22 Jun 2006 22:21:03 +0100 Subject: [ARM] 3601/1: i.MX/MX1 DMA error handling for signaled channels only Patch from Pavel Pisa There has been bug, that dma_err_handler() touches even channels not signaling error condition. Problem noticed by Andrea Paterniani. Signed-off-by: Pavel Pisa Signed-off-by: Russell King --- arch/arm/mach-imx/dma.c | 65 +++++++++++++++++++++++--------------- include/asm-arm/arch-imx/imx-dma.h | 8 +++-- 2 files changed, 45 insertions(+), 28 deletions(-) (limited to 'include/asm-arm') diff --git a/arch/arm/mach-imx/dma.c b/arch/arm/mach-imx/dma.c index 4ca51dcf13a..36578871ecc 100644 --- a/arch/arm/mach-imx/dma.c +++ b/arch/arm/mach-imx/dma.c @@ -15,6 +15,9 @@ * Changed to support scatter gather DMA * by taking Russell's code from RiscPC * + * 2006-05-31 Pavel Pisa + * Corrected error handling code. + * */ #undef DEBUG @@ -277,7 +280,7 @@ imx_dma_setup_sg(imx_dmach_t dma_ch, int imx_dma_setup_handlers(imx_dmach_t dma_ch, void (*irq_handler) (int, void *, struct pt_regs *), - void (*err_handler) (int, void *, struct pt_regs *), + void (*err_handler) (int, void *, struct pt_regs *, int), void *data) { struct imx_dma_channel *imxdma = &imx_dma_channels[dma_ch]; @@ -463,43 +466,53 @@ static irqreturn_t dma_err_handler(int irq, void *dev_id, struct pt_regs *regs) int i, disr = DISR; struct imx_dma_channel *channel; unsigned int err_mask = DBTOSR | DRTOSR | DSESR | DBOSR; + int errcode; - DISR = disr; + DISR = disr & err_mask; for (i = 0; i < IMX_DMA_CHANNELS; i++) { - channel = &imx_dma_channels[i]; - - if ((err_mask & 1 << i) && channel->name - && channel->err_handler) { - channel->err_handler(i, channel->data, regs); + if(!(err_mask & (1 << i))) continue; - } - - imx_dma_channels[i].sg = NULL; + channel = &imx_dma_channels[i]; + errcode = 0; if (DBTOSR & (1 << i)) { - printk(KERN_WARNING - "Burst timeout on channel %d (%s)\n", - i, channel->name); - DBTOSR |= (1 << i); + DBTOSR = (1 << i); + errcode |= IMX_DMA_ERR_BURST; } if (DRTOSR & (1 << i)) { - printk(KERN_WARNING - "Request timeout on channel %d (%s)\n", - i, channel->name); - DRTOSR |= (1 << i); + DRTOSR = (1 << i); + errcode |= IMX_DMA_ERR_REQUEST; } if (DSESR & (1 << i)) { - printk(KERN_WARNING - "Transfer timeout on channel %d (%s)\n", - i, channel->name); - DSESR |= (1 << i); + DSESR = (1 << i); + errcode |= IMX_DMA_ERR_TRANSFER; } if (DBOSR & (1 << i)) { - printk(KERN_WARNING - "Buffer overflow timeout on channel %d (%s)\n", - i, channel->name); - DBOSR |= (1 << i); + DBOSR = (1 << i); + errcode |= IMX_DMA_ERR_BUFFER; } + + /* + * The cleaning of @sg field would be questionable + * there, because its value can help to compute + * remaining/transfered bytes count in the handler + */ + /*imx_dma_channels[i].sg = NULL;*/ + + if (channel->name && channel->err_handler) { + channel->err_handler(i, channel->data, regs, errcode); + continue; + } + + imx_dma_channels[i].sg = NULL; + + printk(KERN_WARNING + "DMA timeout on channel %d (%s) -%s%s%s%s\n", + i, channel->name, + errcode&IMX_DMA_ERR_BURST? " burst":"", + errcode&IMX_DMA_ERR_REQUEST? " request":"", + errcode&IMX_DMA_ERR_TRANSFER? " transfer":"", + errcode&IMX_DMA_ERR_BUFFER? " buffer":""); } return IRQ_HANDLED; } diff --git a/include/asm-arm/arch-imx/imx-dma.h b/include/asm-arm/arch-imx/imx-dma.h index f2063c1d610..599f03e5a9e 100644 --- a/include/asm-arm/arch-imx/imx-dma.h +++ b/include/asm-arm/arch-imx/imx-dma.h @@ -46,7 +46,7 @@ struct imx_dma_channel { const char *name; void (*irq_handler) (int, void *, struct pt_regs *); - void (*err_handler) (int, void *, struct pt_regs *); + void (*err_handler) (int, void *, struct pt_regs *, int errcode); void *data; dmamode_t dma_mode; struct scatterlist *sg; @@ -58,6 +58,10 @@ struct imx_dma_channel { extern struct imx_dma_channel imx_dma_channels[IMX_DMA_CHANNELS]; +#define IMX_DMA_ERR_BURST 1 +#define IMX_DMA_ERR_REQUEST 2 +#define IMX_DMA_ERR_TRANSFER 4 +#define IMX_DMA_ERR_BUFFER 8 /* The type to distinguish channel numbers parameter from ordinal int type */ typedef int imx_dmach_t; @@ -74,7 +78,7 @@ imx_dma_setup_sg(imx_dmach_t dma_ch, int imx_dma_setup_handlers(imx_dmach_t dma_ch, void (*irq_handler) (int, void *, struct pt_regs *), - void (*err_handler) (int, void *, struct pt_regs *), void *data); + void (*err_handler) (int, void *, struct pt_regs *, int), void *data); void imx_dma_enable(imx_dmach_t dma_ch); -- cgit v1.2.3-70-g09d2 From 02916526133aebc0b3b6c486d1b0af95221033bd Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Thu, 22 Jun 2006 22:57:54 +0100 Subject: [ARM] 3629/1: S3C24XX: fix missing bracket in regs-dsc.h Patch from Ben Dooks Fix missing bracket in include/asm-arm/arch-s3c2410/regs-dsc.h Signed-off-by: Ben Dooks Signed-off-by: Russell King --- include/asm-arm/arch-s3c2410/regs-dsc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-s3c2410/regs-dsc.h b/include/asm-arm/arch-s3c2410/regs-dsc.h index a023b0434ef..ba13a2c9e54 100644 --- a/include/asm-arm/arch-s3c2410/regs-dsc.h +++ b/include/asm-arm/arch-s3c2410/regs-dsc.h @@ -170,7 +170,7 @@ #define S3C2440_DSC1_CS1_4mA (3<<2) #define S3C2440_DSC1_CS1_MASK (3<<2) -#define S3C2440_DSC1_CS0 (S3C2440_SELECT_DSC1 | 0 +#define S3C2440_DSC1_CS0 (S3C2440_SELECT_DSC1 | 0) #define S3C2440_DSC1_CS0_10mA (0<<0) #define S3C2440_DSC1_CS0_8mA (1<<0) #define S3C2440_DSC1_CS0_6mA (2<<0) -- cgit v1.2.3-70-g09d2 From 4f1bcaf094ccc512c23e10104c05a6f8e5b7a9e4 Mon Sep 17 00:00:00 2001 From: Bjorn Helgaas Date: Thu, 22 Jun 2006 14:47:32 -0700 Subject: [PATCH] vgacon: make VGA_MAP_MEM take size, remove extra use VGA_MAP_MEM translates to ioremap() on some architectures. It makes sense to do this to vga_vram_base, because we're going to access memory between vga_vram_base and vga_vram_end. But it doesn't really make sense to map starting at vga_vram_end, because we aren't going to access memory starting there. On ia64, which always has to be different, ioremapping vga_vram_end gives you something completely incompatible with ioremapped vga_vram_start, so vga_vram_size ends up being nonsense. As a bonus, we often know the size up front, so we can use ioremap() correctly, rather than giving it a zero size. Signed-off-by: Bjorn Helgaas Cc: "Antonino A. Daplas" Cc: "Luck, Tony" Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/console/mdacon.c | 2 +- drivers/video/console/vgacon.c | 19 +++++++++---------- drivers/video/vga16fb.c | 2 +- include/asm-alpha/vga.h | 2 +- include/asm-arm/vga.h | 2 +- include/asm-i386/vga.h | 2 +- include/asm-ia64/vga.h | 2 +- include/asm-m32r/vga.h | 2 +- include/asm-mips/vga.h | 2 +- include/asm-powerpc/vga.h | 4 ++-- include/asm-sparc64/vga.h | 2 +- include/asm-x86_64/vga.h | 2 +- include/asm-xtensa/vga.h | 2 +- 13 files changed, 22 insertions(+), 23 deletions(-) (limited to 'include/asm-arm') diff --git a/drivers/video/console/mdacon.c b/drivers/video/console/mdacon.c index 989e4d49e5b..7f939d066a5 100644 --- a/drivers/video/console/mdacon.c +++ b/drivers/video/console/mdacon.c @@ -313,8 +313,8 @@ static const char __init *mdacon_startup(void) mda_num_columns = 80; mda_num_lines = 25; - mda_vram_base = VGA_MAP_MEM(0xb0000); mda_vram_len = 0x01000; + mda_vram_base = VGA_MAP_MEM(0xb0000, mda_vram_len); mda_index_port = 0x3b4; mda_value_port = 0x3b5; diff --git a/drivers/video/console/vgacon.c b/drivers/video/console/vgacon.c index d5a04b68c4d..e64d42e2449 100644 --- a/drivers/video/console/vgacon.c +++ b/drivers/video/console/vgacon.c @@ -391,7 +391,7 @@ static const char __init *vgacon_startup(void) static struct resource ega_console_resource = { "ega", 0x3B0, 0x3BF }; vga_video_type = VIDEO_TYPE_EGAM; - vga_vram_end = 0xb8000; + vga_vram_size = 0x8000; display_desc = "EGA+"; request_resource(&ioport_resource, &ega_console_resource); @@ -401,7 +401,7 @@ static const char __init *vgacon_startup(void) static struct resource mda2_console_resource = { "mda", 0x3BF, 0x3BF }; vga_video_type = VIDEO_TYPE_MDA; - vga_vram_end = 0xb2000; + vga_vram_size = 0x2000; display_desc = "*MDA"; request_resource(&ioport_resource, &mda1_console_resource); @@ -418,7 +418,7 @@ static const char __init *vgacon_startup(void) if ((ORIG_VIDEO_EGA_BX & 0xff) != 0x10) { int i; - vga_vram_end = 0xc0000; + vga_vram_size = 0x8000; if (!ORIG_VIDEO_ISVGA) { static struct resource ega_console_resource @@ -443,7 +443,7 @@ static const char __init *vgacon_startup(void) * and COE=1 isn't necessarily a good idea) */ vga_vram_base = 0xa0000; - vga_vram_end = 0xb0000; + vga_vram_size = 0x10000; outb_p(6, VGA_GFX_I); outb_p(6, VGA_GFX_D); #endif @@ -475,7 +475,7 @@ static const char __init *vgacon_startup(void) static struct resource cga_console_resource = { "cga", 0x3D4, 0x3D5 }; vga_video_type = VIDEO_TYPE_CGA; - vga_vram_end = 0xba000; + vga_vram_size = 0x2000; display_desc = "*CGA"; request_resource(&ioport_resource, &cga_console_resource); @@ -483,9 +483,8 @@ static const char __init *vgacon_startup(void) } } - vga_vram_base = VGA_MAP_MEM(vga_vram_base); - vga_vram_end = VGA_MAP_MEM(vga_vram_end); - vga_vram_size = vga_vram_end - vga_vram_base; + vga_vram_base = VGA_MAP_MEM(vga_vram_base, vga_vram_size); + vga_vram_end = vga_vram_base + vga_vram_size; /* * Find out if there is a graphics card present. @@ -1020,14 +1019,14 @@ static int vgacon_do_font_op(struct vgastate *state,char *arg,int set,int ch512) char *charmap; if (vga_video_type != VIDEO_TYPE_EGAM) { - charmap = (char *) VGA_MAP_MEM(colourmap); + charmap = (char *) VGA_MAP_MEM(colourmap, 0); beg = 0x0e; #ifdef VGA_CAN_DO_64KB if (vga_video_type == VIDEO_TYPE_VGAC) beg = 0x06; #endif } else { - charmap = (char *) VGA_MAP_MEM(blackwmap); + charmap = (char *) VGA_MAP_MEM(blackwmap, 0); beg = 0x0a; } diff --git a/drivers/video/vga16fb.c b/drivers/video/vga16fb.c index f3f16fd9f23..4fd2a272e03 100644 --- a/drivers/video/vga16fb.c +++ b/drivers/video/vga16fb.c @@ -1351,7 +1351,7 @@ static int __init vga16fb_probe(struct device *device) } /* XXX share VGA_FB_PHYS and I/O region with vgacon and others */ - info->screen_base = (void __iomem *)VGA_MAP_MEM(VGA_FB_PHYS); + info->screen_base = (void __iomem *)VGA_MAP_MEM(VGA_FB_PHYS, 0); if (!info->screen_base) { printk(KERN_ERR "vga16fb: unable to map device\n"); diff --git a/include/asm-alpha/vga.h b/include/asm-alpha/vga.h index 8ca4f6b2da1..ed06f59b544 100644 --- a/include/asm-alpha/vga.h +++ b/include/asm-alpha/vga.h @@ -46,6 +46,6 @@ extern void scr_memcpyw(u16 *d, const u16 *s, unsigned int count); #define vga_readb(a) readb((u8 __iomem *)(a)) #define vga_writeb(v,a) writeb(v, (u8 __iomem *)(a)) -#define VGA_MAP_MEM(x) ((unsigned long) ioremap(x, 0)) +#define VGA_MAP_MEM(x,s) ((unsigned long) ioremap(x, s)) #endif diff --git a/include/asm-arm/vga.h b/include/asm-arm/vga.h index 926e5ee128e..1e0b913c3d7 100644 --- a/include/asm-arm/vga.h +++ b/include/asm-arm/vga.h @@ -4,7 +4,7 @@ #include #include -#define VGA_MAP_MEM(x) (PCIMEM_BASE + (x)) +#define VGA_MAP_MEM(x,s) (PCIMEM_BASE + (x)) #define vga_readb(x) (*((volatile unsigned char *)x)) #define vga_writeb(x,y) (*((volatile unsigned char *)y) = (x)) diff --git a/include/asm-i386/vga.h b/include/asm-i386/vga.h index ef0c0e50cc9..0ecf68ac03a 100644 --- a/include/asm-i386/vga.h +++ b/include/asm-i386/vga.h @@ -12,7 +12,7 @@ * access the videoram directly without any black magic. */ -#define VGA_MAP_MEM(x) (unsigned long)phys_to_virt(x) +#define VGA_MAP_MEM(x,s) (unsigned long)phys_to_virt(x) #define vga_readb(x) (*(x)) #define vga_writeb(x,y) (*(y) = (x)) diff --git a/include/asm-ia64/vga.h b/include/asm-ia64/vga.h index 091177cda22..02184ecd820 100644 --- a/include/asm-ia64/vga.h +++ b/include/asm-ia64/vga.h @@ -17,7 +17,7 @@ extern unsigned long vga_console_iobase; extern unsigned long vga_console_membase; -#define VGA_MAP_MEM(x) ((unsigned long) ioremap_nocache(vga_console_membase + (x), 0)) +#define VGA_MAP_MEM(x,s) ((unsigned long) ioremap_nocache(vga_console_membase + (x), s)) #define vga_readb(x) (*(x)) #define vga_writeb(x,y) (*(y) = (x)) diff --git a/include/asm-m32r/vga.h b/include/asm-m32r/vga.h index d0f4b6eed7a..533163447cc 100644 --- a/include/asm-m32r/vga.h +++ b/include/asm-m32r/vga.h @@ -14,7 +14,7 @@ * access the videoram directly without any black magic. */ -#define VGA_MAP_MEM(x) (unsigned long)phys_to_virt(x) +#define VGA_MAP_MEM(x,s) (unsigned long)phys_to_virt(x) #define vga_readb(x) (*(x)) #define vga_writeb(x,y) (*(y) = (x)) diff --git a/include/asm-mips/vga.h b/include/asm-mips/vga.h index 34755c0a639..c1dd0b10bc2 100644 --- a/include/asm-mips/vga.h +++ b/include/asm-mips/vga.h @@ -13,7 +13,7 @@ * access the videoram directly without any black magic. */ -#define VGA_MAP_MEM(x) (0xb0000000L + (unsigned long)(x)) +#define VGA_MAP_MEM(x,s) (0xb0000000L + (unsigned long)(x)) #define vga_readb(x) (*(x)) #define vga_writeb(x,y) (*(y) = (x)) diff --git a/include/asm-powerpc/vga.h b/include/asm-powerpc/vga.h index eadaf2f3d03..a2eac409c1e 100644 --- a/include/asm-powerpc/vga.h +++ b/include/asm-powerpc/vga.h @@ -41,9 +41,9 @@ static inline u16 scr_readw(volatile const u16 *addr) extern unsigned long vgacon_remap_base; #ifdef __powerpc64__ -#define VGA_MAP_MEM(x) ((unsigned long) ioremap((x), 0)) +#define VGA_MAP_MEM(x,s) ((unsigned long) ioremap((x), s)) #else -#define VGA_MAP_MEM(x) (x + vgacon_remap_base) +#define VGA_MAP_MEM(x,s) (x + vgacon_remap_base) #endif #define vga_readb(x) (*(x)) diff --git a/include/asm-sparc64/vga.h b/include/asm-sparc64/vga.h index 9c57eb363b4..c69d5b2ba19 100644 --- a/include/asm-sparc64/vga.h +++ b/include/asm-sparc64/vga.h @@ -28,6 +28,6 @@ static inline u16 scr_readw(const u16 *addr) return *addr; } -#define VGA_MAP_MEM(x) (x) +#define VGA_MAP_MEM(x,s) (x) #endif diff --git a/include/asm-x86_64/vga.h b/include/asm-x86_64/vga.h index ef0c0e50cc9..0ecf68ac03a 100644 --- a/include/asm-x86_64/vga.h +++ b/include/asm-x86_64/vga.h @@ -12,7 +12,7 @@ * access the videoram directly without any black magic. */ -#define VGA_MAP_MEM(x) (unsigned long)phys_to_virt(x) +#define VGA_MAP_MEM(x,s) (unsigned long)phys_to_virt(x) #define vga_readb(x) (*(x)) #define vga_writeb(x,y) (*(y) = (x)) diff --git a/include/asm-xtensa/vga.h b/include/asm-xtensa/vga.h index 23d82f6acb5..1fd8cab3a29 100644 --- a/include/asm-xtensa/vga.h +++ b/include/asm-xtensa/vga.h @@ -11,7 +11,7 @@ #ifndef _XTENSA_VGA_H #define _XTENSA_VGA_H -#define VGA_MAP_MEM(x) (unsigned long)phys_to_virt(x) +#define VGA_MAP_MEM(x,s) (unsigned long)phys_to_virt(x) #define vga_readb(x) (*(x)) #define vga_writeb(x,y) (*(y) = (x)) -- cgit v1.2.3-70-g09d2 From 92aa674d721d089c440301ab95cb6be19c78727e Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Thu, 22 Jun 2006 07:11:13 +0200 Subject: [PATCH] network driver for Hilscher netx This is a patch for the Hilscher netx builtin ethernet ports. The netx board support was merged into 2.6.17-git2. The netx is a arm926 based SoC. Signed-off-by: Robert Schwebel Signed-off-by: Sascha Hauer -- drivers/net/Kconfig | 11 drivers/net/Makefile | 1 drivers/net/netx-eth.c | 516 ++++++++++++++++++++++++++++++++++++++++ include/asm-arm/arch-netx/eth.h | 27 ++ 4 files changed, 555 insertions(+) Signed-off-by: Jeff Garzik --- drivers/net/Kconfig | 11 + drivers/net/Makefile | 1 + drivers/net/netx-eth.c | 516 ++++++++++++++++++++++++++++++++++++++++ include/asm-arm/arch-netx/eth.h | 27 +++ 4 files changed, 555 insertions(+) create mode 100644 drivers/net/netx-eth.c create mode 100644 include/asm-arm/arch-netx/eth.h (limited to 'include/asm-arm') diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 67e812642c8..7fa24c51e40 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -854,6 +854,17 @@ config SMC9194 . The module will be called smc9194. +config NET_NETX + tristate "NetX Ethernet support" + select MII + depends on NET_ETHERNET && ARCH_NETX + help + This is support for the Hilscher netX builtin Ethernet ports + + To compile this driver as a module, choose M here and read + . The module + will be called netx-eth. + config DM9000 tristate "DM9000 support" depends on (ARM || MIPS) && NET_ETHERNET diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 1eced328750..c91e95126f7 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -187,6 +187,7 @@ obj-$(CONFIG_MACSONIC) += macsonic.o obj-$(CONFIG_MACMACE) += macmace.o obj-$(CONFIG_MAC89x0) += mac89x0.o obj-$(CONFIG_TUN) += tun.o +obj-$(CONFIG_NET_NETX) += netx-eth.o obj-$(CONFIG_DL2K) += dl2k.o obj-$(CONFIG_R8169) += r8169.o obj-$(CONFIG_AMD8111_ETH) += amd8111e.o diff --git a/drivers/net/netx-eth.c b/drivers/net/netx-eth.c new file mode 100644 index 00000000000..b92430c4e3a --- /dev/null +++ b/drivers/net/netx-eth.c @@ -0,0 +1,516 @@ +/* + * drivers/net/netx-eth.c + * + * Copyright (c) 2005 Sascha Hauer , Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +/* XC Fifo Offsets */ +#define EMPTY_PTR_FIFO(xcno) (0 + ((xcno) << 3)) /* Index of the empty pointer FIFO */ +#define IND_FIFO_PORT_HI(xcno) (1 + ((xcno) << 3)) /* Index of the FIFO where received */ + /* Data packages are indicated by XC */ +#define IND_FIFO_PORT_LO(xcno) (2 + ((xcno) << 3)) /* Index of the FIFO where received */ + /* Data packages are indicated by XC */ +#define REQ_FIFO_PORT_HI(xcno) (3 + ((xcno) << 3)) /* Index of the FIFO where Data packages */ + /* have to be indicated by ARM which */ + /* shall be sent */ +#define REQ_FIFO_PORT_LO(xcno) (4 + ((xcno) << 3)) /* Index of the FIFO where Data packages */ + /* have to be indicated by ARM which shall */ + /* be sent */ +#define CON_FIFO_PORT_HI(xcno) (5 + ((xcno) << 3)) /* Index of the FIFO where sent Data packages */ + /* are confirmed */ +#define CON_FIFO_PORT_LO(xcno) (6 + ((xcno) << 3)) /* Index of the FIFO where sent Data */ + /* packages are confirmed */ +#define PFIFO_MASK(xcno) (0x7f << (xcno*8)) + +#define FIFO_PTR_FRAMELEN_SHIFT 0 +#define FIFO_PTR_FRAMELEN_MASK (0x7ff << 0) +#define FIFO_PTR_FRAMELEN(len) (((len) << 0) & FIFO_PTR_FRAMELEN_MASK) +#define FIFO_PTR_TIMETRIG (1<<11) +#define FIFO_PTR_MULTI_REQ +#define FIFO_PTR_ORIGIN (1<<14) +#define FIFO_PTR_VLAN (1<<15) +#define FIFO_PTR_FRAMENO_SHIFT 16 +#define FIFO_PTR_FRAMENO_MASK (0x3f << 16) +#define FIFO_PTR_FRAMENO(no) (((no) << 16) & FIFO_PTR_FRAMENO_MASK) +#define FIFO_PTR_SEGMENT_SHIFT 22 +#define FIFO_PTR_SEGMENT_MASK (0xf << 22) +#define FIFO_PTR_SEGMENT(seg) (((seg) & 0xf) << 22) +#define FIFO_PTR_ERROR_SHIFT 28 +#define FIFO_PTR_ERROR_MASK (0xf << 28) + +#define ISR_LINK_STATUS_CHANGE (1<<4) +#define ISR_IND_LO (1<<3) +#define ISR_CON_LO (1<<2) +#define ISR_IND_HI (1<<1) +#define ISR_CON_HI (1<<0) + +#define ETH_MAC_LOCAL_CONFIG 0x1560 +#define ETH_MAC_4321 0x1564 +#define ETH_MAC_65 0x1568 + +#define MAC_TRAFFIC_CLASS_ARRANGEMENT_SHIFT 16 +#define MAC_TRAFFIC_CLASS_ARRANGEMENT_MASK (0xf<data; + unsigned int len = skb->len; + + spin_lock_irq(&priv->lock); + memcpy_toio(priv->sram_base + 1560, (void *)buf, len); + if (len < 60) { + memset_io(priv->sram_base + 1560 + len, 0, 60 - len); + len = 60; + } + + pfifo_push(REQ_FIFO_PORT_LO(priv->id), + FIFO_PTR_SEGMENT(priv->id) | + FIFO_PTR_FRAMENO(1) | + FIFO_PTR_FRAMELEN(len)); + + ndev->trans_start = jiffies; + priv->stats.tx_packets++; + priv->stats.tx_bytes += skb->len; + + netif_stop_queue(ndev); + spin_unlock_irq(&priv->lock); + dev_kfree_skb(skb); + + return 0; +} + +static void netx_eth_receive(struct net_device *ndev) +{ + struct netx_eth_priv *priv = netdev_priv(ndev); + unsigned int val, frameno, seg, len; + unsigned char *data; + struct sk_buff *skb; + + val = pfifo_pop(IND_FIFO_PORT_LO(priv->id)); + + frameno = (val & FIFO_PTR_FRAMENO_MASK) >> FIFO_PTR_FRAMENO_SHIFT; + seg = (val & FIFO_PTR_SEGMENT_MASK) >> FIFO_PTR_SEGMENT_SHIFT; + len = (val & FIFO_PTR_FRAMELEN_MASK) >> FIFO_PTR_FRAMELEN_SHIFT; + + skb = dev_alloc_skb(len); + if (unlikely(skb == NULL)) { + printk(KERN_NOTICE "%s: Low memory, packet dropped.\n", + ndev->name); + priv->stats.rx_dropped++; + return; + } + + data = skb_put(skb, len); + + memcpy_fromio(data, priv->sram_base + frameno * 1560, len); + + pfifo_push(EMPTY_PTR_FIFO(priv->id), + FIFO_PTR_SEGMENT(seg) | FIFO_PTR_FRAMENO(frameno)); + + ndev->last_rx = jiffies; + skb->dev = ndev; + skb->protocol = eth_type_trans(skb, ndev); + netif_rx(skb); + priv->stats.rx_packets++; + priv->stats.rx_bytes += len; +} + +static irqreturn_t +netx_eth_interrupt(int irq, void *dev_id, struct pt_regs *regs) +{ + struct net_device *ndev = dev_id; + struct netx_eth_priv *priv = netdev_priv(ndev); + int status; + unsigned long flags; + + spin_lock_irqsave(&priv->lock, flags); + + status = readl(NETX_PFIFO_XPEC_ISR(priv->id)); + while (status) { + int fill_level; + writel(status, NETX_PFIFO_XPEC_ISR(priv->id)); + + if ((status & ISR_CON_HI) || (status & ISR_IND_HI)) + printk("%s: unexpected status: 0x%08x\n", + __FUNCTION__, status); + + fill_level = + readl(NETX_PFIFO_FILL_LEVEL(IND_FIFO_PORT_LO(priv->id))); + while (fill_level--) + netx_eth_receive(ndev); + + if (status & ISR_CON_LO) + netif_wake_queue(ndev); + + if (status & ISR_LINK_STATUS_CHANGE) + mii_check_media(&priv->mii, netif_msg_link(priv), 1); + + status = readl(NETX_PFIFO_XPEC_ISR(priv->id)); + } + spin_unlock_irqrestore(&priv->lock, flags); + return IRQ_HANDLED; +} + +static struct net_device_stats *netx_eth_query_statistics(struct net_device *ndev) +{ + struct netx_eth_priv *priv = netdev_priv(ndev); + return &priv->stats; +} + +static int netx_eth_open(struct net_device *ndev) +{ + struct netx_eth_priv *priv = netdev_priv(ndev); + + if (request_irq + (ndev->irq, &netx_eth_interrupt, SA_SHIRQ, ndev->name, ndev)) + return -EAGAIN; + + writel(ndev->dev_addr[0] | + ndev->dev_addr[1]<<8 | + ndev->dev_addr[2]<<16 | + ndev->dev_addr[3]<<24, + priv->xpec_base + NETX_XPEC_RAM_START_OFS + ETH_MAC_4321); + writel(ndev->dev_addr[4] | + ndev->dev_addr[5]<<8, + priv->xpec_base + NETX_XPEC_RAM_START_OFS + ETH_MAC_65); + + writel(LOCAL_CONFIG_LINK_STATUS_IRQ_EN | + LOCAL_CONFIG_CON_LO_IRQ_EN | + LOCAL_CONFIG_CON_HI_IRQ_EN | + LOCAL_CONFIG_IND_LO_IRQ_EN | + LOCAL_CONFIG_IND_HI_IRQ_EN, + priv->xpec_base + NETX_XPEC_RAM_START_OFS + + ETH_MAC_LOCAL_CONFIG); + + mii_check_media(&priv->mii, netif_msg_link(priv), 1); + netif_start_queue(ndev); + + return 0; +} + +static int netx_eth_close(struct net_device *ndev) +{ + struct netx_eth_priv *priv = netdev_priv(ndev); + + netif_stop_queue(ndev); + + writel(0, + priv->xpec_base + NETX_XPEC_RAM_START_OFS + ETH_MAC_LOCAL_CONFIG); + + free_irq(ndev->irq, ndev); + + return 0; +} + +static void netx_eth_timeout(struct net_device *ndev) +{ + struct netx_eth_priv *priv = netdev_priv(ndev); + int i; + + printk(KERN_ERR "%s: transmit timed out, resetting\n", ndev->name); + + spin_lock_irq(&priv->lock); + + xc_reset(priv->xc); + xc_start(priv->xc); + + for (i=2; i<=18; i++) + pfifo_push(EMPTY_PTR_FIFO(priv->id), + FIFO_PTR_FRAMENO(i) | FIFO_PTR_SEGMENT(priv->id)); + + spin_unlock_irq(&priv->lock); + + netif_wake_queue(ndev); +} + +static int +netx_eth_phy_read(struct net_device *ndev, int phy_id, int reg) +{ + unsigned int val; + + val = MIIMU_SNRDY | MIIMU_PREAMBLE | MIIMU_PHYADDR(phy_id) | + MIIMU_REGADDR(reg) | MIIMU_PHY_NRES; + + writel(val, NETX_MIIMU); + while (readl(NETX_MIIMU) & MIIMU_SNRDY); + + return readl(NETX_MIIMU) >> 16; + +} + +static void +netx_eth_phy_write(struct net_device *ndev, int phy_id, int reg, int value) +{ + unsigned int val; + + val = MIIMU_SNRDY | MIIMU_PREAMBLE | MIIMU_PHYADDR(phy_id) | + MIIMU_REGADDR(reg) | MIIMU_PHY_NRES | MIIMU_OPMODE_WRITE | + MIIMU_DATA(value); + + writel(val, NETX_MIIMU); + while (readl(NETX_MIIMU) & MIIMU_SNRDY); +} + +static int netx_eth_enable(struct net_device *ndev) +{ + struct netx_eth_priv *priv = netdev_priv(ndev); + unsigned int mac4321, mac65; + int running, i; + + ether_setup(ndev); + + ndev->open = netx_eth_open; + ndev->stop = netx_eth_close; + ndev->hard_start_xmit = netx_eth_hard_start_xmit; + ndev->tx_timeout = netx_eth_timeout; + ndev->watchdog_timeo = msecs_to_jiffies(5000); + ndev->get_stats = netx_eth_query_statistics; + ndev->set_multicast_list = netx_eth_set_multicast_list; + + priv->msg_enable = NETIF_MSG_LINK; + priv->mii.phy_id_mask = 0x1f; + priv->mii.reg_num_mask = 0x1f; + priv->mii.force_media = 0; + priv->mii.full_duplex = 0; + priv->mii.dev = ndev; + priv->mii.mdio_read = netx_eth_phy_read; + priv->mii.mdio_write = netx_eth_phy_write; + priv->mii.phy_id = INTERNAL_PHY_ADR + priv->id; + + running = xc_running(priv->xc); + xc_stop(priv->xc); + + /* if the xc engine is already running, assume the bootloader has + * loaded the firmware for us + */ + if (running) { + /* get Node Address from hardware */ + mac4321 = readl(priv->xpec_base + + NETX_XPEC_RAM_START_OFS + ETH_MAC_4321); + mac65 = readl(priv->xpec_base + + NETX_XPEC_RAM_START_OFS + ETH_MAC_65); + + ndev->dev_addr[0] = mac4321 & 0xff; + ndev->dev_addr[1] = (mac4321 >> 8) & 0xff; + ndev->dev_addr[2] = (mac4321 >> 16) & 0xff; + ndev->dev_addr[3] = (mac4321 >> 24) & 0xff; + ndev->dev_addr[4] = mac65 & 0xff; + ndev->dev_addr[5] = (mac65 >> 8) & 0xff; + } else { + if (xc_request_firmware(priv->xc)) { + printk(CARDNAME ": requesting firmware failed\n"); + return -ENODEV; + } + } + + xc_reset(priv->xc); + xc_start(priv->xc); + + if (!is_valid_ether_addr(ndev->dev_addr)) + printk("%s: Invalid ethernet MAC address. Please " + "set using ifconfig\n", ndev->name); + + for (i=2; i<=18; i++) + pfifo_push(EMPTY_PTR_FIFO(priv->id), + FIFO_PTR_FRAMENO(i) | FIFO_PTR_SEGMENT(priv->id)); + + return register_netdev(ndev); + +} + +static int netx_eth_drv_probe(struct platform_device *pdev) +{ + struct netx_eth_priv *priv; + struct net_device *ndev; + struct netxeth_platform_data *pdata; + int ret; + + ndev = alloc_etherdev(sizeof (struct netx_eth_priv)); + if (!ndev) { + printk("%s: could not allocate device.\n", CARDNAME); + ret = -ENOMEM; + goto exit; + } + SET_MODULE_OWNER(ndev); + SET_NETDEV_DEV(ndev, &pdev->dev); + + platform_set_drvdata(pdev, ndev); + + priv = netdev_priv(ndev); + + pdata = (struct netxeth_platform_data *)pdev->dev.platform_data; + priv->xc = request_xc(pdata->xcno, &pdev->dev); + if (!priv->xc) { + dev_err(&pdev->dev, "unable to request xc engine\n"); + ret = -ENODEV; + goto exit_free_netdev; + } + + ndev->irq = priv->xc->irq; + priv->id = pdev->id; + priv->xpec_base = priv->xc->xpec_base; + priv->xmac_base = priv->xc->xmac_base; + priv->sram_base = priv->xc->sram_base; + + ret = pfifo_request(PFIFO_MASK(priv->id)); + if (ret) { + printk("unable to request PFIFO\n"); + goto exit_free_xc; + } + + ret = netx_eth_enable(ndev); + if (ret) + goto exit_free_pfifo; + + return 0; +exit_free_pfifo: + pfifo_free(PFIFO_MASK(priv->id)); +exit_free_xc: + free_xc(priv->xc); +exit_free_netdev: + platform_set_drvdata(pdev, NULL); + free_netdev(ndev); +exit: + return ret; +} + +static int netx_eth_drv_remove(struct platform_device *pdev) +{ + struct net_device *ndev = dev_get_drvdata(&pdev->dev); + struct netx_eth_priv *priv = netdev_priv(ndev); + + platform_set_drvdata(pdev, NULL); + + unregister_netdev(ndev); + xc_stop(priv->xc); + free_xc(priv->xc); + free_netdev(ndev); + pfifo_free(PFIFO_MASK(priv->id)); + + return 0; +} + +static int netx_eth_drv_suspend(struct platform_device *pdev, pm_message_t state) +{ + dev_err(&pdev->dev, "suspend not implemented\n"); + return 0; +} + +static int netx_eth_drv_resume(struct platform_device *pdev) +{ + dev_err(&pdev->dev, "resume not implemented\n"); + return 0; +} + +static struct platform_driver netx_eth_driver = { + .probe = netx_eth_drv_probe, + .remove = netx_eth_drv_remove, + .suspend = netx_eth_drv_suspend, + .resume = netx_eth_drv_resume, + .driver = { + .name = CARDNAME, + .owner = THIS_MODULE, + }, +}; + +static int __init netx_eth_init(void) +{ + unsigned int phy_control, val; + + printk("NetX Ethernet driver\n"); + + phy_control = PHY_CONTROL_PHY_ADDRESS(INTERNAL_PHY_ADR>>1) | + PHY_CONTROL_PHY1_MODE(PHY_MODE_ALL) | + PHY_CONTROL_PHY1_AUTOMDIX | + PHY_CONTROL_PHY1_EN | + PHY_CONTROL_PHY0_MODE(PHY_MODE_ALL) | + PHY_CONTROL_PHY0_AUTOMDIX | + PHY_CONTROL_PHY0_EN | + PHY_CONTROL_CLK_XLATIN; + + val = readl(NETX_SYSTEM_IOC_ACCESS_KEY); + writel(val, NETX_SYSTEM_IOC_ACCESS_KEY); + + writel(phy_control | PHY_CONTROL_RESET, NETX_SYSTEM_PHY_CONTROL); + udelay(100); + + val = readl(NETX_SYSTEM_IOC_ACCESS_KEY); + writel(val, NETX_SYSTEM_IOC_ACCESS_KEY); + + writel(phy_control, NETX_SYSTEM_PHY_CONTROL); + + return platform_driver_register(&netx_eth_driver); +} + +static void __exit netx_eth_cleanup(void) +{ + platform_driver_unregister(&netx_eth_driver); +} + +module_init(netx_eth_init); +module_exit(netx_eth_cleanup); + +MODULE_AUTHOR("Sascha Hauer, Pengutronix"); +MODULE_LICENSE("GPL"); + diff --git a/include/asm-arm/arch-netx/eth.h b/include/asm-arm/arch-netx/eth.h new file mode 100644 index 00000000000..643c90ef8b7 --- /dev/null +++ b/include/asm-arm/arch-netx/eth.h @@ -0,0 +1,27 @@ +/* + * include/asm-arm/arch-netx/eth.h + * + * Copyright (c) 2005 Sascha Hauer , Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef ASMARM_ARCH_ETH_H +#define ASMARM_ARCH_ETH_H + +struct netxeth_platform_data { + unsigned int xcno; /* number of xmac/xpec engine this eth uses */ +}; + +#endif -- cgit v1.2.3-70-g09d2 From 908dcecda1d18803b5823f30e6c47d2882dc0cf1 Mon Sep 17 00:00:00 2001 From: Jan Beulich Date: Fri, 23 Jun 2006 02:06:00 -0700 Subject: [PATCH] adjust handle_IRR_event() return type Correct the return type of handle_IRQ_event() (inconsistency noticed during Xen development), and remove redundant declarations. The return type adjustment required breaking out the definition of irqreturn_t into a separate header, in order to satisfy current include order dependencies. Signed-off-by: Jan Beulich Cc: Richard Henderson Cc: Ivan Kokshaysky Cc: Russell King Cc: Ian Molton Cc: Mikael Starvik Cc: Yoshinori Sato Cc: Hirokazu Takata Cc: Heiko Carstens Cc: Martin Schwidefsky Cc: William Lee Irwin III Cc: "David S. Miller" Cc: Miles Bader Cc: Geert Uytterhoeven Cc: Roman Zippel Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-alpha/irq.h | 4 ---- include/asm-arm/irq.h | 4 ---- include/asm-arm26/irq.h | 4 ---- include/asm-h8300/irq.h | 4 ---- include/asm-m68k/irq.h | 4 ---- include/asm-m68knommu/irq.h | 4 ---- include/asm-s390/irq.h | 4 ---- include/asm-sparc/irq.h | 4 ---- include/asm-v850/irq.h | 2 -- include/linux/interrupt.h | 21 +-------------------- include/linux/irq.h | 3 ++- include/linux/irqreturn.h | 25 +++++++++++++++++++++++++ kernel/irq/handle.c | 5 +++-- 13 files changed, 31 insertions(+), 57 deletions(-) create mode 100644 include/linux/irqreturn.h (limited to 'include/asm-arm') diff --git a/include/asm-alpha/irq.h b/include/asm-alpha/irq.h index f6de033718a..917b9fe372c 100644 --- a/include/asm-alpha/irq.h +++ b/include/asm-alpha/irq.h @@ -92,8 +92,4 @@ extern void enable_irq(unsigned int); struct pt_regs; extern void (*perf_irq)(unsigned long, struct pt_regs *); -struct irqaction; -int handle_IRQ_event(unsigned int, struct pt_regs *, struct irqaction *); - - #endif /* _ALPHA_IRQ_H */ diff --git a/include/asm-arm/irq.h b/include/asm-arm/irq.h index 60b5105c9c9..66e67e60bc5 100644 --- a/include/asm-arm/irq.h +++ b/include/asm-arm/irq.h @@ -47,10 +47,6 @@ void disable_irq_wake(unsigned int irq); void enable_irq_wake(unsigned int irq); int setup_irq(unsigned int, struct irqaction *); -struct irqaction; -struct pt_regs; -int handle_IRQ_event(unsigned int, struct pt_regs *, struct irqaction *); - extern void migrate_irqs(void); #endif diff --git a/include/asm-arm26/irq.h b/include/asm-arm26/irq.h index 06bd5a543d1..9aaac87efba 100644 --- a/include/asm-arm26/irq.h +++ b/include/asm-arm26/irq.h @@ -44,9 +44,5 @@ extern void enable_irq(unsigned int); int set_irq_type(unsigned int irq, unsigned int type); -int setup_irq(unsigned int, struct irqaction *); -struct pt_regs; -int handle_IRQ_event(unsigned int, struct pt_regs *, struct irqaction *); - #endif diff --git a/include/asm-h8300/irq.h b/include/asm-h8300/irq.h index 73065f5bda0..42a3ac424a9 100644 --- a/include/asm-h8300/irq.h +++ b/include/asm-h8300/irq.h @@ -63,8 +63,4 @@ extern void enable_irq(unsigned int); extern void disable_irq(unsigned int); #define disable_irq_nosync(x) disable_irq(x) -struct irqaction; -struct pt_regs; -int handle_IRQ_event(unsigned int, struct pt_regs *, struct irqaction *); - #endif /* _H8300_IRQ_H_ */ diff --git a/include/asm-m68k/irq.h b/include/asm-m68k/irq.h index b4f48b2a6a5..9727ca9d9f2 100644 --- a/include/asm-m68k/irq.h +++ b/include/asm-m68k/irq.h @@ -130,8 +130,4 @@ extern volatile unsigned int num_spurious; */ extern irq_node_t *new_irq_node(void); -struct irqaction; -struct pt_regs; -int handle_IRQ_event(unsigned int, struct pt_regs *, struct irqaction *); - #endif /* _M68K_IRQ_H_ */ diff --git a/include/asm-m68knommu/irq.h b/include/asm-m68knommu/irq.h index 2b408842a30..c5247516fcf 100644 --- a/include/asm-m68knommu/irq.h +++ b/include/asm-m68knommu/irq.h @@ -87,8 +87,4 @@ extern void (*mach_disable_irq)(unsigned int); #define disable_irq(x) do { } while (0) #define disable_irq_nosync(x) disable_irq(x) -struct irqaction; -struct pt_regs; -int handle_IRQ_event(unsigned int, struct pt_regs *, struct irqaction *); - #endif /* _M68K_IRQ_H_ */ diff --git a/include/asm-s390/irq.h b/include/asm-s390/irq.h index 916a1aa0b07..bd1a721f7aa 100644 --- a/include/asm-s390/irq.h +++ b/include/asm-s390/irq.h @@ -21,10 +21,6 @@ enum interruption_class { #define touch_nmi_watchdog() do { } while(0) -struct irqaction; -struct pt_regs; -int handle_IRQ_event(unsigned int, struct pt_regs *, struct irqaction *); - #endif /* __KERNEL__ */ #endif diff --git a/include/asm-sparc/irq.h b/include/asm-sparc/irq.h index f2d64537e29..3141ddfea97 100644 --- a/include/asm-sparc/irq.h +++ b/include/asm-sparc/irq.h @@ -181,8 +181,4 @@ extern struct sun4m_intregs *sun4m_interrupts; #define SUN4M_INT_SBUS(x) (1 << (x+7)) #define SUN4M_INT_VME(x) (1 << (x)) -struct irqaction; -struct pt_regs; -int handle_IRQ_event(unsigned int, struct pt_regs *, struct irqaction *); - #endif diff --git a/include/asm-v850/irq.h b/include/asm-v850/irq.h index 44431152b36..1bf096db8f4 100644 --- a/include/asm-v850/irq.h +++ b/include/asm-v850/irq.h @@ -62,8 +62,6 @@ extern void disable_irq (unsigned int irq); /* Disable an irq without waiting. */ extern void disable_irq_nosync (unsigned int irq); -extern int handle_IRQ_event(unsigned int, struct pt_regs *, struct irqaction *); - #endif /* !__ASSEMBLY__ */ #endif /* __V850_IRQ_H__ */ diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h index 9e0fefd7884..70741e17011 100644 --- a/include/linux/interrupt.h +++ b/include/linux/interrupt.h @@ -7,32 +7,13 @@ #include #include #include +#include #include #include #include #include #include -/* - * For 2.4.x compatibility, 2.4.x can use - * - * typedef void irqreturn_t; - * #define IRQ_NONE - * #define IRQ_HANDLED - * #define IRQ_RETVAL(x) - * - * To mix old-style and new-style irq handler returns. - * - * IRQ_NONE means we didn't handle it. - * IRQ_HANDLED means that we did have a valid interrupt and handled it. - * IRQ_RETVAL(x) selects on the two depending on x being non-zero (for handled) - */ -typedef int irqreturn_t; - -#define IRQ_NONE (0) -#define IRQ_HANDLED (1) -#define IRQ_RETVAL(x) ((x) != 0) - struct irqaction { irqreturn_t (*handler)(int, void *, struct pt_regs *); unsigned long flags; diff --git a/include/linux/irq.h b/include/linux/irq.h index e8a07e75e4f..676e00dfb21 100644 --- a/include/linux/irq.h +++ b/include/linux/irq.h @@ -17,6 +17,7 @@ #include #include #include +#include #include #include @@ -175,7 +176,7 @@ static inline void set_balance_irq_affinity(unsigned int irq, cpumask_t mask) extern int no_irq_affinity; extern int noirqdebug_setup(char *str); -extern fastcall int handle_IRQ_event(unsigned int irq, struct pt_regs *regs, +extern fastcall irqreturn_t handle_IRQ_event(unsigned int irq, struct pt_regs *regs, struct irqaction *action); extern fastcall unsigned int __do_IRQ(unsigned int irq, struct pt_regs *regs); extern void note_interrupt(unsigned int irq, irq_desc_t *desc, diff --git a/include/linux/irqreturn.h b/include/linux/irqreturn.h new file mode 100644 index 00000000000..881883c2009 --- /dev/null +++ b/include/linux/irqreturn.h @@ -0,0 +1,25 @@ +/* irqreturn.h */ +#ifndef _LINUX_IRQRETURN_H +#define _LINUX_IRQRETURN_H + +/* + * For 2.4.x compatibility, 2.4.x can use + * + * typedef void irqreturn_t; + * #define IRQ_NONE + * #define IRQ_HANDLED + * #define IRQ_RETVAL(x) + * + * To mix old-style and new-style irq handler returns. + * + * IRQ_NONE means we didn't handle it. + * IRQ_HANDLED means that we did have a valid interrupt and handled it. + * IRQ_RETVAL(x) selects on the two depending on x being non-zero (for handled) + */ +typedef int irqreturn_t; + +#define IRQ_NONE (0) +#define IRQ_HANDLED (1) +#define IRQ_RETVAL(x) ((x) != 0) + +#endif diff --git a/kernel/irq/handle.c b/kernel/irq/handle.c index 51df337b37d..0f653011710 100644 --- a/kernel/irq/handle.c +++ b/kernel/irq/handle.c @@ -76,10 +76,11 @@ irqreturn_t no_action(int cpl, void *dev_id, struct pt_regs *regs) /* * Have got an event to handle: */ -fastcall int handle_IRQ_event(unsigned int irq, struct pt_regs *regs, +fastcall irqreturn_t handle_IRQ_event(unsigned int irq, struct pt_regs *regs, struct irqaction *action) { - int ret, retval = 0, status = 0; + irqreturn_t ret, retval = IRQ_NONE; + unsigned int status = 0; if (!(action->flags & SA_INTERRUPT)) local_irq_enable(); -- cgit v1.2.3-70-g09d2 From 1d81eedb8f6c13c262a70b8167530ec24b09c0ff Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Sat, 24 Jun 2006 10:33:02 +0100 Subject: [ARM] 3634/1: ep93xx: initial implementation of the clk_* API Patch from Lennert Buytenhek Add an initial implementation of the clk_* API for the cirrus ep93xx to the tree. The initial implementation is somewhat minimal, with the intention of extending it as we go along. Signed-off-by: Lennert Buytenhek Signed-off-by: Russell King --- arch/arm/mach-ep93xx/Makefile | 2 +- arch/arm/mach-ep93xx/clock.c | 156 ++++++++++++++++++++++++++++++ arch/arm/mach-ep93xx/core.c | 2 + include/asm-arm/arch-ep93xx/ep93xx-regs.h | 2 + include/asm-arm/arch-ep93xx/platform.h | 1 + 5 files changed, 162 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-ep93xx/clock.c (limited to 'include/asm-arm') diff --git a/arch/arm/mach-ep93xx/Makefile b/arch/arm/mach-ep93xx/Makefile index 5393af989e9..05a48a21038 100644 --- a/arch/arm/mach-ep93xx/Makefile +++ b/arch/arm/mach-ep93xx/Makefile @@ -1,7 +1,7 @@ # # Makefile for the linux kernel. # -obj-y := core.o +obj-y := core.o clock.o obj-m := obj-n := obj- := diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c new file mode 100644 index 00000000000..08ad782c164 --- /dev/null +++ b/arch/arm/mach-ep93xx/clock.c @@ -0,0 +1,156 @@ +/* + * arch/arm/mach-ep93xx/clock.c + * Clock control for Cirrus EP93xx chips. + * + * Copyright (C) 2006 Lennert Buytenhek + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or (at + * your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include + +struct clk { + char *name; + unsigned long rate; + int users; + u32 enable_reg; + u32 enable_mask; +}; + +static struct clk clk_pll1 = { + .name = "pll1", +}; +static struct clk clk_f = { + .name = "fclk", +}; +static struct clk clk_h = { + .name = "hclk", +}; +static struct clk clk_p = { + .name = "pclk", +}; +static struct clk clk_pll2 = { + .name = "pll2", +}; +static struct clk clk_usb_host = { + .name = "usb_host", + .enable_reg = EP93XX_SYSCON_CLOCK_CONTROL, + .enable_mask = EP93XX_SYSCON_CLOCK_USH_EN, +}; + + +static struct clk *clocks[] = { + &clk_pll1, + &clk_f, + &clk_h, + &clk_p, + &clk_pll2, + &clk_usb_host, +}; + +struct clk *clk_get(struct device *dev, const char *id) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(clocks); i++) { + if (!strcmp(clocks[i]->name, id)) + return clocks[i]; + } + + return ERR_PTR(-ENOENT); +} + +int clk_enable(struct clk *clk) +{ + if (!clk->users++ && clk->enable_reg) { + u32 value; + + value = __raw_readl(clk->enable_reg); + __raw_writel(value | clk->enable_mask, clk->enable_reg); + } + + return 0; +} + +void clk_disable(struct clk *clk) +{ + if (!--clk->users && clk->enable_reg) { + u32 value; + + value = __raw_readl(clk->enable_reg); + __raw_writel(value & ~clk->enable_mask, clk->enable_reg); + } +} + +unsigned long clk_get_rate(struct clk *clk) +{ + return clk->rate; +} + +void clk_put(struct clk *clk) +{ +} + + + +static char fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 }; +static char hclk_divisors[] = { 1, 2, 4, 5, 6, 8, 16, 32 }; +static char pclk_divisors[] = { 1, 2, 4, 8 }; + +/* + * PLL rate = 14.7456 MHz * (X1FBD + 1) * (X2FBD + 1) / (X2IPD + 1) / 2^PS + */ +static unsigned long calc_pll_rate(u32 config_word) +{ + unsigned long long rate; + int i; + + rate = 14745600; + rate *= ((config_word >> 11) & 0x1f) + 1; /* X1FBD */ + rate *= ((config_word >> 5) & 0x3f) + 1; /* X2FBD */ + do_div(rate, (config_word & 0x1f) + 1); /* X2IPD */ + for (i = 0; i < ((config_word >> 16) & 3); i++) /* PS */ + rate >>= 1; + + return (unsigned long)rate; +} + +void ep93xx_clock_init(void) +{ + u32 value; + + value = __raw_readl(EP93XX_SYSCON_CLOCK_SET1); + if (!(value & 0x00800000)) { /* PLL1 bypassed? */ + clk_pll1.rate = 14745600; + } else { + clk_pll1.rate = calc_pll_rate(value); + } + clk_f.rate = clk_pll1.rate / fclk_divisors[(value >> 25) & 0x7]; + clk_h.rate = clk_pll1.rate / hclk_divisors[(value >> 20) & 0x7]; + clk_p.rate = clk_h.rate / pclk_divisors[(value >> 18) & 0x3]; + + value = __raw_readl(EP93XX_SYSCON_CLOCK_SET2); + if (!(value & 0x00080000)) { /* PLL2 bypassed? */ + clk_pll2.rate = 14745600; + } else if (value & 0x00040000) { /* PLL2 enabled? */ + clk_pll2.rate = calc_pll_rate(value); + } else { + clk_pll2.rate = 0; + } + clk_usb_host.rate = clk_pll2.rate / (((value >> 28) & 0xf) + 1); + + printk(KERN_INFO "ep93xx: PLL1 running at %ld MHz, PLL2 at %ld MHz\n", + clk_pll1.rate / 1000000, clk_pll2.rate / 1000000); + printk(KERN_INFO "ep93xx: FCLK %ld MHz, HCLK %ld MHz, PCLK %ld MHz\n", + clk_f.rate / 1000000, clk_h.rate / 1000000, + clk_p.rate / 1000000); +} diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c index bf6bd71bdd0..6fd6aa74a1f 100644 --- a/arch/arm/mach-ep93xx/core.c +++ b/arch/arm/mach-ep93xx/core.c @@ -437,6 +437,8 @@ void __init ep93xx_init_devices(void) { unsigned int v; + ep93xx_clock_init(); + /* * Disallow access to MaverickCrunch initially. */ diff --git a/include/asm-arm/arch-ep93xx/ep93xx-regs.h b/include/asm-arm/arch-ep93xx/ep93xx-regs.h index 71cea0b5841..8c322975f96 100644 --- a/include/asm-arm/arch-ep93xx/ep93xx-regs.h +++ b/include/asm-arm/arch-ep93xx/ep93xx-regs.h @@ -115,6 +115,8 @@ #define EP93XX_SYSCON_CLOCK_USH_EN 0x10000000 #define EP93XX_SYSCON_HALT EP93XX_SYSCON_REG(0x08) #define EP93XX_SYSCON_STANDBY EP93XX_SYSCON_REG(0x0c) +#define EP93XX_SYSCON_CLOCK_SET1 EP93XX_SYSCON_REG(0x20) +#define EP93XX_SYSCON_CLOCK_SET2 EP93XX_SYSCON_REG(0x24) #define EP93XX_SYSCON_DEVICE_CONFIG EP93XX_SYSCON_REG(0x80) #define EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE 0x00800000 #define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0) diff --git a/include/asm-arm/arch-ep93xx/platform.h b/include/asm-arm/arch-ep93xx/platform.h index df9cbb6ef66..d7a34ce2029 100644 --- a/include/asm-arm/arch-ep93xx/platform.h +++ b/include/asm-arm/arch-ep93xx/platform.h @@ -8,6 +8,7 @@ void ep93xx_map_io(void); void ep93xx_init_irq(void); void ep93xx_init_time(unsigned long); void ep93xx_init_devices(void); +void ep93xx_clock_init(void); extern struct sys_timer ep93xx_timer; -- cgit v1.2.3-70-g09d2 From 52e3e772a098274df3c6f5f1ad58cd7fe24089bf Mon Sep 17 00:00:00 2001 From: Andrew Victor Date: Sat, 24 Jun 2006 09:58:14 +0100 Subject: [ARM] 3631/1: Remove legacy __mem_isa() definitions Patch from Andrew Victor Remove the remaining legacy __mem_isa() definitions for the ARM platforms. Signed-off-by: Andrew Victor Signed-off-by: Russell King --- include/asm-arm/arch-aaec2000/io.h | 1 - include/asm-arm/arch-clps711x/io.h | 1 - include/asm-arm/arch-ebsa285/io.h | 8 -------- include/asm-arm/arch-integrator/io.h | 1 - include/asm-arm/arch-iop3xx/io.h | 1 - include/asm-arm/arch-l7200/io.h | 1 - include/asm-arm/arch-lh7a40x/io.h | 1 - include/asm-arm/arch-netx/io.h | 1 - include/asm-arm/arch-omap/io.h | 1 - include/asm-arm/arch-pxa/io.h | 1 - include/asm-arm/arch-realview/io.h | 1 - include/asm-arm/arch-sa1100/io.h | 1 - include/asm-arm/arch-versatile/io.h | 1 - 13 files changed, 20 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-aaec2000/io.h b/include/asm-arm/arch-aaec2000/io.h index 8d67907fd4f..d710204ac74 100644 --- a/include/asm-arm/arch-aaec2000/io.h +++ b/include/asm-arm/arch-aaec2000/io.h @@ -16,6 +16,5 @@ */ #define __io(a) ((void __iomem *)(a)) #define __mem_pci(a) (a) -#define __mem_isa(a) (a) #endif diff --git a/include/asm-arm/arch-clps711x/io.h b/include/asm-arm/arch-clps711x/io.h index 62613b0e2d9..53d790202c1 100644 --- a/include/asm-arm/arch-clps711x/io.h +++ b/include/asm-arm/arch-clps711x/io.h @@ -26,7 +26,6 @@ #define __io(a) ((void __iomem *)(a)) #define __mem_pci(a) (a) -#define __mem_isa(a) (a) /* * We don't support ins[lb]/outs[lb]. Make them fault. diff --git a/include/asm-arm/arch-ebsa285/io.h b/include/asm-arm/arch-ebsa285/io.h index 776f9d37705..f9c72914186 100644 --- a/include/asm-arm/arch-ebsa285/io.h +++ b/include/asm-arm/arch-ebsa285/io.h @@ -24,7 +24,6 @@ #define __io(a) ((void __iomem *)(PCIO_BASE + (a))) #if 1 #define __mem_pci(a) (a) -#define __mem_isa(a) ((a) + PCIMEM_BASE) #else static inline void __iomem *___mem_pci(void __iomem *p) @@ -34,14 +33,7 @@ static inline void __iomem *___mem_pci(void __iomem *p) return p; } -static inline void __iomem *___mem_isa(void __iomem *p) -{ - unsigned long a = (unsigned long)p; - BUG_ON(a >= 16*1048576); - return p + PCIMEM_BASE; -} #define __mem_pci(a) ___mem_pci(a) -#define __mem_isa(a) ___mem_isa(a) #endif #endif diff --git a/include/asm-arm/arch-integrator/io.h b/include/asm-arm/arch-integrator/io.h index 31f2deab51b..c8f2175948b 100644 --- a/include/asm-arm/arch-integrator/io.h +++ b/include/asm-arm/arch-integrator/io.h @@ -32,6 +32,5 @@ #define __io(a) ((void __iomem *)(PCI_IO_VADDR + (a))) #define __mem_pci(a) (a) -#define __mem_isa(a) ((a) + PCI_MEMORY_VADDR) #endif diff --git a/include/asm-arm/arch-iop3xx/io.h b/include/asm-arm/arch-iop3xx/io.h index f39046a6ab1..36adbdf5055 100644 --- a/include/asm-arm/arch-iop3xx/io.h +++ b/include/asm-arm/arch-iop3xx/io.h @@ -17,6 +17,5 @@ #define __io(p) ((void __iomem *)(p)) #define __mem_pci(a) (a) -#define __mem_isa(a) (a) #endif diff --git a/include/asm-arm/arch-l7200/io.h b/include/asm-arm/arch-l7200/io.h index cab8ad0adf0..cd080d8384d 100644 --- a/include/asm-arm/arch-l7200/io.h +++ b/include/asm-arm/arch-l7200/io.h @@ -19,7 +19,6 @@ */ #define __io_pci(a) ((void __iomem *)(PCIO_BASE + (a))) #define __mem_pci(a) (a) -#define __mem_isa(a) (a) #define __ioaddr(p) __io_pci(p) diff --git a/include/asm-arm/arch-lh7a40x/io.h b/include/asm-arm/arch-lh7a40x/io.h index bbcd4335f44..17bc9409748 100644 --- a/include/asm-arm/arch-lh7a40x/io.h +++ b/include/asm-arm/arch-lh7a40x/io.h @@ -18,6 +18,5 @@ /* No ISA or PCI bus on this machine. */ #define __io(a) ((void __iomem *)(a)) #define __mem_pci(a) (a) -#define __mem_isa(a) (a) #endif /* __ASM_ARCH_IO_H */ diff --git a/include/asm-arm/arch-netx/io.h b/include/asm-arm/arch-netx/io.h index 81b7bc47747..a7a53f80165 100644 --- a/include/asm-arm/arch-netx/io.h +++ b/include/asm-arm/arch-netx/io.h @@ -24,6 +24,5 @@ #define __io(a) ((void __iomem *)(a)) #define __mem_pci(a) (a) -#define __mem_isa(a) (a) #endif diff --git a/include/asm-arm/arch-omap/io.h b/include/asm-arm/arch-omap/io.h index b726acfcab1..78f68e6a4f0 100644 --- a/include/asm-arm/arch-omap/io.h +++ b/include/asm-arm/arch-omap/io.h @@ -44,7 +44,6 @@ */ #define __io(a) ((void __iomem *)(PCIO_BASE + (a))) #define __mem_pci(a) (a) -#define __mem_isa(a) (a) /* * ---------------------------------------------------------------------------- diff --git a/include/asm-arm/arch-pxa/io.h b/include/asm-arm/arch-pxa/io.h index eb2dd58d397..7f8d817b446 100644 --- a/include/asm-arm/arch-pxa/io.h +++ b/include/asm-arm/arch-pxa/io.h @@ -16,6 +16,5 @@ */ #define __io(a) ((void __iomem *)(a)) #define __mem_pci(a) (a) -#define __mem_isa(a) (a) #endif diff --git a/include/asm-arm/arch-realview/io.h b/include/asm-arm/arch-realview/io.h index d444a68ac33..c70f1dfbe13 100644 --- a/include/asm-arm/arch-realview/io.h +++ b/include/asm-arm/arch-realview/io.h @@ -29,6 +29,5 @@ static inline void __iomem *__io(unsigned long addr) #define __io(a) __io(a) #define __mem_pci(a) (a) -#define __mem_isa(a) (a) #endif diff --git a/include/asm-arm/arch-sa1100/io.h b/include/asm-arm/arch-sa1100/io.h index 040ccde7a11..0756269404b 100644 --- a/include/asm-arm/arch-sa1100/io.h +++ b/include/asm-arm/arch-sa1100/io.h @@ -22,6 +22,5 @@ static inline void __iomem *__io(unsigned long addr) } #define __io(a) __io(a) #define __mem_pci(a) (a) -#define __mem_isa(a) (a) #endif diff --git a/include/asm-arm/arch-versatile/io.h b/include/asm-arm/arch-versatile/io.h index 47e904cf25c..c4d01948e00 100644 --- a/include/asm-arm/arch-versatile/io.h +++ b/include/asm-arm/arch-versatile/io.h @@ -28,6 +28,5 @@ static inline void __iomem *__io(unsigned long addr) } #define __io(a) __io(a) #define __mem_pci(a) (a) -#define __mem_isa(a) (a) #endif -- cgit v1.2.3-70-g09d2 From 68d9ab394f06f95fd4ca612c08edf13e410fd8d0 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Sat, 24 Jun 2006 21:21:27 +0100 Subject: [ARM] 3635/1: S3C24XX: Add S3C2412 core cpu support Patch from Ben Dooks Add support for the Samsung S3C2412 and S3C2413 range of SoCs. This patch contains the core identification, debug macros, and basic register updates to get these to build. Signed-off-by: Ben Dooks Signed-off-by: Russell King --- arch/arm/mach-s3c2410/Kconfig | 14 +++ arch/arm/mach-s3c2410/Makefile | 4 + arch/arm/mach-s3c2410/cpu.c | 37 +++++- arch/arm/mach-s3c2410/cpu.h | 1 + arch/arm/mach-s3c2410/s3c2412.c | 195 +++++++++++++++++++++++++++++ arch/arm/mach-s3c2410/s3c2412.h | 29 +++++ include/asm-arm/arch-s3c2410/debug-macro.S | 10 +- include/asm-arm/arch-s3c2410/map.h | 16 +++ include/asm-arm/arch-s3c2410/regs-dsc.h | 3 + include/asm-arm/arch-s3c2410/regs-gpio.h | 63 +++++++++- include/asm-arm/arch-s3c2410/regs-gpioj.h | 5 + 11 files changed, 369 insertions(+), 8 deletions(-) create mode 100644 arch/arm/mach-s3c2410/s3c2412.c create mode 100644 arch/arm/mach-s3c2410/s3c2412.h (limited to 'include/asm-arm') diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig index 7b786d72563..b61af3a6a41 100644 --- a/arch/arm/mach-s3c2410/Kconfig +++ b/arch/arm/mach-s3c2410/Kconfig @@ -127,6 +127,20 @@ config CPU_S3C2410 Support for S3C2410 and S3C2410A family from the S3C24XX line of Samsung Mobile CPUs. +# internal node to signify if we are only dealing with an S3C2412 + +config CPU_S3C2412_ONLY + bool + depends on ARCH_S3C2410 && !CPU_S3C2400 && !CPU_S3C2410 && \ + !CPU_S3C2440 && !CPU_S3C2442 && CPU_S3C2412 + default y if CPU_S3C2412 + +config CPU_S3C2412 + bool + depends on ARCH_S3C2410 + help + Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line + config CPU_S3C244X bool depends on ARCH_S3C2410 && (CPU_S3C2440 || CPU_S3C2442) diff --git a/arch/arm/mach-s3c2410/Makefile b/arch/arm/mach-s3c2410/Makefile index 372dbcea143..86219c6df32 100644 --- a/arch/arm/mach-s3c2410/Makefile +++ b/arch/arm/mach-s3c2410/Makefile @@ -24,6 +24,10 @@ obj-$(CONFIG_S3C2410_DMA) += dma.o obj-$(CONFIG_PM) += pm.o sleep.o obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o +# S3C2412 support +obj-$(CONFIG_CPU_S3C2412) += s3c2412.o + +# # S3C244X support obj-$(CONFIG_CPU_S3C244X) += s3c244x.o diff --git a/arch/arm/mach-s3c2410/cpu.c b/arch/arm/mach-s3c2410/cpu.c index 52842e6e86e..1c3c6adae6c 100644 --- a/arch/arm/mach-s3c2410/cpu.c +++ b/arch/arm/mach-s3c2410/cpu.c @@ -44,6 +44,7 @@ #include "clock.h" #include "s3c2400.h" #include "s3c2410.h" +#include "s3c2412.h" #include "s3c244x.h" #include "s3c2440.h" #include "s3c2442.h" @@ -62,6 +63,7 @@ struct cpu_table { static const char name_s3c2400[] = "S3C2400"; static const char name_s3c2410[] = "S3C2410"; +static const char name_s3c2412[] = "S3C2412"; static const char name_s3c2440[] = "S3C2440"; static const char name_s3c2442[] = "S3C2442"; static const char name_s3c2410a[] = "S3C2410A"; @@ -113,6 +115,15 @@ static struct cpu_table cpu_ids[] __initdata = { .init = s3c2442_init, .name = name_s3c2442 }, + { + .idcode = 0x32412001, + .idmask = 0xffffffff, + .map_io = s3c2412_map_io, + .init_clocks = s3c2412_init_clocks, + .init_uarts = s3c2412_init_uarts, + .init = s3c2412_init, + .name = name_s3c2412, + }, { .idcode = 0x0, /* S3C2400 doesn't have an idcode */ .idmask = 0xffffffff, @@ -171,6 +182,24 @@ void s3c24xx_set_board(struct s3c24xx_board *b) static struct cpu_table *cpu; +static unsigned long s3c24xx_read_idcode_v5(void) +{ +#if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413) + return __raw_readl(S3C2412_GSTATUS1); +#else + return 1UL; /* don't look like an 2400 */ +#endif +} + +static unsigned long s3c24xx_read_idcode_v4(void) +{ +#ifndef CONFIG_CPU_S3C2400 + return __raw_readl(S3C2410_GSTATUS1); +#else + return 0UL; +#endif +} + void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) { unsigned long idcode = 0x0; @@ -178,9 +207,11 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) /* initialise the io descriptors we need for initialisation */ iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc)); -#ifndef CONFIG_CPU_S3C2400 - idcode = __raw_readl(S3C2410_GSTATUS1); -#endif + if (cpu_architecture() >= CPU_ARCH_ARMv5) { + idcode = s3c24xx_read_idcode_v5(); + } else { + idcode = s3c24xx_read_idcode_v4(); + } cpu = s3c_lookup_cpu(idcode); diff --git a/arch/arm/mach-s3c2410/cpu.h b/arch/arm/mach-s3c2410/cpu.h index 21c62dc29bb..b0ed9d2d141 100644 --- a/arch/arm/mach-s3c2410/cpu.h +++ b/arch/arm/mach-s3c2410/cpu.h @@ -74,5 +74,6 @@ extern struct sys_timer s3c24xx_timer; /* system device classes */ extern struct sysdev_class s3c2410_sysclass; +extern struct sysdev_class s3c2412_sysclass; extern struct sysdev_class s3c2440_sysclass; extern struct sysdev_class s3c2442_sysclass; diff --git a/arch/arm/mach-s3c2410/s3c2412.c b/arch/arm/mach-s3c2410/s3c2412.c new file mode 100644 index 00000000000..e24ffd5e478 --- /dev/null +++ b/arch/arm/mach-s3c2410/s3c2412.c @@ -0,0 +1,195 @@ +/* linux/arch/arm/mach-s3c2410/s3c2412.c + * + * Copyright (c) 2006 Simtec Electronics + * Ben Dooks + * + * http://armlinux.simtec.co.uk/. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Modifications: + * 16-May-2003 BJD Created initial version + * 16-Aug-2003 BJD Fixed header files and copyright, added URL + * 05-Sep-2003 BJD Moved to kernel v2.6 + * 18-Jan-2004 BJD Added serial port configuration + * 21-Aug-2004 BJD Added new struct s3c2410_board handler + * 28-Sep-2004 BJD Updates for new serial port bits + * 04-Nov-2004 BJD Updated UART configuration process + * 10-Jan-2005 BJD Removed s3c2410_clock_tick_rate + * 13-Aug-2005 DA Removed UART from initial I/O mappings +*/ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "s3c2412.h" +#include "cpu.h" +#include "devs.h" +#include "clock.h" +#include "pm.h" + +#ifndef CONFIG_CPU_S3C2412_ONLY +void __iomem *s3c24xx_va_gpio2 = S3C24XX_VA_GPIO; +#endif + +/* Initial IO mappings */ + +static struct map_desc s3c2412_iodesc[] __initdata = { + IODESC_ENT(CLKPWR), + IODESC_ENT(LCD), + IODESC_ENT(TIMER), + IODESC_ENT(ADC), + IODESC_ENT(WATCHDOG), +}; + +/* uart registration process */ + +void __init s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no) +{ + s3c24xx_init_uartdevs("s3c2412-uart", s3c2410_uart_resources, cfg, no); + + /* rename devices that are s3c2412/s3c2413 specific */ + s3c_device_sdi.name = "s3c2412-sdi"; + s3c_device_nand.name = "s3c2412-nand"; +} + +/* s3c2412_map_io + * + * register the standard cpu IO areas, and any passed in from the + * machine specific initialisation. +*/ + +void __init s3c2412_map_io(struct map_desc *mach_desc, int mach_size) +{ + /* move base of IO */ + + s3c24xx_va_gpio2 = S3C24XX_VA_GPIO + 0x10; + + /* register our io-tables */ + + iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc)); + iotable_init(mach_desc, mach_size); +} + +void __init s3c2412_init_clocks(int xtal) +{ + unsigned long tmp; + unsigned long fclk; + unsigned long hclk; + unsigned long pclk; + + /* now we've got our machine bits initialised, work out what + * clocks we've got */ + + fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal*2); + + tmp = __raw_readl(S3C2410_CLKDIVN); + + /* work out clock scalings */ + + hclk = fclk / ((tmp & S3C2412_CLKDIVN_HDIVN_MASK) + 1); + hclk /= ((tmp & S3C2421_CLKDIVN_ARMDIVN) ? 2 : 1); + pclk = hclk / ((tmp & S3C2412_CLKDIVN_PDIVN) ? 2 : 1); + + /* print brieft summary of clocks, etc */ + + printk("S3C2412: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n", + print_mhz(fclk), print_mhz(hclk), print_mhz(pclk)); + + /* initialise the clocks here, to allow other things like the + * console to use them + */ + + s3c24xx_setup_clocks(xtal, fclk, hclk, pclk); + s3c2412_baseclk_add(); +} + +/* need to register class before we actually register the device, and + * we also need to ensure that it has been initialised before any of the + * drivers even try to use it (even if not on an s3c2412 based system) + * as a driver which may support both 2410 and 2440 may try and use it. +*/ + +#ifdef CONFIG_PM +static struct sleep_save s3c2412_sleep[] = { + SAVE_ITEM(S3C2412_DSC0), + SAVE_ITEM(S3C2412_DSC1), + SAVE_ITEM(S3C2413_GPJDAT), + SAVE_ITEM(S3C2413_GPJCON), + SAVE_ITEM(S3C2413_GPJUP), + + /* save the sleep configuration anyway, just in case these + * get damaged during wakeup */ + + SAVE_ITEM(S3C2412_GPBSLPCON), + SAVE_ITEM(S3C2412_GPCSLPCON), + SAVE_ITEM(S3C2412_GPDSLPCON), + SAVE_ITEM(S3C2412_GPESLPCON), + SAVE_ITEM(S3C2412_GPFSLPCON), + SAVE_ITEM(S3C2412_GPGSLPCON), + SAVE_ITEM(S3C2412_GPHSLPCON), + SAVE_ITEM(S3C2413_GPJSLPCON), +}; + +static int s3c2412_suspend(struct sys_device *dev, pm_message_t state) +{ + s3c2410_pm_do_save(s3c2412_sleep, ARRAY_SIZE(s3c2412_sleep)); + return 0; +} + +static int s3c2412_resume(struct sys_device *dev) +{ + s3c2410_pm_do_restore(s3c2412_sleep, ARRAY_SIZE(s3c2412_sleep)); + return 0; +} + +#else +#define s3c2412_suspend NULL +#define s3c2412_resume NULL +#endif + +struct sysdev_class s3c2412_sysclass = { + set_kset_name("s3c2412-core"), + .suspend = s3c2412_suspend, + .resume = s3c2412_resume +}; + +static int __init s3c2412_core_init(void) +{ + return sysdev_class_register(&s3c2412_sysclass); +} + +core_initcall(s3c2412_core_init); + +static struct sys_device s3c2412_sysdev = { + .cls = &s3c2412_sysclass, +}; + +int __init s3c2412_init(void) +{ + printk("S3C2412: Initialising architecture\n"); + + return sysdev_register(&s3c2412_sysdev); +} diff --git a/arch/arm/mach-s3c2410/s3c2412.h b/arch/arm/mach-s3c2410/s3c2412.h new file mode 100644 index 00000000000..c6e56032a6e --- /dev/null +++ b/arch/arm/mach-s3c2410/s3c2412.h @@ -0,0 +1,29 @@ +/* arch/arm/mach-s3c2410/s3c2412.h + * + * Copyright (c) 2006 Simtec Electronics + * Ben Dooks + * + * Header file for s3c2412 cpu support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifdef CONFIG_CPU_S3C2412 + +extern int s3c2412_init(void); + +extern void s3c2412_map_io(struct map_desc *mach_desc, int size); + +extern void s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no); + +extern void s3c2412_init_clocks(int xtal); + +extern int s3c2412_baseclk_add(void); +#else +#define s3c2412_init_clocks NULL +#define s3c2412_init_uarts NULL +#define s3c2412_map_io NULL +#define s3c2412_init NULL +#endif diff --git a/include/asm-arm/arch-s3c2410/debug-macro.S b/include/asm-arm/arch-s3c2410/debug-macro.S index 5f8223e700d..b7d15d12545 100644 --- a/include/asm-arm/arch-s3c2410/debug-macro.S +++ b/include/asm-arm/arch-s3c2410/debug-macro.S @@ -33,7 +33,7 @@ .endm .macro senduart,rd,rx - str \rd, [\rx, # S3C2410_UTXH ] + strb \rd, [\rx, # S3C2410_UTXH ] .endm .macro busyuart, rd, rx @@ -42,6 +42,12 @@ beq 1001f @ @ FIFO enabled... 1003: + @ check for arm920 vs arm926. currently assume all arm926 + @ devices have an 64 byte FIFO identical to the s3c2440 + mrc p15, 0, \rd, c0, c0 + and \rd, \rd, #0xff0 + teq \rd, #0x260 + beq 1004f mrc p15, 0, \rd, c1, c0 tst \rd, #1 addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART) @@ -50,7 +56,7 @@ ldr \rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ] and \rd, \rd, #0x00ff0000 teq \rd, #0x00440000 @ is it 2440? - +1004: ldr \rd, [ \rx, # S3C2410_UFSTAT ] moveq \rd, \rd, lsr #SHIFT_2440TXF tst \rd, #S3C2410_UFSTAT_TXFULL diff --git a/include/asm-arm/arch-s3c2410/map.h b/include/asm-arm/arch-s3c2410/map.h index 5e4c8c37bc6..fae2766ff32 100644 --- a/include/asm-arm/arch-s3c2410/map.h +++ b/include/asm-arm/arch-s3c2410/map.h @@ -236,4 +236,20 @@ #define S3C24XX_PA_SPI S3C2410_PA_SPI #endif +/* deal with the registers that move under the 2412/2413 */ + +#if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413) +#ifndef __ASSEMBLY__ +extern void __iomem *s3c24xx_va_gpio2; +#endif +#ifdef CONFIG_CPU_S3C2412_ONLY +#define S3C24XX_VA_GPIO2 (S3C24XX_VA_GPIO + 0x10) +#else +#define S3C24XX_VA_GPIO2 s3c24xx_va_gpio2 +#endif +#else +#define s3c24xx_va_gpio2 S3C24XX_VA_GPIO +#define S3C24XX_VA_GPIO2 S3C24XX_VA_GPIO +#endif + #endif /* __ASM_ARCH_MAP_H */ diff --git a/include/asm-arm/arch-s3c2410/regs-dsc.h b/include/asm-arm/arch-s3c2410/regs-dsc.h index ba13a2c9e54..84aca61cbaa 100644 --- a/include/asm-arm/arch-s3c2410/regs-dsc.h +++ b/include/asm-arm/arch-s3c2410/regs-dsc.h @@ -23,6 +23,9 @@ #define S3C2440_DSC0 S3C2410_GPIOREG(0xc4) #define S3C2440_DSC1 S3C2410_GPIOREG(0xc8) +#define S3C2412_DSC0 S3C2410_GPIOREG(0xdc) +#define S3C2412_DSC1 S3C2410_GPIOREG(0xe0) + #define S3C2440_SELECT_DSC0 (0) #define S3C2440_SELECT_DSC1 (1<<31) diff --git a/include/asm-arm/arch-s3c2410/regs-gpio.h b/include/asm-arm/arch-s3c2410/regs-gpio.h index 5f10334f06b..6dd17f0f84e 100644 --- a/include/asm-arm/arch-s3c2410/regs-gpio.h +++ b/include/asm-arm/arch-s3c2410/regs-gpio.h @@ -45,7 +45,7 @@ #define S3C24XX_MISCCR S3C2400_MISCCR #else #define S3C24XX_GPIO_BASE(x) S3C2410_GPIO_BASE(x) -#define S3C24XX_MISCCR S3C2410_MISCCR +#define S3C24XX_MISCCR S3C24XX_GPIOREG2(0x80) #endif /* CONFIG_CPU_S3C2400 */ @@ -73,9 +73,15 @@ #define S3C2410_GPIO_SFN2 (0xFFFFFFF2) /* not available on A */ #define S3C2410_GPIO_SFN3 (0xFFFFFFF3) /* not available on A */ -/* configure GPIO ports A..G */ +/* register address for the GPIO registers. + * S3C24XX_GPIOREG2 is for the second set of registers in the + * GPIO which move between s3c2410 and s3c2412 type systems */ #define S3C2410_GPIOREG(x) ((x) + S3C24XX_VA_GPIO) +#define S3C24XX_GPIOREG2(x) ((x) + S3C24XX_VA_GPIO2) + + +/* configure GPIO ports A..G */ /* port A - S3C2410: 22bits, zero in bit X makes pin X output * S3C2400: 18bits, zero in bit X makes pin X output @@ -953,11 +959,18 @@ #define S3C2410_GPH10_OUTP (0x01 << 20) #define S3C2410_GPH10_CLKOUT1 (0x02 << 20) +/* The S3C2412 and S3C2413 move the GPJ register set to after + * GPH, which means all registers after 0x80 are now offset by 0x10 + * for the 2412/2413 from the 2410/2440/2442 +*/ + /* miscellaneous control */ #define S3C2400_MISCCR S3C2410_GPIOREG(0x54) #define S3C2410_MISCCR S3C2410_GPIOREG(0x80) #define S3C2410_DCLKCON S3C2410_GPIOREG(0x84) +#define S3C24XX_DCLKCON S3C24XX_GPIOREG2(0x84) + /* see clock.h for dclk definitions */ /* pullup control on databus */ @@ -985,6 +998,8 @@ #define S3C2410_MISCCR_CLK0_DCLK0 (5<<4) #define S3C2410_MISCCR_CLK0_MASK (7<<4) +#define S3C2412_MISCCR_CLK0_RTC (2<<4) + #define S3C2410_MISCCR_CLK1_MPLL (0<<8) #define S3C2410_MISCCR_CLK1_UPLL (1<<8) #define S3C2410_MISCCR_CLK1_FCLK (2<<8) @@ -993,6 +1008,8 @@ #define S3C2410_MISCCR_CLK1_DCLK1 (5<<8) #define S3C2410_MISCCR_CLK1_MASK (7<<8) +#define S3C2412_MISCCR_CLK1_CLKsrc (0<<8) + #define S3C2410_MISCCR_USBSUSPND0 (1<<12) #define S3C2410_MISCCR_USBSUSPND1 (1<<13) @@ -1000,7 +1017,7 @@ #define S3C2410_MISCCR_nEN_SCLK0 (1<<17) #define S3C2410_MISCCR_nEN_SCLK1 (1<<18) -#define S3C2410_MISCCR_nEN_SCLKE (1<<19) +#define S3C2410_MISCCR_nEN_SCLKE (1<<19) /* not 2412 */ #define S3C2410_MISCCR_SDSLEEP (7<<17) /* external interrupt control... */ @@ -1017,6 +1034,10 @@ #define S3C2410_EXTINT1 S3C2410_GPIOREG(0x8C) #define S3C2410_EXTINT2 S3C2410_GPIOREG(0x90) +#define S3C24XX_EXTINT0 S3C24XX_GPIOREG2(0x88) +#define S3C24XX_EXTINT1 S3C24XX_GPIOREG2(0x8C) +#define S3C24XX_EXTINT2 S3C24XX_GPIOREG2(0x90) + /* values for S3C2410_EXTINT0/1/2 */ #define S3C2410_EXTINT_LOWLEV (0x00) #define S3C2410_EXTINT_HILEV (0x01) @@ -1030,6 +1051,11 @@ #define S3C2410_EINFLT2 S3C2410_GPIOREG(0x9C) #define S3C2410_EINFLT3 S3C2410_GPIOREG(0xA0) +#define S3C24XX_EINFLT0 S3C24XX_GPIOREG2(0x94) +#define S3C24XX_EINFLT1 S3C24XX_GPIOREG2(0x98) +#define S3C24XX_EINFLT2 S3C24XX_GPIOREG2(0x9C) +#define S3C24XX_EINFLT3 S3C24XX_GPIOREG2(0xA0) + /* values for interrupt filtering */ #define S3C2410_EINTFLT_PCLK (0x00) #define S3C2410_EINTFLT_EXTCLK (1<<7) @@ -1039,6 +1065,7 @@ /* GSTATUS have miscellaneous information in them * + * These move between s3c2410 and s3c2412 style systems. */ #define S3C2410_GSTATUS0 S3C2410_GPIOREG(0x0AC) @@ -1047,6 +1074,18 @@ #define S3C2410_GSTATUS3 S3C2410_GPIOREG(0x0B8) #define S3C2410_GSTATUS4 S3C2410_GPIOREG(0x0BC) +#define S3C2412_GSTATUS0 S3C2410_GPIOREG(0x0BC) +#define S3C2412_GSTATUS1 S3C2410_GPIOREG(0x0C0) +#define S3C2412_GSTATUS2 S3C2410_GPIOREG(0x0C4) +#define S3C2412_GSTATUS3 S3C2410_GPIOREG(0x0C8) +#define S3C2412_GSTATUS4 S3C2410_GPIOREG(0x0CC) + +#define S3C24XX_GSTATUS0 S3C24XX_GPIOREG2(0x0AC) +#define S3C24XX_GSTATUS1 S3C24XX_GPIOREG2(0x0B0) +#define S3C24XX_GSTATUS2 S3C24XX_GPIOREG2(0x0B4) +#define S3C24XX_GSTATUS3 S3C24XX_GPIOREG2(0x0B8) +#define S3C24XX_GSTATUS4 S3C24XX_GPIOREG2(0x0BC) + #define S3C2410_GSTATUS0_nWAIT (1<<3) #define S3C2410_GSTATUS0_NCON (1<<2) #define S3C2410_GSTATUS0_RnB (1<<1) @@ -1054,6 +1093,7 @@ #define S3C2410_GSTATUS1_IDMASK (0xffff0000) #define S3C2410_GSTATUS1_2410 (0x32410000) +#define S3C2410_GSTATUS1_2412 (0x32412001) #define S3C2410_GSTATUS1_2440 (0x32440000) #define S3C2410_GSTATUS1_2442 (0x32440aaa) @@ -1077,5 +1117,22 @@ #define S3C2400_OPENCR_OPC_MOSIDIS (0<<5) #define S3C2400_OPENCR_OPC_MOSIEN (1<<5) +/* 2412/2413 sleep configuration registers */ + +#define S3C2412_GPBSLPCON S3C2410_GPIOREG(0x1C) +#define S3C2412_GPCSLPCON S3C2410_GPIOREG(0x2C) +#define S3C2412_GPDSLPCON S3C2410_GPIOREG(0x3C) +#define S3C2412_GPESLPCON S3C2410_GPIOREG(0x4C) +#define S3C2412_GPFSLPCON S3C2410_GPIOREG(0x5C) +#define S3C2412_GPGSLPCON S3C2410_GPIOREG(0x6C) +#define S3C2412_GPHSLPCON S3C2410_GPIOREG(0x7C) + +/* definitions for each pin bit */ +#define S3C2412_SLPCON_LOW(x) ( 0x00 << ((x) * 2)) +#define S3C2412_SLPCON_HI(x) ( 0x01 << ((x) * 2)) +#define S3C2412_SLPCON_IN(x) ( 0x02 << ((x) * 2)) +#define S3C2412_SLPCON_PDWN(x) ( 0x03 << ((x) * 2)) +#define S3C2412_SLPCON_MASK(x) ( 0x03 << ((x) * 2)) + #endif /* __ASM_ARCH_REGS_GPIO_H */ diff --git a/include/asm-arm/arch-s3c2410/regs-gpioj.h b/include/asm-arm/arch-s3c2410/regs-gpioj.h index 3ad2324acc3..18edae50d0b 100644 --- a/include/asm-arm/arch-s3c2410/regs-gpioj.h +++ b/include/asm-arm/arch-s3c2410/regs-gpioj.h @@ -32,6 +32,11 @@ #define S3C2440_GPJDAT S3C2410_GPIOREG(0xd4) #define S3C2440_GPJUP S3C2410_GPIOREG(0xd8) +#define S3C2413_GPJCON S3C2410_GPIOREG(0x80) +#define S3C2413_GPJDAT S3C2410_GPIOREG(0x84) +#define S3C2413_GPJUP S3C2410_GPIOREG(0x88) +#define S3C2413_GPJSLPCON S3C2410_GPIOREG(0x8C) + #define S3C2440_GPJ0 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 0) #define S3C2440_GPJ0_INP (0x00 << 0) #define S3C2440_GPJ0_OUTP (0x01 << 0) -- cgit v1.2.3-70-g09d2 From 736855f0c748dacb624070b8d6ffffe4532cf4dc Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Sat, 24 Jun 2006 21:21:31 +0100 Subject: [ARM] 3638/1: S3C2412: core clocks Patch from Ben Dooks Clock support for the clocks on the Samsung S3C2412 and S3C2413 SoCs. This provides clock enables and parent selection for all the standard clocks. Signed-off-by: Ben Dooks Signed-off-by: Russell King --- arch/arm/mach-s3c2410/Makefile | 1 + arch/arm/mach-s3c2410/s3c2412-clock.c | 711 ++++++++++++++++++++++++++++++ include/asm-arm/arch-s3c2410/regs-clock.h | 63 ++- 3 files changed, 774 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-s3c2410/s3c2412-clock.c (limited to 'include/asm-arm') diff --git a/arch/arm/mach-s3c2410/Makefile b/arch/arm/mach-s3c2410/Makefile index 86219c6df32..d934a89179a 100644 --- a/arch/arm/mach-s3c2410/Makefile +++ b/arch/arm/mach-s3c2410/Makefile @@ -26,6 +26,7 @@ obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o # S3C2412 support obj-$(CONFIG_CPU_S3C2412) += s3c2412.o +obj-$(CONFIG_CPU_S3C2412) += s3c2412-clock.o # # S3C244X support diff --git a/arch/arm/mach-s3c2410/s3c2412-clock.c b/arch/arm/mach-s3c2410/s3c2412-clock.c new file mode 100644 index 00000000000..c95ed3e1858 --- /dev/null +++ b/arch/arm/mach-s3c2410/s3c2412-clock.c @@ -0,0 +1,711 @@ +/* linux/arch/arm/mach-s3c2410/s3c2412-clock.c + * + * Copyright (c) 2006 Simtec Electronics + * Ben Dooks + * + * S3C2412,S3C2413 Clock control support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +*/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include + +#include "clock.h" +#include "cpu.h" + +/* We currently have to assume that the system is running + * from the XTPll input, and that all ***REFCLKs are being + * fed from it, as we cannot read the state of OM[4] from + * software. + * + * It would be possible for each board initialisation to + * set the correct muxing at initialisation +*/ + +int s3c2412_clkcon_enable(struct clk *clk, int enable) +{ + unsigned int clocks = clk->ctrlbit; + unsigned long clkcon; + + clkcon = __raw_readl(S3C2410_CLKCON); + + if (enable) + clkcon |= clocks; + else + clkcon &= ~clocks; + + __raw_writel(clkcon, S3C2410_CLKCON); + + return 0; +} + +static int s3c2412_upll_enable(struct clk *clk, int enable) +{ + unsigned long upllcon = __raw_readl(S3C2410_UPLLCON); + unsigned long orig = upllcon; + + if (!enable) + upllcon |= S3C2412_PLLCON_OFF; + else + upllcon &= ~S3C2412_PLLCON_OFF; + + __raw_writel(upllcon, S3C2410_UPLLCON); + + /* allow ~150uS for the PLL to settle and lock */ + + if (enable && (orig & S3C2412_PLLCON_OFF)) + udelay(150); + + return 0; +} + +/* clock selections */ + +/* CPU EXTCLK input */ +static struct clk clk_ext = { + .name = "extclk", + .id = -1, +}; + +static struct clk clk_erefclk = { + .name = "erefclk", + .id = -1, +}; + +static struct clk clk_urefclk = { + .name = "urefclk", + .id = -1, +}; + +static int s3c2412_setparent_usysclk(struct clk *clk, struct clk *parent) +{ + unsigned long clksrc = __raw_readl(S3C2412_CLKSRC); + + if (parent == &clk_urefclk) + clksrc &= ~S3C2412_CLKSRC_USYSCLK_UPLL; + else if (parent == &clk_upll) + clksrc |= S3C2412_CLKSRC_USYSCLK_UPLL; + else + return -EINVAL; + + clk->parent = parent; + + __raw_writel(clksrc, S3C2412_CLKSRC); + return 0; +} + +static struct clk clk_usysclk = { + .name = "usysclk", + .id = -1, + .parent = &clk_xtal, + .set_parent = s3c2412_setparent_usysclk, +}; + +static struct clk clk_mrefclk = { + .name = "mrefclk", + .parent = &clk_xtal, + .id = -1, +}; + +static struct clk clk_mdivclk = { + .name = "mdivclk", + .parent = &clk_xtal, + .id = -1, +}; + +static int s3c2412_setparent_usbsrc(struct clk *clk, struct clk *parent) +{ + unsigned long clksrc = __raw_readl(S3C2412_CLKSRC); + + if (parent == &clk_usysclk) + clksrc &= ~S3C2412_CLKSRC_USBCLK_HCLK; + else if (parent == &clk_h) + clksrc |= S3C2412_CLKSRC_USBCLK_HCLK; + else + return -EINVAL; + + clk->parent = parent; + + __raw_writel(clksrc, S3C2412_CLKSRC); + return 0; +} + +static unsigned long s3c2412_roundrate_usbsrc(struct clk *clk, + unsigned long rate) +{ + unsigned long parent_rate = clk_get_rate(clk->parent); + int div; + + if (rate > parent_rate) + return parent_rate; + + div = parent_rate / rate; + if (div > 2) + div = 2; + + return parent_rate / div; +} + +static unsigned long s3c2412_getrate_usbsrc(struct clk *clk) +{ + unsigned long parent_rate = clk_get_rate(clk->parent); + unsigned long div = __raw_readl(S3C2410_CLKDIVN); + + return parent_rate / ((div & S3C2412_CLKDIVN_USB48DIV) ? 2 : 1); +} + +static int s3c2412_setrate_usbsrc(struct clk *clk, unsigned long rate) +{ + unsigned long parent_rate = clk_get_rate(clk->parent); + unsigned long clkdivn = __raw_readl(S3C2410_CLKDIVN); + + rate = s3c2412_roundrate_usbsrc(clk, rate); + + if ((parent_rate / rate) == 2) + clkdivn |= S3C2412_CLKDIVN_USB48DIV; + else + clkdivn &= ~S3C2412_CLKDIVN_USB48DIV; + + __raw_writel(clkdivn, S3C2410_CLKDIVN); + return 0; +} + +static struct clk clk_usbsrc = { + .name = "usbsrc", + .id = -1, + .get_rate = s3c2412_getrate_usbsrc, + .set_rate = s3c2412_setrate_usbsrc, + .round_rate = s3c2412_roundrate_usbsrc, + .set_parent = s3c2412_setparent_usbsrc, +}; + +static int s3c2412_setparent_msysclk(struct clk *clk, struct clk *parent) +{ + unsigned long clksrc = __raw_readl(S3C2412_CLKSRC); + + if (parent == &clk_mdivclk) + clksrc &= ~S3C2412_CLKSRC_MSYSCLK_MPLL; + else if (parent == &clk_upll) + clksrc |= S3C2412_CLKSRC_MSYSCLK_MPLL; + else + return -EINVAL; + + clk->parent = parent; + + __raw_writel(clksrc, S3C2412_CLKSRC); + return 0; +} + +static struct clk clk_msysclk = { + .name = "msysclk", + .id = -1, + .set_parent = s3c2412_setparent_msysclk, +}; + +/* these next clocks have an divider immediately after them, + * so we can register them with their divider and leave out the + * intermediate clock stage +*/ +static unsigned long s3c2412_roundrate_clksrc(struct clk *clk, + unsigned long rate) +{ + unsigned long parent_rate = clk_get_rate(clk->parent); + int div; + + if (rate > parent_rate) + return parent_rate; + + /* note, we remove the +/- 1 calculations as they cancel out */ + + div = (rate / parent_rate); + + if (div < 1) + div = 1; + else if (div > 16) + div = 16; + + return parent_rate / div; +} + +static int s3c2412_setparent_uart(struct clk *clk, struct clk *parent) +{ + unsigned long clksrc = __raw_readl(S3C2412_CLKSRC); + + if (parent == &clk_erefclk) + clksrc &= ~S3C2412_CLKSRC_UARTCLK_MPLL; + else if (parent == &clk_mpll) + clksrc |= S3C2412_CLKSRC_UARTCLK_MPLL; + else + return -EINVAL; + + clk->parent = parent; + + __raw_writel(clksrc, S3C2412_CLKSRC); + return 0; +} + +static unsigned long s3c2412_getrate_uart(struct clk *clk) +{ + unsigned long parent_rate = clk_get_rate(clk->parent); + unsigned long div = __raw_readl(S3C2410_CLKDIVN); + + div &= S3C2412_CLKDIVN_UARTDIV_MASK; + div >>= S3C2412_CLKDIVN_UARTDIV_SHIFT; + + return parent_rate / (div + 1); +} + +static int s3c2412_setrate_uart(struct clk *clk, unsigned long rate) +{ + unsigned long parent_rate = clk_get_rate(clk->parent); + unsigned long clkdivn = __raw_readl(S3C2410_CLKDIVN); + + rate = s3c2412_roundrate_clksrc(clk, rate); + + clkdivn &= ~S3C2412_CLKDIVN_UARTDIV_MASK; + clkdivn |= ((parent_rate / rate) - 1) << S3C2412_CLKDIVN_UARTDIV_SHIFT; + + __raw_writel(clkdivn, S3C2410_CLKDIVN); + return 0; +} + +static struct clk clk_uart = { + .name = "uartclk", + .id = -1, + .get_rate = s3c2412_getrate_uart, + .set_rate = s3c2412_setrate_uart, + .set_parent = s3c2412_setparent_uart, + .round_rate = s3c2412_roundrate_clksrc, +}; + +static int s3c2412_setparent_i2s(struct clk *clk, struct clk *parent) +{ + unsigned long clksrc = __raw_readl(S3C2412_CLKSRC); + + if (parent == &clk_erefclk) + clksrc &= ~S3C2412_CLKSRC_I2SCLK_MPLL; + else if (parent == &clk_mpll) + clksrc |= S3C2412_CLKSRC_I2SCLK_MPLL; + else + return -EINVAL; + + clk->parent = parent; + + __raw_writel(clksrc, S3C2412_CLKSRC); + return 0; +} + +static unsigned long s3c2412_getrate_i2s(struct clk *clk) +{ + unsigned long parent_rate = clk_get_rate(clk->parent); + unsigned long div = __raw_readl(S3C2410_CLKDIVN); + + div &= S3C2412_CLKDIVN_I2SDIV_MASK; + div >>= S3C2412_CLKDIVN_I2SDIV_SHIFT; + + return parent_rate / (div + 1); +} + +static int s3c2412_setrate_i2s(struct clk *clk, unsigned long rate) +{ + unsigned long parent_rate = clk_get_rate(clk->parent); + unsigned long clkdivn = __raw_readl(S3C2410_CLKDIVN); + + rate = s3c2412_roundrate_clksrc(clk, rate); + + clkdivn &= ~S3C2412_CLKDIVN_I2SDIV_MASK; + clkdivn |= ((parent_rate / rate) - 1) << S3C2412_CLKDIVN_I2SDIV_SHIFT; + + __raw_writel(clkdivn, S3C2410_CLKDIVN); + return 0; +} + +static struct clk clk_i2s = { + .name = "i2sclk", + .id = -1, + .get_rate = s3c2412_getrate_i2s, + .set_rate = s3c2412_setrate_i2s, + .set_parent = s3c2412_setparent_i2s, + .round_rate = s3c2412_roundrate_clksrc, +}; + +static int s3c2412_setparent_cam(struct clk *clk, struct clk *parent) +{ + unsigned long clksrc = __raw_readl(S3C2412_CLKSRC); + + if (parent == &clk_usysclk) + clksrc &= ~S3C2412_CLKSRC_CAMCLK_HCLK; + else if (parent == &clk_h) + clksrc |= S3C2412_CLKSRC_CAMCLK_HCLK; + else + return -EINVAL; + + clk->parent = parent; + + __raw_writel(clksrc, S3C2412_CLKSRC); + return 0; +} +static unsigned long s3c2412_getrate_cam(struct clk *clk) +{ + unsigned long parent_rate = clk_get_rate(clk->parent); + unsigned long div = __raw_readl(S3C2410_CLKDIVN); + + div &= S3C2412_CLKDIVN_CAMDIV_MASK; + div >>= S3C2412_CLKDIVN_CAMDIV_SHIFT; + + return parent_rate / (div + 1); +} + +static int s3c2412_setrate_cam(struct clk *clk, unsigned long rate) +{ + unsigned long parent_rate = clk_get_rate(clk->parent); + unsigned long clkdivn = __raw_readl(S3C2410_CLKDIVN); + + rate = s3c2412_roundrate_clksrc(clk, rate); + + clkdivn &= ~S3C2412_CLKDIVN_CAMDIV_MASK; + clkdivn |= ((parent_rate / rate) - 1) << S3C2412_CLKDIVN_CAMDIV_SHIFT; + + __raw_writel(clkdivn, S3C2410_CLKDIVN); + return 0; +} + +static struct clk clk_cam = { + .name = "camif-upll", /* same as 2440 name */ + .id = -1, + .get_rate = s3c2412_getrate_cam, + .set_rate = s3c2412_setrate_cam, + .set_parent = s3c2412_setparent_cam, + .round_rate = s3c2412_roundrate_clksrc, +}; + +/* standard clock definitions */ + +static struct clk init_clocks_disable[] = { + { + .name = "nand", + .id = -1, + .parent = &clk_h, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_NAND, + }, { + .name = "sdi", + .id = -1, + .parent = &clk_p, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_SDI, + }, { + .name = "adc", + .id = -1, + .parent = &clk_p, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_ADC, + }, { + .name = "i2c", + .id = -1, + .parent = &clk_p, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_IIC, + }, { + .name = "iis", + .id = -1, + .parent = &clk_p, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_IIS, + }, { + .name = "spi", + .id = -1, + .parent = &clk_p, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_SPI, + } +}; + +static struct clk init_clocks[] = { + { + .name = "dma", + .id = 0, + .parent = &clk_h, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_DMA0, + }, { + .name = "dma", + .id = 1, + .parent = &clk_h, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_DMA1, + }, { + .name = "dma", + .id = 2, + .parent = &clk_h, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_DMA2, + }, { + .name = "dma", + .id = 3, + .parent = &clk_h, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_DMA3, + }, { + .name = "lcd", + .id = -1, + .parent = &clk_h, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_LCDC, + }, { + .name = "gpio", + .id = -1, + .parent = &clk_p, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_GPIO, + }, { + .name = "usb-host", + .id = -1, + .parent = &clk_h, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_USBH, + }, { + .name = "usb-device", + .id = -1, + .parent = &clk_h, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_USBD, + }, { + .name = "timers", + .id = -1, + .parent = &clk_p, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_PWMT, + }, { + .name = "uart", + .id = 0, + .parent = &clk_p, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_UART0, + }, { + .name = "uart", + .id = 1, + .parent = &clk_p, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_UART1, + }, { + .name = "uart", + .id = 2, + .parent = &clk_p, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_UART2, + }, { + .name = "rtc", + .id = -1, + .parent = &clk_p, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_RTC, + }, { + .name = "watchdog", + .id = -1, + .parent = &clk_p, + .ctrlbit = 0, + }, { + .name = "usb-bus-gadget", + .id = -1, + .parent = &clk_usb_bus, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_USB_DEV48, + }, { + .name = "usb-bus-host", + .id = -1, + .parent = &clk_usb_bus, + .enable = s3c2412_clkcon_enable, + .ctrlbit = S3C2412_CLKCON_USB_HOST48, + } +}; + +/* clocks to add where we need to check their parentage */ + +struct clk_init { + struct clk *clk; + unsigned int bit; + struct clk *src_0; + struct clk *src_1; +}; + +struct clk_init clks_src[] __initdata = { + { + .clk = &clk_usysclk, + .bit = S3C2412_CLKSRC_USBCLK_HCLK, + .src_0 = &clk_urefclk, + .src_1 = &clk_upll, + }, { + .clk = &clk_i2s, + .bit = S3C2412_CLKSRC_I2SCLK_MPLL, + .src_0 = &clk_erefclk, + .src_1 = &clk_mpll, + }, { + .clk = &clk_cam, + .bit = S3C2412_CLKSRC_CAMCLK_HCLK, + .src_0 = &clk_usysclk, + .src_1 = &clk_h, + }, { + .clk = &clk_msysclk, + .bit = S3C2412_CLKSRC_MSYSCLK_MPLL, + .src_0 = &clk_mdivclk, + .src_1 = &clk_mpll, + }, { + .clk = &clk_uart, + .bit = S3C2412_CLKSRC_UARTCLK_MPLL, + .src_0 = &clk_erefclk, + .src_1 = &clk_mpll, + }, { + .clk = &clk_usbsrc, + .bit = S3C2412_CLKSRC_USBCLK_HCLK, + .src_0 = &clk_usysclk, + .src_1 = &clk_h, + }, +}; + +/* s3c2412_clk_initparents + * + * Initialise the parents for the clocks that we get at start-time +*/ + +static void __init s3c2412_clk_initparents(void) +{ + unsigned long clksrc = __raw_readl(S3C2412_CLKSRC); + struct clk_init *cip = clks_src; + struct clk *src; + int ptr; + int ret; + + for (ptr = 0; ptr < ARRAY_SIZE(clks_src); ptr++, cip++) { + ret = s3c24xx_register_clock(cip->clk); + if (ret < 0) { + printk(KERN_ERR "Failed to register clock %s (%d)\n", + cip->clk->name, ret); + } + + src = (clksrc & cip->bit) ? cip->src_1 : cip->src_0; + + printk(KERN_INFO "%s: parent %s\n", cip->clk->name, src->name); + clk_set_parent(cip->clk, src); + } +} + +/* clocks to add straight away */ + +struct clk *clks[] __initdata = { + &clk_ext, + &clk_usb_bus, + &clk_erefclk, + &clk_urefclk, + &clk_mrefclk, +}; + +int __init s3c2412_baseclk_add(void) +{ + unsigned long clkcon = __raw_readl(S3C2410_CLKCON); + struct clk *clkp; + int ret; + int ptr; + + clk_upll.enable = s3c2412_upll_enable; + clk_usb_bus.parent = &clk_usbsrc; + clk_usb_bus.rate = 0x0; + + s3c2412_clk_initparents(); + + for (ptr = 0; ptr < ARRAY_SIZE(clks); ptr++) { + clkp = clks[ptr]; + + ret = s3c24xx_register_clock(clkp); + if (ret < 0) { + printk(KERN_ERR "Failed to register clock %s (%d)\n", + clkp->name, ret); + } + } + + /* ensure usb bus clock is within correct rate of 48MHz */ + + if (clk_get_rate(&clk_usb_bus) != (48 * 1000 * 1000)) { + printk(KERN_INFO "Warning: USB bus clock not at 48MHz\n"); + + /* for the moment, let's use the UPLL, and see if we can + * get 48MHz */ + + clk_set_parent(&clk_usysclk, &clk_upll); + clk_set_parent(&clk_usbsrc, &clk_usysclk); + clk_set_rate(&clk_usbsrc, 48*1000*1000); + } + + printk("S3C2412: upll %s, %ld.%03ld MHz, usb-bus %ld.%03ld MHz\n", + (__raw_readl(S3C2410_UPLLCON) & S3C2412_PLLCON_OFF) ? "off":"on", + print_mhz(clk_get_rate(&clk_upll)), + print_mhz(clk_get_rate(&clk_usb_bus))); + + /* register clocks from clock array */ + + clkp = init_clocks; + for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++, clkp++) { + /* ensure that we note the clock state */ + + clkp->usage = clkcon & clkp->ctrlbit ? 1 : 0; + + ret = s3c24xx_register_clock(clkp); + if (ret < 0) { + printk(KERN_ERR "Failed to register clock %s (%d)\n", + clkp->name, ret); + } + } + + /* We must be careful disabling the clocks we are not intending to + * be using at boot time, as subsytems such as the LCD which do + * their own DMA requests to the bus can cause the system to lockup + * if they where in the middle of requesting bus access. + * + * Disabling the LCD clock if the LCD is active is very dangerous, + * and therefore the bootloader should be careful to not enable + * the LCD clock if it is not needed. + */ + + /* install (and disable) the clocks we do not need immediately */ + + clkp = init_clocks_disable; + for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { + + ret = s3c24xx_register_clock(clkp); + if (ret < 0) { + printk(KERN_ERR "Failed to register clock %s (%d)\n", + clkp->name, ret); + } + + s3c2412_clkcon_enable(clkp, 0); + } + + return 0; +} diff --git a/include/asm-arm/arch-s3c2410/regs-clock.h b/include/asm-arm/arch-s3c2410/regs-clock.h index 6c92faffe98..a7c61feb843 100644 --- a/include/asm-arm/arch-s3c2410/regs-clock.h +++ b/include/asm-arm/arch-s3c2410/regs-clock.h @@ -1,6 +1,6 @@ /* linux/include/asm/arch-s3c2410/regs-clock.h * - * Copyright (c) 2003,2004,2005 Simtec Electronics + * Copyright (c) 2003,2004,2005,2006 Simtec Electronics * http://armlinux.simtec.co.uk/ * * This program is free software; you can redistribute it and/or modify @@ -140,5 +140,66 @@ s3c2410_get_pll(unsigned int pllval, unsigned int baseclk) #endif /* CONFIG_CPU_S3C2440 or CONFIG_CPU_S3C2442 */ +#if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413) + +#define S3C2412_OSCSET S3C2410_CLKREG(0x18) +#define S3C2412_CLKSRC S3C2410_CLKREG(0x1C) + +#define S3C2412_PLLCON_OFF (1<<20) + +#define S3C2412_CLKDIVN_PDIVN (1<<2) +#define S3C2412_CLKDIVN_HDIVN_MASK (3<<0) +#define S3C2421_CLKDIVN_ARMDIVN (1<<3) +#define S3C2412_CLKDIVN_USB48DIV (1<<6) +#define S3C2412_CLKDIVN_UARTDIV_MASK (15<<8) +#define S3C2412_CLKDIVN_UARTDIV_SHIFT (8) +#define S3C2412_CLKDIVN_I2SDIV_MASK (15<<12) +#define S3C2412_CLKDIVN_I2SDIV_SHIFT (12) +#define S3C2412_CLKDIVN_CAMDIV_MASK (15<<16) +#define S3C2412_CLKDIVN_CAMDIV_SHIFT (16) + +#define S3C2412_CLKCON_WDT (1<<28) +#define S3C2412_CLKCON_SPI (1<<27) +#define S3C2412_CLKCON_IIS (1<<26) +#define S3C2412_CLKCON_IIC (1<<25) +#define S3C2412_CLKCON_ADC (1<<24) +#define S3C2412_CLKCON_RTC (1<<23) +#define S3C2412_CLKCON_GPIO (1<<22) +#define S3C2412_CLKCON_UART2 (1<<21) +#define S3C2412_CLKCON_UART1 (1<<20) +#define S3C2412_CLKCON_UART0 (1<<19) +#define S3C2412_CLKCON_SDI (1<<18) +#define S3C2412_CLKCON_PWMT (1<<17) +#define S3C2412_CLKCON_USBD (1<<16) +#define S3C2412_CLKCON_CAMCLK (1<<15) +#define S3C2412_CLKCON_UARTCLK (1<<14) +/* missing 13 */ +#define S3C2412_CLKCON_USB_HOST48 (1<<12) +#define S3C2412_CLKCON_USB_DEV48 (1<<11) +#define S3C2412_CLKCON_HCLKdiv2 (1<<10) +#define S3C2412_CLKCON_HCLKx2 (1<<9) +#define S3C2412_CLKCON_SDRAM (1<<8) +/* missing 7 */ +#define S3C2412_CLKCON_USBH S3C2410_CLKCON_USBH +#define S3C2412_CLKCON_LCDC S3C2410_CLKCON_LCDC +#define S3C2412_CLKCON_NAND S3C2410_CLKCON_NAND +#define S3C2412_CLKCON_DMA3 (1<<3) +#define S3C2412_CLKCON_DMA2 (1<<2) +#define S3C2412_CLKCON_DMA1 (1<<1) +#define S3C2412_CLKCON_DMA0 (1<<0) + +/* clock sourec controls */ + +#define S3C2412_CLKSRC_EXTCLKDIV_MASK (7 << 0) +#define S3C2412_CLKSRC_EXTCLKDIV_SHIFT (0) +#define S3C2412_CLKSRC_MDIVCLK_EXTCLKDIV (1<<3) +#define S3C2412_CLKSRC_MSYSCLK_MPLL (1<<4) +#define S3C2412_CLKSRC_USYSCLK_UPLL (1<<5) +#define S3C2412_CLKSRC_UARTCLK_MPLL (1<<8) +#define S3C2412_CLKSRC_I2SCLK_MPLL (1<<9) +#define S3C2412_CLKSRC_USBCLK_HCLK (1<<10) +#define S3C2412_CLKSRC_CAMCLK_HCLK (1<<11) + +#endif /* CONFIG_CPU_S3C2412 | CONFIG_CPU_S3C2413 */ #endif /* __ASM_ARM_REGS_CLOCK */ -- cgit v1.2.3-70-g09d2 From 73e55cb3b3549d0174d1dadb755200938232e8d0 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Sat, 24 Jun 2006 21:21:32 +0100 Subject: [ARM] 3639/1: S3C2412: serial port support Patch from Ben Dooks Serial port support for the on-board UART blocks on the Samsung S3C2412 and S3C2413 UARTs. Signed-off-by: Ben Dooks Signed-off-by: Russell King --- drivers/serial/Kconfig | 9 +- drivers/serial/s3c2410.c | 143 ++++++++++++++++++++++++++++- include/asm-arm/arch-s3c2410/regs-serial.h | 15 +++ include/linux/serial_core.h | 3 + 4 files changed, 166 insertions(+), 4 deletions(-) (limited to 'include/asm-arm') diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index bef4a9622ed..5b48ac22c9c 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -354,21 +354,24 @@ config SERIAL_CLPS711X_CONSOLE kernel at boot time.) config SERIAL_S3C2410 - tristate "Samsung S3C2410 Serial port support" + tristate "Samsung S3C2410/S3C2440/S3C2442/S3C2412 Serial port support" depends on ARM && ARCH_S3C2410 select SERIAL_CORE help - Support for the on-chip UARTs on the Samsung S3C2410X CPU, + Support for the on-chip UARTs on the Samsung S3C24XX series CPUs, providing /dev/ttySAC0, 1 and 2 (note, some machines may not provide all of these ports, depending on how the serial port pins are configured. + Currently this driver supports the UARTS on the S3C2410, S3C2440, + S3C2442, S3C2412 and S3C2413 CPUs. + config SERIAL_S3C2410_CONSOLE bool "Support for console on S3C2410 serial port" depends on SERIAL_S3C2410=y select SERIAL_CORE_CONSOLE help - Allow selection of the S3C2410 on-board serial ports for use as + Allow selection of the S3C24XX on-board serial ports for use as an virtual console. Even if you say Y here, the currently visible virtual console diff --git a/drivers/serial/s3c2410.c b/drivers/serial/s3c2410.c index 53c2465bad2..837b6da520b 100644 --- a/drivers/serial/s3c2410.c +++ b/drivers/serial/s3c2410.c @@ -872,6 +872,8 @@ static const char *s3c24xx_serial_type(struct uart_port *port) return "S3C2410"; case PORT_S3C2440: return "S3C2440"; + case PORT_S3C2412: + return "S3C2412"; default: return NULL; } @@ -1528,6 +1530,141 @@ static inline void s3c2440_serial_exit(void) #define s3c2440_uart_inf_at NULL #endif /* CONFIG_CPU_S3C2440 */ +#if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413) + +static int s3c2412_serial_setsource(struct uart_port *port, + struct s3c24xx_uart_clksrc *clk) +{ + unsigned long ucon = rd_regl(port, S3C2410_UCON); + + ucon &= ~S3C2412_UCON_CLKMASK; + + if (strcmp(clk->name, "uclk") == 0) + ucon |= S3C2440_UCON_UCLK; + else if (strcmp(clk->name, "pclk") == 0) + ucon |= S3C2440_UCON_PCLK; + else if (strcmp(clk->name, "usysclk") == 0) + ucon |= S3C2412_UCON_USYSCLK; + else { + printk(KERN_ERR "unknown clock source %s\n", clk->name); + return -EINVAL; + } + + wr_regl(port, S3C2410_UCON, ucon); + return 0; +} + + +static int s3c2412_serial_getsource(struct uart_port *port, + struct s3c24xx_uart_clksrc *clk) +{ + unsigned long ucon = rd_regl(port, S3C2410_UCON); + + switch (ucon & S3C2412_UCON_CLKMASK) { + case S3C2412_UCON_UCLK: + clk->divisor = 1; + clk->name = "uclk"; + break; + + case S3C2412_UCON_PCLK: + case S3C2412_UCON_PCLK2: + clk->divisor = 1; + clk->name = "pclk"; + break; + + case S3C2412_UCON_USYSCLK: + clk->divisor = 1; + clk->name = "usysclk"; + break; + } + + return 0; +} + +static int s3c2412_serial_resetport(struct uart_port *port, + struct s3c2410_uartcfg *cfg) +{ + unsigned long ucon = rd_regl(port, S3C2410_UCON); + + dbg("%s: port=%p (%08lx), cfg=%p\n", + __FUNCTION__, port, port->mapbase, cfg); + + /* ensure we don't change the clock settings... */ + + ucon &= S3C2412_UCON_CLKMASK; + + wr_regl(port, S3C2410_UCON, ucon | cfg->ucon); + wr_regl(port, S3C2410_ULCON, cfg->ulcon); + + /* reset both fifos */ + + wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH); + wr_regl(port, S3C2410_UFCON, cfg->ufcon); + + return 0; +} + +static struct s3c24xx_uart_info s3c2412_uart_inf = { + .name = "Samsung S3C2412 UART", + .type = PORT_S3C2412, + .fifosize = 64, + .rx_fifomask = S3C2440_UFSTAT_RXMASK, + .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT, + .rx_fifofull = S3C2440_UFSTAT_RXFULL, + .tx_fifofull = S3C2440_UFSTAT_TXFULL, + .tx_fifomask = S3C2440_UFSTAT_TXMASK, + .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT, + .get_clksrc = s3c2412_serial_getsource, + .set_clksrc = s3c2412_serial_setsource, + .reset_port = s3c2412_serial_resetport, +}; + +/* device management */ + +static int s3c2412_serial_probe(struct platform_device *dev) +{ + dbg("s3c2440_serial_probe: dev=%p\n", dev); + return s3c24xx_serial_probe(dev, &s3c2440_uart_inf); +} + +static struct platform_driver s3c2412_serial_drv = { + .probe = s3c2412_serial_probe, + .remove = s3c24xx_serial_remove, + .suspend = s3c24xx_serial_suspend, + .resume = s3c24xx_serial_resume, + .driver = { + .name = "s3c2412-uart", + .owner = THIS_MODULE, + }, +}; + + +static inline int s3c2412_serial_init(void) +{ + return s3c24xx_serial_init(&s3c2412_serial_drv, &s3c2412_uart_inf); +} + +static inline void s3c2412_serial_exit(void) +{ + platform_driver_unregister(&s3c2412_serial_drv); +} + +#define s3c2412_uart_inf_at &s3c2412_uart_inf +#else + +static inline int s3c2412_serial_init(void) +{ + return 0; +} + +static inline void s3c2412_serial_exit(void) +{ +} + +#define s3c2412_uart_inf_at NULL +#endif /* CONFIG_CPU_S3C2440 */ + + /* module initialisation code */ static int __init s3c24xx_serial_modinit(void) @@ -1542,6 +1679,7 @@ static int __init s3c24xx_serial_modinit(void) s3c2400_serial_init(); s3c2410_serial_init(); + s3c2412_serial_init(); s3c2440_serial_init(); return 0; @@ -1551,6 +1689,7 @@ static void __exit s3c24xx_serial_modexit(void) { s3c2400_serial_exit(); s3c2410_serial_exit(); + s3c2412_serial_exit(); s3c2440_serial_exit(); uart_unregister_driver(&s3c24xx_uart_drv); @@ -1773,6 +1912,8 @@ static int s3c24xx_serial_initconsole(void) info = s3c2410_uart_inf_at; } else if (strcmp(dev->name, "s3c2440-uart") == 0) { info = s3c2440_uart_inf_at; + } else if (strcmp(dev->name, "s3c2412-uart") == 0) { + info = s3c2412_uart_inf_at; } else { printk(KERN_ERR "s3c24xx: no driver for %s\n", dev->name); return 0; @@ -1796,4 +1937,4 @@ console_initcall(s3c24xx_serial_initconsole); MODULE_LICENSE("GPL"); MODULE_AUTHOR("Ben Dooks "); -MODULE_DESCRIPTION("Samsung S3C2410/S3C2440 Serial port driver"); +MODULE_DESCRIPTION("Samsung S3C2410/S3C2440/S3C2412 Serial port driver"); diff --git a/include/asm-arm/arch-s3c2410/regs-serial.h b/include/asm-arm/arch-s3c2410/regs-serial.h index 83b01254c4a..93f651ae296 100644 --- a/include/asm-arm/arch-s3c2410/regs-serial.h +++ b/include/asm-arm/arch-s3c2410/regs-serial.h @@ -82,6 +82,12 @@ #define S3C2440_UCON2_DIVMASK (7 << 12) #define S3C2440_UCON_DIVSHIFT (12) +#define S3C2412_UCON_CLKMASK (3<<10) +#define S3C2412_UCON_UCLK (1<<10) +#define S3C2412_UCON_USYSCLK (3<<10) +#define S3C2412_UCON_PCLK (0<<10) +#define S3C2412_UCON_PCLK2 (2<<10) + #define S3C2410_UCON_UCLK (1<<10) #define S3C2410_UCON_SBREAK (1<<4) @@ -124,6 +130,15 @@ #define S3C2410_UMCOM_AFC (1<<4) #define S3C2410_UMCOM_RTS_LOW (1<<0) +#define S3C2412_UMCON_AFC_63 (0<<5) +#define S3C2412_UMCON_AFC_56 (1<<5) +#define S3C2412_UMCON_AFC_48 (2<<5) +#define S3C2412_UMCON_AFC_40 (3<<5) +#define S3C2412_UMCON_AFC_32 (4<<5) +#define S3C2412_UMCON_AFC_24 (5<<5) +#define S3C2412_UMCON_AFC_16 (6<<5) +#define S3C2412_UMCON_AFC_8 (7<<5) + #define S3C2410_UFSTAT_TXFULL (1<<9) #define S3C2410_UFSTAT_RXFULL (1<<8) #define S3C2410_UFSTAT_TXMASK (15<<4) diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h index 0ef50baa7da..951c4e85827 100644 --- a/include/linux/serial_core.h +++ b/include/linux/serial_core.h @@ -130,6 +130,9 @@ /* SUN4V Hypervisor Console */ #define PORT_SUNHV 72 +#define PORT_S3C2412 73 + + #ifdef __KERNEL__ #include -- cgit v1.2.3-70-g09d2 From a019f4a9a7b4ec4986918e9aefa06815cf77b714 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Sat, 24 Jun 2006 21:21:37 +0100 Subject: [ARM] 3645/1: S3C2412: irq support for external interrupts Patch from Ben Dooks Move the decoding of the IRQ_EXT4 and above out of the entry macro, and into an chained irq handler as the EXTINT registers move depending on the CPU being used. Signed-off-by: Ben Dooks Signed-off-by: Russell King --- arch/arm/mach-s3c2410/irq.c | 49 ++++++++++++++++++++---------- include/asm-arm/arch-s3c2410/entry-macro.S | 30 +++++------------- include/asm-arm/arch-s3c2410/regs-irq.h | 6 ++++ 3 files changed, 46 insertions(+), 39 deletions(-) (limited to 'include/asm-arm') diff --git a/arch/arm/mach-s3c2410/irq.c b/arch/arm/mach-s3c2410/irq.c index 46465742ed7..6822dc7f779 100644 --- a/arch/arm/mach-s3c2410/irq.c +++ b/arch/arm/mach-s3c2410/irq.c @@ -191,13 +191,9 @@ static struct irqchip s3c_irq_chip = { .ack = s3c_irq_ack, .mask = s3c_irq_mask, .unmask = s3c_irq_unmask, - .set_wake = s3c_irq_wake + .set_wake = s3c_irq_wake }; -/* S3C2410_EINTMASK - * S3C2410_EINTPEND - */ - static void s3c_irqext_mask(unsigned int irqno) { @@ -205,9 +201,9 @@ s3c_irqext_mask(unsigned int irqno) irqno -= EXTINT_OFF; - mask = __raw_readl(S3C2410_EINTMASK); + mask = __raw_readl(S3C24XX_EINTMASK); mask |= ( 1UL << irqno); - __raw_writel(mask, S3C2410_EINTMASK); + __raw_writel(mask, S3C24XX_EINTMASK); if (irqno <= (IRQ_EINT7 - EXTINT_OFF)) { /* check to see if all need masking */ @@ -232,11 +228,11 @@ s3c_irqext_ack(unsigned int irqno) bit = 1UL << (irqno - EXTINT_OFF); - mask = __raw_readl(S3C2410_EINTMASK); + mask = __raw_readl(S3C24XX_EINTMASK); - __raw_writel(bit, S3C2410_EINTPEND); + __raw_writel(bit, S3C24XX_EINTPEND); - req = __raw_readl(S3C2410_EINTPEND); + req = __raw_readl(S3C24XX_EINTPEND); req &= ~mask; /* not sure if we should be acking the parent irq... */ @@ -257,9 +253,9 @@ s3c_irqext_unmask(unsigned int irqno) irqno -= EXTINT_OFF; - mask = __raw_readl(S3C2410_EINTMASK); + mask = __raw_readl(S3C24XX_EINTMASK); mask &= ~( 1UL << irqno); - __raw_writel(mask, S3C2410_EINTMASK); + __raw_writel(mask, S3C24XX_EINTMASK); s3c_irq_unmask((irqno <= (IRQ_EINT7 - EXTINT_OFF)) ? IRQ_EINT4t7 : IRQ_EINT8t23); } @@ -572,6 +568,23 @@ s3c_irq_demux_uart2(unsigned int irq, s3c_irq_demux_uart(IRQ_S3CUART_RX2, regs); } +static void +s3c_irq_demux_extint(unsigned int irq, + struct irqdesc *desc, + struct pt_regs *regs) +{ + unsigned long eintpnd = __raw_readl(S3C24XX_EINTPEND); + unsigned long eintmsk = __raw_readl(S3C24XX_EINTMASK); + + eintpnd &= ~eintmsk; + + if (eintpnd) { + irq = fls(eintpnd); + irq += (IRQ_EINT4 - (4 + 1)); + + desc_handle_irq(irq, irq_desc + irq, regs); + } +} /* s3c24xx_init_irq * @@ -591,12 +604,12 @@ void __init s3c24xx_init_irq(void) last = 0; for (i = 0; i < 4; i++) { - pend = __raw_readl(S3C2410_EINTPEND); + pend = __raw_readl(S3C24XX_EINTPEND); if (pend == 0 || pend == last) break; - __raw_writel(pend, S3C2410_EINTPEND); + __raw_writel(pend, S3C24XX_EINTPEND); printk("irq: clearing pending ext status %08x\n", (int)pend); last = pend; } @@ -630,12 +643,14 @@ void __init s3c24xx_init_irq(void) irqdbf("s3c2410_init_irq: registering s3c2410 interrupt handlers\n"); - for (irqno = IRQ_BATT_FLT; irqno <= IRQ_ADCPARENT; irqno++) { + for (irqno = IRQ_EINT4t7; irqno <= IRQ_ADCPARENT; irqno++) { /* set all the s3c2410 internal irqs */ switch (irqno) { /* deal with the special IRQs (cascaded) */ + case IRQ_EINT4t7: + case IRQ_EINT8t23: case IRQ_UART0: case IRQ_UART1: case IRQ_UART2: @@ -659,12 +674,14 @@ void __init s3c24xx_init_irq(void) /* setup the cascade irq handlers */ + set_irq_chained_handler(IRQ_EINT4t7, s3c_irq_demux_extint); + set_irq_chained_handler(IRQ_EINT8t23, s3c_irq_demux_extint); + set_irq_chained_handler(IRQ_UART0, s3c_irq_demux_uart0); set_irq_chained_handler(IRQ_UART1, s3c_irq_demux_uart1); set_irq_chained_handler(IRQ_UART2, s3c_irq_demux_uart2); set_irq_chained_handler(IRQ_ADCPARENT, s3c_irq_demux_adc); - /* external interrupts */ for (irqno = IRQ_EINT0; irqno <= IRQ_EINT3; irqno++) { diff --git a/include/asm-arm/arch-s3c2410/entry-macro.S b/include/asm-arm/arch-s3c2410/entry-macro.S index 894c35cf3b1..e09a6b8ec15 100644 --- a/include/asm-arm/arch-s3c2410/entry-macro.S +++ b/include/asm-arm/arch-s3c2410/entry-macro.S @@ -18,8 +18,6 @@ #define INTPND (0x10) #define INTOFFSET (0x14) -#define EXTINTPEND (0xa8) -#define EXTINTMASK (0xa4) #include #include @@ -28,37 +26,23 @@ mov \base, #S3C24XX_VA_IRQ - ldr \irqstat, [ \base, #INTPND] - bics \irqnr, \irqstat, #3<<4 @@ only an GPIO IRQ - beq 2000f - @@ try the interrupt offset register, since it is there + ldr \irqstat, [ \base, #INTPND ] + teq \irqstat, #0 + beq 1002f ldr \irqnr, [ \base, #INTOFFSET ] mov \tmp, #1 tst \irqstat, \tmp, lsl \irqnr - addne \irqnr, \irqnr, #IRQ_EINT0 bne 1001f @@ the number specified is not a valid irq, so try @@ and work it out for ourselves - mov \irqnr, #IRQ_EINT0 @@ start here - b 3000f - -2000: - @@ load the GPIO interrupt register, and check it - - add \tmp, \base, #S3C24XX_VA_GPIO - S3C24XX_VA_IRQ - ldr \irqstat, [ \tmp, # EXTINTPEND ] - ldr \irqnr, [ \tmp, # EXTINTMASK ] - bics \irqstat, \irqstat, \irqnr - beq 1001f - - mov \irqnr, #(IRQ_EINT4 - 4) + mov \irqnr, #0 @@ start here @@ work out which irq (if any) we got -3000: + movs \tmp, \irqstat, lsl#16 addeq \irqnr, \irqnr, #16 moveq \irqstat, \irqstat, lsr#16 @@ -75,9 +59,9 @@ addeq \irqnr, \irqnr, #1 @@ we have the value - movs \irqnr, \irqnr - 1001: + adds \irqnr, \irqnr, #IRQ_EINT0 +1002: @@ exit here, Z flag unset if IRQ .endm diff --git a/include/asm-arm/arch-s3c2410/regs-irq.h b/include/asm-arm/arch-s3c2410/regs-irq.h index 24b7292df79..572fca5d9ac 100644 --- a/include/asm-arm/arch-s3c2410/regs-irq.h +++ b/include/asm-arm/arch-s3c2410/regs-irq.h @@ -23,6 +23,7 @@ #define S3C2410_IRQREG(x) ((x) + S3C24XX_VA_IRQ) #define S3C2410_EINTREG(x) ((x) + S3C24XX_VA_GPIO) +#define S3C24XX_EINTREG(x) ((x) + S3C24XX_VA_GPIO2) #define S3C2410_SRCPND S3C2410_IRQREG(0x000) #define S3C2410_INTMOD S3C2410_IRQREG(0x004) @@ -40,5 +41,10 @@ #define S3C2410_EINTMASK S3C2410_EINTREG(0x0A4) #define S3C2410_EINTPEND S3C2410_EINTREG(0X0A8) +#define S3C2412_EINTMASK S3C2410_EINTREG(0x0B4) +#define S3C2412_EINTPEND S3C2410_EINTREG(0X0B8) + +#define S3C24XX_EINTMASK S3C24XX_EINTREG(0x0A4) +#define S3C24XX_EINTPEND S3C24XX_EINTREG(0X0A8) #endif /* ___ASM_ARCH_REGS_IRQ_H */ -- cgit v1.2.3-70-g09d2 From 85fe068123aa11d3477ce88c7d365e233b1f2e10 Mon Sep 17 00:00:00 2001 From: Daniel Jacobowitz Date: Sat, 24 Jun 2006 23:46:21 +0100 Subject: [ARM] 3648/1: Update struct ucontext layout for coprocessor registers Patch from Daniel Jacobowitz In order for userspace to find saved coprocessor registers, move them from struct rt_sigframe into struct ucontext. Also allow space for glibc's sigset_t, so that userspace and kernelspace can use the same ucontext layout. Define the magic numbers for iWMMXt in the header file for easier reference. Include the size of the coprocessor data in the magic numbers. Also define magic numbers and layout for VFP, not yet saved. Signed-off-by: Daniel Jacobowitz Signed-off-by: Russell King --- arch/arm/kernel/signal.c | 42 +++++++----------------- include/asm-arm/ucontext.h | 79 +++++++++++++++++++++++++++++++++++++++++++++- 2 files changed, 89 insertions(+), 32 deletions(-) (limited to 'include/asm-arm') diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c index c0ba8afee42..e5802bfda31 100644 --- a/arch/arm/kernel/signal.c +++ b/arch/arm/kernel/signal.c @@ -134,17 +134,6 @@ sys_sigaction(int sig, const struct old_sigaction __user *act, #ifdef CONFIG_IWMMXT -/* iwmmxt_area is 0x98 bytes long, preceeded by 8 bytes of signature */ -#define IWMMXT_STORAGE_SIZE (0x98 + 8) -#define IWMMXT_MAGIC0 0x12ef842a -#define IWMMXT_MAGIC1 0x1c07ca71 - -struct iwmmxt_sigframe { - unsigned long magic0; - unsigned long magic1; - unsigned long storage[0x98/4]; -}; - static int preserve_iwmmxt_context(struct iwmmxt_sigframe *frame) { char kbuf[sizeof(*frame) + 8]; @@ -152,8 +141,8 @@ static int preserve_iwmmxt_context(struct iwmmxt_sigframe *frame) /* the iWMMXt context must be 64 bit aligned */ kframe = (struct iwmmxt_sigframe *)((unsigned long)(kbuf + 8) & ~7); - kframe->magic0 = IWMMXT_MAGIC0; - kframe->magic1 = IWMMXT_MAGIC1; + kframe->magic = IWMMXT_MAGIC; + kframe->size = IWMMXT_STORAGE_SIZE; iwmmxt_task_copy(current_thread_info(), &kframe->storage); return __copy_to_user(frame, kframe, sizeof(*frame)); } @@ -167,8 +156,8 @@ static int restore_iwmmxt_context(struct iwmmxt_sigframe *frame) kframe = (struct iwmmxt_sigframe *)((unsigned long)(kbuf + 8) & ~7); if (__copy_from_user(kframe, frame, sizeof(*frame))) return -1; - if (kframe->magic0 != IWMMXT_MAGIC0 || - kframe->magic1 != IWMMXT_MAGIC1) + if (kframe->magic != IWMMXT_MAGIC || + kframe->size != IWMMXT_STORAGE_SIZE) return -1; iwmmxt_task_restore(current_thread_info(), &kframe->storage); return 0; @@ -176,26 +165,12 @@ static int restore_iwmmxt_context(struct iwmmxt_sigframe *frame) #endif -/* - * Auxiliary signal frame. This saves stuff like FP state. - * The layout of this structure is not part of the user ABI. - */ -struct aux_sigframe { -#ifdef CONFIG_IWMMXT - struct iwmmxt_sigframe iwmmxt; -#endif -#ifdef CONFIG_VFP - union vfp_state vfp; -#endif -}; - /* * Do a signal return; undo the signal stack. These are aligned to 64-bit. */ struct sigframe { struct ucontext uc; unsigned long retcode[2]; - struct aux_sigframe aux __attribute__((aligned(8))); }; struct rt_sigframe { @@ -205,6 +180,7 @@ struct rt_sigframe { static int restore_sigframe(struct pt_regs *regs, struct sigframe __user *sf) { + struct aux_sigframe __user *aux; sigset_t set; int err; @@ -237,9 +213,10 @@ static int restore_sigframe(struct pt_regs *regs, struct sigframe __user *sf) err |= !valid_user_regs(regs); + aux = (struct aux_sigframe __user *) sf->uc.uc_regspace; #ifdef CONFIG_IWMMXT if (err == 0 && test_thread_flag(TIF_USING_IWMMXT)) - err |= restore_iwmmxt_context(&sf->aux.iwmmxt); + err |= restore_iwmmxt_context(&aux->iwmmxt); #endif #ifdef CONFIG_VFP // if (err == 0) @@ -327,6 +304,7 @@ badframe: static int setup_sigframe(struct sigframe __user *sf, struct pt_regs *regs, sigset_t *set) { + struct aux_sigframe __user *aux; int err = 0; __put_user_error(regs->ARM_r0, &sf->uc.uc_mcontext.arm_r0, err); @@ -354,14 +332,16 @@ setup_sigframe(struct sigframe __user *sf, struct pt_regs *regs, sigset_t *set) err |= __copy_to_user(&sf->uc.uc_sigmask, set, sizeof(*set)); + aux = (struct aux_sigframe __user *) sf->uc.uc_regspace; #ifdef CONFIG_IWMMXT if (err == 0 && test_thread_flag(TIF_USING_IWMMXT)) - err |= preserve_iwmmxt_context(&sf->aux.iwmmxt); + err |= preserve_iwmmxt_context(&aux->iwmmxt); #endif #ifdef CONFIG_VFP // if (err == 0) // err |= vfp_save_state(&sf->aux.vfp); #endif + __put_user_error(0, &aux->end_magic, err); return err; } diff --git a/include/asm-arm/ucontext.h b/include/asm-arm/ucontext.h index f853130137c..9e6f7ca9f5a 100644 --- a/include/asm-arm/ucontext.h +++ b/include/asm-arm/ucontext.h @@ -1,12 +1,89 @@ #ifndef _ASMARM_UCONTEXT_H #define _ASMARM_UCONTEXT_H +#include + +/* + * struct sigcontext only has room for the basic registers, but struct + * ucontext now has room for all registers which need to be saved and + * restored. Coprocessor registers are stored in uc_regspace. Each + * coprocessor's saved state should start with a documented 32-bit magic + * number, followed by a 32-bit word giving the coproccesor's saved size. + * uc_regspace may be expanded if necessary, although this takes some + * coordination with glibc. + */ + struct ucontext { unsigned long uc_flags; struct ucontext *uc_link; stack_t uc_stack; struct sigcontext uc_mcontext; - sigset_t uc_sigmask; /* mask last for extensibility */ + sigset_t uc_sigmask; + /* Allow for uc_sigmask growth. Glibc uses a 1024-bit sigset_t. */ + int __unused[32 - (sizeof (sigset_t) / sizeof (int))]; + /* Last for extensibility. Eight byte aligned because some + coprocessors require eight byte alignment. */ + unsigned long uc_regspace[128] __attribute__((__aligned__(8))); }; +#ifdef __KERNEL__ + +/* + * Coprocessor save state. The magic values and specific + * coprocessor's layouts are part of the userspace ABI. Each one of + * these should be a multiple of eight bytes and aligned to eight + * bytes, to prevent unpredictable padding in the signal frame. + */ + +#ifdef CONFIG_IWMMXT +/* iwmmxt_area is 0x98 bytes long, preceeded by 8 bytes of signature */ +#define IWMMXT_MAGIC 0x12ef842a +#define IWMMXT_STORAGE_SIZE (IWMMXT_SIZE + 8) + +struct iwmmxt_sigframe { + unsigned long magic; + unsigned long size; + struct iwmmxt_struct storage; +} __attribute__((__aligned__(8))); +#endif /* CONFIG_IWMMXT */ + +#ifdef CONFIG_VFP +#if __LINUX_ARM_ARCH__ < 6 +/* For ARM pre-v6, we use fstmiax and fldmiax. This adds one extra + * word after the registers, and a word of padding at the end for + * alignment. */ +#define VFP_MAGIC 0x56465001 +#define VFP_STORAGE_SIZE 152 +#else +#define VFP_MAGIC 0x56465002 +#define VFP_STORAGE_SIZE 144 +#endif + +struct vfp_sigframe +{ + unsigned long magic; + unsigned long size; + union vfp_state storage; +}; +#endif /* CONFIG_VFP */ + +/* + * Auxiliary signal frame. This saves stuff like FP state. + * The layout of this structure is not part of the user ABI, + * because the config options aren't. uc_regspace is really + * one of these. + */ +struct aux_sigframe { +#ifdef CONFIG_IWMMXT + struct iwmmxt_sigframe iwmmxt; +#endif +#if 0 && defined CONFIG_VFP /* Not yet saved. */ + struct vfp_sigframe vfp; +#endif + /* Something that isn't a valid magic number for any coprocessor. */ + unsigned long end_magic; +} __attribute__((__aligned__(8))); + +#endif + #endif /* !_ASMARM_UCONTEXT_H */ -- cgit v1.2.3-70-g09d2 From 7999d8d7a611bee902446939952859caf1367c25 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 25 Jun 2006 11:17:23 +0100 Subject: [ARM] Remove RETINSTR macro RETINSTR is a left-over from the days when we had 26-bit and 32-bit CPU support integrated into the same tree. Since this is no longer the case, we can now remove RETINSTR. Signed-off-by: Russell King --- arch/arm/kernel/entry-common.S | 2 +- arch/arm/lib/delay.S | 18 +++++++++--------- arch/arm/lib/findbit.S | 10 +++++----- arch/arm/lib/io-readsw-armv3.S | 2 +- arch/arm/lib/io-writesw-armv3.S | 2 +- arch/arm/lib/memchr.S | 2 +- arch/arm/lib/memset.S | 2 +- arch/arm/lib/memzero.S | 2 +- arch/arm/lib/strchr.S | 2 +- arch/arm/lib/strrchr.S | 2 +- include/asm-arm/assembler.h | 6 ------ 11 files changed, 22 insertions(+), 28 deletions(-) (limited to 'include/asm-arm') diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S index b5bcebca1cd..75af6d6e2f2 100644 --- a/arch/arm/kernel/entry-common.S +++ b/arch/arm/kernel/entry-common.S @@ -340,7 +340,7 @@ sys_mmap2: streq r5, [sp, #4] beq do_mmap2 mov r0, #-EINVAL - RETINSTR(mov,pc, lr) + mov pc, lr #else str r5, [sp, #4] b do_mmap2 diff --git a/arch/arm/lib/delay.S b/arch/arm/lib/delay.S index 9183b06c0e2..930a7025922 100644 --- a/arch/arm/lib/delay.S +++ b/arch/arm/lib/delay.S @@ -31,7 +31,7 @@ ENTRY(__const_udelay) @ 0 <= r0 <= 0x7fffff06 mov r2, r2, lsr #10 @ max = 0x00007fff mul r0, r2, r0 @ max = 2^32-1 movs r0, r0, lsr #6 - RETINSTR(moveq,pc,lr) + moveq pc, lr /* * loops = r0 * HZ * loops_per_jiffy / 1000000 @@ -43,20 +43,20 @@ ENTRY(__const_udelay) @ 0 <= r0 <= 0x7fffff06 ENTRY(__delay) subs r0, r0, #1 #if 0 - RETINSTR(movls,pc,lr) + movls pc, lr subs r0, r0, #1 - RETINSTR(movls,pc,lr) + movls pc, lr subs r0, r0, #1 - RETINSTR(movls,pc,lr) + movls pc, lr subs r0, r0, #1 - RETINSTR(movls,pc,lr) + movls pc, lr subs r0, r0, #1 - RETINSTR(movls,pc,lr) + movls pc, lr subs r0, r0, #1 - RETINSTR(movls,pc,lr) + movls pc, lr subs r0, r0, #1 - RETINSTR(movls,pc,lr) + movls pc, lr subs r0, r0, #1 #endif bhi __delay - RETINSTR(mov,pc,lr) + mov pc, lr diff --git a/arch/arm/lib/findbit.S b/arch/arm/lib/findbit.S index 6f8e27a58c7..a5ca0248aa4 100644 --- a/arch/arm/lib/findbit.S +++ b/arch/arm/lib/findbit.S @@ -32,7 +32,7 @@ ENTRY(_find_first_zero_bit_le) 2: cmp r2, r1 @ any more? blo 1b 3: mov r0, r1 @ no free bits - RETINSTR(mov,pc,lr) + mov pc, lr /* * Purpose : Find next 'zero' bit @@ -66,7 +66,7 @@ ENTRY(_find_first_bit_le) 2: cmp r2, r1 @ any more? blo 1b 3: mov r0, r1 @ no free bits - RETINSTR(mov,pc,lr) + mov pc, lr /* * Purpose : Find next 'one' bit @@ -98,7 +98,7 @@ ENTRY(_find_first_zero_bit_be) 2: cmp r2, r1 @ any more? blo 1b 3: mov r0, r1 @ no free bits - RETINSTR(mov,pc,lr) + mov pc, lr ENTRY(_find_next_zero_bit_be) teq r1, #0 @@ -126,7 +126,7 @@ ENTRY(_find_first_bit_be) 2: cmp r2, r1 @ any more? blo 1b 3: mov r0, r1 @ no free bits - RETINSTR(mov,pc,lr) + mov pc, lr ENTRY(_find_next_bit_be) teq r1, #0 @@ -164,5 +164,5 @@ ENTRY(_find_next_bit_be) addeq r2, r2, #1 mov r0, r2 #endif - RETINSTR(mov,pc,lr) + mov pc, lr diff --git a/arch/arm/lib/io-readsw-armv3.S b/arch/arm/lib/io-readsw-armv3.S index 146d47c1545..2639983219b 100644 --- a/arch/arm/lib/io-readsw-armv3.S +++ b/arch/arm/lib/io-readsw-armv3.S @@ -28,7 +28,7 @@ strb r3, [r1], #1 subs r2, r2, #1 - RETINSTR(moveq, pc, lr) + moveq pc, lr ENTRY(__raw_readsw) teq r2, #0 @ do we have to check for the zero len? diff --git a/arch/arm/lib/io-writesw-armv3.S b/arch/arm/lib/io-writesw-armv3.S index 52d62b48129..c421f92eeb2 100644 --- a/arch/arm/lib/io-writesw-armv3.S +++ b/arch/arm/lib/io-writesw-armv3.S @@ -29,7 +29,7 @@ orr r3, r3, r3, lsl #16 str r3, [r0] subs r2, r2, #1 - RETINSTR(moveq, pc, lr) + moveq pc, lr ENTRY(__raw_writesw) teq r2, #0 @ do we have to check for the zero len? diff --git a/arch/arm/lib/memchr.S b/arch/arm/lib/memchr.S index ac34fe55d21..e7ab1ea8eba 100644 --- a/arch/arm/lib/memchr.S +++ b/arch/arm/lib/memchr.S @@ -22,4 +22,4 @@ ENTRY(memchr) bne 1b sub r0, r0, #1 2: movne r0, #0 - RETINSTR(mov,pc,lr) + mov pc, lr diff --git a/arch/arm/lib/memset.S b/arch/arm/lib/memset.S index a1795f59993..69e7c31f338 100644 --- a/arch/arm/lib/memset.S +++ b/arch/arm/lib/memset.S @@ -77,4 +77,4 @@ ENTRY(memset) strneb r1, [r0], #1 tst r2, #1 strneb r1, [r0], #1 - RETINSTR(mov,pc,lr) + mov pc, lr diff --git a/arch/arm/lib/memzero.S b/arch/arm/lib/memzero.S index 51ccc60160f..764e7de8bba 100644 --- a/arch/arm/lib/memzero.S +++ b/arch/arm/lib/memzero.S @@ -77,4 +77,4 @@ ENTRY(__memzero) strneb r2, [r0], #1 @ 1 tst r1, #1 @ 1 a byte left over strneb r2, [r0], #1 @ 1 - RETINSTR(mov,pc,lr) @ 1 + mov pc, lr @ 1 diff --git a/arch/arm/lib/strchr.S b/arch/arm/lib/strchr.S index 5b9b493733f..9f18d6fdee6 100644 --- a/arch/arm/lib/strchr.S +++ b/arch/arm/lib/strchr.S @@ -23,4 +23,4 @@ ENTRY(strchr) teq r2, r1 movne r0, #0 subeq r0, r0, #1 - RETINSTR(mov,pc,lr) + mov pc, lr diff --git a/arch/arm/lib/strrchr.S b/arch/arm/lib/strrchr.S index fa923f026f1..538df220aa4 100644 --- a/arch/arm/lib/strrchr.S +++ b/arch/arm/lib/strrchr.S @@ -22,4 +22,4 @@ ENTRY(strrchr) teq r2, #0 bne 1b mov r0, r3 - RETINSTR(mov,pc,lr) + mov pc, lr diff --git a/include/asm-arm/assembler.h b/include/asm-arm/assembler.h index d53bafa9bf1..930dd905f1e 100644 --- a/include/asm-arm/assembler.h +++ b/include/asm-arm/assembler.h @@ -73,12 +73,6 @@ ldm/**/cond base,reglist #endif -/* - * Build a return instruction for this processor type. - */ -#define RETINSTR(instr, regs...)\ - instr regs - /* * Enable and disable interrupts */ -- cgit v1.2.3-70-g09d2 From 1b93a71755f2b15450b3e3045dab58a633e37b18 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 25 Jun 2006 11:23:45 +0100 Subject: [ARM] Remove LOADREGS macro As for RETINSTR, LOADREGS is a left-over from the 26-bit days. Remove it. Signed-off-by: Russell King --- arch/arm/boot/compressed/ll_char_wr.S | 6 +++--- arch/arm/lib/backtrace.S | 8 ++++---- arch/arm/lib/clear_user.S | 4 ++-- arch/arm/lib/copy_page.S | 2 +- arch/arm/lib/csumipv6.S | 2 +- arch/arm/lib/ecard.S | 4 ++-- arch/arm/lib/io-readsb.S | 6 +++--- arch/arm/lib/io-readsw-armv3.S | 4 ++-- arch/arm/lib/io-writesb.S | 6 +++--- arch/arm/lib/io-writesw-armv3.S | 4 ++-- arch/arm/lib/memset.S | 2 +- arch/arm/lib/memzero.S | 2 +- arch/arm/lib/uaccess.S | 8 ++++---- arch/arm/mm/copypage-v3.S | 2 +- include/asm-arm/assembler.h | 11 ----------- 15 files changed, 30 insertions(+), 41 deletions(-) (limited to 'include/asm-arm') diff --git a/arch/arm/boot/compressed/ll_char_wr.S b/arch/arm/boot/compressed/ll_char_wr.S index d7bbd9da2fc..8517c8606b4 100644 --- a/arch/arm/boot/compressed/ll_char_wr.S +++ b/arch/arm/boot/compressed/ll_char_wr.S @@ -77,7 +77,7 @@ Lrow4bpplp: subne r1, r1, #1 ldrneb r7, [r6, r1] bne Lrow4bpplp - LOADREGS(fd, sp!, {r4 - r7, pc}) + ldmfd sp!, {r4 - r7, pc} @ @ Smashable regs: {r0 - r3}, [r4], {r5 - r7}, (r8 - fp), [ip], (sp), {lr}, (pc) @@ -105,7 +105,7 @@ Lrow8bpplp: subne r1, r1, #1 ldrneb r7, [r6, r1] bne Lrow8bpplp - LOADREGS(fd, sp!, {r4 - r7, pc}) + ldmfd sp!, {r4 - r7, pc} @ @ Smashable regs: {r0 - r3}, [r4], {r5, r6}, [r7], (r8 - fp), [ip], (sp), [lr], (pc) @@ -127,7 +127,7 @@ Lrow1bpp: strb r7, [r0], r5 mov r7, r7, lsr #8 strb r7, [r0], r5 - LOADREGS(fd, sp!, {r4 - r7, pc}) + ldmfd sp!, {r4 - r7, pc} .bss ENTRY(con_charconvtable) diff --git a/arch/arm/lib/backtrace.S b/arch/arm/lib/backtrace.S index 16153c86c3f..058b80d72aa 100644 --- a/arch/arm/lib/backtrace.S +++ b/arch/arm/lib/backtrace.S @@ -41,7 +41,7 @@ ENTRY(c_backtrace) movne r0, #0 movs frame, r0 1: moveq r0, #-2 - LOADREGS(eqfd, sp!, {r4 - r8, pc}) + ldmeqfd sp!, {r4 - r8, pc} 2: stmfd sp!, {pc} @ calculate offset of PC in STMIA instruction ldr r0, [sp], #4 @@ -85,7 +85,7 @@ ENTRY(c_backtrace) * A zero next framepointer means we're done. */ teq next, #0 - LOADREGS(eqfd, sp!, {r4 - r8, pc}) + ldmeqfd sp!, {r4 - r8, pc} /* * The next framepointer must be above the @@ -104,7 +104,7 @@ ENTRY(c_backtrace) 1007: ldr r0, =.Lbad mov r1, frame bl printk - LOADREGS(fd, sp!, {r4 - r8, pc}) + ldmfd sp!, {r4 - r8, pc} .ltorg .previous @@ -145,7 +145,7 @@ ENTRY(c_backtrace) adrne r0, .Lcr blne printk mov r0, stack - LOADREGS(fd, sp!, {instr, reg, stack, r7, r8, pc}) + ldmfd sp!, {instr, reg, stack, r7, r8, pc} .Lfp: .asciz " r%d = %08X%c" .Lcr: .asciz "\n" diff --git a/arch/arm/lib/clear_user.S b/arch/arm/lib/clear_user.S index 7ff9f831b3f..ea435ae2e4a 100644 --- a/arch/arm/lib/clear_user.S +++ b/arch/arm/lib/clear_user.S @@ -43,10 +43,10 @@ USER( strnebt r2, [r0], #1) tst r1, #1 @ x1 x0 x1 x0 x1 x0 x1 USER( strnebt r2, [r0], #1) mov r0, #0 - LOADREGS(fd,sp!, {r1, pc}) + ldmfd sp!, {r1, pc} .section .fixup,"ax" .align 0 -9001: LOADREGS(fd,sp!, {r0, pc}) +9001: ldmfd sp!, {r0, pc} .previous diff --git a/arch/arm/lib/copy_page.S b/arch/arm/lib/copy_page.S index 68117968482..666c99cc074 100644 --- a/arch/arm/lib/copy_page.S +++ b/arch/arm/lib/copy_page.S @@ -43,4 +43,4 @@ ENTRY(copy_page) bgt 1b @ 1 PLD( ldmeqia r1!, {r3, r4, ip, lr} ) PLD( beq 2b ) - LOADREGS(fd, sp!, {r4, pc}) @ 3 + ldmfd sp!, {r4, pc} @ 3 diff --git a/arch/arm/lib/csumipv6.S b/arch/arm/lib/csumipv6.S index 7065a20ee8a..9621469beec 100644 --- a/arch/arm/lib/csumipv6.S +++ b/arch/arm/lib/csumipv6.S @@ -28,5 +28,5 @@ ENTRY(__csum_ipv6_magic) adcs r0, r0, r3 adcs r0, r0, r2 adcs r0, r0, #0 - LOADREGS(fd, sp!, {pc}) + ldmfd sp!, {pc} diff --git a/arch/arm/lib/ecard.S b/arch/arm/lib/ecard.S index fb7b602a6f7..c55aaa2a208 100644 --- a/arch/arm/lib/ecard.S +++ b/arch/arm/lib/ecard.S @@ -29,7 +29,7 @@ ENTRY(ecard_loader_read) CPSR2SPSR(r0) mov lr, pc mov pc, r2 - LOADREGS(fd, sp!, {r4 - r12, pc}) + ldmfd sp!, {r4 - r12, pc} @ Purpose: call an expansion card loader to reset the card @ Proto : void read_loader(int card_base, char *loader); @@ -41,5 +41,5 @@ ENTRY(ecard_loader_reset) CPSR2SPSR(r0) mov lr, pc add pc, r1, #8 - LOADREGS(fd, sp!, {r4 - r12, pc}) + ldmfd sp!, {r4 - r12, pc} diff --git a/arch/arm/lib/io-readsb.S b/arch/arm/lib/io-readsb.S index d3d8de71a2c..fb966ad0276 100644 --- a/arch/arm/lib/io-readsb.S +++ b/arch/arm/lib/io-readsb.S @@ -72,7 +72,7 @@ ENTRY(__raw_readsb) bpl .Linsb_16_lp tst r2, #15 - LOADREGS(eqfd, sp!, {r4 - r6, pc}) + ldmeqfd sp!, {r4 - r6, pc} .Linsb_no_16: tst r2, #8 beq .Linsb_no_8 @@ -109,7 +109,7 @@ ENTRY(__raw_readsb) str r3, [r1], #4 .Linsb_no_4: ands r2, r2, #3 - LOADREGS(eqfd, sp!, {r4 - r6, pc}) + ldmeqfd sp!, {r4 - r6, pc} cmp r2, #2 ldrb r3, [r0] @@ -119,4 +119,4 @@ ENTRY(__raw_readsb) ldrgtb r3, [r0] strgtb r3, [r1] - LOADREGS(fd, sp!, {r4 - r6, pc}) + ldmfd sp!, {r4 - r6, pc} diff --git a/arch/arm/lib/io-readsw-armv3.S b/arch/arm/lib/io-readsw-armv3.S index 2639983219b..4ef90418514 100644 --- a/arch/arm/lib/io-readsw-armv3.S +++ b/arch/arm/lib/io-readsw-armv3.S @@ -69,7 +69,7 @@ ENTRY(__raw_readsw) bpl .Linsw_8_lp tst r2, #7 - LOADREGS(eqfd, sp!, {r4, r5, r6, pc}) + ldmeqfd sp!, {r4, r5, r6, pc} .Lno_insw_8: tst r2, #4 beq .Lno_insw_4 @@ -102,6 +102,6 @@ ENTRY(__raw_readsw) movne r3, r3, lsr #8 strneb r3, [r1] - LOADREGS(fd, sp!, {r4, r5, r6, pc}) + ldmfd sp!, {r4, r5, r6, pc} diff --git a/arch/arm/lib/io-writesb.S b/arch/arm/lib/io-writesb.S index 08209fc640e..7eba2b6cc69 100644 --- a/arch/arm/lib/io-writesb.S +++ b/arch/arm/lib/io-writesb.S @@ -64,7 +64,7 @@ ENTRY(__raw_writesb) bpl .Loutsb_16_lp tst r2, #15 - LOADREGS(eqfd, sp!, {r4, r5, pc}) + ldmeqfd sp!, {r4, r5, pc} .Loutsb_no_16: tst r2, #8 beq .Loutsb_no_8 @@ -80,7 +80,7 @@ ENTRY(__raw_writesb) outword r3 .Loutsb_no_4: ands r2, r2, #3 - LOADREGS(eqfd, sp!, {r4, r5, pc}) + ldmeqfd sp!, {r4, r5, pc} cmp r2, #2 ldrb r3, [r1], #1 @@ -90,4 +90,4 @@ ENTRY(__raw_writesb) ldrgtb r3, [r1] strgtb r3, [r0] - LOADREGS(fd, sp!, {r4, r5, pc}) + ldmfd sp!, {r4, r5, pc} diff --git a/arch/arm/lib/io-writesw-armv3.S b/arch/arm/lib/io-writesw-armv3.S index c421f92eeb2..1607a29f49b 100644 --- a/arch/arm/lib/io-writesw-armv3.S +++ b/arch/arm/lib/io-writesw-armv3.S @@ -80,7 +80,7 @@ ENTRY(__raw_writesw) bpl .Loutsw_8_lp tst r2, #7 - LOADREGS(eqfd, sp!, {r4, r5, r6, pc}) + ldmeqfd sp!, {r4, r5, r6, pc} .Lno_outsw_8: tst r2, #4 beq .Lno_outsw_4 @@ -124,4 +124,4 @@ ENTRY(__raw_writesw) orrne ip, ip, ip, lsr #16 strne ip, [r0] - LOADREGS(fd, sp!, {r4, r5, r6, pc}) + ldmfd sp!, {r4, r5, r6, pc} diff --git a/arch/arm/lib/memset.S b/arch/arm/lib/memset.S index 69e7c31f338..95b110b07a8 100644 --- a/arch/arm/lib/memset.S +++ b/arch/arm/lib/memset.S @@ -53,7 +53,7 @@ ENTRY(memset) stmgeia r0!, {r1, r3, ip, lr} stmgeia r0!, {r1, r3, ip, lr} bgt 2b - LOADREGS(eqfd, sp!, {pc}) @ Now <64 bytes to go. + ldmeqfd sp!, {pc} @ Now <64 bytes to go. /* * No need to correct the count; we're only testing bits from now on */ diff --git a/arch/arm/lib/memzero.S b/arch/arm/lib/memzero.S index 764e7de8bba..abf2508e822 100644 --- a/arch/arm/lib/memzero.S +++ b/arch/arm/lib/memzero.S @@ -53,7 +53,7 @@ ENTRY(__memzero) stmgeia r0!, {r2, r3, ip, lr} @ 4 stmgeia r0!, {r2, r3, ip, lr} @ 4 bgt 3b @ 1 - LOADREGS(eqfd, sp!, {pc}) @ 1/2 quick exit + ldmeqfd sp!, {pc} @ 1/2 quick exit /* * No need to correct the count; we're only testing bits from now on */ diff --git a/arch/arm/lib/uaccess.S b/arch/arm/lib/uaccess.S index 0cc450f863b..1f1545d737b 100644 --- a/arch/arm/lib/uaccess.S +++ b/arch/arm/lib/uaccess.S @@ -105,7 +105,7 @@ USER( strgtbt r3, [r0], #1) @ May fault movs ip, r2 bne .Lc2u_nowords .Lc2u_finished: mov r0, #0 - LOADREGS(fd,sp!,{r2, r4 - r7, pc}) + ldmfd sp!, {r2, r4 - r7, pc} .Lc2u_src_not_aligned: bic r1, r1, #3 @@ -280,7 +280,7 @@ USER( strgtbt r3, [r0], #1) @ May fault .section .fixup,"ax" .align 0 -9001: LOADREGS(fd,sp!, {r0, r4 - r7, pc}) +9001: ldmfd sp!, {r0, r4 - r7, pc} .previous /* Prototype: unsigned long __arch_copy_from_user(void *to,const void *from,unsigned long n); @@ -369,7 +369,7 @@ USER( ldrgtbt r3, [r1], #1) @ May fault bne .Lcfu_nowords .Lcfu_finished: mov r0, #0 add sp, sp, #8 - LOADREGS(fd,sp!,{r4 - r7, pc}) + ldmfd sp!, {r4 - r7, pc} .Lcfu_src_not_aligned: bic r1, r1, #3 @@ -556,6 +556,6 @@ USER( ldrgtbt r3, [r1], #1) @ May fault movne r1, r4 blne __memzero mov r0, r4 - LOADREGS(fd,sp!, {r4 - r7, pc}) + ldmfd sp!, {r4 - r7, pc} .previous diff --git a/arch/arm/mm/copypage-v3.S b/arch/arm/mm/copypage-v3.S index 3c58ebbf035..2ee394b11bc 100644 --- a/arch/arm/mm/copypage-v3.S +++ b/arch/arm/mm/copypage-v3.S @@ -35,7 +35,7 @@ ENTRY(v3_copy_user_page) stmia r0!, {r3, r4, ip, lr} @ 4 ldmneia r1!, {r3, r4, ip, lr} @ 4 bne 1b @ 1 - LOADREGS(fd, sp!, {r4, pc}) @ 3 + ldmfd sp!, {r4, pc} @ 3 .align 5 /* diff --git a/include/asm-arm/assembler.h b/include/asm-arm/assembler.h index 930dd905f1e..add451ab894 100644 --- a/include/asm-arm/assembler.h +++ b/include/asm-arm/assembler.h @@ -62,17 +62,6 @@ #define DEFAULT_FIQ MODE_FIQ -/* - * LOADREGS - ldm with PC in register list (eg, ldmfd sp!, {pc}) - */ -#ifdef __STDC__ -#define LOADREGS(cond, base, reglist...)\ - ldm##cond base,reglist -#else -#define LOADREGS(cond, base, reglist...)\ - ldm/**/cond base,reglist -#endif - /* * Enable and disable interrupts */ -- cgit v1.2.3-70-g09d2 From 405040a78b33e39edf4180fc993b9608f07d3c41 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 25 Jun 2006 11:37:09 +0100 Subject: [ARM] Remove save_lr/restore_pc macros As for RETINSTR/LOADREGS macros, these were for compatibility with 26-bit ARMs. No longer required, so remove them. Signed-off-by: Russell King --- arch/arm/lib/strncpy_from_user.S | 5 ++--- arch/arm/lib/strnlen_user.S | 5 ++--- include/asm-arm/assembler.h | 12 ------------ 3 files changed, 4 insertions(+), 18 deletions(-) (limited to 'include/asm-arm') diff --git a/arch/arm/lib/strncpy_from_user.S b/arch/arm/lib/strncpy_from_user.S index 629cc877527..35649f04fca 100644 --- a/arch/arm/lib/strncpy_from_user.S +++ b/arch/arm/lib/strncpy_from_user.S @@ -21,7 +21,6 @@ * -EFAULT on exception, or "len" if we fill the whole buffer */ ENTRY(__arch_strncpy_from_user) - save_lr mov ip, r1 1: subs r2, r2, #1 USER( ldrplbt r3, [r1], #1) @@ -31,13 +30,13 @@ USER( ldrplbt r3, [r1], #1) bne 1b sub r1, r1, #1 @ take NUL character out of count 2: sub r0, r1, ip - restore_pc + mov pc, lr .section .fixup,"ax" .align 0 9001: mov r3, #0 strb r3, [r0, #0] @ null terminate mov r0, #-EFAULT - restore_pc + mov pc, lr .previous diff --git a/arch/arm/lib/strnlen_user.S b/arch/arm/lib/strnlen_user.S index 67bcd826812..3668a15991e 100644 --- a/arch/arm/lib/strnlen_user.S +++ b/arch/arm/lib/strnlen_user.S @@ -21,7 +21,6 @@ * or zero on exception, or n + 1 if too long */ ENTRY(__arch_strnlen_user) - save_lr mov r2, r0 1: USER( ldrbt r3, [r0], #1) @@ -31,10 +30,10 @@ USER( ldrbt r3, [r0], #1) bne 1b add r0, r0, #1 2: sub r0, r0, r2 - restore_pc + mov pc, lr .section .fixup,"ax" .align 0 9001: mov r0, #0 - restore_pc + mov pc, lr .previous diff --git a/include/asm-arm/assembler.h b/include/asm-arm/assembler.h index add451ab894..b97cb3e1ba7 100644 --- a/include/asm-arm/assembler.h +++ b/include/asm-arm/assembler.h @@ -100,18 +100,6 @@ msr cpsr_c, \oldcpsr .endm -/* - * These two are used to save LR/restore PC over a user-based access. - * The old 26-bit architecture requires that we do. On 32-bit - * architecture, we can safely ignore this requirement. - */ - .macro save_lr - .endm - - .macro restore_pc - mov pc, lr - .endm - #define USER(x...) \ 9999: x; \ .section __ex_table,"a"; \ -- cgit v1.2.3-70-g09d2 From 801194e3bcf7cde163b23c6279c559e69cb4ca57 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 25 Jun 2006 12:01:48 +0100 Subject: [ARM] Remove MODE_(SVC|IRQ|FIQ|USR) and DEFAULT_FIQ DEFAULT_FIQ was entirely unused. MODE_* are just redefinitions of *_MODE. Use *_MODE instead. Signed-off-by: Russell King --- arch/arm/kernel/head-nommu.S | 2 +- arch/arm/kernel/head.S | 4 ++-- arch/arm/mach-pxa/sleep.S | 2 +- arch/arm/mach-s3c2410/sleep.S | 2 +- arch/arm/mach-sa1100/sleep.S | 2 +- arch/arm/nwfpe/entry26.S | 2 +- include/asm-arm/assembler.h | 7 ------- 7 files changed, 7 insertions(+), 14 deletions(-) (limited to 'include/asm-arm') diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S index adf62e5eaad..2af7e44218a 100644 --- a/arch/arm/kernel/head-nommu.S +++ b/arch/arm/kernel/head-nommu.S @@ -39,7 +39,7 @@ __INIT .type stext, %function ENTRY(stext) - msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | MODE_SVC @ ensure svc mode + msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode @ and irqs disabled mrc p15, 0, r9, c0, c0 @ get processor id bl __lookup_processor_type @ r5=procinfo r9=cpuid diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index 04f7344e356..330b9476c39 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S @@ -71,7 +71,7 @@ __INIT .type stext, %function ENTRY(stext) - msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | MODE_SVC @ ensure svc mode + msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode @ and irqs disabled mrc p15, 0, r9, c0, c0 @ get processor id bl __lookup_processor_type @ r5=procinfo r9=cpuid @@ -104,7 +104,7 @@ ENTRY(secondary_startup) * the processor type - there is no need to check the machine type * as it has already been validated by the primary processor. */ - msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | MODE_SVC + msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE mrc p15, 0, r9, c0, c0 @ get processor id bl __lookup_processor_type movs r10, r5 @ invalid processor? diff --git a/arch/arm/mach-pxa/sleep.S b/arch/arm/mach-pxa/sleep.S index c9862688ff3..0650bed3b96 100644 --- a/arch/arm/mach-pxa/sleep.S +++ b/arch/arm/mach-pxa/sleep.S @@ -189,7 +189,7 @@ ENTRY(pxa_cpu_suspend) .data .align 5 ENTRY(pxa_cpu_resume) - mov r0, #PSR_I_BIT | PSR_F_BIT | MODE_SVC @ set SVC, irqs off + mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE @ set SVC, irqs off msr cpsr_c, r0 ldr r0, sleep_save_sp @ stack phys addr diff --git a/arch/arm/mach-s3c2410/sleep.S b/arch/arm/mach-s3c2410/sleep.S index 5f6761ed96b..dc27167f4d5 100644 --- a/arch/arm/mach-s3c2410/sleep.S +++ b/arch/arm/mach-s3c2410/sleep.S @@ -128,7 +128,7 @@ s3c2410_sleep_save_phys: */ ENTRY(s3c2410_cpu_resume) - mov r0, #PSR_I_BIT | PSR_F_BIT | MODE_SVC + mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE msr cpsr_c, r0 @@ load UART to allow us to print the two characters for diff --git a/arch/arm/mach-sa1100/sleep.S b/arch/arm/mach-sa1100/sleep.S index 2fa1e289d17..5a84062f92a 100644 --- a/arch/arm/mach-sa1100/sleep.S +++ b/arch/arm/mach-sa1100/sleep.S @@ -177,7 +177,7 @@ sa1110_sdram_controller_fix: .data .align 5 ENTRY(sa1100_cpu_resume) - mov r0, #PSR_F_BIT | PSR_I_BIT | MODE_SVC + mov r0, #PSR_F_BIT | PSR_I_BIT | SVC_MODE msr cpsr_c, r0 @ set SVC, irqs off ldr r0, sleep_save_sp @ stack phys addr diff --git a/arch/arm/nwfpe/entry26.S b/arch/arm/nwfpe/entry26.S index 51940a96d6a..3e6fb5d21d6 100644 --- a/arch/arm/nwfpe/entry26.S +++ b/arch/arm/nwfpe/entry26.S @@ -26,7 +26,7 @@ It is called from the kernel with code similar to this: mov fp, #0 - teqp pc, #PSR_I_BIT | MODE_SVC + teqp pc, #PSR_I_BIT | SVC_MODE ldr r4, .LC2 ldr pc, [r4] @ Call FP module USR entry point diff --git a/include/asm-arm/assembler.h b/include/asm-arm/assembler.h index b97cb3e1ba7..fce83282082 100644 --- a/include/asm-arm/assembler.h +++ b/include/asm-arm/assembler.h @@ -55,13 +55,6 @@ #define PLD(code...) #endif -#define MODE_USR USR_MODE -#define MODE_FIQ FIQ_MODE -#define MODE_IRQ IRQ_MODE -#define MODE_SVC SVC_MODE - -#define DEFAULT_FIQ MODE_FIQ - /* * Enable and disable interrupts */ -- cgit v1.2.3-70-g09d2 From afedfd016a78ea1b678886ab6236acbc7650fcfb Mon Sep 17 00:00:00 2001 From: Matt Mackall Date: Sun, 25 Jun 2006 05:47:11 -0700 Subject: [PATCH] random: remove SA_SAMPLE_RANDOM from floppy driver The floppy driver is already calling add_disk_randomness as it should, so this was redundant. Signed-off-by: Matt Mackall Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-alpha/floppy.h | 5 ++--- include/asm-arm/floppy.h | 2 +- include/asm-arm26/floppy.h | 2 +- include/asm-i386/floppy.h | 5 ++--- include/asm-mips/mach-generic/floppy.h | 2 +- include/asm-mips/mach-jazz/floppy.h | 2 +- include/asm-parisc/floppy.h | 6 ++---- include/asm-powerpc/floppy.h | 3 +-- include/asm-ppc/floppy.h | 6 ++---- include/asm-sh/floppy.h | 7 +++---- include/asm-x86_64/floppy.h | 6 ++---- 11 files changed, 18 insertions(+), 28 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-alpha/floppy.h b/include/asm-alpha/floppy.h index e177d4180f8..21816d35ef8 100644 --- a/include/asm-alpha/floppy.h +++ b/include/asm-alpha/floppy.h @@ -25,9 +25,8 @@ #define fd_enable_irq() enable_irq(FLOPPY_IRQ) #define fd_disable_irq() disable_irq(FLOPPY_IRQ) #define fd_cacheflush(addr,size) /* nothing */ -#define fd_request_irq() request_irq(FLOPPY_IRQ, floppy_interrupt, \ - SA_INTERRUPT|SA_SAMPLE_RANDOM, \ - "floppy", NULL) +#define fd_request_irq() request_irq(FLOPPY_IRQ, floppy_interrupt,\ + SA_INTERRUPT, "floppy", NULL) #define fd_free_irq() free_irq(FLOPPY_IRQ, NULL); #ifdef CONFIG_PCI diff --git a/include/asm-arm/floppy.h b/include/asm-arm/floppy.h index 6ea657c886b..aa0c8d28d8d 100644 --- a/include/asm-arm/floppy.h +++ b/include/asm-arm/floppy.h @@ -25,7 +25,7 @@ #define fd_inb(port) inb((port)) #define fd_request_irq() request_irq(IRQ_FLOPPYDISK,floppy_interrupt,\ - SA_INTERRUPT|SA_SAMPLE_RANDOM,"floppy",NULL) + SA_INTERRUPT,"floppy",NULL) #define fd_free_irq() free_irq(IRQ_FLOPPYDISK,NULL) #define fd_disable_irq() disable_irq(IRQ_FLOPPYDISK) #define fd_enable_irq() enable_irq(IRQ_FLOPPYDISK) diff --git a/include/asm-arm26/floppy.h b/include/asm-arm26/floppy.h index 9e090ad7e47..a18af069ca2 100644 --- a/include/asm-arm26/floppy.h +++ b/include/asm-arm26/floppy.h @@ -22,7 +22,7 @@ #define fd_inb(port) inb((port)) #define fd_request_irq() request_irq(IRQ_FLOPPYDISK,floppy_interrupt,\ - SA_INTERRUPT|SA_SAMPLE_RANDOM,"floppy",NULL) + SA_INTERRUPT,"floppy",NULL) #define fd_free_irq() free_irq(IRQ_FLOPPYDISK,NULL) #define fd_disable_irq() disable_irq(IRQ_FLOPPYDISK) #define fd_enable_irq() enable_irq(IRQ_FLOPPYDISK) diff --git a/include/asm-i386/floppy.h b/include/asm-i386/floppy.h index 03403045c18..9cb2793eb21 100644 --- a/include/asm-i386/floppy.h +++ b/include/asm-i386/floppy.h @@ -147,9 +147,8 @@ static int fd_request_irq(void) return request_irq(FLOPPY_IRQ, floppy_hardint,SA_INTERRUPT, "floppy", NULL); else - return request_irq(FLOPPY_IRQ, floppy_interrupt, - SA_INTERRUPT|SA_SAMPLE_RANDOM, - "floppy", NULL); + return request_irq(FLOPPY_IRQ, floppy_interrupt, SA_INTERRUPT, + "floppy", NULL); } diff --git a/include/asm-mips/mach-generic/floppy.h b/include/asm-mips/mach-generic/floppy.h index 682a5858f8d..83cd69e30ec 100644 --- a/include/asm-mips/mach-generic/floppy.h +++ b/include/asm-mips/mach-generic/floppy.h @@ -98,7 +98,7 @@ static inline void fd_disable_irq(void) static inline int fd_request_irq(void) { return request_irq(FLOPPY_IRQ, floppy_interrupt, - SA_INTERRUPT | SA_SAMPLE_RANDOM, "floppy", NULL); + SA_INTERRUPT, "floppy", NULL); } static inline void fd_free_irq(void) diff --git a/include/asm-mips/mach-jazz/floppy.h b/include/asm-mips/mach-jazz/floppy.h index c9dad99b123..9413117915f 100644 --- a/include/asm-mips/mach-jazz/floppy.h +++ b/include/asm-mips/mach-jazz/floppy.h @@ -90,7 +90,7 @@ static inline void fd_disable_irq(void) static inline int fd_request_irq(void) { return request_irq(FLOPPY_IRQ, floppy_interrupt, - SA_INTERRUPT | SA_SAMPLE_RANDOM, "floppy", NULL); + SA_INTERRUPT, "floppy", NULL); } static inline void fd_free_irq(void) diff --git a/include/asm-parisc/floppy.h b/include/asm-parisc/floppy.h index ca3aed768cd..458cdb2a753 100644 --- a/include/asm-parisc/floppy.h +++ b/include/asm-parisc/floppy.h @@ -159,10 +159,8 @@ static int fd_request_irq(void) return request_irq(FLOPPY_IRQ, floppy_hardint,SA_INTERRUPT, "floppy", NULL); else - return request_irq(FLOPPY_IRQ, floppy_interrupt, - SA_INTERRUPT|SA_SAMPLE_RANDOM, - "floppy", NULL); - + return request_irq(FLOPPY_IRQ, floppy_interrupt, SA_INTERRUPT, + "floppy", NULL); } static unsigned long dma_mem_alloc(unsigned long size) diff --git a/include/asm-powerpc/floppy.h b/include/asm-powerpc/floppy.h index 7e2d169ee85..9c8d91bf5a0 100644 --- a/include/asm-powerpc/floppy.h +++ b/include/asm-powerpc/floppy.h @@ -27,8 +27,7 @@ #define fd_disable_irq() disable_irq(FLOPPY_IRQ) #define fd_cacheflush(addr,size) /* nothing */ #define fd_request_irq() request_irq(FLOPPY_IRQ, floppy_interrupt, \ - SA_INTERRUPT|SA_SAMPLE_RANDOM, \ - "floppy", NULL) + SA_INTERRUPT, "floppy", NULL) #define fd_free_irq() free_irq(FLOPPY_IRQ, NULL); #ifdef CONFIG_PCI diff --git a/include/asm-ppc/floppy.h b/include/asm-ppc/floppy.h index 8ccd4a276fe..2ba191eba44 100644 --- a/include/asm-ppc/floppy.h +++ b/include/asm-ppc/floppy.h @@ -99,10 +99,8 @@ static int fd_request_irq(void) return request_irq(FLOPPY_IRQ, floppy_hardint,SA_INTERRUPT, "floppy", NULL); else - return request_irq(FLOPPY_IRQ, floppy_interrupt, - SA_INTERRUPT|SA_SAMPLE_RANDOM, - "floppy", NULL); - + return request_irq(FLOPPY_IRQ, floppy_interrupt, SA_INTERRUPT, + "floppy", NULL); } static int vdma_dma_setup(char *addr, unsigned long size, int mode, int io) diff --git a/include/asm-sh/floppy.h b/include/asm-sh/floppy.h index 38d7a294247..307d9ce9f9e 100644 --- a/include/asm-sh/floppy.h +++ b/include/asm-sh/floppy.h @@ -147,11 +147,10 @@ static int fd_request_irq(void) { if(can_use_virtual_dma) return request_irq(FLOPPY_IRQ, floppy_hardint,SA_INTERRUPT, - "floppy", NULL); + "floppy", NULL); else - return request_irq(FLOPPY_IRQ, floppy_interrupt, - SA_INTERRUPT|SA_SAMPLE_RANDOM, - "floppy", NULL); + return request_irq(FLOPPY_IRQ, floppy_interrupt, SA_INTERRUPT, + "floppy", NULL); } diff --git a/include/asm-x86_64/floppy.h b/include/asm-x86_64/floppy.h index 52825ce689f..006291e89b4 100644 --- a/include/asm-x86_64/floppy.h +++ b/include/asm-x86_64/floppy.h @@ -147,10 +147,8 @@ static int fd_request_irq(void) return request_irq(FLOPPY_IRQ, floppy_hardint,SA_INTERRUPT, "floppy", NULL); else - return request_irq(FLOPPY_IRQ, floppy_interrupt, - SA_INTERRUPT|SA_SAMPLE_RANDOM, - "floppy", NULL); - + return request_irq(FLOPPY_IRQ, floppy_interrupt, SA_INTERRUPT, + "floppy", NULL); } static unsigned long dma_mem_alloc(unsigned long size) -- cgit v1.2.3-70-g09d2 From e4423781850025726b6c4e24ba3d93c7ff9cd826 Mon Sep 17 00:00:00 2001 From: Richard Purdie Date: Mon, 26 Jun 2006 00:26:27 -0700 Subject: [PATCH] backlight: LOCOMO Backlight Driver updates Add backlight intensity control to the LOCOMO lcd/backlight driver using the backlight class and add basic power management support. This is a reimplementation and improvement of patches by John Lenz and Pavel Machek Signed-off-by: Richard Purdie Signed-off-by: Antonino Daplas Cc: Pavel Machek Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/arm/common/locomo.c | 45 +++++++------ drivers/video/backlight/Kconfig | 8 +++ drivers/video/backlight/Makefile | 2 +- drivers/video/backlight/locomolcd.c | 123 +++++++++++++++++++++++++++++++----- include/asm-arm/hardware/locomo.h | 5 ++ 5 files changed, 146 insertions(+), 37 deletions(-) (limited to 'include/asm-arm') diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c index a7dc1370695..0dafba3a701 100644 --- a/arch/arm/common/locomo.c +++ b/arch/arm/common/locomo.c @@ -629,21 +629,6 @@ static int locomo_resume(struct platform_device *dev) #endif -#define LCM_ALC_EN 0x8000 - -void frontlight_set(struct locomo *lchip, int duty, int vr, int bpwf) -{ - unsigned long flags; - - spin_lock_irqsave(&lchip->lock, flags); - locomo_writel(bpwf, lchip->base + LOCOMO_FRONTLIGHT + LOCOMO_ALS); - udelay(100); - locomo_writel(duty, lchip->base + LOCOMO_FRONTLIGHT + LOCOMO_ALD); - locomo_writel(bpwf | LCM_ALC_EN, lchip->base + LOCOMO_FRONTLIGHT + LOCOMO_ALS); - spin_unlock_irqrestore(&lchip->lock, flags); -} - - /** * locomo_probe - probe for a single LoCoMo chip. * @phys_addr: physical address of device. @@ -698,14 +683,10 @@ __locomo_probe(struct device *me, struct resource *mem, int irq) , lchip->base + LOCOMO_GPD); locomo_writel(0, lchip->base + LOCOMO_GIE); - /* FrontLight */ + /* Frontlight */ locomo_writel(0, lchip->base + LOCOMO_FRONTLIGHT + LOCOMO_ALS); locomo_writel(0, lchip->base + LOCOMO_FRONTLIGHT + LOCOMO_ALD); - /* Same constants can be used for collie and poodle - (depending on CONFIG options in original sharp code)? */ - frontlight_set(lchip, 163, 0, 148); - /* Longtime timer */ locomo_writel(0, lchip->base + LOCOMO_LTINT); /* SPI */ @@ -1062,6 +1043,30 @@ void locomo_m62332_senddata(struct locomo_dev *ldev, unsigned int dac_data, int spin_unlock_irqrestore(&lchip->lock, flags); } +/* + * Frontlight control + */ + +static struct locomo *locomo_chip_driver(struct locomo_dev *ldev); + +void locomo_frontlight_set(struct locomo_dev *dev, int duty, int vr, int bpwf) +{ + unsigned long flags; + struct locomo *lchip = locomo_chip_driver(dev); + + if (vr) + locomo_gpio_write(dev, LOCOMO_GPIO_FL_VR, 1); + else + locomo_gpio_write(dev, LOCOMO_GPIO_FL_VR, 0); + + spin_lock_irqsave(&lchip->lock, flags); + locomo_writel(bpwf, lchip->base + LOCOMO_FRONTLIGHT + LOCOMO_ALS); + udelay(100); + locomo_writel(duty, lchip->base + LOCOMO_FRONTLIGHT + LOCOMO_ALD); + locomo_writel(bpwf | LOCOMO_ALC_EN, lchip->base + LOCOMO_FRONTLIGHT + LOCOMO_ALS); + spin_unlock_irqrestore(&lchip->lock, flags); +} + /* * LoCoMo "Register Access Bus." * diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig index b895eaaa73f..02f15297a02 100644 --- a/drivers/video/backlight/Kconfig +++ b/drivers/video/backlight/Kconfig @@ -50,6 +50,14 @@ config BACKLIGHT_CORGI If you have a Sharp Zaurus SL-C7xx, SL-Cxx00 or SL-6000x say y to enable the backlight driver. +config BACKLIGHT_LOCOMO + tristate "Sharp LOCOMO LCD/Backlight Driver" + depends on BACKLIGHT_DEVICE && SHARP_LOCOMO + default y + help + If you have a Sharp Zaurus SL-5500 (Collie) or SL-5600 (Poodle) say y to + enable the LCD/backlight driver. + config BACKLIGHT_HP680 tristate "HP Jornada 680 Backlight Driver" depends on BACKLIGHT_DEVICE && SH_HP6XX diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile index 744210c38e7..65e5553fc84 100644 --- a/drivers/video/backlight/Makefile +++ b/drivers/video/backlight/Makefile @@ -4,4 +4,4 @@ obj-$(CONFIG_LCD_CLASS_DEVICE) += lcd.o obj-$(CONFIG_BACKLIGHT_CLASS_DEVICE) += backlight.o obj-$(CONFIG_BACKLIGHT_CORGI) += corgi_bl.o obj-$(CONFIG_BACKLIGHT_HP680) += hp680_bl.o -obj-$(CONFIG_SHARP_LOCOMO) += locomolcd.o +obj-$(CONFIG_BACKLIGHT_LOCOMO) += locomolcd.o diff --git a/drivers/video/backlight/locomolcd.c b/drivers/video/backlight/locomolcd.c index 60831bb2368..bd879b7ec11 100644 --- a/drivers/video/backlight/locomolcd.c +++ b/drivers/video/backlight/locomolcd.c @@ -17,6 +17,8 @@ #include #include #include +#include +#include #include #include @@ -25,7 +27,10 @@ #include "../../../arch/arm/mach-sa1100/generic.h" +static struct backlight_device *locomolcd_bl_device; static struct locomo_dev *locomolcd_dev; +static unsigned long locomolcd_flags; +#define LOCOMOLCD_SUSPENDED 0x01 static void locomolcd_on(int comadj) { @@ -89,12 +94,10 @@ void locomolcd_power(int on) } /* read comadj */ - if (comadj == -1) { - if (machine_is_poodle()) - comadj = 118; - if (machine_is_collie()) - comadj = 128; - } + if (comadj == -1 && machine_is_collie()) + comadj = 128; + if (comadj == -1 && machine_is_poodle()) + comadj = 118; if (on) locomolcd_on(comadj); @@ -105,26 +108,100 @@ void locomolcd_power(int on) } EXPORT_SYMBOL(locomolcd_power); -static int poodle_lcd_probe(struct locomo_dev *dev) + +static int current_intensity; + +static int locomolcd_set_intensity(struct backlight_device *bd) +{ + int intensity = bd->props->brightness; + + if (bd->props->power != FB_BLANK_UNBLANK) + intensity = 0; + if (bd->props->fb_blank != FB_BLANK_UNBLANK) + intensity = 0; + if (locomolcd_flags & LOCOMOLCD_SUSPENDED) + intensity = 0; + + switch (intensity) { + /* AC and non-AC are handled differently, but produce same results in sharp code? */ + case 0: locomo_frontlight_set(locomolcd_dev, 0, 0, 161); break; + case 1: locomo_frontlight_set(locomolcd_dev, 117, 0, 161); break; + case 2: locomo_frontlight_set(locomolcd_dev, 163, 0, 148); break; + case 3: locomo_frontlight_set(locomolcd_dev, 194, 0, 161); break; + case 4: locomo_frontlight_set(locomolcd_dev, 194, 1, 161); break; + + default: + return -ENODEV; + } + current_intensity = intensity; + return 0; +} + +static int locomolcd_get_intensity(struct backlight_device *bd) +{ + return current_intensity; +} + +static struct backlight_properties locomobl_data = { + .owner = THIS_MODULE, + .get_brightness = locomolcd_get_intensity, + .update_status = locomolcd_set_intensity, + .max_brightness = 4, +}; + +#ifdef CONFIG_PM +static int locomolcd_suspend(struct locomo_dev *dev, pm_message_t state) +{ + locomolcd_flags |= LOCOMOLCD_SUSPENDED; + locomolcd_set_intensity(locomolcd_bl_device); + return 0; +} + +static int locomolcd_resume(struct locomo_dev *dev) +{ + locomolcd_flags &= ~LOCOMOLCD_SUSPENDED; + locomolcd_set_intensity(locomolcd_bl_device); + return 0; +} +#else +#define locomolcd_suspend NULL +#define locomolcd_resume NULL +#endif + +static int locomolcd_probe(struct locomo_dev *dev) { unsigned long flags; local_irq_save(flags); locomolcd_dev = dev; + locomo_gpio_set_dir(dev, LOCOMO_GPIO_FL_VR, 0); + /* the poodle_lcd_power function is called for the first time * from fs_initcall, which is before locomo is activated. * We need to recall poodle_lcd_power here*/ -#ifdef CONFIG_MACH_POODLE - locomolcd_power(1); -#endif + if (machine_is_poodle()) + locomolcd_power(1); + local_irq_restore(flags); + + locomolcd_bl_device = backlight_device_register("locomo-bl", NULL, &locomobl_data); + + if (IS_ERR (locomolcd_bl_device)) + return PTR_ERR (locomolcd_bl_device); + + /* Set up frontlight so that screen is readable */ + locomobl_data.brightness = 2; + locomolcd_set_intensity(locomolcd_bl_device); + return 0; } -static int poodle_lcd_remove(struct locomo_dev *dev) +static int locomolcd_remove(struct locomo_dev *dev) { unsigned long flags; + + backlight_device_unregister(locomolcd_bl_device); local_irq_save(flags); locomolcd_dev = NULL; local_irq_restore(flags); @@ -136,19 +213,33 @@ static struct locomo_driver poodle_lcd_driver = { .name = "locomo-backlight", }, .devid = LOCOMO_DEVID_BACKLIGHT, - .probe = poodle_lcd_probe, - .remove = poodle_lcd_remove, + .probe = locomolcd_probe, + .remove = locomolcd_remove, + .suspend = locomolcd_suspend, + .resume = locomolcd_resume, }; -static int __init poodle_lcd_init(void) + +static int __init locomolcd_init(void) { int ret = locomo_driver_register(&poodle_lcd_driver); - if (ret) return ret; + if (ret) + return ret; #ifdef CONFIG_SA1100_COLLIE sa1100fb_lcd_power = locomolcd_power; #endif return 0; } -device_initcall(poodle_lcd_init); +static void __exit locomolcd_exit(void) +{ + locomo_driver_unregister(&poodle_lcd_driver); +} + +module_init(locomolcd_init); +module_exit(locomolcd_exit); + +MODULE_AUTHOR("John Lenz , Pavel Machek "); +MODULE_DESCRIPTION("Collie LCD driver"); +MODULE_LICENSE("GPL"); diff --git a/include/asm-arm/hardware/locomo.h b/include/asm-arm/hardware/locomo.h index 5f10048ec54..22dfb173776 100644 --- a/include/asm-arm/hardware/locomo.h +++ b/include/asm-arm/hardware/locomo.h @@ -111,6 +111,8 @@ #define LOCOMO_ALS 0x00 /* Adjust light cycle */ #define LOCOMO_ALD 0x04 /* Adjust light duty */ +#define LOCOMO_ALC_EN 0x8000 + /* Backlight controller: TFT signal */ #define LOCOMO_BACKLIGHT 0x38 #define LOCOMO_TC 0x00 /* TFT control signal */ @@ -203,4 +205,7 @@ void locomo_gpio_write(struct locomo_dev *ldev, unsigned int bits, unsigned int /* M62332 control function */ void locomo_m62332_senddata(struct locomo_dev *ldev, unsigned int dac_data, int channel); +/* Frontlight control */ +void locomo_frontlight_set(struct locomo_dev *dev, int duty, int vr, int bpwf); + #endif -- cgit v1.2.3-70-g09d2 From 2c06a0821711a53d51a3d0492a9be0671b7152e5 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Tue, 27 Jun 2006 14:35:46 +0100 Subject: [MTD NAND] s3c2412 support in s3c2410.c Add support for both the S3C2412 and S3C2412 Samsung SoCs to the increasingly mis-named s3c2410.c driver. This currently only supports SLC ECCs, and a chip on nFCE0. Signed-off-by: Ben Dooks Signed-off-by: David Woodhouse --- drivers/mtd/nand/s3c2410.c | 154 ++++++++++++++++++++++--------- include/asm-arm/arch-s3c2410/regs-nand.h | 48 +++++++++- 2 files changed, 158 insertions(+), 44 deletions(-) (limited to 'include/asm-arm') diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c index 5219bd212cf..ff5cef24d5b 100644 --- a/drivers/mtd/nand/s3c2410.c +++ b/drivers/mtd/nand/s3c2410.c @@ -97,6 +97,12 @@ struct s3c2410_nand_mtd { int scan_res; }; +enum s3c_cpu_type { + TYPE_S3C2410, + TYPE_S3C2412, + TYPE_S3C2440, +}; + /* overview of the s3c2410 nand state */ struct s3c2410_nand_info { @@ -110,9 +116,11 @@ struct s3c2410_nand_info { struct resource *area; struct clk *clk; void __iomem *regs; + void __iomem *sel_reg; + int sel_bit; int mtd_count; - unsigned char is_s3c2440; + enum s3c_cpu_type cpu_type; }; /* conversion functions */ @@ -146,7 +154,7 @@ static inline int allow_clk_stop(struct s3c2410_nand_info *info) #define NS_IN_KHZ 1000000 -static int s3c2410_nand_calc_rate(int wanted, unsigned long clk, int max) +static int s3c_nand_calc_rate(int wanted, unsigned long clk, int max) { int result; @@ -170,24 +178,26 @@ static int s3c2410_nand_calc_rate(int wanted, unsigned long clk, int max) /* controller setup */ -static int s3c2410_nand_inithw(struct s3c2410_nand_info *info, struct platform_device *pdev) +static int s3c2410_nand_inithw(struct s3c2410_nand_info *info, + struct platform_device *pdev) { struct s3c2410_platform_nand *plat = to_nand_plat(pdev); unsigned long clkrate = clk_get_rate(info->clk); + int tacls_max = (info->cpu_type == TYPE_S3C2412) ? 8 : 4; int tacls, twrph0, twrph1; - unsigned long cfg; + unsigned long cfg = 0; /* calculate the timing information for the controller */ clkrate /= 1000; /* turn clock into kHz for ease of use */ if (plat != NULL) { - tacls = s3c2410_nand_calc_rate(plat->tacls, clkrate, 4); - twrph0 = s3c2410_nand_calc_rate(plat->twrph0, clkrate, 8); - twrph1 = s3c2410_nand_calc_rate(plat->twrph1, clkrate, 8); + tacls = s3c_nand_calc_rate(plat->tacls, clkrate, tacls_max); + twrph0 = s3c_nand_calc_rate(plat->twrph0, clkrate, 8); + twrph1 = s3c_nand_calc_rate(plat->twrph1, clkrate, 8); } else { /* default timings */ - tacls = 4; + tacls = tacls_max; twrph0 = 8; twrph1 = 8; } @@ -200,20 +210,23 @@ static int s3c2410_nand_inithw(struct s3c2410_nand_info *info, struct platform_d dev_info(info->device, "Tacls=%d, %dns Twrph0=%d %dns, Twrph1=%d %dns\n", tacls, to_ns(tacls, clkrate), twrph0, to_ns(twrph0, clkrate), twrph1, to_ns(twrph1, clkrate)); - if (!info->is_s3c2440) { + switch (info->cpu_type) { + case TYPE_S3C2410: cfg = S3C2410_NFCONF_EN; cfg |= S3C2410_NFCONF_TACLS(tacls - 1); cfg |= S3C2410_NFCONF_TWRPH0(twrph0 - 1); cfg |= S3C2410_NFCONF_TWRPH1(twrph1 - 1); - } else { + break; + + case TYPE_S3C2440: + case TYPE_S3C2412: cfg = S3C2440_NFCONF_TACLS(tacls - 1); cfg |= S3C2440_NFCONF_TWRPH0(twrph0 - 1); cfg |= S3C2440_NFCONF_TWRPH1(twrph1 - 1); /* enable the controller and de-assert nFCE */ - writel(S3C2440_NFCONT_ENABLE | S3C2440_NFCONT_ENABLE, - info->regs + S3C2440_NFCONT); + writel(S3C2440_NFCONT_ENABLE, info->regs + S3C2440_NFCONT); } dev_dbg(info->device, "NF_CONF is 0x%lx\n", cfg); @@ -229,23 +242,18 @@ static void s3c2410_nand_select_chip(struct mtd_info *mtd, int chip) struct s3c2410_nand_info *info; struct s3c2410_nand_mtd *nmtd; struct nand_chip *this = mtd->priv; - void __iomem *reg; unsigned long cur; - unsigned long bit; nmtd = this->priv; info = nmtd->info; - bit = (info->is_s3c2440) ? S3C2440_NFCONT_nFCE : S3C2410_NFCONF_nFCE; - reg = info->regs + ((info->is_s3c2440) ? S3C2440_NFCONT : S3C2410_NFCONF); - if (chip != -1 && allow_clk_stop(info)) clk_enable(info->clk); - cur = readl(reg); + cur = readl(info->sel_reg); if (chip == -1) { - cur |= bit; + cur |= info->sel_bit; } else { if (nmtd->set != NULL && chip > nmtd->set->nr_chips) { dev_err(info->device, "invalid chip %d\n", chip); @@ -257,10 +265,10 @@ static void s3c2410_nand_select_chip(struct mtd_info *mtd, int chip) (info->platform->select_chip) (nmtd->set, chip); } - cur &= ~bit; + cur &= ~info->sel_bit; } - writel(cur, reg); + writel(cur, info->sel_reg); if (chip == -1 && allow_clk_stop(info)) clk_disable(info->clk); @@ -309,15 +317,25 @@ static void s3c2440_nand_hwcontrol(struct mtd_info *mtd, int cmd, static int s3c2410_nand_devready(struct mtd_info *mtd) { struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); - - if (info->is_s3c2440) - return readb(info->regs + S3C2440_NFSTAT) & S3C2440_NFSTAT_READY; return readb(info->regs + S3C2410_NFSTAT) & S3C2410_NFSTAT_BUSY; } +static int s3c2440_nand_devready(struct mtd_info *mtd) +{ + struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); + return readb(info->regs + S3C2440_NFSTAT) & S3C2440_NFSTAT_READY; +} + +static int s3c2412_nand_devready(struct mtd_info *mtd) +{ + struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); + return readb(info->regs + S3C2412_NFSTAT) & S3C2412_NFSTAT_READY; +} + /* ECC handling functions */ -static int s3c2410_nand_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc) +static int s3c2410_nand_correct_data(struct mtd_info *mtd, u_char *dat, + u_char *read_ecc, u_char *calc_ecc) { pr_debug("s3c2410_nand_correct_data(%p,%p,%p,%p)\n", mtd, dat, read_ecc, calc_ecc); @@ -485,11 +503,8 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info, struct s3c2410_nand_set *set) { struct nand_chip *chip = &nmtd->chip; + void __iomem *regs = info->regs; - chip->IO_ADDR_R = info->regs + S3C2410_NFDATA; - chip->IO_ADDR_W = info->regs + S3C2410_NFDATA; - chip->cmd_ctrl = s3c2410_nand_hwcontrol; - chip->dev_ready = s3c2410_nand_devready; chip->write_buf = s3c2410_nand_write_buf; chip->read_buf = s3c2410_nand_read_buf; chip->select_chip = s3c2410_nand_select_chip; @@ -498,11 +513,37 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info, chip->options = 0; chip->controller = &info->controller; - if (info->is_s3c2440) { - chip->IO_ADDR_R = info->regs + S3C2440_NFDATA; - chip->IO_ADDR_W = info->regs + S3C2440_NFDATA; - chip->cmd_ctrl = s3c2440_nand_hwcontrol; - } + switch (info->cpu_type) { + case TYPE_S3C2410: + chip->IO_ADDR_W = regs + S3C2410_NFDATA; + info->sel_reg = regs + S3C2410_NFCONF; + info->sel_bit = S3C2410_NFCONF_nFCE; + chip->cmd_ctrl = s3c2410_nand_hwcontrol; + chip->dev_ready = s3c2410_nand_devready; + break; + + case TYPE_S3C2440: + chip->IO_ADDR_W = regs + S3C2440_NFDATA; + info->sel_reg = regs + S3C2440_NFCONT; + info->sel_bit = S3C2440_NFCONT_nFCE; + chip->cmd_ctrl = s3c2440_nand_hwcontrol; + chip->dev_ready = s3c2440_nand_devready; + break; + + case TYPE_S3C2412: + chip->IO_ADDR_W = regs + S3C2440_NFDATA; + info->sel_reg = regs + S3C2440_NFCONT; + info->sel_bit = S3C2412_NFCONT_nFCE0; + chip->cmd_ctrl = s3c2440_nand_hwcontrol; + chip->dev_ready = s3c2412_nand_devready; + + if (readl(regs + S3C2410_NFCONF) & S3C2412_NFCONF_NANDBOOT) + dev_info(info->device, "System booted from NAND\n"); + + break; + } + + chip->IO_ADDR_R = chip->IO_ADDR_W; nmtd->info = info; nmtd->mtd.priv = chip; @@ -510,17 +551,25 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info, nmtd->set = set; if (hardware_ecc) { - chip->ecc.correct = s3c2410_nand_correct_data; - chip->ecc.hwctl = s3c2410_nand_enable_hwecc; chip->ecc.calculate = s3c2410_nand_calculate_ecc; + chip->ecc.correct = s3c2410_nand_correct_data; chip->ecc.mode = NAND_ECC_HW; chip->ecc.size = 512; chip->ecc.bytes = 3; chip->ecc.layout = &nand_hw_eccoob; - if (info->is_s3c2440) { - chip->ecc.hwctl = s3c2440_nand_enable_hwecc; - chip->ecc.calculate = s3c2440_nand_calculate_ecc; + switch (info->cpu_type) { + case TYPE_S3C2410: + chip->ecc.hwctl = s3c2410_nand_enable_hwecc; + chip->ecc.calculate = s3c2410_nand_calculate_ecc; + break; + + case TYPE_S3C2412: + case TYPE_S3C2440: + chip->ecc.hwctl = s3c2440_nand_enable_hwecc; + chip->ecc.calculate = s3c2440_nand_calculate_ecc; + break; + } } else { chip->ecc.mode = NAND_ECC_SOFT; @@ -535,7 +584,8 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info, * nand layer to look for devices */ -static int s3c24xx_nand_probe(struct platform_device *pdev, int is_s3c2440) +static int s3c24xx_nand_probe(struct platform_device *pdev, + enum s3c_cpu_type cpu_type) { struct s3c2410_platform_nand *plat = to_nand_plat(pdev); struct s3c2410_nand_info *info; @@ -590,7 +640,7 @@ static int s3c24xx_nand_probe(struct platform_device *pdev, int is_s3c2440) info->device = &pdev->dev; info->platform = plat; info->regs = ioremap(res->start, size); - info->is_s3c2440 = is_s3c2440; + info->cpu_type = cpu_type; if (info->regs == NULL) { dev_err(&pdev->dev, "cannot reserve register region\n"); @@ -697,12 +747,17 @@ static int s3c24xx_nand_resume(struct platform_device *dev) static int s3c2410_nand_probe(struct platform_device *dev) { - return s3c24xx_nand_probe(dev, 0); + return s3c24xx_nand_probe(dev, TYPE_S3C2410); } static int s3c2440_nand_probe(struct platform_device *dev) { - return s3c24xx_nand_probe(dev, 1); + return s3c24xx_nand_probe(dev, TYPE_S3C2440); +} + +static int s3c2412_nand_probe(struct platform_device *dev) +{ + return s3c24xx_nand_probe(dev, TYPE_S3C2412); } static struct platform_driver s3c2410_nand_driver = { @@ -727,16 +782,29 @@ static struct platform_driver s3c2440_nand_driver = { }, }; +static struct platform_driver s3c2412_nand_driver = { + .probe = s3c2412_nand_probe, + .remove = s3c2410_nand_remove, + .suspend = s3c24xx_nand_suspend, + .resume = s3c24xx_nand_resume, + .driver = { + .name = "s3c2412-nand", + .owner = THIS_MODULE, + }, +}; + static int __init s3c2410_nand_init(void) { printk("S3C24XX NAND Driver, (c) 2004 Simtec Electronics\n"); + platform_driver_register(&s3c2412_nand_driver); platform_driver_register(&s3c2440_nand_driver); return platform_driver_register(&s3c2410_nand_driver); } static void __exit s3c2410_nand_exit(void) { + platform_driver_unregister(&s3c2412_nand_driver); platform_driver_unregister(&s3c2440_nand_driver); platform_driver_unregister(&s3c2410_nand_driver); } diff --git a/include/asm-arm/arch-s3c2410/regs-nand.h b/include/asm-arm/arch-s3c2410/regs-nand.h index 7cff235e667..c1470c695c3 100644 --- a/include/asm-arm/arch-s3c2410/regs-nand.h +++ b/include/asm-arm/arch-s3c2410/regs-nand.h @@ -39,10 +39,19 @@ #define S3C2440_NFESTAT1 S3C2410_NFREG(0x28) #define S3C2440_NFMECC0 S3C2410_NFREG(0x2C) #define S3C2440_NFMECC1 S3C2410_NFREG(0x30) -#define S3C2440_NFSECC S3C2410_NFREG(0x34) +#define S3C2440_NFSECC S3C24E10_NFREG(0x34) #define S3C2440_NFSBLK S3C2410_NFREG(0x38) #define S3C2440_NFEBLK S3C2410_NFREG(0x3C) +#define S3C2412_NFSBLK S3C2410_NFREG(0x20) +#define S3C2412_NFEBLK S3C2410_NFREG(0x24) +#define S3C2412_NFSTAT S3C2410_NFREG(0x28) +#define S3C2412_NFMECC_ERR0 S3C2410_NFREG(0x2C) +#define S3C2412_NFMECC_ERR1 S3C2410_NFREG(0x30) +#define S3C2412_NFMECC0 S3C2410_NFREG(0x34) +#define S3C2412_NFMECC1 S3C2410_NFREG(0x38) +#define S3C2412_NFSECC S3C2410_NFREG(0x3C) + #define S3C2410_NFCONF_EN (1<<15) #define S3C2410_NFCONF_512BYTE (1<<14) #define S3C2410_NFCONF_4STEP (1<<13) @@ -77,5 +86,42 @@ #define S3C2440_NFSTAT_RnB_CHANGE (1<<2) #define S3C2440_NFSTAT_ILLEGAL_ACCESS (1<<3) +#define S3C2412_NFCONF_NANDBOOT (1<<31) +#define S3C2412_NFCONF_ECCCLKCON (1<<30) +#define S3C2412_NFCONF_ECC_MLC (1<<24) +#define S3C2412_NFCONF_TACLS_MASK (7<<12) /* 1 extra bit of Tacls */ + +#define S3C2412_NFCONT_ECC4_DIRWR (1<<18) +#define S3C2412_NFCONT_LOCKTIGHT (1<<17) +#define S3C2412_NFCONT_SOFTLOCK (1<<16) +#define S3C2412_NFCONT_ECC4_ENCINT (1<<13) +#define S3C2412_NFCONT_ECC4_DECINT (1<<12) +#define S3C2412_NFCONT_MAIN_ECC_LOCK (1<<7) +#define S3C2412_NFCONT_INIT_MAIN_ECC (1<<5) +#define S3C2412_NFCONT_nFCE1 (1<<2) +#define S3C2412_NFCONT_nFCE0 (1<<1) + +#define S3C2412_NFSTAT_ECC_ENCDONE (1<<7) +#define S3C2412_NFSTAT_ECC_DECDONE (1<<6) +#define S3C2412_NFSTAT_ILLEGAL_ACCESS (1<<5) +#define S3C2412_NFSTAT_RnB_CHANGE (1<<4) +#define S3C2412_NFSTAT_nFCE1 (1<<3) +#define S3C2412_NFSTAT_nFCE0 (1<<2) +#define S3C2412_NFSTAT_Res1 (1<<1) +#define S3C2412_NFSTAT_READY (1<<0) + +#define S3C2412_NFECCERR_SERRDATA(x) (((x) >> 21) & 0xf) +#define S3C2412_NFECCERR_SERRBIT(x) (((x) >> 18) & 0x7) +#define S3C2412_NFECCERR_MERRDATA(x) (((x) >> 7) & 0x3ff) +#define S3C2412_NFECCERR_MERRBIT(x) (((x) >> 4) & 0x7) +#define S3C2412_NFECCERR_SPARE_ERR(x) (((x) >> 2) & 0x3) +#define S3C2412_NFECCERR_MAIN_ERR(x) (((x) >> 2) & 0x3) +#define S3C2412_NFECCERR_NONE (0) +#define S3C2412_NFECCERR_1BIT (1) +#define S3C2412_NFECCERR_MULTIBIT (2) +#define S3C2412_NFECCERR_ECCAREA (3) + + + #endif /* __ASM_ARM_REGS_NAND */ -- cgit v1.2.3-70-g09d2 From e31dd6e4520439ceae4753f32dd2da2c345e929a Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Mon, 12 Jun 2006 17:06:02 -0700 Subject: [PATCH] 64bit resource: change pci core and arch code to use resource_size_t Based on a patch series originally from Vivek Goyal Cc: Vivek Goyal Signed-off-by: Andrew Morton Signed-off-by: Greg Kroah-Hartman --- arch/alpha/kernel/pci.c | 4 ++-- arch/arm/kernel/bios32.c | 6 +++--- arch/cris/arch-v32/drivers/pci/bios.c | 4 ++-- arch/frv/mb93090-mb00/pci-frv.c | 4 ++-- arch/i386/pci/i386.c | 4 ++-- arch/ia64/pci/pci.c | 2 +- arch/m68knommu/kernel/comempci.c | 3 ++- arch/mips/pci/pci.c | 4 ++-- arch/mips/pmc-sierra/yosemite/ht.c | 4 ++-- arch/parisc/kernel/pci.c | 2 +- arch/powerpc/kernel/pci_32.c | 10 +++++----- arch/powerpc/kernel/pci_64.c | 4 ++-- arch/ppc/kernel/pci.c | 12 ++++++------ arch/sh/boards/mpc1211/pci.c | 4 ++-- arch/sh/boards/overdrive/galileo.c | 2 +- arch/sh/drivers/pci/pci.c | 6 +++--- arch/sh64/kernel/pcibios.c | 4 ++-- arch/sparc/kernel/pcic.c | 2 +- arch/sparc64/kernel/pci.c | 2 +- arch/v850/kernel/rte_mb_a_pci.c | 2 +- arch/xtensa/kernel/pci.c | 6 +++--- drivers/pci/bus.c | 10 +++++----- drivers/pci/pci-sysfs.c | 4 ++-- drivers/pci/pci.h | 6 +++--- drivers/pci/proc.c | 4 ++-- drivers/pci/rom.c | 10 +++++----- drivers/pci/setup-res.c | 6 +++--- include/asm-arm/mach/pci.h | 2 +- include/asm-powerpc/pci.h | 2 +- include/asm-ppc/pci.h | 2 +- include/linux/pci.h | 13 +++++++------ 31 files changed, 76 insertions(+), 74 deletions(-) (limited to 'include/asm-arm') diff --git a/arch/alpha/kernel/pci.c b/arch/alpha/kernel/pci.c index 2a8b364c822..4ea6711e55a 100644 --- a/arch/alpha/kernel/pci.c +++ b/arch/alpha/kernel/pci.c @@ -124,12 +124,12 @@ DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, pcibios_fixup_final); void pcibios_align_resource(void *data, struct resource *res, - unsigned long size, unsigned long align) + resource_size_t size, resource_size_t align) { struct pci_dev *dev = data; struct pci_controller *hose = dev->sysdata; unsigned long alignto; - unsigned long start = res->start; + resource_size_t start = res->start; if (res->flags & IORESOURCE_IO) { /* Make sure we start at our min on all hoses */ diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c index 302fc140154..45da06fc1ba 100644 --- a/arch/arm/kernel/bios32.c +++ b/arch/arm/kernel/bios32.c @@ -304,7 +304,7 @@ static inline int pdev_bad_for_parity(struct pci_dev *dev) static void __devinit pdev_fixup_device_resources(struct pci_sys_data *root, struct pci_dev *dev) { - unsigned long offset; + resource_size_t offset; int i; for (i = 0; i < PCI_NUM_RESOURCES; i++) { @@ -634,9 +634,9 @@ char * __init pcibios_setup(char *str) * which might be mirrored at 0x0100-0x03ff.. */ void pcibios_align_resource(void *data, struct resource *res, - unsigned long size, unsigned long align) + resource_size_t size, resource_size_t align) { - unsigned long start = res->start; + resource_size_t start = res->start; if (res->flags & IORESOURCE_IO && start & 0x300) start = (start + 0x3ff) & ~0x3ff; diff --git a/arch/cris/arch-v32/drivers/pci/bios.c b/arch/cris/arch-v32/drivers/pci/bios.c index 1e9d062103a..a2b9c60c277 100644 --- a/arch/cris/arch-v32/drivers/pci/bios.c +++ b/arch/cris/arch-v32/drivers/pci/bios.c @@ -43,10 +43,10 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, void pcibios_align_resource(void *data, struct resource *res, - unsigned long size, unsigned long align) + resource_size_t size, resource_size_t align) { if (res->flags & IORESOURCE_IO) { - unsigned long start = res->start; + resource_size_t start = res->start; if (start & 0x300) { start = (start + 0x3ff) & ~0x3ff; diff --git a/arch/frv/mb93090-mb00/pci-frv.c b/arch/frv/mb93090-mb00/pci-frv.c index 0a26bf6f1cd..4f165c93be4 100644 --- a/arch/frv/mb93090-mb00/pci-frv.c +++ b/arch/frv/mb93090-mb00/pci-frv.c @@ -64,10 +64,10 @@ pcibios_update_resource(struct pci_dev *dev, struct resource *root, */ void pcibios_align_resource(void *data, struct resource *res, - unsigned long size, unsigned long align) + resource_size_t size, resource_size_t align) { if (res->flags & IORESOURCE_IO) { - unsigned long start = res->start; + resource_size_t start = res->start; if (start & 0x300) { start = (start + 0x3ff) & ~0x3ff; diff --git a/arch/i386/pci/i386.c b/arch/i386/pci/i386.c index a151f7a99f5..10154a2cac6 100644 --- a/arch/i386/pci/i386.c +++ b/arch/i386/pci/i386.c @@ -48,10 +48,10 @@ */ void pcibios_align_resource(void *data, struct resource *res, - unsigned long size, unsigned long align) + resource_size_t size, resource_size_t align) { if (res->flags & IORESOURCE_IO) { - unsigned long start = res->start; + resource_size_t start = res->start; if (start & 0x300) { start = (start + 0x3ff) & ~0x3ff; diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c index 77375a55da3..5bef0e3603f 100644 --- a/arch/ia64/pci/pci.c +++ b/arch/ia64/pci/pci.c @@ -568,7 +568,7 @@ pcibios_disable_device (struct pci_dev *dev) void pcibios_align_resource (void *data, struct resource *res, - unsigned long size, unsigned long align) + resource_size_t size, resource_size_t align) { } diff --git a/arch/m68knommu/kernel/comempci.c b/arch/m68knommu/kernel/comempci.c index 8670938f110..db7a0c1ceba 100644 --- a/arch/m68knommu/kernel/comempci.c +++ b/arch/m68knommu/kernel/comempci.c @@ -357,7 +357,8 @@ void pcibios_fixup_bus(struct pci_bus *b) /*****************************************************************************/ -void pcibios_align_resource(void *data, struct resource *res, unsigned long size, unsigned long align) +void pcibios_align_resource(void *data, struct resource *res, + resource_size_t size, resource_size_t align) { } diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c index 4dfce154d4a..ba66f8c9bd4 100644 --- a/arch/mips/pci/pci.c +++ b/arch/mips/pci/pci.c @@ -51,11 +51,11 @@ unsigned long PCIBIOS_MIN_MEM = 0; */ void pcibios_align_resource(void *data, struct resource *res, - unsigned long size, unsigned long align) + resource_size_t size, resource_size_t align) { struct pci_dev *dev = data; struct pci_controller *hose = dev->sysdata; - unsigned long start = res->start; + resource_size_t start = res->start; if (res->flags & IORESOURCE_IO) { /* Make sure we start at our min on all hoses */ diff --git a/arch/mips/pmc-sierra/yosemite/ht.c b/arch/mips/pmc-sierra/yosemite/ht.c index 54b65a80abf..fb523ebcafa 100644 --- a/arch/mips/pmc-sierra/yosemite/ht.c +++ b/arch/mips/pmc-sierra/yosemite/ht.c @@ -383,12 +383,12 @@ void pcibios_update_resource(struct pci_dev *dev, struct resource *root, void pcibios_align_resource(void *data, struct resource *res, - unsigned long size, unsigned long align) + resource_size_t size, resource_size_t align) { struct pci_dev *dev = data; if (res->flags & IORESOURCE_IO) { - unsigned long start = res->start; + resource_size_t start = res->start; /* We need to avoid collisions with `mirrored' VGA ports and other strange ISA hardware, so we always want the diff --git a/arch/parisc/kernel/pci.c b/arch/parisc/kernel/pci.c index 79c7db2705f..7d6967ee367 100644 --- a/arch/parisc/kernel/pci.c +++ b/arch/parisc/kernel/pci.c @@ -289,7 +289,7 @@ EXPORT_SYMBOL(pcibios_bus_to_resource); * than res->start. */ void pcibios_align_resource(void *data, struct resource *res, - unsigned long size, unsigned long alignment) + resource_size_t size, resource_size_t alignment) { unsigned long mask, align; diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c index d9e2506db5f..8474355a1a4 100644 --- a/arch/powerpc/kernel/pci_32.c +++ b/arch/powerpc/kernel/pci_32.c @@ -173,18 +173,18 @@ EXPORT_SYMBOL(pcibios_bus_to_resource); * but we want to try to avoid allocating at 0x2900-0x2bff * which might have be mirrored at 0x0100-0x03ff.. */ -void pcibios_align_resource(void *data, struct resource *res, unsigned long size, - unsigned long align) +void pcibios_align_resource(void *data, struct resource *res, + resource_size_t size, resource_size_t align) { struct pci_dev *dev = data; if (res->flags & IORESOURCE_IO) { - unsigned long start = res->start; + resource_size_t start = res->start; if (size > 0x100) { printk(KERN_ERR "PCI: I/O Region %s/%d too large" " (%lld bytes)\n", pci_name(dev), - dev->resource - res, size); + dev->resource - res, (unsigned long long)size); } if (start & 0x300) { @@ -1756,7 +1756,7 @@ long sys_pciconfig_iobase(long which, unsigned long bus, unsigned long devfn) void pci_resource_to_user(const struct pci_dev *dev, int bar, const struct resource *rsrc, - u64 *start, u64 *end) + resource_size_t *start, resource_size_t *end) { struct pci_controller *hose = pci_bus_to_hose(dev->bus->number); unsigned long offset = 0; diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c index 247937dd8b7..286aa52aae3 100644 --- a/arch/powerpc/kernel/pci_64.c +++ b/arch/powerpc/kernel/pci_64.c @@ -138,11 +138,11 @@ EXPORT_SYMBOL(pcibios_bus_to_resource); * which might have be mirrored at 0x0100-0x03ff.. */ void pcibios_align_resource(void *data, struct resource *res, - unsigned long size, unsigned long align) + resource_size_t size, resource_size_t align) { struct pci_dev *dev = data; struct pci_controller *hose = pci_bus_to_host(dev->bus); - unsigned long start = res->start; + resource_size_t start = res->start; unsigned long alignto; if (res->flags & IORESOURCE_IO) { diff --git a/arch/ppc/kernel/pci.c b/arch/ppc/kernel/pci.c index 8544e100d71..242bb052be6 100644 --- a/arch/ppc/kernel/pci.c +++ b/arch/ppc/kernel/pci.c @@ -171,13 +171,13 @@ EXPORT_SYMBOL(pcibios_bus_to_resource); * but we want to try to avoid allocating at 0x2900-0x2bff * which might have be mirrored at 0x0100-0x03ff.. */ -void pcibios_align_resource(void *data, struct resource *res, unsigned long size, - unsigned long align) +void pcibios_align_resource(void *data, struct resource *res, + resource_size_t size, resource_size_t align) { struct pci_dev *dev = data; if (res->flags & IORESOURCE_IO) { - unsigned long start = res->start; + resource_size_t start = res->start; if (size > 0x100) { printk(KERN_ERR "PCI: I/O Region %s/%d too large" @@ -960,8 +960,8 @@ static pgprot_t __pci_mmap_set_pgprot(struct pci_dev *dev, struct resource *rp, else prot |= _PAGE_GUARDED; - printk("PCI map for %s:%llx, prot: %llx\n", pci_name(dev), rp->start, - prot); + printk("PCI map for %s:%llx, prot: %lx\n", pci_name(dev), + (unsigned long long)rp->start, prot); return __pgprot(prot); } @@ -1130,7 +1130,7 @@ long sys_pciconfig_iobase(long which, unsigned long bus, unsigned long devfn) void pci_resource_to_user(const struct pci_dev *dev, int bar, const struct resource *rsrc, - u64 *start, u64 *end) + resource_size_t *start, resource_size_t *end) { struct pci_controller *hose = pci_bus_to_hose(dev->bus->number); unsigned long offset = 0; diff --git a/arch/sh/boards/mpc1211/pci.c b/arch/sh/boards/mpc1211/pci.c index ba3a6543975..9f7ccd33ffb 100644 --- a/arch/sh/boards/mpc1211/pci.c +++ b/arch/sh/boards/mpc1211/pci.c @@ -273,9 +273,9 @@ void __init pcibios_fixup_irqs(void) } void pcibios_align_resource(void *data, struct resource *res, - unsigned long size, unsigned long align) + resource_size_t size, resource_size_t align) { - unsigned long start = res->start; + resource_size_t start = res->start; if (res->flags & IORESOURCE_IO) { if (start >= 0x10000UL) { diff --git a/arch/sh/boards/overdrive/galileo.c b/arch/sh/boards/overdrive/galileo.c index 276fa11ee4c..b055809d2ac 100644 --- a/arch/sh/boards/overdrive/galileo.c +++ b/arch/sh/boards/overdrive/galileo.c @@ -536,7 +536,7 @@ void __init pcibios_fixup_bus(struct pci_bus *bus) } void pcibios_align_resource(void *data, struct resource *res, - unsigned long size) + resource_size_t size) { } diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c index c1669905abe..3d546ba329c 100644 --- a/arch/sh/drivers/pci/pci.c +++ b/arch/sh/drivers/pci/pci.c @@ -75,7 +75,7 @@ pcibios_update_resource(struct pci_dev *dev, struct resource *root, } void pcibios_align_resource(void *data, struct resource *res, - unsigned long size, unsigned long align) + resource_size_t size, resource_size_t align) __attribute__ ((weak)); /* @@ -85,10 +85,10 @@ void pcibios_align_resource(void *data, struct resource *res, * modulo 0x400. */ void pcibios_align_resource(void *data, struct resource *res, - unsigned long size, unsigned long align) + resource_size_t size, resource_size_t align) { if (res->flags & IORESOURCE_IO) { - unsigned long start = res->start; + resource_size_t start = res->start; if (start & 0x300) { start = (start + 0x3ff) & ~0x3ff; diff --git a/arch/sh64/kernel/pcibios.c b/arch/sh64/kernel/pcibios.c index 50c61dcb9fa..945920bc24d 100644 --- a/arch/sh64/kernel/pcibios.c +++ b/arch/sh64/kernel/pcibios.c @@ -69,10 +69,10 @@ pcibios_update_resource(struct pci_dev *dev, struct resource *root, * modulo 0x400. */ void pcibios_align_resource(void *data, struct resource *res, - unsigned long size, unsigned long align) + resource_size_t size, resource_size_t align) { if (res->flags & IORESOURCE_IO) { - unsigned long start = res->start; + resource_size_t start = res->start; if (start & 0x300) { start = (start + 0x3ff) & ~0x3ff; diff --git a/arch/sparc/kernel/pcic.c b/arch/sparc/kernel/pcic.c index bcfdddd0418..5df3ebdc0ab 100644 --- a/arch/sparc/kernel/pcic.c +++ b/arch/sparc/kernel/pcic.c @@ -860,7 +860,7 @@ char * __init pcibios_setup(char *str) } void pcibios_align_resource(void *data, struct resource *res, - unsigned long size, unsigned long align) + resource_size_t size, resource_size_t align) { } diff --git a/arch/sparc64/kernel/pci.c b/arch/sparc64/kernel/pci.c index 6c9e3e94aba..20ca9ec8fd3 100644 --- a/arch/sparc64/kernel/pci.c +++ b/arch/sparc64/kernel/pci.c @@ -357,7 +357,7 @@ void pcibios_update_irq(struct pci_dev *pdev, int irq) } void pcibios_align_resource(void *data, struct resource *res, - unsigned long size, unsigned long align) + resource_size_t size, resource_size_t align) { } diff --git a/arch/v850/kernel/rte_mb_a_pci.c b/arch/v850/kernel/rte_mb_a_pci.c index ffbb6d073bf..3a7c5c9c3ac 100644 --- a/arch/v850/kernel/rte_mb_a_pci.c +++ b/arch/v850/kernel/rte_mb_a_pci.c @@ -329,7 +329,7 @@ void pcibios_fixup_bus(struct pci_bus *b) void pcibios_align_resource (void *data, struct resource *res, - unsigned long size, unsigned long align) + resource_size_t size, resource_size_t align) { } diff --git a/arch/xtensa/kernel/pci.c b/arch/xtensa/kernel/pci.c index c6f471b9eaa..eda029fc897 100644 --- a/arch/xtensa/kernel/pci.c +++ b/arch/xtensa/kernel/pci.c @@ -71,13 +71,13 @@ static int pci_bus_count; * which might have be mirrored at 0x0100-0x03ff.. */ void -pcibios_align_resource(void *data, struct resource *res, unsigned long size, - unsigned long align) +pcibios_align_resource(void *data, struct resource *res, resource_size_t size, + resource_size_t align) { struct pci_dev *dev = data; if (res->flags & IORESOURCE_IO) { - unsigned long start = res->start; + resource_size_t start = res->start; if (size > 0x100) { printk(KERN_ERR "PCI: I/O Region %s/%d too large" diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c index 72309268202..5f7db9d2436 100644 --- a/drivers/pci/bus.c +++ b/drivers/pci/bus.c @@ -34,11 +34,11 @@ */ int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res, - unsigned long size, unsigned long align, unsigned long min, - unsigned int type_mask, - void (*alignf)(void *, struct resource *, - unsigned long, unsigned long), - void *alignf_data) + resource_size_t size, resource_size_t align, + resource_size_t min, unsigned int type_mask, + void (*alignf)(void *, struct resource *, resource_size_t, + resource_size_t), + void *alignf_data) { int i, ret = -ENOMEM; diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c index bc405c035ce..606f9b6f70e 100644 --- a/drivers/pci/pci-sysfs.c +++ b/drivers/pci/pci-sysfs.c @@ -87,7 +87,7 @@ resource_show(struct device * dev, struct device_attribute *attr, char * buf) char * str = buf; int i; int max = 7; - u64 start, end; + resource_size_t start, end; if (pci_dev->subordinate) max = DEVICE_COUNT_RESOURCE; @@ -365,7 +365,7 @@ pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr, struct device, kobj)); struct resource *res = (struct resource *)attr->private; enum pci_mmap_state mmap_type; - u64 start, end; + resource_size_t start, end; int i; for (i = 0; i < PCI_ROM_RESOURCE; i++) diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 29bdeca031a..9cc842b666e 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -6,10 +6,10 @@ extern int pci_create_sysfs_dev_files(struct pci_dev *pdev); extern void pci_remove_sysfs_dev_files(struct pci_dev *pdev); extern void pci_cleanup_rom(struct pci_dev *dev); extern int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res, - unsigned long size, unsigned long align, - unsigned long min, unsigned int type_mask, + resource_size_t size, resource_size_t align, + resource_size_t min, unsigned int type_mask, void (*alignf)(void *, struct resource *, - unsigned long, unsigned long), + resource_size_t, resource_size_t), void *alignf_data); /* Firmware callbacks */ extern int (*platform_pci_choose_state)(struct pci_dev *dev, pm_message_t state); diff --git a/drivers/pci/proc.c b/drivers/pci/proc.c index 20dfd77bd8c..99cf3337976 100644 --- a/drivers/pci/proc.c +++ b/drivers/pci/proc.c @@ -350,14 +350,14 @@ static int show_device(struct seq_file *m, void *v) dev->irq); /* Here should be 7 and not PCI_NUM_RESOURCES as we need to preserve compatibility */ for (i=0; i<7; i++) { - u64 start, end; + resource_size_t start, end; pci_resource_to_user(dev, i, &dev->resource[i], &start, &end); seq_printf(m, "\t%16llx", (unsigned long long)(start | (dev->resource[i].flags & PCI_REGION_FLAG_MASK))); } for (i=0; i<7; i++) { - u64 start, end; + resource_size_t start, end; pci_resource_to_user(dev, i, &dev->resource[i], &start, &end); seq_printf(m, "\t%16llx", dev->resource[i].start < dev->resource[i].end ? diff --git a/drivers/pci/rom.c b/drivers/pci/rom.c index 598a115cd00..cbb69cf4131 100644 --- a/drivers/pci/rom.c +++ b/drivers/pci/rom.c @@ -80,8 +80,8 @@ void __iomem *pci_map_rom(struct pci_dev *pdev, size_t *size) } else { if (res->flags & IORESOURCE_ROM_COPY) { *size = pci_resource_len(pdev, PCI_ROM_RESOURCE); - return (void __iomem *)pci_resource_start(pdev, - PCI_ROM_RESOURCE); + return (void __iomem *)(unsigned long) + pci_resource_start(pdev, PCI_ROM_RESOURCE); } else { /* assign the ROM an address if it doesn't have one */ if (res->parent == NULL && @@ -170,11 +170,11 @@ void __iomem *pci_map_rom_copy(struct pci_dev *pdev, size_t *size) return rom; res->end = res->start + *size; - memcpy_fromio((void*)res->start, rom, *size); + memcpy_fromio((void*)(unsigned long)res->start, rom, *size); pci_unmap_rom(pdev, rom); res->flags |= IORESOURCE_ROM_COPY; - return (void __iomem *)res->start; + return (void __iomem *)(unsigned long)res->start; } /** @@ -227,7 +227,7 @@ void pci_cleanup_rom(struct pci_dev *pdev) { struct resource *res = &pdev->resource[PCI_ROM_RESOURCE]; if (res->flags & IORESOURCE_ROM_COPY) { - kfree((void*)res->start); + kfree((void*)(unsigned long)res->start); res->flags &= ~IORESOURCE_ROM_COPY; res->start = 0; res->end = 0; diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c index f5ff0d3ba62..ab78e4bbdd8 100644 --- a/drivers/pci/setup-res.c +++ b/drivers/pci/setup-res.c @@ -121,7 +121,7 @@ int pci_assign_resource(struct pci_dev *dev, int resno) { struct pci_bus *bus = dev->bus; struct resource *res = dev->resource + resno; - unsigned long size, min, align; + resource_size_t size, min, align; int ret; size = res->end - res->start + 1; @@ -209,7 +209,7 @@ pdev_sort_resources(struct pci_dev *dev, struct resource_list *head) for (i = 0; i < PCI_NUM_RESOURCES; i++) { struct resource *r; struct resource_list *list, *tmp; - unsigned long r_align; + resource_size_t r_align; r = &dev->resource[i]; r_align = r->end - r->start; @@ -225,7 +225,7 @@ pdev_sort_resources(struct pci_dev *dev, struct resource_list *head) } r_align = (i < PCI_BRIDGE_RESOURCES) ? r_align + 1 : r->start; for (list = head; ; list = list->next) { - unsigned long align = 0; + resource_size_t align = 0; struct resource_list *ln = list->next; int idx; diff --git a/include/asm-arm/mach/pci.h b/include/asm-arm/mach/pci.h index 25d540ed007..923e0ca6620 100644 --- a/include/asm-arm/mach/pci.h +++ b/include/asm-arm/mach/pci.h @@ -28,7 +28,7 @@ struct hw_pci { struct pci_sys_data { struct list_head node; int busnr; /* primary bus number */ - unsigned long mem_offset; /* bus->cpu memory mapping offset */ + u64 mem_offset; /* bus->cpu memory mapping offset */ unsigned long io_offset; /* bus->cpu IO mapping offset */ struct pci_bus *bus; /* PCI bus */ struct resource *resource[3]; /* Primary PCI bus resources */ diff --git a/include/asm-powerpc/pci.h b/include/asm-powerpc/pci.h index 5d2c9e6c4be..46afd29b904 100644 --- a/include/asm-powerpc/pci.h +++ b/include/asm-powerpc/pci.h @@ -242,7 +242,7 @@ extern pgprot_t pci_phys_mem_access_prot(struct file *file, #define HAVE_ARCH_PCI_RESOURCE_TO_USER extern void pci_resource_to_user(const struct pci_dev *dev, int bar, const struct resource *rsrc, - u64 *start, u64 *end); + resource_size_t *start, resource_size_t *end); #endif /* CONFIG_PPC_MULTIPLATFORM || CONFIG_PPC32 */ #endif /* __KERNEL__ */ diff --git a/include/asm-ppc/pci.h b/include/asm-ppc/pci.h index 61434edbad7..11ffaaa5da1 100644 --- a/include/asm-ppc/pci.h +++ b/include/asm-ppc/pci.h @@ -133,7 +133,7 @@ extern pgprot_t pci_phys_mem_access_prot(struct file *file, #define HAVE_ARCH_PCI_RESOURCE_TO_USER extern void pci_resource_to_user(const struct pci_dev *dev, int bar, const struct resource *rsrc, - u64 *start, u64 *end); + resource_size_t *start, resource_size_t *end); #endif /* __KERNEL__ */ diff --git a/include/linux/pci.h b/include/linux/pci.h index 62a8c22f5f6..983fca251b2 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -404,8 +404,8 @@ int pcibios_enable_device(struct pci_dev *, int mask); char *pcibios_setup (char *str); /* Used only when drivers/pci/setup.c is used */ -void pcibios_align_resource(void *, struct resource *, - unsigned long, unsigned long); +void pcibios_align_resource(void *, struct resource *, resource_size_t, + resource_size_t); void pcibios_update_irq(struct pci_dev *, int irq); /* Generic PCI functions used internally */ @@ -532,10 +532,10 @@ void pci_release_region(struct pci_dev *, int); /* drivers/pci/bus.c */ int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res, - unsigned long size, unsigned long align, - unsigned long min, unsigned int type_mask, + resource_size_t size, resource_size_t align, + resource_size_t min, unsigned int type_mask, void (*alignf)(void *, struct resource *, - unsigned long, unsigned long), + resource_size_t, resource_size_t), void *alignf_data); void pci_enable_bridges(struct pci_bus *bus); @@ -730,7 +730,8 @@ static inline char *pci_name(struct pci_dev *pdev) */ #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER static inline void pci_resource_to_user(const struct pci_dev *dev, int bar, - const struct resource *rsrc, u64 *start, u64 *end) + const struct resource *rsrc, resource_size_t *start, + resource_size_t *end) { *start = rsrc->start; *end = rsrc->end; -- cgit v1.2.3-70-g09d2 From 02fcb974369d21c3df61d4ac5a2e1a58dce86495 Mon Sep 17 00:00:00 2001 From: Russell King Date: Wed, 21 Jun 2006 14:44:52 +0100 Subject: [ARM] Remove the __arch_* layer from uaccess.h Back in the days when we had armo (26-bit) and armv (32-bit) combined, we had an additional layer to the uaccess macros to ensure correct typing. Since we no longer have 26-bit in this tree, we no longer need this layer, so eliminate it. Signed-off-by: Russell King --- arch/arm/kernel/armksyms.c | 10 ++++----- arch/arm/lib/clear_user.S | 4 ++-- arch/arm/lib/copy_from_user.S | 4 ++-- arch/arm/lib/copy_to_user.S | 4 ++-- arch/arm/lib/strncpy_from_user.S | 2 +- arch/arm/lib/strnlen_user.S | 4 ++-- arch/arm/lib/uaccess.S | 8 +++---- include/asm-arm/uaccess.h | 45 ++++++++++++---------------------------- 8 files changed, 31 insertions(+), 50 deletions(-) (limited to 'include/asm-arm') diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c index c49b5d4d7fc..f8bb7abd3e9 100644 --- a/arch/arm/kernel/armksyms.c +++ b/arch/arm/kernel/armksyms.c @@ -109,11 +109,11 @@ EXPORT_SYMBOL(memchr); EXPORT_SYMBOL(__memzero); /* user mem (segment) */ -EXPORT_SYMBOL(__arch_copy_from_user); -EXPORT_SYMBOL(__arch_copy_to_user); -EXPORT_SYMBOL(__arch_clear_user); -EXPORT_SYMBOL(__arch_strnlen_user); -EXPORT_SYMBOL(__arch_strncpy_from_user); +EXPORT_SYMBOL(__copy_from_user); +EXPORT_SYMBOL(__copy_to_user); +EXPORT_SYMBOL(__clear_user); +EXPORT_SYMBOL(__strnlen_user); +EXPORT_SYMBOL(__strncpy_from_user); EXPORT_SYMBOL(__get_user_1); EXPORT_SYMBOL(__get_user_2); diff --git a/arch/arm/lib/clear_user.S b/arch/arm/lib/clear_user.S index ea435ae2e4a..ecb28dcdaf7 100644 --- a/arch/arm/lib/clear_user.S +++ b/arch/arm/lib/clear_user.S @@ -12,13 +12,13 @@ .text -/* Prototype: int __arch_clear_user(void *addr, size_t sz) +/* Prototype: int __clear_user(void *addr, size_t sz) * Purpose : clear some user memory * Params : addr - user memory address to clear * : sz - number of bytes to clear * Returns : number of bytes NOT cleared */ -ENTRY(__arch_clear_user) +ENTRY(__clear_user) stmfd sp!, {r1, lr} mov r2, #0 cmp r1, #4 diff --git a/arch/arm/lib/copy_from_user.S b/arch/arm/lib/copy_from_user.S index 7497393a0e8..6b7363ce749 100644 --- a/arch/arm/lib/copy_from_user.S +++ b/arch/arm/lib/copy_from_user.S @@ -16,7 +16,7 @@ /* * Prototype: * - * size_t __arch_copy_from_user(void *to, const void *from, size_t n) + * size_t __copy_from_user(void *to, const void *from, size_t n) * * Purpose: * @@ -83,7 +83,7 @@ .text -ENTRY(__arch_copy_from_user) +ENTRY(__copy_from_user) #include "copy_template.S" diff --git a/arch/arm/lib/copy_to_user.S b/arch/arm/lib/copy_to_user.S index 4a6d8ea1402..5224d94688d 100644 --- a/arch/arm/lib/copy_to_user.S +++ b/arch/arm/lib/copy_to_user.S @@ -16,7 +16,7 @@ /* * Prototype: * - * size_t __arch_copy_to_user(void *to, const void *from, size_t n) + * size_t __copy_to_user(void *to, const void *from, size_t n) * * Purpose: * @@ -86,7 +86,7 @@ .text -ENTRY(__arch_copy_to_user) +ENTRY(__copy_to_user) #include "copy_template.S" diff --git a/arch/arm/lib/strncpy_from_user.S b/arch/arm/lib/strncpy_from_user.S index 35649f04fca..36e3741a377 100644 --- a/arch/arm/lib/strncpy_from_user.S +++ b/arch/arm/lib/strncpy_from_user.S @@ -20,7 +20,7 @@ * returns the number of characters copied (strlen of copied string), * -EFAULT on exception, or "len" if we fill the whole buffer */ -ENTRY(__arch_strncpy_from_user) +ENTRY(__strncpy_from_user) mov ip, r1 1: subs r2, r2, #1 USER( ldrplbt r3, [r1], #1) diff --git a/arch/arm/lib/strnlen_user.S b/arch/arm/lib/strnlen_user.S index 3668a15991e..18d8fa4f925 100644 --- a/arch/arm/lib/strnlen_user.S +++ b/arch/arm/lib/strnlen_user.S @@ -14,13 +14,13 @@ .text .align 5 -/* Prototype: unsigned long __arch_strnlen_user(const char *str, long n) +/* Prototype: unsigned long __strnlen_user(const char *str, long n) * Purpose : get length of a string in user memory * Params : str - address of string in user memory * Returns : length of string *including terminator* * or zero on exception, or n + 1 if too long */ -ENTRY(__arch_strnlen_user) +ENTRY(__strnlen_user) mov r2, r0 1: USER( ldrbt r3, [r0], #1) diff --git a/arch/arm/lib/uaccess.S b/arch/arm/lib/uaccess.S index 1f1545d737b..b48bd6d5fd8 100644 --- a/arch/arm/lib/uaccess.S +++ b/arch/arm/lib/uaccess.S @@ -19,7 +19,7 @@ #define PAGE_SHIFT 12 -/* Prototype: int __arch_copy_to_user(void *to, const char *from, size_t n) +/* Prototype: int __copy_to_user(void *to, const char *from, size_t n) * Purpose : copy a block to user memory from kernel memory * Params : to - user memory * : from - kernel memory @@ -39,7 +39,7 @@ USER( strgtbt r3, [r0], #1) @ May fault sub r2, r2, ip b .Lc2u_dest_aligned -ENTRY(__arch_copy_to_user) +ENTRY(__copy_to_user) stmfd sp!, {r2, r4 - r7, lr} cmp r2, #4 blt .Lc2u_not_enough @@ -283,7 +283,7 @@ USER( strgtbt r3, [r0], #1) @ May fault 9001: ldmfd sp!, {r0, r4 - r7, pc} .previous -/* Prototype: unsigned long __arch_copy_from_user(void *to,const void *from,unsigned long n); +/* Prototype: unsigned long __copy_from_user(void *to,const void *from,unsigned long n); * Purpose : copy a block from user memory to kernel memory * Params : to - kernel memory * : from - user memory @@ -302,7 +302,7 @@ USER( ldrgtbt r3, [r1], #1) @ May fault sub r2, r2, ip b .Lcfu_dest_aligned -ENTRY(__arch_copy_from_user) +ENTRY(__copy_from_user) stmfd sp!, {r0, r2, r4 - r7, lr} cmp r2, #4 blt .Lcfu_not_enough diff --git a/include/asm-arm/uaccess.h b/include/asm-arm/uaccess.h index 064f0f5e8e2..f909dc75301 100644 --- a/include/asm-arm/uaccess.h +++ b/include/asm-arm/uaccess.h @@ -353,66 +353,47 @@ do { \ : "r" (x), "i" (-EFAULT) \ : "cc") -extern unsigned long __arch_copy_from_user(void *to, const void __user *from, unsigned long n); -extern unsigned long __arch_copy_to_user(void __user *to, const void *from, unsigned long n); -extern unsigned long __arch_clear_user(void __user *addr, unsigned long n); -extern unsigned long __arch_strncpy_from_user(char *to, const char __user *from, unsigned long count); -extern unsigned long __arch_strnlen_user(const char __user *s, long n); + +extern unsigned long __copy_from_user(void *to, const void __user *from, unsigned long n); +extern unsigned long __copy_to_user(void __user *to, const void *from, unsigned long n); +extern unsigned long __clear_user(void __user *addr, unsigned long n); +extern unsigned long __strncpy_from_user(char *to, const char __user *from, unsigned long count); +extern unsigned long __strnlen_user(const char __user *s, long n); static inline unsigned long copy_from_user(void *to, const void __user *from, unsigned long n) { if (access_ok(VERIFY_READ, from, n)) - n = __arch_copy_from_user(to, from, n); + n = __copy_from_user(to, from, n); else /* security hole - plug it */ memzero(to, n); return n; } -static inline unsigned long __copy_from_user(void *to, const void __user *from, unsigned long n) -{ - return __arch_copy_from_user(to, from, n); -} - static inline unsigned long copy_to_user(void __user *to, const void *from, unsigned long n) { if (access_ok(VERIFY_WRITE, to, n)) - n = __arch_copy_to_user(to, from, n); + n = __copy_to_user(to, from, n); return n; } -static inline unsigned long __copy_to_user(void __user *to, const void *from, unsigned long n) -{ - return __arch_copy_to_user(to, from, n); -} - #define __copy_to_user_inatomic __copy_to_user #define __copy_from_user_inatomic __copy_from_user -static inline unsigned long clear_user (void __user *to, unsigned long n) +static inline unsigned long clear_user(void __user *to, unsigned long n) { if (access_ok(VERIFY_WRITE, to, n)) - n = __arch_clear_user(to, n); + n = __clear_user(to, n); return n; } -static inline unsigned long __clear_user (void __user *to, unsigned long n) -{ - return __arch_clear_user(to, n); -} - -static inline long strncpy_from_user (char *dst, const char __user *src, long count) +static inline long strncpy_from_user(char *dst, const char __user *src, long count) { long res = -EFAULT; if (access_ok(VERIFY_READ, src, 1)) - res = __arch_strncpy_from_user(dst, src, count); + res = __strncpy_from_user(dst, src, count); return res; } -static inline long __strncpy_from_user (char *dst, const char __user *src, long count) -{ - return __arch_strncpy_from_user(dst, src, count); -} - #define strlen_user(s) strnlen_user(s, ~0UL >> 1) static inline long strnlen_user(const char __user *s, long n) @@ -420,7 +401,7 @@ static inline long strnlen_user(const char __user *s, long n) unsigned long res = 0; if (__addr_ok(s)) - res = __arch_strnlen_user(s, n); + res = __strnlen_user(s, n); return res; } -- cgit v1.2.3-70-g09d2 From 2b8b4913efa20f76718f524accf40e6d02a3bf0a Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Tue, 27 Jun 2006 22:53:04 +0100 Subject: [ARM] 3661/1: S3C2412: Fix compilation if CPU_S3C2410 only Patch from Ben Dooks If only the S3C2412 based machines are selected, then the regs-dsc.h does not export the S3C2412_DSC registers as it is wrapped in CONFIG_CPU_S3C2440. Signed-off-by: Ben Dooks Signed-off-by: Russell King --- include/asm-arm/arch-s3c2410/regs-dsc.h | 16 +++++++--------- 1 file changed, 7 insertions(+), 9 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-s3c2410/regs-dsc.h b/include/asm-arm/arch-s3c2410/regs-dsc.h index 84aca61cbaa..a0a12487516 100644 --- a/include/asm-arm/arch-s3c2410/regs-dsc.h +++ b/include/asm-arm/arch-s3c2410/regs-dsc.h @@ -7,25 +7,23 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * - * S3C2440 Signal Drive Strength Control - * - * Changelog: - * 11-Aug-2004 BJD Created file - * 25-Aug-2004 BJD Added the _SELECT_* defs for using with functions + * S3C2440/S3C2412 Signal Drive Strength Control */ #ifndef __ASM_ARCH_REGS_DSC_H #define __ASM_ARCH_REGS_DSC_H "2440-dsc" -#ifdef CONFIG_CPU_S3C2440 +#if defined(CONFIG_CPU_S3C2412) +#define S3C2412_DSC0 S3C2410_GPIOREG(0xdc) +#define S3C2412_DSC1 S3C2410_GPIOREG(0xe0) +#endif + +#if defined(CONFIG_CPU_S3C2440) #define S3C2440_DSC0 S3C2410_GPIOREG(0xc4) #define S3C2440_DSC1 S3C2410_GPIOREG(0xc8) -#define S3C2412_DSC0 S3C2410_GPIOREG(0xdc) -#define S3C2412_DSC1 S3C2410_GPIOREG(0xe0) - #define S3C2440_SELECT_DSC0 (0) #define S3C2440_SELECT_DSC1 (1<<31) -- cgit v1.2.3-70-g09d2 From 313f53e3823c00bd0aa3601f01897573f2fc326d Mon Sep 17 00:00:00 2001 From: Andrew Victor Date: Tue, 27 Jun 2006 22:54:39 +0100 Subject: [ARM] 3660/1: Remove legacy defines Patch from Andrew Victor Remove the remaining legacy __virt_to_bus__is_a_macro and __bus_to_virt__is_a_macro defines in some ARM platforms. Signed-off-by: Andrew Victor Signed-off-by: Russell King --- include/asm-arm/arch-at91rm9200/memory.h | 2 -- include/asm-arm/arch-h720x/memory.h | 2 -- include/asm-arm/arch-imx/memory.h | 6 ++---- 3 files changed, 2 insertions(+), 8 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-at91rm9200/memory.h b/include/asm-arm/arch-at91rm9200/memory.h index 3c327c40437..f985069e6d0 100644 --- a/include/asm-arm/arch-at91rm9200/memory.h +++ b/include/asm-arm/arch-at91rm9200/memory.h @@ -33,9 +33,7 @@ * bus_to_virt: Used to convert an address for DMA operations * to an address that the kernel can use. */ -#define __virt_to_bus__is_a_macro #define __virt_to_bus(x) __virt_to_phys(x) -#define __bus_to_virt__is_a_macro #define __bus_to_virt(x) __phys_to_virt(x) #endif diff --git a/include/asm-arm/arch-h720x/memory.h b/include/asm-arm/arch-h720x/memory.h index 4a1bfd78a0f..53e923dba76 100644 --- a/include/asm-arm/arch-h720x/memory.h +++ b/include/asm-arm/arch-h720x/memory.h @@ -23,9 +23,7 @@ * There is something to do here later !, Mar 2000, Jungjun Kim */ -#define __virt_to_bus__is_a_macro #define __virt_to_bus(x) __virt_to_phys(x) -#define __bus_to_virt__is_a_macro #define __bus_to_virt(x) __phys_to_virt(x) #endif diff --git a/include/asm-arm/arch-imx/memory.h b/include/asm-arm/arch-imx/memory.h index d09ae32cd2f..5ad90127915 100644 --- a/include/asm-arm/arch-imx/memory.h +++ b/include/asm-arm/arch-imx/memory.h @@ -30,9 +30,7 @@ * bus_to_virt: Used to convert an address for DMA operations * to an address that the kernel can use. */ -#define __virt_to_bus__is_a_macro -#define __virt_to_bus(x) (x - PAGE_OFFSET + PHYS_OFFSET) -#define __bus_to_virt__is_a_macro -#define __bus_to_virt(x) (x - PHYS_OFFSET + PAGE_OFFSET) +#define __virt_to_bus(x) (x - PAGE_OFFSET + PHYS_OFFSET) +#define __bus_to_virt(x) (x - PHYS_OFFSET + PAGE_OFFSET) #endif -- cgit v1.2.3-70-g09d2 From 02c4293194432c7466efe9477126d6179d6fda07 Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Tue, 27 Jun 2006 22:56:16 +0100 Subject: [ARM] 3662/1: ixp23xx: don't include asm/hardware.h in uncompress.h Patch from Lennert Buytenhek ixp23xx was including asm/hardware.h in its version of uncompress.h, to get at the physical address of the debug UART, but this include was causing various inline functions that are totally unrelated to the decompressor, defined in headers in include/asm-arm/arch-ixp23xx, to be included in the decompressor image. Include asm/arch/ixp23xx.h instead, and move the sole inline function in ixp23xx.h to another header. Signed-off-by: Lennert Buytenhek Signed-off-by: Russell King --- include/asm-arm/arch-ixp23xx/ixp23xx.h | 11 ----------- include/asm-arm/arch-ixp23xx/platform.h | 10 ++++++++++ include/asm-arm/arch-ixp23xx/uncompress.h | 2 +- 3 files changed, 11 insertions(+), 12 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-ixp23xx/ixp23xx.h b/include/asm-arm/arch-ixp23xx/ixp23xx.h index d0a72201ee9..3927b1d61b1 100644 --- a/include/asm-arm/arch-ixp23xx/ixp23xx.h +++ b/include/asm-arm/arch-ixp23xx/ixp23xx.h @@ -295,15 +295,4 @@ #define IXP23XX_PCI_CPP_ADDR_BITS IXP23XX_PCI_CSR(0x0160) -#ifndef __ASSEMBLY__ -/* - * Is system memory on the XSI or CPP bus? - */ -static inline unsigned ixp23xx_cpp_boot(void) -{ - return (*IXP23XX_EXP_CFG0 & IXP23XX_EXP_CFG0_XSI_NOT_PRES); -} -#endif - - #endif diff --git a/include/asm-arm/arch-ixp23xx/platform.h b/include/asm-arm/arch-ixp23xx/platform.h index 19a73b39c86..56e16d66645 100644 --- a/include/asm-arm/arch-ixp23xx/platform.h +++ b/include/asm-arm/arch-ixp23xx/platform.h @@ -43,5 +43,15 @@ extern struct sys_timer ixp23xx_timer; #define IXP23XX_UART_XTAL 14745600 +#ifndef __ASSEMBLY__ +/* + * Is system memory on the XSI or CPP bus? + */ +static inline unsigned ixp23xx_cpp_boot(void) +{ + return (*IXP23XX_EXP_CFG0 & IXP23XX_EXP_CFG0_XSI_NOT_PRES); +} +#endif + #endif diff --git a/include/asm-arm/arch-ixp23xx/uncompress.h b/include/asm-arm/arch-ixp23xx/uncompress.h index 013575e6a9a..16c1110f230 100644 --- a/include/asm-arm/arch-ixp23xx/uncompress.h +++ b/include/asm-arm/arch-ixp23xx/uncompress.h @@ -11,7 +11,7 @@ #ifndef __ASM_ARCH_UNCOMPRESS_H #define __ASM_ARCH_UNCOMPRESS_H -#include +#include #include #define UART_BASE ((volatile u32 *)IXP23XX_UART1_PHYS) -- cgit v1.2.3-70-g09d2 From 3bec6ded282b331552587267d67a06ed7fd95ddd Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Tue, 27 Jun 2006 22:56:18 +0100 Subject: [ARM] 3664/1: crunch: add signal frame save/restore Patch from Lennert Buytenhek This patch makes the kernel save Crunch state in userland signal frames, so that any userland signal handler can safely use the Crunch coprocessor without corrupting the Crunch state of the code it preempted. Signed-off-by: Lennert Buytenhek Signed-off-by: Russell King --- arch/arm/kernel/signal.c | 39 +++++++++++++++++++++++++++++++++++++++ include/asm-arm/ucontext.h | 14 ++++++++++++++ 2 files changed, 53 insertions(+) (limited to 'include/asm-arm') diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c index 1ce05ec086c..83a8d3c95eb 100644 --- a/arch/arm/kernel/signal.c +++ b/arch/arm/kernel/signal.c @@ -132,6 +132,37 @@ sys_sigaction(int sig, const struct old_sigaction __user *act, return ret; } +#ifdef CONFIG_CRUNCH +static int preserve_crunch_context(struct crunch_sigframe *frame) +{ + char kbuf[sizeof(*frame) + 8]; + struct crunch_sigframe *kframe; + + /* the crunch context must be 64 bit aligned */ + kframe = (struct crunch_sigframe *)((unsigned long)(kbuf + 8) & ~7); + kframe->magic = CRUNCH_MAGIC; + kframe->size = CRUNCH_STORAGE_SIZE; + crunch_task_copy(current_thread_info(), &kframe->storage); + return __copy_to_user(frame, kframe, sizeof(*frame)); +} + +static int restore_crunch_context(struct crunch_sigframe *frame) +{ + char kbuf[sizeof(*frame) + 8]; + struct crunch_sigframe *kframe; + + /* the crunch context must be 64 bit aligned */ + kframe = (struct crunch_sigframe *)((unsigned long)(kbuf + 8) & ~7); + if (__copy_from_user(kframe, frame, sizeof(*frame))) + return -1; + if (kframe->magic != CRUNCH_MAGIC || + kframe->size != CRUNCH_STORAGE_SIZE) + return -1; + crunch_task_restore(current_thread_info(), &kframe->storage); + return 0; +} +#endif + #ifdef CONFIG_IWMMXT static int preserve_iwmmxt_context(struct iwmmxt_sigframe *frame) @@ -214,6 +245,10 @@ static int restore_sigframe(struct pt_regs *regs, struct sigframe __user *sf) err |= !valid_user_regs(regs); aux = (struct aux_sigframe __user *) sf->uc.uc_regspace; +#ifdef CONFIG_CRUNCH + if (err == 0) + err |= restore_crunch_context(&aux->crunch); +#endif #ifdef CONFIG_IWMMXT if (err == 0 && test_thread_flag(TIF_USING_IWMMXT)) err |= restore_iwmmxt_context(&aux->iwmmxt); @@ -333,6 +368,10 @@ setup_sigframe(struct sigframe __user *sf, struct pt_regs *regs, sigset_t *set) err |= __copy_to_user(&sf->uc.uc_sigmask, set, sizeof(*set)); aux = (struct aux_sigframe __user *) sf->uc.uc_regspace; +#ifdef CONFIG_CRUNCH + if (err == 0) + err |= preserve_crunch_context(&aux->crunch); +#endif #ifdef CONFIG_IWMMXT if (err == 0 && test_thread_flag(TIF_USING_IWMMXT)) err |= preserve_iwmmxt_context(&aux->iwmmxt); diff --git a/include/asm-arm/ucontext.h b/include/asm-arm/ucontext.h index 9e6f7ca9f5a..bf65e9f4525 100644 --- a/include/asm-arm/ucontext.h +++ b/include/asm-arm/ucontext.h @@ -35,6 +35,17 @@ struct ucontext { * bytes, to prevent unpredictable padding in the signal frame. */ +#ifdef CONFIG_CRUNCH +#define CRUNCH_MAGIC 0x5065cf03 +#define CRUNCH_STORAGE_SIZE (CRUNCH_SIZE + 8) + +struct crunch_sigframe { + unsigned long magic; + unsigned long size; + struct crunch_state storage; +} __attribute__((__aligned__(8))); +#endif + #ifdef CONFIG_IWMMXT /* iwmmxt_area is 0x98 bytes long, preceeded by 8 bytes of signature */ #define IWMMXT_MAGIC 0x12ef842a @@ -74,6 +85,9 @@ struct vfp_sigframe * one of these. */ struct aux_sigframe { +#ifdef CONFIG_CRUNCH + struct crunch_sigframe crunch; +#endif #ifdef CONFIG_IWMMXT struct iwmmxt_sigframe iwmmxt; #endif -- cgit v1.2.3-70-g09d2 From 5429b060df6d556f396b78364ad017686015bc34 Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Tue, 27 Jun 2006 22:56:19 +0100 Subject: [ARM] 3665/1: crunch: add ptrace support Patch from Lennert Buytenhek This patch makes it possible to get/set a task's Crunch state via the ptrace(2) system call. Signed-off-by: Lennert Buytenhek Signed-off-by: Russell King --- arch/arm/kernel/ptrace.c | 36 ++++++++++++++++++++++++++++++++++++ include/asm-arm/ptrace.h | 5 +++++ 2 files changed, 41 insertions(+) (limited to 'include/asm-arm') diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c index a1d1b2906e8..c40bdc77005 100644 --- a/arch/arm/kernel/ptrace.c +++ b/arch/arm/kernel/ptrace.c @@ -634,6 +634,32 @@ static int ptrace_setwmmxregs(struct task_struct *tsk, void __user *ufp) #endif +#ifdef CONFIG_CRUNCH +/* + * Get the child Crunch state. + */ +static int ptrace_getcrunchregs(struct task_struct *tsk, void __user *ufp) +{ + struct thread_info *thread = task_thread_info(tsk); + + crunch_task_disable(thread); /* force it to ram */ + return copy_to_user(ufp, &thread->crunchstate, CRUNCH_SIZE) + ? -EFAULT : 0; +} + +/* + * Set the child Crunch state. + */ +static int ptrace_setcrunchregs(struct task_struct *tsk, void __user *ufp) +{ + struct thread_info *thread = task_thread_info(tsk); + + crunch_task_release(thread); /* force a reload */ + return copy_from_user(&thread->crunchstate, ufp, CRUNCH_SIZE) + ? -EFAULT : 0; +} +#endif + long arch_ptrace(struct task_struct *child, long request, long addr, long data) { unsigned long tmp; @@ -765,6 +791,16 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) child->ptrace_message = data; break; +#ifdef CONFIG_CRUNCH + case PTRACE_GETCRUNCHREGS: + ret = ptrace_getcrunchregs(child, (void __user *)data); + break; + + case PTRACE_SETCRUNCHREGS: + ret = ptrace_setcrunchregs(child, (void __user *)data); + break; +#endif + default: ret = ptrace_request(child, request, addr, data); break; diff --git a/include/asm-arm/ptrace.h b/include/asm-arm/ptrace.h index 2bebe3dc0a3..5a8ef787dbf 100644 --- a/include/asm-arm/ptrace.h +++ b/include/asm-arm/ptrace.h @@ -25,6 +25,11 @@ #define PTRACE_SET_SYSCALL 23 +/* PTRACE_SYSCALL is 24 */ + +#define PTRACE_GETCRUNCHREGS 25 +#define PTRACE_SETCRUNCHREGS 26 + /* * PSR bits */ -- cgit v1.2.3-70-g09d2 From c17fad11f3105ca4d5bbb2686725aad208f5ead4 Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Tue, 27 Jun 2006 23:03:03 +0100 Subject: [ARM] 3370/2: ep93xx: add crunch support Patch from Lennert Buytenhek Add the necessary kernel bits for crunch task switching. Signed-off-by: Lennert Buytenhek Signed-off-by: Russell King --- arch/arm/kernel/Makefile | 3 + arch/arm/kernel/asm-offsets.c | 3 + arch/arm/kernel/crunch-bits.S | 305 ++++++++++++++++++++++++++++++++++++++++++ arch/arm/kernel/crunch.c | 83 ++++++++++++ arch/arm/kernel/entry-armv.S | 6 + arch/arm/mach-ep93xx/Kconfig | 5 + include/asm-arm/fpstate.h | 8 ++ include/asm-arm/thread_info.h | 6 + 8 files changed, 419 insertions(+) create mode 100644 arch/arm/kernel/crunch-bits.S create mode 100644 arch/arm/kernel/crunch.c (limited to 'include/asm-arm') diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index a601b8b55f3..7cffbaef064 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile @@ -22,6 +22,9 @@ obj-$(CONFIG_PCI) += bios32.o obj-$(CONFIG_SMP) += smp.o obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o +obj-$(CONFIG_CRUNCH) += crunch.o crunch-bits.o +AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312 + obj-$(CONFIG_IWMMXT) += iwmmxt.o AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c index 396efba9bac..447ede5143a 100644 --- a/arch/arm/kernel/asm-offsets.c +++ b/arch/arm/kernel/asm-offsets.c @@ -59,6 +59,9 @@ int main(void) DEFINE(TI_VFPSTATE, offsetof(struct thread_info, vfpstate)); #ifdef CONFIG_IWMMXT DEFINE(TI_IWMMXT_STATE, offsetof(struct thread_info, fpstate.iwmmxt)); +#endif +#ifdef CONFIG_CRUNCH + DEFINE(TI_CRUNCH_STATE, offsetof(struct thread_info, crunchstate)); #endif BLANK(); DEFINE(S_R0, offsetof(struct pt_regs, ARM_r0)); diff --git a/arch/arm/kernel/crunch-bits.S b/arch/arm/kernel/crunch-bits.S new file mode 100644 index 00000000000..a26886758c6 --- /dev/null +++ b/arch/arm/kernel/crunch-bits.S @@ -0,0 +1,305 @@ +/* + * arch/arm/kernel/crunch-bits.S + * Cirrus MaverickCrunch context switching and handling + * + * Copyright (C) 2006 Lennert Buytenhek + * + * Shamelessly stolen from the iWMMXt code by Nicolas Pitre, which is + * Copyright (c) 2003-2004, MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include + +/* + * We can't use hex constants here due to a bug in gas. + */ +#define CRUNCH_MVDX0 0 +#define CRUNCH_MVDX1 8 +#define CRUNCH_MVDX2 16 +#define CRUNCH_MVDX3 24 +#define CRUNCH_MVDX4 32 +#define CRUNCH_MVDX5 40 +#define CRUNCH_MVDX6 48 +#define CRUNCH_MVDX7 56 +#define CRUNCH_MVDX8 64 +#define CRUNCH_MVDX9 72 +#define CRUNCH_MVDX10 80 +#define CRUNCH_MVDX11 88 +#define CRUNCH_MVDX12 96 +#define CRUNCH_MVDX13 104 +#define CRUNCH_MVDX14 112 +#define CRUNCH_MVDX15 120 +#define CRUNCH_MVAX0L 128 +#define CRUNCH_MVAX0M 132 +#define CRUNCH_MVAX0H 136 +#define CRUNCH_MVAX1L 140 +#define CRUNCH_MVAX1M 144 +#define CRUNCH_MVAX1H 148 +#define CRUNCH_MVAX2L 152 +#define CRUNCH_MVAX2M 156 +#define CRUNCH_MVAX2H 160 +#define CRUNCH_MVAX3L 164 +#define CRUNCH_MVAX3M 168 +#define CRUNCH_MVAX3H 172 +#define CRUNCH_DSPSC 176 + +#define CRUNCH_SIZE 184 + + .text + +/* + * Lazy switching of crunch coprocessor context + * + * r10 = struct thread_info pointer + * r9 = ret_from_exception + * lr = undefined instr exit + * + * called from prefetch exception handler with interrupts disabled + */ +ENTRY(crunch_task_enable) + ldr r8, =(EP93XX_APB_VIRT_BASE + 0x00130000) @ syscon addr + + ldr r1, [r8, #0x80] + tst r1, #0x00800000 @ access to crunch enabled? + movne pc, lr @ if so no business here + mov r3, #0xaa @ unlock syscon swlock + str r3, [r8, #0xc0] + orr r1, r1, #0x00800000 @ enable access to crunch + str r1, [r8, #0x80] + + ldr r3, =crunch_owner + add r0, r10, #TI_CRUNCH_STATE @ get task crunch save area + ldr r2, [sp, #60] @ current task pc value + ldr r1, [r3] @ get current crunch owner + str r0, [r3] @ this task now owns crunch + sub r2, r2, #4 @ adjust pc back + str r2, [sp, #60] + + ldr r2, [r8, #0x80] + mov r2, r2 @ flush out enable (@@@) + + teq r1, #0 @ test for last ownership + mov lr, r9 @ normal exit from exception + beq crunch_load @ no owner, skip save + +crunch_save: + cfstr64 mvdx0, [r1, #CRUNCH_MVDX0] @ save 64b registers + cfstr64 mvdx1, [r1, #CRUNCH_MVDX1] + cfstr64 mvdx2, [r1, #CRUNCH_MVDX2] + cfstr64 mvdx3, [r1, #CRUNCH_MVDX3] + cfstr64 mvdx4, [r1, #CRUNCH_MVDX4] + cfstr64 mvdx5, [r1, #CRUNCH_MVDX5] + cfstr64 mvdx6, [r1, #CRUNCH_MVDX6] + cfstr64 mvdx7, [r1, #CRUNCH_MVDX7] + cfstr64 mvdx8, [r1, #CRUNCH_MVDX8] + cfstr64 mvdx9, [r1, #CRUNCH_MVDX9] + cfstr64 mvdx10, [r1, #CRUNCH_MVDX10] + cfstr64 mvdx11, [r1, #CRUNCH_MVDX11] + cfstr64 mvdx12, [r1, #CRUNCH_MVDX12] + cfstr64 mvdx13, [r1, #CRUNCH_MVDX13] + cfstr64 mvdx14, [r1, #CRUNCH_MVDX14] + cfstr64 mvdx15, [r1, #CRUNCH_MVDX15] + +#ifdef __ARMEB__ +#error fix me for ARMEB +#endif + + cfmv32al mvfx0, mvax0 @ save 72b accumulators + cfstr32 mvfx0, [r1, #CRUNCH_MVAX0L] + cfmv32am mvfx0, mvax0 + cfstr32 mvfx0, [r1, #CRUNCH_MVAX0M] + cfmv32ah mvfx0, mvax0 + cfstr32 mvfx0, [r1, #CRUNCH_MVAX0H] + cfmv32al mvfx0, mvax1 + cfstr32 mvfx0, [r1, #CRUNCH_MVAX1L] + cfmv32am mvfx0, mvax1 + cfstr32 mvfx0, [r1, #CRUNCH_MVAX1M] + cfmv32ah mvfx0, mvax1 + cfstr32 mvfx0, [r1, #CRUNCH_MVAX1H] + cfmv32al mvfx0, mvax2 + cfstr32 mvfx0, [r1, #CRUNCH_MVAX2L] + cfmv32am mvfx0, mvax2 + cfstr32 mvfx0, [r1, #CRUNCH_MVAX2M] + cfmv32ah mvfx0, mvax2 + cfstr32 mvfx0, [r1, #CRUNCH_MVAX2H] + cfmv32al mvfx0, mvax3 + cfstr32 mvfx0, [r1, #CRUNCH_MVAX3L] + cfmv32am mvfx0, mvax3 + cfstr32 mvfx0, [r1, #CRUNCH_MVAX3M] + cfmv32ah mvfx0, mvax3 + cfstr32 mvfx0, [r1, #CRUNCH_MVAX3H] + + cfmv32sc mvdx0, dspsc @ save status word + cfstr64 mvdx0, [r1, #CRUNCH_DSPSC] + + teq r0, #0 @ anything to load? + cfldr64eq mvdx0, [r1, #CRUNCH_MVDX0] @ mvdx0 was clobbered + moveq pc, lr + +crunch_load: + cfldr64 mvdx0, [r0, #CRUNCH_DSPSC] @ load status word + cfmvsc32 dspsc, mvdx0 + + cfldr32 mvfx0, [r0, #CRUNCH_MVAX0L] @ load 72b accumulators + cfmval32 mvax0, mvfx0 + cfldr32 mvfx0, [r0, #CRUNCH_MVAX0M] + cfmvam32 mvax0, mvfx0 + cfldr32 mvfx0, [r0, #CRUNCH_MVAX0H] + cfmvah32 mvax0, mvfx0 + cfldr32 mvfx0, [r0, #CRUNCH_MVAX1L] + cfmval32 mvax1, mvfx0 + cfldr32 mvfx0, [r0, #CRUNCH_MVAX1M] + cfmvam32 mvax1, mvfx0 + cfldr32 mvfx0, [r0, #CRUNCH_MVAX1H] + cfmvah32 mvax1, mvfx0 + cfldr32 mvfx0, [r0, #CRUNCH_MVAX2L] + cfmval32 mvax2, mvfx0 + cfldr32 mvfx0, [r0, #CRUNCH_MVAX2M] + cfmvam32 mvax2, mvfx0 + cfldr32 mvfx0, [r0, #CRUNCH_MVAX2H] + cfmvah32 mvax2, mvfx0 + cfldr32 mvfx0, [r0, #CRUNCH_MVAX3L] + cfmval32 mvax3, mvfx0 + cfldr32 mvfx0, [r0, #CRUNCH_MVAX3M] + cfmvam32 mvax3, mvfx0 + cfldr32 mvfx0, [r0, #CRUNCH_MVAX3H] + cfmvah32 mvax3, mvfx0 + + cfldr64 mvdx0, [r0, #CRUNCH_MVDX0] @ load 64b registers + cfldr64 mvdx1, [r0, #CRUNCH_MVDX1] + cfldr64 mvdx2, [r0, #CRUNCH_MVDX2] + cfldr64 mvdx3, [r0, #CRUNCH_MVDX3] + cfldr64 mvdx4, [r0, #CRUNCH_MVDX4] + cfldr64 mvdx5, [r0, #CRUNCH_MVDX5] + cfldr64 mvdx6, [r0, #CRUNCH_MVDX6] + cfldr64 mvdx7, [r0, #CRUNCH_MVDX7] + cfldr64 mvdx8, [r0, #CRUNCH_MVDX8] + cfldr64 mvdx9, [r0, #CRUNCH_MVDX9] + cfldr64 mvdx10, [r0, #CRUNCH_MVDX10] + cfldr64 mvdx11, [r0, #CRUNCH_MVDX11] + cfldr64 mvdx12, [r0, #CRUNCH_MVDX12] + cfldr64 mvdx13, [r0, #CRUNCH_MVDX13] + cfldr64 mvdx14, [r0, #CRUNCH_MVDX14] + cfldr64 mvdx15, [r0, #CRUNCH_MVDX15] + + mov pc, lr + +/* + * Back up crunch regs to save area and disable access to them + * (mainly for gdb or sleep mode usage) + * + * r0 = struct thread_info pointer of target task or NULL for any + */ +ENTRY(crunch_task_disable) + stmfd sp!, {r4, r5, lr} + + mrs ip, cpsr + orr r2, ip, #PSR_I_BIT @ disable interrupts + msr cpsr_c, r2 + + ldr r4, =(EP93XX_APB_VIRT_BASE + 0x00130000) @ syscon addr + + ldr r3, =crunch_owner + add r2, r0, #TI_CRUNCH_STATE @ get task crunch save area + ldr r1, [r3] @ get current crunch owner + teq r1, #0 @ any current owner? + beq 1f @ no: quit + teq r0, #0 @ any owner? + teqne r1, r2 @ or specified one? + bne 1f @ no: quit + + ldr r5, [r4, #0x80] @ enable access to crunch + mov r2, #0xaa + str r2, [r4, #0xc0] + orr r5, r5, #0x00800000 + str r5, [r4, #0x80] + + mov r0, #0 @ nothing to load + str r0, [r3] @ no more current owner + ldr r2, [r4, #0x80] @ flush out enable (@@@) + mov r2, r2 + bl crunch_save + + mov r2, #0xaa @ disable access to crunch + str r2, [r4, #0xc0] + bic r5, r5, #0x00800000 + str r5, [r4, #0x80] + ldr r5, [r4, #0x80] @ flush out enable (@@@) + mov r5, r5 + +1: msr cpsr_c, ip @ restore interrupt mode + ldmfd sp!, {r4, r5, pc} + +/* + * Copy crunch state to given memory address + * + * r0 = struct thread_info pointer of target task + * r1 = memory address where to store crunch state + * + * this is called mainly in the creation of signal stack frames + */ +ENTRY(crunch_task_copy) + mrs ip, cpsr + orr r2, ip, #PSR_I_BIT @ disable interrupts + msr cpsr_c, r2 + + ldr r3, =crunch_owner + add r2, r0, #TI_CRUNCH_STATE @ get task crunch save area + ldr r3, [r3] @ get current crunch owner + teq r2, r3 @ does this task own it... + beq 1f + + @ current crunch values are in the task save area + msr cpsr_c, ip @ restore interrupt mode + mov r0, r1 + mov r1, r2 + mov r2, #CRUNCH_SIZE + b memcpy + +1: @ this task owns crunch regs -- grab a copy from there + mov r0, #0 @ nothing to load + mov r3, lr @ preserve return address + bl crunch_save + msr cpsr_c, ip @ restore interrupt mode + mov pc, r3 + +/* + * Restore crunch state from given memory address + * + * r0 = struct thread_info pointer of target task + * r1 = memory address where to get crunch state from + * + * this is used to restore crunch state when unwinding a signal stack frame + */ +ENTRY(crunch_task_restore) + mrs ip, cpsr + orr r2, ip, #PSR_I_BIT @ disable interrupts + msr cpsr_c, r2 + + ldr r3, =crunch_owner + add r2, r0, #TI_CRUNCH_STATE @ get task crunch save area + ldr r3, [r3] @ get current crunch owner + teq r2, r3 @ does this task own it... + beq 1f + + @ this task doesn't own crunch regs -- use its save area + msr cpsr_c, ip @ restore interrupt mode + mov r0, r2 + mov r2, #CRUNCH_SIZE + b memcpy + +1: @ this task owns crunch regs -- load them directly + mov r0, r1 + mov r1, #0 @ nothing to save + mov r3, lr @ preserve return address + bl crunch_load + msr cpsr_c, ip @ restore interrupt mode + mov pc, r3 diff --git a/arch/arm/kernel/crunch.c b/arch/arm/kernel/crunch.c new file mode 100644 index 00000000000..748175921f9 --- /dev/null +++ b/arch/arm/kernel/crunch.c @@ -0,0 +1,83 @@ +/* + * arch/arm/kernel/crunch.c + * Cirrus MaverickCrunch context switching and handling + * + * Copyright (C) 2006 Lennert Buytenhek + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct crunch_state *crunch_owner; + +void crunch_task_release(struct thread_info *thread) +{ + local_irq_disable(); + if (crunch_owner == &thread->crunchstate) + crunch_owner = NULL; + local_irq_enable(); +} + +static int crunch_enabled(u32 devcfg) +{ + return !!(devcfg & EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE); +} + +static int crunch_do(struct notifier_block *self, unsigned long cmd, void *t) +{ + struct thread_info *thread = (struct thread_info *)t; + struct crunch_state *crunch_state; + u32 devcfg; + + crunch_state = &thread->crunchstate; + + switch (cmd) { + case THREAD_NOTIFY_FLUSH: + memset(crunch_state, 0, sizeof(*crunch_state)); + + /* + * FALLTHROUGH: Ensure we don't try to overwrite our newly + * initialised state information on the first fault. + */ + + case THREAD_NOTIFY_RELEASE: + crunch_task_release(thread); + break; + + case THREAD_NOTIFY_SWITCH: + devcfg = __raw_readl(EP93XX_SYSCON_DEVICE_CONFIG); + if (crunch_enabled(devcfg) || crunch_owner == crunch_state) { + devcfg ^= EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE; + __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK); + __raw_writel(devcfg, EP93XX_SYSCON_DEVICE_CONFIG); + } + break; + } + + return NOTIFY_DONE; +} + +static struct notifier_block crunch_notifier_block = { + .notifier_call = crunch_do, +}; + +static int __init crunch_init(void) +{ + thread_register_notifier(&crunch_notifier_block); + + return 0; +} + +late_initcall(crunch_init); diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index 86c92523a34..6423a38839b 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S @@ -492,9 +492,15 @@ call_fpe: b do_fpe @ CP#1 (FPE) b do_fpe @ CP#2 (FPE) mov pc, lr @ CP#3 +#ifdef CONFIG_CRUNCH + b crunch_task_enable @ CP#4 (MaverickCrunch) + b crunch_task_enable @ CP#5 (MaverickCrunch) + b crunch_task_enable @ CP#6 (MaverickCrunch) +#else mov pc, lr @ CP#4 mov pc, lr @ CP#5 mov pc, lr @ CP#6 +#endif mov pc, lr @ CP#7 mov pc, lr @ CP#8 mov pc, lr @ CP#9 diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig index cec5a21ca4e..293c1f5c618 100644 --- a/arch/arm/mach-ep93xx/Kconfig +++ b/arch/arm/mach-ep93xx/Kconfig @@ -2,6 +2,11 @@ if ARCH_EP93XX menu "Cirrus EP93xx Implementation Options" +config CRUNCH + bool "Support for MaverickCrunch" + help + Enable kernel support for MaverickCrunch. + comment "EP93xx Platforms" config MACH_GESBC9312 diff --git a/include/asm-arm/fpstate.h b/include/asm-arm/fpstate.h index 132c3c5628b..6af4e6bd129 100644 --- a/include/asm-arm/fpstate.h +++ b/include/asm-arm/fpstate.h @@ -72,6 +72,14 @@ union fp_state { #define FP_SIZE (sizeof(union fp_state) / sizeof(int)) +struct crunch_state { + unsigned int mvdx[16][2]; + unsigned int mvax[4][3]; + unsigned int dspsc[2]; +}; + +#define CRUNCH_SIZE sizeof(struct crunch_state) + #endif #endif diff --git a/include/asm-arm/thread_info.h b/include/asm-arm/thread_info.h index cfbccb63c67..c46b5c84275 100644 --- a/include/asm-arm/thread_info.h +++ b/include/asm-arm/thread_info.h @@ -59,6 +59,7 @@ struct thread_info { struct cpu_context_save cpu_context; /* cpu context */ __u8 used_cp[16]; /* thread used copro */ unsigned long tp_value; + struct crunch_state crunchstate; union fp_state fpstate __attribute__((aligned(8))); union vfp_state vfpstate; struct restart_block restart_block; @@ -101,6 +102,11 @@ extern void free_thread_info(struct thread_info *); #define thread_saved_fp(tsk) \ ((unsigned long)(task_thread_info(tsk)->cpu_context.fp)) +extern void crunch_task_disable(struct thread_info *); +extern void crunch_task_copy(struct thread_info *, void *); +extern void crunch_task_restore(struct thread_info *, void *); +extern void crunch_task_release(struct thread_info *); + extern void iwmmxt_task_disable(struct thread_info *); extern void iwmmxt_task_copy(struct thread_info *, void *); extern void iwmmxt_task_restore(struct thread_info *, void *); -- cgit v1.2.3-70-g09d2 From 002547b4f86c27bfac5bae344b723d250857be6b Mon Sep 17 00:00:00 2001 From: Russell King Date: Tue, 20 Jun 2006 20:46:52 +0100 Subject: [ARM] nommu: adjust headers for !MMU ARM systems Majorily based on Hyok Choi's patches, this fixes up the asm-arm header files for mmuless systems. Over and above Hyok's patches: - nommu.h merged into mmu.h (it's only a structure) - nommu_context.h is essentially the same as mmu_context.h, but without the MM switching code. so there's no point having separate files. Also, in memory.h, there's no point #ifndef'ing PHYS_OFFSET and END_MEM - both CONFIG_DRAM_BASE and CONFIG_DRAM_SIZE will always be set by the configuration scripts. Other files have minor formatting changes, but are essentially the same. Hyok's original patches were signed off thusly: Signed-off-by: Hyok S. Choi Signed-off-by: Russell King --- include/asm-arm/bugs.h | 4 ++ include/asm-arm/domain.h | 7 +++ include/asm-arm/memory.h | 75 ++++++++++++++++++------ include/asm-arm/mmu.h | 16 ++++++ include/asm-arm/mmu_context.h | 2 + include/asm-arm/page-nommu.h | 51 +++++++++++++++++ include/asm-arm/page.h | 8 +++ include/asm-arm/pgalloc.h | 8 ++- include/asm-arm/pgtable-nommu.h | 123 ++++++++++++++++++++++++++++++++++++++++ include/asm-arm/pgtable.h | 10 +++- include/asm-arm/proc-fns.h | 4 ++ 11 files changed, 287 insertions(+), 21 deletions(-) create mode 100644 include/asm-arm/page-nommu.h create mode 100644 include/asm-arm/pgtable-nommu.h (limited to 'include/asm-arm') diff --git a/include/asm-arm/bugs.h b/include/asm-arm/bugs.h index 4c80ec519d4..ca54eb0f12d 100644 --- a/include/asm-arm/bugs.h +++ b/include/asm-arm/bugs.h @@ -10,8 +10,12 @@ #ifndef __ASM_BUGS_H #define __ASM_BUGS_H +#ifdef CONFIG_MMU extern void check_writebuffer_bugs(void); #define check_bugs() check_writebuffer_bugs() +#else +#define check_bugs() do { } while (0) +#endif #endif diff --git a/include/asm-arm/domain.h b/include/asm-arm/domain.h index f8ea2de4848..4c2885abbe6 100644 --- a/include/asm-arm/domain.h +++ b/include/asm-arm/domain.h @@ -50,6 +50,8 @@ #define domain_val(dom,type) ((type) << (2*(dom))) #ifndef __ASSEMBLY__ + +#ifdef CONFIG_MMU #define set_domain(x) \ do { \ __asm__ __volatile__( \ @@ -66,5 +68,10 @@ set_domain(thread->cpu_domain); \ } while (0) +#else +#define set_domain(x) do { } while (0) +#define modify_domain(dom,type) do { } while (0) +#endif + #endif #endif /* !__ASSEMBLY__ */ diff --git a/include/asm-arm/memory.h b/include/asm-arm/memory.h index 731e321a57d..94f973b704f 100644 --- a/include/asm-arm/memory.h +++ b/include/asm-arm/memory.h @@ -2,6 +2,7 @@ * linux/include/asm-arm/memory.h * * Copyright (C) 2000-2002 Russell King + * modification for nommu, Hyok S. Choi, 2004 * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -26,6 +27,8 @@ #include #include +#ifdef CONFIG_MMU + #ifndef TASK_SIZE /* * TASK_SIZE - the maximum size of a user space task. @@ -47,6 +50,60 @@ #define PAGE_OFFSET UL(0xc0000000) #endif +/* + * The module space lives between the addresses given by TASK_SIZE + * and PAGE_OFFSET - it must be within 32MB of the kernel text. + */ +#define MODULE_END (PAGE_OFFSET) +#define MODULE_START (MODULE_END - 16*1048576) + +#if TASK_SIZE > MODULE_START +#error Top of user space clashes with start of module space +#endif + +/* + * The XIP kernel gets mapped at the bottom of the module vm area. + * Since we use sections to map it, this macro replaces the physical address + * with its virtual address while keeping offset from the base section. + */ +#define XIP_VIRT_ADDR(physaddr) (MODULE_START + ((physaddr) & 0x000fffff)) + +#else /* CONFIG_MMU */ + +/* + * The limitation of user task size can grow up to the end of free ram region. + * It is difficult to define and perhaps will never meet the original meaning + * of this define that was meant to. + * Fortunately, there is no reference for this in noMMU mode, for now. + */ +#ifndef TASK_SIZE +#define TASK_SIZE (CONFIG_DRAM_SIZE) +#endif + +#ifndef TASK_UNMAPPED_BASE +#define TASK_UNMAPPED_BASE UL(0x00000000) +#endif + +#ifndef PHYS_OFFSET +#define PHYS_OFFSET (CONFIG_DRAM_BASE) +#endif + +#ifndef END_MEM +#define END_MEM (CONFIG_DRAM_BASE + CONFIG_DRAM_SIZE) +#endif + +#ifndef PAGE_OFFSET +#define PAGE_OFFSET (PHYS_OFFSET) +#endif + +/* + * The module can be at any place in ram in nommu mode. + */ +#define MODULE_END (END_MEM) +#define MODULE_START (PHYS_OFFSET) + +#endif /* !CONFIG_MMU */ + /* * Size of DMA-consistent memory region. Must be multiple of 2M, * between 2MB and 14MB inclusive. @@ -71,24 +128,6 @@ #define __phys_to_pfn(paddr) ((paddr) >> PAGE_SHIFT) #define __pfn_to_phys(pfn) ((pfn) << PAGE_SHIFT) -/* - * The module space lives between the addresses given by TASK_SIZE - * and PAGE_OFFSET - it must be within 32MB of the kernel text. - */ -#define MODULE_END (PAGE_OFFSET) -#define MODULE_START (MODULE_END - 16*1048576) - -#if TASK_SIZE > MODULE_START -#error Top of user space clashes with start of module space -#endif - -/* - * The XIP kernel gets mapped at the bottom of the module vm area. - * Since we use sections to map it, this macro replaces the physical address - * with its virtual address while keeping offset from the base section. - */ -#define XIP_VIRT_ADDR(physaddr) (MODULE_START + ((physaddr) & 0x000fffff)) - #ifndef __ASSEMBLY__ /* diff --git a/include/asm-arm/mmu.h b/include/asm-arm/mmu.h index a457cb71984..23dde52e094 100644 --- a/include/asm-arm/mmu.h +++ b/include/asm-arm/mmu.h @@ -1,6 +1,8 @@ #ifndef __ARM_MMU_H #define __ARM_MMU_H +#ifdef CONFIG_MMU + typedef struct { #if __LINUX_ARM_ARCH__ >= 6 unsigned int id; @@ -13,4 +15,18 @@ typedef struct { #define ASID(mm) (0) #endif +#else + +/* + * From nommu.h: + * Copyright (C) 2002, David McCullough + * modified for 2.6 by Hyok S. Choi + */ +typedef struct { + struct vm_list_struct *vmlist; + unsigned long end_brk; +} mm_context_t; + +#endif + #endif diff --git a/include/asm-arm/mmu_context.h b/include/asm-arm/mmu_context.h index 81c59facea3..9fadb01e030 100644 --- a/include/asm-arm/mmu_context.h +++ b/include/asm-arm/mmu_context.h @@ -82,6 +82,7 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk) { +#ifdef CONFIG_MMU unsigned int cpu = smp_processor_id(); if (prev != next) { @@ -91,6 +92,7 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next, if (cache_is_vivt()) cpu_clear(cpu, prev->cpu_vm_mask); } +#endif } #define deactivate_mm(tsk,mm) do { } while (0) diff --git a/include/asm-arm/page-nommu.h b/include/asm-arm/page-nommu.h new file mode 100644 index 00000000000..a1bcad06048 --- /dev/null +++ b/include/asm-arm/page-nommu.h @@ -0,0 +1,51 @@ +/* + * linux/include/asm-arm/page-nommu.h + * + * Copyright (C) 2004 Hyok S. Choi + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef _ASMARM_PAGE_NOMMU_H +#define _ASMARM_PAGE_NOMMU_H + +#if !defined(CONFIG_SMALL_TASKS) && PAGE_SHIFT < 13 +#define KTHREAD_SIZE (8192) +#else +#define KTHREAD_SIZE PAGE_SIZE +#endif + +#define get_user_page(vaddr) __get_free_page(GFP_KERNEL) +#define free_user_page(page, addr) free_page(addr) + +#define clear_page(page) memset((page), 0, PAGE_SIZE) +#define copy_page(to,from) memcpy((to), (from), PAGE_SIZE) + +#define clear_user_page(page, vaddr, pg) clear_page(page) +#define copy_user_page(to, from, vaddr, pg) copy_page(to, from) + +/* + * These are used to make use of C type-checking.. + */ +typedef unsigned long pte_t; +typedef unsigned long pmd_t; +typedef unsigned long pgd_t[2]; +typedef unsigned long pgprot_t; + +#define pte_val(x) (x) +#define pmd_val(x) (x) +#define pgd_val(x) ((x)[0]) +#define pgprot_val(x) (x) + +#define __pte(x) (x) +#define __pmd(x) (x) +#define __pgprot(x) (x) + +/* to align the pointer to the (next) page boundary */ +#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK) + +extern unsigned long memory_start; +extern unsigned long memory_end; + +#endif diff --git a/include/asm-arm/page.h b/include/asm-arm/page.h index 66cfeb5290e..63d12f0244c 100644 --- a/include/asm-arm/page.h +++ b/include/asm-arm/page.h @@ -23,6 +23,12 @@ #ifndef __ASSEMBLY__ +#ifndef CONFIG_MMU + +#include "page-nommu.h" + +#else + #include /* @@ -171,6 +177,8 @@ typedef unsigned long pgprot_t; /* the upper-most page table pointer */ extern pmd_t *top_pmd; +#endif /* CONFIG_MMU */ + #include #endif /* !__ASSEMBLY__ */ diff --git a/include/asm-arm/pgalloc.h b/include/asm-arm/pgalloc.h index c4ac2e67768..4d439455291 100644 --- a/include/asm-arm/pgalloc.h +++ b/include/asm-arm/pgalloc.h @@ -16,6 +16,10 @@ #include #include +#define check_pgt_cache() do { } while (0) + +#ifdef CONFIG_MMU + #define _PAGE_USER_TABLE (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_USER)) #define _PAGE_KERNEL_TABLE (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_KERNEL)) @@ -32,8 +36,6 @@ extern void free_pgd_slow(pgd_t *pgd); #define pgd_alloc(mm) get_pgd_slow(mm) #define pgd_free(pgd) free_pgd_slow(pgd) -#define check_pgt_cache() do { } while (0) - /* * Allocate one PTE table. * @@ -126,4 +128,6 @@ pmd_populate(struct mm_struct *mm, pmd_t *pmdp, struct page *ptep) __pmd_populate(pmdp, page_to_pfn(ptep) << PAGE_SHIFT | _PAGE_USER_TABLE); } +#endif /* CONFIG_MMU */ + #endif diff --git a/include/asm-arm/pgtable-nommu.h b/include/asm-arm/pgtable-nommu.h new file mode 100644 index 00000000000..b13322dccf4 --- /dev/null +++ b/include/asm-arm/pgtable-nommu.h @@ -0,0 +1,123 @@ +/* + * linux/include/asm-arm/pgtable-nommu.h + * + * Copyright (C) 1995-2002 Russell King + * Copyright (C) 2004 Hyok S. Choi + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef _ASMARM_PGTABLE_NOMMU_H +#define _ASMARM_PGTABLE_NOMMU_H + +#ifndef __ASSEMBLY__ + +#include +#include +#include +#include +#include + +/* + * Trivial page table functions. + */ +#define pgd_present(pgd) (1) +#define pgd_none(pgd) (0) +#define pgd_bad(pgd) (0) +#define pgd_clear(pgdp) +#define kern_addr_valid(addr) (1) +#define pmd_offset(a, b) ((void *)0) +/* FIXME */ +/* + * PMD_SHIFT determines the size of the area a second-level page table can map + * PGDIR_SHIFT determines what a third-level page table entry can map + */ +#define PGDIR_SHIFT 21 + +#define PGDIR_SIZE (1UL << PGDIR_SHIFT) +#define PGDIR_MASK (~(PGDIR_SIZE-1)) +/* FIXME */ + +#define PAGE_NONE __pgprot(0) +#define PAGE_SHARED __pgprot(0) +#define PAGE_COPY __pgprot(0) +#define PAGE_READONLY __pgprot(0) +#define PAGE_KERNEL __pgprot(0) + +//extern void paging_init(struct meminfo *, struct machine_desc *); +#define swapper_pg_dir ((pgd_t *) 0) + +#define __swp_type(x) (0) +#define __swp_offset(x) (0) +#define __swp_entry(typ,off) ((swp_entry_t) { ((typ) | ((off) << 7)) }) +#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) +#define __swp_entry_to_pte(x) ((pte_t) { (x).val }) + + +typedef pte_t *pte_addr_t; + +static inline int pte_file(pte_t pte) { return 0; } + +/* + * ZERO_PAGE is a global shared page that is always zero: used + * for zero-mapped memory areas etc.. + */ +#define ZERO_PAGE(vaddr) (virt_to_page(0)) + +/* + * Mark the prot value as uncacheable and unbufferable. + */ +#define pgprot_noncached(prot) __pgprot(0) +#define pgprot_writecombine(prot) __pgprot(0) + + +/* + * These would be in other places but having them here reduces the diffs. + */ +extern unsigned int kobjsize(const void *objp); +extern int is_in_rom(unsigned long); + +/* + * No page table caches to initialise. + */ +#define pgtable_cache_init() do { } while (0) +#define io_remap_page_range remap_page_range +#define io_remap_pfn_range remap_pfn_range + +#define MK_IOSPACE_PFN(space, pfn) (pfn) +#define GET_IOSPACE(pfn) 0 +#define GET_PFN(pfn) (pfn) + + +/* + * All 32bit addresses are effectively valid for vmalloc... + * Sort of meaningless for non-VM targets. + */ +#define VMALLOC_START 0 +#define VMALLOC_END 0xffffffff + +#define FIRST_USER_ADDRESS (0) + +#else + +/* + * dummy tlb and user structures. + */ +#define v3_tlb_fns (0) +#define v4_tlb_fns (0) +#define v4wb_tlb_fns (0) +#define v4wbi_tlb_fns (0) +#define v6_tlb_fns (0) + +#define v3_user_fns (0) +#define v4_user_fns (0) +#define v4_mc_user_fns (0) +#define v4wb_user_fns (0) +#define v4wt_user_fns (0) +#define v6_user_fns (0) +#define xscale_mc_user_fns (0) + +#endif /*__ASSEMBLY__*/ + +#endif /* _ASMARM_PGTABLE_H */ diff --git a/include/asm-arm/pgtable.h b/include/asm-arm/pgtable.h index e85c08d78dd..8d3919c6458 100644 --- a/include/asm-arm/pgtable.h +++ b/include/asm-arm/pgtable.h @@ -11,9 +11,15 @@ #define _ASMARM_PGTABLE_H #include +#include + +#ifndef CONFIG_MMU + +#include "pgtable-nommu.h" + +#else #include -#include #include /* @@ -378,4 +384,6 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; #endif /* !__ASSEMBLY__ */ +#endif /* CONFIG_MMU */ + #endif /* _ASMARM_PGTABLE_H */ diff --git a/include/asm-arm/proc-fns.h b/include/asm-arm/proc-fns.h index e9310895e79..1bde92cdaeb 100644 --- a/include/asm-arm/proc-fns.h +++ b/include/asm-arm/proc-fns.h @@ -165,6 +165,8 @@ #include +#ifdef CONFIG_MMU + #define cpu_switch_mm(pgd,mm) cpu_do_switch_mm(virt_to_phys(pgd),mm) #define cpu_get_pgd() \ @@ -176,6 +178,8 @@ (pgd_t *)phys_to_virt(pg); \ }) +#endif + #endif /* __ASSEMBLY__ */ #endif /* __KERNEL__ */ #endif /* __ASM_PROCFNS_H */ -- cgit v1.2.3-70-g09d2 From 9641c7cc5a7f6d5c9dc9b43eea4e5f8c3c08c94e Mon Sep 17 00:00:00 2001 From: Russell King Date: Wed, 21 Jun 2006 20:38:17 +0100 Subject: [ARM] nommu: uaccess tweaks MMUless systems have only one address space for all threads, so both the usual access_ok() checks, and the exception handling do not make much sense. Hence, discard the fixup and exception tables at link time, use memcpy/memset for the user copy/clearing functions, and define the permission check macros to be constants. Some of this patch was derived from the equivalent patch by Hyok S. Choi. Signed-off-by: Hyok S. Choi Signed-off-by: Russell King --- arch/arm/kernel/armksyms.c | 7 ++- arch/arm/kernel/vmlinux.lds.S | 8 +++ arch/arm/lib/Makefile | 13 ++-- include/asm-arm/uaccess.h | 139 ++++++++++++++++++++++++++---------------- 4 files changed, 108 insertions(+), 59 deletions(-) (limited to 'include/asm-arm') diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c index f8bb7abd3e9..da69e660574 100644 --- a/arch/arm/kernel/armksyms.c +++ b/arch/arm/kernel/armksyms.c @@ -109,11 +109,13 @@ EXPORT_SYMBOL(memchr); EXPORT_SYMBOL(__memzero); /* user mem (segment) */ +EXPORT_SYMBOL(__strnlen_user); +EXPORT_SYMBOL(__strncpy_from_user); + +#ifdef CONFIG_MMU EXPORT_SYMBOL(__copy_from_user); EXPORT_SYMBOL(__copy_to_user); EXPORT_SYMBOL(__clear_user); -EXPORT_SYMBOL(__strnlen_user); -EXPORT_SYMBOL(__strncpy_from_user); EXPORT_SYMBOL(__get_user_1); EXPORT_SYMBOL(__get_user_2); @@ -123,6 +125,7 @@ EXPORT_SYMBOL(__put_user_1); EXPORT_SYMBOL(__put_user_2); EXPORT_SYMBOL(__put_user_4); EXPORT_SYMBOL(__put_user_8); +#endif /* crypto hash */ EXPORT_SYMBOL(sha_transform); diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S index 2b254e88595..2df9688a702 100644 --- a/arch/arm/kernel/vmlinux.lds.S +++ b/arch/arm/kernel/vmlinux.lds.S @@ -80,6 +80,10 @@ SECTIONS *(.exit.text) *(.exit.data) *(.exitcall.exit) +#ifndef CONFIG_MMU + *(.fixup) + *(__ex_table) +#endif } .text : { /* Real text segment */ @@ -87,7 +91,9 @@ SECTIONS *(.text) SCHED_TEXT LOCK_TEXT +#ifdef CONFIG_MMU *(.fixup) +#endif *(.gnu.warning) *(.rodata) *(.rodata.*) @@ -142,7 +148,9 @@ SECTIONS */ . = ALIGN(32); __start___ex_table = .; +#ifdef CONFIG_MMU *(__ex_table) +#endif __stop___ex_table = .; /* diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index 7b726b627ea..30351cd4560 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile @@ -6,28 +6,31 @@ lib-y := backtrace.o changebit.o csumipv6.o csumpartial.o \ csumpartialcopy.o csumpartialcopyuser.o clearbit.o \ - copy_page.o delay.o findbit.o memchr.o memcpy.o \ + delay.o findbit.o memchr.o memcpy.o \ memmove.o memset.o memzero.o setbit.o \ strncpy_from_user.o strnlen_user.o \ strchr.o strrchr.o \ testchangebit.o testclearbit.o testsetbit.o \ - getuser.o putuser.o clear_user.o \ ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \ ucmpdi2.o lib1funcs.o div64.o sha1.o \ io-readsb.o io-writesb.o io-readsl.o io-writesl.o +mmu-y := clear_user.o copy_page.o getuser.o putuser.o + # the code in uaccess.S is not preemption safe and # probably faster on ARMv3 only ifeq ($(CONFIG_PREEMPT),y) - lib-y += copy_from_user.o copy_to_user.o + mmu-y += copy_from_user.o copy_to_user.o else ifneq ($(CONFIG_CPU_32v3),y) - lib-y += copy_from_user.o copy_to_user.o + mmu-y += copy_from_user.o copy_to_user.o else - lib-y += uaccess.o + mmu-y += uaccess.o endif endif +lib-$(CONFIG_MMU) += $(mmu-y) + ifeq ($(CONFIG_CPU_32v3),y) lib-y += io-readsw-armv3.o io-writesw-armv3.o else diff --git a/include/asm-arm/uaccess.h b/include/asm-arm/uaccess.h index f909dc75301..87aba57a66c 100644 --- a/include/asm-arm/uaccess.h +++ b/include/asm-arm/uaccess.h @@ -40,16 +40,25 @@ struct exception_table_entry extern int fixup_exception(struct pt_regs *regs); +/* + * These two are intentionally not defined anywhere - if the kernel + * code generates any references to them, that's a bug. + */ +extern int __get_user_bad(void); +extern int __put_user_bad(void); + /* * Note that this is actually 0x1,0000,0000 */ #define KERNEL_DS 0x00000000 -#define USER_DS TASK_SIZE - #define get_ds() (KERNEL_DS) + +#ifdef CONFIG_MMU + +#define USER_DS TASK_SIZE #define get_fs() (current_thread_info()->addr_limit) -static inline void set_fs (mm_segment_t fs) +static inline void set_fs(mm_segment_t fs) { current_thread_info()->addr_limit = fs; modify_domain(DOMAIN_KERNEL, fs ? DOMAIN_CLIENT : DOMAIN_MANAGER); @@ -75,8 +84,6 @@ static inline void set_fs (mm_segment_t fs) : "cc"); \ flag; }) -#define access_ok(type,addr,size) (__range_ok(addr,size) == 0) - /* * Single-value transfer routines. They automatically use the right * size if we just have the right pointer type. Note that the functions @@ -87,20 +94,10 @@ static inline void set_fs (mm_segment_t fs) * fixup code, but there are a few places where it intrudes on the * main code path. When we only write to user space, there is no * problem. - * - * The "__xxx" versions of the user access functions do not verify the - * address space - it must have been done previously with a separate - * "access_ok()" call. - * - * The "xxx_error" versions set the third argument to EFAULT if an - * error occurs, and leave it unchanged on success. Note that these - * versions are void (ie, don't return a value as such). */ - extern int __get_user_1(void *); extern int __get_user_2(void *); extern int __get_user_4(void *); -extern int __get_user_bad(void); #define __get_user_x(__r2,__p,__e,__s,__i...) \ __asm__ __volatile__ ( \ @@ -131,6 +128,74 @@ extern int __get_user_bad(void); __e; \ }) +extern int __put_user_1(void *, unsigned int); +extern int __put_user_2(void *, unsigned int); +extern int __put_user_4(void *, unsigned int); +extern int __put_user_8(void *, unsigned long long); + +#define __put_user_x(__r2,__p,__e,__s) \ + __asm__ __volatile__ ( \ + __asmeq("%0", "r0") __asmeq("%2", "r2") \ + "bl __put_user_" #__s \ + : "=&r" (__e) \ + : "0" (__p), "r" (__r2) \ + : "ip", "lr", "cc") + +#define put_user(x,p) \ + ({ \ + const register typeof(*(p)) __r2 asm("r2") = (x); \ + const register typeof(*(p)) __user *__p asm("r0") = (p);\ + register int __e asm("r0"); \ + switch (sizeof(*(__p))) { \ + case 1: \ + __put_user_x(__r2, __p, __e, 1); \ + break; \ + case 2: \ + __put_user_x(__r2, __p, __e, 2); \ + break; \ + case 4: \ + __put_user_x(__r2, __p, __e, 4); \ + break; \ + case 8: \ + __put_user_x(__r2, __p, __e, 8); \ + break; \ + default: __e = __put_user_bad(); break; \ + } \ + __e; \ + }) + +#else /* CONFIG_MMU */ + +/* + * uClinux has only one addr space, so has simplified address limits. + */ +#define USER_DS KERNEL_DS + +#define segment_eq(a,b) (1) +#define __addr_ok(addr) (1) +#define __range_ok(addr,size) (0) +#define get_fs() (KERNEL_DS) + +static inline void set_fs(mm_segment_t fs) +{ +} + +#define get_user(x,p) __get_user(x,p) +#define put_user(x,p) __put_user(x,p) + +#endif /* CONFIG_MMU */ + +#define access_ok(type,addr,size) (__range_ok(addr,size) == 0) + +/* + * The "__xxx" versions of the user access functions do not verify the + * address space - it must have been done previously with a separate + * "access_ok()" call. + * + * The "xxx_error" versions set the third argument to EFAULT if an + * error occurs, and leave it unchanged on success. Note that these + * versions are void (ie, don't return a value as such). + */ #define __get_user(x,ptr) \ ({ \ long __gu_err = 0; \ @@ -212,43 +277,6 @@ do { \ : "r" (addr), "i" (-EFAULT) \ : "cc") -extern int __put_user_1(void *, unsigned int); -extern int __put_user_2(void *, unsigned int); -extern int __put_user_4(void *, unsigned int); -extern int __put_user_8(void *, unsigned long long); -extern int __put_user_bad(void); - -#define __put_user_x(__r2,__p,__e,__s) \ - __asm__ __volatile__ ( \ - __asmeq("%0", "r0") __asmeq("%2", "r2") \ - "bl __put_user_" #__s \ - : "=&r" (__e) \ - : "0" (__p), "r" (__r2) \ - : "ip", "lr", "cc") - -#define put_user(x,p) \ - ({ \ - const register typeof(*(p)) __r2 asm("r2") = (x); \ - const register typeof(*(p)) __user *__p asm("r0") = (p);\ - register int __e asm("r0"); \ - switch (sizeof(*(__p))) { \ - case 1: \ - __put_user_x(__r2, __p, __e, 1); \ - break; \ - case 2: \ - __put_user_x(__r2, __p, __e, 2); \ - break; \ - case 4: \ - __put_user_x(__r2, __p, __e, 4); \ - break; \ - case 8: \ - __put_user_x(__r2, __p, __e, 8); \ - break; \ - default: __e = __put_user_bad(); break; \ - } \ - __e; \ - }) - #define __put_user(x,ptr) \ ({ \ long __pu_err = 0; \ @@ -354,9 +382,16 @@ do { \ : "cc") +#ifdef CONFIG_MMU extern unsigned long __copy_from_user(void *to, const void __user *from, unsigned long n); extern unsigned long __copy_to_user(void __user *to, const void *from, unsigned long n); extern unsigned long __clear_user(void __user *addr, unsigned long n); +#else +#define __copy_from_user(to,from,n) (memcpy(to, (void __force *)from, n), 0) +#define __copy_to_user(to,from,n) (memcpy((void __force *)to, from, n), 0) +#define __clear_user(addr,n) (memset((void __force *)addr, 0, n), 0) +#endif + extern unsigned long __strncpy_from_user(char *to, const char __user *from, unsigned long count); extern unsigned long __strnlen_user(const char __user *s, long n); -- cgit v1.2.3-70-g09d2 From 888e7bf166a0059480da137f3bd28dcd51175f3d Mon Sep 17 00:00:00 2001 From: Russell King Date: Sat, 24 Jun 2006 17:20:13 +0100 Subject: [ARM] Remove TABLE_SIZE, and several unused function prototypes TABLE_SIZE is never used in arch/arm/mm/init.c. create_memmap_holes(), memtable_init, and setup_io_desc() no longer exist in the kernel. Signed-off-by: Russell King --- arch/arm/mm/init.c | 2 -- include/asm-arm/mach/map.h | 5 ----- 2 files changed, 7 deletions(-) (limited to 'include/asm-arm') diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c index 9ea1f87a707..989fd681c82 100644 --- a/arch/arm/mm/init.c +++ b/arch/arm/mm/init.c @@ -26,8 +26,6 @@ #include #include -#define TABLE_SIZE (2 * PTRS_PER_PTE * sizeof(pte_t)) - DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; diff --git a/include/asm-arm/mach/map.h b/include/asm-arm/mach/map.h index e8ea67c97c7..c3929fc74af 100644 --- a/include/asm-arm/mach/map.h +++ b/include/asm-arm/mach/map.h @@ -16,8 +16,6 @@ struct map_desc { unsigned int type; }; -struct meminfo; - #define MT_DEVICE 0 #define MT_CACHECLEAN 1 #define MT_MINICLEAN 2 @@ -28,7 +26,4 @@ struct meminfo; #define MT_IXP2000_DEVICE 7 #define MT_NONSHARED_DEVICE 8 -extern void create_memmap_holes(struct meminfo *); -extern void memtable_init(struct meminfo *); extern void iotable_init(struct map_desc *, int); -extern void setup_io_desc(void); -- cgit v1.2.3-70-g09d2 From 092c1952e18fec06f3a951113fe1d87492d6e840 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sat, 24 Jun 2006 17:34:50 +0100 Subject: [ARM] nommu: remove fault-armv, mmap and mm-armv files from nommu build Remove fault-armv.o, mmap.o and mm-armv.o from uclinux builds - these are concerned with MMU-ful operations, and as such are redundant for uclinux. Since this also removes iotable_init() and iotable_init() is used extensively in the platform support files, just make it a no-op. Based upon a couple of patches by Hyok. Signed-off-by: Hyok S. Choi Signed-off-by: Russell King --- arch/arm/mm/Makefile | 8 ++++---- include/asm-arm/mach/map.h | 4 ++++ 2 files changed, 8 insertions(+), 4 deletions(-) (limited to 'include/asm-arm') diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile index ddce0387898..21a2770226e 100644 --- a/arch/arm/mm/Makefile +++ b/arch/arm/mm/Makefile @@ -2,11 +2,11 @@ # Makefile for the linux arm-specific parts of the memory manager. # -obj-y := consistent.o extable.o fault-armv.o \ - fault.o init.o iomap.o mmap.o \ - mm-armv.o +obj-y := consistent.o extable.o fault.o init.o \ + iomap.o -obj-$(CONFIG_MMU) += flush.o ioremap.o +obj-$(CONFIG_MMU) += fault-armv.o flush.o ioremap.o mmap.o \ + mm-armv.o ifneq ($(CONFIG_MMU),y) obj-y += nommu.o diff --git a/include/asm-arm/mach/map.h b/include/asm-arm/mach/map.h index c3929fc74af..cef5364ed5f 100644 --- a/include/asm-arm/mach/map.h +++ b/include/asm-arm/mach/map.h @@ -26,4 +26,8 @@ struct map_desc { #define MT_IXP2000_DEVICE 7 #define MT_NONSHARED_DEVICE 8 +#ifdef CONFIG_MMU extern void iotable_init(struct map_desc *, int); +#else +#define iotable_init(map,num) do { } while (0) +#endif -- cgit v1.2.3-70-g09d2