From c6e8b587718c486b55c2ebecc6de231a30beba35 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Thu, 10 Feb 2005 12:19:59 +0000 Subject: Update MIPS to use the 4-level pagetable code thereby getting rid of the compacrapability headers. Signed-off-by: Ralf Baechle --- include/asm-mips/page.h | 42 ++++++++++++++++++++++++++++++++++-------- 1 file changed, 34 insertions(+), 8 deletions(-) (limited to 'include/asm-mips/page.h') diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h index 652b6d67a57..ee25a779bf4 100644 --- a/include/asm-mips/page.h +++ b/include/asm-mips/page.h @@ -87,22 +87,48 @@ static inline void copy_user_page(void *vto, void *vfrom, unsigned long vaddr, typedef struct { unsigned long pte; } pte_t; #define pte_val(x) ((x).pte) #endif +#define __pte(x) ((pte_t) { (x) } ) -typedef struct { unsigned long pmd; } pmd_t; -typedef struct { unsigned long pgd; } pgd_t; -typedef struct { unsigned long pgprot; } pgprot_t; +/* + * For 3-level pagetables we defines these ourselves, for 2-level the + * definitions are supplied by . + */ +#ifdef CONFIG_64BIT +typedef struct { unsigned long pmd; } pmd_t; #define pmd_val(x) ((x).pmd) -#define pgd_val(x) ((x).pgd) -#define pgprot_val(x) ((x).pgprot) +#define __pmd(x) ((pmd_t) { (x) } ) -#define ptep_buddy(x) ((pte_t *)((unsigned long)(x) ^ sizeof(pte_t))) +#endif -#define __pte(x) ((pte_t) { (x) } ) -#define __pmd(x) ((pmd_t) { (x) } ) +/* + * Right now we don't support 4-level pagetables, so all pud-related + * definitions come from . + */ + +/* + * Finall the top of the hierarchy, the pgd + */ +typedef struct { unsigned long pgd; } pgd_t; +#define pgd_val(x) ((x).pgd) #define __pgd(x) ((pgd_t) { (x) } ) + +/* + * Manipulate page protection bits + */ +typedef struct { unsigned long pgprot; } pgprot_t; +#define pgprot_val(x) ((x).pgprot) #define __pgprot(x) ((pgprot_t) { (x) } ) +/* + * On R4000-style MMUs where a TLB entry is mapping a adjacent even / odd + * pair of pages we only have a single global bit per pair of pages. When + * writing to the TLB make sure we always have the bit set for both pages + * or none. This macro is used to access the `buddy' of the pte we're just + * working on. + */ +#define ptep_buddy(x) ((pte_t *)((unsigned long)(x) ^ sizeof(pte_t))) + #endif /* !__ASSEMBLY__ */ /* to align the pointer to the (next) page boundary */ -- cgit v1.2.3-70-g09d2 From 6e760c8dae7d6c47eff011dd4aad53c94d30494b Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Wed, 6 Jul 2005 12:08:11 +0000 Subject: Rename CONFIG_CPU_MIPS{32,64} to CONFIG_CPU_MIPS{32|64}_R1. Signed-off-by: Ralf Baechle --- arch/mips/Kconfig | 26 +++++++++++++++++----- arch/mips/Makefile | 4 ++-- arch/mips/kernel/Makefile | 4 ++-- arch/mips/kernel/r4k_switch.S | 2 +- arch/mips/kernel/traps.c | 2 +- arch/mips/lib-32/Makefile | 4 ++-- arch/mips/lib-64/Makefile | 4 ++-- arch/mips/mm/Makefile | 4 ++-- arch/mips/mm/cache.c | 4 ++-- arch/mips/mm/tlb-r4k.c | 2 +- arch/mips/mm/tlb-sb1.c | 2 +- arch/mips/oprofile/Makefile | 4 ++-- include/asm-mips/addrspace.h | 2 +- include/asm-mips/mach-mips/cpu-feature-overrides.h | 4 ++-- include/asm-mips/page.h | 2 +- include/asm-mips/pgtable-32.h | 6 ++--- include/asm-mips/pgtable-bits.h | 6 ++--- include/asm-mips/pgtable.h | 6 ++--- 18 files changed, 51 insertions(+), 37 deletions(-) (limited to 'include/asm-mips/page.h') diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 0ca63e7ce0a..a4c62c72aa8 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1050,14 +1050,28 @@ choice prompt "CPU type" default CPU_R4X00 -config CPU_MIPS32 - bool "MIPS32" +config CPU_MIPS32_R1 + bool "MIPS32 Release 1" select CPU_SUPPORTS_32BIT_KERNEL + select CPU_HAS_PREFETCH + help + Choose this option to build a kernel for release 1 or later of the + MIPS32 architecture. Most modern embedded systems with a 32-bit + MIPS processor are based on a MIPS32 processor. If you know the + specific type of processor in your system, choose those that one + otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. -config CPU_MIPS64 - bool "MIPS64" +config CPU_MIPS64_R1 + bool "MIPS64 Release 1" select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL + select CPU_HAS_PREFETCH + help + Choose this option to build a kernel for release 1 or later of the + MIPS64 architecture. Many modern embedded systems with a 64-bit + MIPS processor are based on a MIPS64 processor. If you know the + specific type of processor in your system, choose those that one + otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. config CPU_R3000 bool "R3000" @@ -1253,7 +1267,7 @@ config SB1_PASS_2_1_WORKAROUNDS config 64BIT_PHYS_ADDR bool "Support for 64-bit physical address space" - depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_RM9000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32 || CPU_MIPS64) && 32BIT + depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_RM9000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32_R1 || CPU_MIPS64_R1) && 32BIT config CPU_ADVANCED bool "Override CPU Options" @@ -1276,7 +1290,7 @@ config CPU_HAS_LLSC config CPU_HAS_LLDSCD bool "lld/scd Instructions available" if CPU_ADVANCED - default y if !CPU_ADVANCED && !CPU_R3000 && !CPU_VR41XX && !CPU_TX39XX && !CPU_MIPS32 + default y if !CPU_ADVANCED && !CPU_R3000 && !CPU_VR41XX && !CPU_TX39XX && !CPU_MIPS32_R1 help Say Y here if your CPU has the lld and scd instructions, the 64-bit equivalents of ll and sc. Say Y here for better performance, N if diff --git a/arch/mips/Makefile b/arch/mips/Makefile index bbf90279639..56e1d42a579 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -182,11 +182,11 @@ cflags-$(CONFIG_CPU_TX49XX) += \ $(call set_gccflags,r4600,mips3,r4600,mips3,mips2) \ -Wa,--trap -cflags-$(CONFIG_CPU_MIPS32) += \ +cflags-$(CONFIG_CPU_MIPS32_R1) += \ $(call set_gccflags,mips32,mips32,r4600,mips3,mips2) \ -Wa,--trap -cflags-$(CONFIG_CPU_MIPS64) += \ +cflags-$(CONFIG_CPU_MIPS64_R1) += \ $(call set_gccflags,mips64,mips64,r4600,mips3,mips2) \ -Wa,--trap diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index d54964d52c8..0867417032f 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile @@ -28,8 +28,8 @@ obj-$(CONFIG_CPU_RM9000) += r4k_fpu.o r4k_switch.o obj-$(CONFIG_CPU_NEVADA) += r4k_fpu.o r4k_switch.o obj-$(CONFIG_CPU_R10000) += r4k_fpu.o r4k_switch.o obj-$(CONFIG_CPU_SB1) += r4k_fpu.o r4k_switch.o -obj-$(CONFIG_CPU_MIPS32) += r4k_fpu.o r4k_switch.o -obj-$(CONFIG_CPU_MIPS64) += r4k_fpu.o r4k_switch.o +obj-$(CONFIG_CPU_MIPS32_R1) += r4k_fpu.o r4k_switch.o +obj-$(CONFIG_CPU_MIPS64_R1) += r4k_fpu.o r4k_switch.o obj-$(CONFIG_CPU_R6000) += r6000_fpu.o r4k_switch.o obj-$(CONFIG_SMP) += smp.o diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S index d2afbd19a9c..27361f44def 100644 --- a/arch/mips/kernel/r4k_switch.S +++ b/arch/mips/kernel/r4k_switch.S @@ -165,7 +165,7 @@ LEAF(_init_fpu) 1: #endif -#ifdef CONFIG_CPU_MIPS32 +#ifdef CONFIG_CPU_MIPS32_R1 mtc1 t1, $f0 mtc1 t1, $f1 mtc1 t1, $f2 diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 46636a2fe98..b2fa607eeeb 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -864,7 +864,7 @@ asmlinkage void cache_parity_error(void) reg_val & (1<<22) ? "E0 " : ""); printk("IDX: 0x%08x\n", reg_val & ((1<<22)-1)); -#if defined(CONFIG_CPU_MIPS32) || defined (CONFIG_CPU_MIPS64) +#if defined(CONFIG_CPU_MIPS32_R1) || defined(CONFIG_CPU_MIPS64_R1) if (reg_val & (1<<22)) printk("DErrAddr0: 0x%0*lx\n", field, read_c0_derraddr0()); diff --git a/arch/mips/lib-32/Makefile b/arch/mips/lib-32/Makefile index ad285786e74..8119996736a 100644 --- a/arch/mips/lib-32/Makefile +++ b/arch/mips/lib-32/Makefile @@ -4,8 +4,8 @@ lib-y += csum_partial.o memset.o watch.o -obj-$(CONFIG_CPU_MIPS32) += dump_tlb.o -obj-$(CONFIG_CPU_MIPS64) += dump_tlb.o +obj-$(CONFIG_CPU_MIPS32_R1) += dump_tlb.o +obj-$(CONFIG_CPU_MIPS64_R1) += dump_tlb.o obj-$(CONFIG_CPU_NEVADA) += dump_tlb.o obj-$(CONFIG_CPU_R10000) += dump_tlb.o obj-$(CONFIG_CPU_R3000) += r3k_dump_tlb.o diff --git a/arch/mips/lib-64/Makefile b/arch/mips/lib-64/Makefile index ad285786e74..8119996736a 100644 --- a/arch/mips/lib-64/Makefile +++ b/arch/mips/lib-64/Makefile @@ -4,8 +4,8 @@ lib-y += csum_partial.o memset.o watch.o -obj-$(CONFIG_CPU_MIPS32) += dump_tlb.o -obj-$(CONFIG_CPU_MIPS64) += dump_tlb.o +obj-$(CONFIG_CPU_MIPS32_R1) += dump_tlb.o +obj-$(CONFIG_CPU_MIPS64_R1) += dump_tlb.o obj-$(CONFIG_CPU_NEVADA) += dump_tlb.o obj-$(CONFIG_CPU_R10000) += dump_tlb.o obj-$(CONFIG_CPU_R3000) += r3k_dump_tlb.o diff --git a/arch/mips/mm/Makefile b/arch/mips/mm/Makefile index b56a0abdc3d..74fea868af3 100644 --- a/arch/mips/mm/Makefile +++ b/arch/mips/mm/Makefile @@ -9,8 +9,8 @@ obj-$(CONFIG_32BIT) += ioremap.o pgtable-32.o obj-$(CONFIG_64BIT) += pgtable-64.o obj-$(CONFIG_HIGHMEM) += highmem.o -obj-$(CONFIG_CPU_MIPS32) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o -obj-$(CONFIG_CPU_MIPS64) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o +obj-$(CONFIG_CPU_MIPS32_R1) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o +obj-$(CONFIG_CPU_MIPS64_R1) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o obj-$(CONFIG_CPU_NEVADA) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o obj-$(CONFIG_CPU_R10000) += c-r4k.o cex-gen.o pg-r4k.o tlb-andes.o obj-$(CONFIG_CPU_R3000) += c-r3k.o tlb-r3k.o pg-r4k.o diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c index eaecb863197..172293b5839 100644 --- a/arch/mips/mm/cache.c +++ b/arch/mips/mm/cache.c @@ -118,8 +118,8 @@ void __init cpu_cache_init(void) #if defined(CONFIG_CPU_R4X00) || defined(CONFIG_CPU_VR41XX) || \ defined(CONFIG_CPU_R4300) || defined(CONFIG_CPU_R5000) || \ defined(CONFIG_CPU_NEVADA) || defined(CONFIG_CPU_R5432) || \ - defined(CONFIG_CPU_R5500) || defined(CONFIG_CPU_MIPS32) || \ - defined(CONFIG_CPU_MIPS64) || defined(CONFIG_CPU_TX49XX) || \ + defined(CONFIG_CPU_R5500) || defined(CONFIG_CPU_MIPS32_R1) || \ + defined(CONFIG_CPU_MIPS64_R1) || defined(CONFIG_CPU_TX49XX) || \ defined(CONFIG_CPU_RM7000) || defined(CONFIG_CPU_RM9000) ld_mmu_r4xx0(); #endif diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c index 316c8a3d6b5..8297970f0bb 100644 --- a/arch/mips/mm/tlb-r4k.c +++ b/arch/mips/mm/tlb-r4k.c @@ -263,7 +263,7 @@ void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte) idx = read_c0_index(); ptep = pte_offset_map(pmdp, address); -#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) +#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) write_c0_entrylo0(ptep->pte_high); ptep++; write_c0_entrylo1(ptep->pte_high); diff --git a/arch/mips/mm/tlb-sb1.c b/arch/mips/mm/tlb-sb1.c index bba7130e754..f55fbbe473a 100644 --- a/arch/mips/mm/tlb-sb1.c +++ b/arch/mips/mm/tlb-sb1.c @@ -320,7 +320,7 @@ void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte) idx = read_c0_index(); ptep = pte_offset_map(pmdp, address); -#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) +#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) write_c0_entrylo0(ptep->pte_high); ptep++; write_c0_entrylo1(ptep->pte_high); diff --git a/arch/mips/oprofile/Makefile b/arch/mips/oprofile/Makefile index 354261d37d6..17b411b2206 100644 --- a/arch/mips/oprofile/Makefile +++ b/arch/mips/oprofile/Makefile @@ -10,6 +10,6 @@ DRIVER_OBJS = $(addprefix ../../../drivers/oprofile/, \ oprofile-y := $(DRIVER_OBJS) common.o -oprofile-$(CONFIG_CPU_MIPS32) += op_model_mipsxx.o -oprofile-$(CONFIG_CPU_MIPS64) += op_model_mipsxx.o +oprofile-$(CONFIG_CPU_MIPS32_R1) += op_model_mipsxx.o +oprofile-$(CONFIG_CPU_MIPS64_R1) += op_model_mipsxx.o oprofile-$(CONFIG_CPU_RM9000) += op_model_rm9000.o diff --git a/include/asm-mips/addrspace.h b/include/asm-mips/addrspace.h index c806eef41e7..a54cdd41795 100644 --- a/include/asm-mips/addrspace.h +++ b/include/asm-mips/addrspace.h @@ -131,7 +131,7 @@ || defined (CONFIG_CPU_R5000) \ || defined (CONFIG_CPU_NEVADA) \ || defined (CONFIG_CPU_TX49XX) \ - || defined (CONFIG_CPU_MIPS64) + || defined (CONFIG_CPU_MIPS64_R1) #define KUSIZE _LLCONST_(0x0000010000000000) /* 2^^40 */ #define KUSIZE_64 _LLCONST_(0x0000010000000000) /* 2^^40 */ #define K0SIZE _LLCONST_(0x0000001000000000) /* 2^^36 */ diff --git a/include/asm-mips/mach-mips/cpu-feature-overrides.h b/include/asm-mips/mach-mips/cpu-feature-overrides.h index 6f51be571bf..7a1189fdf1a 100644 --- a/include/asm-mips/mach-mips/cpu-feature-overrides.h +++ b/include/asm-mips/mach-mips/cpu-feature-overrides.h @@ -14,7 +14,7 @@ /* * CPU feature overrides for MIPS boards */ -#ifdef CONFIG_CPU_MIPS32 +#ifdef CONFIG_CPU_MIPS32_R1 #define cpu_has_tlb 1 #define cpu_has_4kex 1 #define cpu_has_4ktlb 1 @@ -39,7 +39,7 @@ /* #define cpu_has_subset_pcaches ? */ #endif -#ifdef CONFIG_CPU_MIPS64 +#ifdef CONFIG_CPU_MIPS64_R1 #define cpu_has_tlb 1 #define cpu_has_4kex 1 #define cpu_has_4ktlb 1 diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h index ee25a779bf4..0076a537cf0 100644 --- a/include/asm-mips/page.h +++ b/include/asm-mips/page.h @@ -76,7 +76,7 @@ static inline void copy_user_page(void *vto, void *vfrom, unsigned long vaddr, * These are used to make use of C type-checking.. */ #ifdef CONFIG_64BIT_PHYS_ADDR - #ifdef CONFIG_CPU_MIPS32 + #ifdef CONFIG_CPU_MIPS32_R1 typedef struct { unsigned long pte_low, pte_high; } pte_t; #define pte_val(x) ((x).pte_low | ((unsigned long long)(x).pte_high << 32)) #else diff --git a/include/asm-mips/pgtable-32.h b/include/asm-mips/pgtable-32.h index 9b4d39d9f2f..217afc375a8 100644 --- a/include/asm-mips/pgtable-32.h +++ b/include/asm-mips/pgtable-32.h @@ -116,7 +116,7 @@ static inline void pmd_clear(pmd_t *pmdp) pmd_val(*pmdp) = ((unsigned long) invalid_pte_table); } -#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) +#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) #define pte_page(x) pfn_to_page(pte_pfn(x)) #define pte_pfn(x) ((unsigned long)((x).pte_high >> 6)) static inline pte_t @@ -139,7 +139,7 @@ pfn_pte(unsigned long pfn, pgprot_t prot) #define pte_pfn(x) ((unsigned long)((x).pte >> PAGE_SHIFT)) #define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) #endif -#endif /* defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) */ +#endif /* defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) */ #define __pgd_offset(address) pgd_index(address) #define __pud_offset(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1)) @@ -202,7 +202,7 @@ pfn_pte(unsigned long pfn, pgprot_t prot) */ #define PTE_FILE_MAX_BITS 27 -#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) +#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) /* fixme */ #define pte_to_pgoff(_pte) (((_pte).pte_high >> 6) + ((_pte).pte_high & 0x3f)) #define pgoff_to_pte(off) \ diff --git a/include/asm-mips/pgtable-bits.h b/include/asm-mips/pgtable-bits.h index 3aad751ccd5..01e76e932e3 100644 --- a/include/asm-mips/pgtable-bits.h +++ b/include/asm-mips/pgtable-bits.h @@ -33,7 +33,7 @@ * unpredictable things. The code (when it is written) to deal with * this problem will be in the update_mmu_cache() code for the r4k. */ -#if defined(CONFIG_CPU_MIPS32) && defined(CONFIG_64BIT_PHYS_ADDR) +#if defined(CONFIG_CPU_MIPS32_R1) && defined(CONFIG_64BIT_PHYS_ADDR) #define _PAGE_PRESENT (1<<6) /* implemented in software */ #define _PAGE_READ (1<<7) /* implemented in software */ @@ -123,7 +123,7 @@ #endif #endif -#endif /* defined(CONFIG_CPU_MIPS32) && defined(CONFIG_64BIT_PHYS_ADDR) */ +#endif /* defined(CONFIG_CPU_MIPS32_R1) && defined(CONFIG_64BIT_PHYS_ADDR) */ #define __READABLE (_PAGE_READ | _PAGE_SILENT_READ | _PAGE_ACCESSED) #define __WRITEABLE (_PAGE_WRITE | _PAGE_SILENT_WRITE | _PAGE_MODIFIED) @@ -140,7 +140,7 @@ #define PAGE_CACHABLE_DEFAULT _CACHE_CACHABLE_COW #endif -#if defined(CONFIG_CPU_MIPS32) && defined(CONFIG_64BIT_PHYS_ADDR) +#if defined(CONFIG_CPU_MIPS32_R1) && defined(CONFIG_64BIT_PHYS_ADDR) #define CONF_CM_DEFAULT (PAGE_CACHABLE_DEFAULT >> 3) #else #define CONF_CM_DEFAULT (PAGE_CACHABLE_DEFAULT >> 9) diff --git a/include/asm-mips/pgtable.h b/include/asm-mips/pgtable.h index 754ec6c5a8f..9f75baf11e2 100644 --- a/include/asm-mips/pgtable.h +++ b/include/asm-mips/pgtable.h @@ -82,7 +82,7 @@ extern void paging_init(void); #define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL)) #define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT) -#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) +#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) static inline void set_pte(pte_t *ptep, pte_t pte) { ptep->pte_high = pte.pte_high; @@ -170,7 +170,7 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; * Undefined behaviour if not.. */ static inline int pte_user(pte_t pte) { BUG(); return 0; } -#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) +#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) static inline int pte_read(pte_t pte) { return (pte).pte_low & _PAGE_READ; } static inline int pte_write(pte_t pte) { return (pte).pte_low & _PAGE_WRITE; } static inline int pte_dirty(pte_t pte) { return (pte).pte_low & _PAGE_MODIFIED; } @@ -329,7 +329,7 @@ static inline pgprot_t pgprot_noncached(pgprot_t _prot) */ #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) -#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) +#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) { pte.pte_low &= _PAGE_CHG_MASK; -- cgit v1.2.3-70-g09d2 From ec917c2c1ab4359a1d438e62daeb50cc42e632e1 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Fri, 7 Oct 2005 16:58:15 +0100 Subject: Fixup a few lose ends in explicit support for MIPS R1/R2. Signed-off-by: Ralf Baechle --- arch/mips/kernel/Makefile | 4 +- arch/mips/kernel/r4k_switch.S | 2 +- arch/mips/kernel/traps.c | 2 +- arch/mips/lib-32/Makefile | 4 +- arch/mips/lib-64/Makefile | 4 +- arch/mips/mm/Makefile | 4 +- arch/mips/oprofile/Makefile | 4 +- include/asm-mips/addrspace.h | 2 +- include/asm-mips/bitops.h | 54 +++++++++++----------- include/asm-mips/hazards.h | 2 +- include/asm-mips/interrupt.h | 11 ++--- include/asm-mips/mach-mips/cpu-feature-overrides.h | 4 +- include/asm-mips/page.h | 2 +- 13 files changed, 49 insertions(+), 50 deletions(-) (limited to 'include/asm-mips/page.h') diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index 0213b349617..72f2126ad19 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile @@ -28,8 +28,8 @@ obj-$(CONFIG_CPU_RM9000) += r4k_fpu.o r4k_switch.o obj-$(CONFIG_CPU_NEVADA) += r4k_fpu.o r4k_switch.o obj-$(CONFIG_CPU_R10000) += r4k_fpu.o r4k_switch.o obj-$(CONFIG_CPU_SB1) += r4k_fpu.o r4k_switch.o -obj-$(CONFIG_CPU_MIPS32_R1) += r4k_fpu.o r4k_switch.o -obj-$(CONFIG_CPU_MIPS64_R1) += r4k_fpu.o r4k_switch.o +obj-$(CONFIG_CPU_MIPS32) += r4k_fpu.o r4k_switch.o +obj-$(CONFIG_CPU_MIPS64) += r4k_fpu.o r4k_switch.o obj-$(CONFIG_CPU_R6000) += r6000_fpu.o r4k_switch.o obj-$(CONFIG_SMP) += smp.o diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S index 27361f44def..d2afbd19a9c 100644 --- a/arch/mips/kernel/r4k_switch.S +++ b/arch/mips/kernel/r4k_switch.S @@ -165,7 +165,7 @@ LEAF(_init_fpu) 1: #endif -#ifdef CONFIG_CPU_MIPS32_R1 +#ifdef CONFIG_CPU_MIPS32 mtc1 t1, $f0 mtc1 t1, $f1 mtc1 t1, $f2 diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index e38f24b2b3d..eccae819160 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -885,7 +885,7 @@ asmlinkage void cache_parity_error(void) reg_val & (1<<22) ? "E0 " : ""); printk("IDX: 0x%08x\n", reg_val & ((1<<22)-1)); -#if defined(CONFIG_CPU_MIPS32_R1) || defined(CONFIG_CPU_MIPS64_R1) +#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) if (reg_val & (1<<22)) printk("DErrAddr0: 0x%0*lx\n", field, read_c0_derraddr0()); diff --git a/arch/mips/lib-32/Makefile b/arch/mips/lib-32/Makefile index 8119996736a..ad285786e74 100644 --- a/arch/mips/lib-32/Makefile +++ b/arch/mips/lib-32/Makefile @@ -4,8 +4,8 @@ lib-y += csum_partial.o memset.o watch.o -obj-$(CONFIG_CPU_MIPS32_R1) += dump_tlb.o -obj-$(CONFIG_CPU_MIPS64_R1) += dump_tlb.o +obj-$(CONFIG_CPU_MIPS32) += dump_tlb.o +obj-$(CONFIG_CPU_MIPS64) += dump_tlb.o obj-$(CONFIG_CPU_NEVADA) += dump_tlb.o obj-$(CONFIG_CPU_R10000) += dump_tlb.o obj-$(CONFIG_CPU_R3000) += r3k_dump_tlb.o diff --git a/arch/mips/lib-64/Makefile b/arch/mips/lib-64/Makefile index 8119996736a..ad285786e74 100644 --- a/arch/mips/lib-64/Makefile +++ b/arch/mips/lib-64/Makefile @@ -4,8 +4,8 @@ lib-y += csum_partial.o memset.o watch.o -obj-$(CONFIG_CPU_MIPS32_R1) += dump_tlb.o -obj-$(CONFIG_CPU_MIPS64_R1) += dump_tlb.o +obj-$(CONFIG_CPU_MIPS32) += dump_tlb.o +obj-$(CONFIG_CPU_MIPS64) += dump_tlb.o obj-$(CONFIG_CPU_NEVADA) += dump_tlb.o obj-$(CONFIG_CPU_R10000) += dump_tlb.o obj-$(CONFIG_CPU_R3000) += r3k_dump_tlb.o diff --git a/arch/mips/mm/Makefile b/arch/mips/mm/Makefile index 0b738ad60fb..b0178da019f 100644 --- a/arch/mips/mm/Makefile +++ b/arch/mips/mm/Makefile @@ -9,8 +9,8 @@ obj-$(CONFIG_32BIT) += ioremap.o pgtable-32.o obj-$(CONFIG_64BIT) += pgtable-64.o obj-$(CONFIG_HIGHMEM) += highmem.o -obj-$(CONFIG_CPU_MIPS32_R1) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o -obj-$(CONFIG_CPU_MIPS64_R1) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o +obj-$(CONFIG_CPU_MIPS32) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o +obj-$(CONFIG_CPU_MIPS64) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o obj-$(CONFIG_CPU_NEVADA) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o obj-$(CONFIG_CPU_R10000) += c-r4k.o cex-gen.o pg-r4k.o tlb-andes.o obj-$(CONFIG_CPU_R3000) += c-r3k.o tlb-r3k.o pg-r4k.o diff --git a/arch/mips/oprofile/Makefile b/arch/mips/oprofile/Makefile index 17b411b2206..354261d37d6 100644 --- a/arch/mips/oprofile/Makefile +++ b/arch/mips/oprofile/Makefile @@ -10,6 +10,6 @@ DRIVER_OBJS = $(addprefix ../../../drivers/oprofile/, \ oprofile-y := $(DRIVER_OBJS) common.o -oprofile-$(CONFIG_CPU_MIPS32_R1) += op_model_mipsxx.o -oprofile-$(CONFIG_CPU_MIPS64_R1) += op_model_mipsxx.o +oprofile-$(CONFIG_CPU_MIPS32) += op_model_mipsxx.o +oprofile-$(CONFIG_CPU_MIPS64) += op_model_mipsxx.o oprofile-$(CONFIG_CPU_RM9000) += op_model_rm9000.o diff --git a/include/asm-mips/addrspace.h b/include/asm-mips/addrspace.h index 7abdb926faf..16c1c08d0a0 100644 --- a/include/asm-mips/addrspace.h +++ b/include/asm-mips/addrspace.h @@ -131,7 +131,7 @@ || defined (CONFIG_CPU_R5000) \ || defined (CONFIG_CPU_NEVADA) \ || defined (CONFIG_CPU_TX49XX) \ - || defined (CONFIG_CPU_MIPS64_R1) + || defined (CONFIG_CPU_MIPS64) #define KUSIZE _LLCONST_(0x0000010000000000) /* 2^^40 */ #define KUSIZE_64 _LLCONST_(0x0000010000000000) /* 2^^40 */ #define K0SIZE _LLCONST_(0x0000001000000000) /* 2^^36 */ diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h index 2ba20730a3e..5496f9064a6 100644 --- a/include/asm-mips/bitops.h +++ b/include/asm-mips/bitops.h @@ -12,6 +12,7 @@ #include #include #include +#include #include /* sigh ... */ #include @@ -546,33 +547,27 @@ static inline int test_bit(unsigned long nr, const volatile unsigned long *addr) return 1UL & (addr[nr >> SZLONG_LOG] >> (nr & SZLONG_MASK)); } -#ifdef CONFIG_CPU_MIPS32_R1 /* - * Return the bit position (0..31) of the most significant 1 bit in a word + * Return the bit position (0..63) of the most significant 1 bit in a word * Returns -1 if no 1 bit exists */ -static __inline__ int __ilog2(unsigned long x) +static inline int __ilog2(unsigned long x) { int lz; - __asm__ ( - " .set push \n" - " .set mips32 \n" - " clz %0, %1 \n" - " .set pop \n" - : "=r" (lz) - : "r" (x)); + if (sizeof(x) == 4) { + __asm__ ( + " .set push \n" + " .set mips32 \n" + " clz %0, %1 \n" + " .set pop \n" + : "=r" (lz) + : "r" (x)); - return 31 - lz; -} -#elif defined(CONFIG_CPU_MIPS64_R1) -/* - * Return the bit position (0..63) of the most significant 1 bit in a word - * Returns -1 if no 1 bit exists - */ -static __inline__ int __ilog2(unsigned long x) -{ - int lz; + return 31 - lz; + } + + BUG_ON(sizeof(x) != 8); __asm__ ( " .set push \n" @@ -584,7 +579,6 @@ static __inline__ int __ilog2(unsigned long x) return 63 - lz; } -#endif /* * __ffs - find first bit in word. @@ -595,7 +589,7 @@ static __inline__ int __ilog2(unsigned long x) */ static inline unsigned long __ffs(unsigned long word) { -#if defined(CONFIG_CPU_MIPS32_R1) || defined(CONFIG_CPU_MIPS64_R1) +#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) return __ilog2(word & -word); #else int b = 0, s; @@ -606,6 +600,8 @@ static inline unsigned long __ffs(unsigned long word) s = 4; if (word << 28 != 0) s = 0; b += s; word >>= s; s = 2; if (word << 30 != 0) s = 0; b += s; word >>= s; s = 1; if (word << 31 != 0) s = 0; b += s; + + return b; #endif #ifdef CONFIG_64BIT s = 32; if (word << 32 != 0) s = 0; b += s; word >>= s; @@ -614,9 +610,10 @@ static inline unsigned long __ffs(unsigned long word) s = 4; if (word << 60 != 0) s = 0; b += s; word >>= s; s = 2; if (word << 62 != 0) s = 0; b += s; word >>= s; s = 1; if (word << 63 != 0) s = 0; b += s; -#endif + return b; #endif +#endif } /* @@ -655,10 +652,10 @@ static inline unsigned long ffz(unsigned long word) */ static inline unsigned long flz(unsigned long word) { -#if defined(CONFIG_CPU_MIPS32_R1) || defined(CONFIG_CPU_MIPS64_R1) +#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) return __ilog2(~word); #else -#if defined(CONFIG_32BIT) +#ifdef CONFIG_32BIT int r = 31, s; word = ~word; s = 16; if ((word & 0xffff0000)) s = 0; r -= s; word <<= s; @@ -666,8 +663,10 @@ static inline unsigned long flz(unsigned long word) s = 4; if ((word & 0xf0000000)) s = 0; r -= s; word <<= s; s = 2; if ((word & 0xc0000000)) s = 0; r -= s; word <<= s; s = 1; if ((word & 0x80000000)) s = 0; r -= s; + + return r; #endif -#if defined(CONFIG_64BIT) +#ifdef CONFIG_64BIT int r = 63, s; word = ~word; s = 32; if ((word & 0xffffffff00000000UL)) s = 0; r -= s; word <<= s; @@ -676,9 +675,10 @@ static inline unsigned long flz(unsigned long word) s = 4; if ((word & 0xf000000000000000UL)) s = 0; r -= s; word <<= s; s = 2; if ((word & 0xc000000000000000UL)) s = 0; r -= s; word <<= s; s = 1; if ((word & 0x8000000000000000UL)) s = 0; r -= s; -#endif + return r; #endif +#endif } /* diff --git a/include/asm-mips/hazards.h b/include/asm-mips/hazards.h index 5250231e936..7517189e469 100644 --- a/include/asm-mips/hazards.h +++ b/include/asm-mips/hazards.h @@ -232,7 +232,7 @@ __asm__( #endif -#if defined(CONFIG_CPU_MIPS32_R2) || defined (CONFIG_CPU_MIPS64_R2) +#ifdef CONFIG_CPU_MIPSR2 #define instruction_hazard() \ do { \ __label__ __next; \ diff --git a/include/asm-mips/interrupt.h b/include/asm-mips/interrupt.h index 0ba99f019be..a5735761f5e 100644 --- a/include/asm-mips/interrupt.h +++ b/include/asm-mips/interrupt.h @@ -19,7 +19,7 @@ __asm__ ( " .set push \n" " .set reorder \n" " .set noat \n" -#if defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_CPU_MIPS64_R2) +#ifdef CONFIG_CPU_MIPSR2 " ei \n" #else " mfc0 $1,$12 \n" @@ -51,7 +51,7 @@ __asm__ ( " .macro local_irq_disable\n" " .set push \n" " .set noat \n" -#if defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_CPU_MIPS64_R2) +#ifdef CONFIG_CPU_MIPSR2 " di \n" #else " mfc0 $1,$12 \n" @@ -91,7 +91,7 @@ __asm__ ( " .set push \n" " .set reorder \n" " .set noat \n" -#if defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_CPU_MIPS64_R2) +#ifdef CONFIG_CPU_MIPSR2 " di \\result \n" #else " mfc0 \\result, $12 \n" @@ -115,8 +115,7 @@ __asm__ ( " .macro local_irq_restore flags \n" " .set noreorder \n" " .set noat \n" -#if (defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_CPU_MIPS64_R2)) && \ - defined(CONFIG_IRQ_CPU) +#if defined(CONFIG_CPU_MIPSR2) && defined(CONFIG_IRQ_CPU) /* * Slow, but doesn't suffer from a relativly unlikely race * condition we're having since days 1. @@ -125,7 +124,7 @@ __asm__ ( " di \n" " ei \n" "1: \n" -#elif defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_CPU_MIPS64_R2) +#elif defined(CONFIG_CPU_MIPSR2) /* * Fast, dangerous. Life is fun, life is good. */ diff --git a/include/asm-mips/mach-mips/cpu-feature-overrides.h b/include/asm-mips/mach-mips/cpu-feature-overrides.h index 5c5edbf9370..9f92aed1775 100644 --- a/include/asm-mips/mach-mips/cpu-feature-overrides.h +++ b/include/asm-mips/mach-mips/cpu-feature-overrides.h @@ -14,7 +14,7 @@ /* * CPU feature overrides for MIPS boards */ -#ifdef CONFIG_CPU_MIPS32_R1 +#ifdef CONFIG_CPU_MIPS32 #define cpu_has_tlb 1 #define cpu_has_4kex 1 #define cpu_has_4kcache 1 @@ -40,7 +40,7 @@ #define cpu_icache_snoops_remote_store 1 #endif -#ifdef CONFIG_CPU_MIPS64_R1 +#ifdef CONFIG_CPU_MIPS64 #define cpu_has_tlb 1 #define cpu_has_4kex 1 #define cpu_has_4kcache 1 diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h index 0076a537cf0..ee25a779bf4 100644 --- a/include/asm-mips/page.h +++ b/include/asm-mips/page.h @@ -76,7 +76,7 @@ static inline void copy_user_page(void *vto, void *vfrom, unsigned long vaddr, * These are used to make use of C type-checking.. */ #ifdef CONFIG_64BIT_PHYS_ADDR - #ifdef CONFIG_CPU_MIPS32_R1 + #ifdef CONFIG_CPU_MIPS32 typedef struct { unsigned long pte_low, pte_high; } pte_t; #define pte_val(x) ((x).pte_low | ((unsigned long long)(x).pte_high << 32)) #else -- cgit v1.2.3-70-g09d2