From 71b94e2e866aa35f40945d9e820fc3214b792d1f Mon Sep 17 00:00:00 2001 From: Josh Wu Date: Thu, 9 May 2013 15:34:54 +0800 Subject: mtd: atmel_nand: replace cpu_is_at32ap7000() with a nand platform data The nand driver use cpu_is_at32ap7000() macro for a workaround. For the multi-platform support, we will remove this cpu_is_xxx() macro. This patch adds a boolean variable need_reset_workaround in structure atmel_nand_data. Using this variable we can remove cpu_is_at32ap7000() macro. Hans-Christian: Feel free to push this through the mtd tree, if they won't accept it I'm working on getting my workflow up on the linux-avr32.git tree. Signed-off-by: Josh Wu Acked-by: Hans-Christian Egtvedt Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- include/linux/platform_data/atmel.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include/linux/platform_data') diff --git a/include/linux/platform_data/atmel.h b/include/linux/platform_data/atmel.h index 6a293b7fff3..59f558d9b81 100644 --- a/include/linux/platform_data/atmel.h +++ b/include/linux/platform_data/atmel.h @@ -71,6 +71,9 @@ struct atmel_nand_data { u8 on_flash_bbt; /* bbt on flash */ struct mtd_partition *parts; unsigned int num_parts; + + /* default is false, only for at32ap7000 chip is true */ + bool need_reset_workaround; }; /* Serial */ -- cgit v1.2.3-70-g09d2 From 1b7192658a08f70df0f290634fd7cd2ecb629fc9 Mon Sep 17 00:00:00 2001 From: Josh Wu Date: Thu, 9 May 2013 15:34:55 +0800 Subject: mtd: atmel_nand: add a new dt binding item for nand dma support This patch will set the nand dma support in dts. Since we will not use cpu_is_xxx() in nand driver. We needn't include the mach/cpu.h any more. Signed-off-by: Josh Wu Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- Documentation/devicetree/bindings/mtd/atmel-nand.txt | 1 + drivers/mtd/nand/atmel_nand.c | 11 +++-------- include/linux/platform_data/atmel.h | 1 + 3 files changed, 5 insertions(+), 8 deletions(-) (limited to 'include/linux/platform_data') diff --git a/Documentation/devicetree/bindings/mtd/atmel-nand.txt b/Documentation/devicetree/bindings/mtd/atmel-nand.txt index d555421ea49..b6eb484366a 100644 --- a/Documentation/devicetree/bindings/mtd/atmel-nand.txt +++ b/Documentation/devicetree/bindings/mtd/atmel-nand.txt @@ -15,6 +15,7 @@ Required properties: optional gpio and may be set to 0 if not present. Optional properties: +- atmel,nand-has-dma : boolean to support dma transfer for nand read/write. - nand-ecc-mode : String, operation mode of the NAND ecc mode, soft by default. Supported values are: "none", "soft", "hw", "hw_syndrome", "hw_oob_first", "soft_bch". diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c index 7bf912b5b96..61d38697986 100644 --- a/drivers/mtd/nand/atmel_nand.c +++ b/drivers/mtd/nand/atmel_nand.c @@ -43,8 +43,6 @@ #include #include -#include - static int use_dma = 1; module_param(use_dma, int, 0); @@ -128,11 +126,6 @@ struct atmel_nand_host { static struct nand_ecclayout atmel_pmecc_oobinfo; -static int cpu_has_dma(void) -{ - return cpu_is_at91sam9rl() || cpu_is_at91sam9g45(); -} - /* * Enable NAND. */ @@ -1336,6 +1329,8 @@ static int atmel_of_init_port(struct atmel_nand_host *host, board->on_flash_bbt = of_get_nand_on_flash_bbt(np); + board->has_dma = of_property_read_bool(np, "atmel,nand-has-dma"); + if (of_get_nand_bus_width(np) == 16) board->bus_width_16 = 1; @@ -1600,7 +1595,7 @@ static int __init atmel_nand_probe(struct platform_device *pdev) nand_chip->bbt_options |= NAND_BBT_USE_FLASH; } - if (!cpu_has_dma()) + if (!host->board.has_dma) use_dma = 0; if (use_dma) { diff --git a/include/linux/platform_data/atmel.h b/include/linux/platform_data/atmel.h index 59f558d9b81..cea9f70133c 100644 --- a/include/linux/platform_data/atmel.h +++ b/include/linux/platform_data/atmel.h @@ -71,6 +71,7 @@ struct atmel_nand_data { u8 on_flash_bbt; /* bbt on flash */ struct mtd_partition *parts; unsigned int num_parts; + bool has_dma; /* support dma transfer */ /* default is false, only for at32ap7000 chip is true */ bool need_reset_workaround; -- cgit v1.2.3-70-g09d2 From ec82135a011cf657ef02cfa2038331b381e39960 Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Mon, 12 Aug 2013 14:14:54 -0300 Subject: mtd: nand: pxa3xx: Remove unneeded internal cmdset Use the defined macros for NAND command instead of using a constant internal structure. This commit is only a cleanup, there's no functionality modification. Signed-off-by: Ezequiel Garcia Tested-by: Daniel Mack Signed-off-by: Brian Norris Signed-off-by: David Woodhouse --- drivers/mtd/nand/pxa3xx_nand.c | 63 ++++++++------------------- include/linux/platform_data/mtd-nand-pxa3xx.h | 13 ------ 2 files changed, 17 insertions(+), 59 deletions(-) (limited to 'include/linux/platform_data') diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c index 8757491d19d..ad63e8c02fd 100644 --- a/drivers/mtd/nand/pxa3xx_nand.c +++ b/drivers/mtd/nand/pxa3xx_nand.c @@ -131,7 +131,6 @@ enum pxa3xx_nand_variant { struct pxa3xx_nand_host { struct nand_chip chip; - struct pxa3xx_nand_cmdset *cmdset; struct mtd_info *mtd; void *info_data; @@ -205,23 +204,6 @@ static bool use_dma = 1; module_param(use_dma, bool, 0444); MODULE_PARM_DESC(use_dma, "enable DMA for data transferring to/from NAND HW"); -/* - * Default NAND flash controller configuration setup by the - * bootloader. This configuration is used only when pdata->keep_config is set - */ -static struct pxa3xx_nand_cmdset default_cmdset = { - .read1 = 0x3000, - .read2 = 0x0050, - .program = 0x1080, - .read_status = 0x0070, - .read_id = 0x0090, - .erase = 0xD060, - .reset = 0x00FF, - .lock = 0x002A, - .unlock = 0x2423, - .lock_status = 0x007A, -}; - static struct pxa3xx_nand_timing timing[] = { { 40, 80, 60, 100, 80, 100, 90000, 400, 40, }, { 10, 0, 20, 40, 30, 40, 11123, 110, 10, }, @@ -530,7 +512,6 @@ static inline int is_buf_blank(uint8_t *buf, size_t len) static int prepare_command_pool(struct pxa3xx_nand_info *info, int command, uint16_t column, int page_addr) { - uint16_t cmd; int addr_cycle, exec_cmd; struct pxa3xx_nand_host *host; struct mtd_info *mtd; @@ -580,21 +561,17 @@ static int prepare_command_pool(struct pxa3xx_nand_info *info, int command, switch (command) { case NAND_CMD_READOOB: case NAND_CMD_READ0: - cmd = host->cmdset->read1; + info->buf_start = column; + info->ndcb0 |= NDCB0_CMD_TYPE(0) + | addr_cycle + | NAND_CMD_READ0; + if (command == NAND_CMD_READOOB) - info->buf_start = mtd->writesize + column; - else - info->buf_start = column; + info->buf_start += mtd->writesize; - if (unlikely(host->page_size < PAGE_CHUNK_SIZE)) - info->ndcb0 |= NDCB0_CMD_TYPE(0) - | addr_cycle - | (cmd & NDCB0_CMD1_MASK); - else - info->ndcb0 |= NDCB0_CMD_TYPE(0) - | NDCB0_DBC - | addr_cycle - | cmd; + /* Second command setting for large pages */ + if (host->page_size >= PAGE_CHUNK_SIZE) + info->ndcb0 |= NDCB0_DBC | (NAND_CMD_READSTART << 8); case NAND_CMD_SEQIN: /* small page addr setting */ @@ -625,62 +602,58 @@ static int prepare_command_pool(struct pxa3xx_nand_info *info, int command, break; } - cmd = host->cmdset->program; info->ndcb0 |= NDCB0_CMD_TYPE(0x1) | NDCB0_AUTO_RS | NDCB0_ST_ROW_EN | NDCB0_DBC - | cmd + | (NAND_CMD_PAGEPROG << 8) + | NAND_CMD_SEQIN | addr_cycle; break; case NAND_CMD_PARAM: - cmd = NAND_CMD_PARAM; info->buf_count = 256; info->ndcb0 |= NDCB0_CMD_TYPE(0) | NDCB0_ADDR_CYC(1) | NDCB0_LEN_OVRD - | cmd; + | command; info->ndcb1 = (column & 0xFF); info->ndcb3 = 256; info->data_size = 256; break; case NAND_CMD_READID: - cmd = host->cmdset->read_id; info->buf_count = host->read_id_bytes; info->ndcb0 |= NDCB0_CMD_TYPE(3) | NDCB0_ADDR_CYC(1) - | cmd; + | command; info->ndcb1 = (column & 0xFF); info->data_size = 8; break; case NAND_CMD_STATUS: - cmd = host->cmdset->read_status; info->buf_count = 1; info->ndcb0 |= NDCB0_CMD_TYPE(4) | NDCB0_ADDR_CYC(1) - | cmd; + | command; info->data_size = 8; break; case NAND_CMD_ERASE1: - cmd = host->cmdset->erase; info->ndcb0 |= NDCB0_CMD_TYPE(2) | NDCB0_AUTO_RS | NDCB0_ADDR_CYC(3) | NDCB0_DBC - | cmd; + | (NAND_CMD_ERASE2 << 8) + | NAND_CMD_ERASE1; info->ndcb1 = page_addr; info->ndcb2 = 0; break; case NAND_CMD_RESET: - cmd = host->cmdset->reset; info->ndcb0 |= NDCB0_CMD_TYPE(5) - | cmd; + | command; break; @@ -876,7 +849,6 @@ static int pxa3xx_nand_config_flash(struct pxa3xx_nand_info *info, } /* calculate flash information */ - host->cmdset = &default_cmdset; host->page_size = f->page_size; host->read_id_bytes = (f->page_size == 2048) ? 4 : 2; @@ -922,7 +894,6 @@ static int pxa3xx_nand_detect_config(struct pxa3xx_nand_info *info) } host->reg_ndcr = ndcr & ~NDCR_INT_MASK; - host->cmdset = &default_cmdset; host->ndtr0cs0 = nand_readl(info, NDTR0CS0); host->ndtr1cs0 = nand_readl(info, NDTR1CS0); diff --git a/include/linux/platform_data/mtd-nand-pxa3xx.h b/include/linux/platform_data/mtd-nand-pxa3xx.h index c42f39f2019..ffb801998e5 100644 --- a/include/linux/platform_data/mtd-nand-pxa3xx.h +++ b/include/linux/platform_data/mtd-nand-pxa3xx.h @@ -16,19 +16,6 @@ struct pxa3xx_nand_timing { unsigned int tAR; /* ND_ALE low to ND_nRE low delay */ }; -struct pxa3xx_nand_cmdset { - uint16_t read1; - uint16_t read2; - uint16_t program; - uint16_t read_status; - uint16_t read_id; - uint16_t erase; - uint16_t reset; - uint16_t lock; - uint16_t unlock; - uint16_t lock_status; -}; - struct pxa3xx_nand_flash { char *name; uint32_t chip_id; -- cgit v1.2.3-70-g09d2