From 5154e9f126c1d2ee8f5f93d9954f83d82b2d5e64 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Fri, 8 Jul 2011 14:51:27 +0900 Subject: usb: gadget: r8a66597-udc: Make BUSWAIT configurable through platform data BUSWAIT is a 4-bit-wide value that controls the number of access waits from the CPU to on-chip USB module. b'0000 inserts 0 wait (2 access cycles) and b'1111 inserts 15 waits (17 access cycles, hardware initial value), respectively. BUSWAIT value depends on peripheral clock frequency supplied to on-chip of each CPU, hence should be configurable through platform data. Note that this patch assumes that b'0000 (0 wait, 2 access cycles) is rerely used and considered as invalid. If valid 'buswait' data is not provided by platform, initial b'1111 (15 waits, 17 access cycles) will be applied as a safe default. Signed-off-by: Yoshihiro Shimoda Signed-off-by: Felipe Balbi --- include/linux/usb/r8a66597.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include/linux/usb') diff --git a/include/linux/usb/r8a66597.h b/include/linux/usb/r8a66597.h index 26d21673405..6e1bfaedb6c 100644 --- a/include/linux/usb/r8a66597.h +++ b/include/linux/usb/r8a66597.h @@ -31,6 +31,9 @@ struct r8a66597_platdata { /* This callback can control port power instead of DVSTCTR register. */ void (*port_power)(int port, int power); + /* This parameter is for BUSWAIT */ + u16 buswait; + /* set one = on chip controller, set zero = external controller */ unsigned on_chip:1; -- cgit v1.2.3-70-g09d2