From 4071c718555d955a35e9651f77086096ad87d498 Mon Sep 17 00:00:00 2001 From: Nick Piggin Date: Sat, 13 Oct 2007 03:06:55 +0200 Subject: x86: fix IO write barrier wmb() on x86 must always include a barrier, because stores can go out of order in many cases when dealing with devices (eg. WC memory). Signed-off-by: Nick Piggin Signed-off-by: Linus Torvalds --- include/asm-x86/system_32.h | 15 ++++++--------- include/asm-x86/system_64.h | 6 +----- 2 files changed, 7 insertions(+), 14 deletions(-) (limited to 'include') diff --git a/include/asm-x86/system_32.h b/include/asm-x86/system_32.h index d69ba937e09..8b15bd3057c 100644 --- a/include/asm-x86/system_32.h +++ b/include/asm-x86/system_32.h @@ -216,6 +216,7 @@ static inline unsigned long get_limit(unsigned long segment) #define mb() alternative("lock; addl $0,0(%%esp)", "mfence", X86_FEATURE_XMM2) #define rmb() alternative("lock; addl $0,0(%%esp)", "lfence", X86_FEATURE_XMM2) +#define wmb() alternative("lock; addl $0,0(%%esp)", "sfence", X86_FEATURE_XMM) /** * read_barrier_depends - Flush all pending reads that subsequents reads @@ -271,18 +272,14 @@ static inline unsigned long get_limit(unsigned long segment) #define read_barrier_depends() do { } while(0) -#ifdef CONFIG_X86_OOSTORE -/* Actually there are no OOO store capable CPUs for now that do SSE, - but make it already an possibility. */ -#define wmb() alternative("lock; addl $0,0(%%esp)", "sfence", X86_FEATURE_XMM) -#else -#define wmb() __asm__ __volatile__ ("": : :"memory") -#endif - #ifdef CONFIG_SMP #define smp_mb() mb() #define smp_rmb() rmb() -#define smp_wmb() wmb() +#ifdef CONFIG_X86_OOSTORE +# define smp_wmb() wmb() +#else +# define smp_wmb() barrier() +#endif #define smp_read_barrier_depends() read_barrier_depends() #define set_mb(var, value) do { (void) xchg(&var, value); } while (0) #else diff --git a/include/asm-x86/system_64.h b/include/asm-x86/system_64.h index 02175aa1d16..eff730b1192 100644 --- a/include/asm-x86/system_64.h +++ b/include/asm-x86/system_64.h @@ -159,12 +159,8 @@ static inline void write_cr8(unsigned long val) */ #define mb() asm volatile("mfence":::"memory") #define rmb() asm volatile("lfence":::"memory") - -#ifdef CONFIG_UNORDERED_IO #define wmb() asm volatile("sfence" ::: "memory") -#else -#define wmb() asm volatile("" ::: "memory") -#endif + #define read_barrier_depends() do {} while(0) #define set_mb(var, value) do { (void) xchg(&var, value); } while (0) -- cgit v1.2.3-70-g09d2