From 2e128dedcd66d2f17f42a45dacc223fa2dcd8acd Mon Sep 17 00:00:00 2001 From: Chris Dearman Date: Fri, 30 Jun 2006 12:32:37 +0100 Subject: [MIPS] Default cpu_has_mipsmt to a runtime check Signed-off-by: Chris Dearman Signed-off-by: Ralf Baechle --- include/asm-mips/cpu-features.h | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) (limited to 'include') diff --git a/include/asm-mips/cpu-features.h b/include/asm-mips/cpu-features.h index 44285a9d552..3c2fc2b647c 100644 --- a/include/asm-mips/cpu-features.h +++ b/include/asm-mips/cpu-features.h @@ -143,12 +143,8 @@ #define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP) #endif -#ifdef CONFIG_MIPS_MT #ifndef cpu_has_mipsmt -# define cpu_has_mipsmt (cpu_data[0].ases & MIPS_ASE_MIPSMT) -#endif -#else -# define cpu_has_mipsmt 0 +#define cpu_has_mipsmt (cpu_data[0].ases & MIPS_ASE_MIPSMT) #endif #ifdef CONFIG_32BIT -- cgit v1.2.3-70-g09d2 From e1e80b4d24eddd1a76cd386e25164cf159661bd6 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Sat, 1 Jul 2006 22:07:23 +0100 Subject: [MIPS] Don't include obsolete . Signed-off-by: Ralf Baechle --- arch/mips/basler/excite/excite_dbg_io.c | 1 - arch/mips/basler/excite/excite_device.c | 1 - arch/mips/basler/excite/excite_iodev.c | 1 - arch/mips/basler/excite/excite_procfs.c | 1 - arch/mips/basler/excite/excite_prom.c | 1 - arch/mips/basler/excite/excite_setup.c | 1 - arch/mips/emma2rh/common/irq.c | 1 - arch/mips/emma2rh/common/prom.c | 1 - arch/mips/emma2rh/markeins/irq.c | 1 - arch/mips/emma2rh/markeins/platform.c | 1 - arch/mips/emma2rh/markeins/setup.c | 1 - arch/mips/gt64120/wrppmc/setup.c | 1 - arch/mips/gt64120/wrppmc/time.c | 1 - arch/mips/kernel/apm.c | 1 - arch/mips/kernel/vpe.c | 1 - arch/mips/pci/fixup-emma2rh.c | 1 - arch/mips/pci/ops-emma2rh.c | 1 - arch/mips/pci/pci-emma2rh.c | 1 - arch/mips/qemu/q-reset.c | 1 - include/asm-mips/apm.h | 1 - include/asm-mips/mach-excite/excite.h | 1 - 21 files changed, 21 deletions(-) (limited to 'include') diff --git a/arch/mips/basler/excite/excite_dbg_io.c b/arch/mips/basler/excite/excite_dbg_io.c index 83f6bddf578..c04505afa47 100644 --- a/arch/mips/basler/excite/excite_dbg_io.c +++ b/arch/mips/basler/excite/excite_dbg_io.c @@ -17,7 +17,6 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include #include #include #include diff --git a/arch/mips/basler/excite/excite_device.c b/arch/mips/basler/excite/excite_device.c index 34ec76716fa..bbb4ea43da8 100644 --- a/arch/mips/basler/excite/excite_device.c +++ b/arch/mips/basler/excite/excite_device.c @@ -17,7 +17,6 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include #include #include #include diff --git a/arch/mips/basler/excite/excite_iodev.c b/arch/mips/basler/excite/excite_iodev.c index b288151b532..10bbb8cfb96 100644 --- a/arch/mips/basler/excite/excite_iodev.c +++ b/arch/mips/basler/excite/excite_iodev.c @@ -17,7 +17,6 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include #include #include #include diff --git a/arch/mips/basler/excite/excite_procfs.c b/arch/mips/basler/excite/excite_procfs.c index c62be0341fb..9ee67a95f6b 100644 --- a/arch/mips/basler/excite/excite_procfs.c +++ b/arch/mips/basler/excite/excite_procfs.c @@ -19,7 +19,6 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include #include #include #include diff --git a/arch/mips/basler/excite/excite_prom.c b/arch/mips/basler/excite/excite_prom.c index 84724b27075..6ecd512b999 100644 --- a/arch/mips/basler/excite/excite_prom.c +++ b/arch/mips/basler/excite/excite_prom.c @@ -18,7 +18,6 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include #include #include #include diff --git a/arch/mips/basler/excite/excite_setup.c b/arch/mips/basler/excite/excite_setup.c index 3d7670edd5c..e1d6ad296c9 100644 --- a/arch/mips/basler/excite/excite_setup.c +++ b/arch/mips/basler/excite/excite_setup.c @@ -19,7 +19,6 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include #include #include #include diff --git a/arch/mips/emma2rh/common/irq.c b/arch/mips/emma2rh/common/irq.c index b075281e50e..3af57693c84 100644 --- a/arch/mips/emma2rh/common/irq.c +++ b/arch/mips/emma2rh/common/irq.c @@ -22,7 +22,6 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include #include #include #include diff --git a/arch/mips/emma2rh/common/prom.c b/arch/mips/emma2rh/common/prom.c index 8bba0b02a20..7433bd8e556 100644 --- a/arch/mips/emma2rh/common/prom.c +++ b/arch/mips/emma2rh/common/prom.c @@ -22,7 +22,6 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include #include #include #include diff --git a/arch/mips/emma2rh/markeins/irq.c b/arch/mips/emma2rh/markeins/irq.c index 76dc3faeaf4..2a736be42c8 100644 --- a/arch/mips/emma2rh/markeins/irq.c +++ b/arch/mips/emma2rh/markeins/irq.c @@ -22,7 +22,6 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include #include #include #include diff --git a/arch/mips/emma2rh/markeins/platform.c b/arch/mips/emma2rh/markeins/platform.c index 6c1eeae1a89..15cc61df362 100644 --- a/arch/mips/emma2rh/markeins/platform.c +++ b/arch/mips/emma2rh/markeins/platform.c @@ -20,7 +20,6 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include #include #include #include diff --git a/arch/mips/emma2rh/markeins/setup.c b/arch/mips/emma2rh/markeins/setup.c index 7d98fdbf839..25da5bc2099 100644 --- a/arch/mips/emma2rh/markeins/setup.c +++ b/arch/mips/emma2rh/markeins/setup.c @@ -22,7 +22,6 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include #include #include #include diff --git a/arch/mips/gt64120/wrppmc/setup.c b/arch/mips/gt64120/wrppmc/setup.c index 2db6375ef29..221d8087c49 100644 --- a/arch/mips/gt64120/wrppmc/setup.c +++ b/arch/mips/gt64120/wrppmc/setup.c @@ -8,7 +8,6 @@ * Copyright (C) 1996, 1997, 2004 by Ralf Baechle (ralf@linux-mips.org) * Copyright (C) 2006, Wind River System Inc. Rongkai.zhan */ -#include #include #include #include diff --git a/arch/mips/gt64120/wrppmc/time.c b/arch/mips/gt64120/wrppmc/time.c index 6c24a82df0d..c8ed57e1b77 100644 --- a/arch/mips/gt64120/wrppmc/time.c +++ b/arch/mips/gt64120/wrppmc/time.c @@ -10,7 +10,6 @@ * Copyright (C) 1996, 1997, 2004 by Ralf Baechle (ralf@linux-mips.org) * Copyright (C) 2006, Wind River System Inc. */ -#include #include #include #include diff --git a/arch/mips/kernel/apm.c b/arch/mips/kernel/apm.c index 7bdbcd811b5..528e731049c 100644 --- a/arch/mips/kernel/apm.c +++ b/arch/mips/kernel/apm.c @@ -10,7 +10,6 @@ * [This document is available from Microsoft at: * http://www.microsoft.com/hwdev/busbios/amp_12.htm] */ -#include #include #include #include diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c index 85d7df7b18e..9ee0ec2cd06 100644 --- a/arch/mips/kernel/vpe.c +++ b/arch/mips/kernel/vpe.c @@ -28,7 +28,6 @@ * i.e cat spapp >/dev/vpe1. */ -#include #include #include #include diff --git a/arch/mips/pci/fixup-emma2rh.c b/arch/mips/pci/fixup-emma2rh.c index 3a34cd0efd6..7abcfd175d4 100644 --- a/arch/mips/pci/fixup-emma2rh.c +++ b/arch/mips/pci/fixup-emma2rh.c @@ -23,7 +23,6 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include #include #include #include diff --git a/arch/mips/pci/ops-emma2rh.c b/arch/mips/pci/ops-emma2rh.c index e21b11bf66b..38f181625e1 100644 --- a/arch/mips/pci/ops-emma2rh.c +++ b/arch/mips/pci/ops-emma2rh.c @@ -23,7 +23,6 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include #include #include #include diff --git a/arch/mips/pci/pci-emma2rh.c b/arch/mips/pci/pci-emma2rh.c index 0f8b230057d..d99591a0cdf 100644 --- a/arch/mips/pci/pci-emma2rh.c +++ b/arch/mips/pci/pci-emma2rh.c @@ -23,7 +23,6 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include #include #include #include diff --git a/arch/mips/qemu/q-reset.c b/arch/mips/qemu/q-reset.c index c04ebcfc784..dbbe44ad7e8 100644 --- a/arch/mips/qemu/q-reset.c +++ b/arch/mips/qemu/q-reset.c @@ -1,4 +1,3 @@ -#include #include #include diff --git a/include/asm-mips/apm.h b/include/asm-mips/apm.h index e8c69208f63..4b99ffc1152 100644 --- a/include/asm-mips/apm.h +++ b/include/asm-mips/apm.h @@ -13,7 +13,6 @@ #ifndef MIPS_ASM_SA1100_APM_H #define MIPS_ASM_SA1100_APM_H -#include #include /* diff --git a/include/asm-mips/mach-excite/excite.h b/include/asm-mips/mach-excite/excite.h index c52610de2b3..130bd4b8edc 100644 --- a/include/asm-mips/mach-excite/excite.h +++ b/include/asm-mips/mach-excite/excite.h @@ -1,7 +1,6 @@ #ifndef __EXCITE_H__ #define __EXCITE_H__ -#include #include #include #include -- cgit v1.2.3-70-g09d2 From 722cfd90420b660ad13f933efb135daf1d0e5400 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Sun, 2 Jul 2006 16:31:14 +0100 Subject: [MIPS] Wire up vmsplice(2) and move_pages(2). Signed-off-by: Ralf Baechle --- arch/mips/kernel/scall32-o32.S | 2 ++ arch/mips/kernel/scall64-64.S | 2 ++ arch/mips/kernel/scall64-n32.S | 2 ++ arch/mips/kernel/scall64-o32.S | 2 ++ include/asm-mips/unistd.h | 18 ++++++++++++------ 5 files changed, 20 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S index 8f8101f878c..c8e5f9c9a11 100644 --- a/arch/mips/kernel/scall32-o32.S +++ b/arch/mips/kernel/scall32-o32.S @@ -647,6 +647,8 @@ einval: li v0, -EINVAL sys sys_splice 4 sys sys_sync_file_range 7 /* 4305 */ sys sys_tee 4 + sys sys_vmsplice 4 + sys sys_move_pages 6 .endm /* We pre-compute the number of _instruction_ bytes needed to diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S index b4a34a625a2..809fd1b55f8 100644 --- a/arch/mips/kernel/scall64-64.S +++ b/arch/mips/kernel/scall64-64.S @@ -462,3 +462,5 @@ sys_call_table: PTR sys_splice PTR sys_sync_file_range PTR sys_tee /* 5265 */ + PTR sys_vmsplice + PTR sys_move_pages diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S index df8c4f8ccd6..b2b5cb9fe57 100644 --- a/arch/mips/kernel/scall64-n32.S +++ b/arch/mips/kernel/scall64-n32.S @@ -388,3 +388,5 @@ EXPORT(sysn32_call_table) PTR sys_splice PTR sys_sync_file_range PTR sys_tee + PTR sys_vmsplice /* 6271 */ + PTR sys_move_pages diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S index f04fe4f085c..3a138dcc882 100644 --- a/arch/mips/kernel/scall64-o32.S +++ b/arch/mips/kernel/scall64-o32.S @@ -510,4 +510,6 @@ sys_call_table: PTR sys_splice PTR sys32_sync_file_range /* 4305 */ PTR sys_tee + PTR sys_vmsplice + PTR compat_sys_move_pages .size sys_call_table,.-sys_call_table diff --git a/include/asm-mips/unistd.h b/include/asm-mips/unistd.h index 809f9f55bac..610ccb8a50b 100644 --- a/include/asm-mips/unistd.h +++ b/include/asm-mips/unistd.h @@ -327,16 +327,18 @@ #define __NR_splice (__NR_Linux + 304) #define __NR_sync_file_range (__NR_Linux + 305) #define __NR_tee (__NR_Linux + 306) +#define __NR_vmsplice (__NR_Linux + 307) +#define __NR_move_pages (__NR_Linux + 308) /* * Offset of the last Linux o32 flavoured syscall */ -#define __NR_Linux_syscalls 306 +#define __NR_Linux_syscalls 308 #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ #define __NR_O32_Linux 4000 -#define __NR_O32_Linux_syscalls 306 +#define __NR_O32_Linux_syscalls 308 #if _MIPS_SIM == _MIPS_SIM_ABI64 @@ -610,16 +612,18 @@ #define __NR_splice (__NR_Linux + 263) #define __NR_sync_file_range (__NR_Linux + 264) #define __NR_tee (__NR_Linux + 265) +#define __NR_vmsplice (__NR_Linux + 266) +#define __NR_move_pages (__NR_Linux + 267) /* * Offset of the last Linux 64-bit flavoured syscall */ -#define __NR_Linux_syscalls 265 +#define __NR_Linux_syscalls 267 #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ #define __NR_64_Linux 5000 -#define __NR_64_Linux_syscalls 265 +#define __NR_64_Linux_syscalls 267 #if _MIPS_SIM == _MIPS_SIM_NABI32 @@ -897,16 +901,18 @@ #define __NR_splice (__NR_Linux + 267) #define __NR_sync_file_range (__NR_Linux + 268) #define __NR_tee (__NR_Linux + 269) +#define __NR_vmsplice (__NR_Linux + 270) +#define __NR_move_pages (__NR_Linux + 271) /* * Offset of the last N32 flavoured syscall */ -#define __NR_Linux_syscalls 269 +#define __NR_Linux_syscalls 271 #endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ #define __NR_N32_Linux 6000 -#define __NR_N32_Linux_syscalls 269 +#define __NR_N32_Linux_syscalls 271 #ifdef __KERNEL__ -- cgit v1.2.3-70-g09d2 From a722df087dc745a213573ed860be57a255e799bb Mon Sep 17 00:00:00 2001 From: Yoichi Yuasa Date: Sun, 2 Jul 2006 23:13:34 +0900 Subject: [MIPS] vr41xx: Removed unused definitions for NEC CMBVR4133. Signed-off-by: Yoichi Yuasa Signed-off-by: Ralf Baechle --- include/asm-mips/vr41xx/cmbvr4133.h | 3 --- 1 file changed, 3 deletions(-) (limited to 'include') diff --git a/include/asm-mips/vr41xx/cmbvr4133.h b/include/asm-mips/vr41xx/cmbvr4133.h index 42af389019e..3fbfde19c80 100644 --- a/include/asm-mips/vr41xx/cmbvr4133.h +++ b/include/asm-mips/vr41xx/cmbvr4133.h @@ -55,7 +55,4 @@ #define IDE_SECONDARY_IRQ I8259_IRQ(15) #define I8259_IRQ_LAST IDE_SECONDARY_IRQ -#define RTC_PORT(x) (0xaf000100 + (x)) -#define RTC_IO_EXTENT 0x140 - #endif /* __NEC_CMBVR4133_H */ -- cgit v1.2.3-70-g09d2 From fc5d2d279ff820172a698706d33e733d4578bd6c Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Thu, 6 Jul 2006 13:04:01 +0100 Subject: [MIPS] Use the proper technical term for naming some of the cache macros. Signed-off-by: Ralf Baechle --- arch/mips/mm/c-r4k.c | 8 ++++---- include/asm-mips/cpu-features.h | 4 ++-- include/asm-mips/cpu.h | 2 +- include/asm-mips/mach-cobalt/cpu-feature-overrides.h | 2 +- include/asm-mips/mach-excite/cpu-feature-overrides.h | 2 +- include/asm-mips/mach-ip27/cpu-feature-overrides.h | 2 +- include/asm-mips/mach-ja/cpu-feature-overrides.h | 2 +- include/asm-mips/mach-mips/cpu-feature-overrides.h | 4 ++-- include/asm-mips/mach-ocelot3/cpu-feature-overrides.h | 2 +- include/asm-mips/mach-sibyte/cpu-feature-overrides.h | 2 +- include/asm-mips/mach-sim/cpu-feature-overrides.h | 4 ++-- include/asm-mips/mach-yosemite/cpu-feature-overrides.h | 2 +- 12 files changed, 18 insertions(+), 18 deletions(-) (limited to 'include') diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 857b726f4d4..ed35ee57b38 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -578,7 +578,7 @@ static inline void local_r4k_flush_icache_page(void *args) * secondary cache will result in any entries in the primary caches * also getting invalidated which hopefully is a bit more economical. */ - if (cpu_has_subset_pcaches) { + if (cpu_has_inclusive_pcaches) { unsigned long addr = (unsigned long) page_address(page); r4k_blast_scache_page(addr); @@ -634,7 +634,7 @@ static void r4k_dma_cache_wback_inv(unsigned long addr, unsigned long size) /* Catch bad driver code */ BUG_ON(size == 0); - if (cpu_has_subset_pcaches) { + if (cpu_has_inclusive_pcaches) { if (size >= scache_size) r4k_blast_scache(); else @@ -662,7 +662,7 @@ static void r4k_dma_cache_inv(unsigned long addr, unsigned long size) /* Catch bad driver code */ BUG_ON(size == 0); - if (cpu_has_subset_pcaches) { + if (cpu_has_inclusive_pcaches) { if (size >= scache_size) r4k_blast_scache(); else @@ -1192,7 +1192,7 @@ static void __init setup_scache(void) printk("Unified secondary cache %ldkB %s, linesize %d bytes.\n", scache_size >> 10, way_string[c->scache.ways], c->scache.linesz); - c->options |= MIPS_CPU_SUBSET_CACHES; + c->options |= MIPS_CPU_INCLUSIVE_CACHES; } void au1x00_fixup_config_od(void) diff --git a/include/asm-mips/cpu-features.h b/include/asm-mips/cpu-features.h index 3c2fc2b647c..eadca266f15 100644 --- a/include/asm-mips/cpu-features.h +++ b/include/asm-mips/cpu-features.h @@ -195,8 +195,8 @@ # define cpu_has_veic 0 #endif -#ifndef cpu_has_subset_pcaches -#define cpu_has_subset_pcaches (cpu_data[0].options & MIPS_CPU_SUBSET_CACHES) +#ifndef cpu_has_inclusive_pcaches +#define cpu_has_inclusive_pcaches (cpu_data[0].options & MIPS_CPU_INCLUSIVE_CACHES) #endif #ifndef cpu_dcache_line_size diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h index dff2a0a52f8..d38fdbf845b 100644 --- a/include/asm-mips/cpu.h +++ b/include/asm-mips/cpu.h @@ -242,7 +242,7 @@ #define MIPS_CPU_EJTAG 0x00008000 /* EJTAG exception */ #define MIPS_CPU_NOFPUEX 0x00010000 /* no FPU exception */ #define MIPS_CPU_LLSC 0x00020000 /* CPU has ll/sc instructions */ -#define MIPS_CPU_SUBSET_CACHES 0x00040000 /* P-cache subset enforced */ +#define MIPS_CPU_INCLUSIVE_CACHES 0x00040000 /* P-cache subset enforced */ #define MIPS_CPU_PREFETCH 0x00080000 /* CPU has usable prefetch */ #define MIPS_CPU_VINT 0x00100000 /* CPU supports MIPSR2 vectored interrupts */ #define MIPS_CPU_VEIC 0x00200000 /* CPU supports MIPSR2 external interrupt controller mode */ diff --git a/include/asm-mips/mach-cobalt/cpu-feature-overrides.h b/include/asm-mips/mach-cobalt/cpu-feature-overrides.h index e0e08fc5d7f..c6dfa59d198 100644 --- a/include/asm-mips/mach-cobalt/cpu-feature-overrides.h +++ b/include/asm-mips/mach-cobalt/cpu-feature-overrides.h @@ -27,7 +27,7 @@ #define cpu_has_mcheck 0 #define cpu_has_ejtag 0 -#define cpu_has_subset_pcaches 0 +#define cpu_has_inclusive_pcaches 0 #define cpu_dcache_line_size() 32 #define cpu_icache_line_size() 32 #define cpu_scache_line_size() 0 diff --git a/include/asm-mips/mach-excite/cpu-feature-overrides.h b/include/asm-mips/mach-excite/cpu-feature-overrides.h index abb76b2fd86..0d31854222f 100644 --- a/include/asm-mips/mach-excite/cpu-feature-overrides.h +++ b/include/asm-mips/mach-excite/cpu-feature-overrides.h @@ -31,7 +31,7 @@ #define cpu_has_nofpuex 0 #define cpu_has_64bits 1 -#define cpu_has_subset_pcaches 0 +#define cpu_has_inclusive_pcaches 0 #define cpu_dcache_line_size() 32 #define cpu_icache_line_size() 32 diff --git a/include/asm-mips/mach-ip27/cpu-feature-overrides.h b/include/asm-mips/mach-ip27/cpu-feature-overrides.h index 19c2d135985..a071974b67b 100644 --- a/include/asm-mips/mach-ip27/cpu-feature-overrides.h +++ b/include/asm-mips/mach-ip27/cpu-feature-overrides.h @@ -34,7 +34,7 @@ #define cpu_has_4kex 1 #define cpu_has_4k_cache 1 -#define cpu_has_subset_pcaches 1 +#define cpu_has_inclusive_pcaches 1 #define cpu_dcache_line_size() 32 #define cpu_icache_line_size() 64 diff --git a/include/asm-mips/mach-ja/cpu-feature-overrides.h b/include/asm-mips/mach-ja/cpu-feature-overrides.h index 90ff087083b..84b6dead0e8 100644 --- a/include/asm-mips/mach-ja/cpu-feature-overrides.h +++ b/include/asm-mips/mach-ja/cpu-feature-overrides.h @@ -31,7 +31,7 @@ #define cpu_has_nofpuex 0 #define cpu_has_64bits 1 -#define cpu_has_subset_pcaches 0 +#define cpu_has_inclusive_pcaches 0 #define cpu_dcache_line_size() 32 #define cpu_icache_line_size() 32 diff --git a/include/asm-mips/mach-mips/cpu-feature-overrides.h b/include/asm-mips/mach-mips/cpu-feature-overrides.h index e960679f54b..7f3e3f9bd23 100644 --- a/include/asm-mips/mach-mips/cpu-feature-overrides.h +++ b/include/asm-mips/mach-mips/cpu-feature-overrides.h @@ -39,7 +39,7 @@ #define cpu_has_nofpuex 0 /* #define cpu_has_64bits ? */ /* #define cpu_has_64bit_zero_reg ? */ -/* #define cpu_has_subset_pcaches ? */ +/* #define cpu_has_inclusive_pcaches ? */ #define cpu_icache_snoops_remote_store 1 #endif @@ -65,7 +65,7 @@ #define cpu_has_nofpuex 0 /* #define cpu_has_64bits ? */ /* #define cpu_has_64bit_zero_reg ? */ -/* #define cpu_has_subset_pcaches ? */ +/* #define cpu_has_inclusive_pcaches ? */ #define cpu_icache_snoops_remote_store 1 #endif diff --git a/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h b/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h index 782b986241d..57a12ded061 100644 --- a/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h +++ b/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h @@ -34,7 +34,7 @@ #define cpu_has_nofpuex 0 #define cpu_has_64bits 1 -#define cpu_has_subset_pcaches 0 +#define cpu_has_inclusive_pcaches 0 #define cpu_dcache_line_size() 32 #define cpu_icache_line_size() 32 diff --git a/include/asm-mips/mach-sibyte/cpu-feature-overrides.h b/include/asm-mips/mach-sibyte/cpu-feature-overrides.h index 193a666cd13..a25968f277a 100644 --- a/include/asm-mips/mach-sibyte/cpu-feature-overrides.h +++ b/include/asm-mips/mach-sibyte/cpu-feature-overrides.h @@ -31,7 +31,7 @@ #define cpu_has_nofpuex 0 #define cpu_has_64bits 1 -#define cpu_has_subset_pcaches 0 +#define cpu_has_inclusive_pcaches 0 #define cpu_dcache_line_size() 32 #define cpu_icache_line_size() 32 diff --git a/include/asm-mips/mach-sim/cpu-feature-overrides.h b/include/asm-mips/mach-sim/cpu-feature-overrides.h index d736bdadb6d..779b0220573 100644 --- a/include/asm-mips/mach-sim/cpu-feature-overrides.h +++ b/include/asm-mips/mach-sim/cpu-feature-overrides.h @@ -34,7 +34,7 @@ #define cpu_has_nofpuex 0 /* #define cpu_has_64bits ? */ /* #define cpu_has_64bit_zero_reg ? */ -/* #define cpu_has_subset_pcaches ? */ +/* #define cpu_has_inclusive_pcaches ? */ #endif #ifdef CONFIG_CPU_MIPS64 @@ -59,7 +59,7 @@ #define cpu_has_nofpuex 0 /* #define cpu_has_64bits ? */ /* #define cpu_has_64bit_zero_reg ? */ -/* #define cpu_has_subset_pcaches ? */ +/* #define cpu_has_inclusive_pcaches ? */ #endif #endif /* __ASM_MACH_MIPS_CPU_FEATURE_OVERRIDES_H */ diff --git a/include/asm-mips/mach-yosemite/cpu-feature-overrides.h b/include/asm-mips/mach-yosemite/cpu-feature-overrides.h index 3073542c93c..42cebb7ce7a 100644 --- a/include/asm-mips/mach-yosemite/cpu-feature-overrides.h +++ b/include/asm-mips/mach-yosemite/cpu-feature-overrides.h @@ -31,7 +31,7 @@ #define cpu_has_nofpuex 0 #define cpu_has_64bits 1 -#define cpu_has_subset_pcaches 0 +#define cpu_has_inclusive_pcaches 0 #define cpu_dcache_line_size() 32 #define cpu_icache_line_size() 32 -- cgit v1.2.3-70-g09d2 From 4e8ab3618273b8c5f87a46f82902fbd4138f97f4 Mon Sep 17 00:00:00 2001 From: Yoichi Yuasa Date: Tue, 4 Jul 2006 22:59:41 +0900 Subject: [MIPS] VR41xx: Set VR41_CONF_BP only for PrId 0x0c80. Signed-off-by: Yoichi Yuasa Signed-off-by: Ralf Baechle --- arch/mips/mm/c-r4k.c | 4 +++- include/asm-mips/mipsregs.h | 1 + 2 files changed, 4 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index ed35ee57b38..256b6611e71 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -868,7 +868,9 @@ static void __init probe_pcache(void) if (c->processor_id == 0x0c80U || c->processor_id == 0x0c81U || c->processor_id == 0x0c82U) { config &= ~0x00000030U; - config |= 0x00410000U; + config |= 0x00400000U; + if (c->processor_id == 0x0c80U) + config |= VR41_CONF_BP; write_c0_config(config); } icache_size = 1 << (10 + ((config & CONF_IC) >> 9)); diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h index 9192d76c133..b4169f0fb13 100644 --- a/include/asm-mips/mipsregs.h +++ b/include/asm-mips/mipsregs.h @@ -470,6 +470,7 @@ /* Bits specific to the VR41xx. */ #define VR41_CONF_CS (_ULCAST_(1) << 12) +#define VR41_CONF_BP (_ULCAST_(1) << 16) #define VR41_CONF_M16 (_ULCAST_(1) << 20) #define VR41_CONF_AD (_ULCAST_(1) << 23) -- cgit v1.2.3-70-g09d2 From 7de58fab9ccb63b4194ce39cf163a7491921d037 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Wed, 5 Jul 2006 01:22:44 +0900 Subject: [MIPS] Sparsemem fixes 1. MIPS should select SPARSEMEM_STATIC since allocating bootmem in memory_present() will corrupt bootmap area. 2. pfn_valid() for SPARSEMEM is defined in linux/mmzone.h Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- arch/mips/Kconfig | 1 + include/asm-mips/page.h | 12 ++++-------- 2 files changed, 5 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 3ebc5b296db..330f6abc770 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1694,6 +1694,7 @@ config ARCH_SPARSEMEM_ENABLE config ARCH_SPARSEMEM_ENABLE bool + select SPARSEMEM_STATIC config NUMA bool "NUMA Support" diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h index 6b97744f00c..6ed1151a05a 100644 --- a/include/asm-mips/page.h +++ b/include/asm-mips/page.h @@ -138,16 +138,14 @@ typedef struct { unsigned long pgprot; } pgprot_t; #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) -#ifndef CONFIG_SPARSEMEM -#ifndef CONFIG_NEED_MULTIPLE_NODES -#define pfn_valid(pfn) ((pfn) < max_mapnr) -#endif -#endif - #ifdef CONFIG_FLATMEM #define pfn_valid(pfn) ((pfn) < max_mapnr) +#elif defined(CONFIG_SPARSEMEM) + +/* pfn_valid is defined in linux/mmzone.h */ + #elif defined(CONFIG_NEED_MULTIPLE_NODES) #define pfn_valid(pfn) \ @@ -159,8 +157,6 @@ typedef struct { unsigned long pgprot; } pgprot_t; : 0); \ }) -#else -#error Provide a definition of pfn_valid #endif #define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) -- cgit v1.2.3-70-g09d2 From 8d197f3d17d4f43eb7d032491af7fc959cbed4fa Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Fri, 7 Jul 2006 14:26:41 +0900 Subject: [MIPS] Fix rdhwr_op definition. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- include/asm-mips/inst.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-mips/inst.h b/include/asm-mips/inst.h index 1ed8d0f6257..6489f00731c 100644 --- a/include/asm-mips/inst.h +++ b/include/asm-mips/inst.h @@ -74,7 +74,7 @@ enum spec3_op { ins_op, dinsm_op, dinsu_op, dins_op, bshfl_op = 0x20, dbshfl_op = 0x24, - rdhwr_op = 0x3f + rdhwr_op = 0x3b }; /* -- cgit v1.2.3-70-g09d2 From 192ef366198ce16c0379100565cdc5b7bd68511f Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Fri, 7 Jul 2006 14:07:18 +0100 Subject: [MIPS] TRACE_IRQFLAGS_SUPPORT support. Signed-off-by: Ralf Baechle --- arch/mips/Kconfig.debug | 4 + arch/mips/kernel/entry.S | 15 +++ arch/mips/kernel/gdb-low.S | 2 + arch/mips/kernel/genex.S | 6 ++ arch/mips/kernel/head.S | 3 +- arch/mips/kernel/scall32-o32.S | 15 ++- arch/mips/kernel/scall64-64.S | 2 + arch/mips/kernel/scall64-n32.S | 2 + arch/mips/kernel/scall64-o32.S | 2 + arch/mips/kernel/smtc-asm.S | 1 + include/asm-mips/atomic.h | 2 +- include/asm-mips/bitops.h | 2 +- include/asm-mips/interrupt.h | 221 ---------------------------------------- include/asm-mips/irqflags.h | 225 +++++++++++++++++++++++++++++++++++++++++ include/asm-mips/mipsregs.h | 2 +- include/asm-mips/system.h | 2 +- 16 files changed, 279 insertions(+), 227 deletions(-) delete mode 100644 include/asm-mips/interrupt.h create mode 100644 include/asm-mips/irqflags.h (limited to 'include') diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug index 515f9e61130..5d6afb52d90 100644 --- a/arch/mips/Kconfig.debug +++ b/arch/mips/Kconfig.debug @@ -1,5 +1,9 @@ menu "Kernel hacking" +config TRACE_IRQFLAGS_SUPPORT + bool + default y + source "lib/Kconfig.debug" config CROSSCOMPILE diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S index 01e7fa86aa4..766655f3525 100644 --- a/arch/mips/kernel/entry.S +++ b/arch/mips/kernel/entry.S @@ -113,6 +113,21 @@ FEXPORT(restore_all) # restore full frame RESTORE_AT RESTORE_STATIC FEXPORT(restore_partial) # restore partial frame +#ifdef CONFIG_TRACE_IRQFLAGS + SAVE_STATIC + SAVE_AT + SAVE_TEMP + LONG_L v0, PT_STATUS(sp) + and v0, 1 + beqz v0, 1f + jal trace_hardirqs_on + b 2f +1: jal trace_hardirqs_off +2: + RESTORE_TEMP + RESTORE_AT + RESTORE_STATIC +#endif RESTORE_SOME RESTORE_SP_AND_RET .set at diff --git a/arch/mips/kernel/gdb-low.S b/arch/mips/kernel/gdb-low.S index 666bc9014cb..2c446063636 100644 --- a/arch/mips/kernel/gdb-low.S +++ b/arch/mips/kernel/gdb-low.S @@ -7,6 +7,7 @@ #include #include +#include #include #include #include @@ -120,6 +121,7 @@ LONG_S $31, GDB_FR_REG31(sp) CLI /* disable interrupts */ + TRACE_IRQS_OFF /* * Followed by the floating point registers diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S index b563811b1b2..37fda3dcdfc 100644 --- a/arch/mips/kernel/genex.S +++ b/arch/mips/kernel/genex.S @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -128,6 +129,7 @@ handle_vcei: NESTED(handle_int, PT_SIZE, sp) SAVE_ALL CLI + TRACE_IRQS_OFF PTR_LA ra, ret_from_irq move a0, sp @@ -216,6 +218,7 @@ NESTED(except_vec_vi_handler, 0, sp) _ehb #endif /* CONFIG_MIPS_MT_SMTC */ CLI + TRACE_IRQS_OFF move a0, sp jalr v0 j ret_from_irq @@ -288,11 +291,13 @@ NESTED(nmi_handler, PT_SIZE, sp) .endm .macro __build_clear_sti + TRACE_IRQS_ON STI .endm .macro __build_clear_cli CLI + TRACE_IRQS_OFF .endm .macro __build_clear_fpe @@ -300,6 +305,7 @@ NESTED(nmi_handler, PT_SIZE, sp) li a2, ~(0x3f << 12) and a2, a1 ctc1 a2, fcr31 + TRACE_IRQS_ON STI .endm diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S index 476c1eb33c9..8c6db0fc72f 100644 --- a/arch/mips/kernel/head.S +++ b/arch/mips/kernel/head.S @@ -5,7 +5,7 @@ * * Copyright (C) 1994, 1995 Waldorf Electronics * Written by Ralf Baechle and Andreas Busse - * Copyright (C) 1994, 95, 96, 97, 98, 99, 2003 Ralf Baechle + * Copyright (C) 1994 - 99, 2003, 06 Ralf Baechle * Copyright (C) 1996 Paul M. Antoine * Modified for DECStation and hence R3000 support by Paul M. Antoine * Further modifications by David S. Miller and Harald Koerfgen @@ -18,6 +18,7 @@ #include #include +#include #include #include #include diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S index c8e5f9c9a11..ba1bcd83c7d 100644 --- a/arch/mips/kernel/scall32-o32.S +++ b/arch/mips/kernel/scall32-o32.S @@ -3,13 +3,14 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 1995, 96, 97, 98, 99, 2000, 01, 02 by Ralf Baechle + * Copyright (C) 1995-99, 2000- 02, 06 Ralf Baechle * Copyright (C) 2001 MIPS Technologies, Inc. * Copyright (C) 2004 Thiemo Seufer */ #include #include #include +#include #include #include #include @@ -27,6 +28,18 @@ NESTED(handle_sys, PT_SIZE, sp) .set noat SAVE_SOME +#ifdef CONFIG_TRACE_IRQFLAGS + TRACE_IRQS_ON +#ifdef CONFIG_64BIT + LONG_L $8, PT_R8(sp) + LONG_L $9, PT_R9(sp) +#endif + LONG_L $7, PT_R7(sp) + LONG_L $6, PT_R6(sp) + LONG_L $5, PT_R5(sp) + LONG_L $4, PT_R4(sp) + LONG_L $2, PT_R2(sp) +#endif STI .set at diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S index 809fd1b55f8..939e172db95 100644 --- a/arch/mips/kernel/scall64-64.S +++ b/arch/mips/kernel/scall64-64.S @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -33,6 +34,7 @@ NESTED(handle_sys64, PT_SIZE, sp) */ .set noat SAVE_SOME + TRACE_IRQS_ON STI .set at #endif diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S index b2b5cb9fe57..98abbc5a9f1 100644 --- a/arch/mips/kernel/scall64-n32.S +++ b/arch/mips/kernel/scall64-n32.S @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -32,6 +33,7 @@ NESTED(handle_sysn32, PT_SIZE, sp) #ifndef CONFIG_MIPS32_O32 .set noat SAVE_SOME + TRACE_IRQS_ON STI .set at #endif diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S index 3a138dcc882..505c9ee5400 100644 --- a/arch/mips/kernel/scall64-o32.S +++ b/arch/mips/kernel/scall64-o32.S @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -27,6 +28,7 @@ NESTED(handle_sys, PT_SIZE, sp) .set noat SAVE_SOME + TRACE_IRQS_ON STI .set at ld t1, PT_EPC(sp) # skip syscall on return diff --git a/arch/mips/kernel/smtc-asm.S b/arch/mips/kernel/smtc-asm.S index 72c6d98f885..4cc3dea3661 100644 --- a/arch/mips/kernel/smtc-asm.S +++ b/arch/mips/kernel/smtc-asm.S @@ -96,6 +96,7 @@ FEXPORT(__smtc_ipi_vector) /* Save all will redundantly recompute the SP, but use it for now */ SAVE_ALL CLI + TRACE_IRQS_OFF move a0,sp /* Function to be invoked passed stack pad slot 5 */ lw t0,PT_PADSLOT5(sp) diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h index 13d44e14025..e64abc0d822 100644 --- a/include/asm-mips/atomic.h +++ b/include/asm-mips/atomic.h @@ -22,8 +22,8 @@ #ifndef _ASM_ATOMIC_H #define _ASM_ATOMIC_H +#include #include -#include #include typedef struct { volatile int counter; } atomic_t; diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h index 098cec26368..1bb89c5a10e 100644 --- a/include/asm-mips/bitops.h +++ b/include/asm-mips/bitops.h @@ -31,7 +31,7 @@ #ifdef __KERNEL__ -#include +#include #include #include diff --git a/include/asm-mips/interrupt.h b/include/asm-mips/interrupt.h deleted file mode 100644 index a99d6867510..00000000000 --- a/include/asm-mips/interrupt.h +++ /dev/null @@ -1,221 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1994, 95, 96, 97, 98, 99, 2003 by Ralf Baechle - * Copyright (C) 1996 by Paul M. Antoine - * Copyright (C) 1999 Silicon Graphics - * Copyright (C) 2000 MIPS Technologies, Inc. - */ -#ifndef _ASM_INTERRUPT_H -#define _ASM_INTERRUPT_H - -#include - -__asm__ ( - " .macro local_irq_enable \n" - " .set push \n" - " .set reorder \n" - " .set noat \n" -#ifdef CONFIG_MIPS_MT_SMTC - " mfc0 $1, $2, 1 # SMTC - clear TCStatus.IXMT \n" - " ori $1, 0x400 \n" - " xori $1, 0x400 \n" - " mtc0 $1, $2, 1 \n" -#elif defined(CONFIG_CPU_MIPSR2) - " ei \n" -#else - " mfc0 $1,$12 \n" - " ori $1,0x1f \n" - " xori $1,0x1e \n" - " mtc0 $1,$12 \n" -#endif - " irq_enable_hazard \n" - " .set pop \n" - " .endm"); - -static inline void local_irq_enable(void) -{ - __asm__ __volatile__( - "local_irq_enable" - : /* no outputs */ - : /* no inputs */ - : "memory"); -} - -/* - * For cli() we have to insert nops to make sure that the new value - * has actually arrived in the status register before the end of this - * macro. - * R4000/R4400 need three nops, the R4600 two nops and the R10000 needs - * no nops at all. - */ -/* - * For TX49, operating only IE bit is not enough. - * - * If mfc0 $12 follows store and the mfc0 is last instruction of a - * page and fetching the next instruction causes TLB miss, the result - * of the mfc0 might wrongly contain EXL bit. - * - * ERT-TX49H2-027, ERT-TX49H3-012, ERT-TX49HL3-006, ERT-TX49H4-008 - * - * Workaround: mask EXL bit of the result or place a nop before mfc0. - */ -__asm__ ( - " .macro local_irq_disable\n" - " .set push \n" - " .set noat \n" -#ifdef CONFIG_MIPS_MT_SMTC - " mfc0 $1, $2, 1 \n" - " ori $1, 0x400 \n" - " .set noreorder \n" - " mtc0 $1, $2, 1 \n" -#elif defined(CONFIG_CPU_MIPSR2) - " di \n" -#else - " mfc0 $1,$12 \n" - " ori $1,0x1f \n" - " xori $1,0x1f \n" - " .set noreorder \n" - " mtc0 $1,$12 \n" -#endif - " irq_disable_hazard \n" - " .set pop \n" - " .endm \n"); - -static inline void local_irq_disable(void) -{ - __asm__ __volatile__( - "local_irq_disable" - : /* no outputs */ - : /* no inputs */ - : "memory"); -} - -__asm__ ( - " .macro local_save_flags flags \n" - " .set push \n" - " .set reorder \n" -#ifdef CONFIG_MIPS_MT_SMTC - " mfc0 \\flags, $2, 1 \n" -#else - " mfc0 \\flags, $12 \n" -#endif - " .set pop \n" - " .endm \n"); - -#define local_save_flags(x) \ -__asm__ __volatile__( \ - "local_save_flags %0" \ - : "=r" (x)) - -__asm__ ( - " .macro local_irq_save result \n" - " .set push \n" - " .set reorder \n" - " .set noat \n" -#ifdef CONFIG_MIPS_MT_SMTC - " mfc0 \\result, $2, 1 \n" - " ori $1, \\result, 0x400 \n" - " .set noreorder \n" - " mtc0 $1, $2, 1 \n" - " andi \\result, \\result, 0x400 \n" -#elif defined(CONFIG_CPU_MIPSR2) - " di \\result \n" - " andi \\result, 1 \n" -#else - " mfc0 \\result, $12 \n" - " ori $1, \\result, 0x1f \n" - " xori $1, 0x1f \n" - " .set noreorder \n" - " mtc0 $1, $12 \n" -#endif - " irq_disable_hazard \n" - " .set pop \n" - " .endm \n"); - -#define local_irq_save(x) \ -__asm__ __volatile__( \ - "local_irq_save\t%0" \ - : "=r" (x) \ - : /* no inputs */ \ - : "memory") - -__asm__ ( - " .macro local_irq_restore flags \n" - " .set push \n" - " .set noreorder \n" - " .set noat \n" -#ifdef CONFIG_MIPS_MT_SMTC - "mfc0 $1, $2, 1 \n" - "andi \\flags, 0x400 \n" - "ori $1, 0x400 \n" - "xori $1, 0x400 \n" - "or \\flags, $1 \n" - "mtc0 \\flags, $2, 1 \n" -#elif defined(CONFIG_CPU_MIPSR2) && defined(CONFIG_IRQ_CPU) - /* - * Slow, but doesn't suffer from a relativly unlikely race - * condition we're having since days 1. - */ - " beqz \\flags, 1f \n" - " di \n" - " ei \n" - "1: \n" -#elif defined(CONFIG_CPU_MIPSR2) - /* - * Fast, dangerous. Life is fun, life is good. - */ - " mfc0 $1, $12 \n" - " ins $1, \\flags, 0, 1 \n" - " mtc0 $1, $12 \n" -#else - " mfc0 $1, $12 \n" - " andi \\flags, 1 \n" - " ori $1, 0x1f \n" - " xori $1, 0x1f \n" - " or \\flags, $1 \n" - " mtc0 \\flags, $12 \n" -#endif - " irq_disable_hazard \n" - " .set pop \n" - " .endm \n"); - -#define local_irq_restore(flags) \ -do { \ - unsigned long __tmp1; \ - \ - __asm__ __volatile__( \ - "local_irq_restore\t%0" \ - : "=r" (__tmp1) \ - : "0" (flags) \ - : "memory"); \ -} while(0) - -static inline int irqs_disabled(void) -{ -#ifdef CONFIG_MIPS_MT_SMTC - /* - * SMTC model uses TCStatus.IXMT to disable interrupts for a thread/CPU - */ - unsigned long __result; - - __asm__ __volatile__( - " .set noreorder \n" - " mfc0 %0, $2, 1 \n" - " andi %0, 0x400 \n" - " slt %0, $0, %0 \n" - " .set reorder \n" - : "=r" (__result)); - - return __result; -#else - unsigned long flags; - local_save_flags(flags); - - return !(flags & 1); -#endif -} - -#endif /* _ASM_INTERRUPT_H */ diff --git a/include/asm-mips/irqflags.h b/include/asm-mips/irqflags.h new file mode 100644 index 00000000000..43ca09a3a3d --- /dev/null +++ b/include/asm-mips/irqflags.h @@ -0,0 +1,225 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 1994, 95, 96, 97, 98, 99, 2003 by Ralf Baechle + * Copyright (C) 1996 by Paul M. Antoine + * Copyright (C) 1999 Silicon Graphics + * Copyright (C) 2000 MIPS Technologies, Inc. + */ +#ifndef _ASM_IRQFLAGS_H +#define _ASM_IRQFLAGS_H + +#ifndef __ASSEMBLY__ + +#include + +__asm__ ( + " .macro raw_local_irq_enable \n" + " .set push \n" + " .set reorder \n" + " .set noat \n" +#ifdef CONFIG_MIPS_MT_SMTC + " mfc0 $1, $2, 1 # SMTC - clear TCStatus.IXMT \n" + " ori $1, 0x400 \n" + " xori $1, 0x400 \n" + " mtc0 $1, $2, 1 \n" +#elif defined(CONFIG_CPU_MIPSR2) + " ei \n" +#else + " mfc0 $1,$12 \n" + " ori $1,0x1f \n" + " xori $1,0x1e \n" + " mtc0 $1,$12 \n" +#endif + " irq_enable_hazard \n" + " .set pop \n" + " .endm"); + +static inline void raw_local_irq_enable(void) +{ + __asm__ __volatile__( + "raw_local_irq_enable" + : /* no outputs */ + : /* no inputs */ + : "memory"); +} + +/* + * For cli() we have to insert nops to make sure that the new value + * has actually arrived in the status register before the end of this + * macro. + * R4000/R4400 need three nops, the R4600 two nops and the R10000 needs + * no nops at all. + */ +/* + * For TX49, operating only IE bit is not enough. + * + * If mfc0 $12 follows store and the mfc0 is last instruction of a + * page and fetching the next instruction causes TLB miss, the result + * of the mfc0 might wrongly contain EXL bit. + * + * ERT-TX49H2-027, ERT-TX49H3-012, ERT-TX49HL3-006, ERT-TX49H4-008 + * + * Workaround: mask EXL bit of the result or place a nop before mfc0. + */ +__asm__ ( + " .macro raw_local_irq_disable\n" + " .set push \n" + " .set noat \n" +#ifdef CONFIG_MIPS_MT_SMTC + " mfc0 $1, $2, 1 \n" + " ori $1, 0x400 \n" + " .set noreorder \n" + " mtc0 $1, $2, 1 \n" +#elif defined(CONFIG_CPU_MIPSR2) + " di \n" +#else + " mfc0 $1,$12 \n" + " ori $1,0x1f \n" + " xori $1,0x1f \n" + " .set noreorder \n" + " mtc0 $1,$12 \n" +#endif + " irq_disable_hazard \n" + " .set pop \n" + " .endm \n"); + +static inline void raw_local_irq_disable(void) +{ + __asm__ __volatile__( + "raw_local_irq_disable" + : /* no outputs */ + : /* no inputs */ + : "memory"); +} + +__asm__ ( + " .macro raw_local_save_flags flags \n" + " .set push \n" + " .set reorder \n" +#ifdef CONFIG_MIPS_MT_SMTC + " mfc0 \\flags, $2, 1 \n" +#else + " mfc0 \\flags, $12 \n" +#endif + " .set pop \n" + " .endm \n"); + +#define raw_local_save_flags(x) \ +__asm__ __volatile__( \ + "raw_local_save_flags %0" \ + : "=r" (x)) + +__asm__ ( + " .macro raw_local_irq_save result \n" + " .set push \n" + " .set reorder \n" + " .set noat \n" +#ifdef CONFIG_MIPS_MT_SMTC + " mfc0 \\result, $2, 1 \n" + " ori $1, \\result, 0x400 \n" + " .set noreorder \n" + " mtc0 $1, $2, 1 \n" + " andi \\result, \\result, 0x400 \n" +#elif defined(CONFIG_CPU_MIPSR2) + " di \\result \n" + " andi \\result, 1 \n" +#else + " mfc0 \\result, $12 \n" + " ori $1, \\result, 0x1f \n" + " xori $1, 0x1f \n" + " .set noreorder \n" + " mtc0 $1, $12 \n" +#endif + " irq_disable_hazard \n" + " .set pop \n" + " .endm \n"); + +#define raw_local_irq_save(x) \ +__asm__ __volatile__( \ + "raw_local_irq_save\t%0" \ + : "=r" (x) \ + : /* no inputs */ \ + : "memory") + +__asm__ ( + " .macro raw_local_irq_restore flags \n" + " .set push \n" + " .set noreorder \n" + " .set noat \n" +#ifdef CONFIG_MIPS_MT_SMTC + "mfc0 $1, $2, 1 \n" + "andi \\flags, 0x400 \n" + "ori $1, 0x400 \n" + "xori $1, 0x400 \n" + "or \\flags, $1 \n" + "mtc0 \\flags, $2, 1 \n" +#elif defined(CONFIG_CPU_MIPSR2) && defined(CONFIG_IRQ_CPU) + /* + * Slow, but doesn't suffer from a relativly unlikely race + * condition we're having since days 1. + */ + " beqz \\flags, 1f \n" + " di \n" + " ei \n" + "1: \n" +#elif defined(CONFIG_CPU_MIPSR2) + /* + * Fast, dangerous. Life is fun, life is good. + */ + " mfc0 $1, $12 \n" + " ins $1, \\flags, 0, 1 \n" + " mtc0 $1, $12 \n" +#else + " mfc0 $1, $12 \n" + " andi \\flags, 1 \n" + " ori $1, 0x1f \n" + " xori $1, 0x1f \n" + " or \\flags, $1 \n" + " mtc0 \\flags, $12 \n" +#endif + " irq_disable_hazard \n" + " .set pop \n" + " .endm \n"); + +#define raw_local_irq_restore(flags) \ +do { \ + unsigned long __tmp1; \ + \ + __asm__ __volatile__( \ + "raw_local_irq_restore\t%0" \ + : "=r" (__tmp1) \ + : "0" (flags) \ + : "memory"); \ +} while(0) + +static inline int raw_irqs_disabled_flags(unsigned long flags) +{ +#ifdef CONFIG_MIPS_MT_SMTC + /* + * SMTC model uses TCStatus.IXMT to disable interrupts for a thread/CPU + */ + return flags & 0x400; +#else + return !(flags & 1); +#endif +} + +#endif + +/* + * Do the CPU's IRQ-state tracing from assembly code. + */ +#ifdef CONFIG_TRACE_IRQFLAGS +# define TRACE_IRQS_ON \ + jal trace_hardirqs_on +# define TRACE_IRQS_OFF \ + jal trace_hardirqs_off +#else +# define TRACE_IRQS_ON +# define TRACE_IRQS_OFF +#endif + +#endif /* _ASM_IRQFLAGS_H */ diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h index b4169f0fb13..677668867b9 100644 --- a/include/asm-mips/mipsregs.h +++ b/include/asm-mips/mipsregs.h @@ -1417,7 +1417,7 @@ change_c0_##name(unsigned int change, unsigned int new) \ #else /* SMTC versions that manage MT scheduling */ -#include +#include /* * This is a duplicate of dmt() in mipsmtregs.h to avoid problems with diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h index 130333d7c4e..13c98dde82d 100644 --- a/include/asm-mips/system.h +++ b/include/asm-mips/system.h @@ -13,13 +13,13 @@ #define _ASM_SYSTEM_H #include +#include #include #include #include #include #include -#include /* * read_barrier_depends - Flush all pending reads that subsequents reads -- cgit v1.2.3-70-g09d2 From 2874fe55332e2fb4e9c8e672cf2b7361bb168d17 Mon Sep 17 00:00:00 2001 From: Yoichi Yuasa Date: Sat, 8 Jul 2006 00:42:12 +0900 Subject: [MIPS] vr41xx: Replace magic number for P4K bit with symbol. Signed-off-by: Yoichi Yuasa Signed-off-by: Ralf Baechle --- arch/mips/mm/c-r4k.c | 2 +- include/asm-mips/mipsregs.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index d5111d16543..069803f58f3 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -862,7 +862,7 @@ static void __init probe_pcache(void) break; case CPU_VR4133: - write_c0_config(config & ~CONF_EB); + write_c0_config(config & ~VR41_CONF_P4K); case CPU_VR4131: /* Workaround for cache instruction bug of VR4131 */ if (c->processor_id == 0x0c80U || c->processor_id == 0x0c81U || diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h index 677668867b9..1f318d70799 100644 --- a/include/asm-mips/mipsregs.h +++ b/include/asm-mips/mipsregs.h @@ -470,6 +470,7 @@ /* Bits specific to the VR41xx. */ #define VR41_CONF_CS (_ULCAST_(1) << 12) +#define VR41_CONF_P4K (_ULCAST_(1) << 13) #define VR41_CONF_BP (_ULCAST_(1) << 16) #define VR41_CONF_M16 (_ULCAST_(1) << 20) #define VR41_CONF_AD (_ULCAST_(1) << 23) -- cgit v1.2.3-70-g09d2 From 54d0a216f40e060ba4265bb851cc36b3ca55d1a8 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Sun, 9 Jul 2006 21:38:56 +0100 Subject: [MIPS] Replace board_timer_setup function pointer by plat_timer_setup. Signed-off-by: Ralf Baechle --- --- Documentation/mips/time.README | 10 ++++------ arch/mips/au1000/common/setup.c | 2 -- arch/mips/au1000/common/time.c | 2 +- arch/mips/basler/excite/excite_setup.c | 3 +-- arch/mips/cobalt/setup.c | 4 +--- arch/mips/ddb5xxx/ddb5477/setup.c | 3 +-- arch/mips/dec/setup.c | 2 -- arch/mips/dec/time.c | 2 +- arch/mips/emma2rh/markeins/setup.c | 3 +-- arch/mips/gt64120/wrppmc/setup.c | 2 -- arch/mips/gt64120/wrppmc/time.c | 2 +- arch/mips/ite-boards/generic/it8172_setup.c | 2 -- arch/mips/ite-boards/generic/time.c | 3 ++- arch/mips/jazz/setup.c | 3 +-- arch/mips/jmr3927/rbhma3100/setup.c | 3 +-- arch/mips/kernel/smtc.c | 2 +- arch/mips/kernel/time.c | 5 ++--- arch/mips/lasat/setup.c | 8 ++------ arch/mips/mips-boards/atlas/atlas_setup.c | 2 -- arch/mips/mips-boards/generic/time.c | 2 +- arch/mips/mips-boards/malta/malta_setup.c | 2 -- arch/mips/mips-boards/sead/sead_setup.c | 2 -- arch/mips/mips-boards/sim/sim_setup.c | 2 -- arch/mips/momentum/jaguar_atx/setup.c | 3 +-- arch/mips/momentum/ocelot_3/setup.c | 3 +-- arch/mips/momentum/ocelot_c/setup.c | 3 +-- arch/mips/philips/pnx8550/common/setup.c | 2 -- arch/mips/philips/pnx8550/common/time.c | 11 +---------- arch/mips/pmc-sierra/yosemite/setup.c | 3 +-- arch/mips/qemu/q-setup.c | 4 +--- arch/mips/sgi-ip22/ip22-time.c | 5 ++--- arch/mips/sgi-ip27/ip27-timer.c | 6 ++---- arch/mips/sgi-ip32/ip32-setup.c | 4 ++-- arch/mips/sibyte/swarm/setup.c | 3 +-- arch/mips/sni/setup.c | 3 +-- arch/mips/tx4927/common/tx4927_setup.c | 4 +--- arch/mips/tx4938/common/setup.c | 5 +---- arch/mips/vr41xx/common/init.c | 3 +-- include/asm-mips/time.h | 4 ++-- 39 files changed, 40 insertions(+), 97 deletions(-) (limited to 'include') diff --git a/Documentation/mips/time.README b/Documentation/mips/time.README index 70bc0dd43d6..69ddc5c14b7 100644 --- a/Documentation/mips/time.README +++ b/Documentation/mips/time.README @@ -65,7 +65,7 @@ the following functions or values: 1. (optional) set up RTC routines 2. (optional) calibrate and set the mips_counter_frequency - b) board_timer_setup - a function pointer. Invoked at the end of time_init() + b) plat_timer_setup - a function pointer. Invoked at the end of time_init() 1. (optional) over-ride any decisions made in time_init() 2. set up the irqaction for timer interrupt. 3. enable the timer interrupt @@ -116,19 +116,17 @@ Step 2: the machine setup() function If you supply board_time_init(), set the function poointer. - Set the function pointer board_timer_setup() (mandatory) - -Step 3: implement rtc routines, board_time_init() and board_timer_setup() +Step 3: implement rtc routines, board_time_init() and plat_timer_setup() if needed. - board_time_init() - + board_time_init() - a) (optional) set up RTC routines, b) (optional) calibrate and set the mips_counter_frequency (only needed if you intended to use fixed_rate_gettimeoffset or use cpu counter as timer interrupt source) - board_timer_setup() - + plat_timer_setup() - a) (optional) over-write any choices made above by time_init(). b) machine specific code should setup the timer irqaction. c) enable the timer interrupt diff --git a/arch/mips/au1000/common/setup.c b/arch/mips/au1000/common/setup.c index cc5138ce9c9..377ae0d8ff0 100644 --- a/arch/mips/au1000/common/setup.c +++ b/arch/mips/au1000/common/setup.c @@ -51,7 +51,6 @@ extern void au1000_power_off(void); extern void au1x_time_init(void); extern void au1x_timer_setup(struct irqaction *irq); extern void au1xxx_time_init(void); -extern void au1xxx_timer_setup(struct irqaction *irq); extern void set_cpuspec(void); void __init plat_mem_setup(void) @@ -123,7 +122,6 @@ void __init plat_mem_setup(void) _machine_halt = au1000_halt; pm_power_off = au1000_power_off; board_time_init = au1xxx_time_init; - board_timer_setup = au1xxx_timer_setup; /* IO/MEM resources. */ set_io_port_base(0); diff --git a/arch/mips/au1000/common/time.c b/arch/mips/au1000/common/time.c index 7e988b0b013..7fbea1bf7b4 100644 --- a/arch/mips/au1000/common/time.c +++ b/arch/mips/au1000/common/time.c @@ -383,7 +383,7 @@ static unsigned long do_fast_pm_gettimeoffset(void) } #endif -void __init au1xxx_timer_setup(struct irqaction *irq) +void __init plat_timer_setup(struct irqaction *irq) { unsigned int est_freq; diff --git a/arch/mips/basler/excite/excite_setup.c b/arch/mips/basler/excite/excite_setup.c index e1d6ad296c9..a1ce4580058 100644 --- a/arch/mips/basler/excite/excite_setup.c +++ b/arch/mips/basler/excite/excite_setup.c @@ -78,7 +78,7 @@ static void excite_timer_init(void) mips_hpt_frequency = EXCITE_CPU_EXT_CLOCK * mult / div / 2; } -static void excite_timer_setup(struct irqaction *irq) +void __init plat_timer_setup(struct irqaction *irq) { /* The eXcite platform uses the alternate timer interrupt */ set_c0_intcontrol(0x80); @@ -262,7 +262,6 @@ void __init plat_mem_setup(void) /* Set up timer initialization hooks */ board_time_init = excite_timer_init; - board_timer_setup = excite_timer_setup; /* Set up the peripheral address map */ *(boot_ocd_base + (LKB9 / sizeof (u32))) = 0; diff --git a/arch/mips/cobalt/setup.c b/arch/mips/cobalt/setup.c index c99714587ce..c01a0170e59 100644 --- a/arch/mips/cobalt/setup.c +++ b/arch/mips/cobalt/setup.c @@ -49,7 +49,7 @@ const char *get_system_type(void) return "MIPS Cobalt"; } -static void __init cobalt_timer_setup(struct irqaction *irq) +void __init plat_timer_setup(struct irqaction *irq) { /* Load timer value for 1KHz (TCLK is 50MHz) */ GALILEO_OUTL(50*1000*1000 / 1000, GT_TC0_OFS); @@ -129,8 +129,6 @@ void __init plat_mem_setup(void) _machine_halt = cobalt_machine_halt; pm_power_off = cobalt_machine_power_off; - board_timer_setup = cobalt_timer_setup; - set_io_port_base(CKSEG1ADDR(GT64111_IO_BASE)); /* I/O port resource must include UART and LCD/buttons */ diff --git a/arch/mips/ddb5xxx/ddb5477/setup.c b/arch/mips/ddb5xxx/ddb5477/setup.c index 904c8f4f3c4..f0cc0e8a8af 100644 --- a/arch/mips/ddb5xxx/ddb5477/setup.c +++ b/arch/mips/ddb5xxx/ddb5477/setup.c @@ -147,7 +147,7 @@ static void __init ddb_time_init(void) mips_hpt_frequency = bus_frequency*(i+4)/4; } -static void __init ddb_timer_setup(struct irqaction *irq) +void __init plat_timer_setup(struct irqaction *irq) { #if defined(USE_CPU_COUNTER_TIMER) @@ -177,7 +177,6 @@ void __init plat_mem_setup(void) set_io_port_base(KSEG1ADDR(DDB_PCI_IO_BASE)); board_time_init = ddb_time_init; - board_timer_setup = ddb_timer_setup; _machine_restart = ddb_machine_restart; _machine_halt = ddb_machine_halt; diff --git a/arch/mips/dec/setup.c b/arch/mips/dec/setup.c index 2684f121784..d43241c2f54 100644 --- a/arch/mips/dec/setup.c +++ b/arch/mips/dec/setup.c @@ -145,13 +145,11 @@ static void __init dec_be_init(void) extern void dec_time_init(void); -extern void dec_timer_setup(struct irqaction *); void __init plat_mem_setup(void) { board_be_init = dec_be_init; board_time_init = dec_time_init; - board_timer_setup = dec_timer_setup; wbflush_setup(); diff --git a/arch/mips/dec/time.c b/arch/mips/dec/time.c index 76e4d09ff4d..57294740c2d 100644 --- a/arch/mips/dec/time.c +++ b/arch/mips/dec/time.c @@ -186,7 +186,7 @@ void __init dec_time_init(void) EXPORT_SYMBOL(do_settimeofday); -void __init dec_timer_setup(struct irqaction *irq) +void __init plat_timer_setup(struct irqaction *irq) { setup_irq(dec_interrupt[DEC_IRQ_RTC], irq); diff --git a/arch/mips/emma2rh/markeins/setup.c b/arch/mips/emma2rh/markeins/setup.c index 25da5bc2099..b29a4473923 100644 --- a/arch/mips/emma2rh/markeins/setup.c +++ b/arch/mips/emma2rh/markeins/setup.c @@ -104,7 +104,7 @@ static void __init emma2rh_time_init(void) mips_hpt_frequency = (bus_frequency * (4 + reg)) / 4 / 2; } -static void __init emma2rh_timer_setup(struct irqaction *irq) +void __init plat_timer_setup(struct irqaction *irq) { /* we are using the cpu counter for timer interrupts */ setup_irq(CPU_IRQ_BASE + 7, irq); @@ -149,7 +149,6 @@ void __init plat_mem_setup(void) set_io_port_base(KSEG1ADDR(EMMA2RH_PCI_IO_BASE)); board_time_init = emma2rh_time_init; - board_timer_setup = emma2rh_timer_setup; _machine_restart = markeins_machine_restart; _machine_halt = markeins_machine_halt; diff --git a/arch/mips/gt64120/wrppmc/setup.c b/arch/mips/gt64120/wrppmc/setup.c index 221d8087c49..429afc400cb 100644 --- a/arch/mips/gt64120/wrppmc/setup.c +++ b/arch/mips/gt64120/wrppmc/setup.c @@ -127,7 +127,6 @@ static void wrppmc_setup_serial(void) void __init plat_mem_setup(void) { extern void wrppmc_time_init(void); - extern void wrppmc_timer_setup(struct irqaction *); extern void wrppmc_machine_restart(char *command); extern void wrppmc_machine_halt(void); extern void wrppmc_machine_power_off(void); @@ -138,7 +137,6 @@ void __init plat_mem_setup(void) /* Use MIPS Count/Compare Timer */ board_time_init = wrppmc_time_init; - board_timer_setup = wrppmc_timer_setup; /* This makes the operations of 'in/out[bwl]' to the * physical address ( < KSEG0) can work via KSEG1 diff --git a/arch/mips/gt64120/wrppmc/time.c b/arch/mips/gt64120/wrppmc/time.c index c8ed57e1b77..5b440859bce 100644 --- a/arch/mips/gt64120/wrppmc/time.c +++ b/arch/mips/gt64120/wrppmc/time.c @@ -26,7 +26,7 @@ #define WRPPMC_CPU_CLK_FREQ 40000000 /* 40MHZ */ -void __init wrppmc_timer_setup(struct irqaction *irq) +void __init plat_timer_setup(struct irqaction *irq) { /* Install ISR for timer interrupt */ setup_irq(WRPPMC_MIPS_TIMER_IRQ, irq); diff --git a/arch/mips/ite-boards/generic/it8172_setup.c b/arch/mips/ite-boards/generic/it8172_setup.c index 0c657b4efae..07faf3cacff 100644 --- a/arch/mips/ite-boards/generic/it8172_setup.c +++ b/arch/mips/ite-boards/generic/it8172_setup.c @@ -60,7 +60,6 @@ extern void it8172_halt(void); extern void it8172_power_off(void); extern void it8172_time_init(void); -extern void it8172_timer_setup(struct irqaction *irq); #ifdef CONFIG_IT8172_REVC struct { @@ -168,7 +167,6 @@ void __init plat_mem_setup(void) clear_c0_status(ST0_FR); board_time_init = it8172_time_init; - board_timer_setup = it8172_timer_setup; _machine_restart = it8172_restart; _machine_halt = it8172_halt; diff --git a/arch/mips/ite-boards/generic/time.c b/arch/mips/ite-boards/generic/time.c index dee497a9180..3dc55569ff7 100644 --- a/arch/mips/ite-boards/generic/time.c +++ b/arch/mips/ite-boards/generic/time.c @@ -233,7 +233,8 @@ void __init it8172_time_init(void) } #define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5) -void __init it8172_timer_setup(struct irqaction *irq) + +void __init plat_timer_setup(struct irqaction *irq) { puts("timer_setup\n"); put32(NR_IRQS); diff --git a/arch/mips/jazz/setup.c b/arch/mips/jazz/setup.c index 385413e30fd..487a9ea1ef0 100644 --- a/arch/mips/jazz/setup.c +++ b/arch/mips/jazz/setup.c @@ -37,7 +37,7 @@ extern void jazz_machine_restart(char *command); extern void jazz_machine_halt(void); extern void jazz_machine_power_off(void); -static void __init jazz_time_init(struct irqaction *irq) +void __init plat_time_init(struct irqaction *irq) { /* set the clock to 100 Hz */ r4030_write_reg32(JAZZ_TIMER_INTERVAL, 9); @@ -75,7 +75,6 @@ void __init plat_mem_setup(void) for (i = 0; i < ARRAY_SIZE(jazz_io_resources); i++) request_resource(&ioport_resource, jazz_io_resources + i); - board_timer_setup = jazz_time_init; /* The RTC is outside the port address space */ _machine_restart = jazz_machine_restart; diff --git a/arch/mips/jmr3927/rbhma3100/setup.c b/arch/mips/jmr3927/rbhma3100/setup.c index 36d22b9413b..025434054ed 100644 --- a/arch/mips/jmr3927/rbhma3100/setup.c +++ b/arch/mips/jmr3927/rbhma3100/setup.c @@ -185,7 +185,7 @@ static void __init jmr3927_time_init(void) unsigned long jmr3927_do_gettimeoffset(void); -static void __init jmr3927_timer_setup(struct irqaction *irq) +void __init plat_timer_setup(struct irqaction *irq) { do_gettimeoffset = jmr3927_do_gettimeoffset; @@ -244,7 +244,6 @@ void __init plat_mem_setup(void) set_io_port_base(JMR3927_PORT_BASE + JMR3927_PCIIO); board_time_init = jmr3927_time_init; - board_timer_setup = jmr3927_timer_setup; _machine_restart = jmr3927_machine_restart; _machine_halt = jmr3927_machine_halt; diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c index 5b17a3d6ae4..604bcc5cb7c 100644 --- a/arch/mips/kernel/smtc.c +++ b/arch/mips/kernel/smtc.c @@ -577,7 +577,7 @@ void smtc_init_secondary(void) { /* * Start timer on secondary VPEs if necessary. - * mips_timer_setup should already have been invoked by init/main + * plat_timer_setup has already have been invoked by init/main * on "boot" TC. Like per_cpu_trap_init() hack, this assumes that * SMTC init code assigns TCs consdecutively and in ascending order * to across available VPEs. diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c index 2393c11d5a2..170cb67f4ed 100644 --- a/arch/mips/kernel/time.c +++ b/arch/mips/kernel/time.c @@ -566,14 +566,13 @@ asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs) * 2) setup xtime based on rtc_mips_get_time(). * 3) choose a appropriate gettimeoffset routine. * 4) calculate a couple of cached variables for later usage - * 5) board_timer_setup() - + * 5) plat_timer_setup() - * a) (optional) over-write any choices made above by time_init(). * b) machine specific code should setup the timer irqaction. * c) enable the timer interrupt */ void (*board_time_init)(void); -void (*board_timer_setup)(struct irqaction *irq); unsigned int mips_hpt_frequency; @@ -718,7 +717,7 @@ void __init time_init(void) * to be NULL function so that we are sure the high-level code * is not invoked accidentally. */ - board_timer_setup(&timer_irqaction); + plat_timer_setup(&timer_irqaction); } #define FEBRUARY 2 diff --git a/arch/mips/lasat/setup.c b/arch/mips/lasat/setup.c index 2187e63c6d8..0ffc43c600d 100644 --- a/arch/mips/lasat/setup.c +++ b/arch/mips/lasat/setup.c @@ -115,12 +115,9 @@ static void lasat_time_init(void) mips_hpt_frequency = lasat_board_info.li_cpu_hz / 2; } -static void lasat_timer_setup(struct irqaction *irq) +void __init plat_timer_setup(struct irqaction *irq) { - - write_c0_compare( - read_c0_count() + - mips_hpt_frequency / HZ); + write_c0_compare( read_c0_count() + mips_hpt_frequency / HZ); change_c0_status(ST0_IM, IE_IRQ0 | IE_IRQ5); } @@ -170,7 +167,6 @@ void __init plat_mem_setup(void) lasat_reboot_setup(); board_time_init = lasat_time_init; - board_timer_setup = lasat_timer_setup; #ifdef CONFIG_DS1603 ds1603 = &ds_defs[mips_machtype]; diff --git a/arch/mips/mips-boards/atlas/atlas_setup.c b/arch/mips/mips-boards/atlas/atlas_setup.c index 3a7c3d28aa0..9871a91fdb0 100644 --- a/arch/mips/mips-boards/atlas/atlas_setup.c +++ b/arch/mips/mips-boards/atlas/atlas_setup.c @@ -35,7 +35,6 @@ extern void mips_reboot_setup(void); extern void mips_time_init(void); -extern void mips_timer_setup(struct irqaction *irq); extern unsigned long mips_rtc_get_time(void); #ifdef CONFIG_KGDB @@ -63,7 +62,6 @@ void __init plat_mem_setup(void) mips_reboot_setup(); board_time_init = mips_time_init; - board_timer_setup = mips_timer_setup; rtc_mips_get_time = mips_rtc_get_time; } diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c index 5e207760826..8e846d175ee 100644 --- a/arch/mips/mips-boards/generic/time.c +++ b/arch/mips/mips-boards/generic/time.c @@ -245,7 +245,7 @@ void __init mips_time_init(void) local_irq_restore(flags); } -void __init mips_timer_setup(struct irqaction *irq) +void __init plat_timer_setup(struct irqaction *irq) { if (cpu_has_veic) { set_vi_handler (MSC01E_INT_CPUCTR, mips_timer_dispatch); diff --git a/arch/mips/mips-boards/malta/malta_setup.c b/arch/mips/mips-boards/malta/malta_setup.c index 7a54195c78f..ab460f805be 100644 --- a/arch/mips/mips-boards/malta/malta_setup.c +++ b/arch/mips/mips-boards/malta/malta_setup.c @@ -44,7 +44,6 @@ extern void mips_reboot_setup(void); extern void mips_time_init(void); -extern void mips_timer_setup(struct irqaction *irq); extern unsigned long mips_rtc_get_time(void); #ifdef CONFIG_KGDB @@ -223,6 +222,5 @@ void __init plat_mem_setup(void) mips_reboot_setup(); board_time_init = mips_time_init; - board_timer_setup = mips_timer_setup; rtc_mips_get_time = mips_rtc_get_time; } diff --git a/arch/mips/mips-boards/sead/sead_setup.c b/arch/mips/mips-boards/sead/sead_setup.c index a856bd66487..a189dec7c7b 100644 --- a/arch/mips/mips-boards/sead/sead_setup.c +++ b/arch/mips/mips-boards/sead/sead_setup.c @@ -35,7 +35,6 @@ extern void mips_reboot_setup(void); extern void mips_time_init(void); -extern void mips_timer_setup(struct irqaction *irq); static void __init serial_init(void); @@ -51,7 +50,6 @@ void __init plat_mem_setup(void) serial_init (); board_time_init = mips_time_init; - board_timer_setup = mips_timer_setup; mips_reboot_setup(); } diff --git a/arch/mips/mips-boards/sim/sim_setup.c b/arch/mips/mips-boards/sim/sim_setup.c index 3d4a785b565..2659c1c3b78 100644 --- a/arch/mips/mips-boards/sim/sim_setup.c +++ b/arch/mips/mips-boards/sim/sim_setup.c @@ -37,7 +37,6 @@ extern void sim_time_init(void); -extern void sim_timer_setup(struct irqaction *irq); static void __init serial_init(void); unsigned int _isbonito = 0; @@ -56,7 +55,6 @@ void __init plat_mem_setup(void) serial_init(); board_time_init = sim_time_init; - board_timer_setup = sim_timer_setup; prom_printf("Linux started...\n"); #ifdef CONFIG_MT_SMP diff --git a/arch/mips/momentum/jaguar_atx/setup.c b/arch/mips/momentum/jaguar_atx/setup.c index b08e6a0456c..e6fe2992227 100644 --- a/arch/mips/momentum/jaguar_atx/setup.c +++ b/arch/mips/momentum/jaguar_atx/setup.c @@ -212,7 +212,7 @@ int m48t37y_set_time(unsigned long sec) return 0; } -void momenco_timer_setup(struct irqaction *irq) +void __init plat_timer_setup(struct irqaction *irq) { setup_irq(8, irq); } @@ -226,7 +226,6 @@ void momenco_time_init(void) wire_stupidity_into_tlb(); mips_hpt_frequency = cpu_clock / 2; - board_timer_setup = momenco_timer_setup; rtc_mips_get_time = m48t37y_get_time; rtc_mips_set_time = m48t37y_set_time; diff --git a/arch/mips/momentum/ocelot_3/setup.c b/arch/mips/momentum/ocelot_3/setup.c index 8c53490ba6f..435d0787329 100644 --- a/arch/mips/momentum/ocelot_3/setup.c +++ b/arch/mips/momentum/ocelot_3/setup.c @@ -197,7 +197,7 @@ int m48t37y_set_time(unsigned long sec) return 0; } -void momenco_timer_setup(struct irqaction *irq) +void __init plat_timer_setup(struct irqaction *irq) { setup_irq(7, irq); /* Timer interrupt, unmask status IM7 */ } @@ -211,7 +211,6 @@ void momenco_time_init(void) * the Rm7900 and the Rm7065C */ mips_hpt_frequency = cpu_clock / 2; - board_timer_setup = momenco_timer_setup; rtc_mips_get_time = m48t37y_get_time; rtc_mips_set_time = m48t37y_set_time; diff --git a/arch/mips/momentum/ocelot_c/setup.c b/arch/mips/momentum/ocelot_c/setup.c index 6a4519936ee..36f570ecc6f 100644 --- a/arch/mips/momentum/ocelot_c/setup.c +++ b/arch/mips/momentum/ocelot_c/setup.c @@ -209,7 +209,7 @@ int m48t37y_set_time(unsigned long sec) return 0; } -void momenco_timer_setup(struct irqaction *irq) +void __init plat_timer_setup(struct irqaction *irq) { setup_irq(7, irq); } @@ -224,7 +224,6 @@ void momenco_time_init(void) #error Unknown CPU for this board #endif printk("momenco_time_init cpu_clock=%d\n", cpu_clock); - board_timer_setup = momenco_timer_setup; rtc_mips_get_time = m48t37y_get_time; rtc_mips_set_time = m48t37y_set_time; diff --git a/arch/mips/philips/pnx8550/common/setup.c b/arch/mips/philips/pnx8550/common/setup.c index 57fc5938c91..36b0c8bc6c0 100644 --- a/arch/mips/philips/pnx8550/common/setup.c +++ b/arch/mips/philips/pnx8550/common/setup.c @@ -50,7 +50,6 @@ extern void pnx8550_machine_power_off(void); extern struct resource ioport_resource; extern struct resource iomem_resource; extern void pnx8550_time_init(void); -extern void pnx8550_timer_setup(struct irqaction *irq); extern void rs_kgdb_hook(int tty_no); extern void prom_printf(char *fmt, ...); extern char *prom_getcmdline(void); @@ -109,7 +108,6 @@ void __init plat_mem_setup(void) pm_power_off = pnx8550_machine_power_off; board_time_init = pnx8550_time_init; - board_timer_setup = pnx8550_timer_setup; /* Clear the Global 2 Register, PCI Inta Output Enable Registers Bit 1:Enable DAC Powerdown diff --git a/arch/mips/philips/pnx8550/common/time.c b/arch/mips/philips/pnx8550/common/time.c index 70664ea96b9..0af655b1f33 100644 --- a/arch/mips/philips/pnx8550/common/time.c +++ b/arch/mips/philips/pnx8550/common/time.c @@ -70,16 +70,7 @@ void pnx8550_time_init(void) mips_hpt_frequency = 27UL * ((1000000UL * n)/(m * pow2p)); } -/* - * pnx8550_timer_setup() - it does the following things: - * - * 5) board_timer_setup() - - * a) (optional) over-write any choices made above by time_init(). - * b) machine specific code should setup the timer irqaction. - * c) enable the timer interrupt - */ - -void __init pnx8550_timer_setup(struct irqaction *irq) +void __init plat_timer_setup(struct irqaction *irq) { int configPR; diff --git a/arch/mips/pmc-sierra/yosemite/setup.c b/arch/mips/pmc-sierra/yosemite/setup.c index aa0d6ff3c6e..0a6ee8e5eec 100644 --- a/arch/mips/pmc-sierra/yosemite/setup.c +++ b/arch/mips/pmc-sierra/yosemite/setup.c @@ -133,14 +133,13 @@ int m48t37y_set_time(unsigned long sec) return 0; } -void yosemite_timer_setup(struct irqaction *irq) +void __init plat_timer_setup(struct irqaction *irq) { setup_irq(7, irq); } void yosemite_time_init(void) { - board_timer_setup = yosemite_timer_setup; mips_hpt_frequency = cpu_clock / 2; mips_hpt_frequency = 33000000 * 3 * 5; } diff --git a/arch/mips/qemu/q-setup.c b/arch/mips/qemu/q-setup.c index e100d6072e3..841394336f0 100644 --- a/arch/mips/qemu/q-setup.c +++ b/arch/mips/qemu/q-setup.c @@ -11,7 +11,7 @@ const char *get_system_type(void) return "Qemu"; } -static void __init qemu_timer_setup(struct irqaction *irq) +void __init plat_timer_setup(struct irqaction *irq) { /* set the clock to 100 Hz */ outb_p(0x34,0x43); /* binary, mode 2, LSB/MSB, ch 0 */ @@ -23,7 +23,5 @@ static void __init qemu_timer_setup(struct irqaction *irq) void __init plat_mem_setup(void) { set_io_port_base(QEMU_PORT_BASE); - board_timer_setup = qemu_timer_setup; - qemu_reboot_setup(); } diff --git a/arch/mips/sgi-ip22/ip22-time.c b/arch/mips/sgi-ip22/ip22-time.c index 0bae605201c..4aeb4c55e18 100644 --- a/arch/mips/sgi-ip22/ip22-time.c +++ b/arch/mips/sgi-ip22/ip22-time.c @@ -7,7 +7,7 @@ * Ralf Baechle or David S. Miller (sorry guys, i'm really not sure) * * Copyright (C) 2001 by Ladislav Michl - * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org) + * Copyright (C) 2003, 06 Ralf Baechle (ralf@linux-mips.org) */ #include #include @@ -199,7 +199,7 @@ void indy_r4k_timer_interrupt(struct pt_regs *regs) irq_exit(); } -static void indy_timer_setup(struct irqaction *irq) +void __init plat_timer_setup(struct irqaction *irq) { /* over-write the handler, we use our own way */ irq->handler = no_action; @@ -215,5 +215,4 @@ void __init ip22_time_init(void) rtc_mips_set_time = indy_rtc_set_time; board_time_init = indy_time_init; - board_timer_setup = indy_timer_setup; } diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c index 04522faada9..b029ba79c27 100644 --- a/arch/mips/sgi-ip27/ip27-timer.c +++ b/arch/mips/sgi-ip27/ip27-timer.c @@ -1,5 +1,5 @@ /* - * Copytight (C) 1999, 2000, 05 Ralf Baechle (ralf@linux-mips.org) + * Copytight (C) 1999, 2000, 05, 06 Ralf Baechle (ralf@linux-mips.org) * Copytight (C) 1999, 2000 Silicon Graphics, Inc. */ #include @@ -225,7 +225,7 @@ static struct irqaction rt_irqaction = { extern int allocate_irqno(void); -static void ip27_timer_setup(struct irqaction *irq) +void __init plat_timer_setup(struct irqaction *irq) { int irqno = allocate_irqno(); @@ -256,8 +256,6 @@ void __init ip27_time_init(void) xtime.tv_nsec = 0; do_gettimeoffset = ip27_do_gettimeoffset; - - board_timer_setup = ip27_timer_setup; } void __init cpu_time_init(void) diff --git a/arch/mips/sgi-ip32/ip32-setup.c b/arch/mips/sgi-ip32/ip32-setup.c index 240a2f981d0..57708fe28bd 100644 --- a/arch/mips/sgi-ip32/ip32-setup.c +++ b/arch/mips/sgi-ip32/ip32-setup.c @@ -7,6 +7,7 @@ * * Copyright (C) 2000 Harald Koerfgen * Copyright (C) 2002, 2003, 2005 Ilya A. Volynets + * Copyright (C) 2006 Ralf Baechle */ #include #include @@ -80,7 +81,7 @@ void __init ip32_time_init(void) printk("%d MHz CPU detected\n", mips_hpt_frequency * 2 / 1000000); } -void __init ip32_timer_setup(struct irqaction *irq) +void __init plat_timer_setup(struct irqaction *irq) { irq->handler = no_action; setup_irq(IP32_R4K_TIMER_IRQ, irq); @@ -94,7 +95,6 @@ void __init plat_mem_setup(void) rtc_mips_set_mmss = mc146818_set_rtc_mmss; board_time_init = ip32_time_init; - board_timer_setup = ip32_timer_setup; #ifdef CONFIG_SERIAL_8250 { diff --git a/arch/mips/sibyte/swarm/setup.c b/arch/mips/sibyte/swarm/setup.c index 2996e338cfb..ac342f5643c 100644 --- a/arch/mips/sibyte/swarm/setup.c +++ b/arch/mips/sibyte/swarm/setup.c @@ -77,7 +77,7 @@ void __init swarm_time_init(void) #endif } -void __init swarm_timer_setup(struct irqaction *irq) +void __init plat_timer_setup(struct irqaction *irq) { /* * we don't set up irqaction, because we will deliver timer @@ -117,7 +117,6 @@ void __init plat_mem_setup(void) panic_timeout = 5; /* For debug. */ board_time_init = swarm_time_init; - board_timer_setup = swarm_timer_setup; board_be_handler = swarm_be_handler; if (xicor_probe()) { diff --git a/arch/mips/sni/setup.c b/arch/mips/sni/setup.c index e5646b027f7..4e98feb1541 100644 --- a/arch/mips/sni/setup.c +++ b/arch/mips/sni/setup.c @@ -41,7 +41,7 @@ extern void sni_machine_restart(char *command); extern void sni_machine_halt(void); extern void sni_machine_power_off(void); -static void __init sni_rm200_pci_timer_setup(struct irqaction *irq) +void __init plat_timer_setup(struct irqaction *irq) { /* set the clock to 100 Hz */ outb_p(0x34,0x43); /* binary, mode 2, LSB/MSB, ch 0 */ @@ -270,7 +270,6 @@ void __init plat_mem_setup(void) #endif sni_resource_init(); - board_timer_setup = sni_rm200_pci_timer_setup; _machine_restart = sni_machine_restart; _machine_halt = sni_machine_halt; diff --git a/arch/mips/tx4927/common/tx4927_setup.c b/arch/mips/tx4927/common/tx4927_setup.c index 64a1b394b25..3ace4037343 100644 --- a/arch/mips/tx4927/common/tx4927_setup.c +++ b/arch/mips/tx4927/common/tx4927_setup.c @@ -50,7 +50,6 @@ #undef DEBUG void __init tx4927_time_init(void); -void __init tx4927_timer_setup(struct irqaction *irq); void dump_cp0(char *key); @@ -66,7 +65,6 @@ static void tx4927_write_buffer_flush(void) void __init plat_mem_setup(void) { board_time_init = tx4927_time_init; - board_timer_setup = tx4927_timer_setup; __wbflush = tx4927_write_buffer_flush; #ifdef CONFIG_TOSHIBA_RBTX4927 @@ -91,7 +89,7 @@ void __init tx4927_time_init(void) } -void __init tx4927_timer_setup(struct irqaction *irq) +void __init plat_timer_setup(struct irqaction *irq) { u32 count; u32 c1; diff --git a/arch/mips/tx4938/common/setup.c b/arch/mips/tx4938/common/setup.c index ef59a5cffc6..71859c4fee8 100644 --- a/arch/mips/tx4938/common/setup.c +++ b/arch/mips/tx4938/common/setup.c @@ -39,7 +39,6 @@ extern void rbtx4938_time_init(void); void __init tx4938_setup(void); void __init tx4938_time_init(void); -void __init tx4938_timer_setup(struct irqaction *irq); void dump_cp0(char *key); void (*__wbflush) (void); @@ -64,7 +63,6 @@ void __init plat_mem_setup(void) { board_time_init = tx4938_time_init; - board_timer_setup = tx4938_timer_setup; __wbflush = tx4938_write_buffer_flush; toshiba_rbtx4938_setup(); } @@ -75,8 +73,7 @@ tx4938_time_init(void) rbtx4938_time_init(); } -void __init -tx4938_timer_setup(struct irqaction *irq) +void __init plat_timer_setup(struct irqaction *irq) { u32 count; u32 c1; diff --git a/arch/mips/vr41xx/common/init.c b/arch/mips/vr41xx/common/init.c index 915bfa5c071..625f22f0038 100644 --- a/arch/mips/vr41xx/common/init.c +++ b/arch/mips/vr41xx/common/init.c @@ -47,7 +47,7 @@ static void __init setup_timer_frequency(void) mips_hpt_frequency = tclock / 4; } -static void __init setup_timer_irq(struct irqaction *irq) +void __init plat_timer_setup(struct irqaction *irq) { setup_irq(TIMER_IRQ, irq); } @@ -55,7 +55,6 @@ static void __init setup_timer_irq(struct irqaction *irq) static void __init timer_init(void) { board_time_init = setup_timer_frequency; - board_timer_setup = setup_timer_irq; } void __init plat_mem_setup(void) diff --git a/include/asm-mips/time.h b/include/asm-mips/time.h index d897c8bb554..2d543735668 100644 --- a/include/asm-mips/time.h +++ b/include/asm-mips/time.h @@ -83,11 +83,11 @@ extern asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs); /* * board specific routines required by time_init(). * board_time_init is defaulted to NULL and can remain so. - * board_timer_setup must be setup properly in machine setup routine. + * plat_timer_setup must be setup properly in machine setup routine. */ struct irqaction; extern void (*board_time_init)(void); -extern void (*board_timer_setup)(struct irqaction *irq); +extern void plat_timer_setup(struct irqaction *irq); /* * mips_hpt_frequency - must be set if you intend to use an R4k-compatible -- cgit v1.2.3-70-g09d2 From 66151bbd20c6c62dbe5b131484c885086e3a8d29 Mon Sep 17 00:00:00 2001 From: Yoichi Yuasa Date: Thu, 13 Jul 2006 17:33:03 +0900 Subject: [MIPS] vr41xx: Move IRQ numbers to asm-mips/vr41xx/irq.h Signed-off-by: Yoichi Yuasa Signed-off-by: Ralf Baechle --- arch/mips/pci/fixup-mpc30x.c | 1 - arch/mips/vr41xx/common/icu.c | 1 + arch/mips/vr41xx/common/init.c | 1 + arch/mips/vr41xx/common/irq.c | 2 +- arch/mips/vr41xx/common/vrc4173.c | 1 + drivers/char/vr41xx_giu.c | 1 + drivers/rtc/rtc-vr41xx.c | 2 +- drivers/serial/vr41xx_siu.c | 1 + include/asm-mips/vr41xx/capcella.h | 2 +- include/asm-mips/vr41xx/cmbvr4133.h | 3 +- include/asm-mips/vr41xx/irq.h | 101 ++++++++++++++++++++++++++++++++++++ include/asm-mips/vr41xx/mpc30x.h | 2 +- include/asm-mips/vr41xx/tb0219.h | 2 +- include/asm-mips/vr41xx/tb0226.h | 2 +- include/asm-mips/vr41xx/tb0287.h | 2 +- include/asm-mips/vr41xx/vr41xx.h | 53 ------------------- include/asm-mips/vr41xx/vrc4173.h | 20 ------- 17 files changed, 114 insertions(+), 83 deletions(-) create mode 100644 include/asm-mips/vr41xx/irq.h (limited to 'include') diff --git a/arch/mips/pci/fixup-mpc30x.c b/arch/mips/pci/fixup-mpc30x.c index b67ddaa4712..3c9ae41f751 100644 --- a/arch/mips/pci/fixup-mpc30x.c +++ b/arch/mips/pci/fixup-mpc30x.c @@ -21,7 +21,6 @@ #include #include -#include static const int internal_func_irqs[] __initdata = { VRC4173_CASCADE_IRQ, diff --git a/arch/mips/vr41xx/common/icu.c b/arch/mips/vr41xx/common/icu.c index 3cc5a495927..7a5c31d5837 100644 --- a/arch/mips/vr41xx/common/icu.c +++ b/arch/mips/vr41xx/common/icu.c @@ -38,6 +38,7 @@ #include #include +#include #include static void __iomem *icu1_base; diff --git a/arch/mips/vr41xx/common/init.c b/arch/mips/vr41xx/common/init.c index 625f22f0038..a2e285c1d4d 100644 --- a/arch/mips/vr41xx/common/init.c +++ b/arch/mips/vr41xx/common/init.c @@ -24,6 +24,7 @@ #include #include +#include #include #define IO_MEM_RESOURCE_START 0UL diff --git a/arch/mips/vr41xx/common/irq.c b/arch/mips/vr41xx/common/irq.c index 965f3d6312b..4733c534446 100644 --- a/arch/mips/vr41xx/common/irq.c +++ b/arch/mips/vr41xx/common/irq.c @@ -22,7 +22,7 @@ #include #include -#include +#include typedef struct irq_cascade { int (*get_irq)(unsigned int, struct pt_regs *); diff --git a/arch/mips/vr41xx/common/vrc4173.c b/arch/mips/vr41xx/common/vrc4173.c index 4720a994dc1..3f1ae9721e4 100644 --- a/arch/mips/vr41xx/common/vrc4173.c +++ b/arch/mips/vr41xx/common/vrc4173.c @@ -28,6 +28,7 @@ #include #include +#include #include #include diff --git a/drivers/char/vr41xx_giu.c b/drivers/char/vr41xx_giu.c index 1b9b1f1d4c4..8116a47b80f 100644 --- a/drivers/char/vr41xx_giu.c +++ b/drivers/char/vr41xx_giu.c @@ -33,6 +33,7 @@ #include #include #include +#include #include MODULE_AUTHOR("Yoichi Yuasa "); diff --git a/drivers/rtc/rtc-vr41xx.c b/drivers/rtc/rtc-vr41xx.c index bb6d5ff24fd..596764fd29f 100644 --- a/drivers/rtc/rtc-vr41xx.c +++ b/drivers/rtc/rtc-vr41xx.c @@ -30,7 +30,7 @@ #include #include #include -#include +#include MODULE_AUTHOR("Yoichi Yuasa "); MODULE_DESCRIPTION("NEC VR4100 series RTC driver"); diff --git a/drivers/serial/vr41xx_siu.c b/drivers/serial/vr41xx_siu.c index e93d0edc2e0..6c8b0ea83c3 100644 --- a/drivers/serial/vr41xx_siu.c +++ b/drivers/serial/vr41xx_siu.c @@ -38,6 +38,7 @@ #include #include +#include #include #include diff --git a/include/asm-mips/vr41xx/capcella.h b/include/asm-mips/vr41xx/capcella.h index d10ffda50de..e0ee05a3dfc 100644 --- a/include/asm-mips/vr41xx/capcella.h +++ b/include/asm-mips/vr41xx/capcella.h @@ -20,7 +20,7 @@ #ifndef __ZAO_CAPCELLA_H #define __ZAO_CAPCELLA_H -#include +#include /* * General-Purpose I/O Pin Number diff --git a/include/asm-mips/vr41xx/cmbvr4133.h b/include/asm-mips/vr41xx/cmbvr4133.h index 3fbfde19c80..9490ade58b4 100644 --- a/include/asm-mips/vr41xx/cmbvr4133.h +++ b/include/asm-mips/vr41xx/cmbvr4133.h @@ -15,8 +15,7 @@ #ifndef __NEC_CMBVR4133_H #define __NEC_CMBVR4133_H -#include -#include +#include /* * General-Purpose I/O Pin Number diff --git a/include/asm-mips/vr41xx/irq.h b/include/asm-mips/vr41xx/irq.h new file mode 100644 index 00000000000..d315dfbc08f --- /dev/null +++ b/include/asm-mips/vr41xx/irq.h @@ -0,0 +1,101 @@ +/* + * include/asm-mips/vr41xx/irq.h + * + * Interrupt numbers for NEC VR4100 series. + * + * Copyright (C) 1999 Michael Klar + * Copyright (C) 2001, 2002 Paul Mundt + * Copyright (C) 2002 MontaVista Software, Inc. + * Copyright (C) 2002 TimeSys Corp. + * Copyright (C) 2003-2006 Yoichi Yuasa + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ +#ifndef __NEC_VR41XX_IRQ_H +#define __NEC_VR41XX_IRQ_H + +/* + * CPU core Interrupt Numbers + */ +#define MIPS_CPU_IRQ_BASE 0 +#define MIPS_CPU_IRQ(x) (MIPS_CPU_IRQ_BASE + (x)) +#define MIPS_SOFTINT0_IRQ MIPS_CPU_IRQ(0) +#define MIPS_SOFTINT1_IRQ MIPS_CPU_IRQ(1) +#define INT0_IRQ MIPS_CPU_IRQ(2) +#define INT1_IRQ MIPS_CPU_IRQ(3) +#define INT2_IRQ MIPS_CPU_IRQ(4) +#define INT3_IRQ MIPS_CPU_IRQ(5) +#define INT4_IRQ MIPS_CPU_IRQ(6) +#define TIMER_IRQ MIPS_CPU_IRQ(7) + +/* + * SYINT1 Interrupt Numbers + */ +#define SYSINT1_IRQ_BASE 8 +#define SYSINT1_IRQ(x) (SYSINT1_IRQ_BASE + (x)) +#define BATTRY_IRQ SYSINT1_IRQ(0) +#define POWER_IRQ SYSINT1_IRQ(1) +#define RTCLONG1_IRQ SYSINT1_IRQ(2) +#define ELAPSEDTIME_IRQ SYSINT1_IRQ(3) +/* RFU */ +#define PIU_IRQ SYSINT1_IRQ(5) +#define AIU_IRQ SYSINT1_IRQ(6) +#define KIU_IRQ SYSINT1_IRQ(7) +#define GIUINT_IRQ SYSINT1_IRQ(8) +#define SIU_IRQ SYSINT1_IRQ(9) +#define BUSERR_IRQ SYSINT1_IRQ(10) +#define SOFTINT_IRQ SYSINT1_IRQ(11) +#define CLKRUN_IRQ SYSINT1_IRQ(12) +#define DOZEPIU_IRQ SYSINT1_IRQ(13) +#define SYSINT1_IRQ_LAST DOZEPIU_IRQ + +/* + * SYSINT2 Interrupt Numbers + */ +#define SYSINT2_IRQ_BASE 24 +#define SYSINT2_IRQ(x) (SYSINT2_IRQ_BASE + (x)) +#define RTCLONG2_IRQ SYSINT2_IRQ(0) +#define LED_IRQ SYSINT2_IRQ(1) +#define HSP_IRQ SYSINT2_IRQ(2) +#define TCLOCK_IRQ SYSINT2_IRQ(3) +#define FIR_IRQ SYSINT2_IRQ(4) +#define CEU_IRQ SYSINT2_IRQ(4) /* same number as FIR_IRQ */ +#define DSIU_IRQ SYSINT2_IRQ(5) +#define PCI_IRQ SYSINT2_IRQ(6) +#define SCU_IRQ SYSINT2_IRQ(7) +#define CSI_IRQ SYSINT2_IRQ(8) +#define BCU_IRQ SYSINT2_IRQ(9) +#define ETHERNET_IRQ SYSINT2_IRQ(10) +#define SYSINT2_IRQ_LAST ETHERNET_IRQ + +/* + * GIU Interrupt Numbers + */ +#define GIU_IRQ_BASE 40 +#define GIU_IRQ(x) (GIU_IRQ_BASE + (x)) /* IRQ 40-71 */ +#define GIU_IRQ_LAST GIU_IRQ(31) + +/* + * VRC4173 Interrupt Numbers + */ +#define VRC4173_IRQ_BASE 72 +#define VRC4173_IRQ(x) (VRC4173_IRQ_BASE + (x)) +#define VRC4173_USB_IRQ VRC4173_IRQ(0) +#define VRC4173_PCMCIA2_IRQ VRC4173_IRQ(1) +#define VRC4173_PCMCIA1_IRQ VRC4173_IRQ(2) +#define VRC4173_PS2CH2_IRQ VRC4173_IRQ(3) +#define VRC4173_PS2CH1_IRQ VRC4173_IRQ(4) +#define VRC4173_PIU_IRQ VRC4173_IRQ(5) +#define VRC4173_AIU_IRQ VRC4173_IRQ(6) +#define VRC4173_KIU_IRQ VRC4173_IRQ(7) +#define VRC4173_GIU_IRQ VRC4173_IRQ(8) +#define VRC4173_AC97_IRQ VRC4173_IRQ(9) +#define VRC4173_AC97INT1_IRQ VRC4173_IRQ(10) +/* RFU */ +#define VRC4173_DOZEPIU_IRQ VRC4173_IRQ(13) +#define VRC4173_IRQ_LAST VRC4173_DOZEPIU_IRQ + +#endif /* __NEC_VR41XX_IRQ_H */ diff --git a/include/asm-mips/vr41xx/mpc30x.h b/include/asm-mips/vr41xx/mpc30x.h index a6cbe4da666..1d67df843dc 100644 --- a/include/asm-mips/vr41xx/mpc30x.h +++ b/include/asm-mips/vr41xx/mpc30x.h @@ -20,7 +20,7 @@ #ifndef __VICTOR_MPC30X_H #define __VICTOR_MPC30X_H -#include +#include /* * General-Purpose I/O Pin Number diff --git a/include/asm-mips/vr41xx/tb0219.h b/include/asm-mips/vr41xx/tb0219.h index b318b9612a8..dc981b4be0a 100644 --- a/include/asm-mips/vr41xx/tb0219.h +++ b/include/asm-mips/vr41xx/tb0219.h @@ -23,7 +23,7 @@ #ifndef __TANBAC_TB0219_H #define __TANBAC_TB0219_H -#include +#include /* * General-Purpose I/O Pin Number diff --git a/include/asm-mips/vr41xx/tb0226.h b/include/asm-mips/vr41xx/tb0226.h index 2513f450e2d..de527dcfa5f 100644 --- a/include/asm-mips/vr41xx/tb0226.h +++ b/include/asm-mips/vr41xx/tb0226.h @@ -20,7 +20,7 @@ #ifndef __TANBAC_TB0226_H #define __TANBAC_TB0226_H -#include +#include /* * General-Purpose I/O Pin Number diff --git a/include/asm-mips/vr41xx/tb0287.h b/include/asm-mips/vr41xx/tb0287.h index dd9832313af..61bead68abf 100644 --- a/include/asm-mips/vr41xx/tb0287.h +++ b/include/asm-mips/vr41xx/tb0287.h @@ -22,7 +22,7 @@ #ifndef __TANBAC_TB0287_H #define __TANBAC_TB0287_H -#include +#include /* * General-Purpose I/O Pin Number diff --git a/include/asm-mips/vr41xx/vr41xx.h b/include/asm-mips/vr41xx/vr41xx.h index 70828d5fae9..dd3eb3dc588 100644 --- a/include/asm-mips/vr41xx/vr41xx.h +++ b/include/asm-mips/vr41xx/vr41xx.h @@ -74,59 +74,6 @@ extern void vr41xx_mask_clock(vr41xx_clock_t clock); /* * Interrupt Control Unit */ -/* CPU core Interrupt Numbers */ -#define MIPS_CPU_IRQ_BASE 0 -#define MIPS_CPU_IRQ(x) (MIPS_CPU_IRQ_BASE + (x)) -#define MIPS_SOFTINT0_IRQ MIPS_CPU_IRQ(0) -#define MIPS_SOFTINT1_IRQ MIPS_CPU_IRQ(1) -#define INT0_IRQ MIPS_CPU_IRQ(2) -#define INT1_IRQ MIPS_CPU_IRQ(3) -#define INT2_IRQ MIPS_CPU_IRQ(4) -#define INT3_IRQ MIPS_CPU_IRQ(5) -#define INT4_IRQ MIPS_CPU_IRQ(6) -#define TIMER_IRQ MIPS_CPU_IRQ(7) - -/* SYINT1 Interrupt Numbers */ -#define SYSINT1_IRQ_BASE 8 -#define SYSINT1_IRQ(x) (SYSINT1_IRQ_BASE + (x)) -#define BATTRY_IRQ SYSINT1_IRQ(0) -#define POWER_IRQ SYSINT1_IRQ(1) -#define RTCLONG1_IRQ SYSINT1_IRQ(2) -#define ELAPSEDTIME_IRQ SYSINT1_IRQ(3) -/* RFU */ -#define PIU_IRQ SYSINT1_IRQ(5) -#define AIU_IRQ SYSINT1_IRQ(6) -#define KIU_IRQ SYSINT1_IRQ(7) -#define GIUINT_IRQ SYSINT1_IRQ(8) -#define SIU_IRQ SYSINT1_IRQ(9) -#define BUSERR_IRQ SYSINT1_IRQ(10) -#define SOFTINT_IRQ SYSINT1_IRQ(11) -#define CLKRUN_IRQ SYSINT1_IRQ(12) -#define DOZEPIU_IRQ SYSINT1_IRQ(13) -#define SYSINT1_IRQ_LAST DOZEPIU_IRQ - -/* SYSINT2 Interrupt Numbers */ -#define SYSINT2_IRQ_BASE 24 -#define SYSINT2_IRQ(x) (SYSINT2_IRQ_BASE + (x)) -#define RTCLONG2_IRQ SYSINT2_IRQ(0) -#define LED_IRQ SYSINT2_IRQ(1) -#define HSP_IRQ SYSINT2_IRQ(2) -#define TCLOCK_IRQ SYSINT2_IRQ(3) -#define FIR_IRQ SYSINT2_IRQ(4) -#define CEU_IRQ SYSINT2_IRQ(4) /* same number as FIR_IRQ */ -#define DSIU_IRQ SYSINT2_IRQ(5) -#define PCI_IRQ SYSINT2_IRQ(6) -#define SCU_IRQ SYSINT2_IRQ(7) -#define CSI_IRQ SYSINT2_IRQ(8) -#define BCU_IRQ SYSINT2_IRQ(9) -#define ETHERNET_IRQ SYSINT2_IRQ(10) -#define SYSINT2_IRQ_LAST ETHERNET_IRQ - -/* GIU Interrupt Numbers */ -#define GIU_IRQ_BASE 40 -#define GIU_IRQ(x) (GIU_IRQ_BASE + (x)) /* IRQ 40-71 */ -#define GIU_IRQ_LAST GIU_IRQ(31) - extern int vr41xx_set_intassign(unsigned int irq, unsigned char intassign); extern int cascade_irq(unsigned int irq, int (*get_irq)(unsigned int, struct pt_regs *)); diff --git a/include/asm-mips/vr41xx/vrc4173.h b/include/asm-mips/vr41xx/vrc4173.h index 96fdcd54cec..e5e6ad1d2f8 100644 --- a/include/asm-mips/vr41xx/vrc4173.h +++ b/include/asm-mips/vr41xx/vrc4173.h @@ -26,26 +26,6 @@ #include -/* - * Interrupt Number - */ -#define VRC4173_IRQ_BASE 72 -#define VRC4173_IRQ(x) (VRC4173_IRQ_BASE + (x)) -#define VRC4173_USB_IRQ VRC4173_IRQ(0) -#define VRC4173_PCMCIA2_IRQ VRC4173_IRQ(1) -#define VRC4173_PCMCIA1_IRQ VRC4173_IRQ(2) -#define VRC4173_PS2CH2_IRQ VRC4173_IRQ(3) -#define VRC4173_PS2CH1_IRQ VRC4173_IRQ(4) -#define VRC4173_PIU_IRQ VRC4173_IRQ(5) -#define VRC4173_AIU_IRQ VRC4173_IRQ(6) -#define VRC4173_KIU_IRQ VRC4173_IRQ(7) -#define VRC4173_GIU_IRQ VRC4173_IRQ(8) -#define VRC4173_AC97_IRQ VRC4173_IRQ(9) -#define VRC4173_AC97INT1_IRQ VRC4173_IRQ(10) -/* RFU */ -#define VRC4173_DOZEPIU_IRQ VRC4173_IRQ(13) -#define VRC4173_IRQ_LAST VRC4173_DOZEPIU_IRQ - /* * PCI I/O accesses */ -- cgit v1.2.3-70-g09d2 From efcb487a8e9a86874cf63c3fbf6c85bbf87e6d87 Mon Sep 17 00:00:00 2001 From: Yoichi Yuasa Date: Thu, 13 Jul 2006 17:33:14 +0900 Subject: [MIPS] vr41xx: Removed old v2.4 VRC4173 driver Signed-off-by: Yoichi Yuasa Signed-off-by: Ralf Baechle --- arch/mips/vr41xx/Kconfig | 6 - arch/mips/vr41xx/common/Makefile | 3 +- arch/mips/vr41xx/common/vrc4173.c | 582 -------------------------------------- include/asm-mips/vr41xx/vrc4173.h | 201 ------------- 4 files changed, 1 insertion(+), 791 deletions(-) delete mode 100644 arch/mips/vr41xx/common/vrc4173.c delete mode 100644 include/asm-mips/vr41xx/vrc4173.h (limited to 'include') diff --git a/arch/mips/vr41xx/Kconfig b/arch/mips/vr41xx/Kconfig index 6046ef23b2b..92f41f6f934 100644 --- a/arch/mips/vr41xx/Kconfig +++ b/arch/mips/vr41xx/Kconfig @@ -86,9 +86,3 @@ config PCI_VR41XX depends on MACH_VR41XX && HW_HAS_PCI default y select PCI - -config VRC4173 - tristate "Add NEC VRC4173 companion chip support" - depends on MACH_VR41XX && PCI_VR41XX - help - The NEC VRC4173 is a companion chip for NEC VR4122/VR4131. diff --git a/arch/mips/vr41xx/common/Makefile b/arch/mips/vr41xx/common/Makefile index aa373974c80..975d5caf9d1 100644 --- a/arch/mips/vr41xx/common/Makefile +++ b/arch/mips/vr41xx/common/Makefile @@ -2,7 +2,6 @@ # Makefile for common code of the NEC VR4100 series. # -obj-y += bcu.o cmu.o icu.o init.o irq.o pmu.o type.o -obj-$(CONFIG_VRC4173) += vrc4173.o +obj-y += bcu.o cmu.o icu.o init.o irq.o pmu.o type.o EXTRA_AFLAGS := $(CFLAGS) diff --git a/arch/mips/vr41xx/common/vrc4173.c b/arch/mips/vr41xx/common/vrc4173.c deleted file mode 100644 index 3f1ae9721e4..00000000000 --- a/arch/mips/vr41xx/common/vrc4173.c +++ /dev/null @@ -1,582 +0,0 @@ -/* - * vrc4173.c, NEC VRC4173 base driver for NEC VR4122/VR4131. - * - * Copyright (C) 2001-2003 MontaVista Software Inc. - * Author: Yoichi Yuasa - * Copyright (C) 2004 Yoichi Yuasa - * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -MODULE_DESCRIPTION("NEC VRC4173 base driver for NEC VR4122/4131"); -MODULE_AUTHOR("Yoichi Yuasa "); -MODULE_LICENSE("GPL"); - -#define VRC4173_CMUCLKMSK 0x040 - #define MSKPIU 0x0001 - #define MSKKIU 0x0002 - #define MSKAIU 0x0004 - #define MSKPS2CH1 0x0008 - #define MSKPS2CH2 0x0010 - #define MSKUSB 0x0020 - #define MSKCARD1 0x0040 - #define MSKCARD2 0x0080 - #define MSKAC97 0x0100 - #define MSK48MUSB 0x0400 - #define MSK48MPIN 0x0800 - #define MSK48MOSC 0x1000 -#define VRC4173_CMUSRST 0x042 - #define USBRST 0x0001 - #define CARD1RST 0x0002 - #define CARD2RST 0x0004 - #define AC97RST 0x0008 - -#define VRC4173_SYSINT1REG 0x060 -#define VRC4173_MSYSINT1REG 0x06c -#define VRC4173_MPIUINTREG 0x06e -#define VRC4173_MAIUINTREG 0x070 -#define VRC4173_MKIUINTREG 0x072 - -#define VRC4173_SELECTREG 0x09e - #define SEL3 0x0008 - #define SEL2 0x0004 - #define SEL1 0x0002 - #define SEL0 0x0001 - -static struct pci_device_id vrc4173_id_table[] __devinitdata = { - { .vendor = PCI_VENDOR_ID_NEC, - .device = PCI_DEVICE_ID_NEC_VRC4173, - .subvendor = PCI_ANY_ID, - .subdevice = PCI_ANY_ID, }, - { .vendor = 0, }, -}; - -unsigned long vrc4173_io_offset = 0; - -EXPORT_SYMBOL(vrc4173_io_offset); - -static int vrc4173_initialized; -static uint16_t vrc4173_cmuclkmsk; -static uint16_t vrc4173_selectreg; -static DEFINE_SPINLOCK(vrc4173_cmu_lock); -static DEFINE_SPINLOCK(vrc4173_giu_lock); - -static inline void set_cmusrst(uint16_t val) -{ - uint16_t cmusrst; - - cmusrst = vrc4173_inw(VRC4173_CMUSRST); - cmusrst |= val; - vrc4173_outw(cmusrst, VRC4173_CMUSRST); -} - -static inline void clear_cmusrst(uint16_t val) -{ - uint16_t cmusrst; - - cmusrst = vrc4173_inw(VRC4173_CMUSRST); - cmusrst &= ~val; - vrc4173_outw(cmusrst, VRC4173_CMUSRST); -} - -void vrc4173_supply_clock(vrc4173_clock_t clock) -{ - if (vrc4173_initialized) { - spin_lock_irq(&vrc4173_cmu_lock); - - switch (clock) { - case VRC4173_PIU_CLOCK: - vrc4173_cmuclkmsk |= MSKPIU; - break; - case VRC4173_KIU_CLOCK: - vrc4173_cmuclkmsk |= MSKKIU; - break; - case VRC4173_AIU_CLOCK: - vrc4173_cmuclkmsk |= MSKAIU; - break; - case VRC4173_PS2_CH1_CLOCK: - vrc4173_cmuclkmsk |= MSKPS2CH1; - break; - case VRC4173_PS2_CH2_CLOCK: - vrc4173_cmuclkmsk |= MSKPS2CH2; - break; - case VRC4173_USBU_PCI_CLOCK: - set_cmusrst(USBRST); - vrc4173_cmuclkmsk |= MSKUSB; - break; - case VRC4173_CARDU1_PCI_CLOCK: - set_cmusrst(CARD1RST); - vrc4173_cmuclkmsk |= MSKCARD1; - break; - case VRC4173_CARDU2_PCI_CLOCK: - set_cmusrst(CARD2RST); - vrc4173_cmuclkmsk |= MSKCARD2; - break; - case VRC4173_AC97U_PCI_CLOCK: - set_cmusrst(AC97RST); - vrc4173_cmuclkmsk |= MSKAC97; - break; - case VRC4173_USBU_48MHz_CLOCK: - set_cmusrst(USBRST); - vrc4173_cmuclkmsk |= MSK48MUSB; - break; - case VRC4173_EXT_48MHz_CLOCK: - if (vrc4173_cmuclkmsk & MSK48MOSC) - vrc4173_cmuclkmsk |= MSK48MPIN; - else - printk(KERN_WARNING - "vrc4173_supply_clock: " - "Please supply VRC4173_48MHz_CLOCK first " - "rather than VRC4173_EXT_48MHz_CLOCK.\n"); - break; - case VRC4173_48MHz_CLOCK: - vrc4173_cmuclkmsk |= MSK48MOSC; - break; - default: - printk(KERN_WARNING - "vrc4173_supply_clock: Invalid CLOCK value %u\n", clock); - break; - } - - vrc4173_outw(vrc4173_cmuclkmsk, VRC4173_CMUCLKMSK); - - switch (clock) { - case VRC4173_USBU_PCI_CLOCK: - case VRC4173_USBU_48MHz_CLOCK: - clear_cmusrst(USBRST); - break; - case VRC4173_CARDU1_PCI_CLOCK: - clear_cmusrst(CARD1RST); - break; - case VRC4173_CARDU2_PCI_CLOCK: - clear_cmusrst(CARD2RST); - break; - case VRC4173_AC97U_PCI_CLOCK: - clear_cmusrst(AC97RST); - break; - default: - break; - } - - spin_unlock_irq(&vrc4173_cmu_lock); - } -} - -EXPORT_SYMBOL(vrc4173_supply_clock); - -void vrc4173_mask_clock(vrc4173_clock_t clock) -{ - if (vrc4173_initialized) { - spin_lock_irq(&vrc4173_cmu_lock); - - switch (clock) { - case VRC4173_PIU_CLOCK: - vrc4173_cmuclkmsk &= ~MSKPIU; - break; - case VRC4173_KIU_CLOCK: - vrc4173_cmuclkmsk &= ~MSKKIU; - break; - case VRC4173_AIU_CLOCK: - vrc4173_cmuclkmsk &= ~MSKAIU; - break; - case VRC4173_PS2_CH1_CLOCK: - vrc4173_cmuclkmsk &= ~MSKPS2CH1; - break; - case VRC4173_PS2_CH2_CLOCK: - vrc4173_cmuclkmsk &= ~MSKPS2CH2; - break; - case VRC4173_USBU_PCI_CLOCK: - set_cmusrst(USBRST); - vrc4173_cmuclkmsk &= ~MSKUSB; - break; - case VRC4173_CARDU1_PCI_CLOCK: - set_cmusrst(CARD1RST); - vrc4173_cmuclkmsk &= ~MSKCARD1; - break; - case VRC4173_CARDU2_PCI_CLOCK: - set_cmusrst(CARD2RST); - vrc4173_cmuclkmsk &= ~MSKCARD2; - break; - case VRC4173_AC97U_PCI_CLOCK: - set_cmusrst(AC97RST); - vrc4173_cmuclkmsk &= ~MSKAC97; - break; - case VRC4173_USBU_48MHz_CLOCK: - set_cmusrst(USBRST); - vrc4173_cmuclkmsk &= ~MSK48MUSB; - break; - case VRC4173_EXT_48MHz_CLOCK: - vrc4173_cmuclkmsk &= ~MSK48MPIN; - break; - case VRC4173_48MHz_CLOCK: - vrc4173_cmuclkmsk &= ~MSK48MOSC; - break; - default: - printk(KERN_WARNING "vrc4173_mask_clock: Invalid CLOCK value %u\n", clock); - break; - } - - vrc4173_outw(vrc4173_cmuclkmsk, VRC4173_CMUCLKMSK); - - switch (clock) { - case VRC4173_USBU_PCI_CLOCK: - case VRC4173_USBU_48MHz_CLOCK: - clear_cmusrst(USBRST); - break; - case VRC4173_CARDU1_PCI_CLOCK: - clear_cmusrst(CARD1RST); - break; - case VRC4173_CARDU2_PCI_CLOCK: - clear_cmusrst(CARD2RST); - break; - case VRC4173_AC97U_PCI_CLOCK: - clear_cmusrst(AC97RST); - break; - default: - break; - } - - spin_unlock_irq(&vrc4173_cmu_lock); - } -} - -EXPORT_SYMBOL(vrc4173_mask_clock); - -static inline void vrc4173_cmu_init(void) -{ - vrc4173_cmuclkmsk = vrc4173_inw(VRC4173_CMUCLKMSK); - - spin_lock_init(&vrc4173_cmu_lock); -} - -void vrc4173_select_function(vrc4173_function_t function) -{ - if (vrc4173_initialized) { - spin_lock_irq(&vrc4173_giu_lock); - - switch(function) { - case PS2_CHANNEL1: - vrc4173_selectreg |= SEL2; - break; - case PS2_CHANNEL2: - vrc4173_selectreg |= SEL1; - break; - case TOUCHPANEL: - vrc4173_selectreg &= SEL2 | SEL1 | SEL0; - break; - case KEYBOARD_8SCANLINES: - vrc4173_selectreg &= SEL3 | SEL2 | SEL1; - break; - case KEYBOARD_10SCANLINES: - vrc4173_selectreg &= SEL3 | SEL2; - break; - case KEYBOARD_12SCANLINES: - vrc4173_selectreg &= SEL3; - break; - case GPIO_0_15PINS: - vrc4173_selectreg |= SEL0; - break; - case GPIO_16_20PINS: - vrc4173_selectreg |= SEL3; - break; - } - - vrc4173_outw(vrc4173_selectreg, VRC4173_SELECTREG); - - spin_unlock_irq(&vrc4173_giu_lock); - } -} - -EXPORT_SYMBOL(vrc4173_select_function); - -static inline void vrc4173_giu_init(void) -{ - vrc4173_selectreg = vrc4173_inw(VRC4173_SELECTREG); - - spin_lock_init(&vrc4173_giu_lock); -} - -void vrc4173_enable_piuint(uint16_t mask) -{ - struct irq_desc *desc = irq_desc + VRC4173_PIU_IRQ; - unsigned long flags; - uint16_t val; - - spin_lock_irqsave(&desc->lock, flags); - val = vrc4173_inw(VRC4173_MPIUINTREG); - val |= mask; - vrc4173_outw(val, VRC4173_MPIUINTREG); - spin_unlock_irqrestore(&desc->lock, flags); -} - -EXPORT_SYMBOL(vrc4173_enable_piuint); - -void vrc4173_disable_piuint(uint16_t mask) -{ - struct irq_desc *desc = irq_desc + VRC4173_PIU_IRQ; - unsigned long flags; - uint16_t val; - - spin_lock_irqsave(&desc->lock, flags); - val = vrc4173_inw(VRC4173_MPIUINTREG); - val &= ~mask; - vrc4173_outw(val, VRC4173_MPIUINTREG); - spin_unlock_irqrestore(&desc->lock, flags); -} - -EXPORT_SYMBOL(vrc4173_disable_piuint); - -void vrc4173_enable_aiuint(uint16_t mask) -{ - struct irq_desc *desc = irq_desc + VRC4173_AIU_IRQ; - unsigned long flags; - uint16_t val; - - spin_lock_irqsave(&desc->lock, flags); - val = vrc4173_inw(VRC4173_MAIUINTREG); - val |= mask; - vrc4173_outw(val, VRC4173_MAIUINTREG); - spin_unlock_irqrestore(&desc->lock, flags); -} - -EXPORT_SYMBOL(vrc4173_enable_aiuint); - -void vrc4173_disable_aiuint(uint16_t mask) -{ - struct irq_desc *desc = irq_desc + VRC4173_AIU_IRQ; - unsigned long flags; - uint16_t val; - - spin_lock_irqsave(&desc->lock, flags); - val = vrc4173_inw(VRC4173_MAIUINTREG); - val &= ~mask; - vrc4173_outw(val, VRC4173_MAIUINTREG); - spin_unlock_irqrestore(&desc->lock, flags); -} - -EXPORT_SYMBOL(vrc4173_disable_aiuint); - -void vrc4173_enable_kiuint(uint16_t mask) -{ - struct irq_desc *desc = irq_desc + VRC4173_KIU_IRQ; - unsigned long flags; - uint16_t val; - - spin_lock_irqsave(&desc->lock, flags); - val = vrc4173_inw(VRC4173_MKIUINTREG); - val |= mask; - vrc4173_outw(val, VRC4173_MKIUINTREG); - spin_unlock_irqrestore(&desc->lock, flags); -} - -EXPORT_SYMBOL(vrc4173_enable_kiuint); - -void vrc4173_disable_kiuint(uint16_t mask) -{ - struct irq_desc *desc = irq_desc + VRC4173_KIU_IRQ; - unsigned long flags; - uint16_t val; - - spin_lock_irqsave(&desc->lock, flags); - val = vrc4173_inw(VRC4173_MKIUINTREG); - val &= ~mask; - vrc4173_outw(val, VRC4173_MKIUINTREG); - spin_unlock_irqrestore(&desc->lock, flags); -} - -EXPORT_SYMBOL(vrc4173_disable_kiuint); - -static void enable_vrc4173_irq(unsigned int irq) -{ - uint16_t val; - - val = vrc4173_inw(VRC4173_MSYSINT1REG); - val |= (uint16_t)1 << (irq - VRC4173_IRQ_BASE); - vrc4173_outw(val, VRC4173_MSYSINT1REG); -} - -static void disable_vrc4173_irq(unsigned int irq) -{ - uint16_t val; - - val = vrc4173_inw(VRC4173_MSYSINT1REG); - val &= ~((uint16_t)1 << (irq - VRC4173_IRQ_BASE)); - vrc4173_outw(val, VRC4173_MSYSINT1REG); -} - -static unsigned int startup_vrc4173_irq(unsigned int irq) -{ - enable_vrc4173_irq(irq); - return 0; /* never anything pending */ -} - -#define shutdown_vrc4173_irq disable_vrc4173_irq -#define ack_vrc4173_irq disable_vrc4173_irq - -static void end_vrc4173_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) - enable_vrc4173_irq(irq); -} - -static struct irq_chip vrc4173_irq_type = { - .typename = "VRC4173", - .startup = startup_vrc4173_irq, - .shutdown = shutdown_vrc4173_irq, - .enable = enable_vrc4173_irq, - .disable = disable_vrc4173_irq, - .ack = ack_vrc4173_irq, - .end = end_vrc4173_irq, -}; - -static int vrc4173_get_irq_number(int irq) -{ - uint16_t status, mask; - int i; - - status = vrc4173_inw(VRC4173_SYSINT1REG); - mask = vrc4173_inw(VRC4173_MSYSINT1REG); - - status &= mask; - if (status) { - for (i = 0; i < 16; i++) - if (status & (0x0001 << i)) - return VRC4173_IRQ(i); - } - - return -EINVAL; -} - -static inline int vrc4173_icu_init(int cascade_irq) -{ - int i; - - if (cascade_irq < GIU_IRQ(0) || cascade_irq > GIU_IRQ(15)) - return -EINVAL; - - vrc4173_outw(0, VRC4173_MSYSINT1REG); - - vr41xx_set_irq_trigger(GIU_IRQ_TO_PIN(cascade_irq), TRIGGER_LEVEL, SIGNAL_THROUGH); - vr41xx_set_irq_level(GIU_IRQ_TO_PIN(cascade_irq), LEVEL_LOW); - - for (i = VRC4173_IRQ_BASE; i <= VRC4173_IRQ_LAST; i++) - irq_desc[i].chip = &vrc4173_irq_type; - - return 0; -} - -static int __devinit vrc4173_probe(struct pci_dev *dev, - const struct pci_device_id *id) -{ - unsigned long start, flags; - int err; - - err = pci_enable_device(dev); - if (err < 0) { - printk(KERN_ERR "vrc4173: Failed to enable PCI device, aborting\n"); - return err; - } - - pci_set_master(dev); - - start = pci_resource_start(dev, 0); - if (start == 0) { - printk(KERN_ERR "vrc4173:No such PCI I/O resource, aborting\n"); - return -ENXIO; - } - - flags = pci_resource_flags(dev, 0); - if ((flags & IORESOURCE_IO) == 0) { - printk(KERN_ERR "vrc4173: No such PCI I/O resource, aborting\n"); - return -ENXIO; - } - - err = pci_request_regions(dev, "NEC VRC4173"); - if (err < 0) { - printk(KERN_ERR "vrc4173: PCI resources are busy, aborting\n"); - return err; - } - - set_vrc4173_io_offset(start); - - vrc4173_cmu_init(); - vrc4173_giu_init(); - - err = vrc4173_icu_init(dev->irq); - if (err < 0) { - printk(KERN_ERR "vrc4173: Invalid IRQ %d, aborting\n", dev->irq); - return err; - } - - err = vr41xx_cascade_irq(dev->irq, vrc4173_get_irq_number); - if (err < 0) { - printk(KERN_ERR "vrc4173: IRQ resource %d is busy, aborting\n", dev->irq); - return err; - } - - printk(KERN_INFO - "NEC VRC4173 at 0x%#08lx, IRQ is cascaded to %d\n", start, dev->irq); - - return 0; -} - -static void vrc4173_remove(struct pci_dev *dev) -{ - free_irq(dev->irq, NULL); - - pci_release_regions(dev); -} - -static struct pci_driver vrc4173_driver = { - .name = "NEC VRC4173", - .probe = vrc4173_probe, - .remove = vrc4173_remove, - .id_table = vrc4173_id_table, -}; - -static int __devinit vrc4173_init(void) -{ - int err; - - err = pci_register_driver(&vrc4173_driver); - if (err < 0) - return err; - - vrc4173_initialized = 1; - - return 0; -} - -static void __devexit vrc4173_exit(void) -{ - vrc4173_initialized = 0; - - pci_unregister_driver(&vrc4173_driver); -} - -module_init(vrc4173_init); -module_exit(vrc4173_exit); diff --git a/include/asm-mips/vr41xx/vrc4173.h b/include/asm-mips/vr41xx/vrc4173.h deleted file mode 100644 index e5e6ad1d2f8..00000000000 --- a/include/asm-mips/vr41xx/vrc4173.h +++ /dev/null @@ -1,201 +0,0 @@ -/* - * vrc4173.h, Include file for NEC VRC4173. - * - * Copyright (C) 2000 Michael R. McDonald - * Copyright (C) 2001-2003 Montavista Software Inc. - * Author: Yoichi Yuasa - * Copyright (C) 2004 Yoichi Yuasa - * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __NEC_VRC4173_H -#define __NEC_VRC4173_H - -#include - -/* - * PCI I/O accesses - */ -#ifdef CONFIG_VRC4173 - -extern unsigned long vrc4173_io_offset; - -#define set_vrc4173_io_offset(offset) do { vrc4173_io_offset = (offset); } while (0) - -#define vrc4173_outb(val,port) outb((val), vrc4173_io_offset+(port)) -#define vrc4173_outw(val,port) outw((val), vrc4173_io_offset+(port)) -#define vrc4173_outl(val,port) outl((val), vrc4173_io_offset+(port)) -#define vrc4173_outb_p(val,port) outb_p((val), vrc4173_io_offset+(port)) -#define vrc4173_outw_p(val,port) outw_p((val), vrc4173_io_offset+(port)) -#define vrc4173_outl_p(val,port) outl_p((val), vrc4173_io_offset+(port)) - -#define vrc4173_inb(port) inb(vrc4173_io_offset+(port)) -#define vrc4173_inw(port) inw(vrc4173_io_offset+(port)) -#define vrc4173_inl(port) inl(vrc4173_io_offset+(port)) -#define vrc4173_inb_p(port) inb_p(vrc4173_io_offset+(port)) -#define vrc4173_inw_p(port) inw_p(vrc4173_io_offset+(port)) -#define vrc4173_inl_p(port) inl_p(vrc4173_io_offset+(port)) - -#define vrc4173_outsb(port,addr,count) outsb(vrc4173_io_offset+(port),(addr),(count)) -#define vrc4173_outsw(port,addr,count) outsw(vrc4173_io_offset+(port),(addr),(count)) -#define vrc4173_outsl(port,addr,count) outsl(vrc4173_io_offset+(port),(addr),(count)) - -#define vrc4173_insb(port,addr,count) insb(vrc4173_io_offset+(port),(addr),(count)) -#define vrc4173_insw(port,addr,count) insw(vrc4173_io_offset+(port),(addr),(count)) -#define vrc4173_insl(port,addr,count) insl(vrc4173_io_offset+(port),(addr),(count)) - -#else - -#define set_vrc4173_io_offset(offset) do {} while (0) - -#define vrc4173_outb(val,port) do {} while (0) -#define vrc4173_outw(val,port) do {} while (0) -#define vrc4173_outl(val,port) do {} while (0) -#define vrc4173_outb_p(val,port) do {} while (0) -#define vrc4173_outw_p(val,port) do {} while (0) -#define vrc4173_outl_p(val,port) do {} while (0) - -#define vrc4173_inb(port) 0 -#define vrc4173_inw(port) 0 -#define vrc4173_inl(port) 0 -#define vrc4173_inb_p(port) 0 -#define vrc4173_inw_p(port) 0 -#define vrc4173_inl_p(port) 0 - -#define vrc4173_outsb(port,addr,count) do {} while (0) -#define vrc4173_outsw(port,addr,count) do {} while (0) -#define vrc4173_outsl(port,addr,count) do {} while (0) - -#define vrc4173_insb(port,addr,count) do {} while (0) -#define vrc4173_insw(port,addr,count) do {} while (0) -#define vrc4173_insl(port,addr,count) do {} while (0) - -#endif - -/* - * Clock Mask Unit - */ -typedef enum vrc4173_clock { - VRC4173_PIU_CLOCK, - VRC4173_KIU_CLOCK, - VRC4173_AIU_CLOCK, - VRC4173_PS2_CH1_CLOCK, - VRC4173_PS2_CH2_CLOCK, - VRC4173_USBU_PCI_CLOCK, - VRC4173_CARDU1_PCI_CLOCK, - VRC4173_CARDU2_PCI_CLOCK, - VRC4173_AC97U_PCI_CLOCK, - VRC4173_USBU_48MHz_CLOCK, - VRC4173_EXT_48MHz_CLOCK, - VRC4173_48MHz_CLOCK, -} vrc4173_clock_t; - -#ifdef CONFIG_VRC4173 - -extern void vrc4173_supply_clock(vrc4173_clock_t clock); -extern void vrc4173_mask_clock(vrc4173_clock_t clock); - -#else - -static inline void vrc4173_supply_clock(vrc4173_clock_t clock) {} -static inline void vrc4173_mask_clock(vrc4173_clock_t clock) {} - -#endif - -/* - * Interupt Control Unit - */ - -#define VRC4173_PIUINT_COMMAND 0x0040 -#define VRC4173_PIUINT_DATA 0x0020 -#define VRC4173_PIUINT_PAGE1 0x0010 -#define VRC4173_PIUINT_PAGE0 0x0008 -#define VRC4173_PIUINT_DATALOST 0x0004 -#define VRC4173_PIUINT_STATUSCHANGE 0x0001 - -#ifdef CONFIG_VRC4173 - -extern void vrc4173_enable_piuint(uint16_t mask); -extern void vrc4173_disable_piuint(uint16_t mask); - -#else - -static inline void vrc4173_enable_piuint(uint16_t mask) {} -static inline void vrc4173_disable_piuint(uint16_t mask) {} - -#endif - -#define VRC4173_AIUINT_INPUT_DMAEND 0x0800 -#define VRC4173_AIUINT_INPUT_DMAHALT 0x0400 -#define VRC4173_AIUINT_INPUT_DATALOST 0x0200 -#define VRC4173_AIUINT_INPUT_DATA 0x0100 -#define VRC4173_AIUINT_OUTPUT_DMAEND 0x0008 -#define VRC4173_AIUINT_OUTPUT_DMAHALT 0x0004 -#define VRC4173_AIUINT_OUTPUT_NODATA 0x0002 - -#ifdef CONFIG_VRC4173 - -extern void vrc4173_enable_aiuint(uint16_t mask); -extern void vrc4173_disable_aiuint(uint16_t mask); - -#else - -static inline void vrc4173_enable_aiuint(uint16_t mask) {} -static inline void vrc4173_disable_aiuint(uint16_t mask) {} - -#endif - -#define VRC4173_KIUINT_DATALOST 0x0004 -#define VRC4173_KIUINT_DATAREADY 0x0002 -#define VRC4173_KIUINT_SCAN 0x0001 - -#ifdef CONFIG_VRC4173 - -extern void vrc4173_enable_kiuint(uint16_t mask); -extern void vrc4173_disable_kiuint(uint16_t mask); - -#else - -static inline void vrc4173_enable_kiuint(uint16_t mask) {} -static inline void vrc4173_disable_kiuint(uint16_t mask) {} - -#endif - -/* - * General-Purpose I/O Unit - */ -typedef enum vrc4173_function { - PS2_CHANNEL1, - PS2_CHANNEL2, - TOUCHPANEL, - KEYBOARD_8SCANLINES, - KEYBOARD_10SCANLINES, - KEYBOARD_12SCANLINES, - GPIO_0_15PINS, - GPIO_16_20PINS, -} vrc4173_function_t; - -#ifdef CONFIG_VRC4173 - -extern void vrc4173_select_function(vrc4173_function_t function); - -#else - -static inline void vrc4173_select_function(vrc4173_function_t function) {} - -#endif - -#endif /* __NEC_VRC4173_H */ -- cgit v1.2.3-70-g09d2 From f26811e0d89d412a2f5d8e16760e71d3b5c2702c Mon Sep 17 00:00:00 2001 From: Yoichi Yuasa Date: Thu, 13 Jul 2006 17:33:24 +0900 Subject: [MIPS] vr41xx: Update e55 setup function Signed-off-by: Yoichi Yuasa Signed-off-by: Ralf Baechle --- arch/mips/vr41xx/casio-e55/setup.c | 15 ++++++++----- include/asm-mips/vr41xx/e55.h | 43 -------------------------------------- 2 files changed, 10 insertions(+), 48 deletions(-) delete mode 100644 include/asm-mips/vr41xx/e55.h (limited to 'include') diff --git a/arch/mips/vr41xx/casio-e55/setup.c b/arch/mips/vr41xx/casio-e55/setup.c index 814900915c2..6d9bab89058 100644 --- a/arch/mips/vr41xx/casio-e55/setup.c +++ b/arch/mips/vr41xx/casio-e55/setup.c @@ -1,7 +1,7 @@ /* * setup.c, Setup for the CASIO CASSIOPEIA E-11/15/55/65. * - * Copyright (C) 2002-2005 Yoichi Yuasa + * Copyright (C) 2002-2006 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -21,13 +21,18 @@ #include #include -#include + +#define E55_ISA_IO_BASE 0x1400c000 +#define E55_ISA_IO_SIZE 0x03ff4000 +#define E55_ISA_IO_START 0 +#define E55_ISA_IO_END (E55_ISA_IO_SIZE - 1) +#define E55_IO_PORT_BASE KSEG1ADDR(E55_ISA_IO_BASE) static int __init casio_e55_setup(void) { - set_io_port_base(IO_PORT_BASE); - ioport_resource.start = IO_PORT_RESOURCE_START; - ioport_resource.end = IO_PORT_RESOURCE_END; + set_io_port_base(E55_IO_PORT_BASE); + ioport_resource.start = E55_ISA_IO_START; + ioport_resource.end = E55_ISA_IO_END; return 0; } diff --git a/include/asm-mips/vr41xx/e55.h b/include/asm-mips/vr41xx/e55.h deleted file mode 100644 index 558f2269bf3..00000000000 --- a/include/asm-mips/vr41xx/e55.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * e55.h, Include file for CASIO CASSIOPEIA E-10/15/55/65. - * - * Copyright (C) 2002-2004 Yoichi Yuasa - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __CASIO_E55_H -#define __CASIO_E55_H - -#include -#include - -/* - * Board specific address mapping - */ -#define VR41XX_ISA_MEM_BASE 0x10000000 -#define VR41XX_ISA_MEM_SIZE 0x04000000 - -/* VR41XX_ISA_IO_BASE includes offset from real base. */ -#define VR41XX_ISA_IO_BASE 0x1400c000 -#define VR41XX_ISA_IO_SIZE 0x03ff4000 - -#define ISA_BUS_IO_BASE 0 -#define ISA_BUS_IO_SIZE VR41XX_ISA_IO_SIZE - -#define IO_PORT_BASE KSEG1ADDR(VR41XX_ISA_IO_BASE) -#define IO_PORT_RESOURCE_START ISA_BUS_IO_BASE -#define IO_PORT_RESOURCE_END (ISA_BUS_IO_BASE + ISA_BUS_IO_SIZE - 1) - -#endif /* __CASIO_E55_H */ -- cgit v1.2.3-70-g09d2 From bddc8134db00002a9fd1b33fcb45747bdd3a2777 Mon Sep 17 00:00:00 2001 From: Yoichi Yuasa Date: Thu, 13 Jul 2006 17:33:33 +0900 Subject: [MIPS] vr41xx: Update workpad setup function Signed-off-by: Yoichi Yuasa Signed-off-by: Ralf Baechle --- arch/mips/vr41xx/ibm-workpad/setup.c | 15 ++++++++----- include/asm-mips/vr41xx/workpad.h | 43 ------------------------------------ 2 files changed, 10 insertions(+), 48 deletions(-) delete mode 100644 include/asm-mips/vr41xx/workpad.h (limited to 'include') diff --git a/arch/mips/vr41xx/ibm-workpad/setup.c b/arch/mips/vr41xx/ibm-workpad/setup.c index 50fe8af4c52..9eef297eca1 100644 --- a/arch/mips/vr41xx/ibm-workpad/setup.c +++ b/arch/mips/vr41xx/ibm-workpad/setup.c @@ -1,7 +1,7 @@ /* * setup.c, Setup for the IBM WorkPad z50. * - * Copyright (C) 2002-2005 Yoichi Yuasa + * Copyright (C) 2002-2006 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -21,13 +21,18 @@ #include #include -#include + +#define WORKPAD_ISA_IO_BASE 0x15000000 +#define WORKPAD_ISA_IO_SIZE 0x03000000 +#define WORKPAD_ISA_IO_START 0 +#define WORKPAD_ISA_IO_END (WORKPAD_ISA_IO_SIZE - 1) +#define WORKPAD_IO_PORT_BASE KSEG1ADDR(WORKPAD_ISA_IO_BASE) static int __init ibm_workpad_setup(void) { - set_io_port_base(IO_PORT_BASE); - ioport_resource.start = IO_PORT_RESOURCE_START; - ioport_resource.end = IO_PORT_RESOURCE_END; + set_io_port_base(WORKPAD_IO_PORT_BASE); + ioport_resource.start = WORKPAD_ISA_IO_START; + ioport_resource.end = WORKPAD_ISA_IO_END; return 0; } diff --git a/include/asm-mips/vr41xx/workpad.h b/include/asm-mips/vr41xx/workpad.h deleted file mode 100644 index 6bfa9c009a9..00000000000 --- a/include/asm-mips/vr41xx/workpad.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * workpad.h, Include file for IBM WorkPad z50. - * - * Copyright (C) 2002-2004 Yoichi Yuasa - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __IBM_WORKPAD_H -#define __IBM_WORKPAD_H - -#include -#include - -/* - * Board specific address mapping - */ -#define VR41XX_ISA_MEM_BASE 0x10000000 -#define VR41XX_ISA_MEM_SIZE 0x04000000 - -/* VR41XX_ISA_IO_BASE includes offset from real base. */ -#define VR41XX_ISA_IO_BASE 0x15000000 -#define VR41XX_ISA_IO_SIZE 0x03000000 - -#define ISA_BUS_IO_BASE 0 -#define ISA_BUS_IO_SIZE VR41XX_ISA_IO_SIZE - -#define IO_PORT_BASE KSEG1ADDR(VR41XX_ISA_IO_BASE) -#define IO_PORT_RESOURCE_START ISA_BUS_IO_BASE -#define IO_PORT_RESOURCE_END (ISA_BUS_IO_BASE + ISA_BUS_IO_SIZE - 1) - -#endif /* __IBM_WORKPAD_H */ -- cgit v1.2.3-70-g09d2