From d2c0bdaa9362c4b2ab7416420d034a0a2d1ec979 Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Fri, 28 Aug 2009 15:35:35 +0300 Subject: ASoC: OMAP: Add functionality to set CLKR and FSR sources in McBSP DAI The McBSP1 port in OMAP3 processors (I believe OMAP2 too but I don't have specifications to check it) have additional CLKR and FSR pins for McBSP1 receiver. Reset default is that receiver is using bit clock and frame sync signal from those pins but it is possible to configure to use also CLKX and FSX pins as well. In fact, other McBSP ports are doing that internally that transmitter and receiver share the CLKX and FSX. Add functionaly that machine drivers can set the CLKR and FSR sources by using the snd_soc_dai_set_sysclk. Thanks to "Aggarwal, Anuj" for reporting the issue. Signed-off-by: Jarkko Nikula Signed-off-by: Mark Brown --- sound/soc/omap/omap-mcbsp.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'sound/soc/omap/omap-mcbsp.h') diff --git a/sound/soc/omap/omap-mcbsp.h b/sound/soc/omap/omap-mcbsp.h index c8147aace81..647d2f981ab 100644 --- a/sound/soc/omap/omap-mcbsp.h +++ b/sound/soc/omap/omap-mcbsp.h @@ -32,6 +32,10 @@ enum omap_mcbsp_clksrg_clk { OMAP_MCBSP_SYSCLK_CLK, /* Internal ICLK */ OMAP_MCBSP_SYSCLK_CLKX_EXT, /* External CLKX pin */ OMAP_MCBSP_SYSCLK_CLKR_EXT, /* External CLKR pin */ + OMAP_MCBSP_CLKR_SRC_CLKR, /* CLKR from CLKR pin */ + OMAP_MCBSP_CLKR_SRC_CLKX, /* CLKR from CLKX pin */ + OMAP_MCBSP_FSR_SRC_FSR, /* FSR from FSR pin */ + OMAP_MCBSP_FSR_SRC_FSX, /* FSR from FSX pin */ }; /* McBSP dividers */ -- cgit v1.2.3-70-g09d2